diff --git a/lib/radio/nco/src/mix_cordic_dbg.vhd b/lib/radio/nco/src/mix_cordic_dbg.vhd
index dddbf65..25d9054 100644
--- a/lib/radio/nco/src/mix_cordic_dbg.vhd
+++ b/lib/radio/nco/src/mix_cordic_dbg.vhd
@@ -33,26 +33,28 @@ use work.nco_pkg.all;
 entity mix is
 Generic
 (
-	nbits_wave_in	: integer := 18;
-	nbits_wave_out	: integer := 18;
-	nbits_phase		: integer := 16
+	nbits_wave_in		: integer := 18;
+	nbits_wave_in_frac	: integer := 16;
+	nbits_wave_out		: integer := 18;
+	nbits_wave_out_frac	: integer := 16;
+	nbits_phase			: integer := 16
 );
 Port
 (
-	srst		: in std_logic;
-	clk			: in std_logic;
-	pacc_clr	: in std_logic;
-	pacc_inc	: in std_logic;
-	freq_in		: in unsigned(nbits_phase-1 downto 0);
-	freq_load	: in std_logic;
-	phase_in	: in unsigned(nbits_phase-1 downto 0);
-	phase_load	: in std_logic;
-	wave_in_i	: in  sfixed;
-	wave_in_q	: in  sfixed;
-	wave_out_i	: out sfixed;
-	wave_out_q	: out sfixed;
-	out_valid	: out std_logic;
-	debug_out	: out debug_mix_out_t
+	srst				: in std_logic;
+	clk					: in std_logic;
+	pacc_clr			: in std_logic;
+	pacc_inc			: in std_logic;
+	freq_in				: in unsigned(nbits_phase-1 downto 0);
+	freq_load			: in std_logic;
+	phase_in			: in unsigned(nbits_phase-1 downto 0);
+	phase_load			: in std_logic;
+	wave_in_i			: in  sfixed;
+	wave_in_q			: in  sfixed;
+	wave_out_i			: out sfixed;
+	wave_out_q			: out sfixed;
+	out_valid			: out std_logic;
+	debug_out			: out debug_mix_out_t
 );
 end mix;
 
@@ -94,8 +96,6 @@ architecture Behavioral of mix is
 	END COMPONENT;
 
 -------------------------------------------------------------------------------
-	constant nbits_wave_in_frac : integer := nbits_wave_in-1;
-	constant nbits_wave_out_frac : integer := nbits_wave_out-1;
 	constant nbits_phase_frac : integer := nbits_phase;
 
 -------------------------------------------------------------------------------
diff --git a/lib/radio/nco/src/nco_cordic_dbg.vhd b/lib/radio/nco/src/nco_cordic_dbg.vhd
index 133f4ba..0f505dd 100644
--- a/lib/radio/nco/src/nco_cordic_dbg.vhd
+++ b/lib/radio/nco/src/nco_cordic_dbg.vhd
@@ -34,6 +34,7 @@ entity nco is
 Generic
 (
 	nbits_wave		: integer := 18;
+	nbits_wave_frac	: integer := 16;
 	nbits_phase		: integer := 16
 );
 Port
@@ -92,7 +93,6 @@ architecture Behavioral of nco is
 	END COMPONENT;
 
 -------------------------------------------------------------------------------
-	constant nbits_wave_frac : integer := nbits_wave-1;
 	constant nbits_phase_frac : integer := nbits_phase;
 
 -------------------------------------------------------------------------------