- fixed renamed package inclusion

- fixed problems after fixed_pkg update: explicit set round and saturation mode in Cordic and CIC

git-svn-id: http://moon:8086/svn/vhdl/trunk@1325 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2015-10-24 16:14:54 +00:00
parent b291a9f5a5
commit 47e7daee7d
62 changed files with 159 additions and 159 deletions
+4 -4
View File
@@ -22,7 +22,7 @@ USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_float_types.all;
use ieee_proposed.fixed_pkg.all;
library work;
@@ -57,7 +57,7 @@ signal accu : sfixed(shi(max_width, max_width_frac) downto slo(max_width, max_
------------------------------------------------------------
begin
dout <= resize(accu, shi(max_width, max_width_frac), slo(max_width, max_width_frac));
dout <= resize(accu, shi(max_width, max_width_frac), slo(max_width, max_width_frac), fixed_wrap, fixed_truncate);
------------------------------------------------------------
integ_proc:
@@ -70,8 +70,8 @@ integ_proc:
accu <= (shi(max_width, max_width_frac) downto slo(max_width, max_width_frac) => '0');
elsif vld_in = '1' then
vld_out <= '1';
x := resize(din, x);
accu <= resize(x + accu, accu);
x := resize(din, x, fixed_wrap, fixed_truncate);
accu <= resize(x + accu, accu, fixed_wrap, fixed_truncate);
end if;
end if;
end process;