- fixed renamed package inclusion

- fixed problems after fixed_pkg update: explicit set round and saturation mode in Cordic and CIC

git-svn-id: http://moon:8086/svn/vhdl/trunk@1325 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2015-10-24 16:14:54 +00:00
parent b291a9f5a5
commit 47e7daee7d
62 changed files with 159 additions and 159 deletions
@@ -17,7 +17,7 @@ use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL;
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_float_types.all;
use ieee_proposed.fixed_pkg.all;
library work;
@@ -131,7 +131,7 @@ input_scale:
variable xsi : sfixed(shi(integ_nbits, integ_nbits_frac) downto slo(integ_nbits, integ_nbits_frac));
begin
if rising_edge(clk) then
x := resize(din, x);
x := resize(din, x, fixed_wrap, fixed_truncate);
xs := x sra min_gain_bits;
-- xsi := xs sra shift_in;
word_i_pipe(0) <= xs;
@@ -159,7 +159,7 @@ input_scale:
);
end generate;
word_c_pipe(0) <= resize(word_i_pipe(nstages), word_c_pipe(0));
word_c_pipe(0) <= resize(word_i_pipe(nstages), word_c_pipe(0), fixed_wrap, fixed_truncate);
vld_c_pipe(0) <= resample_vld;
vld_c <= vld_c_pipe(nstages);
@@ -205,6 +205,6 @@ resampler_proc:
end if;
end process;
dout <= resize(word_c_pipe(nstages), shi(out_width, out_width_frac), slo(out_width, out_width_frac));
dout <= resize(word_c_pipe(nstages), shi(out_width, out_width_frac), slo(out_width, out_width_frac), fixed_wrap, fixed_truncate);
END;