From 46e8e2d093d367db83073135b1c8805e921d5395 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sat, 28 Jan 2017 10:08:56 +0000 Subject: [PATCH] [DE0-Nano] - added dip switches git-svn-id: http://moon:8086/svn/vhdl/trunk@1379 cc03376c-175c-47c8-b038-4cd826a8556b --- projects/mips_de0_nano/quartus/mips/JMips.qsf | 4 ++++ projects/mips_de0_nano/quartus/mips/mips_sys.vhd | 9 +++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/projects/mips_de0_nano/quartus/mips/JMips.qsf b/projects/mips_de0_nano/quartus/mips/JMips.qsf index 053aeb1..01f02db 100644 --- a/projects/mips_de0_nano/quartus/mips/JMips.qsf +++ b/projects/mips_de0_nano/quartus/mips/JMips.qsf @@ -311,4 +311,8 @@ set_global_assignment -name VHDL_FILE ../../../../../repos/lib/CPUs/MIPS/src/cor set_global_assignment -name VHDL_FILE ../../../../../repos/lib/CPUs/MIPS/src/core/mips_alu.vhd set_global_assignment -name VHDL_FILE mips_sys.vhd set_global_assignment -name VHDL_FILE ../../../../../repos/lib/misc/jtag_reg_alt.vhd +set_location_assignment PIN_M1 -to dip_sw[0] +set_location_assignment PIN_T8 -to dip_sw[1] +set_location_assignment PIN_B9 -to dip_sw[2] +set_location_assignment PIN_M15 -to dip_sw[3] set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/projects/mips_de0_nano/quartus/mips/mips_sys.vhd b/projects/mips_de0_nano/quartus/mips/mips_sys.vhd index d5d2ff6..77d7bd8 100644 --- a/projects/mips_de0_nano/quartus/mips/mips_sys.vhd +++ b/projects/mips_de0_nano/quartus/mips/mips_sys.vhd @@ -62,7 +62,7 @@ ENTITY mips_sys IS uart_rx : in unsigned(1 downto 0); uart_tx : out unsigned(1 downto 0); - + dip_sw : in unsigned(3 downto 0); sys_leds : out unsigned(7 downto 0) ); END mips_sys; @@ -138,9 +138,10 @@ ARCHITECTURE behavior OF mips_sys IS signal sys_rst_count : unsigned(7 downto 0) := (others => '1'); -- pre-init for POR BEGIN - sys_nmi <= not sys_nmi_n; - sys_leds <= cpu_debug & gpo0(5 downto 0); - spi_ss_n <= not spi_ss; + sys_nmi <= not sys_nmi_n; + sys_leds <= cpu_debug & gpo0(5 downto 0); + spi_ss_n <= not spi_ss; + gpi0(11 downto 8) <= dip_sw; sys_reset: process(sys_clk)