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- refactored

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1555 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 14:56:00 +00:00
parent a8e4af4484
commit 3b9576c520
14 changed files with 93 additions and 23 deletions
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lib/VGA_ctrl/ghdl/tb_vga_frontend_jb32.gtkw
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lib/VGA_ctrl/ghdl/tb_vga_frontend_jb32.make
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# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include vga_frontend_jb32.inc
# -----------------------------------------------------------
SRCS := $(VGA_FRONTEND_JB32_SRCS)
SRCS += ../src/tb_vga_frontend_jb32.vhd
# -----------------------------------------------------------
# Compile
TARGET := tb_vga_frontend_jb32
ENTITY := tb_vga_frontend_jb32
WITH_FST := y
RUN_TIME := 20ms
include $(VHDL_HOME)/make/ghdl.mk
# -----------------------------------------------------------
lib/VGA_ctrl/ghdl/tb_vga_frontend_jb64.gtkw
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lib/VGA_ctrl/ghdl/tb_vga_frontend_jb64.make
+19
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# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include vga_frontend_jb64.inc
# -----------------------------------------------------------
SRCS := $(VGA_FRONTEND_JB64_SRCS)
SRCS += ../src/tb_vga_frontend_jb64.vhd
# -----------------------------------------------------------
# Compile
TARGET := tb_vga_frontend_jb64
ENTITY := tb_vga_frontend_jb64
WITH_FST := y
RUN_TIME := 2ms
include $(VHDL_HOME)/make/ghdl.mk
# -----------------------------------------------------------
lib/VGA_ctrl/ghdl/vga_frontend_jb32.inc
+15
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# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include vga_backend.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
PKG_NAME := VGA_FRONTEND_JB32
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(VGA_BACKEND_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
$(PKG_NAME)_SRCS += ../src/vga_frontend_jb32.vhd
# -----------------------------------------------------------
lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc
+17
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# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include vga_backend.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
PKG_NAME := VGA_FRONTEND_JB64
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(VGA_BACKEND_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_SYNC_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
$(PKG_NAME)_SRCS += ../src/vga_frontend_jb64.vhd
# -----------------------------------------------------------