diff --git a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb32.wdo b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb32.wdo
index f36b7b2..4b542c6 100644
--- a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb32.wdo
+++ b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb32.wdo
@@ -1,51 +1,51 @@
-onerror {resume}
-quietly WaveActivateNextPane {} 0
-add wave -noupdate -divider J-Bus
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/clk_o
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/rst_o
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/cyc_o
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/stb_o
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/we_o
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/sel_o
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/ack_i
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/mrdy_o
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/srdy_i
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/addr_o
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dat_i
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dat_o
-add wave -noupdate -divider SDRAM
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/sdclk
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/sdclk_fb
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_clk_p
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_clk_n
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cke
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cs_n
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_we_n
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_ras_n
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cas_n
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_ba
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_dm
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_dqs
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/part_addr
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/part_data
-add wave -noupdate -divider Test
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/sd_cmd
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/dout_rst
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dout_reg
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/dout_cnt
-TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 1} {189465865 ps} 0}
-configure wave -namecolwidth 150
-configure wave -valuecolwidth 100
-configure wave -justifyvalue left
-configure wave -signalnamewidth 1
-configure wave -snapdistance 10
-configure wave -datasetprefix 0
-configure wave -rowmargin 4
-configure wave -childrowmargin 2
-configure wave -gridoffset 0
-configure wave -gridperiod 1
-configure wave -griddelta 40
-configure wave -timeline 0
-update
-WaveRestoreZoom {0 ps} {210 us}
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate -divider J-Bus
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/clk_o
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/rst_o
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/cyc_o
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/stb_o
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/we_o
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/sel_o
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/ack_i
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/mrdy_o
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/srdy_i
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/addr_o
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dat_i
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dat_o
+add wave -noupdate -divider Test
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/sd_cmd
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/dout_rst
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dout_reg
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/dout_cnt
+add wave -noupdate -divider SDRAM
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/sdclk
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/sdclk_fb
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_clk_p
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_clk_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cke
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cs_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_we_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_ras_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cas_n
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_ba
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_dm
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_dqs
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/part_addr
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/part_data
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {103239741 ps} 0}
+configure wave -namecolwidth 150
+configure wave -valuecolwidth 100
+configure wave -justifyvalue left
+configure wave -signalnamewidth 1
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+update
+WaveRestoreZoom {0 ps} {210 us}
diff --git a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb64.wdo b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb64.wdo
index a05c2f0..3fb1c3f 100644
--- a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb64.wdo
+++ b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb64.wdo
@@ -13,6 +13,13 @@ add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/srdy_i
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/addr_o
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/dat_i
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/dat_o
+add wave -noupdate -divider Test
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/sd_cmd
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/dout_rst
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/sddat
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/sdsel
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/dout_reg
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/dout_cnt
 add wave -noupdate -divider SDRAM
 add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/sdclk
 add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/sdclk_fb
@@ -28,15 +35,51 @@ add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/part_dm
 add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/part_dqs
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/part_addr
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/part_data
-add wave -noupdate -divider Test
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/sd_cmd
-add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/dout_rst
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/sddat
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/sdsel
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/dout_reg
-add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/dout_cnt
+add wave -noupdate -divider PHY
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/f_sdrclk
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/tpd_board_sim
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/rst
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk_fb
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk0_out
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/rst0_out
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/phy_in
+add wave -noupdate -format Literal -radix hexadecimal -expand /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/phy_out
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/phy_ctrl
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_clk_p
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_clk_n
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_dm
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_dqs
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_data
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk270_rd
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/data_r
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk0_rd
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk0
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/data_reg_r
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_ba
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_addr
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_cs_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_we_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_cas_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_ras_n
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_cke
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/dqs_drive
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/drive
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/dqs
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/dqs_zen
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/dqs_rst
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/wr_data
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/drive270
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/part_ctrl_reg
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/we_reg
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/read_en
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/clk0_temp
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/rst0
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/locked
+add wave -noupdate -format Logic /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/error
+add wave -noupdate -format Literal /tb_ctrl_ddr_wb64/uut/inst_sdram_phy/u_tag_pipe
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 1} {189465865 ps} 0}
+WaveRestoreCursors {{Cursor 1} {199958908 ps} 0}
 configure wave -namecolwidth 150
 configure wave -valuecolwidth 100
 configure wave -justifyvalue left