diff --git a/lib/CPUs/MIPS/src/core/dcache.vhd b/lib/CPUs/MIPS/src/core/dcache.vhd
index 5093add..8c296a7 100644
--- a/lib/CPUs/MIPS/src/core/dcache.vhd
+++ b/lib/CPUs/MIPS/src/core/dcache.vhd
@@ -378,7 +378,6 @@ cache_state:
 				end if;	
 			end if;	
 		when upd_cache =>
-			CYC_O					<= '1';
 			tram_addr_wr			<= cache_index_reg;
 			tram_we					<= '1';
 			cache_entry_in.valid	<= '1';
diff --git a/lib/CPUs/MIPS/src/core/icache.vhd b/lib/CPUs/MIPS/src/core/icache.vhd
index 81dd77e..534ff3a 100644
--- a/lib/CPUs/MIPS/src/core/icache.vhd
+++ b/lib/CPUs/MIPS/src/core/icache.vhd
@@ -296,14 +296,12 @@ cache_state:
 				end if;	
 			end if;	
 		when upd_cache =>
-			CYC_O					<= '1';
 			tag_ram_addr_wr			<= cache_index_reg;
 			tag_ram_we				<= '1';
 			cache_entry_in.valid	<= '1';
 			sn						<= rd_cache;
 			
 		when rd_cache =>
---			CYC_O					<= '1';
 			tag_ram_re				<= '1';
 			data_ram_re				<= '1';
 			was_miss				<= '1';