diff --git a/lib/VGA_ctrl/sim/tb_vga_frontend.wdo b/lib/VGA_ctrl/sim/tb_vga_frontend.wdo
index db77e3f..744cafd 100644
--- a/lib/VGA_ctrl/sim/tb_vga_frontend.wdo
+++ b/lib/VGA_ctrl/sim/tb_vga_frontend.wdo
@@ -2,8 +2,6 @@ onerror {resume}
 quietly WaveActivateNextPane {} 0
 add wave -noupdate -format Logic /tb_vga_frontend/clk_o
 add wave -noupdate -format Logic /tb_vga_frontend/rst_o
-add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/dat_i
-add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/dat_o
 add wave -noupdate -divider Master
 add wave -noupdate -format Logic /tb_vga_frontend/cyc_o
 add wave -noupdate -format Logic /tb_vga_frontend/stb_o
@@ -32,11 +30,8 @@ add wave -noupdate -format Literal -radix decimal /tb_vga_frontend/vga_red
 add wave -noupdate -format Literal -radix decimal /tb_vga_frontend/vga_green
 add wave -noupdate -format Literal -radix decimal /tb_vga_frontend/vga_blue
 add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/s
-add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/pixel_cnt
 add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/request_cnt
 add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/read_cnt
-add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/vga_need_data
-add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/vga_rdy4data
 add wave -noupdate -divider Backend
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/ctrl_scan_en
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/sys_rst
@@ -44,6 +39,8 @@ add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_bac
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/stat_scan
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/scan_enable
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/is_scan
+add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/stat_hpos
+add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/stat_vpos
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/rst
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/dcm_locked
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/cg_draw
@@ -51,7 +48,7 @@ add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/cg_en
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/hready
 add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/vready
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 1} {4559623 ps} 0}
+WaveRestoreCursors {{Cursor 1} {1420398899 ps} 0}
 configure wave -namecolwidth 150
 configure wave -valuecolwidth 100
 configure wave -justifyvalue left
@@ -65,4 +62,4 @@ configure wave -gridperiod 1
 configure wave -griddelta 40
 configure wave -timeline 0
 update
-WaveRestoreZoom {19955817258 ps} {20002325408 ps}
+WaveRestoreZoom {1382189057 ps} {1476673938 ps}
diff --git a/lib/VGA_ctrl/src/tb_vga_frontend.vhd b/lib/VGA_ctrl/src/tb_vga_frontend.vhd
index 90308ff..a07ec69 100644
--- a/lib/VGA_ctrl/src/tb_vga_frontend.vhd
+++ b/lib/VGA_ctrl/src/tb_vga_frontend.vhd
@@ -41,21 +41,21 @@ ARCHITECTURE behavior OF tb_vga_frontend IS
 	signal CYC_O			: std_logic;
 	signal STB_O			: std_logic;
 	signal WE_O				: std_logic;
-	signal SEL_O			: unsigned(3 downto 0);
+	signal SEL_O			: unsigned(3 downto 0) := (others => '1');
 	signal ACK_I			: std_logic := '0';
-	signal MRDY_O			: std_logic;
+	signal MRDY_O			: std_logic := '1';
 	signal SRDY_I			: std_logic := '0';
 	signal ADDR_O			: unsigned(31 downto 0);
-	signal MDAT_I			: unsigned(31 downto 0) := (others => '-');
+	signal MDAT_I			: unsigned(31 downto 0);
 	signal MDAT_O			: unsigned(31 downto 0);
 
 	-- Slave
 	signal CYC_I			: std_logic := '0';
 	signal STB_I			: std_logic := '0';
 	signal WE_I				: std_logic := '0';
-	signal SEL_I			: unsigned(3 downto 0) := (others => '1');
+	signal SEL_I			: unsigned(3 downto 0);
 	signal ACK_O			: std_logic;
-	signal MRDY_I			: std_logic := '1';
+	signal MRDY_I			: std_logic;
 	signal SRDY_O			: std_logic;
 	signal ADDR_I			: unsigned(31 downto 0) := (others => '-');
 	signal SDAT_I			: unsigned(31 downto 0) := (others => '-');