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Force VCD

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jens
2022-06-30 22:14:13 +02:00
parent 9148ac7087
commit 2c6a0b9c99
2 changed files with 5 additions and 0 deletions
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lib/JBUS/dmac/ghdl/.gitignore.templ
+4
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@@ -0,0 +1,4 @@
.gitignore
build/
.gitignore
build/
lib/JBUS/dmac/ghdl/tb_dmac_sync.make
+1
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@@ -14,6 +14,7 @@ SRCS += $(MOD_PATH)/dmac/src/tb_dmac.vhd
TARGET := tb_dmac_sync TARGET := tb_dmac_sync
ENTITY := tb_dmac ENTITY := tb_dmac
RUN_TIME := 6us RUN_TIME := 6us
WAVE_FORMAT := vcd
include $(VHDL_HOME)/make/ghdl.mk include $(VHDL_HOME)/make/ghdl.mk