diff --git a/lib/VGA_ctrl/src/clkgen_virtex4.vhd b/lib/clock/xilinx/src/clkgen_virtex4.vhd
similarity index 100%
rename from lib/VGA_ctrl/src/clkgen_virtex4.vhd
rename to lib/clock/xilinx/src/clkgen_virtex4.vhd
diff --git a/projects/mips_sys/src/clockgen.vhd b/lib/clock/xilinx/src/clockgen.vhd
similarity index 100%
rename from projects/mips_sys/src/clockgen.vhd
rename to lib/clock/xilinx/src/clockgen.vhd
diff --git a/projects/mips_sys/ise101/mips_sys/project/mips_sys.prj b/projects/mips_sys/ise101/mips_sys/project/mips_sys.prj
index f04dd2c..91b346e 100644
--- a/projects/mips_sys/ise101/mips_sys/project/mips_sys.prj
+++ b/projects/mips_sys/ise101/mips_sys/project/mips_sys.prj
@@ -55,6 +55,6 @@ vhdl work "../../../../lib/ac97_ctrl/src/core/ac_io.vhd"
 vhdl work "../../../../lib/ac97_ctrl/src/core/ac97_wb.vhd"
 vhdl work "../../../../lib/ac97_ctrl/src/core/ac_out.vhd"
 vhdl work "../../../../lib/ac97_ctrl/src/core/ac_in.vhd"
-vhdl work "../../src/clockgen.vhd"
+vhdl work "../../../../lib/clock/xilinx/src/clockgen.vhd"
 vhdl work "../../src/async_defs.vhd"
 vhdl work "../../src/mips_sys.vhd"