From 27f34ce7a44b6c05775d0026d138ebe41d3fb1f8 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sat, 10 Apr 2010 07:43:02 +0000 Subject: [PATCH] This commit was manufactured by cvs2svn to create tag 'EMAC_R4'. git-svn-id: http://moon:8086/svn/vhdl/tags/EMAC_R4@905 cc03376c-175c-47c8-b038-4cd826a8556b --- Common/sim/ModelSim SE .lnk | Bin 1441 -> 0 bytes Common/sim/compile_simprim.do | 8 - Common/sim/compile_unisim.do | 8 - Common/ucf/ml402.ucf | 675 --- lib/CPUs/JCpu/asm/dctest.jsm | 56 - lib/CPUs/JCpu/asm/dctest.tcl | 212 - lib/CPUs/JCpu/asm/itest.jsm | 858 --- lib/CPUs/JCpu/asm/itest.tcl | 3407 ----------- lib/CPUs/JCpu/asm/make | 50 - lib/CPUs/JCpu/asm/mul8x8.jsm | 29 - lib/CPUs/JCpu/asm/mul8x8.tcl | 154 - lib/CPUs/JCpu/asm/reti_issue.jsm | 50 - lib/CPUs/JCpu/asm/reti_issue.tcl | 157 - lib/CPUs/JCpu/doc/block_diagram.png | Bin 8026 -> 0 bytes lib/CPUs/JCpu/doc/memory_map.png | Bin 3545 -> 0 bytes lib/CPUs/JCpu/gpl-3.0.txt | 674 --- lib/CPUs/JCpu/sim/ModelSim SE .lnk | Bin 1455 -> 0 bytes lib/CPUs/JCpu/sim/tb_cpu.fdo | 22 - lib/CPUs/JCpu/sim/tb_cpu.wdo | 107 - lib/CPUs/JCpu/sim/tb_cpu_embedded.fdo | 21 - lib/CPUs/JCpu/sim/tb_cpu_embedded.wdo | 26 - lib/CPUs/JCpu/sim/tb_cpu_itest.fdo | 22 - lib/CPUs/JCpu/sim/tb_cpu_itest.wdo | 122 - lib/CPUs/JCpu/sim/tb_cpu_reti_issue.fdo | 22 - lib/CPUs/JCpu/sim/tb_cpu_reti_issue.wdo | 82 - lib/CPUs/JCpu/sim/tb_mul8x8.fdo | 21 - lib/CPUs/JCpu/sim/tb_mul8x8.wdo | 31 - lib/CPUs/JCpu/src/core/alu.vhd | 236 - lib/CPUs/JCpu/src/core/chipram.vhd | 85 - lib/CPUs/JCpu/src/core/chipreg.vhd | 117 - lib/CPUs/JCpu/src/core/cpu.vhd | 564 -- lib/CPUs/JCpu/src/core/cpu_pkg.vhd | 856 --- lib/CPUs/JCpu/src/core/dpath_ctrl.vhd | 87 - lib/CPUs/JCpu/src/core/int_ctrl.vhd | 138 - lib/CPUs/JCpu/src/core/pc.vhd | 70 - lib/CPUs/JCpu/src/core/reg_dual.vhd | 81 - lib/CPUs/JCpu/src/core/stack_ctrl.vhd | 73 - lib/CPUs/JCpu/src/cpu_embedded.vhd | 106 - lib/CPUs/JCpu/src/dctest_irom.vhdl | 79 - lib/CPUs/JCpu/src/dctest_irom_ld.vhdl | 1181 ---- lib/CPUs/JCpu/src/dctest_xrom.vhdl | 317 - lib/CPUs/JCpu/src/dctest_xrom_ld.vhdl | 413 -- lib/CPUs/JCpu/src/itest_irom.vhdl | 1086 ---- lib/CPUs/JCpu/src/itest_irom_ld.vhdl | 1181 ---- lib/CPUs/JCpu/src/itest_xrom.vhdl | 317 - lib/CPUs/JCpu/src/itest_xrom_ld.vhdl | 413 -- lib/CPUs/JCpu/src/mul8x8_irom.vhdl | 88 - lib/CPUs/JCpu/src/mul8x8_irom_ld.vhdl | 1181 ---- lib/CPUs/JCpu/src/mul8x8_xrom.vhdl | 317 - lib/CPUs/JCpu/src/mul8x8_xrom_ld.vhdl | 413 -- lib/CPUs/JCpu/src/reti_issue_irom.vhdl | 89 - lib/CPUs/JCpu/src/reti_issue_irom_ld.vhdl | 1181 ---- lib/CPUs/JCpu/src/reti_issue_xrom.vhdl | 317 - lib/CPUs/JCpu/src/reti_issue_xrom_ld.vhdl | 413 -- lib/CPUs/JCpu/src/tb_cpu_embedded.vhd | 126 - lib/CPUs/JCpu/src/tb_cpu_itest.vhd | 200 - lib/CPUs/JCpu/syn/ise91/cpu_vhdl.prj | 10 - lib/CPUs/JCpu/tools/eval_scan.rb | 42 - lib/CPUs/JCpu/tools/insrom.rb | 46 - lib/CPUs/JCpu/tools/irom.vhd.tpl | 32 - lib/CPUs/JCpu/tools/irom_ld.vhd.tpl | 151 - lib/CPUs/JCpu/tools/jasm.bak.rb | 494 -- lib/CPUs/JCpu/tools/jasm.rb | 814 --- lib/CPUs/JCpu/tools/lib/cg.inc.jsm | 72 - lib/CPUs/JCpu/tools/lib/cregs.inc.jsm | 7 - lib/CPUs/JCpu/tools/lib/delays.inc.jsm | 64 - lib/CPUs/JCpu/tools/lib/lcd.inc.jsm | 208 - lib/CPUs/JCpu/tools/lib/mul8x8.inc.jsm | 42 - lib/CPUs/JCpu/tools/lib/uart.inc.jsm | 32 - lib/CPUs/JCpu/tools/lib/utils.inc.jsm | 32 - lib/CPUs/JCpu/tools/opc.list | 64 - lib/CPUs/JCpu/tools/regx.rb | 20 - lib/CPUs/JCpu/tools/rom.tcl.tpl | 61 - lib/CPUs/JCpu/tools/templates.rb | 44 - lib/CPUs/JCpu/tools/xrom.vhd.tpl | 32 - lib/CPUs/JCpu/tools/xrom_ld.vhd.tpl | 151 - lib/CPUs/MIPS/bsp/examples/.directory_history | 34 - lib/CPUs/MIPS/bsp/examples/Bessel.c | 87 - lib/CPUs/MIPS/bsp/examples/Makefile | 333 -- lib/CPUs/MIPS/bsp/examples/aes256.c | 359 -- lib/CPUs/MIPS/bsp/examples/aes256.h | 42 - lib/CPUs/MIPS/bsp/examples/aes256_1.c | 76 - lib/CPUs/MIPS/bsp/examples/barcode.c | 358 -- lib/CPUs/MIPS/bsp/examples/barcode.new.c | 322 - lib/CPUs/MIPS/bsp/examples/basicmath_small.c | 84 - lib/CPUs/MIPS/bsp/examples/bogomips.c | 71 - .../MIPS/bsp/examples/bootloader/Makefile | 47 - .../MIPS/bsp/examples/bootloader/bootloader.c | 247 - .../bsp/examples/bootloader/bootloader.ld | 53 - .../bootloader/bootloader_with_flash.c | 383 -- .../MIPS/bsp/examples/bootloader/init_boot.S | 19 - .../MIPS/bsp/examples/bootloader/jtag_upd.bat | 13 - .../bsp/examples/bootloader/kernel_boot.S | 46 - .../bsp/examples/bootloader/libsys_boot.c | 214 - .../bsp/examples/bootloader/libsys_boot.h | 54 - .../bsp/examples/bootloader/startup_boot.S | 43 - lib/CPUs/MIPS/bsp/examples/cfiflash.c | 415 -- lib/CPUs/MIPS/bsp/examples/cfiflash.h | 58 - lib/CPUs/MIPS/bsp/examples/crc32.c | 54 - lib/CPUs/MIPS/bsp/examples/crc32.h | 13 - lib/CPUs/MIPS/bsp/examples/cubic.c | 64 - lib/CPUs/MIPS/bsp/examples/dbg.c | 375 -- lib/CPUs/MIPS/bsp/examples/delay_mips.c | 15 - lib/CPUs/MIPS/bsp/examples/demo.c | 67 - lib/CPUs/MIPS/bsp/examples/dhry.h | 430 -- lib/CPUs/MIPS/bsp/examples/dhry_1.c | 402 -- lib/CPUs/MIPS/bsp/examples/dhry_2.c | 192 - lib/CPUs/MIPS/bsp/examples/dttl.c | 261 - lib/CPUs/MIPS/bsp/examples/gunzip.c | 198 - lib/CPUs/MIPS/bsp/examples/hashtest.c | 323 - lib/CPUs/MIPS/bsp/examples/hello.c | 19 - lib/CPUs/MIPS/bsp/examples/hpi.c | 949 --- lib/CPUs/MIPS/bsp/examples/hpi.h | 384 -- lib/CPUs/MIPS/bsp/examples/inflate.c | 504 -- lib/CPUs/MIPS/bsp/examples/inflate.h | 15 - lib/CPUs/MIPS/bsp/examples/irq.c | 92 - lib/CPUs/MIPS/bsp/examples/irq.h | 15 - lib/CPUs/MIPS/bsp/examples/isqrt.c | 89 - lib/CPUs/MIPS/bsp/examples/kernel.S | 184 - lib/CPUs/MIPS/bsp/examples/libsys.c | 1101 ---- lib/CPUs/MIPS/bsp/examples/libsys.h | 187 - .../bsp/examples/libsys/.directory_history | 70 - lib/CPUs/MIPS/bsp/examples/libsys/Makefile | 29 - lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c | 268 - lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h | 43 - lib/CPUs/MIPS/bsp/examples/libsys/syscalls.c | 86 - lib/CPUs/MIPS/bsp/examples/life.c | 251 - lib/CPUs/MIPS/bsp/examples/link/link.ld | 225 - lib/CPUs/MIPS/bsp/examples/lua_init.c | 1 - lib/CPUs/MIPS/bsp/examples/lwl.c | 46 - lib/CPUs/MIPS/bsp/examples/mandelbrot.c | 54 - lib/CPUs/MIPS/bsp/examples/mips_gfx.c | 566 -- lib/CPUs/MIPS/bsp/examples/mips_gfx.h | 91 - lib/CPUs/MIPS/bsp/examples/mipsdis.c | 625 -- lib/CPUs/MIPS/bsp/examples/mipsdis.h | 450 -- lib/CPUs/MIPS/bsp/examples/paranoia.c | 2302 -------- lib/CPUs/MIPS/bsp/examples/phrasen.c | 298 - lib/CPUs/MIPS/bsp/examples/pi.h | 13 - lib/CPUs/MIPS/bsp/examples/queens.c | 856 --- lib/CPUs/MIPS/bsp/examples/r3.c | 471 -- lib/CPUs/MIPS/bsp/examples/rad2deg.c | 39 - lib/CPUs/MIPS/bsp/examples/random.c | 86 - lib/CPUs/MIPS/bsp/examples/random.h | 6 - lib/CPUs/MIPS/bsp/examples/regdef.h | 81 - .../MIPS/bsp/examples/richards_benchmark.c | 408 -- lib/CPUs/MIPS/bsp/examples/rmd160.c | 294 - lib/CPUs/MIPS/bsp/examples/rmd160.h | 154 - lib/CPUs/MIPS/bsp/examples/rmd160_test.c | 113 - lib/CPUs/MIPS/bsp/examples/round.h | 55 - lib/CPUs/MIPS/bsp/examples/serdump.c | 83 - lib/CPUs/MIPS/bsp/examples/snipmath.h | 75 - lib/CPUs/MIPS/bsp/examples/sniptype.h | 37 - lib/CPUs/MIPS/bsp/examples/specs/specs | 147 - lib/CPUs/MIPS/bsp/examples/stanford.c | 1117 ---- lib/CPUs/MIPS/bsp/examples/startup.S | 87 - lib/CPUs/MIPS/bsp/examples/test_ac97.c | 310 - lib/CPUs/MIPS/bsp/examples/test_dcache.c | 61 - lib/CPUs/MIPS/bsp/examples/test_endianess.c | 64 - lib/CPUs/MIPS/bsp/examples/test_exception.c | 282 - lib/CPUs/MIPS/bsp/examples/test_flash.c | 94 - lib/CPUs/MIPS/bsp/examples/test_hpi.c | 848 --- lib/CPUs/MIPS/bsp/examples/test_irq.c | 335 -- lib/CPUs/MIPS/bsp/examples/test_mipsdis.c | 651 -- lib/CPUs/MIPS/bsp/examples/test_timer.c | 40 - lib/CPUs/MIPS/bsp/examples/test_vga.c | 206 - lib/CPUs/MIPS/bsp/examples/testbench.c | 1229 ---- lib/CPUs/MIPS/bsp/examples/testlibusb.c | 210 - lib/CPUs/MIPS/bsp/examples/ucb.c | 44 - lib/CPUs/MIPS/bsp/examples/whet.c | 265 - lib/CPUs/MIPS/bsp/examples/xcpt.c | 139 - lib/CPUs/MIPS/bsp/examples/xcpt.h | 55 - lib/CPUs/MIPS/bsp/examples/xcpt_asm.h | 67 - lib/CPUs/MIPS/dist/files.dist | 37 - lib/CPUs/MIPS/dist/mdist | 54 - lib/CPUs/MIPS/dist/tmpl/gpl-3.0.txt | 674 --- lib/CPUs/MIPS/dist/tmpl/hello.flash.bin | Bin 7936 -> 0 bytes lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd | 341 -- lib/CPUs/MIPS/dist/tmpl/notes.txt | 100 - lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.vhd | 233 - lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.wdo | 45 - lib/CPUs/MIPS/doc/J-MIPS.txt | 109 - lib/CPUs/MIPS/doc/async_port_timing.pdf | 2 - lib/CPUs/MIPS/doc/memory_map.pdf | 0 lib/CPUs/MIPS/doc/memory_map.vsd | Bin 17920 -> 0 bytes lib/CPUs/MIPS/doc/mips_biu.pdf | Bin 7079 -> 0 bytes lib/CPUs/MIPS/doc/mips_drawings.vsd | Bin 288256 -> 0 bytes lib/CPUs/MIPS/doc/mips_jbus_timing.pdf | Bin 22419 -> 0 bytes lib/CPUs/MIPS/doc/mips_pipeline.pdf | Bin 16626 -> 0 bytes lib/CPUs/MIPS/doc/mips_pipeline_stages.pdf | Bin 9884 -> 0 bytes lib/CPUs/MIPS/doc/mips_sys.vsd | Bin 30720 -> 0 bytes lib/CPUs/MIPS/doc/mips_sys_ml402.pdf | Bin 7137 -> 0 bytes lib/CPUs/MIPS/doc/toolchain/howto_build.txt | 46 - lib/CPUs/MIPS/doc/toolchain/make.sh | 151 - .../doc/toolchain/newlib-1.16.0-jens.patch | 11 - .../doc/toolchain/newlib-1.17.0-jens.patch | 11 - lib/CPUs/MIPS/sim/ModelSim SE .lnk | Bin 1455 -> 0 bytes lib/CPUs/MIPS/sim/tb_mips_muldiv.fdo | 15 - lib/CPUs/MIPS/sim/tb_mips_muldiv.wdo | 78 - lib/CPUs/MIPS/sim/tb_mips_top.fdo | 65 - lib/CPUs/MIPS/sim/tb_mips_top.wdo | 260 - lib/CPUs/MIPS/sim/tb_mips_top_syn.fdo | 55 - lib/CPUs/MIPS/sim/tb_mips_top_syn.wdo | 104 - lib/CPUs/MIPS/src/async_defs.vhd | 68 - lib/CPUs/MIPS/src/bootloader.ROM.vhd | 2082 ------- lib/CPUs/MIPS/src/core/.directory_history | 12 - lib/CPUs/MIPS/src/core/dcache.vhd | 531 -- lib/CPUs/MIPS/src/core/icache.vhd | 488 -- lib/CPUs/MIPS/src/core/mips_alu.vhd | 184 - lib/CPUs/MIPS/src/core/mips_bcu.vhd | 52 - lib/CPUs/MIPS/src/core/mips_bui.vhd | 552 -- lib/CPUs/MIPS/src/core/mips_cop.vhd | 546 -- lib/CPUs/MIPS/src/core/mips_instr.vhd | 1062 ---- lib/CPUs/MIPS/src/core/mips_muldiv.vhd | 454 -- lib/CPUs/MIPS/src/core/mips_pipeline.vhd | 851 --- lib/CPUs/MIPS/src/core/mips_reg.vhd | 72 - lib/CPUs/MIPS/src/core/mips_shifter.vhd | 117 - lib/CPUs/MIPS/src/core/mips_top.vhd | 308 - lib/CPUs/MIPS/src/core/mips_types.vhd | 670 --- lib/CPUs/MIPS/src/mips_top_syn.vhd | 100 - lib/CPUs/MIPS/src/tb_mips_muldiv.vhd | 332 -- lib/CPUs/MIPS/src/tb_mips_top.vhd | 460 -- .../MIPS/syn/ise101/constraints/mips_top.xcf | 6 - lib/CPUs/MIPS/syn/ise101/mips_top.prj | 21 - lib/CPUs/MIPS/syn/ise101/mips_top_vhdl.prj | 21 - lib/CPUs/MIPS/todo.txt | 35 - lib/CPUs/MIPS/tools/Makefile | 20 - lib/CPUs/MIPS/tools/src/flashgen.c | 140 - lib/CPUs/MIPS/tools/src/ramgen.c | 385 -- lib/CPUs/MIPS/tools/src/romgen.c | 428 -- lib/FIFO/sim/tb_gray_counter.fdo | 13 - lib/FIFO/sim/tb_gray_counter.wdo | 29 - lib/FIFO/src/.directory_history | 8 - lib/FIFO/src/async_fifo_ctrl.vhd | 248 - lib/FIFO/src/dpram_1w1r.vhd | 77 - lib/FIFO/src/fifo_async.vhd | 124 - lib/FIFO/src/fifo_ctrl_pkg.vhd | 67 - lib/FIFO/src/fifo_sync.vhd | 123 - lib/FIFO/src/fifo_sync_dist.vhd | 117 - lib/FIFO/src/gray_counter.vhd | 84 - lib/FIFO/src/sync_fifo_ctrl.vhd | 198 - lib/FIFO/src/tb_fifo_async.vhd | 225 - lib/FIFO/src/tb_fifo_sync.vhd | 206 - lib/FIFO/src/tb_gray_counter.vhd | 85 - lib/PCK_FIO-1.16/PCK_FIO.html | 297 - lib/PCK_FIO-1.16/PCK_FIO.out.gold | 206 - lib/PCK_FIO-1.16/PCK_FIO.vhd | 919 --- lib/PCK_FIO-1.16/README | 72 - lib/PCK_FIO-1.16/TB_PCK_FIO.vhd | 504 -- lib/PCK_FIO-2002.7/CHANGES | 86 - lib/PCK_FIO-2002.7/PCK_FIO.html | 339 -- lib/PCK_FIO-2002.7/PCK_FIO.out.gold | Bin 8979 -> 0 bytes lib/PCK_FIO-2002.7/PCK_FIO_1987.vhd | 105 - lib/PCK_FIO-2002.7/PCK_FIO_1987_BODY.vhd | 821 --- lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd | 108 - lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd | 814 --- lib/PCK_FIO-2002.7/README | 88 - lib/PCK_FIO-2002.7/TB_PCK_FIO_1987.vhd | 531 -- lib/PCK_FIO-2002.7/TB_PCK_FIO_1993.vhd | 536 -- .../msMakefile.TBE_PCK_FIO_TB.1987 | 34 - .../msMakefile.TBE_PCK_FIO_TB.1993 | 34 - lib/SDRAM/ddr_sdr_v1_4/doc/SDRAM_CTRL.vsd | Bin 71680 -> 0 bytes .../ddr_sdr_v1_4/ise9/sdram_ctrl_top_vhdl.prj | 13 - lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.fdo | 27 - lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.wdo | 93 - .../ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.fdo | 27 - .../ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.wdo | 68 - .../sim/tb_sdr_ctrl_lin_r_rand_w.fdo | 27 - .../sim/tb_sdr_ctrl_lin_r_rand_w.wdo | 87 - .../sim/tb_sdr_ctrl_lin_w_rand_r.fdo | 27 - .../sim/tb_sdr_ctrl_lin_w_rand_r.wdo | 87 - .../sim/tb_sdr_ctrl_rand_addr.fdo | 27 - .../sim/tb_sdr_ctrl_rand_addr.wdo | 82 - .../ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.fdo | 27 - .../ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.wdo | 84 - .../sim/tb_sdram_ctrl_frontend.fdo | 28 - .../sim/tb_sdram_ctrl_frontend.wdo | 48 - .../ddr_sdr_v1_4/src/clockgen_virtex4.vhd | 240 - .../ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd | 389 -- lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd | 111 - lib/SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd | 1320 ----- lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd | 111 - lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd | 269 - lib/SDRAM/ddr_sdr_v1_4/src/sdram_config.vhd | 74 - lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd | 487 -- .../ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd | 293 - lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd | 289 - lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd | 133 - lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd | 336 -- .../ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd | 420 -- .../src/tb_sdr_ctrl_lin_r_rand_w.vhd | 322 - .../src/tb_sdr_ctrl_lin_w_rand_r.vhd | 320 - .../src/tb_sdr_ctrl_rand_addr.vhd | 319 - .../ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd | 333 -- .../src/tb_sdram_ctrl_frontend.vhd | 385 -- lib/SDRAM/ddr_sdr_v1_5/doc/SDRAM_CTRL.vsd | Bin 91648 -> 0 bytes lib/SDRAM/ddr_sdr_v1_5/sim/ModelSim SE .lnk | Bin 1473 -> 0 bytes .../sim/tb_sdram_ctrl_frontend64_wb.fdo | 30 - .../sim/tb_sdram_ctrl_frontend64_wb.wdo | 55 - .../sim/tb_sdram_ctrl_frontend_wb.fdo | 30 - .../sim/tb_sdram_ctrl_frontend_wb.wdo | 62 - .../ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd | 367 -- lib/SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd | 1320 ----- lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd | 290 - lib/SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd | 74 - lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd | 491 -- .../src/sdram_ctrl_frontend64_wb.vhd | 278 - .../src/sdram_ctrl_frontend_wb.vhd | 278 - lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd | 237 - lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd | 130 - .../src/tb_sdram_ctrl_frontend64_wb.vhd | 871 --- .../src/tb_sdram_ctrl_frontend_wb.vhd | 867 --- lib/SDRAM/ddr_sdr_v1_5/todo.txt | 7 - lib/SSRAM/sim/ModelSim SE .lnk | Bin 1447 -> 0 bytes lib/SSRAM/sim/tb_ssram_frontend_wb.fdo | 17 - lib/SSRAM/sim/tb_ssram_frontend_wb.wdo | 47 - lib/SSRAM/src/CY7C1354B.vhd | 388 -- lib/SSRAM/src/package_utility.vhd | 73 - lib/SSRAM/src/ssram_frontend_wb.vhd | 181 - lib/SSRAM/src/tb_ssram_frontend_wb.vhd | 457 -- lib/VGA_ctrl/sim/ModelSim SE .lnk | Bin 1453 -> 0 bytes lib/VGA_ctrl/sim/tb_vga_frontend.fdo | 25 - lib/VGA_ctrl/sim/tb_vga_frontend.wdo | 79 - lib/VGA_ctrl/sim/tb_vga_frontend64.fdo | 27 - lib/VGA_ctrl/sim/tb_vga_frontend64.wdo | 119 - lib/VGA_ctrl/src/char_gen.vhd | 547 -- lib/VGA_ctrl/src/clkgen_virtex4.vhd | 106 - lib/VGA_ctrl/src/fonts/Fixedsys_8x15.bff | Bin 33044 -> 0 bytes lib/VGA_ctrl/src/fonts/Fixedsys_8x16.bff | Bin 33044 -> 0 bytes lib/VGA_ctrl/src/fonts/Fixedsys_9x16.bff | Bin 33044 -> 0 bytes lib/VGA_ctrl/src/fonts/System_16x16.bff | Bin 65812 -> 0 bytes lib/VGA_ctrl/src/fonts/char_rom_c64.vhd | 540 -- lib/VGA_ctrl/src/fonts/char_rom_data.vhd | 539 -- lib/VGA_ctrl/src/fonts/char_rom_datasoft.vhd | 539 -- .../src/fonts/char_rom_demo_maker_m.vhd | 539 -- .../src/fonts/char_rom_fixedsys_8x15.vhd | 4383 -------------- .../src/fonts/char_rom_fixedsys_8x16.vhd | 4382 -------------- .../src/fonts/char_rom_fixedsys_9x16.vhd | 4351 -------------- .../src/fonts/char_rom_system_16x16.vhd | 4382 -------------- .../src/fonts/char_rom_the_goonies.vhd | 539 -- lib/VGA_ctrl/src/fonts/make_rom.bat | 6 - lib/VGA_ctrl/src/tb_vga_frontend.vhd | 322 - lib/VGA_ctrl/src/tb_vga_frontend64.vhd | 459 -- lib/VGA_ctrl/src/vga_backend.vhd | 177 - lib/VGA_ctrl/src/vga_frontend.vhd | 495 -- lib/VGA_ctrl/src/vga_frontend64.vhd | 917 --- lib/VGA_ctrl/src/vga_sync.vhd | 127 - lib/VGA_ctrl/src/vga_timing.vhd | 102 - lib/VGA_ctrl/src/vga_types.vhd | 158 - lib/VGA_ctrl/todo.txt | 21 - lib/ac97_ctrl/sim/tb_ac97_wb.fdo | 20 - lib/ac97_ctrl/sim/tb_ac97_wb.wdo | 77 - lib/ac97_ctrl/sim/tb_ac_in.fdo | 14 - lib/ac97_ctrl/sim/tb_ac_in.wdo | 43 - lib/ac97_ctrl/sim/tb_ac_io.fdo | 15 - lib/ac97_ctrl/sim/tb_ac_io.wdo | 51 - lib/ac97_ctrl/sim/tb_ac_out.fdo | 13 - lib/ac97_ctrl/sim/tb_ac_out.wdo | 41 - lib/ac97_ctrl/src/core/ac97_wb.vhd | 330 -- lib/ac97_ctrl/src/core/ac_in.vhd | 309 - lib/ac97_ctrl/src/core/ac_io.vhd | 189 - lib/ac97_ctrl/src/core/ac_out.vhd | 276 - lib/ac97_ctrl/src/tb_ac97_wb.vhd | 152 - lib/ac97_ctrl/src/tb_ac_in.vhd | 203 - lib/ac97_ctrl/src/tb_ac_io.vhd | 186 - lib/ac97_ctrl/src/tb_ac_out.vhd | 149 - lib/filter/sim/eval_lowpass.m | 37 - lib/filter/sim/lowpass.m | 20 - lib/filter/sim/tb_fir_iterative.fdo | 18 - lib/filter/sim/tb_fir_iterative.wdo | 144 - lib/filter/sim/tb_fir_parallel | Bin 1354927 -> 0 bytes lib/filter/sim/tb_fir_parallel.fdo | 18 - lib/filter/sim/tb_fir_parallel.wdo | 29 - lib/filter/sim/tb_fir_results.m | 10 - lib/filter/sim/tb_fir_semi_parallel.fdo | 20 - lib/filter/sim/tb_fir_semi_parallel.wdo | 57 - lib/filter/sim/tb_fir_stage.fdo | 17 - lib/filter/sim/tb_fir_stage.wdo | 31 - lib/filter/sim/tb_fir_stage_sys.fdo | 17 - lib/filter/sim/tb_fir_stage_sys.wdo | 28 - lib/filter/src/delay_line.vhd | 129 - lib/filter/src/filter_pkg.vhd | 219 - lib/filter/src/fir_iterative.vhd | 323 - lib/filter/src/fir_iterative_pkg.vhd | 52 - lib/filter/src/fir_parallel.vhd | 218 - lib/filter/src/fir_parallel_pkg.vhd | 29 - lib/filter/src/fir_pkg.vhd | 54 - lib/filter/src/fir_semi_parallel.vhd | 300 - lib/filter/src/fir_stage.vhd | 157 - lib/filter/src/fir_stage_pkg.vhd | 18 - lib/filter/src/fir_stage_sys.vhd | 109 - lib/filter/src/tb_fir_iterative.vhd | 234 - lib/filter/src/tb_fir_parallel.vhd | 193 - lib/filter/src/tb_fir_semi_parallel.vhd | 289 - lib/filter/src/tb_fir_stage.vhd | 276 - lib/filter/src/tb_fir_stage_sys.vhd | 230 - lib/fix_std/fix_std.vhd | 1007 ---- lib/fix_std/fix_stdb.vhd | 1910 ------ lib/fixed/fixed_util_pkg.vhd | 159 - lib/fixed_ja/fixed_ja.vhd | 322 - lib/fixed_ja/fixed_ja_body.vhd | 1921 ------ lib/jasm/cg.inc.jsm | 72 - lib/jasm/cregs.inc.jsm | 7 - lib/jasm/delays.inc.jsm | 64 - lib/jasm/lcd.inc.jsm | 208 - lib/jasm/mul8x8.inc.jsm | 42 - lib/jasm/uart.inc.jsm | 32 - lib/jasm/utils.inc.jsm | 32 - lib/misc/async_port_wb.vhd | 317 - lib/misc/async_types.vhd | 60 - lib/misc/bbfifo.vhd | 123 - lib/misc/clockgen_virtex4.vhd | 237 - lib/misc/debounce.vhd | 91 - lib/misc/debounce2.vhd | 142 - lib/misc/dpram_1w1r.vhd | 79 - lib/misc/dpram_1w1r_dist.vhd | 84 - lib/misc/dpram_2w2r.vhd | 88 - lib/misc/flash_port_wb.vhd | 293 - lib/misc/gpio_wb.vhd | 309 - lib/misc/lcd_port.vhd | 69 - lib/misc/mult_signed.vhd | 62 - lib/misc/oneshot.vhd | 223 - lib/misc/pkg_template.vhd | 18 - lib/misc/ram_sim.vhd | 88 - lib/misc/ram_wb.vhd | 80 - lib/misc/rom_sim.vhd | 2082 ------- lib/misc/rom_wb.vhd | 61 - lib/misc/sim/ModelSim SE .lnk | Bin 1445 -> 0 bytes lib/misc/sim/tb_bbfifo.fdo | 14 - lib/misc/sim/tb_bbfifo.wdo | 31 - lib/misc/sim/tb_ram_wb.fdo | 16 - lib/misc/sim/tb_ram_wb.wdo | 32 - lib/misc/sim/tb_rom_wb.fdo | 16 - lib/misc/sim/tb_rom_wb.wdo | 29 - lib/misc/singleshot.vhd | 155 - lib/misc/tb_bbfifo.vhd | 136 - lib/misc/tb_ram_wb.vhd | 408 -- lib/misc/tb_rom_wb.vhd | 223 - lib/misc/tb_template.vhd | 63 - lib/misc/utils_pkg.vhd | 196 - lib/ps2_port/sim/tb_ps2_core.fdo | 13 - lib/ps2_port/sim/tb_ps2_core.wdo | 48 - lib/ps2_port/src/debounce.vhd | 89 - lib/ps2_port/src/ps2_core.vhd | 620 -- lib/ps2_port/src/ps2_phy_virtex.vhd | 122 - lib/ps2_port/src/ps2_wb.vhd | 143 - lib/ps2_port/src/tb_ps2_core.vhd | 280 - lib/radio/cordic/eval_cordic.m | 171 - lib/radio/cordic/sim/eval_cordic.m | 10 - lib/radio/cordic/sim/tb_cordic_pipe_top.fdo | 18 - lib/radio/cordic/sim/tb_cordic_pipe_top.wdo | 37 - lib/radio/cordic/sim/tb_cordic_top.fdo | 19 - lib/radio/cordic/sim/tb_cordic_top.wdo | 64 - lib/radio/cordic/sim/tb_results.m | 34 - lib/radio/cordic/src/cordic_pipe_post.vhd | 107 - lib/radio/cordic/src/cordic_pipe_pre.vhd | 137 - lib/radio/cordic/src/cordic_pipe_stage.vhd | 115 - lib/radio/cordic/src/cordic_pipe_top.vhd | 319 - lib/radio/cordic/src/cordic_pkg.vhd | 208 - lib/radio/cordic/src/cordic_rom.vhd | 84 - lib/radio/cordic/src/cordic_stage.vhd | 291 - lib/radio/cordic/src/cordic_stage_post.vhd | 279 - lib/radio/cordic/src/cordic_stage_pre.vhd | 320 - lib/radio/cordic/src/cordic_top.vhd | 466 -- lib/radio/cordic/src/tb_cordic_pipe_top.vhd | 653 -- lib/radio/cordic/src/tb_cordic_top.vhd | 649 -- lib/radio/ddc/sim/tb_ddc.fdo | 34 - lib/radio/ddc/sim/tb_ddc.wdo | 126 - lib/radio/ddc/sim/tb_results.m | 57 - lib/radio/ddc/src/ddc.vhd | 508 -- lib/radio/ddc/src/syn_ddc.vhd | 419 -- lib/radio/ddc/src/tb_ddc.vhd | 397 -- lib/radio/decimator/CIC/sim/tb_cic_c_pipe.fdo | 14 - lib/radio/decimator/CIC/sim/tb_cic_c_pipe.wdo | 26 - .../decimator/CIC/sim/tb_cic_decim_pipe.fdo | 17 - .../decimator/CIC/sim/tb_cic_decim_pipe.wdo | 39 - lib/radio/decimator/CIC/sim/tb_cic_i_pipe.fdo | 14 - lib/radio/decimator/CIC/sim/tb_cic_i_pipe.wdo | 30 - lib/radio/decimator/CIC/src/cic_c_pipe.vhd | 104 - .../decimator/CIC/src/cic_decim_pipe.vhd | 203 - lib/radio/decimator/CIC/src/cic_i_pipe.vhd | 81 - .../decimator/CIC/src/syn_cic_c_pipe.vhd | 98 - .../decimator/CIC/src/syn_cic_i_pipe.vhd | 92 - lib/radio/decimator/CIC/src/tb_cic_c_pipe.vhd | 136 - .../decimator/CIC/src/tb_cic_decim_pipe.vhd | 153 - lib/radio/decimator/CIC/src/tb_cic_i_pipe.vhd | 126 - lib/radio/mix/sim/tb_mix_cpx.fdo | 15 - lib/radio/mix/sim/tb_mix_cpx.wdo | 42 - lib/radio/mix/sim/tb_mix_real.fdo | 15 - lib/radio/mix/sim/tb_mix_real.wdo | 36 - lib/radio/mix/sim/tb_undc_real.fdo | 15 - lib/radio/mix/sim/tb_undc_real.wdo | 38 - lib/radio/mix/src/mix_cpx.vhd | 171 - lib/radio/mix/src/mix_real.vhd | 160 - lib/radio/mix/src/tb_mix_cpx.vhd | 211 - lib/radio/mix/src/tb_mix_real.vhd | 200 - lib/radio/mix/src/tb_undc_real.vhd | 161 - lib/radio/mix/src/undc_real.vhd | 143 - lib/radio/nco/sim/tb_mix_cordic.fdo | 19 - lib/radio/nco/sim/tb_mix_cordic.wdo | 42 - lib/radio/nco/sim/tb_mix_results.m | 90 - lib/radio/nco/sim/tb_nco_cordic.fdo | 19 - lib/radio/nco/sim/tb_nco_cordic.wdo | 32 - lib/radio/nco/sim/tb_nco_lut.fdo | 17 - lib/radio/nco/sim/tb_nco_lut.wdo | 46 - lib/radio/nco/sim/tb_nco_results.m | 61 - lib/radio/nco/src/mix_cordic.vhd | 177 - lib/radio/nco/src/nco.vhd.bak | 240 - lib/radio/nco/src/nco_lut.vhd | 229 - lib/radio/nco/src/nco_lut_dbg.vhd | 259 - lib/radio/nco/src/nco_pkg.vhd | 95 - lib/radio/nco/src/tb_mix_cordic.vhd | 331 -- lib/radio/nco/src/tb_nco_cordic.vhd | 265 - lib/radio/nco/src/tb_nco_lut.vhd | 303 - lib/radio/nco/src/wavelut.vhd | 245 - lib/radio/nco/src/waverom_dual.vhd | 92 - lib/uart/bbfifo_16x8.vhd | 281 - lib/uart/kcuart_rx.vhd | 352 -- lib/uart/kcuart_tx.vhd | 394 -- lib/uart/uart_rx.vhd | 146 - lib/uart/uart_tx.vhd | 153 - lib/uart/uart_wb.vhd | 214 - .../mips_sys/ise101/mips_sys/mips_sys.par | 201 - .../mips_sys/ise101/mips_sys/mips_sys.prj | 47 - .../mips_sys/ise101/mips_sys/mips_sys.syr | 5227 ----------------- .../mips_sys/ise101/mips_sys/mips_sys.twr | 1177 ---- projects/mips_sys/ise101/mips_sys/mips_sys.ut | 33 - .../mips_sys/ise101/mips_sys/mips_sys.xst | 62 - .../mips_sys/ise101/mips_sys/mips_sys_map.mrp | 1792 ------ .../ise101/mips_sys/mips_sys_vhdl.prj | 47 - .../ise101/mips_sys/ucf/systest.ssram.ucf | 503 -- .../mips_sys/ise101/mips_sys/ucf/systest.ucf | 629 -- projects/mips_sys/ise92/mips_sys/mips_sys.prj | 43 - .../mips_sys/ise92/mips_sys/mips_sys_vhdl.prj | 43 - .../mips_sys/ise92/mips_sys/ucf/systest.ucf | 469 -- projects/mips_sys/sim/tb_mips_sys.fdo | 115 - projects/mips_sys/sim/tb_mips_sys.wdo | 438 -- projects/mips_sys/src/.directory_history | 4 - projects/mips_sys/src/async_defs_sim.vhd | 70 - projects/mips_sys/src/bootloader.ROM.vhd | 2082 ------- projects/mips_sys/src/bootloader.ROM_ld.vhd | 2174 ------- projects/mips_sys/src/clockgen_virtex4.vhd | 363 -- projects/mips_sys/src/mips_sys.vhd | 1165 ---- projects/mips_sys/src/mips_sys_sim.vhd | 1045 ---- projects/mips_sys/src/ram_ld.vhd | 173 - projects/mips_sys/src/ram_sim.vhd | 88 - projects/mips_sys/src/sdram_config.vhd | 74 - projects/mips_sys/src/sdram_config_sim.vhd | 74 - projects/mips_sys/src/sys_types.vhd | 70 - projects/mips_sys/src/tb_mips_sys.vhd | 420 -- projects/mips_sys/tools/insrom.rb | 46 - projects/mips_sys/tools/irom.vhd.tpl | 29 - projects/mips_sys/tools/irom_ld.vhd.tpl | 147 - projects/mips_sys/tools/make | 50 - projects/mips_sys/tools/rom.tcl.tpl | 61 - projects/mips_sys/tools/src/flashgen.c | 117 - projects/mips_sys/tools/src/ramgen.c | 385 -- projects/mips_sys/tools/src/romgen.c | 368 -- 557 files changed, 151550 deletions(-) delete mode 100644 Common/sim/ModelSim SE .lnk delete mode 100644 Common/sim/compile_simprim.do delete mode 100644 Common/sim/compile_unisim.do delete mode 100644 Common/ucf/ml402.ucf delete mode 100644 lib/CPUs/JCpu/asm/dctest.jsm delete mode 100644 lib/CPUs/JCpu/asm/dctest.tcl delete mode 100644 lib/CPUs/JCpu/asm/itest.jsm delete mode 100644 lib/CPUs/JCpu/asm/itest.tcl delete mode 100644 lib/CPUs/JCpu/asm/make delete mode 100644 lib/CPUs/JCpu/asm/mul8x8.jsm delete mode 100644 lib/CPUs/JCpu/asm/mul8x8.tcl delete mode 100644 lib/CPUs/JCpu/asm/reti_issue.jsm delete mode 100644 lib/CPUs/JCpu/asm/reti_issue.tcl delete mode 100644 lib/CPUs/JCpu/doc/block_diagram.png delete mode 100644 lib/CPUs/JCpu/doc/memory_map.png delete mode 100644 lib/CPUs/JCpu/gpl-3.0.txt delete mode 100644 lib/CPUs/JCpu/sim/ModelSim SE .lnk delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu.fdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu.wdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu_embedded.fdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu_embedded.wdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu_itest.fdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu_itest.wdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu_reti_issue.fdo delete mode 100644 lib/CPUs/JCpu/sim/tb_cpu_reti_issue.wdo delete mode 100644 lib/CPUs/JCpu/sim/tb_mul8x8.fdo delete mode 100644 lib/CPUs/JCpu/sim/tb_mul8x8.wdo delete mode 100644 lib/CPUs/JCpu/src/core/alu.vhd delete mode 100644 lib/CPUs/JCpu/src/core/chipram.vhd delete mode 100644 lib/CPUs/JCpu/src/core/chipreg.vhd delete mode 100644 lib/CPUs/JCpu/src/core/cpu.vhd delete mode 100644 lib/CPUs/JCpu/src/core/cpu_pkg.vhd delete mode 100644 lib/CPUs/JCpu/src/core/dpath_ctrl.vhd delete mode 100644 lib/CPUs/JCpu/src/core/int_ctrl.vhd delete mode 100644 lib/CPUs/JCpu/src/core/pc.vhd delete mode 100644 lib/CPUs/JCpu/src/core/reg_dual.vhd delete mode 100644 lib/CPUs/JCpu/src/core/stack_ctrl.vhd delete mode 100644 lib/CPUs/JCpu/src/cpu_embedded.vhd delete mode 100644 lib/CPUs/JCpu/src/dctest_irom.vhdl delete mode 100644 lib/CPUs/JCpu/src/dctest_irom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/dctest_xrom.vhdl delete mode 100644 lib/CPUs/JCpu/src/dctest_xrom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/itest_irom.vhdl delete mode 100644 lib/CPUs/JCpu/src/itest_irom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/itest_xrom.vhdl delete mode 100644 lib/CPUs/JCpu/src/itest_xrom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/mul8x8_irom.vhdl delete mode 100644 lib/CPUs/JCpu/src/mul8x8_irom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/mul8x8_xrom.vhdl delete mode 100644 lib/CPUs/JCpu/src/mul8x8_xrom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/reti_issue_irom.vhdl delete mode 100644 lib/CPUs/JCpu/src/reti_issue_irom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/reti_issue_xrom.vhdl delete mode 100644 lib/CPUs/JCpu/src/reti_issue_xrom_ld.vhdl delete mode 100644 lib/CPUs/JCpu/src/tb_cpu_embedded.vhd delete mode 100644 lib/CPUs/JCpu/src/tb_cpu_itest.vhd delete mode 100644 lib/CPUs/JCpu/syn/ise91/cpu_vhdl.prj delete mode 100644 lib/CPUs/JCpu/tools/eval_scan.rb delete mode 100644 lib/CPUs/JCpu/tools/insrom.rb delete mode 100644 lib/CPUs/JCpu/tools/irom.vhd.tpl delete mode 100644 lib/CPUs/JCpu/tools/irom_ld.vhd.tpl delete mode 100644 lib/CPUs/JCpu/tools/jasm.bak.rb delete mode 100644 lib/CPUs/JCpu/tools/jasm.rb delete mode 100644 lib/CPUs/JCpu/tools/lib/cg.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/lib/cregs.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/lib/delays.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/lib/lcd.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/lib/mul8x8.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/lib/uart.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/lib/utils.inc.jsm delete mode 100644 lib/CPUs/JCpu/tools/opc.list delete mode 100644 lib/CPUs/JCpu/tools/regx.rb delete mode 100644 lib/CPUs/JCpu/tools/rom.tcl.tpl delete mode 100644 lib/CPUs/JCpu/tools/templates.rb delete mode 100644 lib/CPUs/JCpu/tools/xrom.vhd.tpl delete mode 100644 lib/CPUs/JCpu/tools/xrom_ld.vhd.tpl delete mode 100644 lib/CPUs/MIPS/bsp/examples/.directory_history delete mode 100644 lib/CPUs/MIPS/bsp/examples/Bessel.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/Makefile delete mode 100644 lib/CPUs/MIPS/bsp/examples/aes256.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/aes256.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/aes256_1.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/barcode.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/barcode.new.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/basicmath_small.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/bogomips.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/Makefile delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.ld delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/bootloader_with_flash.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/init_boot.S delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/jtag_upd.bat delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/kernel_boot.S delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/bootloader/startup_boot.S delete mode 100644 lib/CPUs/MIPS/bsp/examples/cfiflash.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/cfiflash.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/crc32.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/crc32.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/cubic.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/dbg.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/delay_mips.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/demo.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/dhry.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/dhry_1.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/dhry_2.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/dttl.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/gunzip.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/hashtest.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/hello.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/hpi.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/hpi.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/inflate.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/inflate.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/irq.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/irq.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/isqrt.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/kernel.S delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys/.directory_history delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys/Makefile delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/libsys/syscalls.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/life.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/link/link.ld delete mode 100644 lib/CPUs/MIPS/bsp/examples/lua_init.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/lwl.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/mandelbrot.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/mips_gfx.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/mips_gfx.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/mipsdis.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/mipsdis.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/paranoia.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/phrasen.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/pi.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/queens.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/r3.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/rad2deg.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/random.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/random.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/regdef.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/richards_benchmark.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/rmd160.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/rmd160.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/rmd160_test.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/round.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/serdump.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/snipmath.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/sniptype.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/specs/specs delete mode 100644 lib/CPUs/MIPS/bsp/examples/stanford.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/startup.S delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_ac97.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_dcache.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_endianess.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_exception.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_flash.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_hpi.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_irq.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_mipsdis.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_timer.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/test_vga.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/testbench.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/testlibusb.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/ucb.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/whet.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/xcpt.c delete mode 100644 lib/CPUs/MIPS/bsp/examples/xcpt.h delete mode 100644 lib/CPUs/MIPS/bsp/examples/xcpt_asm.h delete mode 100644 lib/CPUs/MIPS/dist/files.dist delete mode 100644 lib/CPUs/MIPS/dist/mdist delete mode 100644 lib/CPUs/MIPS/dist/tmpl/gpl-3.0.txt delete mode 100644 lib/CPUs/MIPS/dist/tmpl/hello.flash.bin delete mode 100644 lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd delete mode 100644 lib/CPUs/MIPS/dist/tmpl/notes.txt delete mode 100644 lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.vhd delete mode 100644 lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.wdo delete mode 100644 lib/CPUs/MIPS/doc/J-MIPS.txt delete mode 100644 lib/CPUs/MIPS/doc/async_port_timing.pdf delete mode 100644 lib/CPUs/MIPS/doc/memory_map.pdf delete mode 100644 lib/CPUs/MIPS/doc/memory_map.vsd delete mode 100644 lib/CPUs/MIPS/doc/mips_biu.pdf delete mode 100644 lib/CPUs/MIPS/doc/mips_drawings.vsd delete mode 100644 lib/CPUs/MIPS/doc/mips_jbus_timing.pdf delete mode 100644 lib/CPUs/MIPS/doc/mips_pipeline.pdf delete mode 100644 lib/CPUs/MIPS/doc/mips_pipeline_stages.pdf delete mode 100644 lib/CPUs/MIPS/doc/mips_sys.vsd delete mode 100644 lib/CPUs/MIPS/doc/mips_sys_ml402.pdf delete mode 100644 lib/CPUs/MIPS/doc/toolchain/howto_build.txt delete mode 100644 lib/CPUs/MIPS/doc/toolchain/make.sh delete mode 100644 lib/CPUs/MIPS/doc/toolchain/newlib-1.16.0-jens.patch delete mode 100644 lib/CPUs/MIPS/doc/toolchain/newlib-1.17.0-jens.patch delete mode 100644 lib/CPUs/MIPS/sim/ModelSim SE .lnk delete mode 100644 lib/CPUs/MIPS/sim/tb_mips_muldiv.fdo delete mode 100644 lib/CPUs/MIPS/sim/tb_mips_muldiv.wdo delete mode 100644 lib/CPUs/MIPS/sim/tb_mips_top.fdo delete mode 100644 lib/CPUs/MIPS/sim/tb_mips_top.wdo delete mode 100644 lib/CPUs/MIPS/sim/tb_mips_top_syn.fdo delete mode 100644 lib/CPUs/MIPS/sim/tb_mips_top_syn.wdo delete mode 100644 lib/CPUs/MIPS/src/async_defs.vhd delete mode 100644 lib/CPUs/MIPS/src/bootloader.ROM.vhd delete mode 100644 lib/CPUs/MIPS/src/core/.directory_history delete mode 100644 lib/CPUs/MIPS/src/core/dcache.vhd delete mode 100644 lib/CPUs/MIPS/src/core/icache.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_alu.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_bcu.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_bui.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_cop.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_instr.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_muldiv.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_pipeline.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_reg.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_shifter.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_top.vhd delete mode 100644 lib/CPUs/MIPS/src/core/mips_types.vhd delete mode 100644 lib/CPUs/MIPS/src/mips_top_syn.vhd delete mode 100644 lib/CPUs/MIPS/src/tb_mips_muldiv.vhd delete mode 100644 lib/CPUs/MIPS/src/tb_mips_top.vhd delete mode 100644 lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf delete mode 100644 lib/CPUs/MIPS/syn/ise101/mips_top.prj delete mode 100644 lib/CPUs/MIPS/syn/ise101/mips_top_vhdl.prj delete mode 100644 lib/CPUs/MIPS/todo.txt delete mode 100644 lib/CPUs/MIPS/tools/Makefile delete mode 100644 lib/CPUs/MIPS/tools/src/flashgen.c delete mode 100644 lib/CPUs/MIPS/tools/src/ramgen.c delete mode 100644 lib/CPUs/MIPS/tools/src/romgen.c delete mode 100644 lib/FIFO/sim/tb_gray_counter.fdo delete mode 100644 lib/FIFO/sim/tb_gray_counter.wdo delete mode 100644 lib/FIFO/src/.directory_history delete mode 100644 lib/FIFO/src/async_fifo_ctrl.vhd delete mode 100644 lib/FIFO/src/dpram_1w1r.vhd delete mode 100644 lib/FIFO/src/fifo_async.vhd delete mode 100644 lib/FIFO/src/fifo_ctrl_pkg.vhd delete mode 100644 lib/FIFO/src/fifo_sync.vhd delete mode 100644 lib/FIFO/src/fifo_sync_dist.vhd delete mode 100644 lib/FIFO/src/gray_counter.vhd delete mode 100644 lib/FIFO/src/sync_fifo_ctrl.vhd delete mode 100644 lib/FIFO/src/tb_fifo_async.vhd delete mode 100644 lib/FIFO/src/tb_fifo_sync.vhd delete mode 100644 lib/FIFO/src/tb_gray_counter.vhd delete mode 100644 lib/PCK_FIO-1.16/PCK_FIO.html delete mode 100644 lib/PCK_FIO-1.16/PCK_FIO.out.gold delete mode 100644 lib/PCK_FIO-1.16/PCK_FIO.vhd delete mode 100644 lib/PCK_FIO-1.16/README delete mode 100644 lib/PCK_FIO-1.16/TB_PCK_FIO.vhd delete mode 100644 lib/PCK_FIO-2002.7/CHANGES delete mode 100644 lib/PCK_FIO-2002.7/PCK_FIO.html delete mode 100644 lib/PCK_FIO-2002.7/PCK_FIO.out.gold delete mode 100644 lib/PCK_FIO-2002.7/PCK_FIO_1987.vhd delete mode 100644 lib/PCK_FIO-2002.7/PCK_FIO_1987_BODY.vhd delete mode 100644 lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd delete mode 100644 lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd delete mode 100644 lib/PCK_FIO-2002.7/README delete mode 100644 lib/PCK_FIO-2002.7/TB_PCK_FIO_1987.vhd delete mode 100644 lib/PCK_FIO-2002.7/TB_PCK_FIO_1993.vhd delete mode 100644 lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1987 delete mode 100644 lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1993 delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/doc/SDRAM_CTRL.vsd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/ise9/sdram_ctrl_top_vhdl.prj delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_r_rand_w.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_r_rand_w.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_w_rand_r.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_w_rand_r.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_addr.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_addr.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdram_ctrl_frontend.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/sim/tb_sdram_ctrl_frontend.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/clockgen_virtex4.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/sdram_config.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_r_rand_w.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_w_rand_r.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_addr.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_4/src/tb_sdram_ctrl_frontend.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/doc/SDRAM_CTRL.vsd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/sim/ModelSim SE .lnk delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd delete mode 100644 lib/SDRAM/ddr_sdr_v1_5/todo.txt delete mode 100644 lib/SSRAM/sim/ModelSim SE .lnk delete mode 100644 lib/SSRAM/sim/tb_ssram_frontend_wb.fdo delete mode 100644 lib/SSRAM/sim/tb_ssram_frontend_wb.wdo delete mode 100644 lib/SSRAM/src/CY7C1354B.vhd delete mode 100644 lib/SSRAM/src/package_utility.vhd delete mode 100644 lib/SSRAM/src/ssram_frontend_wb.vhd delete mode 100644 lib/SSRAM/src/tb_ssram_frontend_wb.vhd delete mode 100644 lib/VGA_ctrl/sim/ModelSim SE .lnk delete mode 100644 lib/VGA_ctrl/sim/tb_vga_frontend.fdo delete mode 100644 lib/VGA_ctrl/sim/tb_vga_frontend.wdo delete mode 100644 lib/VGA_ctrl/sim/tb_vga_frontend64.fdo delete mode 100644 lib/VGA_ctrl/sim/tb_vga_frontend64.wdo delete mode 100644 lib/VGA_ctrl/src/char_gen.vhd delete mode 100644 lib/VGA_ctrl/src/clkgen_virtex4.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/Fixedsys_8x15.bff delete mode 100644 lib/VGA_ctrl/src/fonts/Fixedsys_8x16.bff delete mode 100644 lib/VGA_ctrl/src/fonts/Fixedsys_9x16.bff delete mode 100644 lib/VGA_ctrl/src/fonts/System_16x16.bff delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_c64.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_data.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_datasoft.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_demo_maker_m.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x15.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_fixedsys_9x16.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_system_16x16.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/char_rom_the_goonies.vhd delete mode 100644 lib/VGA_ctrl/src/fonts/make_rom.bat delete mode 100644 lib/VGA_ctrl/src/tb_vga_frontend.vhd delete mode 100644 lib/VGA_ctrl/src/tb_vga_frontend64.vhd delete mode 100644 lib/VGA_ctrl/src/vga_backend.vhd delete mode 100644 lib/VGA_ctrl/src/vga_frontend.vhd delete mode 100644 lib/VGA_ctrl/src/vga_frontend64.vhd delete mode 100644 lib/VGA_ctrl/src/vga_sync.vhd delete mode 100644 lib/VGA_ctrl/src/vga_timing.vhd delete mode 100644 lib/VGA_ctrl/src/vga_types.vhd delete mode 100644 lib/VGA_ctrl/todo.txt delete mode 100644 lib/ac97_ctrl/sim/tb_ac97_wb.fdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac97_wb.wdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac_in.fdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac_in.wdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac_io.fdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac_io.wdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac_out.fdo delete mode 100644 lib/ac97_ctrl/sim/tb_ac_out.wdo delete mode 100644 lib/ac97_ctrl/src/core/ac97_wb.vhd delete mode 100644 lib/ac97_ctrl/src/core/ac_in.vhd delete mode 100644 lib/ac97_ctrl/src/core/ac_io.vhd delete mode 100644 lib/ac97_ctrl/src/core/ac_out.vhd delete mode 100644 lib/ac97_ctrl/src/tb_ac97_wb.vhd delete mode 100644 lib/ac97_ctrl/src/tb_ac_in.vhd delete mode 100644 lib/ac97_ctrl/src/tb_ac_io.vhd delete mode 100644 lib/ac97_ctrl/src/tb_ac_out.vhd delete mode 100644 lib/filter/sim/eval_lowpass.m delete mode 100644 lib/filter/sim/lowpass.m delete mode 100644 lib/filter/sim/tb_fir_iterative.fdo delete mode 100644 lib/filter/sim/tb_fir_iterative.wdo delete mode 100644 lib/filter/sim/tb_fir_parallel delete mode 100644 lib/filter/sim/tb_fir_parallel.fdo delete mode 100644 lib/filter/sim/tb_fir_parallel.wdo delete mode 100644 lib/filter/sim/tb_fir_results.m delete mode 100644 lib/filter/sim/tb_fir_semi_parallel.fdo delete mode 100644 lib/filter/sim/tb_fir_semi_parallel.wdo delete mode 100644 lib/filter/sim/tb_fir_stage.fdo delete mode 100644 lib/filter/sim/tb_fir_stage.wdo delete mode 100644 lib/filter/sim/tb_fir_stage_sys.fdo delete mode 100644 lib/filter/sim/tb_fir_stage_sys.wdo delete mode 100644 lib/filter/src/delay_line.vhd delete mode 100644 lib/filter/src/filter_pkg.vhd delete mode 100644 lib/filter/src/fir_iterative.vhd delete mode 100644 lib/filter/src/fir_iterative_pkg.vhd delete mode 100644 lib/filter/src/fir_parallel.vhd delete mode 100644 lib/filter/src/fir_parallel_pkg.vhd delete mode 100644 lib/filter/src/fir_pkg.vhd delete mode 100644 lib/filter/src/fir_semi_parallel.vhd delete mode 100644 lib/filter/src/fir_stage.vhd delete mode 100644 lib/filter/src/fir_stage_pkg.vhd delete mode 100644 lib/filter/src/fir_stage_sys.vhd delete mode 100644 lib/filter/src/tb_fir_iterative.vhd delete mode 100644 lib/filter/src/tb_fir_parallel.vhd delete mode 100644 lib/filter/src/tb_fir_semi_parallel.vhd delete mode 100644 lib/filter/src/tb_fir_stage.vhd delete mode 100644 lib/filter/src/tb_fir_stage_sys.vhd delete mode 100644 lib/fix_std/fix_std.vhd delete mode 100644 lib/fix_std/fix_stdb.vhd delete mode 100644 lib/fixed/fixed_util_pkg.vhd delete mode 100644 lib/fixed_ja/fixed_ja.vhd delete mode 100644 lib/fixed_ja/fixed_ja_body.vhd delete mode 100644 lib/jasm/cg.inc.jsm delete mode 100644 lib/jasm/cregs.inc.jsm delete mode 100644 lib/jasm/delays.inc.jsm delete mode 100644 lib/jasm/lcd.inc.jsm delete mode 100644 lib/jasm/mul8x8.inc.jsm delete mode 100644 lib/jasm/uart.inc.jsm delete mode 100644 lib/jasm/utils.inc.jsm delete mode 100644 lib/misc/async_port_wb.vhd delete mode 100644 lib/misc/async_types.vhd delete mode 100644 lib/misc/bbfifo.vhd delete mode 100644 lib/misc/clockgen_virtex4.vhd delete mode 100644 lib/misc/debounce.vhd delete mode 100644 lib/misc/debounce2.vhd delete mode 100644 lib/misc/dpram_1w1r.vhd delete mode 100644 lib/misc/dpram_1w1r_dist.vhd delete mode 100644 lib/misc/dpram_2w2r.vhd delete mode 100644 lib/misc/flash_port_wb.vhd delete mode 100644 lib/misc/gpio_wb.vhd delete mode 100644 lib/misc/lcd_port.vhd delete mode 100644 lib/misc/mult_signed.vhd delete mode 100644 lib/misc/oneshot.vhd delete mode 100644 lib/misc/pkg_template.vhd delete mode 100644 lib/misc/ram_sim.vhd delete mode 100644 lib/misc/ram_wb.vhd delete mode 100644 lib/misc/rom_sim.vhd delete mode 100644 lib/misc/rom_wb.vhd delete mode 100644 lib/misc/sim/ModelSim SE .lnk delete mode 100644 lib/misc/sim/tb_bbfifo.fdo delete mode 100644 lib/misc/sim/tb_bbfifo.wdo delete mode 100644 lib/misc/sim/tb_ram_wb.fdo delete mode 100644 lib/misc/sim/tb_ram_wb.wdo delete mode 100644 lib/misc/sim/tb_rom_wb.fdo delete mode 100644 lib/misc/sim/tb_rom_wb.wdo delete mode 100644 lib/misc/singleshot.vhd delete mode 100644 lib/misc/tb_bbfifo.vhd delete mode 100644 lib/misc/tb_ram_wb.vhd delete mode 100644 lib/misc/tb_rom_wb.vhd delete mode 100644 lib/misc/tb_template.vhd delete mode 100644 lib/misc/utils_pkg.vhd delete mode 100644 lib/ps2_port/sim/tb_ps2_core.fdo delete mode 100644 lib/ps2_port/sim/tb_ps2_core.wdo delete mode 100644 lib/ps2_port/src/debounce.vhd delete mode 100644 lib/ps2_port/src/ps2_core.vhd delete mode 100644 lib/ps2_port/src/ps2_phy_virtex.vhd delete mode 100644 lib/ps2_port/src/ps2_wb.vhd delete mode 100644 lib/ps2_port/src/tb_ps2_core.vhd delete mode 100644 lib/radio/cordic/eval_cordic.m delete mode 100644 lib/radio/cordic/sim/eval_cordic.m delete mode 100644 lib/radio/cordic/sim/tb_cordic_pipe_top.fdo delete mode 100644 lib/radio/cordic/sim/tb_cordic_pipe_top.wdo delete mode 100644 lib/radio/cordic/sim/tb_cordic_top.fdo delete mode 100644 lib/radio/cordic/sim/tb_cordic_top.wdo delete mode 100644 lib/radio/cordic/sim/tb_results.m delete mode 100644 lib/radio/cordic/src/cordic_pipe_post.vhd delete mode 100644 lib/radio/cordic/src/cordic_pipe_pre.vhd delete mode 100644 lib/radio/cordic/src/cordic_pipe_stage.vhd delete mode 100644 lib/radio/cordic/src/cordic_pipe_top.vhd delete mode 100644 lib/radio/cordic/src/cordic_pkg.vhd delete mode 100644 lib/radio/cordic/src/cordic_rom.vhd delete mode 100644 lib/radio/cordic/src/cordic_stage.vhd delete mode 100644 lib/radio/cordic/src/cordic_stage_post.vhd delete mode 100644 lib/radio/cordic/src/cordic_stage_pre.vhd delete mode 100644 lib/radio/cordic/src/cordic_top.vhd delete mode 100644 lib/radio/cordic/src/tb_cordic_pipe_top.vhd delete mode 100644 lib/radio/cordic/src/tb_cordic_top.vhd delete mode 100644 lib/radio/ddc/sim/tb_ddc.fdo delete mode 100644 lib/radio/ddc/sim/tb_ddc.wdo delete mode 100644 lib/radio/ddc/sim/tb_results.m delete mode 100644 lib/radio/ddc/src/ddc.vhd delete mode 100644 lib/radio/ddc/src/syn_ddc.vhd delete mode 100644 lib/radio/ddc/src/tb_ddc.vhd delete mode 100644 lib/radio/decimator/CIC/sim/tb_cic_c_pipe.fdo delete mode 100644 lib/radio/decimator/CIC/sim/tb_cic_c_pipe.wdo delete mode 100644 lib/radio/decimator/CIC/sim/tb_cic_decim_pipe.fdo delete mode 100644 lib/radio/decimator/CIC/sim/tb_cic_decim_pipe.wdo delete mode 100644 lib/radio/decimator/CIC/sim/tb_cic_i_pipe.fdo delete mode 100644 lib/radio/decimator/CIC/sim/tb_cic_i_pipe.wdo delete mode 100644 lib/radio/decimator/CIC/src/cic_c_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/cic_decim_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/cic_i_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/syn_cic_c_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/syn_cic_i_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/tb_cic_c_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/tb_cic_decim_pipe.vhd delete mode 100644 lib/radio/decimator/CIC/src/tb_cic_i_pipe.vhd delete mode 100644 lib/radio/mix/sim/tb_mix_cpx.fdo delete mode 100644 lib/radio/mix/sim/tb_mix_cpx.wdo delete mode 100644 lib/radio/mix/sim/tb_mix_real.fdo delete mode 100644 lib/radio/mix/sim/tb_mix_real.wdo delete mode 100644 lib/radio/mix/sim/tb_undc_real.fdo delete mode 100644 lib/radio/mix/sim/tb_undc_real.wdo delete mode 100644 lib/radio/mix/src/mix_cpx.vhd delete mode 100644 lib/radio/mix/src/mix_real.vhd delete mode 100644 lib/radio/mix/src/tb_mix_cpx.vhd delete mode 100644 lib/radio/mix/src/tb_mix_real.vhd delete mode 100644 lib/radio/mix/src/tb_undc_real.vhd delete mode 100644 lib/radio/mix/src/undc_real.vhd delete mode 100644 lib/radio/nco/sim/tb_mix_cordic.fdo delete mode 100644 lib/radio/nco/sim/tb_mix_cordic.wdo delete mode 100644 lib/radio/nco/sim/tb_mix_results.m delete mode 100644 lib/radio/nco/sim/tb_nco_cordic.fdo delete mode 100644 lib/radio/nco/sim/tb_nco_cordic.wdo delete mode 100644 lib/radio/nco/sim/tb_nco_lut.fdo delete mode 100644 lib/radio/nco/sim/tb_nco_lut.wdo delete mode 100644 lib/radio/nco/sim/tb_nco_results.m delete mode 100644 lib/radio/nco/src/mix_cordic.vhd delete mode 100644 lib/radio/nco/src/nco.vhd.bak delete mode 100644 lib/radio/nco/src/nco_lut.vhd delete mode 100644 lib/radio/nco/src/nco_lut_dbg.vhd delete mode 100644 lib/radio/nco/src/nco_pkg.vhd delete mode 100644 lib/radio/nco/src/tb_mix_cordic.vhd delete mode 100644 lib/radio/nco/src/tb_nco_cordic.vhd delete mode 100644 lib/radio/nco/src/tb_nco_lut.vhd delete mode 100644 lib/radio/nco/src/wavelut.vhd delete mode 100644 lib/radio/nco/src/waverom_dual.vhd delete mode 100644 lib/uart/bbfifo_16x8.vhd delete mode 100644 lib/uart/kcuart_rx.vhd delete mode 100644 lib/uart/kcuart_tx.vhd delete mode 100644 lib/uart/uart_rx.vhd delete mode 100644 lib/uart/uart_tx.vhd delete mode 100644 lib/uart/uart_wb.vhd delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys.par delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys.prj delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys.syr delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys.twr delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys.ut delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys.xst delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys_map.mrp delete mode 100644 projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj delete mode 100644 projects/mips_sys/ise101/mips_sys/ucf/systest.ssram.ucf delete mode 100644 projects/mips_sys/ise101/mips_sys/ucf/systest.ucf delete mode 100644 projects/mips_sys/ise92/mips_sys/mips_sys.prj delete mode 100644 projects/mips_sys/ise92/mips_sys/mips_sys_vhdl.prj delete mode 100644 projects/mips_sys/ise92/mips_sys/ucf/systest.ucf delete mode 100644 projects/mips_sys/sim/tb_mips_sys.fdo delete mode 100644 projects/mips_sys/sim/tb_mips_sys.wdo delete mode 100644 projects/mips_sys/src/.directory_history delete mode 100644 projects/mips_sys/src/async_defs_sim.vhd delete mode 100644 projects/mips_sys/src/bootloader.ROM.vhd delete mode 100644 projects/mips_sys/src/bootloader.ROM_ld.vhd delete mode 100644 projects/mips_sys/src/clockgen_virtex4.vhd delete mode 100644 projects/mips_sys/src/mips_sys.vhd delete mode 100644 projects/mips_sys/src/mips_sys_sim.vhd delete mode 100644 projects/mips_sys/src/ram_ld.vhd delete mode 100644 projects/mips_sys/src/ram_sim.vhd delete mode 100644 projects/mips_sys/src/sdram_config.vhd delete mode 100644 projects/mips_sys/src/sdram_config_sim.vhd delete mode 100644 projects/mips_sys/src/sys_types.vhd delete mode 100644 projects/mips_sys/src/tb_mips_sys.vhd delete mode 100644 projects/mips_sys/tools/insrom.rb delete mode 100644 projects/mips_sys/tools/irom.vhd.tpl delete mode 100644 projects/mips_sys/tools/irom_ld.vhd.tpl delete mode 100644 projects/mips_sys/tools/make delete mode 100644 projects/mips_sys/tools/rom.tcl.tpl delete mode 100644 projects/mips_sys/tools/src/flashgen.c delete mode 100644 projects/mips_sys/tools/src/ramgen.c delete mode 100644 projects/mips_sys/tools/src/romgen.c diff --git a/Common/sim/ModelSim SE .lnk b/Common/sim/ModelSim SE .lnk deleted file mode 100644 index ecadd026618ef9dc683b411377dc4b08753d4bac..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1441 zcmds1YeLW4jesvk-rQE8%Gq#se#^M0FO7rOlES7)5}ocCOwbKdj4@5%sZ z^f6q4ab-pEd2S8V1WLPnP_2OAk%^^D$bIM6NV1~WHJxXqfAH+Bsn{IzXATB z$J-S0`Ayz-wrEzfKQa5%4bg>P?IJ`RKkIwZuAC=@UJqGFFi)>{w<|N-tR9#SL%uS)2~vs1s~4IHuCrVjM6TWrqw5bv0g^8FI3{j(DW&{seZ@jNdb}{w~N#q<% zDF`1T8fVd89Yt+C((G&Xwx~4@S9HH=+`74RU^Yho=;+l;ZMBc@B&N?KoP2=wL!R#U QfAfo1y^8qTD1%YdufjzO<^TWy diff --git a/Common/sim/compile_simprim.do b/Common/sim/compile_simprim.do deleted file mode 100644 index 0d97d06..0000000 --- a/Common/sim/compile_simprim.do +++ /dev/null @@ -1,8 +0,0 @@ -vlib simprim - -set XILINX C:/Programme/Xilinx101/ISE - -vcom -93 -work simprim $XILINX/vhdl/src/simprims/simprim_Vcomponents_mti.vhd -vcom -93 -work simprim $XILINX/vhdl/src/simprims/simprim_Vpackage_mti.vhd -vcom -93 -work simprim $XILINX/vhdl/src/simprims/simprim_SMODEL_mti.vhd -vcom -93 -work simprim $XILINX/vhdl/src/simprims/simprim_VITAL_mti.vhd diff --git a/Common/sim/compile_unisim.do b/Common/sim/compile_unisim.do deleted file mode 100644 index 6e91db1..0000000 --- a/Common/sim/compile_unisim.do +++ /dev/null @@ -1,8 +0,0 @@ -vlib unisim - -set XILINX C:/Programme/Xilinx101/ISE - -vcom -93 -work unisim $XILINX/vhdl/src/unisims/unisim_vpkg.vhd -vcom -93 -work unisim $XILINX/vhdl/src/unisims/unisim_vcomp.vhd -vcom -93 -work unisim $XILINX/vhdl/src/unisims/unisim_smodel.vhd -vcom -93 -work unisim $XILINX/vhdl/src/unisims/unisim_vital.vhd diff --git a/Common/ucf/ml402.ucf b/Common/ucf/ml402.ucf deleted file mode 100644 index 318e778..0000000 --- a/Common/ucf/ml402.ucf +++ /dev/null @@ -1,675 +0,0 @@ -# -# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" -# SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR -# XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION -# AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION -# OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS -# IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, -# AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE -# FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY -# WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE -# IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR -# REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF -# INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE. -# -# (c) Copyright 2005 Xilinx, Inc. -# All rights reserved. -# - -# Bus clock nets -NET "sys_clk" TNM_NET = "sys_clk"; -NET "tft_clk" TNM_NET = "tft_clk"; -NET sys_clk_in TNM_NET = "sys_clk_in"; -TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in" 9.9 ns HIGH 50 %; - -NET sys_clk_in LOC = AE14; -NET sys_clk_in IOSTANDARD = LVCMOS33; -NET sys_rst_in LOC = D6; -NET sys_rst_in PULLUP; -NET sys_rst_in TIG; - -NET uart_RX LOC = W2; -NET uart_RX IOSTANDARD = LVCMOS33; -NET uart_RX TIG; -NET uart_TX LOC = W1; -NET uart_TX IOSTANDARD = LVCMOS33; -NET uart_TX TIG; - -NET ext_irq TIG; - -# Reset timing ignore - treat as async paths -NET sys_rst TIG; -NET opb_v20_0_OPB_Rst TIG; -NET lmb_v10_1_OPB_Rst TIG; -NET lmb_v10_0_OPB_Rst TIG; -NET opb_v20_0_Debug_SYS_Rst TIG; -NET Debug_Rst TIG; -NET plb_v34_0_PLB_Rst TIG; -NET dcm_locked TIG; - -# Locate DCM/BUFG - Tools can probably figure them out automatically -# but just LOC them down to be safe -INST dcm_0/dcm_0/DCM_ADV_INST LOC = DCM_ADV_X0Y2; -INST dcm_1/dcm_1/DCM_ADV_INST LOC = DCM_ADV_X0Y4; -INST dcm_2/dcm_2/DCM_ADV_INST LOC = DCM_ADV_X0Y1; - -INST dcm_0/dcm_0/CLK0_BUFG_INST LOC = BUFGCTRL_X0Y0; -INST dcm_0/dcm_0/CLK90_BUFG_INST LOC = BUFGCTRL_X0Y1; -INST dcm_0/dcm_0/CLKDV_BUFG_INST LOC = BUFGCTRL_X0Y2; - -INST dcm_1/dcm_1/CLK0_BUFG_INST LOC = BUFGCTRL_X0Y31; -INST dcm_1/dcm_1/CLK90_BUFG_INST LOC = BUFGCTRL_X0Y30; - -//////////////////////////////////////////////////////////////////////////// -// Buttons, LEDs, and DIP Switches -//////////////////////////////////////////////////////////////////////////// - -# GPLED 0-3 -NET gpio<0> LOC = G5; #GPLED0 -NET gpio<1> LOC = G6; #GPLED1 -NET gpio<2> LOC = A11; #GPLED2 -NET gpio<3> LOC = A12; #GPLED3 -# North-East-South-West-Center LEDs -NET gpio<4> LOC = C6; # C LED -NET gpio<5> LOC = F9; # W LED -NET gpio<6> LOC = A5; # S LED -NET gpio<7> LOC = E10; # E LED -NET gpio<8> LOC = E2; # N LED -# North-East-South-West-Center Buttons -NET gpio<9> LOC = B6; # C Button -NET gpio<10> LOC = E9; # W Button -NET gpio<11> LOC = A6; # S Button -NET gpio<12> LOC = F10; # E Button -NET gpio<13> LOC = E7; # N Button -# Dip Switches 1-8 -NET gpio<14> LOC = U24; # DIP SW 8 -NET gpio<15> LOC = U25; # DIP SW 7 -NET gpio<16> LOC = V23; # DIP SW 6 -NET gpio<17> LOC = U23; # DIP SW 5 -NET gpio<18> LOC = U26; # DIP SW 4 -NET gpio<19> LOC = T26; # DIP SW 3 -NET gpio<20> LOC = R19; # DIP SW 2 -NET gpio<21> LOC = R20; # DIP SW 1 -NET gpio<14> IOSTANDARD = LVCMOS33; -NET gpio<15> IOSTANDARD = LVCMOS33; -NET gpio<16> IOSTANDARD = LVCMOS33; -NET gpio<17> IOSTANDARD = LVCMOS33; -NET gpio<18> IOSTANDARD = LVCMOS33; -NET gpio<19> IOSTANDARD = LVCMOS33; -NET gpio<20> IOSTANDARD = LVCMOS33; -NET gpio<21> IOSTANDARD = LVCMOS33; -#SMA Connectors -NET gpio<22> LOC = C12; # SMA_IN_N -NET gpio<23> LOC = C13; # SMA_IN_P -NET gpio<24> LOC = D7; # SMA_OUT_N -NET gpio<25> LOC = D8; # SMA_OUT_P -NET gpio<26> LOC = AD12;# USERCLK -NET gpio<26> IOSTANDARD = LVCMOS33; - -NET "gpio<*>" PULLDOWN; -NET "gpio<*>" TIG; -NET "gpio<*>" SLEW = SLOW; -NET "gpio<*>" DRIVE = 2; - -NET "gpio<22>" SLEW = FAST; -NET "gpio<22>" DRIVE = 12; -NET "gpio<23>" SLEW = FAST; -NET "gpio<23>" DRIVE = 12; -NET "gpio<24>" SLEW = FAST; -NET "gpio<24>" DRIVE = 12; -NET "gpio<25>" SLEW = FAST; -NET "gpio<25>" DRIVE = 12; - -NET "gpio2_d_out<*>" TIG; -NET "gpio2_t_out<*>" TIG; -NET "gpio2_in<*>" TIG; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for PS/2 Ports -#------------------------------------------------------------------------------ - -#Keyboard -NET ps2_keyb_clk LOC = D2; -NET ps2_keyb_clk SLEW = SLOW; -NET ps2_keyb_clk DRIVE = 2; -NET ps2_keyb_clk TIG; -NET ps2_keyb_data LOC = G9; -NET ps2_keyb_data SLEW = SLOW; -NET ps2_keyb_data DRIVE = 2; -NET ps2_keyb_data TIG; - -#Mouse -NET ps2_mouse_clk LOC = B14; -NET ps2_mouse_clk SLEW = SLOW; -NET ps2_mouse_clk DRIVE = 2; -NET ps2_mouse_clk TIG; -NET ps2_mouse_data LOC = C14; -NET ps2_mouse_data SLEW = SLOW; -NET ps2_mouse_data DRIVE = 2; -NET ps2_mouse_data TIG; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for IIC Controller -#------------------------------------------------------------------------------ - -NET iic_scl LOC = A17; -NET iic_sda LOC = B17; -NET iic_scl SLEW = SLOW; -NET iic_scl DRIVE = 6; -NET iic_scl TIG; -NET iic_sda SLEW = SLOW; -NET iic_sda DRIVE = 6; -NET iic_sda TIG; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for AC97 Sound Controller -#------------------------------------------------------------------------------ - -NET ac97_bit_clk LOC = AE10; -NET ac97_bit_clk IOSTANDARD = LVCMOS33; -NET ac97_bit_clk PERIOD = 80; -NET ac97_sdata_in LOC = AD16; -NET ac97_sdata_in IOSTANDARD = LVCMOS33; -NET ac97_reset_n LOC = AD10; -NET ac97_reset_n IOSTANDARD = LVCMOS33; -NET ac97_reset_n TIG; -NET ac97_sdata_out LOC = C8; -NET ac97_sync LOC = D9; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for System ACE MPU / USB -#------------------------------------------------------------------------------ - -NET sysace_clk_in LOC = AF11; -NET sysace_clk_in IOSTANDARD = LVCMOS33; -NET sysace_clk_in TNM_NET = "sysace_clk_in"; -# Leave 1 ns margin -TIMESPEC "TSSYSACE" = PERIOD "sysace_clk_in" 29 ns; - -NET sace_usb_a<0> LOC = U22; -NET sace_usb_a<1> LOC = Y10; -NET sace_usb_a<2> LOC = AA10; -NET sace_usb_a<3> LOC = AC7; -NET sace_usb_a<4> LOC = Y7; -NET sace_usb_a<5> LOC = AA9; -NET sace_usb_a<6> LOC = Y9; -NET sace_usb_a<*> IOSTANDARD = LVCMOS33; -NET sace_usb_a<*> SLEW = FAST; -NET sace_usb_a<*> DRIVE = 8; -NET sace_mpce LOC = AD5; -NET sace_mpce IOSTANDARD = LVCMOS33; -NET sace_mpce SLEW = FAST; -NET sace_mpce DRIVE = 8; -NET sace_usb_d<0> LOC = AB7; -NET sace_usb_d<1> LOC = AC9; -NET sace_usb_d<2> LOC = AB9; -NET sace_usb_d<3> LOC = AE6; -NET sace_usb_d<4> LOC = AD6; -NET sace_usb_d<5> LOC = AF9; -NET sace_usb_d<6> LOC = AE9; -NET sace_usb_d<7> LOC = AD8; -NET sace_usb_d<8> LOC = AC8; -NET sace_usb_d<9> LOC = AF4; -NET sace_usb_d<10> LOC = AE4; -NET sace_usb_d<11> LOC = AD3; -NET sace_usb_d<12> LOC = AC3; -NET sace_usb_d<13> LOC = AF6; -NET sace_usb_d<14> LOC = AF5; -NET sace_usb_d<15> LOC = AA7; -NET sace_usb_d<*> IOSTANDARD = LVCMOS33; -NET sace_usb_d<*> SLEW = FAST; -NET sace_usb_d<*> DRIVE = 8; -NET sace_usb_d<*> PULLDOWN; -NET sace_usb_oen LOC = AA8; -NET sace_usb_oen IOSTANDARD = LVCMOS33; -NET sace_usb_oen SLEW = FAST; -NET sace_usb_oen DRIVE = 8; -NET sace_usb_wen LOC = Y8; -NET sace_usb_wen IOSTANDARD = LVCMOS33; -NET sace_usb_wen SLEW = FAST; -NET sace_usb_wen DRIVE = 8; -NET sysace_mpirq LOC = AD4; -NET sysace_mpirq IOSTANDARD = LVCMOS33; -NET sysace_mpirq TIG; -NET sysace_mpirq PULLDOWN; - -NET usb_csn LOC = AF10; -NET usb_csn IOSTANDARD = LVCMOS33; -NET usb_csn SLEW = FAST; -NET usb_csn DRIVE = 8; -NET usb_hpi_reset_n LOC = A7; -NET usb_hpi_reset_n IOSTANDARD = LVCMOS25; -NET usb_hpi_reset_n TIG; -NET usb_hpi_int LOC = V5; -NET usb_hpi_int IOSTANDARD = LVCMOS33; -NET usb_hpi_int TIG; -NET usb_hpi_int PULLDOWN; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for DDR Controllers -#------------------------------------------------------------------------------ - -NET ddr_ad<0> LOC = C26; # DDR_A0 -NET ddr_ad<1> LOC = E17; # DDR_A1 -NET ddr_ad<2> LOC = D18; # DDR_A2 -NET ddr_ad<3> LOC = C19; # DDR_A3 -NET ddr_ad<4> LOC = F17; # DDR_A4 -NET ddr_ad<5> LOC = B18; # DDR_A5 -NET ddr_ad<6> LOC = B20; # DDR_A6 -NET ddr_ad<7> LOC = C20; # DDR_A7 -NET ddr_ad<8> LOC = D20; # DDR_A8 -NET ddr_ad<9> LOC = C21; # DDR_A9 -NET ddr_ad<10> LOC = A18; # DDR_A10 -NET ddr_ad<11> LOC = B21; # DDR_A11 -NET ddr_ad<12> LOC = A24; # DDR_A12 -NET ddr_ba<0> LOC = B12; # DDR_BA0 -NET ddr_ba<1> LOC = A16; # DDR_BA1 -NET ddr_casb LOC = F23; # DDR_CAS_N -NET ddr_cke LOC = G22; # DDR_CKE -NET ddr_csb LOC = G21; # DDR_CS_N -NET ddr_rasb LOC = F24; # DDR_RAS_N -NET ddr_web LOC = A23; # DDR_WE_N - -NET ddr_clk LOC = A10; # DDR_CK1_P -NET ddr_clk_fb LOC = B13; # DDR_CK1_P (FEEDBACK) -NET ddr_clkb LOC = B10; # DDR_CK1_N - -NET ddr_dm<0> LOC = G19; # DDR_DM0 -NET ddr_dm<1> LOC = G24; # DDR_DM1 -NET ddr_dm<2> LOC = G20; # DDR_DM2 -NET ddr_dm<3> LOC = C22; # DDR_DM3 - -NET ddr_dqs<0> LOC = D25; # DDR_DQS0 -NET ddr_dqs<1> LOC = G18; # DDR_DQS1 -NET ddr_dqs<2> LOC = G17; # DDR_DQS2 -NET ddr_dqs<3> LOC = D26; # DDR_DQS3 - -NET ddr_dq<0> LOC = H20; # DDR_D0 -NET ddr_dq<1> LOC = E23; # DDR_D1 -NET ddr_dq<2> LOC = H26; # DDR_D2 -NET ddr_dq<3> LOC = H22; # DDR_D3 -NET ddr_dq<4> LOC = E25; # DDR_D4 -NET ddr_dq<5> LOC = E26; # DDR_D5 -NET ddr_dq<6> LOC = F26; # DDR_D6 -NET ddr_dq<7> LOC = E24; # DDR_D7 -NET ddr_dq<8> LOC = E20; # DDR_D8 -NET ddr_dq<9> LOC = A22; # DDR_D9 -NET ddr_dq<10> LOC = C23; # DDR_D10 -NET ddr_dq<11> LOC = C24; # DDR_D11 -NET ddr_dq<12> LOC = A20; # DDR_D12 -NET ddr_dq<13> LOC = A21; # DDR_D13 -NET ddr_dq<14> LOC = D24; # DDR_D14 -NET ddr_dq<15> LOC = E18; # DDR_D15 -NET ddr_dq<16> LOC = F18; # DDR_D16 -NET ddr_dq<17> LOC = A19; # DDR_D17 -NET ddr_dq<18> LOC = F19; # DDR_D18 -NET ddr_dq<19> LOC = B23; # DDR_D19 -NET ddr_dq<20> LOC = E21; # DDR_D20 -NET ddr_dq<21> LOC = D22; # DDR_D21 -NET ddr_dq<22> LOC = D23; # DDR_D22 -NET ddr_dq<23> LOC = B24; # DDR_D23 -NET ddr_dq<24> LOC = E22; # DDR_D24 -NET ddr_dq<25> LOC = F20; # DDR_D25 -NET ddr_dq<26> LOC = H23; # DDR_D26 -NET ddr_dq<27> LOC = G25; # DDR_D27 -NET ddr_dq<28> LOC = G26; # DDR_D28 -NET ddr_dq<29> LOC = H25; # DDR_D29 -NET ddr_dq<30> LOC = H24; # DDR_D30 -NET ddr_dq<31> LOC = H21; # DDR_D31 - -NET ddr_ad<*> IOSTANDARD = SSTL2_I; -NET ddr_ba<*> IOSTANDARD = SSTL2_I; -NET ddr_casb IOSTANDARD = SSTL2_I; -NET ddr_cke IOSTANDARD = SSTL2_I; -NET ddr_clk IOSTANDARD = SSTL2_I; -NET ddr_clk_fb IOSTANDARD = LVCMOS25; -NET ddr_clkb IOSTANDARD = SSTL2_I; -NET ddr_casb IOSTANDARD = SSTL2_I; -NET ddr_csb IOSTANDARD = SSTL2_I; -NET ddr_rasb IOSTANDARD = SSTL2_I; -NET ddr_web IOSTANDARD = SSTL2_I; - -NET ddr_dqs<*> IOSTANDARD = SSTL2_II; -NET ddr_dm<*> IOSTANDARD = SSTL2_II; -NET ddr_dq<*> IOSTANDARD = SSTL2_II; - -// Timing Constraint for DDR Feedback Clock -NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb"; -TIMESPEC "TSDDR_FB" = PERIOD "ddr_clk_fb" 9.9 ns; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for TFT VGA LCD Controller -#------------------------------------------------------------------------------ - -NET tft_lcd_b<0> LOC = L26; # VGA_B2 -NET tft_lcd_b<0> IOSTANDARD = LVCMOS33; -NET tft_lcd_b<1> LOC = C5; # VGA_B3 -NET tft_lcd_b<2> LOC = C7; # VGA_B4 -NET tft_lcd_b<3> LOC = B7; # VGA_B5 -NET tft_lcd_b<4> LOC = G8; # VGA_B6 -NET tft_lcd_b<5> LOC = F8; # VGA_B7 -NET tft_lcd_b<*> SLEW = FAST; -NET tft_lcd_b<*> DRIVE = 8; - -NET tft_lcd_clk LOC = AF8; -NET tft_lcd_clk IOSTANDARD = LVDCI_33; -NET tft_lcd_clk SLEW = FAST; -NET tft_lcd_clk DRIVE = 8; - -NET tft_lcd_g<0> LOC = M20; # VGA_G2 -NET tft_lcd_g<0> IOSTANDARD = LVCMOS33; -NET tft_lcd_g<1> LOC = E4; # VGA_G3 -NET tft_lcd_g<2> LOC = D3; # VGA_G4 -NET tft_lcd_g<3> LOC = H7; # VGA_G5 -NET tft_lcd_g<4> LOC = H8; # VGA_G6 -NET tft_lcd_g<5> LOC = C1; # VGA_G7 -NET tft_lcd_g<*> SLEW = FAST; -NET tft_lcd_g<*> DRIVE = 8; - -NET tft_lcd_hsync LOC = C10; -NET tft_lcd_hsync SLEW = FAST; -NET tft_lcd_hsync DRIVE = 8; - -NET tft_lcd_r<0> LOC = N25; #VGA_R2 -NET tft_lcd_r<0> IOSTANDARD = LVCMOS33; -NET tft_lcd_r<1> LOC = C2; #VGA_R3 -NET tft_lcd_r<2> LOC = G7; #VGA_R4 -NET tft_lcd_r<3> LOC = F7; #VGA_R5 -NET tft_lcd_r<4> LOC = E5; #VGA_R6 -NET tft_lcd_r<5> LOC = E6; #VGA_R7 -NET tft_lcd_r<*> SLEW = FAST; -NET tft_lcd_r<*> DRIVE = 8; - -NET tft_lcd_vsync LOC = A8; -NET tft_lcd_vsync SLEW = FAST; -NET tft_lcd_vsync DRIVE = 8; - -TIMESPEC "TSPLB_TFT" = FROM "sys_clk" TO "tft_clk" TIG; -TIMESPEC "TSTFT_PLB" = FROM "tft_clk" TO "sys_clk" TIG; - -//////////////////////////////////////////////////////////////////////////// -// Misc Board Signals -//////////////////////////////////////////////////////////////////////////// - -NET plb_error LOC = L24; -NET plb_error IOSTANDARD = LVCMOS33; -NET plb_error TIG; -NET opb_error LOC = V6; -NET opb_error IOSTANDARD = LVCMOS33; -NET opb_error TIG; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for Ethernet -#------------------------------------------------------------------------------ - -NET phy_col LOC = E3; -NET phy_crs LOC = D5; -NET phy_dv LOC = A9; -NET phy_rx_clk LOC = B15; -NET phy_rx_data<3> LOC = C4; -NET phy_rx_data<2> LOC = D4; -NET phy_rx_data<1> LOC = E1; -NET phy_rx_data<0> LOC = F1; - -NET phy_rx_er LOC = B9; -NET phy_tx_clk LOC = C15; -NET phy_mii_clk LOC = D1; -NET phy_mii_int_n LOC = H4; -NET phy_rst_n LOC = D10; -NET phy_tx_data<3> LOC = G1; -NET phy_tx_data<2> LOC = H3; -NET phy_tx_data<1> LOC = H2; -NET phy_tx_data<0> LOC = H1; -NET phy_tx_en LOC = F4; -NET phy_tx_er LOC = F3; -NET phy_mii_data LOC = G4; - -NET phy_mii_int_n PULLUP; - -NET phy_mii_int_n TIG; -NET phy_rst_n TIG; - -# Timing Constraints (these are recommended in documentation and -# are unaltered except for the TIG) -NET "phy_rx_clk" TNM_NET = "RXCLK_GRP"; -NET "phy_tx_clk" TNM_NET = "TXCLK_GRP"; -TIMESPEC "TSTXOUT" = FROM "TXCLK_GRP" TO "PADS" 10 ns; -TIMESPEC "TSRXIN" = FROM "PADS" TO "RXCLK_GRP" 6 ns; - -NET "phy_tx_clk" MAXSKEW= 1.0 ns; -NET "phy_rx_clk" MAXSKEW= 1.0 ns; -NET "phy_rx_clk" PERIOD = 40 ns HIGH 14 ns; -NET "phy_tx_clk" PERIOD = 40 ns HIGH 14 ns; - -NET "phy_rx_data<3>" IOBDELAY=NONE; -NET "phy_rx_data<2>" IOBDELAY=NONE; -NET "phy_rx_data<1>" IOBDELAY=NONE; -NET "phy_rx_data<0>" IOBDELAY=NONE; -NET "phy_dv" IOBDELAY=NONE; -NET "phy_rx_er" IOBDELAY=NONE; -NET "phy_crs" IOBDELAY=NONE; -NET "phy_col" IOBDELAY=NONE; - -# Workaround to help meet "phy_rx_clk MAXSKEW= 1.0 ns" constraint -INST "opb_ethernet_0/opb_ethernet_0/RX_FF_I0" IOB=FALSE; -INST "opb_ethernet_0/opb_ethernet_0/RX_FF_I1" IOB=FALSE; -INST "opb_ethernet_0/opb_ethernet_0/RX_FF_I2" IOB=FALSE; -INST "opb_ethernet_0/opb_ethernet_0/RX_FF_I3" IOB=FALSE; -INST "opb_ethernet_0/opb_ethernet_0/DVD_FF" IOB=FALSE; -INST "opb_ethernet_0/opb_ethernet_0/RER_FF" IOB=FALSE; - -# Timing ignores (to specify unconstrained paths) -TIMESPEC "TS_PHYTX_OPB" = FROM "TXCLK_GRP" TO "sys_clk" TIG; -TIMESPEC "TS_OPB_PHYTX" = FROM "sys_clk" TO "TXCLK_GRP" TIG; -TIMESPEC "TS_PHYRX_OPB" = FROM "RXCLK_GRP" TO "sys_clk" TIG; -TIMESPEC "TS_OPB_PHYRX" = FROM "sys_clk" TO "RXCLK_GRP" TIG; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for SRAM/FLASH -#------------------------------------------------------------------------------ - -NET sram_clk LOC = AF7; -NET sram_clk_fb LOC = AD17; -NET flash_a23 LOC = T21; -NET sram_flash_addr<22> LOC = U20; -NET sram_flash_addr<21> LOC = T19; -NET sram_flash_addr<20> LOC = AC5; -NET sram_flash_addr<19> LOC = AB5; -NET sram_flash_addr<18> LOC = AC4; -NET sram_flash_addr<17> LOC = AB4; - -NET sram_flash_addr<16> LOC = AB3; -NET sram_flash_addr<15> LOC = AA4; -NET sram_flash_addr<14> LOC = AA3; -NET sram_flash_addr<13> LOC = W5; -NET sram_flash_addr<12> LOC = W6; -NET sram_flash_addr<11> LOC = W3; -NET sram_flash_addr<10> LOC = AF3; -NET sram_flash_addr<9> LOC = AE3; -NET sram_flash_addr<8> LOC = AD2; -NET sram_flash_addr<7> LOC = AD1; -NET sram_flash_addr<6> LOC = AC2; -NET sram_flash_addr<5> LOC = AC1; -NET sram_flash_addr<4> LOC = AB2; -NET sram_flash_addr<3> LOC = AB1; -NET sram_flash_addr<2> LOC = AA1; -NET sram_flash_addr<1> LOC = Y2; -NET sram_flash_addr<0> LOC = Y1; -NET sram_flash_data<31> LOC = F14; -NET sram_flash_data<30> LOC = F13; -NET sram_flash_data<29> LOC = F12; -NET sram_flash_data<28> LOC = F11; -NET sram_flash_data<27> LOC = F16; -NET sram_flash_data<26> LOC = F15; -NET sram_flash_data<25> LOC = D14; -NET sram_flash_data<24> LOC = D13; -NET sram_flash_data<23> LOC = D15; -NET sram_flash_data<22> LOC = E14; -NET sram_flash_data<21> LOC = C11; -NET sram_flash_data<20> LOC = D11; -NET sram_flash_data<19> LOC = D16; -NET sram_flash_data<18> LOC = C16; -NET sram_flash_data<17> LOC = E13; -NET sram_flash_data<16> LOC = D12; -NET sram_flash_data<15> LOC = AA14; -NET sram_flash_data<14> LOC = AB14; -NET sram_flash_data<13> LOC = AC12; -NET sram_flash_data<12> LOC = AC11; -NET sram_flash_data<11> LOC = AA16; -NET sram_flash_data<10> LOC = AA15; -NET sram_flash_data<9> LOC = AB13; -NET sram_flash_data<8> LOC = AA13; -NET sram_flash_data<7> LOC = AC14; -NET sram_flash_data<6> LOC = AD14; -NET sram_flash_data<5> LOC = AA12; -NET sram_flash_data<4> LOC = AA11; -NET sram_flash_data<3> LOC = AC16; -NET sram_flash_data<2> LOC = AC15; -NET sram_flash_data<1> LOC = AC13; -NET sram_flash_data<0> LOC = AD13; -NET sram_cen LOC = V7; -NET sram_flash_oe_n LOC = AC6; -NET sram_flash_we_n LOC = AB6; -NET sram_bw<3> LOC = Y3; #Y4; -NET sram_bw<2> LOC = Y4; #Y3; -NET sram_bw<1> LOC = Y5; #Y6; -NET sram_bw<0> LOC = Y6; #Y5; -NET flash_ce LOC = W7; -NET sram_adv_ld_n LOC = W4; -NET sram_mode LOC = V26; - -NET sram_clk IOSTANDARD = LVCMOS33; -NET sram_clk DRIVE = 16; -NET sram_clk SLEW = FAST; -NET sram_clk_fb IOSTANDARD = LVCMOS33; - -NET flash_a23 IOSTANDARD = LVDCI_33; -NET flash_a23 SLEW = FAST; -NET flash_a23 DRIVE = 8; - -NET sram_mode IOSTANDARD = LVDCI_33; -NET sram_mode SLEW = FAST; -NET sram_mode DRIVE = 8; - -NET sram_flash_addr<*> IOSTANDARD = LVDCI_33; -NET sram_flash_addr<*> SLEW = FAST; -NET sram_flash_addr<*> DRIVE = 8; - -NET sram_flash_data<*> IOSTANDARD = LVCMOS33; -NET sram_flash_data<*> DRIVE = 12; -NET sram_flash_data<*> SLEW = FAST; -NET sram_flash_data<*> PULLDOWN; - -NET sram_flash_oe_n IOSTANDARD = LVDCI_33; -NET sram_flash_oe_n SLEW = FAST; -NET sram_flash_oe_n DRIVE = 8; - -NET sram_flash_we_n IOSTANDARD = LVDCI_33; -NET sram_flash_we_n SLEW = FAST; -NET sram_flash_we_n DRIVE = 8; - -NET sram_bw<*> IOSTANDARD = LVDCI_33; -NET sram_bw<*> SLEW = FAST; -NET sram_bw<*> DRIVE = 8; - -NET flash_ce IOSTANDARD = LVDCI_33; -NET flash_ce SLEW = FAST; -NET flash_ce DRIVE = 8; - -NET sram_cen IOSTANDARD = LVDCI_33; -NET sram_cen SLEW = FAST; -NET sram_cen DRIVE = 8; - -NET sram_adv_ld_n IOSTANDARD = LVDCI_33; -NET sram_adv_ld_n SLEW = FAST; -NET sram_adv_ld_n DRIVE = 8; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for Expansion Header GPIO -#------------------------------------------------------------------------------ - -NET gpio_exp_hdr1<31> LOC = AF24; # HDR1_64 -NET gpio_exp_hdr1<30> LOC = AE24; # HDR1_62 -NET gpio_exp_hdr1<29> LOC = AD22; # HDR1_8 -NET gpio_exp_hdr1<28> LOC = AB21; # HDR1_58 -NET gpio_exp_hdr1<27> LOC = W20; # HDR1_44 -NET gpio_exp_hdr1<26> LOC = W21; # HDR1_48 -NET gpio_exp_hdr1<25> LOC = AB22; # HDR1_14 -NET gpio_exp_hdr1<24> LOC = AD25; # HDR1_20 -NET gpio_exp_hdr1<23> LOC = W22; # HDR1_46 -NET gpio_exp_hdr1<22> LOC = V21; # HDR1_56 -NET gpio_exp_hdr1<21> LOC = V22; # HDR1_54 -NET gpio_exp_hdr1<20> LOC = AC22; # HDR1_16 -NET gpio_exp_hdr1<19> LOC = AD26; # HDR1_18 -NET gpio_exp_hdr1<18> LOC = AC26; # HDR1_34 -NET gpio_exp_hdr1<17> LOC = AD23; # HDR1_6 -NET gpio_exp_hdr1<16> LOC = AB25; # HDR1_30 -NET gpio_exp_hdr1<15> LOC = AC23; # HDR1_4 -NET gpio_exp_hdr1<14> LOC = AB26; # HDR1_24 -NET gpio_exp_hdr1<13> LOC = AC21; # HDR1_60 -NET gpio_exp_hdr1<12> LOC = AA23; # HDR1_10 -NET gpio_exp_hdr1<11> LOC = AA26; # HDR1_22 -NET gpio_exp_hdr1<10> LOC = Y25; # HDR1_40 -NET gpio_exp_hdr1<9> LOC = Y26; # HDR1_38 -NET gpio_exp_hdr1<8> LOC = W26; # HDR1_50 -NET gpio_exp_hdr1<7> LOC = AB23; # HDR1_12 -NET gpio_exp_hdr1<6> LOC = Y24; # HDR1_26 -NET gpio_exp_hdr1<5> LOC = AB24; # HDR1_32 -NET gpio_exp_hdr1<4> LOC = W25; # HDR1_52 -NET gpio_exp_hdr1<3> LOC = AC24; # HDR1_2 -NET gpio_exp_hdr1<2> LOC = AC25; # HDR1_36 -NET gpio_exp_hdr1<1> LOC = V20; # HDR1_42 -NET gpio_exp_hdr1<0> LOC = AA24; # HDR1_28 -NET gpio_exp_hdr1<*> TIG; -NET gpio_exp_hdr1<*> PULLDOWN; - -NET gpio_exp_hdr2<31> LOC = AF18; # HDR2_40 -NET gpio_exp_hdr2<30> LOC = AE18; # HDR2_38 -NET gpio_exp_hdr2<29> LOC = AF19; # HDR2_32 -NET gpio_exp_hdr2<28> LOC = AF20; # HDR2_30 -NET gpio_exp_hdr2<27> LOC = AF21; # HDR2_44 -NET gpio_exp_hdr2<26> LOC = AF22; # HDR2_42 -NET gpio_exp_hdr2<25> LOC = AF23; # HDR2_24 -NET gpio_exp_hdr2<24> LOC = AE23; # HDR2_22 -NET gpio_exp_hdr2<23> LOC = AC18; # HDR2_48 -NET gpio_exp_hdr2<22> LOC = AB18; # HDR2_46 -NET gpio_exp_hdr2<21> LOC = AD19; # HDR2_64 -NET gpio_exp_hdr2<20> LOC = AC19; # HDR2_62 -NET gpio_exp_hdr2<19> LOC = AE20; # HDR2_16 -NET gpio_exp_hdr2<18> LOC = AD20; # HDR2_14 -NET gpio_exp_hdr2<17> LOC = AE21; # HDR2_36 -NET gpio_exp_hdr2<16> LOC = AD21; # HDR2_34 -NET gpio_exp_hdr2<15> LOC = AB20; # HDR2_52 -NET gpio_exp_hdr2<14> LOC = AC20; # HDR2_50 -NET gpio_exp_hdr2<13> LOC = Y17; # HDR2_56 -NET gpio_exp_hdr2<12> LOC = AA17; # HDR2_54 -NET gpio_exp_hdr2<11> LOC = AA19; # HDR2_60 -NET gpio_exp_hdr2<10> LOC = AA20; # HDR2_58 -NET gpio_exp_hdr2<9> LOC = Y22; # HDR2_8 -NET gpio_exp_hdr2<8> LOC = Y23; # HDR2_6 -NET gpio_exp_hdr2<7> LOC = W23; # HDR2_12 -NET gpio_exp_hdr2<6> LOC = W24; # HDR2_10 -NET gpio_exp_hdr2<5> LOC = Y20; # HDR2_20 -NET gpio_exp_hdr2<4> LOC = Y21; # HDR2_18 -NET gpio_exp_hdr2<3> LOC = Y19; # HDR2_28 -NET gpio_exp_hdr2<2> LOC = W19; # HDR2_26 -NET gpio_exp_hdr2<1> LOC = AA18; # HDR2_4 -NET gpio_exp_hdr2<0> LOC = Y18; # HDR2_2 -NET gpio_exp_hdr2<*> TIG; -NET gpio_exp_hdr2<*> PULLDOWN; - -#------------------------------------------------------------------------------ -# IO Pad Location Constraints / Properties for Character LCD GPIO -#------------------------------------------------------------------------------ - -NET gpio_char_lcd<6> LOC = AE13; # LCD_E -NET gpio_char_lcd<5> LOC = AC17; # LCD_RS -NET gpio_char_lcd<4> LOC = AB17; # LCD_RW -NET gpio_char_lcd<3> LOC = AF12; # LCD_DB7 -NET gpio_char_lcd<2> LOC = AE12; # LCD_DB6 -NET gpio_char_lcd<1> LOC = AC10; # LCD_DB5 -NET gpio_char_lcd<0> LOC = AB10; # LCD_DB4 -NET gpio_char_lcd<*> IOSTANDARD = LVCMOS33; -NET gpio_char_lcd<*> TIG; -NET gpio_char_lcd<*> PULLDOWN; diff --git a/lib/CPUs/JCpu/asm/dctest.jsm b/lib/CPUs/JCpu/asm/dctest.jsm deleted file mode 100644 index 38d5947..0000000 --- a/lib/CPUs/JCpu/asm/dctest.jsm +++ /dev/null @@ -1,56 +0,0 @@ -; ------------------------------------------------- -; PROJECT "dctest" -; ------------------------------------------------- - -include "../../../jasm/cregs.inc.jsm" - -; ------------------------------------------------- - xmem - org 4 -konst: dc 0x01, 0x12,"A" -gap1: db 16 -mesg: dc "Hallo", 13,0x0A, 0 -name: dc "Jens",0 -msg1: dc "Welcome to JASM CPU",0 -msg2: dc "Ready",0 -msg3: dc "Testing",0 -msg4: dc "Passed",0 -msg5: dc "Error",0 -crlf: dc 0x0D, 0x0A - - org 0x00 -shit: db 4 - - cmem 0 - org 8 -cram1: db 16 -cram2: db 6 -cram3: db 4 - - cmem 1 -cram4: db 8 -cram5: db 8 - org 0x20 -cram6: db 8 -cram7: db 4 - -reg_revision: equ 0x00 -reg_testid: equ 0x01 - -; ------------------------------------------------- - code - org 0x000 -reset: jmp start - -; ------------------------------------------------- - org 0x001 -int_vec: jmp isr - -; ------------------------------------------------- - org 0x010 - -start: jmp start - -; ------------------------------------------------- -isr: reti - diff --git a/lib/CPUs/JCpu/asm/dctest.tcl b/lib/CPUs/JCpu/asm/dctest.tcl deleted file mode 100644 index ca88834..0000000 --- a/lib/CPUs/JCpu/asm/dctest.tcl +++ /dev/null @@ -1,212 +0,0 @@ -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: The ROM file for upload to target over JTAG -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -# --------------------------------------------------------------------- -# For Chipscope 9.1 -# --------------------------------------------------------------------- -# Source JTAG/TCL frame work -cd $env(CHIPSCOPE)\\bin\\nt -source csejtag.tcl - -namespace import ::chipscope::* - -# Platform USB Cable -set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] -# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" - -# Create session -set handle [::chipscope::csejtag_session create 0] - -# Open JTAG and lock -set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] -set lock_result [::chipscope::csejtag_target lock $handle 1000] - -set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] - -# Get Device ID -set devtype "Virtex-4SX" -set devid 2 -set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] -set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] - -set CSE_OP $CSEJTAG_SHIFT_READWRITE -set CSE_ES $CSEJTAG_RUN_TEST_IDLE - -# Write Program -# JASM_ROM_INSERT_HERE -# Assembled from dctest.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA -# User 1 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] - -# 0x000: JMP 0x010 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030010" - -# 0x001: JMP 0x011 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00130011" - -# 0x002: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00200000" - -# 0x003: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00300000" - -# 0x004: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00400000" - -# 0x005: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00500000" - -# 0x006: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00600000" - -# 0x007: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00700000" - -# 0x008: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00800000" - -# 0x009: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00900000" - -# 0x00A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A00000" - -# 0x00B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B00000" - -# 0x00C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C00000" - -# 0x00D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D00000" - -# 0x00E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E00000" - -# 0x00F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F00000" - -# 0x010: JMP 0x010 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01030010" - -# 0x011: RETI -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0113F000" - -# Assembled from dctest.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA -# User 2 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] - -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0401" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0512" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0641" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1748" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1861" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "196C" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A6C" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B6F" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C0D" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D0A" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F4A" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2065" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "216E" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2273" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2457" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2565" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "266C" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2763" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "286F" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "296D" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A65" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B20" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C74" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D6F" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E20" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F4A" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3041" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3153" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "324D" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3320" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3443" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3550" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3655" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3852" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3965" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A61" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B64" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C79" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E54" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F65" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4073" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4174" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4269" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "436E" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4467" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4650" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4761" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4873" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4973" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A65" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B64" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D45" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E72" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F72" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "506F" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5172" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "530D" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "540A" - -::chipscope::csejtag_target unlock $handle -::chipscope::csejtag_target close $handle -::chipscope::csejtag_session destroy $handle -exit diff --git a/lib/CPUs/JCpu/asm/itest.jsm b/lib/CPUs/JCpu/asm/itest.jsm deleted file mode 100644 index 9666253..0000000 --- a/lib/CPUs/JCpu/asm/itest.jsm +++ /dev/null @@ -1,858 +0,0 @@ -; ------------------------------------------------- -; PROJECT "itest" -; ------------------------------------------------- - -include "../../../jasm/cregs.inc.jsm" - -; ------------------------------------------------- - xmem -msg: dc "Hallo", 0 -xram: db 256 - - cmem 0 -cram: db 256 - -reg_revision: equ 0x00 -reg_testid: equ 0x01 - -; ------------------------------------------------- - code - org 0x000 -reset: jmp start - -; ------------------------------------------------- - org 0x001 -int_vec: jmp isr - -; ------------------------------------------------- - org 0x010 - -start: call init - cin R0, (cpu_revision) - xout (reg_revision), R0 - - ; Test 0 - call test0 - - ; Test 1 - mov R0, 1 - xout (reg_testid), R0 - call test1 - - ; Test 2 - mov R0, 2 - xout (reg_testid), R0 - call test2 - - ; Test 3 - mov R0, 3 - xout (reg_testid), R0 - call test3 - - ; Test 4 - mov R0, 4 - xout (reg_testid), R0 - call test4 - - ; Test 5 - mov R0, 5 - xout (reg_testid), R0 - call test5 - - ; Test 6 - mov R0, 6 - xout (reg_testid), R0 - call test6 - - ; Test 7 - mov R0, 7 - xout (reg_testid), R0 - call test7 - - ; Test 8 - mov R0, 8 - xout (reg_testid), R0 - call test8 - - ; Test 9 - mov R0, 9 - xout (reg_testid), R0 - call test9 - - ; Test 10 - mov R0, 10 - xout (reg_testid), R0 - call test10 - - ; Test 11 - mov R0, 11 - xout (reg_testid), R0 - call test11 - - ; Test 12 - mov R0, 12 - xout (reg_testid), R0 - call test12 - - ; End of test - mov R0, 0xFF - xout (reg_testid), R0 - - jmp ok - -; ------------------------------------------------- -init: mov R0, 0 - mov R1, 0 - mov R2, 0 - mov R3, 0 - mov R4, 0 - mov R5, 0 - mov R6, 0 - mov R7, 0 - mov R8, 0 - mov R9, 0 - mov R10, 0 - mov R11, 0 - mov R12, 0 - mov R13, 0 - mov R14, 0 - mov R15, 0 - ret - -; ------------------------------------------------- -; MOV|R|K -; MOV|R|R -test0: mov R0, 0x10 - cmp R0, 0x10 - jne error - add R0, 1 - - mov R1, R0 - cmp R1, 0x11 - jne error - add R1, 1 - - mov R2, R1 - cmp R2, 0x12 - jne error - add R2, 1 - - mov R3, R2 - cmp R3, 0x13 - jne error - add R3, 1 - - mov R4, R3 - cmp R4, 0x14 - jne error - add R4, 1 - - mov R5, R4 - cmp R5, 0x15 - jne error - add R5, 1 - - mov R6, R5 - cmp R6, 0x16 - jne error - add R6, 1 - - mov R7, R6 - cmp R7, 0x17 - jne error - add R7, 1 - - mov R8, R7 - cmp R8, 0x18 - jne error - add R8, 1 - - mov R9, R8 - cmp R9, 0x19 - jne error - add R9, 1 - - mov R10, R9 - cmp R10, 0x1A - jne error - add R10, 1 - - mov R11, R10 - cmp R11, 0x1B - jne error - add R11, 1 - - mov R12, R11 - cmp R12, 0x1C - jne error - add R12, 1 - - mov R13, R12 - cmp R13, 0x1D - jne error - add R13, 1 - - mov R14, R13 - cmp R14, 0x1E - jne error - add R14, 1 - - mov R15, R14 - cmp R15, 0x1F - jne error - add R15, 1 - - ret - -; ------------------------------------------------- -; Instruction test -; TST|R -; CMP|R|K -; JNZ|K -; JC|K -; JNE|K -; JLT|K -; JGT|K -; JLE|K -; JGE|K -; JMP|K -test1: mov R0, 0 ; R0 <= 0 - tst R0 - jnz error - jc error - cmp R0, 0 - jne error - jlt error - jgt error - jle t1_ok10 - jmp error - -t1_ok10: jeq t1_ok20 - jmp error - -t1_ok20: jge t1_ok30 - jmp error - -t1_ok30: cmp R0, 0x55 - jeq error - jlt t1_ok40 - jmp error - -t1_ok40: jle t1_ok50 - jmp error - -t1_ok50: jge error - jgt error - - mov R0, 0x55 ; R0 <= 0xAA - tst R0 - jz error - jc error - - cmp R0, 0xAA - jeq error - jne t1_ok60 - jmp error - -t1_ok60: jlt t1_ok70 - jmp error - -t1_ok70: jle t1_ok80 - jmp error - -t1_ok80: jgt error - - cmp R0, 0x55 - jeq t1_ok90 - jmp error - -t1_ok90: jne error - jlt error - - jle t1_ok100 - jmp error - -t1_ok100: jgt error - jge t1_ok110 - jmp error - -t1_ok110: mov R0, 0xAA ; R0 <= 0x55 - tst R0 - jz error - jc error - - cmp R0, 0x55 - jeq error - jne t1_ok120 - jmp error - -t1_ok120: jgt t1_ok130 - jmp error - -t1_ok130: jge t1_ok140 - jmp error - -t1_ok140: jlt error - jle error - - ret - -; ------------------------------------------------- -; ADD|R|K -; ADDC|R|K -; ToDo: ADD|R|R -; ToDo: ADDC|R|R -; CMP|R|R -test2: mov R0, 0 - mov R1, 0 - mov R2, R0 - mov R3, R1 - -t2_loop: add R0, 0x01 - addc R1, 0x00 - add R2, 1 - cmp R2, 0 - jne t2_L1 - add R3, 1 - cmp R3, 0x02 -t2_L1: jne t2_loop - cmp R0, R2 - jne error - cmp R1, R3 - jne error - mov R0, 0 - - ret - -; ------------------------------------------------- -; SUB|R|K -; SUBC|R|K -; ToDo: SUB|R|R -; ToDo: SUBC|R|R -; CMP|R|R -test3: mov R0, 0x00 - mov R1, 0x03 - mov R2, R0 - mov R3, R1 - -t3_loop: sub R0, 0x01 - subc R1, 0x00 - sub R2, 1 - cmp R2, 0xFF - jne t3_L1 - sub R3, 1 - cmp R3, 0x00 -t3_L1: jne t3_loop - cmp R0, R2 - jne error - cmp R1, R3 - jne error - mov R0, 0 - - ret -; ------------------------------------------------- -; SUB|K|R -; SUB|R|R -; SUBC|R|R -; SUBC|K|R -; CMP|R|R -test4: mov R0, 0x03 - mov R1, 0x05 - sub 0x05, R0 - sub R1, 0x03 - cmp R0, R1 - jne error - mov R0, 0x03 - mov R1, 0x05 - sub R0, R1 - subc 0, R0 - cmp R0, 0x01 - jne error - add R0, 0 - subc R1, R0 - cmp R1, 0x04 - jne error - mov R0, 0 - - ret - -; ------------------------------------------------- -; MOVC|R|Ri -; MOVC|R|Ki -; MOVC|Ri|R -; MOVC|Ri|K -; MOVC|Ki|R -test5: mov R0, 1 - movc (cram+0x5A), R0 - dec R0 - movc (cram+0), R0 - movc R1, (cram+0x5A) - movc (R1), 0xA5 - movc R0, (R1) - movc R1, (R1) - add R1, 0xFF-0xA5 - movc R0, (R1) -t5_loop1: movc (R0), R0 - movc R2, (R0) - cmp R2, R0 - jne error - movc (R2), R1 - movc R2, (R2) - cmp R2, R1 - jne error - dec R1 - inc R0 - jnz t5_loop1 - - ret - -; ------------------------------------------------- -; MOVX|R|Ri -; MOVX|R|Ki -; MOVX|Ri|R -; MOVX|Ri|K -; MOVX|Ki|R -test6: mov R0, 1 - movx (xram+0x5A), R0 - dec R0 - movx (xram+0), R0 - movx R1, (xram+0x5A) - movx (R1), 0xA5 - movx R0, (R1) - movx R1, (R1) - add R1, 0xFF-0xA5 - movx R0, (R1) -t6_loop1: movx (R0), R0 - movx R2, (R0) - cmp R2, R0 - jne error - movx (R2), R1 - movx R2, (R2) - cmp R2, R1 - jne error - dec R1 - inc R0 - jnz t6_loop1 - - ret - -; ------------------------------------------------- -; PUSH|R -; POP|R -test7: mov R0, 0xAA - mov R1, 0 -t7_loop1: push R0 - inc R0 - dec R1 - jnz t7_loop1 -t7_loop2: pop R0 - dec R1 - jnz t7_loop2 - cmp R0, 0xAA - jne error - - ret - -; ------------------------------------------------- -; JMP|K -; CALL|K -; RET -test8: mov R0, 0x55 - push R0 - mov R0, 0 - mov R1, 0xFF - call t8_rec - pop R0 - cmp R0, 0x55 - jne error - - ; Stack manipulations 1 - mov R0, return1'high - mov R1, return1'low - cout (cpu_stack_high), R0 - push R1 - - mov R0, init'high - mov R1, init'low - cout (cpu_stack_high), R0 - push R1 - ret - - ; Stack manipulations 2 -return1: mov R0, return2'high - mov R1, return2'low - cout (cpu_stack_high), R0 - push R1 - - mov R0, init'high - mov R1, init'low - cout (cpu_stack_high), R0 - push R1 -return2: ret - -t8_rec: cmp R0, R1 - jeq ex_t8_rec - inc R0 - jmp t8_rstub -ex_t8_rec: dec R0 - dec R1 - ret - -t8_rstub: call t8_rec - jmp ex_t8_rec - -; ------------------------------------------------- -; SWAP|R -; SHL|R -; SHR|R -; ROL|R -; ROR|R -; ROLC|R -; RORC|R -test9: mov R0, 0xA5 ; SWAP test - mov R1, 0x5A - swap R0 - cmp R0, 0x5A - jne error - swap R0 - cmp R0, 0xA5 - jne error - mov R0, 0xD2 - swap R0 - cmp R0, 0x2D - jne error - swap R1 - cmp R0, 0x2D - jne error - cmp R1, 0xA5 - jne error - - mov R0, 0x2D - shl R0 ; SHL test - cmp R0, 0x5A - jne error - shl R0 - cmp R0, 0xB4 - jne error - shl R0 - cmp R0, 0x68 - jne error - shl R0 - cmp R0, 0xD0 - jne error - shl R0 - cmp R0, 0xA0 - jne error - shl R0 - cmp R0, 0x40 - jne error - shl R0 - cmp R0, 0x80 - jne error - shl R0 - cmp R0, 0x00 - jne error - - mov R1, 0x84 - shr R1 ; SHR test - cmp R1, 0x42 - jne error - shr R1 - cmp R1, 0x21 - jne error - shr R1 - cmp R1, 0x10 - jne error - shr R1 - cmp R1, 0x08 - jne error - shr R1 - cmp R1, 0x04 - jne error - shr R1 - cmp R1, 0x02 - jne error - shr R1 - cmp R1, 0x01 - jne error - shr R1 - cmp R1, 0x00 - jne error - - mov R0, 0xC5 ; ROL test - rol R0 - cmp R0, 0x8B - jne error - rol R0 - cmp R0, 0x17 - jne error - rol R0 - cmp R0, 0x2E - jne error - rol R0 - cmp R0, 0x5C - jne error - rol R0 - cmp R0, 0xB8 - jne error - rol R0 - cmp R0, 0x71 - jne error - rol R0 - cmp R0, 0xE2 - jne error - rol R0 - cmp R0, 0xC5 - jne error - - mov R1, 0x63 ; ROR test - ror R1 - cmp R1, 0xB1 - jne error - ror R1 - cmp R1, 0xD8 - jne error - ror R1 - cmp R1, 0x6C - jne error - ror R1 - cmp R1, 0x36 - jne error - ror R1 - cmp R1, 0x1B - jne error - ror R1 - cmp R1, 0x8D - jne error - ror R1 - cmp R1, 0xC6 - jne error - ror R1 - cmp R1, 0x63 - jne error - - - xor R0, R0 ; ROLC generate - mov R0, 0xC5 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - push R0 - rolc R0 - - cmp R0, 0xC5 ; ROLC verify - jne error - pop R0 - cmp R0, 0x62 - jne error - pop R0 - cmp R0, 0xB1 - jne error - pop R0 - cmp R0, 0x58 - jne error - pop R0 - cmp R0, 0xAC - jne error - pop R0 - cmp R0, 0x56 - jne error - pop R0 - cmp R0, 0x2B - jne error - pop R0 - cmp R0, 0x15 - jne error - pop R0 - cmp R0, 0x8A - jne error - - xor R1, R1 ; RORC generate - mov R1, 0x63 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - push R1 - rorc R1 - - cmp R1, 0x63 ; RORC verify - jne error - pop R1 - cmp R1, 0xC6 - jne error - pop R1 - cmp R1, 0x8C - jne error - pop R1 - cmp R1, 0x19 - jne error - pop R1 - cmp R1, 0x33 - jne error - pop R1 - cmp R1, 0x66 - jne error - pop R1 - cmp R1, 0xCC - jne error - pop R1 - cmp R1, 0x98 - jne error - pop R1 - cmp R1, 0x31 - jne error - - ret - -; ------------------------------------------------- -; AND|R|R -; AND|R|K -; OR|R|R -; OR|R|K -; XOR|R|R -; XOR|R|K -test10: mov R0, 0xA5 ; AND - swap R0 - push R0 - and R0, 0x0F - cmp R0, 0x0A - jne error - pop R0 - push R0 - and R0, 0x0F - cmp R0, 0x0A - pop R1 - jne error - swap R1 - mov R2, 0x0F - and R1, R2 - cmp R1, 0x05 - jne error - - mov R0, 0x05 ; OR - mov R2, 0xA0 - swap R0 - or R2, R0 - cmp R2, 0xF0 - jne error - swap R0 - or R0, 0x50 - cmp R0, 0x55 - jne error - - mov R1, 0x01 - mov R0, 0x01 - xor R0, 0x01 - jnz error - xor R0, R1 - cmp R0, 0x01 - jne error - - ret - -; ------------------------------------------------- -test11: - mov R0, 0x03 - cout (cpu_int_ctrl), R0 - - xin R0, (2) - or R0, 1 - xout (2), R0 - nop - nop - nop - nop - nop - nop - xin R0, (2) - and R0, 0xFE - xout (2), R0 - nop - nop - nop - nop - - cin R0, (cpu_int_ctrl) - or R0, 0x80 - cout (cpu_int_ctrl), R0 - nop - cin R0, (cpu_int_ctrl) - or R0, 0x80 - cout (cpu_int_ctrl), R0 - nop - cin R0, (cpu_int_ctrl) - or R0, 0x80 - cout (cpu_int_ctrl), R0 - nop - cin R0, (cpu_int_ctrl) - or R0, 0x80 - cout (cpu_int_ctrl), R0 - nop - nop - nop - nop - nop - nop - nop - nop - nop - ret - -; ------------------------------------------------- -; Tests clrc, setc -test12: sub R0, 0 - jc error - setc - jnc error - nop - sub R0, 0 - jc error - - mov R0, 0 - clrc - jc error - setc - jnc error - nop - clrc - jc error - ret - -; ------------------------------------------------- -isr: inc R14 - reti - -; ------------------------------------------------- - org 0x3FF -error: jmp error - -; ------------------------------------------------- - org 0x2FF -ok: jmp ok - -; ------------------------------------------------- - \ No newline at end of file diff --git a/lib/CPUs/JCpu/asm/itest.tcl b/lib/CPUs/JCpu/asm/itest.tcl deleted file mode 100644 index 3724ca6..0000000 --- a/lib/CPUs/JCpu/asm/itest.tcl +++ /dev/null @@ -1,3407 +0,0 @@ -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: The ROM file for upload to target over JTAG -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -# --------------------------------------------------------------------- -# For Chipscope 9.1 -# --------------------------------------------------------------------- -# Source JTAG/TCL frame work -cd $env(CHIPSCOPE)\\bin\\nt -source csejtag.tcl - -namespace import ::chipscope::* - -# Platform USB Cable -set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] -# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" - -# Create session -set handle [::chipscope::csejtag_session create 0] - -# Open JTAG and lock -set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] -set lock_result [::chipscope::csejtag_target lock $handle 1000] - -set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] - -# Get Device ID -set devtype "Virtex-4SX" -set devid 2 -set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] -set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] - -set CSE_OP $CSEJTAG_SHIFT_READWRITE -set CSE_ES $CSEJTAG_RUN_TEST_IDLE - -# Write Program -# JASM_ROM_INSERT_HERE -# Assembled from itest.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA -# User 1 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] - -# 0x000: JMP 0x010 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030010" - -# 0x001: JMP 0x288 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00130288" - -# 0x002: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00200000" - -# 0x003: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00300000" - -# 0x004: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00400000" - -# 0x005: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00500000" - -# 0x006: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00600000" - -# 0x007: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00700000" - -# 0x008: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00800000" - -# 0x009: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00900000" - -# 0x00A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A00000" - -# 0x00B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B00000" - -# 0x00C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C00000" - -# 0x00D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D00000" - -# 0x00E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E00000" - -# 0x00F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F00000" - -# 0x010: CALL 0x03B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103B03B" - -# 0x011: CIN R00, (0x00) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01129000" - -# 0x012: XOUT (0x00), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01224000" - -# 0x013: CALL 0x04C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0133B04C" - -# 0x014: MOV R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01403010" - -# 0x015: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01524010" - -# 0x016: CALL 0x08D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0163B08D" - -# 0x017: MOV R00, 0x02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01703020" - -# 0x018: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01824010" - -# 0x019: CALL 0x0C9 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0193B0C9" - -# 0x01A: MOV R00, 0x03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A03030" - -# 0x01B: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B24010" - -# 0x01C: CALL 0x0DB -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C3B0DB" - -# 0x01D: MOV R00, 0x04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D03040" - -# 0x01E: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E24010" - -# 0x01F: CALL 0x0ED -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F3B0ED" - -# 0x020: MOV R00, 0x05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02003050" - -# 0x021: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02124010" - -# 0x022: CALL 0x0FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0223B0FF" - -# 0x023: MOV R00, 0x06 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02303060" - -# 0x024: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02424010" - -# 0x025: CALL 0x115 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0253B115" - -# 0x026: MOV R00, 0x07 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02603070" - -# 0x027: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02724010" - -# 0x028: CALL 0x12B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0283B12B" - -# 0x029: MOV R00, 0x08 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02903080" - -# 0x02A: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A24010" - -# 0x02B: CALL 0x137 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B3B137" - -# 0x02C: MOV R00, 0x09 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C03090" - -# 0x02D: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D24010" - -# 0x02E: CALL 0x15A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E3B15A" - -# 0x02F: MOV R00, 0x0A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F030A0" - -# 0x030: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03024010" - -# 0x031: CALL 0x22A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0313B22A" - -# 0x032: MOV R00, 0x0B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "032030B0" - -# 0x033: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03324010" - -# 0x034: CALL 0x24D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0343B24D" - -# 0x035: MOV R00, 0x0C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "035030C0" - -# 0x036: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03624010" - -# 0x037: CALL 0x278 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0373B278" - -# 0x038: MOV R00, 0xFF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03803FF0" - -# 0x039: XOUT (0x01), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03924010" - -# 0x03A: JMP 0x2FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A302FF" - -# 0x03B: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B03000" - -# 0x03C: MOV R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C03001" - -# 0x03D: MOV R02, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D03002" - -# 0x03E: MOV R03, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E03003" - -# 0x03F: MOV R04, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F03004" - -# 0x040: MOV R05, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04003005" - -# 0x041: MOV R06, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04103006" - -# 0x042: MOV R07, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04203007" - -# 0x043: MOV R08, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04303008" - -# 0x044: MOV R09, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04403009" - -# 0x045: MOV R10, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0450300A" - -# 0x046: MOV R11, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0460300B" - -# 0x047: MOV R12, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0470300C" - -# 0x048: MOV R13, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0480300D" - -# 0x049: MOV R14, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0490300E" - -# 0x04A: MOV R15, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A0300F" - -# 0x04B: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B3E000" - -# 0x04C: MOV R00, 0x10 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C03100" - -# 0x04D: CMP R00, 0x10 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D0F100" - -# 0x04E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E3A3FF" - -# 0x04F: ADD R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F11010" - -# 0x050: MOV R01, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05002001" - -# 0x051: CMP R01, 0x11 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0510F111" - -# 0x052: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0523A3FF" - -# 0x053: ADD R01, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05311011" - -# 0x054: MOV R02, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05402012" - -# 0x055: CMP R02, 0x12 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0550F122" - -# 0x056: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0563A3FF" - -# 0x057: ADD R02, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05711012" - -# 0x058: MOV R03, R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05802023" - -# 0x059: CMP R03, 0x13 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0590F133" - -# 0x05A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A3A3FF" - -# 0x05B: ADD R03, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B11013" - -# 0x05C: MOV R04, R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C02034" - -# 0x05D: CMP R04, 0x14 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D0F144" - -# 0x05E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E3A3FF" - -# 0x05F: ADD R04, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F11014" - -# 0x060: MOV R05, R04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06002045" - -# 0x061: CMP R05, 0x15 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0610F155" - -# 0x062: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0623A3FF" - -# 0x063: ADD R05, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06311015" - -# 0x064: MOV R06, R05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06402056" - -# 0x065: CMP R06, 0x16 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0650F166" - -# 0x066: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0663A3FF" - -# 0x067: ADD R06, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06711016" - -# 0x068: MOV R07, R06 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06802067" - -# 0x069: CMP R07, 0x17 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0690F177" - -# 0x06A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A3A3FF" - -# 0x06B: ADD R07, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B11017" - -# 0x06C: MOV R08, R07 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C02078" - -# 0x06D: CMP R08, 0x18 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D0F188" - -# 0x06E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E3A3FF" - -# 0x06F: ADD R08, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F11018" - -# 0x070: MOV R09, R08 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07002089" - -# 0x071: CMP R09, 0x19 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0710F199" - -# 0x072: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0723A3FF" - -# 0x073: ADD R09, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07311019" - -# 0x074: MOV R10, R09 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0740209A" - -# 0x075: CMP R10, 0x1A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0750F1AA" - -# 0x076: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0763A3FF" - -# 0x077: ADD R10, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0771101A" - -# 0x078: MOV R11, R10 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "078020AB" - -# 0x079: CMP R11, 0x1B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0790F1BB" - -# 0x07A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A3A3FF" - -# 0x07B: ADD R11, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B1101B" - -# 0x07C: MOV R12, R11 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C020BC" - -# 0x07D: CMP R12, 0x1C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D0F1CC" - -# 0x07E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E3A3FF" - -# 0x07F: ADD R12, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F1101C" - -# 0x080: MOV R13, R12 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "080020CD" - -# 0x081: CMP R13, 0x1D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0810F1DD" - -# 0x082: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0823A3FF" - -# 0x083: ADD R13, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0831101D" - -# 0x084: MOV R14, R13 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "084020DE" - -# 0x085: CMP R14, 0x1E -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0850F1EE" - -# 0x086: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0863A3FF" - -# 0x087: ADD R14, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0871101E" - -# 0x088: MOV R15, R14 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "088020EF" - -# 0x089: CMP R15, 0x1F -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0890F1FF" - -# 0x08A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A3A3FF" - -# 0x08B: ADD R15, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B1101F" - -# 0x08C: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C3E000" - -# 0x08D: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D03000" - -# 0x08E: TST R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E0F000" - -# 0x08F: JNZ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F323FF" - -# 0x090: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "090333FF" - -# 0x091: CMP R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0910F000" - -# 0x092: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0923A3FF" - -# 0x093: JLT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "093353FF" - -# 0x094: JGT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "094363FF" - -# 0x095: JLE 0x097 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09537097" - -# 0x096: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "096303FF" - -# 0x097: JEQ 0x099 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09739099" - -# 0x098: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "098303FF" - -# 0x099: JGE 0x09B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0993809B" - -# 0x09A: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A303FF" - -# 0x09B: CMP R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B0F550" - -# 0x09C: JEQ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C393FF" - -# 0x09D: JLT 0x09F -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D3509F" - -# 0x09E: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E303FF" - -# 0x09F: JLE 0x0A1 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F370A1" - -# 0x0A0: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A0303FF" - -# 0x0A1: JGE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A1383FF" - -# 0x0A2: JGT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A2363FF" - -# 0x0A3: MOV R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A303550" - -# 0x0A4: TST R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A40F000" - -# 0x0A5: JZ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A5313FF" - -# 0x0A6: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A6333FF" - -# 0x0A7: CMP R00, 0xAA -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A70FAA0" - -# 0x0A8: JEQ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A8393FF" - -# 0x0A9: JNE 0x0AB -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A93A0AB" - -# 0x0AA: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AA303FF" - -# 0x0AB: JLT 0x0AD -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AB350AD" - -# 0x0AC: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AC303FF" - -# 0x0AD: JLE 0x0AF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AD370AF" - -# 0x0AE: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AE303FF" - -# 0x0AF: JGT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AF363FF" - -# 0x0B0: CMP R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B00F550" - -# 0x0B1: JEQ 0x0B3 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B1390B3" - -# 0x0B2: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B2303FF" - -# 0x0B3: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B33A3FF" - -# 0x0B4: JLT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B4353FF" - -# 0x0B5: JLE 0x0B7 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B5370B7" - -# 0x0B6: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B6303FF" - -# 0x0B7: JGT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B7363FF" - -# 0x0B8: JGE 0x0BA -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B8380BA" - -# 0x0B9: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B9303FF" - -# 0x0BA: MOV R00, 0xAA -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BA03AA0" - -# 0x0BB: TST R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BB0F000" - -# 0x0BC: JZ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BC313FF" - -# 0x0BD: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BD333FF" - -# 0x0BE: CMP R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BE0F550" - -# 0x0BF: JEQ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BF393FF" - -# 0x0C0: JNE 0x0C2 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C03A0C2" - -# 0x0C1: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C1303FF" - -# 0x0C2: JGT 0x0C4 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C2360C4" - -# 0x0C3: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C3303FF" - -# 0x0C4: JGE 0x0C6 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C4380C6" - -# 0x0C5: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C5303FF" - -# 0x0C6: JLT 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C6353FF" - -# 0x0C7: JLE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C7373FF" - -# 0x0C8: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C83E000" - -# 0x0C9: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C903000" - -# 0x0CA: MOV R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CA03001" - -# 0x0CB: MOV R02, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CB02002" - -# 0x0CC: MOV R03, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CC02013" - -# 0x0CD: ADD R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CD11010" - -# 0x0CE: ADDC R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CE13001" - -# 0x0CF: ADD R02, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CF11012" - -# 0x0D0: CMP R02, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D00F002" - -# 0x0D1: JNE 0x0D4 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D13A0D4" - -# 0x0D2: ADD R03, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D211013" - -# 0x0D3: CMP R03, 0x02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D30F023" - -# 0x0D4: JNE 0x0CD -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D43A0CD" - -# 0x0D5: CMP R00, R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D50E020" - -# 0x0D6: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D63A3FF" - -# 0x0D7: CMP R01, R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D70E031" - -# 0x0D8: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D83A3FF" - -# 0x0D9: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D903000" - -# 0x0DA: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DA3E000" - -# 0x0DB: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DB03000" - -# 0x0DC: MOV R01, 0x03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DC03031" - -# 0x0DD: MOV R02, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DD02002" - -# 0x0DE: MOV R03, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DE02013" - -# 0x0DF: SUB R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DF15010" - -# 0x0E0: SUBC R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E017001" - -# 0x0E1: SUB R02, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E115012" - -# 0x0E2: CMP R02, 0xFF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E20FFF2" - -# 0x0E3: JNE 0x0E6 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E33A0E6" - -# 0x0E4: SUB R03, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E415013" - -# 0x0E5: CMP R03, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E50F003" - -# 0x0E6: JNE 0x0DF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E63A0DF" - -# 0x0E7: CMP R00, R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E70E020" - -# 0x0E8: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E83A3FF" - -# 0x0E9: CMP R01, R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E90E031" - -# 0x0EA: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EA3A3FF" - -# 0x0EB: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EB03000" - -# 0x0EC: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EC3E000" - -# 0x0ED: MOV R00, 0x03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0ED03030" - -# 0x0EE: MOV R01, 0x05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EE03051" - -# 0x0EF: SUB 0x05, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EF2E050" - -# 0x0F0: SUB R01, 0x03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F015031" - -# 0x0F1: CMP R00, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F10E010" - -# 0x0F2: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F23A3FF" - -# 0x0F3: MOV R00, 0x03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F303030" - -# 0x0F4: MOV R01, 0x05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F403051" - -# 0x0F5: SUB R00, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F514010" - -# 0x0F6: SUBC 0x00, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F62F000" - -# 0x0F7: CMP R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F70F010" - -# 0x0F8: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F83A3FF" - -# 0x0F9: ADD R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F911000" - -# 0x0FA: SUBC R01, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FA16001" - -# 0x0FB: CMP R01, 0x04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FB0F041" - -# 0x0FC: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FC3A3FF" - -# 0x0FD: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FD03000" - -# 0x0FE: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FE3E000" - -# 0x0FF: MOV R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FF03010" - -# 0x100: MOVC (0x5A), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1000D5A0" - -# 0x101: DEC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10115010" - -# 0x102: MOVC (0x00), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1020D000" - -# 0x103: MOVC R01, (0x5A) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1030A5A1" - -# 0x104: MOVC (R01), 0xA5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1040CA51" - -# 0x105: MOVC R00, (R01) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10509010" - -# 0x106: MOVC R01, (R01) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10609011" - -# 0x107: ADD R01, 0x5A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "107115A1" - -# 0x108: MOVC R00, (R01) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10809010" - -# 0x109: MOVC (R00), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1090B000" - -# 0x10A: MOVC R02, (R00) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10A09002" - -# 0x10B: CMP R02, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10B0E002" - -# 0x10C: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10C3A3FF" - -# 0x10D: MOVC (R01), R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10D0B021" - -# 0x10E: MOVC R02, (R02) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10E09022" - -# 0x10F: CMP R02, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10F0E012" - -# 0x110: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1103A3FF" - -# 0x111: DEC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11115011" - -# 0x112: INC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11211010" - -# 0x113: JNZ 0x109 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11332109" - -# 0x114: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1143E000" - -# 0x115: MOV R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11503010" - -# 0x116: MOVX (0x60), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11608600" - -# 0x117: DEC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11715010" - -# 0x118: MOVX (0x06), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11808060" - -# 0x119: MOVX R01, (0x60) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11905601" - -# 0x11A: MOVX (R01), 0xA5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11A07A51" - -# 0x11B: MOVX R00, (R01) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11B04010" - -# 0x11C: MOVX R01, (R01) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11C04011" - -# 0x11D: ADD R01, 0x5A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11D115A1" - -# 0x11E: MOVX R00, (R01) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11E04010" - -# 0x11F: MOVX (R00), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11F06000" - -# 0x120: MOVX R02, (R00) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12004002" - -# 0x121: CMP R02, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1210E002" - -# 0x122: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1223A3FF" - -# 0x123: MOVX (R01), R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12306021" - -# 0x124: MOVX R02, (R02) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12404022" - -# 0x125: CMP R02, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1250E012" - -# 0x126: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1263A3FF" - -# 0x127: DEC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12715011" - -# 0x128: INC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12811010" - -# 0x129: JNZ 0x11F -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1293211F" - -# 0x12A: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12A3E000" - -# 0x12B: MOV R00, 0xAA -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12B03AA0" - -# 0x12C: MOV R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12C03001" - -# 0x12D: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12D3C000" - -# 0x12E: INC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12E11010" - -# 0x12F: DEC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12F15011" - -# 0x130: JNZ 0x12D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1303212D" - -# 0x131: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1313D000" - -# 0x132: DEC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13215011" - -# 0x133: JNZ 0x131 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13332131" - -# 0x134: CMP R00, 0xAA -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1340FAA0" - -# 0x135: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1353A3FF" - -# 0x136: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1363E000" - -# 0x137: MOV R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13703550" - -# 0x138: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1383C000" - -# 0x139: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13903000" - -# 0x13A: MOV R01, 0xFF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13A03FF1" - -# 0x13B: CALL 0x151 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13B3B151" - -# 0x13C: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13C3D000" - -# 0x13D: CMP R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13D0F550" - -# 0x13E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13E3A3FF" - -# 0x13F: MOV R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13F03010" - -# 0x140: MOV R01, 0x48 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14003481" - -# 0x141: COUT (0x05), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14126050" - -# 0x142: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1423C001" - -# 0x143: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14303000" - -# 0x144: MOV R01, 0x3B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "144033B1" - -# 0x145: COUT (0x05), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14526050" - -# 0x146: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1463C001" - -# 0x147: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1473E000" - -# 0x148: MOV R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14803010" - -# 0x149: MOV R01, 0x50 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14903501" - -# 0x14A: COUT (0x05), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14A26050" - -# 0x14B: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14B3C001" - -# 0x14C: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14C03000" - -# 0x14D: MOV R01, 0x3B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14D033B1" - -# 0x14E: COUT (0x05), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14E26050" - -# 0x14F: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14F3C001" - -# 0x150: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1503E000" - -# 0x151: CMP R00, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1510E010" - -# 0x152: JEQ 0x155 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15239155" - -# 0x153: INC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15311010" - -# 0x154: JMP 0x158 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15430158" - -# 0x155: DEC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15515010" - -# 0x156: DEC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15615011" - -# 0x157: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1573E000" - -# 0x158: CALL 0x151 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1583B151" - -# 0x159: JMP 0x155 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15930155" - -# 0x15A: MOV R00, 0xA5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15A03A50" - -# 0x15B: MOV R01, 0x5A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15B035A1" - -# 0x15C: SWAP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15C2A000" - -# 0x15D: CMP R00, 0x5A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15D0F5A0" - -# 0x15E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15E3A3FF" - -# 0x15F: SWAP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15F2A000" - -# 0x160: CMP R00, 0xA5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1600FA50" - -# 0x161: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1613A3FF" - -# 0x162: MOV R00, 0xD2 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16203D20" - -# 0x163: SWAP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1632A000" - -# 0x164: CMP R00, 0x2D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1640F2D0" - -# 0x165: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1653A3FF" - -# 0x166: SWAP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1662A001" - -# 0x167: CMP R00, 0x2D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1670F2D0" - -# 0x168: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1683A3FF" - -# 0x169: CMP R01, 0xA5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1690FA51" - -# 0x16A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16A3A3FF" - -# 0x16B: MOV R00, 0x2D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16B032D0" - -# 0x16C: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16C1E000" - -# 0x16D: CMP R00, 0x5A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16D0F5A0" - -# 0x16E: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16E3A3FF" - -# 0x16F: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16F1E000" - -# 0x170: CMP R00, 0xB4 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1700FB40" - -# 0x171: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1713A3FF" - -# 0x172: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1721E000" - -# 0x173: CMP R00, 0x68 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1730F680" - -# 0x174: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1743A3FF" - -# 0x175: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1751E000" - -# 0x176: CMP R00, 0xD0 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1760FD00" - -# 0x177: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1773A3FF" - -# 0x178: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1781E000" - -# 0x179: CMP R00, 0xA0 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1790FA00" - -# 0x17A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17A3A3FF" - -# 0x17B: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17B1E000" - -# 0x17C: CMP R00, 0x40 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17C0F400" - -# 0x17D: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17D3A3FF" - -# 0x17E: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17E1E000" - -# 0x17F: CMP R00, 0x80 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17F0F800" - -# 0x180: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1803A3FF" - -# 0x181: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1811E000" - -# 0x182: CMP R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1820F000" - -# 0x183: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1833A3FF" - -# 0x184: MOV R01, 0x84 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18403841" - -# 0x185: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1851F001" - -# 0x186: CMP R01, 0x42 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1860F421" - -# 0x187: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1873A3FF" - -# 0x188: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1881F001" - -# 0x189: CMP R01, 0x21 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1890F211" - -# 0x18A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18A3A3FF" - -# 0x18B: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18B1F001" - -# 0x18C: CMP R01, 0x10 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18C0F101" - -# 0x18D: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18D3A3FF" - -# 0x18E: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18E1F001" - -# 0x18F: CMP R01, 0x08 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18F0F081" - -# 0x190: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1903A3FF" - -# 0x191: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1911F001" - -# 0x192: CMP R01, 0x04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1920F041" - -# 0x193: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1933A3FF" - -# 0x194: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1941F001" - -# 0x195: CMP R01, 0x02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1950F021" - -# 0x196: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1963A3FF" - -# 0x197: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1971F001" - -# 0x198: CMP R01, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1980F011" - -# 0x199: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1993A3FF" - -# 0x19A: SHR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19A1F001" - -# 0x19B: CMP R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19B0F001" - -# 0x19C: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19C3A3FF" - -# 0x19D: MOV R00, 0xC5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19D03C50" - -# 0x19E: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19E20000" - -# 0x19F: CMP R00, 0x8B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19F0F8B0" - -# 0x1A0: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A03A3FF" - -# 0x1A1: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A120000" - -# 0x1A2: CMP R00, 0x17 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A20F170" - -# 0x1A3: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A33A3FF" - -# 0x1A4: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A420000" - -# 0x1A5: CMP R00, 0x2E -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A50F2E0" - -# 0x1A6: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A63A3FF" - -# 0x1A7: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A720000" - -# 0x1A8: CMP R00, 0x5C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A80F5C0" - -# 0x1A9: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A93A3FF" - -# 0x1AA: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AA20000" - -# 0x1AB: CMP R00, 0xB8 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AB0FB80" - -# 0x1AC: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AC3A3FF" - -# 0x1AD: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AD20000" - -# 0x1AE: CMP R00, 0x71 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AE0F710" - -# 0x1AF: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AF3A3FF" - -# 0x1B0: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B020000" - -# 0x1B1: CMP R00, 0xE2 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B10FE20" - -# 0x1B2: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B23A3FF" - -# 0x1B3: ROL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B320000" - -# 0x1B4: CMP R00, 0xC5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B40FC50" - -# 0x1B5: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B53A3FF" - -# 0x1B6: MOV R01, 0x63 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B603631" - -# 0x1B7: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B721001" - -# 0x1B8: CMP R01, 0xB1 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B80FB11" - -# 0x1B9: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B93A3FF" - -# 0x1BA: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BA21001" - -# 0x1BB: CMP R01, 0xD8 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BB0FD81" - -# 0x1BC: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BC3A3FF" - -# 0x1BD: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BD21001" - -# 0x1BE: CMP R01, 0x6C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BE0F6C1" - -# 0x1BF: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BF3A3FF" - -# 0x1C0: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C021001" - -# 0x1C1: CMP R01, 0x36 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C10F361" - -# 0x1C2: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C23A3FF" - -# 0x1C3: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C321001" - -# 0x1C4: CMP R01, 0x1B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C40F1B1" - -# 0x1C5: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C53A3FF" - -# 0x1C6: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C621001" - -# 0x1C7: CMP R01, 0x8D -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C70F8D1" - -# 0x1C8: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C83A3FF" - -# 0x1C9: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C921001" - -# 0x1CA: CMP R01, 0xC6 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CA0FC61" - -# 0x1CB: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CB3A3FF" - -# 0x1CC: ROR R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CC21001" - -# 0x1CD: CMP R01, 0x63 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CD0F631" - -# 0x1CE: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CE3A3FF" - -# 0x1CF: XOR R00, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CF1C000" - -# 0x1D0: MOV R00, 0xC5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D003C50" - -# 0x1D1: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D122000" - -# 0x1D2: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D23C000" - -# 0x1D3: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D322000" - -# 0x1D4: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D43C000" - -# 0x1D5: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D522000" - -# 0x1D6: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D63C000" - -# 0x1D7: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D722000" - -# 0x1D8: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D83C000" - -# 0x1D9: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D922000" - -# 0x1DA: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DA3C000" - -# 0x1DB: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DB22000" - -# 0x1DC: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DC3C000" - -# 0x1DD: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DD22000" - -# 0x1DE: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DE3C000" - -# 0x1DF: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DF22000" - -# 0x1E0: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E03C000" - -# 0x1E1: ROLC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E122000" - -# 0x1E2: CMP R00, 0xC5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E20FC50" - -# 0x1E3: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E33A3FF" - -# 0x1E4: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E43D000" - -# 0x1E5: CMP R00, 0x62 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E50F620" - -# 0x1E6: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E63A3FF" - -# 0x1E7: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E73D000" - -# 0x1E8: CMP R00, 0xB1 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E80FB10" - -# 0x1E9: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E93A3FF" - -# 0x1EA: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EA3D000" - -# 0x1EB: CMP R00, 0x58 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EB0F580" - -# 0x1EC: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EC3A3FF" - -# 0x1ED: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1ED3D000" - -# 0x1EE: CMP R00, 0xAC -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EE0FAC0" - -# 0x1EF: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EF3A3FF" - -# 0x1F0: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F03D000" - -# 0x1F1: CMP R00, 0x56 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F10F560" - -# 0x1F2: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F23A3FF" - -# 0x1F3: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F33D000" - -# 0x1F4: CMP R00, 0x2B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F40F2B0" - -# 0x1F5: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F53A3FF" - -# 0x1F6: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F63D000" - -# 0x1F7: CMP R00, 0x15 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F70F150" - -# 0x1F8: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F83A3FF" - -# 0x1F9: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F93D000" - -# 0x1FA: CMP R00, 0x8A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FA0F8A0" - -# 0x1FB: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FB3A3FF" - -# 0x1FC: XOR R01, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FC1C011" - -# 0x1FD: MOV R01, 0x63 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FD03631" - -# 0x1FE: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FE23001" - -# 0x1FF: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FF3C001" - -# 0x200: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20023001" - -# 0x201: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2013C001" - -# 0x202: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20223001" - -# 0x203: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2033C001" - -# 0x204: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20423001" - -# 0x205: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2053C001" - -# 0x206: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20623001" - -# 0x207: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2073C001" - -# 0x208: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20823001" - -# 0x209: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2093C001" - -# 0x20A: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20A23001" - -# 0x20B: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20B3C001" - -# 0x20C: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20C23001" - -# 0x20D: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20D3C001" - -# 0x20E: RORC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20E23001" - -# 0x20F: CMP R01, 0x63 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20F0F631" - -# 0x210: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2103A3FF" - -# 0x211: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2113D001" - -# 0x212: CMP R01, 0xC6 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2120FC61" - -# 0x213: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2133A3FF" - -# 0x214: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2143D001" - -# 0x215: CMP R01, 0x8C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2150F8C1" - -# 0x216: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2163A3FF" - -# 0x217: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2173D001" - -# 0x218: CMP R01, 0x19 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2180F191" - -# 0x219: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2193A3FF" - -# 0x21A: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21A3D001" - -# 0x21B: CMP R01, 0x33 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21B0F331" - -# 0x21C: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21C3A3FF" - -# 0x21D: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21D3D001" - -# 0x21E: CMP R01, 0x66 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21E0F661" - -# 0x21F: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21F3A3FF" - -# 0x220: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2203D001" - -# 0x221: CMP R01, 0xCC -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2210FCC1" - -# 0x222: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2223A3FF" - -# 0x223: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2233D001" - -# 0x224: CMP R01, 0x98 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2240F981" - -# 0x225: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2253A3FF" - -# 0x226: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2263D001" - -# 0x227: CMP R01, 0x31 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2270F311" - -# 0x228: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2283A3FF" - -# 0x229: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2293E000" - -# 0x22A: MOV R00, 0xA5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22A03A50" - -# 0x22B: SWAP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22B2A000" - -# 0x22C: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22C3C000" - -# 0x22D: AND R00, 0x0F -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22D190F0" - -# 0x22E: CMP R00, 0x0A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22E0F0A0" - -# 0x22F: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22F3A3FF" - -# 0x230: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2303D000" - -# 0x231: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2313C000" - -# 0x232: AND R00, 0x0F -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "232190F0" - -# 0x233: CMP R00, 0x0A -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2330F0A0" - -# 0x234: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2343D001" - -# 0x235: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2353A3FF" - -# 0x236: SWAP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2362A001" - -# 0x237: MOV R02, 0x0F -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "237030F2" - -# 0x238: AND R01, R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23818021" - -# 0x239: CMP R01, 0x05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2390F051" - -# 0x23A: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23A3A3FF" - -# 0x23B: MOV R00, 0x05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23B03050" - -# 0x23C: MOV R02, 0xA0 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23C03A02" - -# 0x23D: SWAP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23D2A000" - -# 0x23E: OR R02, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23E1A002" - -# 0x23F: CMP R02, 0xF0 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23F0FF02" - -# 0x240: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2403A3FF" - -# 0x241: SWAP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2412A000" - -# 0x242: OR R00, 0x50 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2421B500" - -# 0x243: CMP R00, 0x55 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2430F550" - -# 0x244: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2443A3FF" - -# 0x245: MOV R01, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24503011" - -# 0x246: MOV R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24603010" - -# 0x247: XOR R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2471D010" - -# 0x248: JNZ 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "248323FF" - -# 0x249: XOR R00, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2491C010" - -# 0x24A: CMP R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24A0F010" - -# 0x24B: JNE 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24B3A3FF" - -# 0x24C: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24C3E000" - -# 0x24D: MOV R00, 0x03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24D03030" - -# 0x24E: COUT (0x03), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24E26030" - -# 0x24F: XIN R00, (0x02) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24F28020" - -# 0x250: OR R00, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2501B010" - -# 0x251: XOUT (0x02), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25124020" - -# 0x252: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25200000" - -# 0x253: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25300000" - -# 0x254: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25400000" - -# 0x255: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25500000" - -# 0x256: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25600000" - -# 0x257: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25700000" - -# 0x258: XIN R00, (0x02) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25828020" - -# 0x259: AND R00, 0xFE -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25919FE0" - -# 0x25A: XOUT (0x02), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25A24020" - -# 0x25B: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25B00000" - -# 0x25C: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25C00000" - -# 0x25D: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25D00000" - -# 0x25E: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25E00000" - -# 0x25F: CIN R00, (0x03) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25F29030" - -# 0x260: OR R00, 0x80 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2601B800" - -# 0x261: COUT (0x03), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26126030" - -# 0x262: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26200000" - -# 0x263: CIN R00, (0x03) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26329030" - -# 0x264: OR R00, 0x80 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2641B800" - -# 0x265: COUT (0x03), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26526030" - -# 0x266: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26600000" - -# 0x267: CIN R00, (0x03) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26729030" - -# 0x268: OR R00, 0x80 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2681B800" - -# 0x269: COUT (0x03), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26926030" - -# 0x26A: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26A00000" - -# 0x26B: CIN R00, (0x03) -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26B29030" - -# 0x26C: OR R00, 0x80 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26C1B800" - -# 0x26D: COUT (0x03), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26D26030" - -# 0x26E: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26E00000" - -# 0x26F: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26F00000" - -# 0x270: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27000000" - -# 0x271: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27100000" - -# 0x272: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27200000" - -# 0x273: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27300000" - -# 0x274: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27400000" - -# 0x275: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27500000" - -# 0x276: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27600000" - -# 0x277: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2773E000" - -# 0x278: SUB R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27815000" - -# 0x279: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "279333FF" - -# 0x27A: SETC -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27A2B000" - -# 0x27B: JNC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27B343FF" - -# 0x27C: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27C00000" - -# 0x27D: SUB R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27D15000" - -# 0x27E: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27E333FF" - -# 0x27F: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27F03000" - -# 0x280: CLRC -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28015000" - -# 0x281: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "281333FF" - -# 0x282: SETC -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2822B000" - -# 0x283: JNC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "283343FF" - -# 0x284: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28400000" - -# 0x285: CLRC -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28515000" - -# 0x286: JC 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "286333FF" - -# 0x287: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2873E000" - -# 0x288: INC R14 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2881101E" - -# 0x289: RETI -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2893F000" - -# 0x28A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28A00000" - -# 0x28B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28B00000" - -# 0x28C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28C00000" - -# 0x28D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28D00000" - -# 0x28E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28E00000" - -# 0x28F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28F00000" - -# 0x290: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29000000" - -# 0x291: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29100000" - -# 0x292: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29200000" - -# 0x293: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29300000" - -# 0x294: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29400000" - -# 0x295: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29500000" - -# 0x296: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29600000" - -# 0x297: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29700000" - -# 0x298: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29800000" - -# 0x299: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29900000" - -# 0x29A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29A00000" - -# 0x29B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29B00000" - -# 0x29C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29C00000" - -# 0x29D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29D00000" - -# 0x29E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29E00000" - -# 0x29F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29F00000" - -# 0x2A0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A000000" - -# 0x2A1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A100000" - -# 0x2A2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A200000" - -# 0x2A3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A300000" - -# 0x2A4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A400000" - -# 0x2A5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A500000" - -# 0x2A6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A600000" - -# 0x2A7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A700000" - -# 0x2A8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A800000" - -# 0x2A9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A900000" - -# 0x2AA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AA00000" - -# 0x2AB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AB00000" - -# 0x2AC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AC00000" - -# 0x2AD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AD00000" - -# 0x2AE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AE00000" - -# 0x2AF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AF00000" - -# 0x2B0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B000000" - -# 0x2B1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B100000" - -# 0x2B2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B200000" - -# 0x2B3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B300000" - -# 0x2B4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B400000" - -# 0x2B5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B500000" - -# 0x2B6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B600000" - -# 0x2B7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B700000" - -# 0x2B8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B800000" - -# 0x2B9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B900000" - -# 0x2BA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BA00000" - -# 0x2BB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BB00000" - -# 0x2BC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BC00000" - -# 0x2BD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BD00000" - -# 0x2BE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BE00000" - -# 0x2BF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BF00000" - -# 0x2C0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C000000" - -# 0x2C1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C100000" - -# 0x2C2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C200000" - -# 0x2C3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C300000" - -# 0x2C4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C400000" - -# 0x2C5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C500000" - -# 0x2C6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C600000" - -# 0x2C7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C700000" - -# 0x2C8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C800000" - -# 0x2C9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C900000" - -# 0x2CA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CA00000" - -# 0x2CB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CB00000" - -# 0x2CC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CC00000" - -# 0x2CD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CD00000" - -# 0x2CE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CE00000" - -# 0x2CF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CF00000" - -# 0x2D0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D000000" - -# 0x2D1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D100000" - -# 0x2D2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D200000" - -# 0x2D3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D300000" - -# 0x2D4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D400000" - -# 0x2D5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D500000" - -# 0x2D6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D600000" - -# 0x2D7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D700000" - -# 0x2D8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D800000" - -# 0x2D9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D900000" - -# 0x2DA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DA00000" - -# 0x2DB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DB00000" - -# 0x2DC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DC00000" - -# 0x2DD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DD00000" - -# 0x2DE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DE00000" - -# 0x2DF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DF00000" - -# 0x2E0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E000000" - -# 0x2E1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E100000" - -# 0x2E2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E200000" - -# 0x2E3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E300000" - -# 0x2E4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E400000" - -# 0x2E5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E500000" - -# 0x2E6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E600000" - -# 0x2E7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E700000" - -# 0x2E8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E800000" - -# 0x2E9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E900000" - -# 0x2EA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EA00000" - -# 0x2EB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EB00000" - -# 0x2EC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EC00000" - -# 0x2ED: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2ED00000" - -# 0x2EE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EE00000" - -# 0x2EF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EF00000" - -# 0x2F0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F000000" - -# 0x2F1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F100000" - -# 0x2F2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F200000" - -# 0x2F3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F300000" - -# 0x2F4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F400000" - -# 0x2F5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F500000" - -# 0x2F6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F600000" - -# 0x2F7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F700000" - -# 0x2F8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F800000" - -# 0x2F9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F900000" - -# 0x2FA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FA00000" - -# 0x2FB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FB00000" - -# 0x2FC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FC00000" - -# 0x2FD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FD00000" - -# 0x2FE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FE00000" - -# 0x2FF: JMP 0x2FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FF302FF" - -# 0x300: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30000000" - -# 0x301: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30100000" - -# 0x302: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30200000" - -# 0x303: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30300000" - -# 0x304: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30400000" - -# 0x305: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30500000" - -# 0x306: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30600000" - -# 0x307: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30700000" - -# 0x308: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30800000" - -# 0x309: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30900000" - -# 0x30A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30A00000" - -# 0x30B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30B00000" - -# 0x30C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30C00000" - -# 0x30D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30D00000" - -# 0x30E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30E00000" - -# 0x30F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30F00000" - -# 0x310: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31000000" - -# 0x311: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31100000" - -# 0x312: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31200000" - -# 0x313: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31300000" - -# 0x314: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31400000" - -# 0x315: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31500000" - -# 0x316: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31600000" - -# 0x317: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31700000" - -# 0x318: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31800000" - -# 0x319: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31900000" - -# 0x31A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31A00000" - -# 0x31B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31B00000" - -# 0x31C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31C00000" - -# 0x31D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31D00000" - -# 0x31E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31E00000" - -# 0x31F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31F00000" - -# 0x320: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32000000" - -# 0x321: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32100000" - -# 0x322: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32200000" - -# 0x323: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32300000" - -# 0x324: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32400000" - -# 0x325: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32500000" - -# 0x326: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32600000" - -# 0x327: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32700000" - -# 0x328: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32800000" - -# 0x329: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32900000" - -# 0x32A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32A00000" - -# 0x32B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32B00000" - -# 0x32C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32C00000" - -# 0x32D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32D00000" - -# 0x32E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32E00000" - -# 0x32F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32F00000" - -# 0x330: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33000000" - -# 0x331: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33100000" - -# 0x332: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33200000" - -# 0x333: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33300000" - -# 0x334: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33400000" - -# 0x335: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33500000" - -# 0x336: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33600000" - -# 0x337: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33700000" - -# 0x338: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33800000" - -# 0x339: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33900000" - -# 0x33A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33A00000" - -# 0x33B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33B00000" - -# 0x33C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33C00000" - -# 0x33D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33D00000" - -# 0x33E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33E00000" - -# 0x33F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33F00000" - -# 0x340: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34000000" - -# 0x341: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34100000" - -# 0x342: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34200000" - -# 0x343: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34300000" - -# 0x344: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34400000" - -# 0x345: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34500000" - -# 0x346: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34600000" - -# 0x347: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34700000" - -# 0x348: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34800000" - -# 0x349: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34900000" - -# 0x34A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34A00000" - -# 0x34B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34B00000" - -# 0x34C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34C00000" - -# 0x34D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34D00000" - -# 0x34E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34E00000" - -# 0x34F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34F00000" - -# 0x350: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35000000" - -# 0x351: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35100000" - -# 0x352: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35200000" - -# 0x353: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35300000" - -# 0x354: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35400000" - -# 0x355: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35500000" - -# 0x356: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35600000" - -# 0x357: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35700000" - -# 0x358: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35800000" - -# 0x359: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35900000" - -# 0x35A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35A00000" - -# 0x35B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35B00000" - -# 0x35C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35C00000" - -# 0x35D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35D00000" - -# 0x35E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35E00000" - -# 0x35F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35F00000" - -# 0x360: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36000000" - -# 0x361: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36100000" - -# 0x362: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36200000" - -# 0x363: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36300000" - -# 0x364: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36400000" - -# 0x365: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36500000" - -# 0x366: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36600000" - -# 0x367: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36700000" - -# 0x368: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36800000" - -# 0x369: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36900000" - -# 0x36A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36A00000" - -# 0x36B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36B00000" - -# 0x36C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36C00000" - -# 0x36D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36D00000" - -# 0x36E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36E00000" - -# 0x36F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36F00000" - -# 0x370: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37000000" - -# 0x371: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37100000" - -# 0x372: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37200000" - -# 0x373: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37300000" - -# 0x374: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37400000" - -# 0x375: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37500000" - -# 0x376: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37600000" - -# 0x377: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37700000" - -# 0x378: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37800000" - -# 0x379: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37900000" - -# 0x37A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37A00000" - -# 0x37B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37B00000" - -# 0x37C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37C00000" - -# 0x37D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37D00000" - -# 0x37E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37E00000" - -# 0x37F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37F00000" - -# 0x380: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38000000" - -# 0x381: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38100000" - -# 0x382: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38200000" - -# 0x383: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38300000" - -# 0x384: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38400000" - -# 0x385: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38500000" - -# 0x386: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38600000" - -# 0x387: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38700000" - -# 0x388: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38800000" - -# 0x389: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38900000" - -# 0x38A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38A00000" - -# 0x38B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38B00000" - -# 0x38C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38C00000" - -# 0x38D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38D00000" - -# 0x38E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38E00000" - -# 0x38F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38F00000" - -# 0x390: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39000000" - -# 0x391: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39100000" - -# 0x392: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39200000" - -# 0x393: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39300000" - -# 0x394: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39400000" - -# 0x395: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39500000" - -# 0x396: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39600000" - -# 0x397: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39700000" - -# 0x398: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39800000" - -# 0x399: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39900000" - -# 0x39A: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39A00000" - -# 0x39B: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39B00000" - -# 0x39C: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39C00000" - -# 0x39D: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39D00000" - -# 0x39E: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39E00000" - -# 0x39F: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39F00000" - -# 0x3A0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A000000" - -# 0x3A1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A100000" - -# 0x3A2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A200000" - -# 0x3A3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A300000" - -# 0x3A4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A400000" - -# 0x3A5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A500000" - -# 0x3A6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A600000" - -# 0x3A7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A700000" - -# 0x3A8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A800000" - -# 0x3A9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A900000" - -# 0x3AA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AA00000" - -# 0x3AB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AB00000" - -# 0x3AC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AC00000" - -# 0x3AD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AD00000" - -# 0x3AE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AE00000" - -# 0x3AF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AF00000" - -# 0x3B0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B000000" - -# 0x3B1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B100000" - -# 0x3B2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B200000" - -# 0x3B3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B300000" - -# 0x3B4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B400000" - -# 0x3B5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B500000" - -# 0x3B6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B600000" - -# 0x3B7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B700000" - -# 0x3B8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B800000" - -# 0x3B9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B900000" - -# 0x3BA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BA00000" - -# 0x3BB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BB00000" - -# 0x3BC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BC00000" - -# 0x3BD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BD00000" - -# 0x3BE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BE00000" - -# 0x3BF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BF00000" - -# 0x3C0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C000000" - -# 0x3C1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C100000" - -# 0x3C2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C200000" - -# 0x3C3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C300000" - -# 0x3C4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C400000" - -# 0x3C5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C500000" - -# 0x3C6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C600000" - -# 0x3C7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C700000" - -# 0x3C8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C800000" - -# 0x3C9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C900000" - -# 0x3CA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CA00000" - -# 0x3CB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CB00000" - -# 0x3CC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CC00000" - -# 0x3CD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CD00000" - -# 0x3CE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CE00000" - -# 0x3CF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CF00000" - -# 0x3D0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D000000" - -# 0x3D1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D100000" - -# 0x3D2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D200000" - -# 0x3D3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D300000" - -# 0x3D4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D400000" - -# 0x3D5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D500000" - -# 0x3D6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D600000" - -# 0x3D7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D700000" - -# 0x3D8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D800000" - -# 0x3D9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D900000" - -# 0x3DA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DA00000" - -# 0x3DB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DB00000" - -# 0x3DC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DC00000" - -# 0x3DD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DD00000" - -# 0x3DE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DE00000" - -# 0x3DF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DF00000" - -# 0x3E0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E000000" - -# 0x3E1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E100000" - -# 0x3E2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E200000" - -# 0x3E3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E300000" - -# 0x3E4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E400000" - -# 0x3E5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E500000" - -# 0x3E6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E600000" - -# 0x3E7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E700000" - -# 0x3E8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E800000" - -# 0x3E9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E900000" - -# 0x3EA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EA00000" - -# 0x3EB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EB00000" - -# 0x3EC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EC00000" - -# 0x3ED: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3ED00000" - -# 0x3EE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EE00000" - -# 0x3EF: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EF00000" - -# 0x3F0: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F000000" - -# 0x3F1: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F100000" - -# 0x3F2: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F200000" - -# 0x3F3: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F300000" - -# 0x3F4: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F400000" - -# 0x3F5: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F500000" - -# 0x3F6: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F600000" - -# 0x3F7: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F700000" - -# 0x3F8: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F800000" - -# 0x3F9: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F900000" - -# 0x3FA: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FA00000" - -# 0x3FB: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FB00000" - -# 0x3FC: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FC00000" - -# 0x3FD: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FD00000" - -# 0x3FE: -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FE00000" - -# 0x3FF: JMP 0x3FF -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FF303FF" - -# Assembled from itest.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA -# User 2 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] - -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0048" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0161" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "026C" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "036C" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "046F" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9A00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9B00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9C00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9D00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9E00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "9F00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "A900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "AA00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "AB00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "AC00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "AD00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "AE00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "AF00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "B900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "BA00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "BB00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "BC00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "BD00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "BE00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "BF00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "C900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "CA00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "CB00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "CC00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "CD00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "CE00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "CF00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "D900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "DA00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "DB00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "DC00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "DD00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "DE00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "DF00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "E900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "EA00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "EB00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "EC00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "ED00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "EE00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "EF00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F500" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F600" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F700" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F800" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "F900" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "FA00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "FB00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "FC00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "FD00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "FE00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "FF00" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "10000" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "10100" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "10200" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "10300" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "10400" -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "10500" - -::chipscope::csejtag_target unlock $handle -::chipscope::csejtag_target close $handle -::chipscope::csejtag_session destroy $handle -exit diff --git a/lib/CPUs/JCpu/asm/make b/lib/CPUs/JCpu/asm/make deleted file mode 100644 index e7f598f..0000000 --- a/lib/CPUs/JCpu/asm/make +++ /dev/null @@ -1,50 +0,0 @@ -#!/bin/sh - -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: rom-file generation for cpu_core -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -TARGET=$2 -DSTDIR=$1 - -JASM_HOME=/cygdrive/w/vhdl/lib/CPUs/JCpu/tools - -$JASM_HOME/jasm.rb $TARGET.jsm - -irom_tcl_snippet="$TARGET.irom.tcl.snip" -irom_vhdl_snippet="$TARGET.irom.vhdl.snip" -irom_ld_vhdl_snippet="$TARGET.irom_ld.vhdl.snip" -xrom_tcl_snippet="$TARGET.xrom.tcl.snip" -xrom_vhdl_snippet="$TARGET.xrom.vhdl.snip" -xrom_ld_vhdl_snippet="$TARGET.xrom_ld.vhdl.snip" - -$JASM_HOME/insrom.rb $irom_vhdl_snippet $JASM_HOME/irom.vhd.tpl >$DSTDIR/$TARGET\_irom.vhdl -$JASM_HOME/insrom.rb $irom_ld_vhdl_snippet $JASM_HOME/irom_ld.vhd.tpl >$DSTDIR/$TARGET\_irom_ld.vhdl - -$JASM_HOME/insrom.rb $xrom_vhdl_snippet $JASM_HOME/xrom.vhd.tpl >$DSTDIR/$TARGET\_xrom.vhdl -$JASM_HOME/insrom.rb $xrom_ld_vhdl_snippet $JASM_HOME/xrom_ld.vhd.tpl >$DSTDIR/$TARGET\_xrom_ld.vhdl - -cat $irom_tcl_snippet > $TARGET.tcl.snip.snip -cat $xrom_tcl_snippet >> $TARGET.tcl.snip.snip -$JASM_HOME/insrom.rb $TARGET.tcl.snip.snip $JASM_HOME/rom.tcl.tpl >$TARGET.tcl - -rm -f *.snip diff --git a/lib/CPUs/JCpu/asm/mul8x8.jsm b/lib/CPUs/JCpu/asm/mul8x8.jsm deleted file mode 100644 index c9b6c3b..0000000 --- a/lib/CPUs/JCpu/asm/mul8x8.jsm +++ /dev/null @@ -1,29 +0,0 @@ -; ------------------------------------------------- -; Constants -; ------------------------------------------------- - -; Chip register -include "../../../jasm/cregs.inc.jsm" - -; ------------------------------------------------- -; Program -; ------------------------------------------------- - code - org 0x000 -reset: jmp init - -; ------------------------------------------------- -; Main -; ------------------------------------------------- -init: mov R0, 0x45 - mov R1, 0xF5 - - call mul8x8 -stop: jmp stop - - -; ------------------------------------------------- -include "../../../jasm/mul8x8.inc.jsm" - - - \ No newline at end of file diff --git a/lib/CPUs/JCpu/asm/mul8x8.tcl b/lib/CPUs/JCpu/asm/mul8x8.tcl deleted file mode 100644 index 6bec87e..0000000 --- a/lib/CPUs/JCpu/asm/mul8x8.tcl +++ /dev/null @@ -1,154 +0,0 @@ -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: The ROM file for upload to target over JTAG -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -# --------------------------------------------------------------------- -# For Chipscope 9.1 -# --------------------------------------------------------------------- -# Source JTAG/TCL frame work -cd $env(CHIPSCOPE)\\bin\\nt -source csejtag.tcl - -namespace import ::chipscope::* - -# Platform USB Cable -set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] -# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" - -# Create session -set handle [::chipscope::csejtag_session create 0] - -# Open JTAG and lock -set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] -set lock_result [::chipscope::csejtag_target lock $handle 1000] - -set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] - -# Get Device ID -set devtype "Virtex-4SX" -set devid 2 -set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] -set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] - -set CSE_OP $CSEJTAG_SHIFT_READWRITE -set CSE_ES $CSEJTAG_RUN_TEST_IDLE - -# Write Program -# JASM_ROM_INSERT_HERE -# Assembled from mul8x8.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA -# User 1 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] - -# 0x000: JMP 0x001 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030001" - -# 0x001: MOV R00, 0x45 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00103450" - -# 0x002: MOV R01, 0xF5 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00203F51" - -# 0x003: CALL 0x005 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0033B005" - -# 0x004: JMP 0x004 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00430004" - -# 0x005: PUSH R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0053C002" - -# 0x006: PUSH R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0063C003" - -# 0x007: PUSH R04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0073C004" - -# 0x008: MOV R04, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00802014" - -# 0x009: MOV R01, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00903001" - -# 0x00A: MOV R02, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A03002" - -# 0x00B: MOV R03, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B03003" - -# 0x00C: CMP R04, 0x01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C0F014" - -# 0x00D: JEQ 0x015 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D39015" - -# 0x00E: SHR R04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E1F004" - -# 0x00F: JNC 0x012 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F34012" - -# 0x010: ADD R02, R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01010002" - -# 0x011: ADDC R03, R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01112013" - -# 0x012: SHL R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0121E000" - -# 0x013: ROLC R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01322001" - -# 0x014: JMP 0x00C -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0143000C" - -# 0x015: ADD R00, R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01510020" - -# 0x016: ADDC R01, R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01612031" - -# 0x017: POP R04 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0173D004" - -# 0x018: POP R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0183D003" - -# 0x019: POP R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0193D002" - -# 0x01A: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A3E000" - -# Assembled from mul8x8.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA -# User 2 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] - - -::chipscope::csejtag_target unlock $handle -::chipscope::csejtag_target close $handle -::chipscope::csejtag_session destroy $handle -exit diff --git a/lib/CPUs/JCpu/asm/reti_issue.jsm b/lib/CPUs/JCpu/asm/reti_issue.jsm deleted file mode 100644 index 78edc49..0000000 --- a/lib/CPUs/JCpu/asm/reti_issue.jsm +++ /dev/null @@ -1,50 +0,0 @@ -; ------------------------------------------------- -; Constants -; ------------------------------------------------- - -; Chip register -cpu_revision: equ 0x00 ; RO -cpu_control: equ 0x01 ; R/W -cpu_status: equ 0x02 ; RO -cpu_int_ctrl: equ 0x03 ; R/W - -; ------------------------------------------------- -; Program -; ------------------------------------------------- - code -reset: jmp init - - org 0x001 -; nop - reti - -; ------------------------------------------------- -; Main -; ------------------------------------------------- -init: mov R0, 0x05 - cout (cpu_int_ctrl), R0 - mov R0, 0x00 -loop: nop - inc R0 - nop - call subr - nop - push R3 - nop - push R2 - nop - push R1 - nop - push R0 - nop - pop R0 - nop - pop R1 - nop - pop R2 - nop - pop R3 - nop - jmp loop - -subr: ret diff --git a/lib/CPUs/JCpu/asm/reti_issue.tcl b/lib/CPUs/JCpu/asm/reti_issue.tcl deleted file mode 100644 index 5da9c56..0000000 --- a/lib/CPUs/JCpu/asm/reti_issue.tcl +++ /dev/null @@ -1,157 +0,0 @@ -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: The ROM file for upload to target over JTAG -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -# --------------------------------------------------------------------- -# For Chipscope 9.1 -# --------------------------------------------------------------------- -# Source JTAG/TCL frame work -cd $env(CHIPSCOPE)\\bin\\nt -source csejtag.tcl - -namespace import ::chipscope::* - -# Platform USB Cable -set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] -# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" - -# Create session -set handle [::chipscope::csejtag_session create 0] - -# Open JTAG and lock -set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] -set lock_result [::chipscope::csejtag_target lock $handle 1000] - -set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] - -# Get Device ID -set devtype "Virtex-4SX" -set devid 2 -set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] -set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] - -set CSE_OP $CSEJTAG_SHIFT_READWRITE -set CSE_ES $CSEJTAG_RUN_TEST_IDLE - -# Write Program -# JASM_ROM_INSERT_HERE -# Assembled from reti_issue.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA -# User 1 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] - -# 0x000: JMP 0x002 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030002" - -# 0x001: RETI -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013F000" - -# 0x002: MOV R00, 0x05 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00203050" - -# 0x003: COUT (0x03), R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00326030" - -# 0x004: MOV R00, 0x00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00403000" - -# 0x005: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00500000" - -# 0x006: INC R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00611010" - -# 0x007: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00700000" - -# 0x008: CALL 0x01B -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0083B01B" - -# 0x009: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00900000" - -# 0x00A: PUSH R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A3C003" - -# 0x00B: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B00000" - -# 0x00C: PUSH R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C3C002" - -# 0x00D: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D00000" - -# 0x00E: PUSH R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E3C001" - -# 0x00F: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F00000" - -# 0x010: PUSH R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103C000" - -# 0x011: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01100000" - -# 0x012: POP R00 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0123D000" - -# 0x013: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01300000" - -# 0x014: POP R01 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0143D001" - -# 0x015: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01500000" - -# 0x016: POP R02 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0163D002" - -# 0x017: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01700000" - -# 0x018: POP R03 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0183D003" - -# 0x019: NOP -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01900000" - -# 0x01A: JMP 0x005 -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A30005" - -# 0x01B: RET -::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B3E000" - -# Assembled from reti_issue.jsm -# --------------------------------------------------------------- -# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA -# User 2 -set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] - - -::chipscope::csejtag_target unlock $handle -::chipscope::csejtag_target close $handle -::chipscope::csejtag_session destroy $handle -exit diff --git a/lib/CPUs/JCpu/doc/block_diagram.png b/lib/CPUs/JCpu/doc/block_diagram.png deleted file mode 100644 index 14bbb546864ab27695f53a12755b96921ad898a9..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 8026 zcmZ8m2UJtf(g*)4N>ve2M3LST1qCBj2t~S7fk+gjOMpa$NQnwk1%Z%61VKb8(xeH2 z0Mb(^g3_BxE)i*RQ7{nT!}s3z&Ue0ZX7A4K&g{;5yuXkGqgG`+< zTwH=}e+ze4VBsw;uG0%w;Fs+~#}+300#6RV;0jW@)4sPjl>fWChlo0ae{LYka*y+g zyJ~{AH~jTaBJb0R99vyTr>l$G>f`2fOFqzZ<7^LK3q8~_(R`!92dcAI*7MlixFZ>D zr}yMJTm3thfAaFme&{A_%I6mOFBE5MFT(Z4BN4fH}k3+M4*JN4WIaUIvT zUEP5mxuX7ok|VCO``iKXB5?V*?M&8MuDumtuPcDP`HW&%LP@I1lD3}`hXj6Ap632} z9+vn<{A>)ulba_*%wYYi>SF)vlt8gkhW@NOa!1QZm2{$!qGdLv$Z~+6UdBD-{Sw2; zHAqX$N2CoqeH~a(o~&f*u@6x+L&^>ok3rS{0rjr$W07Zk03&Htb?GaK%0cJs-ZQjU z`AgC<`PxGgCkfMAdv3qm?5CGLNt0{-nu0?N0~c0(Dv{f_PL))tr_vkd+68=9j)fjf zMM8?b>Eu^o=!(ir?vp=0AHl?*@hoE=bNbMH5s1B)QH4U^^COdq%@@6&8yDA6ns_z5 zkTtFyvBf|7Cn)`vEf2ZJBIkJP7=w9)#Qce3c{MkwrAV82$1=6SGRktfL@j`V{qoK4 z-J;#JUUHo6eE2R5mxIm?dMo}-G1d?W$O6PG(45(SZD2AO#OSGs>*-+=cX%q$=sZBn zeHRVitWUb>e=*4;i2g_5UqYmR1j{F~kgx}5;+;^C2iiB8vmX%4Evj6DGPlXB+0VE5 z_^>>WPDpF=4BZz3mF)M81oib48F*Z?6U*0LQ`XVsQFGN{%S*f^+?mkPEO4B%Jnb+t zV+uG{vhMyJ47bk4<`XgIOJvw@XkzQv9!}(I^k{l>32Rmyd^%tMFD2r$wj3F6DMI2o zEs6UK$!5e5uq$6f37!A*C=8X%NA5q@YERE^=6w|E zCTuY~(@u2YNp;syaEdiVQ#7B#ds#aOWo31ra*vAkLX*j7fqe%?XuxbM!CI|NBtJ{q zQFj!p@Ye%kRrKT>w@(p1`Q-K+0OxysCCmVOt2l~&Nmd^C4&buIUIgJhbl(yCsQjo` zqymvb=1n^po5-c2O2+xbvp0@ix{rO!3G)moJt1wK9a;05*1QOLD^=7TID4K#qx9)$SbCPVyagXoP2e*GUsxcBFXO> z?J^hkpW4Hs>)#mubu`HePb=ULy+hNKfDg@&qf4hvt0SMwS~sCM3i34k^chFpiWl%} z?hK0l?JUt(zOHgX%J9$G|MhQ^Go*44ner3f00NM5dhEK97~*}{!Ba?@eYopBO;$q) zTevo>=kVqco)fkDv&X?M@}qq7rLGmBK#WvAxIWE{d^b=n)up)em8FtH|FGLP=()tB zsY1rMs9YaaXRfKp#gjN*37haja;YvJvRaSmaCQrZV(gOrGlqXWt!u3J&q|yZx#u57 zRQ@)q^h&4y;bx25xD?X+U7Bd)=0~yE>^`aTb$KVNu7tmFVE1hq+@Ay$M1xYxuW$qW z5KxPBuYKU-VUk^>&`EY5#{bCjCHh@b`HbD{>i9tZe0S^h$Tol0=0_l7A}zgKVCP8i zJaKr3mFk;lBF*Z8t{z}|LvNeQ;({Uk@vBiE0bMW5+Ty%qfVm8surivhcXA-x#C5h{ zGFxcQaE0guTMp)%1@}~dN)@1-Dn^V2jT{FBp4hsb4kc=I+iuZz5;DX$h`3WP5Q|hG ze5b1H!y*hP4UsfpyUJ_wbbd)hC<))t5KZM=m@`M&M6Ovp$S@i~*EFazNf6I%W_I%^ zBA7}{v4gID?Qc!i#pm455-QET5LX^f8AU{cAIPw7Amx9f=zqiM|7F7C5KKgEd8=F5 zJ(;23%E3QL&9c{v^sb~S;I6wMzQ(Jpk~+qhQE9Tvv$Ix1?Hnp-iotjonLF%Ah&l*t zmAKLI3OQ33cAgL%bBb{7_g|%Gix+xm;#Y zvgQ}2?o7Y=8Jkn(soTLGdlTe`)@mat3Q}9bX%XI3<*<5AwyO856jvcic-rCpOh44L z(&}rw$PDkQWHk~?3g5hRO!e(4)rkk;*7)^rh)Yl2#Y{O*3Qu3I%~x3cLUAyhk0||i z|MBEF?!m$(?fU2=SlRw_U%;kbc4 z73dgywvIb6-%ek=&U@k!vopHgL)1Kto+U%ZcvB1Z(q8OtqfE#W|CO`}vbxL_G;1jU zPUCB*7q`~K2tECe=xwHW5&G=4KlZww z*yUTEY1J1s`A+`XDL77BZKwY}dlhyB;4ebIWGos9z-hv-=?>Q+a#zy3t`HdYl+F}| z97zYr577M)9Q(u`))Mir!0I8}CstK^@gchRqWrL=onU-=RMV;mld6^cssKF84A|5* z&$fq|9+6x2ig~N%3!)<5IP=xZ-VztZ-iz*0ktR4bT(#p9Q#ES`4Qli0?R0Kmbnj9s z*iM&pMt|J-=NxE-`)bGj3{*~5yo;ulwk|z68q+)@&NDzjbY z7Q0LVNve@fjje?(HV%BQE8MGQZxtr>7t4Q>1SaTJnx@=(-l z(&snp+;JXY?mK`h-x-m!>UDXedRPvs2kX+yn0C8FZm5S7Io9FNS)bH5(v!YP9=E#sqPC&zQZIx&_G_P6J zr+M(l?+Rvj9cX3m*?Y*FAW`lHen&(aQS!o|(x9%$3z3tDUamFL-=?K3VZL0pu$ z3h}ch=|H{a+y;^A_4*lnXS~J1CDuq*7AMZ`W!k#a`ypL)lb?d=C1y91fhb%KRBqT_ zb66jXoU|;fEEJb1I8*-9*E2-*SdS_!Tf1ywD&92vxOJ~mLq;5PCD`wK!fDlz1L=t_ z0tCA?h3}!)ES1y>suQ$Kiw~R%;H%WCjT3)sjcS*DI{04ulvJ(W=`rQF85(zGlijIe z9lhgHwcbZf!+awW;?rTrHIToS3?E7lApl-A^XOjdbE(1R)0z9z8HUWpi?_rvlkrJ) zY0|WYavGKqR)xFsj%s1mq@FC!pSpe;-jy_t$LpOk5sZbKFPF#n@|oi^V>OHkPS%Q; zXCeL{g=nINEk>Ya3wrtqu;WaY+R@OWySahNKZN))?|9M+L zz}D4hM6M=4(!T7FGKu^Nn5`%O(>;cPVe2OlnogZ10ja_TjGns~UKDsj0_`y=?ueeb zzna5N$()}(`!@H&YBV^9j+jLJBTp`5M0~dKn9O>BN9Y}0?^hC=pIr-1z-%3w$&+_4 z(E4^szd@@ReWt3P!N{XEhT#qkDTD;he|o%%uwkbhCOtpkJ5kw%gs?`g&}VXK~m zB?%2WA@&v^2kC1mV$9%4B$Iez9N<`d(M;g+!x_#EUY)Cv(b)>2;|7l=8g+7FD9fF^ z?+%_cuyz~nD^W-bgk?2NM6|zA+#5?tlZS5`dtx`|7L<$M1eim*x72ZzoiCjGlSqLi zi>6S_`p~i(z?<`)`KAxbY69#|CMu6mCuhP}Ck{vex8u>^$skO6!kECeF!3^Dzc4UdIxp+nO?4)rViUEJQ)(cd8SW@RIKNIvnl=!Cw&Upzn_SGXo}S-&BjrUl}!8# z7c>(4nH>*rzNb{Y=8WqB6{(3R47a83PvG;RZgqOzdfEupAB9XQrSY5wZa{Ju%9z2# zu1UZQrHF>P7+xQWI^Nj4n$QtYSoz~ZY0T7>Bl64FTTPxLaQe-*cAav)5sXsvKl}UQ zq`<9GawYYf9Mstxo*@a+XDpmM%DU%?+Pe0ULWbl?PXWB%wP$7Fuf>$si58(<*liDf z;HC0TMlB^vuia*9up91d*p((9Lv2pT(P=((T|mUc+e5wMI7`y{+qf|8oScT;YD!c~ zG5lw0am6hS$bFi~lP*=_gibGauQcS4N8-UzL%|hNAAhRme&CfWO5vB|xz54kcb{qN zDU_36$OuGCxKn4Qz@}o?b7|hW&-Ml{i;aaC1^0P(v4hjW=vqXpV^g_h_?JWELoX;Z zhP|N-Tw*ClAF2O-#@R4uM|ujR6mUlEZUd@SPuJ7*CR?jxyfz^gCvNuz6UHA;{wmB3 zilNJkvw9vr{V30KP6{~Wfi2!NY%vr(w`eF*0<`%Ra;~n+C!c4}8v&;egvg1k678lL-%~)0tlM zML24Gqg2#FFo>vWi4-=$vd)v6_9a4`z;|PKTxvT4vUX4P6B7%E+?ag-EYP=R4$R|^ zqAD{~&Vdu2)!n5X0wY5<@UpCi1bSZ|UOGq57@)N8v1M-cSHhogt{UqzV;K=>SiHZ$ z;&Qx8M8DL$clht+LffR4ux5mw)Jc3JXcVh>-0DCuoj27ptW)yv z(&`0M z%;zY~IvR$VbT_!QLRHw2hUWl*Ez5fw-zc5`QV>X;x90jv8~i;!{#@IOzH@OMHK3^J zV&vgEW9jstMehB!0GW2HL-L7akCkvQUL&}BwI~}eNw92N9Wm5q|=noQ;jqZr7i6lRwShr~( zaS>=lkEdw<>B@35{DkTss9=q6fr4tnfv~iLp8`dabU&w*kE#0}c|>7<2&9SNcA_3@596eJ>E5YKE$^qP5p)k7c5?#_D)nYA9SLXNWAEJD z%kJkDa-_pnswcmWW>3^HIVNj-o}(>dyhjj$oy_!cleebz3u~sJ<#o4TtEvZxh(X+r zmX_-9maVrP>h5{<(_qO=TtJnY4>y4QZ2@D=kLRnBH)qcfwdb>D=H~3+f+^CE-OwV( z`F`#h`q&}jrlZ30Fg|EH+Jj+ z9kwWeW5%scIrEwK+K0{A6^QE$=mdT|9K~4l5m3nSWzZ5CIIYZ)M>}(J-kFWTxpq@J zds6OE1dQ=rHv`?iJ7xPQKa$h?R@MSVFz=OLJQE^b0XSBjw_QdG$yvWAluv1`FZM?W z9=mpae1K4UUp{?n4N{iQoovlYp7D0Rk1@`juI=?zE{!E~I=>gu)e_*3Pq?)^T%^PGP66<%q)u7C)zbr7KtIZO>Be zk}Y0rGO30!ZDR9Jq+?r{0A2!@Tbsb7&C56c`39elpYT`cM0aK2l!V^IG@U{Jz3cL* zA)<$DOvjInDP00SxZF0qQT$!Ct1*Dq*(?u^Jt0xzR2F;W3<`5Q;AhC+70V?-_iFU8 zm{MmWQ>wChc;iv`9KCe8@|Q9xg64mbF6@Rr;jG~kae4NRf8jHJ8K($ZhYwJ8!QPX? zRH{^PzSVYIx$+_NgPq_Z@{_!YDtUuuj=i8q`_G$P++B?x(hbXV|Ih~$ui!u*ze2KjB8K1;{S{oi;Dfk&EEQ21(-jq5MzoG6eipMZ zlHUOb+Ay3G@0FdFc~X!_W*H(urI$heyg#RsfoP1QLbIgwG9MPz8~~s&W>p*lX0&}v zq}Nyx=Zc>WVz(0BzRk8Zv_`enZUP0}v-yWry~bZPMN?Z8OWl<`=y^rCp4(qLBOlcO z-bo=}!+*oa6U7^jF2*r*xd&{fho<)hJ>0M53Y(Ib`Z~2j3My zUaNPP>OL&0M-um#c=es7P2U)2)sRxfZqg-QoG>pF7q80a>}Jv`In+2JCD>u-fM*l3 zipeKBBS}r&RU;yjm$xz|)xU9EfHuWp8zJ_Z0XqHtV;V0Jk&WN|ARwSUOz#l_`<7O< zF}^(c0{=S7X8f3WcH~_d_GPyl9vdPJPs@waWF9N$XfinYs!;U7=?nH7zjH=w?_wj# zU@nPs&2~_cdNK-}U(pXpR2&{VR(>%jd4e~oXA#yA!^_vz1b{6oSp%>Awx2}#A(9Dc;PFv&6BVl4!bF-hq-@EGjdx<%t-S9Q#WI&==EH!^mHdsHdUCoqhM&I)S!7g8W)O*(1 zuc|yc*fvWDnL66{><<%ISiIhgv0^GtPg^X6c5kg~dS~de?--MBFSZ;2&7>D)%g;Zl z3jHLZTscsXMN5E|!7bxf^QP%%0!7`L#;JTs9d)q?t?FZD0ufoKEwjgd zrWdrPdJjuHwK06$Sy>y--WhLb9)6#6k?V^hWQ$u8!j!$4k1{U2xzJMKc3bWhQAebe z^A7h?_D$qnTAR2_P(oG4WgqolM=pEqD4P2f&O^TF?PXSKPeDwmZoB%rVzo6m!6_`-SIU52*&3wA1}5oSH_;k_tXgxq9PQg3iZjgH1#pSQm-cWI_r)ZJZ{R8d2jr=hV#6Nlg~mM<4)4$lwFXq_0)v4 zb+G+Yy*!x03eJuTmCBLJv6h3XH!LyDzA#aFvY}wBwg|dwmB>))`bG8h0|pXrcpLGs zH7^s)XT17^*i!~OYOSr#$@0aR=S=7$8NEz>2=0wTBsZI5OJ8wFS3cA12UZm;#FiXj zi-Rz#r1HRXSC!`62fVN$dCyBHFFkp5%y0WNQVFnK-?67%JsQ$Xcz%hz_EA}4FFRV* zexT`Uwi$V?E}74O?~SIiTSj;!jLA!lc#7HQqOd!g0jdHotwEYUpGh!VvHY`iop}3& zhHHLla=pXi&O-b~6|%wgkm?y881?dL74ksN?Zo$&3a%}ARNq0049dL_Q(jJS6&Sm7 zPXjz90hp4M%a~i4G8&+hF1=xXx9>OiU-@#S8{x*ypv9t61a8} z%dlo=Zu^C!;>9!@qdp1~Hj7tw^Hv{>w;y-v9_`tOivLmBa@c>kw0tY7CcJusZ<`05 z(x*^9C4OSXkz6*L=U#cso;n-!9fmed#<$eLVbBhL+1?CKc}vYF}*s3&Y<=eJTIhOZI(}= zWou+u)`v%e-|qUeLxkeB{dDzvR41uwcoLPRcPpLa^U>k$dC$M87J!Lc(^%c>=IHUmGL~>8y=ZR)!Z-G z_6K==`(D3`+b7_eL<-)WcKR_DPz1ESKN$$cx+>_FjMskDm>Dqu9v(BZa`p<$b?B8+ zj#;@nA9PXqo8fOMIL){xw#a#f_&)DcEiGZ4x_ux)?>H?%$kdVl1fVa$i%y9WXZ{7< z7e8OnZ%@w|P=0zVGo8NE)O^`DE2l)fUlHeQp6^T8Jfvz0{l*t-i3#md(Tn$2{WanN zBj26YwZ@jqkF6Lcd*h|S^URVb6+Xl&EEHJAteD(pJ@ZUdIHl@nH5!0YBBu?%{UEcO zyTSMvmMob=Yhgl6lNBwY(ayG8GBT>shUH>3rajoY#EW5lsW^&rQ$)vTPtbZ2AHOJZ z$>#x;r0qvTGHM!2KQ;Ds4`|Kac_ zCh*E{vr@eii4JzvCEo4Asmh-4QDK<$XS_^r$EQYbzpV0upJ<5{2Fx$c$?;D21lV4; zFahN?h%tM{FPUD_047PE7B|wPTI8G{jeGYrM!Pz1mS~fk?(lbb^cRYi?r9{Q)2E^d zvirJ@Z1`5V&>JW6=P%iZDZjLu5jju&TDFgRS@6HW{67}?ENdzlQ?2qHH+gG60x42w R_xBh16(cKnnZb=m{{zZ`SOEY4 diff --git a/lib/CPUs/JCpu/doc/memory_map.png b/lib/CPUs/JCpu/doc/memory_map.png deleted file mode 100644 index 30a22a08a2c6fb8ce339c3d68920919a94977aed..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 3545 zcmbtXc{CJm+a61{Y}tvjjK)5iELqDwV~CiEv4$B!Qj%hV<`!re!uUW_mA(7?>+DPoO9pLb3fdyQySeyIAfw5P669ks=|58T|8; zaYzSRztfQ-tPT&ByjTWCJ6egr+|8yAj0g-*U&dX0V+X_XL^rFOWZ* z2koZun&b8Eq-fF#SMpq;J1ROmU2HQA53{Im*^&Z~s^X2%QD1cYD}t3X(Q7zq9Zdos zoE}+0FK1MJDJVCoI){PqSc{AsU1_Lnz;E5^Nq8zcxBE;%4mFiwDgXoG{;fofkl_qm zdsI0k`vxx&h-Pa19fqD4W@ztEgq??UV%+5{wy6R7lHyaMbT~!y?HjypZ z?w#MU`zC_wKvJHk2ki7<{Xb~`4f#Kb(`<3I`Ot~}>LZj3?p@THHFt3R0C^FjX(%4L z<5D8eVNn!@h``Z0CV8QkR-7_uY-KU%Ds}Nt@X7m~IIrBMW`+x`_D6h%eQXG5fyL@G zxnpa=eT`kU0$fwm*B!Cb+XJ3Z(R=EyhY7y-8R@j0n5{B%2DY%&(*jChez(a>_a z4yi=MrL5EB936TVP>9q=KkA?UnF25;9Iwvn8xxHiK4a1}bWoZ+Gd3o=%*_o8+cSF5 zuFeO@c)VXyZp=8}`>!i8XBIB%UQic5#|6>nbe$Aqx7nEkTp;Yvf9$nun0_+*t{}=C z)pb`ze@dLGm}|Z0Tb>@Y;Jz%+U!~AYVq^Y&O=C7W9zWcC?;cxoz#5aBUc>umQPau+ zANY^SWp;&ZS4tmyF>Z^7eW}dQciiLnuC;B?R98pV3BdIpGN!bZ#l(s8=zaw3 z;pyC|*XFq@Goo?@XBdNIihae&ViQ!w5%t}P&5j8qZ^r6=-zAU@tP-ns-G?Zi*B;R| zy4_NY8(_~Z2z%_mw_CJc{5ymrO{HBsQjLOfhcn^%;8R!i+gR`q-((hSMO4>iEQC6& z(;GjizKZcLuDZi9Qzi}wLY*4ud{s^-d~zjoMO&~M!rSE-7iUkD23w!6p8&`Ybk&D4 z5j3{Ez9*+AcsoK)%-gZzRT6e*(^)TEBP^6NgD53yCZ7{N^vWEEzY`e%9p02^z{YqN z3p2!VS@rxVUV(!&j!&;eWtEPBRerwd9;8To*)zOr9ooq0?j)#KS|P z^Ug^6X6Fn>3-Kk+^xRpSV@$m}oE2tOe%gJ@MJ-rgezz1#M;ywiY3J$QPDzqQwzz)^ z0&1$h!Qqip1%ASWB>&T-YGv*3+rzb7sL#D@dQ%j}@J3XGv3m}e#@Xz&dK|rUZhyxV zq#x$fHHr^Z&z!JbM8=-X^&Eoq6k!gr<`p#Je4YnV)t9HdVwA#m_!t>Wdsf%)L#-P) z3S>j@WIsj*{#Kh^Z|d`-BnUoh2{;Jcx?<9oWoUp(S$4ai>*s?Tj&x(`RS1Br2XDyY zC->DX4mFpBlPBly73NH|vn^JV2G_pdK>rj_CWR7A7E+ggEzoyL%XXVSB+jCN{tE2>EBn;{Hgj|^{O)Ca4qj(c`A=Tp|s+60j?L*dK8 z##=>Ph-u=MuYrw^mH>s*#^on3_TtDrkniSxkUZ)Hnyx*_U6@yWuKj%qG05)-nc!UB z#jc#cB7^JmG}bd(rCZ%zh(IGUzb=`IQd%a1un=C8uen7P18af~-j6v8vp+1V`y&iT zH~V#r{5MxXW9zMQsqIpm&hugQdy)ge?jTJf|K+E?J0ojEc12X#)0UsBb?Ue6wH}wc zVC@>bIt=t=%@avY?(naiUZ(c)2AJ9qd5r%f6(`Y_)rX&rBp%=4d~2N84FW2uonaSj zT$#3@0q=lUodPt9!@6a8%(OJMgRHFdJHp(tc2F?{_j~lr%Q}g(TdZ&bKBpwet_B`; z<1`#*laIJ5AF<};TXRaE3ctPYv2e{aNSE+rEloguI7FKoQ2f9958&$(@? za!9X;PxJ5%*x;7Fx#SS7MJjP~WcF;qocWdF?Av;Dl?4n))UDVhN78l4(UPxiPP$dO ze{J_T$PN5|MU(0@qP>@s9uSNx(x-~Oh_Zd4q50z&_99wkpx~+${q`a}77~Vq$aJC09r0krx>> z#p^^N+cA0R!y7n1x#PLv=3JF!gTPO|z7KXz&xH@PVa-j~BQNDzLdfYQ$DUU)(!z;q zFZY&~^WU}G;Fo%8k2_a5Qrd0t&v93!f*c&I!hd`mtMRw8k9}<@Oxdnr76^T|#rz|D z9-%DRvgBc~)3YKV*CHf%D!FG{@T8lAG!^g!1a?DY0mV@LcbBIgh&FAjps6;yr?eX4 z{oss^7b_5Y*>!ZDUvu`o-`?u|mg~_s{1ho8d@M%h43_n-5uu&@m|{&@`k*RLE@lw& z5`l6W$h<*-%=<^qPm+>b zG~`g6;iqwu=W-+Ca~E8wQQm)Z;=Z}%M0FVt@B1nzNC55+DMqWJwEuoAlZ%b$$*=61 z*-5JppKdnxD4NYlqJb;ynkN;GDDj{(z`JIb>aA;pZnexbNbeIXw`NoQHJ`{rb&eK; z#oK1tN`MOtRy8#&tjGQC%{Vk~q>gDSB~3wb+7&CAq*Uz##_yWOmFPTQx&dYR4dW-q z(2c@oKz*4QR%t^k*LmWVo7yq11=*b$@F?xc!G=U3t&#wnFk!Z)ZJ7hthV3o?$6lvw{OQAn(=+b_~*@#EK zjH+P=>kiiMkha3GnZyY;*Bc`R6rb=styjh8frn+TDXp$Ap`(i-{#(U=mFF6`&Rx5a zRI7B2&)uX7&wtsx!-`BT2D0?dK>Zmui9nAbFGpU=VJ=J6b)#)y=tsIEAse5pM^s}U`VrU U+3VN3fBt7MvrDG6##iJ12RA=#&;S4c diff --git a/lib/CPUs/JCpu/gpl-3.0.txt b/lib/CPUs/JCpu/gpl-3.0.txt deleted file mode 100644 index 94a9ed0..0000000 --- a/lib/CPUs/JCpu/gpl-3.0.txt +++ /dev/null @@ -1,674 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 3, 29 June 2007 - - Copyright (C) 2007 Free Software Foundation, Inc. - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The GNU General Public License is a free, copyleft license for -software and other kinds of works. - - The licenses for most software and other practical works are designed -to take away your freedom to share and change the works. By contrast, -the GNU General Public License is intended to guarantee your freedom to -share and change all versions of a program--to make sure it remains free -software for all its users. We, the Free Software Foundation, use the -GNU General Public License for most of our software; it applies also to -any other work released this way by its authors. You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -them if you wish), that you receive source code or can get it if you -want it, that you can change the software or use pieces of it in new -free programs, and that you know you can do these things. - - To protect your rights, we need to prevent others from denying you -these rights or asking you to surrender the rights. Therefore, you have -certain responsibilities if you distribute copies of the software, or if -you modify it: responsibilities to respect the freedom of others. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must pass on to the recipients the same -freedoms that you received. You must make sure that they, too, receive -or can get the source code. And you must show them these terms so they -know their rights. - - Developers that use the GNU GPL protect your rights with two steps: -(1) assert copyright on the software, and (2) offer you this License -giving you legal permission to copy, distribute and/or modify it. - - For the developers' and authors' protection, the GPL clearly explains -that there is no warranty for this free software. For both users' and -authors' sake, the GPL requires that modified versions be marked as -changed, so that their problems will not be attributed erroneously to -authors of previous versions. - - Some devices are designed to deny users access to install or run -modified versions of the software inside them, although the manufacturer -can do so. This is fundamentally incompatible with the aim of -protecting users' freedom to change the software. The systematic -pattern of such abuse occurs in the area of products for individuals to -use, which is precisely where it is most unacceptable. Therefore, we -have designed this version of the GPL to prohibit the practice for those -products. If such problems arise substantially in other domains, we -stand ready to extend this provision to those domains in future versions -of the GPL, as needed to protect the freedom of users. - - Finally, every program is threatened constantly by software patents. -States should not allow patents to restrict development and use of -software on general-purpose computers, but in those that do, we wish to -avoid the special danger that patents applied to a free program could -make it effectively proprietary. To prevent this, the GPL assures that -patents cannot be used to render the program non-free. - - The precise terms and conditions for copying, distribution and -modification follow. - - TERMS AND CONDITIONS - - 0. Definitions. - - "This License" refers to version 3 of the GNU General Public License. - - "Copyright" also means copyright-like laws that apply to other kinds of -works, such as semiconductor masks. - - "The Program" refers to any copyrightable work licensed under this -License. Each licensee is addressed as "you". "Licensees" and -"recipients" may be individuals or organizations. - - To "modify" a work means to copy from or adapt all or part of the work -in a fashion requiring copyright permission, other than the making of an -exact copy. The resulting work is called a "modified version" of the -earlier work or a work "based on" the earlier work. - - A "covered work" means either the unmodified Program or a work based -on the Program. - - To "propagate" a work means to do anything with it that, without -permission, would make you directly or secondarily liable for -infringement under applicable copyright law, except executing it on a -computer or modifying a private copy. Propagation includes copying, -distribution (with or without modification), making available to the -public, and in some countries other activities as well. - - To "convey" a work means any kind of propagation that enables other -parties to make or receive copies. Mere interaction with a user through -a computer network, with no transfer of a copy, is not conveying. - - An interactive user interface displays "Appropriate Legal Notices" -to the extent that it includes a convenient and prominently visible -feature that (1) displays an appropriate copyright notice, and (2) -tells the user that there is no warranty for the work (except to the -extent that warranties are provided), that licensees may convey the -work under this License, and how to view a copy of this License. If -the interface presents a list of user commands or options, such as a -menu, a prominent item in the list meets this criterion. - - 1. Source Code. - - The "source code" for a work means the preferred form of the work -for making modifications to it. "Object code" means any non-source -form of a work. - - A "Standard Interface" means an interface that either is an official -standard defined by a recognized standards body, or, in the case of -interfaces specified for a particular programming language, one that -is widely used among developers working in that language. - - The "System Libraries" of an executable work include anything, other -than the work as a whole, that (a) is included in the normal form of -packaging a Major Component, but which is not part of that Major -Component, and (b) serves only to enable use of the work with that -Major Component, or to implement a Standard Interface for which an -implementation is available to the public in source code form. A -"Major Component", in this context, means a major essential component -(kernel, window system, and so on) of the specific operating system -(if any) on which the executable work runs, or a compiler used to -produce the work, or an object code interpreter used to run it. - - The "Corresponding Source" for a work in object code form means all -the source code needed to generate, install, and (for an executable -work) run the object code and to modify the work, including scripts to -control those activities. However, it does not include the work's -System Libraries, or general-purpose tools or generally available free -programs which are used unmodified in performing those activities but -which are not part of the work. For example, Corresponding Source -includes interface definition files associated with source files for -the work, and the source code for shared libraries and dynamically -linked subprograms that the work is specifically designed to require, -such as by intimate data communication or control flow between those -subprograms and other parts of the work. - - The Corresponding Source need not include anything that users -can regenerate automatically from other parts of the Corresponding -Source. - - The Corresponding Source for a work in source code form is that -same work. - - 2. Basic Permissions. - - All rights granted under this License are granted for the term of -copyright on the Program, and are irrevocable provided the stated -conditions are met. This License explicitly affirms your unlimited -permission to run the unmodified Program. The output from running a -covered work is covered by this License only if the output, given its -content, constitutes a covered work. This License acknowledges your -rights of fair use or other equivalent, as provided by copyright law. - - You may make, run and propagate covered works that you do not -convey, without conditions so long as your license otherwise remains -in force. You may convey covered works to others for the sole purpose -of having them make modifications exclusively for you, or provide you -with facilities for running those works, provided that you comply with -the terms of this License in conveying all material for which you do -not control copyright. Those thus making or running the covered works -for you must do so exclusively on your behalf, under your direction -and control, on terms that prohibit them from making any copies of -your copyrighted material outside their relationship with you. - - Conveying under any other circumstances is permitted solely under -the conditions stated below. Sublicensing is not allowed; section 10 -makes it unnecessary. - - 3. Protecting Users' Legal Rights From Anti-Circumvention Law. - - No covered work shall be deemed part of an effective technological -measure under any applicable law fulfilling obligations under article -11 of the WIPO copyright treaty adopted on 20 December 1996, or -similar laws prohibiting or restricting circumvention of such -measures. - - When you convey a covered work, you waive any legal power to forbid -circumvention of technological measures to the extent such circumvention -is effected by exercising rights under this License with respect to -the covered work, and you disclaim any intention to limit operation or -modification of the work as a means of enforcing, against the work's -users, your or third parties' legal rights to forbid circumvention of -technological measures. - - 4. Conveying Verbatim Copies. - - You may convey verbatim copies of the Program's source code as you -receive it, in any medium, provided that you conspicuously and -appropriately publish on each copy an appropriate copyright notice; -keep intact all notices stating that this License and any -non-permissive terms added in accord with section 7 apply to the code; -keep intact all notices of the absence of any warranty; and give all -recipients a copy of this License along with the Program. - - You may charge any price or no price for each copy that you convey, -and you may offer support or warranty protection for a fee. - - 5. Conveying Modified Source Versions. - - You may convey a work based on the Program, or the modifications to -produce it from the Program, in the form of source code under the -terms of section 4, provided that you also meet all of these conditions: - - a) The work must carry prominent notices stating that you modified - it, and giving a relevant date. - - b) The work must carry prominent notices stating that it is - released under this License and any conditions added under section - 7. This requirement modifies the requirement in section 4 to - "keep intact all notices". - - c) You must license the entire work, as a whole, under this - License to anyone who comes into possession of a copy. This - License will therefore apply, along with any applicable section 7 - additional terms, to the whole of the work, and all its parts, - regardless of how they are packaged. This License gives no - permission to license the work in any other way, but it does not - invalidate such permission if you have separately received it. - - d) If the work has interactive user interfaces, each must display - Appropriate Legal Notices; however, if the Program has interactive - interfaces that do not display Appropriate Legal Notices, your - work need not make them do so. - - A compilation of a covered work with other separate and independent -works, which are not by their nature extensions of the covered work, -and which are not combined with it such as to form a larger program, -in or on a volume of a storage or distribution medium, is called an -"aggregate" if the compilation and its resulting copyright are not -used to limit the access or legal rights of the compilation's users -beyond what the individual works permit. Inclusion of a covered work -in an aggregate does not cause this License to apply to the other -parts of the aggregate. - - 6. Conveying Non-Source Forms. - - You may convey a covered work in object code form under the terms -of sections 4 and 5, provided that you also convey the -machine-readable Corresponding Source under the terms of this License, -in one of these ways: - - a) Convey the object code in, or embodied in, a physical product - (including a physical distribution medium), accompanied by the - Corresponding Source fixed on a durable physical medium - customarily used for software interchange. - - b) Convey the object code in, or embodied in, a physical product - (including a physical distribution medium), accompanied by a - written offer, valid for at least three years and valid for as - long as you offer spare parts or customer support for that product - model, to give anyone who possesses the object code either (1) a - copy of the Corresponding Source for all the software in the - product that is covered by this License, on a durable physical - medium customarily used for software interchange, for a price no - more than your reasonable cost of physically performing this - conveying of source, or (2) access to copy the - Corresponding Source from a network server at no charge. - - c) Convey individual copies of the object code with a copy of the - written offer to provide the Corresponding Source. This - alternative is allowed only occasionally and noncommercially, and - only if you received the object code with such an offer, in accord - with subsection 6b. - - d) Convey the object code by offering access from a designated - place (gratis or for a charge), and offer equivalent access to the - Corresponding Source in the same way through the same place at no - further charge. You need not require recipients to copy the - Corresponding Source along with the object code. If the place to - copy the object code is a network server, the Corresponding Source - may be on a different server (operated by you or a third party) - that supports equivalent copying facilities, provided you maintain - clear directions next to the object code saying where to find the - Corresponding Source. Regardless of what server hosts the - Corresponding Source, you remain obligated to ensure that it is - available for as long as needed to satisfy these requirements. - - e) Convey the object code using peer-to-peer transmission, provided - you inform other peers where the object code and Corresponding - Source of the work are being offered to the general public at no - charge under subsection 6d. - - A separable portion of the object code, whose source code is excluded -from the Corresponding Source as a System Library, need not be -included in conveying the object code work. - - A "User Product" is either (1) a "consumer product", which means any -tangible personal property which is normally used for personal, family, -or household purposes, or (2) anything designed or sold for incorporation -into a dwelling. In determining whether a product is a consumer product, -doubtful cases shall be resolved in favor of coverage. For a particular -product received by a particular user, "normally used" refers to a -typical or common use of that class of product, regardless of the status -of the particular user or of the way in which the particular user -actually uses, or expects or is expected to use, the product. A product -is a consumer product regardless of whether the product has substantial -commercial, industrial or non-consumer uses, unless such uses represent -the only significant mode of use of the product. - - "Installation Information" for a User Product means any methods, -procedures, authorization keys, or other information required to install -and execute modified versions of a covered work in that User Product from -a modified version of its Corresponding Source. The information must -suffice to ensure that the continued functioning of the modified object -code is in no case prevented or interfered with solely because -modification has been made. - - If you convey an object code work under this section in, or with, or -specifically for use in, a User Product, and the conveying occurs as -part of a transaction in which the right of possession and use of the -User Product is transferred to the recipient in perpetuity or for a -fixed term (regardless of how the transaction is characterized), the -Corresponding Source conveyed under this section must be accompanied -by the Installation Information. But this requirement does not apply -if neither you nor any third party retains the ability to install -modified object code on the User Product (for example, the work has -been installed in ROM). - - The requirement to provide Installation Information does not include a -requirement to continue to provide support service, warranty, or updates -for a work that has been modified or installed by the recipient, or for -the User Product in which it has been modified or installed. Access to a -network may be denied when the modification itself materially and -adversely affects the operation of the network or violates the rules and -protocols for communication across the network. - - Corresponding Source conveyed, and Installation Information provided, -in accord with this section must be in a format that is publicly -documented (and with an implementation available to the public in -source code form), and must require no special password or key for -unpacking, reading or copying. - - 7. Additional Terms. - - "Additional permissions" are terms that supplement the terms of this -License by making exceptions from one or more of its conditions. -Additional permissions that are applicable to the entire Program shall -be treated as though they were included in this License, to the extent -that they are valid under applicable law. If additional permissions -apply only to part of the Program, that part may be used separately -under those permissions, but the entire Program remains governed by -this License without regard to the additional permissions. - - When you convey a copy of a covered work, you may at your option -remove any additional permissions from that copy, or from any part of -it. (Additional permissions may be written to require their own -removal in certain cases when you modify the work.) You may place -additional permissions on material, added by you to a covered work, -for which you have or can give appropriate copyright permission. - - Notwithstanding any other provision of this License, for material you -add to a covered work, you may (if authorized by the copyright holders of -that material) supplement the terms of this License with terms: - - a) Disclaiming warranty or limiting liability differently from the - terms of sections 15 and 16 of this License; or - - b) Requiring preservation of specified reasonable legal notices or - author attributions in that material or in the Appropriate Legal - Notices displayed by works containing it; or - - c) Prohibiting misrepresentation of the origin of that material, or - requiring that modified versions of such material be marked in - reasonable ways as different from the original version; or - - d) Limiting the use for publicity purposes of names of licensors or - authors of the material; or - - e) Declining to grant rights under trademark law for use of some - trade names, trademarks, or service marks; or - - f) Requiring indemnification of licensors and authors of that - material by anyone who conveys the material (or modified versions of - it) with contractual assumptions of liability to the recipient, for - any liability that these contractual assumptions directly impose on - those licensors and authors. - - All other non-permissive additional terms are considered "further -restrictions" within the meaning of section 10. If the Program as you -received it, or any part of it, contains a notice stating that it is -governed by this License along with a term that is a further -restriction, you may remove that term. If a license document contains -a further restriction but permits relicensing or conveying under this -License, you may add to a covered work material governed by the terms -of that license document, provided that the further restriction does -not survive such relicensing or conveying. - - If you add terms to a covered work in accord with this section, you -must place, in the relevant source files, a statement of the -additional terms that apply to those files, or a notice indicating -where to find the applicable terms. - - Additional terms, permissive or non-permissive, may be stated in the -form of a separately written license, or stated as exceptions; -the above requirements apply either way. - - 8. Termination. - - You may not propagate or modify a covered work except as expressly -provided under this License. Any attempt otherwise to propagate or -modify it is void, and will automatically terminate your rights under -this License (including any patent licenses granted under the third -paragraph of section 11). - - However, if you cease all violation of this License, then your -license from a particular copyright holder is reinstated (a) -provisionally, unless and until the copyright holder explicitly and -finally terminates your license, and (b) permanently, if the copyright -holder fails to notify you of the violation by some reasonable means -prior to 60 days after the cessation. - - Moreover, your license from a particular copyright holder is -reinstated permanently if the copyright holder notifies you of the -violation by some reasonable means, this is the first time you have -received notice of violation of this License (for any work) from that -copyright holder, and you cure the violation prior to 30 days after -your receipt of the notice. - - Termination of your rights under this section does not terminate the -licenses of parties who have received copies or rights from you under -this License. If your rights have been terminated and not permanently -reinstated, you do not qualify to receive new licenses for the same -material under section 10. - - 9. Acceptance Not Required for Having Copies. - - You are not required to accept this License in order to receive or -run a copy of the Program. Ancillary propagation of a covered work -occurring solely as a consequence of using peer-to-peer transmission -to receive a copy likewise does not require acceptance. However, -nothing other than this License grants you permission to propagate or -modify any covered work. These actions infringe copyright if you do -not accept this License. Therefore, by modifying or propagating a -covered work, you indicate your acceptance of this License to do so. - - 10. Automatic Licensing of Downstream Recipients. - - Each time you convey a covered work, the recipient automatically -receives a license from the original licensors, to run, modify and -propagate that work, subject to this License. You are not responsible -for enforcing compliance by third parties with this License. - - An "entity transaction" is a transaction transferring control of an -organization, or substantially all assets of one, or subdividing an -organization, or merging organizations. If propagation of a covered -work results from an entity transaction, each party to that -transaction who receives a copy of the work also receives whatever -licenses to the work the party's predecessor in interest had or could -give under the previous paragraph, plus a right to possession of the -Corresponding Source of the work from the predecessor in interest, if -the predecessor has it or can get it with reasonable efforts. - - You may not impose any further restrictions on the exercise of the -rights granted or affirmed under this License. For example, you may -not impose a license fee, royalty, or other charge for exercise of -rights granted under this License, and you may not initiate litigation -(including a cross-claim or counterclaim in a lawsuit) alleging that -any patent claim is infringed by making, using, selling, offering for -sale, or importing the Program or any portion of it. - - 11. Patents. - - A "contributor" is a copyright holder who authorizes use under this -License of the Program or a work on which the Program is based. The -work thus licensed is called the contributor's "contributor version". - - A contributor's "essential patent claims" are all patent claims -owned or controlled by the contributor, whether already acquired or -hereafter acquired, that would be infringed by some manner, permitted -by this License, of making, using, or selling its contributor version, -but do not include claims that would be infringed only as a -consequence of further modification of the contributor version. For -purposes of this definition, "control" includes the right to grant -patent sublicenses in a manner consistent with the requirements of -this License. - - Each contributor grants you a non-exclusive, worldwide, royalty-free -patent license under the contributor's essential patent claims, to -make, use, sell, offer for sale, import and otherwise run, modify and -propagate the contents of its contributor version. - - In the following three paragraphs, a "patent license" is any express -agreement or commitment, however denominated, not to enforce a patent -(such as an express permission to practice a patent or covenant not to -sue for patent infringement). To "grant" such a patent license to a -party means to make such an agreement or commitment not to enforce a -patent against the party. - - If you convey a covered work, knowingly relying on a patent license, -and the Corresponding Source of the work is not available for anyone -to copy, free of charge and under the terms of this License, through a -publicly available network server or other readily accessible means, -then you must either (1) cause the Corresponding Source to be so -available, or (2) arrange to deprive yourself of the benefit of the -patent license for this particular work, or (3) arrange, in a manner -consistent with the requirements of this License, to extend the patent -license to downstream recipients. "Knowingly relying" means you have -actual knowledge that, but for the patent license, your conveying the -covered work in a country, or your recipient's use of the covered work -in a country, would infringe one or more identifiable patents in that -country that you have reason to believe are valid. - - If, pursuant to or in connection with a single transaction or -arrangement, you convey, or propagate by procuring conveyance of, a -covered work, and grant a patent license to some of the parties -receiving the covered work authorizing them to use, propagate, modify -or convey a specific copy of the covered work, then the patent license -you grant is automatically extended to all recipients of the covered -work and works based on it. - - A patent license is "discriminatory" if it does not include within -the scope of its coverage, prohibits the exercise of, or is -conditioned on the non-exercise of one or more of the rights that are -specifically granted under this License. You may not convey a covered -work if you are a party to an arrangement with a third party that is -in the business of distributing software, under which you make payment -to the third party based on the extent of your activity of conveying -the work, and under which the third party grants, to any of the -parties who would receive the covered work from you, a discriminatory -patent license (a) in connection with copies of the covered work -conveyed by you (or copies made from those copies), or (b) primarily -for and in connection with specific products or compilations that -contain the covered work, unless you entered into that arrangement, -or that patent license was granted, prior to 28 March 2007. - - Nothing in this License shall be construed as excluding or limiting -any implied license or other defenses to infringement that may -otherwise be available to you under applicable patent law. - - 12. No Surrender of Others' Freedom. - - If conditions are imposed on you (whether by court order, agreement or -otherwise) that contradict the conditions of this License, they do not -excuse you from the conditions of this License. If you cannot convey a -covered work so as to satisfy simultaneously your obligations under this -License and any other pertinent obligations, then as a consequence you may -not convey it at all. For example, if you agree to terms that obligate you -to collect a royalty for further conveying from those to whom you convey -the Program, the only way you could satisfy both those terms and this -License would be to refrain entirely from conveying the Program. - - 13. Use with the GNU Affero General Public License. - - Notwithstanding any other provision of this License, you have -permission to link or combine any covered work with a work licensed -under version 3 of the GNU Affero General Public License into a single -combined work, and to convey the resulting work. The terms of this -License will continue to apply to the part which is the covered work, -but the special requirements of the GNU Affero General Public License, -section 13, concerning interaction through a network will apply to the -combination as such. - - 14. Revised Versions of this License. - - The Free Software Foundation may publish revised and/or new versions of -the GNU General Public License from time to time. Such new versions will -be similar in spirit to the present version, but may differ in detail to -address new problems or concerns. - - Each version is given a distinguishing version number. If the -Program specifies that a certain numbered version of the GNU General -Public License "or any later version" applies to it, you have the -option of following the terms and conditions either of that numbered -version or of any later version published by the Free Software -Foundation. If the Program does not specify a version number of the -GNU General Public License, you may choose any version ever published -by the Free Software Foundation. - - If the Program specifies that a proxy can decide which future -versions of the GNU General Public License can be used, that proxy's -public statement of acceptance of a version permanently authorizes you -to choose that version for the Program. - - Later license versions may give you additional or different -permissions. However, no additional obligations are imposed on any -author or copyright holder as a result of your choosing to follow a -later version. - - 15. Disclaimer of Warranty. - - THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY -APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT -HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY -OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, -THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM -IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF -ALL NECESSARY SERVICING, REPAIR OR CORRECTION. - - 16. Limitation of Liability. - - IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS -THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY -GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE -USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF -DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD -PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), -EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF -SUCH DAMAGES. - - 17. Interpretation of Sections 15 and 16. - - If the disclaimer of warranty and limitation of liability provided -above cannot be given local legal effect according to their terms, -reviewing courts shall apply local law that most closely approximates -an absolute waiver of all civil liability in connection with the -Program, unless a warranty or assumption of liability accompanies a -copy of the Program in return for a fee. - - END OF TERMS AND CONDITIONS - - How to Apply These Terms to Your New Programs - - If you develop a new program, and you want it to be of the greatest -possible use to the public, the best way to achieve this is to make it -free software which everyone can redistribute and change under these terms. - - To do so, attach the following notices to the program. It is safest -to attach them to the start of each source file to most effectively -state the exclusion of warranty; and each file should have at least -the "copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . - -Also add information on how to contact you by electronic and paper mail. - - If the program does terminal interaction, make it output a short -notice like this when it starts in an interactive mode: - - Copyright (C) - This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, your program's commands -might be different; for a GUI interface, you would use an "about box". - - You should also get your employer (if you work as a programmer) or school, -if any, to sign a "copyright disclaimer" for the program, if necessary. -For more information on this, and how to apply and follow the GNU GPL, see -. - - The GNU General Public License does not permit incorporating your program -into proprietary programs. If your program is a subroutine library, you -may consider it more useful to permit linking proprietary applications with -the library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. But first, please read -. diff --git a/lib/CPUs/JCpu/sim/ModelSim SE .lnk b/lib/CPUs/JCpu/sim/ModelSim SE .lnk deleted file mode 100644 index 1fe4002cf53e2956f215c58e00f2edd07e60eaba..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1455 zcmds1T}YE*6n^F`6bcjh(d!vBB~3ekf=1#ex!>i>UqD-uOIrk>8dl%d(L})o^#&wz3-|3 zXml}Lfk|aW`9*FG)Duq41Pr&QH09UskJRN&Yj7`CemiwngYz4dNKGVOU5hn3Y_UJH z%@`I7q=ca-aoC-ebtMIvB?V43=$o=1*~-RYc~O`MdyVZtO>s9(yP!oZR&L!ipB->m zs)u!qvZDh&G;?i)hd(!M$*7JZOqf4P39#Bq%c|qZKljEJ$>iOxBW5?;IUT zpma!HmoMlCr)%%!l zC7knN_^BPF-i}UckuG&C%$^3*l_A$wS{o{C*0S`Ukjs$HjNhM-P5%d!&YNUIDa!cm zYf;Hv11e~-((>o?_sOB8c zjMFZXXICi~B0gbQqFvV?mK7)W^$U9Kjq$LWoAoY|7t4!cSdQodN04ED3`LB$4DRXf zT5^U>+F0d2i$4-O?fXPfl*}+=l5-KhHC=wK*M?562E*k3MZI>EIZrniD*8)Gkt%9z zjA8)s7-5Xx)F+=K$E}Y?1}>@I=kyh4_Q;jwX=9I^F*ByTHxaXjA!@YDjo~5dO%C+P zcE)}oiJT*8MZu#)<17a2qo}Q&?NY$qq1HHF+xw<<`_{^#`54`!6T_Fg8Xw0#57=DgXcg diff --git a/lib/CPUs/JCpu/sim/tb_cpu.fdo b/lib/CPUs/JCpu/sim/tb_cpu.fdo deleted file mode 100644 index 86feedf..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu.fdo +++ /dev/null @@ -1,22 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work -vcom -explicit -93 "../../../PCK_FIO-1.16/PCK_FIO.vhd" -vcom -explicit -93 "../src/core/cpu_pkg.vhd" -vcom -explicit -93 "../src/core/stack_ctrl.vhd" -vcom -explicit -93 "../src/core/reg_dual.vhd" -vcom -explicit -93 "../src/core/chipram.vhd" -vcom -explicit -93 "../src/core/chipreg.vhd" -vcom -explicit -93 "../src/core/pc.vhd" -vcom -explicit -93 "../src/core/dpath_ctrl.vhd" -vcom -explicit -93 "../src/core/int_ctrl.vhd" -vcom -explicit -93 "../src/core/alu.vhd" -vcom -explicit -93 "../src/core/cpu.vhd" -vcom -explicit -93 "../src/itest_irom.vhdl" -vcom -explicit -93 "../src/tb_cpu_itest.vhd" -vsim -t 1ps -lib work tb_cpu -do {tb_cpu.wdo} -view wave -view structure -view signals -run 50us diff --git a/lib/CPUs/JCpu/sim/tb_cpu.wdo b/lib/CPUs/JCpu/sim/tb_cpu.wdo deleted file mode 100644 index 2ef036e..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu.wdo +++ /dev/null @@ -1,107 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_cpu/rst -add wave -noupdate -format Logic /tb_cpu/clk -add wave -noupdate -format Logic /tb_cpu/ce -add wave -noupdate -format Logic /tb_cpu/uut/cpu_active -add wave -noupdate -format Logic /tb_cpu/int_in -add wave -noupdate -format Logic /tb_cpu/int_ack -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/irom_data -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/irom_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/xmem_din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/xmem_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/xmem_addr -add wave -noupdate -format Logic /tb_cpu/xmem_we -add wave -noupdate -format Logic /tb_cpu/xmem_re -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/sram -add wave -noupdate -format Logic /tb_cpu/uut/io_sel -add wave -noupdate -format Literal /tb_cpu/uut/iphase -add wave -noupdate -divider CPU -add wave -noupdate -format Literal /tb_cpu/reg -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Literal /tb_cpu/uut/cpu_status -add wave -noupdate -format Literal /tb_cpu/uut/status_reg -add wave -noupdate -format Literal /tb_cpu/uut/ctrl -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_out -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_in -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/pc_in -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/pc_next -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/idata -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/int_pc_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/iphase -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/const_data -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/reg_a_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/reg_b_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/reg_din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/alu_op1 -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/alu_op2 -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/alu_result -add wave -noupdate -format Literal /tb_cpu/uut/alu_status -add wave -noupdate -format Logic /tb_cpu/uut/pc_inc -add wave -noupdate -format Logic /tb_cpu/uut/pc_load -add wave -noupdate -format Logic /tb_cpu/uut/stk_we -add wave -noupdate -format Logic /tb_cpu/uut/cmem_we -add wave -noupdate -format Literal /tb_cpu/uut/ctrl_iphase -add wave -noupdate -format Logic /tb_cpu/uut/was_pcld -add wave -noupdate -format Logic /tb_cpu/uut/was_pop2pc -add wave -noupdate -format Logic /tb_cpu/uut/int_pc_load -add wave -noupdate -format Logic /tb_cpu/uut/int_stk_push -add wave -noupdate -format Logic /tb_cpu/uut/stk_push -add wave -noupdate -format Logic /tb_cpu/uut/stk_pop -add wave -noupdate -format Logic /tb_cpu/uut/status_save -add wave -noupdate -format Logic /tb_cpu/uut/status_restore -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_ptr -add wave -noupdate -divider Stack -add wave -noupdate -format Logic /tb_cpu/clk -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/push -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/pop -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/dout -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/mem_we -add wave -noupdate -divider Chipram -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/we_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/din_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/addr_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/dout_a -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/we_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/din_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/addr_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/dout_b -add wave -noupdate -divider Sequencer -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_dpath_ctrl/inst_in -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/iphase_in -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/status_in -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/ctrl_out -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_dpath_ctrl/idout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_dpath_ctrl/ddout -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/opcode -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/ctrl_lines -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_cpu/uut/inst_reg_ab/mem -add wave -noupdate -divider {Chip register} -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/creg_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/creg_din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/creg_dout -add wave -noupdate -format Literal /tb_cpu/uut/creg_ctrl_out -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/clk -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_exit -add wave -noupdate -format Literal /tb_cpu/uut/inst_int_ctrl/int_state -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {136355 ps} 0} -configure wave -namecolwidth 166 -configure wave -valuecolwidth 101 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {93532 ps} {206468 ps} diff --git a/lib/CPUs/JCpu/sim/tb_cpu_embedded.fdo b/lib/CPUs/JCpu/sim/tb_cpu_embedded.fdo deleted file mode 100644 index c2c1137..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu_embedded.fdo +++ /dev/null @@ -1,21 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work -vcom -explicit -93 "../src/core/cpu_pkg.vhd" -vcom -explicit -93 "../src/core/stack_ctrl.vhd" -vcom -explicit -93 "../src/core/reg_dual.vhd" -vcom -explicit -93 "../src/core/chipram.vhd" -vcom -explicit -93 "../src/core/pc.vhd" -vcom -explicit -93 "../src/core/dpath_ctrl.vhd" -vcom -explicit -93 "../src/core/int_ctrl.vhd" -vcom -explicit -93 "../src/core/alu.vhd" -vcom -explicit -93 "../src/core/cpu.vhd" -vcom -explicit -93 "../src/cpu_embedded.vhd" -vcom -explicit -93 "../src/tb_cpu_embedded.vhd" -vcom -explicit -93 "../src/itest_irom.vhdl" -vsim -t 1ps -lib work tb_cpu_embedded -do {tb_cpu_embedded.wdo} -view wave -view structure -view signals -run 10us diff --git a/lib/CPUs/JCpu/sim/tb_cpu_embedded.wdo b/lib/CPUs/JCpu/sim/tb_cpu_embedded.wdo deleted file mode 100644 index caec2d7..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu_embedded.wdo +++ /dev/null @@ -1,26 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_cpu_embedded/rst -add wave -noupdate -format Logic /tb_cpu_embedded/clk -add wave -noupdate -format Logic /tb_cpu_embedded/ce -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/sram -add wave -noupdate -format Logic /tb_cpu_embedded/int_in -add wave -noupdate -format Logic /tb_cpu_embedded/int_ack -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/rom_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/rom_data -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {2168142 ps} 0} -configure wave -namecolwidth 143 -configure wave -valuecolwidth 101 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {0 ps} {10500 ns} diff --git a/lib/CPUs/JCpu/sim/tb_cpu_itest.fdo b/lib/CPUs/JCpu/sim/tb_cpu_itest.fdo deleted file mode 100644 index 77ca67d..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu_itest.fdo +++ /dev/null @@ -1,22 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work -vcom -explicit -93 "../../../PCK_FIO-1.16/PCK_FIO.vhd" -vcom -explicit -93 "../src/core/cpu_pkg.vhd" -vcom -explicit -93 "../src/core/stack_ctrl.vhd" -vcom -explicit -93 "../src/core/reg_dual.vhd" -vcom -explicit -93 "../src/core/chipram.vhd" -vcom -explicit -93 "../src/core/chipreg.vhd" -vcom -explicit -93 "../src/core/pc.vhd" -vcom -explicit -93 "../src/core/dpath_ctrl.vhd" -vcom -explicit -93 "../src/core/int_ctrl.vhd" -vcom -explicit -93 "../src/core/alu.vhd" -vcom -explicit -93 "../src/core/cpu.vhd" -vcom -explicit -93 "../src/itest_irom.vhdl" -vcom -explicit -93 "../src/tb_cpu_itest.vhd" -vsim -t 1ps -lib work tb_cpu -do {tb_cpu_itest.wdo} -view wave -view structure -view signals -run 400us diff --git a/lib/CPUs/JCpu/sim/tb_cpu_itest.wdo b/lib/CPUs/JCpu/sim/tb_cpu_itest.wdo deleted file mode 100644 index c3e2205..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu_itest.wdo +++ /dev/null @@ -1,122 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_cpu/rst -add wave -noupdate -format Logic /tb_cpu/clk -add wave -noupdate -format Logic /tb_cpu/ce -add wave -noupdate -format Logic /tb_cpu/int_in -add wave -noupdate -format Logic /tb_cpu/int_ack -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/irom_data -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/irom_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/xmem_din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/xmem_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/xmem_addr -add wave -noupdate -format Logic /tb_cpu/xmem_we -add wave -noupdate -format Logic /tb_cpu/xmem_re -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/sram -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_cpu/reg -add wave -noupdate -format Logic /tb_cpu/uut/io_sel -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/mem_data -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/mem_addr -add wave -noupdate -divider CPU -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Literal /tb_cpu/uut/cpu_status -add wave -noupdate -format Literal /tb_cpu/uut/status_reg -add wave -noupdate -format Literal /tb_cpu/uut/ctrl -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_out -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_in -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/pc_in -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/pc_next -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/idata -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/int_pc_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/iphase -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/const_data -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/reg_a_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/reg_b_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/reg_din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/alu_op1 -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/alu_op2 -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/alu_result -add wave -noupdate -format Literal /tb_cpu/uut/alu_status -add wave -noupdate -format Logic /tb_cpu/uut/pc_inc -add wave -noupdate -format Logic /tb_cpu/uut/pc_load -add wave -noupdate -format Logic /tb_cpu/uut/cpu_active -add wave -noupdate -format Logic /tb_cpu/uut/stk_we -add wave -noupdate -format Logic /tb_cpu/uut/cmem_we -add wave -noupdate -format Literal /tb_cpu/uut/ctrl_iphase -add wave -noupdate -format Logic /tb_cpu/uut/was_pcld -add wave -noupdate -format Logic /tb_cpu/uut/was_pop2pc -add wave -noupdate -format Logic /tb_cpu/uut/int_pc_load -add wave -noupdate -format Logic /tb_cpu/uut/int_stk_push -add wave -noupdate -format Logic /tb_cpu/uut/stk_push -add wave -noupdate -format Logic /tb_cpu/uut/stk_pop -add wave -noupdate -format Logic /tb_cpu/uut/status_save -add wave -noupdate -format Logic /tb_cpu/uut/status_restore -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/stk_ptr -add wave -noupdate -divider Stack -add wave -noupdate -format Logic /tb_cpu/clk -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/push -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/pop -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/dout -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/mem_we -add wave -noupdate -divider Chipram -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/we_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/din_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/addr_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/dout_a -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/we_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/din_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/addr_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/dout_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/ram -add wave -noupdate -divider Sequencer -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/reg -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_dpath_ctrl/inst_in -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/iphase_in -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/status_in -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/ctrl_out -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_dpath_ctrl/idout -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_dpath_ctrl/ddout -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/opcode -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/ctrl_lines -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_cpu/uut/inst_reg_ab/mem -add wave -noupdate -divider {Chip register} -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/creg_dout -add wave -noupdate -format Literal /tb_cpu/uut/creg_ctrl_out -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/clk -add wave -noupdate -divider {Interrup Ctrl.} -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_in -add wave -noupdate -format Literal -expand /tb_cpu/uut/inst_int_ctrl/ctrl_in -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_request -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_ack -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_exit -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_ack_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stat_save_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stat_rest_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/pc_load_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_push_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_pop_out -add wave -noupdate -format Literal /tb_cpu/uut/inst_int_ctrl/int_state -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/pc_load -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_push -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_pop -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {107309645 ps} 0} -configure wave -namecolwidth 166 -configure wave -valuecolwidth 101 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {0 ps} {420 us} diff --git a/lib/CPUs/JCpu/sim/tb_cpu_reti_issue.fdo b/lib/CPUs/JCpu/sim/tb_cpu_reti_issue.fdo deleted file mode 100644 index f83b9b4..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu_reti_issue.fdo +++ /dev/null @@ -1,22 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work -vcom -explicit -93 "../../../PCK_FIO-1.16/PCK_FIO.vhd" -vcom -explicit -93 "../src/core/cpu_pkg.vhd" -vcom -explicit -93 "../src/core/stack_ctrl.vhd" -vcom -explicit -93 "../src/core/reg_dual.vhd" -vcom -explicit -93 "../src/core/chipram.vhd" -vcom -explicit -93 "../src/core/chipreg.vhd" -vcom -explicit -93 "../src/core/pc.vhd" -vcom -explicit -93 "../src/core/dpath_ctrl.vhd" -vcom -explicit -93 "../src/core/int_ctrl.vhd" -vcom -explicit -93 "../src/core/alu.vhd" -vcom -explicit -93 "../src/core/cpu.vhd" -vcom -explicit -93 "../src/irom_reti_issue.vhdl" -vcom -explicit -93 "../src/core/tb_cpu.vhd" -vsim -t 1ps -lib work tb_cpu -do {tb_cpu_reti_issue.wdo} -view wave -view structure -view signals -run 50us diff --git a/lib/CPUs/JCpu/sim/tb_cpu_reti_issue.wdo b/lib/CPUs/JCpu/sim/tb_cpu_reti_issue.wdo deleted file mode 100644 index 1e67acb..0000000 --- a/lib/CPUs/JCpu/sim/tb_cpu_reti_issue.wdo +++ /dev/null @@ -1,82 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Literal /tb_cpu/uut/iphase -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/ctrl_lines -add wave -noupdate -divider {Chip RAM} -add wave -noupdate -format Literal /tb_cpu/uut/iphase -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/clka -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/clkb -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/en_a -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/en_b -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/we_a -add wave -noupdate -format Logic /tb_cpu/uut/inst_chipram/we_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/addr_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/addr_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/din_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/din_b -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/dout_a -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_chipram/dout_b -add wave -noupdate -divider {Interrupt controller} -add wave -noupdate -format Literal /tb_cpu/uut/iphase -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/rst -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/clk -add wave -noupdate -format Literal /tb_cpu/uut/inst_int_ctrl/ctrl_in -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_in -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_reg -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_request -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_request_clr -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_exit -add wave -noupdate -format Literal /tb_cpu/uut/inst_int_ctrl/iphase_in -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_int_ctrl/pc_addr_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/int_ack -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stat_save_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stat_rest_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/pc_load_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_push_out -add wave -noupdate -format Literal /tb_cpu/uut/inst_int_ctrl/int_state -add wave -noupdate -format Literal /tb_cpu/uut/inst_int_ctrl/int_state_next -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/pc_load -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_push -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_pop -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_pop_out -add wave -noupdate -format Logic /tb_cpu/uut/inst_int_ctrl/stk_push_out -add wave -noupdate -divider PC -add wave -noupdate -format Literal /tb_cpu/uut/iphase -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/uut/inst_pc/rst -add wave -noupdate -format Logic /tb_cpu/uut/inst_pc/clk -add wave -noupdate -format Logic /tb_cpu/uut/inst_pc/inc -add wave -noupdate -format Logic /tb_cpu/uut/inst_pc/load -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_pc/pc_in -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_pc/pc_out -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_pc/pc_next -add wave -noupdate -divider {Stack controller} -add wave -noupdate -format Literal /tb_cpu/uut/iphase -add wave -noupdate -format Literal /tb_cpu/uut/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/rst -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/clk -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/push -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/pop -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/ptr_out -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/dout -add wave -noupdate -format Logic /tb_cpu/uut/inst_stack_ctrl/mem_we -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu/uut/inst_stack_ctrl/ptr -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {8115990 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {8048536 ps} {8340629 ps} diff --git a/lib/CPUs/JCpu/sim/tb_mul8x8.fdo b/lib/CPUs/JCpu/sim/tb_mul8x8.fdo deleted file mode 100644 index f727dff..0000000 --- a/lib/CPUs/JCpu/sim/tb_mul8x8.fdo +++ /dev/null @@ -1,21 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work -vcom -explicit -93 "../src/core/cpu_pkg.vhd" -vcom -explicit -93 "../src/core/stack_ctrl.vhd" -vcom -explicit -93 "../src/core/reg_dual.vhd" -vcom -explicit -93 "../src/core/chipram.vhd" -vcom -explicit -93 "../src/core/pc.vhd" -vcom -explicit -93 "../src/core/dpath_ctrl.vhd" -vcom -explicit -93 "../src/core/int_ctrl.vhd" -vcom -explicit -93 "../src/core/alu.vhd" -vcom -explicit -93 "../src/core/cpu.vhd" -vcom -explicit -93 "../src/cpu_embedded.vhd" -vcom -explicit -93 "../src/tb_cpu_embedded.vhd" -vcom -explicit -93 "../src/mul8x8_irom.vhdl" -vsim -t 1ps -lib work tb_cpu_embedded -do {tb_mul8x8.wdo} -view wave -view structure -view signals -run 10us diff --git a/lib/CPUs/JCpu/sim/tb_mul8x8.wdo b/lib/CPUs/JCpu/sim/tb_mul8x8.wdo deleted file mode 100644 index 355e0a4..0000000 --- a/lib/CPUs/JCpu/sim/tb_mul8x8.wdo +++ /dev/null @@ -1,31 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_cpu_embedded/uut/inst_cpu/rst -add wave -noupdate -format Logic /tb_cpu_embedded/uut/inst_cpu/clk -add wave -noupdate -format Logic /tb_cpu_embedded/uut/inst_cpu/ce -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/inst_cpu/instr_din -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/inst_cpu/instr_addr -add wave -noupdate -format Literal /tb_cpu_embedded/uut/inst_cpu/cpu_status -add wave -noupdate -format Literal /tb_cpu_embedded/uut/inst_cpu/status_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/inst_cpu/alu_op1 -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/inst_cpu/alu_op2 -add wave -noupdate -format Literal -radix hexadecimal /tb_cpu_embedded/uut/inst_cpu/alu_result -add wave -noupdate -format Literal /tb_cpu_embedded/uut/inst_cpu/alu_status -add wave -noupdate -format Literal /tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/dbg_iname -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/mem -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {529679 ps} 0} -configure wave -namecolwidth 143 -configure wave -valuecolwidth 101 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {9002500 ps} {10052500 ps} diff --git a/lib/CPUs/JCpu/src/core/alu.vhd b/lib/CPUs/JCpu/src/core/alu.vhd deleted file mode 100644 index 19b3478..0000000 --- a/lib/CPUs/JCpu/src/core/alu.vhd +++ /dev/null @@ -1,236 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The arithmetic logic unit --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity alu is - Generic ( - data_width : integer := 8 - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - op_en : in STD_LOGIC; - cy_in : in STD_LOGIC; - op1_in : in unsigned (data_width-1 downto 0); - op2_in : in unsigned (data_width-1 downto 0); - opsel : in alu_op_t; - res_out : out unsigned (data_width-1 downto 0); - stat_load : in STD_LOGIC; - stat_in : in alu_status_t; - stat_out : out alu_status_t - ); -end alu; - -architecture Behavioral of alu is - - signal sum_cy, sh_cy, sum_cy_in, sh_cy_in, left_shift, add_subn : STD_LOGIC; - signal result, sum_res, lf_res, sh_res, res_reg : unsigned (data_width-1 downto 0); - signal status, stat_reg : alu_status_t; - - -------------------------------------------------------------------------- - function test_zero(arg : unsigned) return STD_LOGIC is - variable result : STD_LOGIC; - begin - result := '0'; - for i in arg'range loop - result := result or To_X01(arg(i)); - end loop; - - return not result; - end test_zero; - --------------------------------------------------------------------------- -begin - --------------------------------------------------------------------------- -proc_logic_func: - process (op1_in, op2_in, opsel) - begin - - case opsel is - when op1_and_op2 => - lf_res <= op1_in and op2_in; - when op1_or_op2 => - lf_res <= op1_in or op2_in; - when op1_xor_op2 => - lf_res <= op1_in xor op2_in; - when others => - lf_res <= (others => '-'); - end case; - - end process; - --------------------------------------------------------------------------- -proc_shift_func: - process (op1_in, left_shift, sh_cy_in) - begin - if left_shift = '1' then - sh_res <= op1_in(op1_in'left-1 downto op1_in'right) & sh_cy_in; - sh_cy <= op1_in(op1_in'left); - else - sh_res <= sh_cy_in & op1_in(op1_in'left downto op1_in'right+1); - sh_cy <= op1_in(op1_in'right); - end if; - - end process; - --------------------------------------------------------------------------- -proc_alu_out: - process(opsel, op1_in, op2_in, res_reg, stat_reg, lf_res, sum_res, sh_res, sum_cy, sh_cy, cy_in) - - begin - - case opsel is - - when op1_add_op2 | op1_sub_op2 | op1_addc_op2 | op1_subc_op2 => - status.zero <= test_zero(res_reg); - status.carry <= sum_cy; - result <= sum_res; - when op1_and_op2 | op1_or_op2 | op1_xor_op2 => - status.zero <= test_zero(res_reg); - status.carry <= stat_reg.carry; - result <= lf_res; - when shl_op | shr_op | rol_op | ror_op | rolc_op | rorc_op => - status.zero <= test_zero(res_reg); - status.carry <= sh_cy; - result <= sh_res; - when swap_op => - result <= op1_in(op1_in'left-op1_in'length/2 downto op1_in'right) & op1_in(op1_in'left downto op1_in'right+op1_in'length/2); - status <= stat_reg; - when others => - result <= op2_in; - status.zero <= stat_reg.zero; - status.carry <= stat_reg.carry or cy_in; - end case; - - end process; - --------------------------------------------------------------------------- -proc_alu_in: - process(opsel, op1_in, stat_reg) - - begin - - add_subn <= '-'; - sum_cy_in <= '-'; - sh_cy_in <= '-'; - left_shift <= '-'; - - case opsel is - - when op1_add_op2 => - sum_cy_in <= '0'; - add_subn <= '1'; - - when op1_sub_op2 => - sum_cy_in <= '0'; - add_subn <= '0'; - - when op1_addc_op2 => - sum_cy_in <= stat_reg.carry; - add_subn <= '1'; - - when op1_subc_op2 => - sum_cy_in <= stat_reg.carry; - add_subn <= '0'; - - when shl_op => - sh_cy_in <= '0'; - left_shift <= '1'; - - when shr_op => - sh_cy_in <= '0'; - left_shift <= '0'; - - when rol_op => - sh_cy_in <= op1_in(op1_in'left); - left_shift <= '1'; - - when ror_op => - sh_cy_in <= op1_in(op1_in'right); - left_shift <= '0'; - - when rolc_op => - sh_cy_in <= stat_reg.carry; - left_shift <= '1'; - - when rorc_op => - sh_cy_in <= stat_reg.carry; - left_shift <= '0'; - - when others => null; - - end case; - - end process; - --------------------------------------------------------------------------- -proc_res_reg: - process(clk, rst, op_en, stat_load, res_reg, stat_reg) - begin - if rst = '1' then - res_reg <= (others => '0'); - stat_reg <= (others => '0'); - elsif rising_edge(clk) then - if op_en = '1' then - res_reg <= result; - stat_reg <= status; - elsif stat_load = '1' then - stat_reg <= stat_in; - end if; - end if; - res_out <= res_reg; - stat_out <= stat_reg; - - end process; - --------------------------------------------------------------------------- -alu_addsub: - process(op1_in, op2_in, sum_cy_in, add_subn) - variable sum : unsigned(data_width+1 downto 0); - variable op1, op2 : unsigned(data_width+1 downto 0); - begin - if add_subn = '1' then - op1 := '0' & op1_in & '1'; - op2 := '0' & op2_in & sum_cy_in; - sum := op1 + op2; - else - op1 := '0' & op1_in & not sum_cy_in; - op2 := '0' & op2_in & '1'; - sum := op1 - op2; - end if; - - -- Form sum + carry - sum_res <= sum(data_width downto 1); - sum_cy <= sum(sum'left); - - end process; - --------------------------------------------------------------------------- -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/core/chipram.vhd b/lib/CPUs/JCpu/src/core/chipram.vhd deleted file mode 100644 index a954a77..0000000 --- a/lib/CPUs/JCpu/src/core/chipram.vhd +++ /dev/null @@ -1,85 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: On-chip RAM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity chipram is - Generic ( - addr_width : integer := 3; - data_width : integer := 8 - ); - Port ( - clka : in STD_LOGIC; - clkb : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - we_b : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - din_b : in unsigned (data_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -end chipram; - -architecture Behavioral of chipram is - - constant depth : integer := 2**addr_width; - type RAMtype is array (0 to depth-1) of unsigned (data_width-1 downto 0); - shared variable RAM : RAMtype; - -begin - -process (clka) -begin -if clka'event and clka = '1' then - if en_a = '1' then - if we_a = '1' then - RAM(to_integer(addr_a)) := din_a; - end if; - dout_a <= RAM(to_integer(addr_a)); - end if; -end if; -end process; - -process (clkb) -begin -if clkb'event and clkb = '1' then - if en_b = '1' then - if we_b = '1' then - RAM(to_integer(addr_b)) := din_b; - end if; - dout_b <= RAM(to_integer(addr_b)); - end if; -end if; -end process; - - -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/core/chipreg.vhd b/lib/CPUs/JCpu/src/core/chipreg.vhd deleted file mode 100644 index 6c5b9f1..0000000 --- a/lib/CPUs/JCpu/src/core/chipreg.vhd +++ /dev/null @@ -1,117 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: On-Chip registers --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity chipreg is - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - we : in STD_LOGIC; - addr : in dmem_addr_t; - din : in dmem_data_t; - dout : out dmem_data_t; - ctrl_in : in creg_ctrl_in_t; - ctrl_out : out creg_ctrl_out_t - ); -end chipreg; - -architecture Behavioral of chipreg is - - signal reg_bank_sel : bank_sel_t; - signal reg_int_ctrl : int_ctrl_in_t; - signal reg_stk_high : unsigned(IMEM_ADDR_WIDTH-DMEM_ADDR_WIDTH-1 downto 0); - signal reg_cmem_high : unsigned(IMEM_ADDR_WIDTH-DMEM_ADDR_WIDTH-1 downto 0); - -begin - -proc_assign_ctrl_lines: - process (clk) - begin - if rising_edge(clk) then - ctrl_out.bank_sel <= reg_bank_sel; - ctrl_out.int_ctrl <= reg_int_ctrl; - ctrl_out.stk_high <= reg_stk_high; - ctrl_out.cmem_high <= reg_cmem_high; - end if; - end process; - -proc_reg_write: - process (rst, clk) - begin - if rst = '1' then - reg_stk_high <= (others => '0'); - reg_cmem_high <= (others => '0'); - reg_bank_sel <= (others => '0'); - reg_int_ctrl.enable <= '0'; - elsif rising_edge(clk) then - if we = '1' then - case addr is - when X"01" => - reg_bank_sel(bank_sel_t'range) <= din(bank_sel_t'range); - when X"03" => - reg_int_ctrl.enable <= din(0); - when X"04" => - reg_cmem_high <= din(IMEM_ADDR_WIDTH-DMEM_ADDR_WIDTH-1 downto 0); - when X"05" => - reg_stk_high <= din(IMEM_ADDR_WIDTH-DMEM_ADDR_WIDTH-1 downto 0); - when others => null; - end case; - end if; - end if; - end process; - -proc_reg_read: - process (clk) - begin - if rising_edge(clk) then - case addr is - when X"00" => -- Revison - dout <= to_unsigned(REVISION, dmem_data_t'length); - when X"01" => -- Control 0 - dout <= (7 downto bank_sel_t'length => '0') & reg_bank_sel; - when X"02" => -- CPU status - dout <= "000000" & ctrl_in.alu.carry & ctrl_in.alu.zero; - when X"03" => -- Interrupt control - dout <= "0000000" & reg_int_ctrl.enable; - when X"04" => -- Upper stack bits out - dout <= "0000" & reg_cmem_high; - when X"05" => -- Upper cmem bits out - dout <= "0000" & reg_stk_high; - when others => - if addr(0) = '0' then - dout <= X"DE"; - else - dout <= X"AD"; - end if; - end case; - - end if; - end process; - -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/core/cpu.vhd b/lib/CPUs/JCpu/src/core/cpu.vhd deleted file mode 100644 index 78eb82a..0000000 --- a/lib/CPUs/JCpu/src/core/cpu.vhd +++ /dev/null @@ -1,564 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: JCPU top file --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity cpu is - Generic ( - use_instr_register : boolean := false; - use_ctrl_rom : boolean := true - - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - int_in : in STD_LOGIC; - int_ack : out STD_LOGIC; - xmem_we : out STD_LOGIC; - xmem_re : out STD_LOGIC; - instr_din : in unsigned (IMEM_DATA_WIDTH-1 downto 0); - instr_addr : out unsigned (IMEM_ADDR_WIDTH-1 downto 0); - xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_addr : out unsigned (DMEM_ADDR_WIDTH-1 downto 0); - io_sel : out std_logic - ); -end cpu; - -architecture rtl of cpu is - - COMPONENT stack_ctrl - GENERIC ( - addr_width : integer - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - push : in STD_LOGIC; - pop : in STD_LOGIC; - din : in inst_addr_t; - dout : out inst_addr_t; - mem_we : out STD_LOGIC; - ptr_out : out unsigned (addr_width-1 downto 0) - ); - END COMPONENT; - - COMPONENT pc - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - inc : in STD_LOGIC; - load : in STD_LOGIC; - pc_in : in inst_addr_t; - pc_out : out inst_addr_t; - pc_next : out inst_addr_t - ); - END COMPONENT; - - COMPONENT dpath_ctrl - GENERIC ( - use_rom : boolean - ); - Port ( - inst_in : in inst_t; - iphase_in : in iphase_t; - status_in : in cpu_status_t; - ctrl_out : out dpath_ctrl_out_t; - idout : out inst_addr_t; - ddout : out dmem_data_t - ); - END COMPONENT; - - COMPONENT int_ctrl - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ctrl_in : in int_ctrl_in_t; - int_in : in STD_LOGIC; - int_exit : in STD_LOGIC; - iphase_in : in iphase_t; - int_ack_out : out STD_LOGIC; - stat_save_out : out STD_LOGIC; - stat_rest_out : out STD_LOGIC; - pc_addr_out : out inst_addr_t; - pc_load_out : out STD_LOGIC; - stk_push_out : out STD_LOGIC; - stk_pop_out : out STD_LOGIC - ); - END COMPONENT; - - COMPONENT reg_dual - GENERIC ( - addr_width : integer; - data_width : integer - ); - Port ( - clk : in STD_LOGIC; - we_a : in STD_LOGIC; - ptr_a : in reg_ptr_t; - ptr_b : in reg_ptr_t; - din_a : in unsigned (data_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); - END COMPONENT; - - COMPONENT chipram - GENERIC ( - addr_width : integer; - data_width : integer - ); - Port ( - clka : in STD_LOGIC; - clkb : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - we_b : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - din_b : in unsigned (data_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); - END COMPONENT; - - COMPONENT chipreg - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - we : in STD_LOGIC; - addr : in dmem_addr_t; - din : in dmem_data_t; - dout : out dmem_data_t; - ctrl_in : in creg_ctrl_in_t; - ctrl_out : out creg_ctrl_out_t - ); - END COMPONENT; - - COMPONENT alu - GENERIC ( - data_width : integer := 8 - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - op_en : in STD_LOGIC; - cy_in : in STD_LOGIC; - op1_in : in unsigned (data_width-1 downto 0); - op2_in : in unsigned (data_width-1 downto 0); - opsel : in alu_op_t; - res_out : out unsigned (data_width-1 downto 0); - stat_load : in STD_LOGIC; - stat_in : in alu_status_t; - stat_out : out alu_status_t - ); - END COMPONENT; - - signal cpu_status, status_reg : cpu_status_t; -- := cpu_status_t(others => '0'); - signal ctrl : dpath_ctrl_out_t; - signal stk_out : inst_addr_t; - signal stk_in : inst_addr_t; - signal stk_reg : inst_addr_t; - signal pc_in, pc_out, pc_next, idata, int_pc_addr : inst_addr_t; - signal iphase : iphase_t; - signal const_data, reg_a_dout, reg_b_dout : dmem_data_t; - signal reg_din : dmem_data_t; - signal alu_op1, alu_op2, alu_result : dmem_data_t; - signal alu_status : alu_status_t; - signal pc_inc, pc_load, cpu_active, stk_we, cmem_we, creg_we : STD_LOGIC; - signal ctrl_inst : inst_t; - signal ctrl_iphase : iphase_t; - signal was_pcld, was_pop2pc, int_pc_load, int_stk_push, int_stk_pop, stk_push, stk_pop : STD_LOGIC; - signal status_save, status_restore : STD_LOGIC; - signal creg_dout : dmem_data_t; - signal cmem_din, cmem_dout : inst_addr_t; - signal stk_addr, cmem_addr : unsigned(CHIPRAM_SIZE_BITS-1 downto 0); - signal stk_ptr : unsigned(STACK_SIZE_BITS-1 downto 0); - signal creg_ctrl_out : creg_ctrl_out_t; - signal creg_ctrl_in : creg_ctrl_in_t; - signal irq_out : std_logic; - signal xio_sel, cio_sel : std_logic; - signal mem_data : dmem_data_t; - signal mem_addr : dmem_data_t; - -begin - io_sel <= xio_sel; - instr_addr <= pc_out; - pc_inc <= cpu_active and ctrl.lines.pc_inc; - stk_addr <= '0' & stk_ptr; - cpu_status.alu <= alu_status; - creg_ctrl_in.alu <= alu_status; - - xmem_dout <= mem_data; - xmem_addr <= mem_addr; - cmem_din <= creg_ctrl_out.cmem_high & mem_data; - cmem_addr <= '1' & creg_ctrl_out.bank_sel & mem_addr(MIN(cmem_addr'length-creg_ctrl_out.bank_sel'length-1, mem_addr'length)-1 downto 0); - --------------------------------------------------------------------- -mem_ctrl_lines: - process(ctrl.lines) - begin - xio_sel <= '0'; - xmem_re <= '0'; - xmem_we <= '0'; - cio_sel <= '0'; - cmem_we <= '0'; - creg_we <= '0'; - - case ctrl.lines.mem_access is - when xmem_access => - xmem_re <= ctrl.lines.mem_read; - xmem_we <= ctrl.lines.mem_write; - when xio_access => - xio_sel <= '1'; - xmem_re <= ctrl.lines.mem_read; - xmem_we <= ctrl.lines.mem_write; - when cmem_access => - cmem_we <= ctrl.lines.mem_write; - when cio_access => - cio_sel <= '1'; - creg_we <= ctrl.lines.mem_write; - when others => null; - end case; - end process; - -iphase_counter: - process(rst, clk, ce) - variable pos : integer; - begin - if rst = '1' then - iphase <= iphase_t'low; - cpu_active <= '0'; - elsif rising_edge(clk) then - cpu_active <= '0'; - if ce = '1' then - cpu_active <= '1'; - if iphase = iphase_t'high then - iphase <= iphase_t'low; - else - iphase <= iphase + 1; - end if; - end if; - end if; - end process; - -gen_instr_reg: -if use_instr_register = true generate - -instr_reg: - process (rst, clk, ce) - begin - if rst = '1' then - ctrl_inst <= (others => '0'); - ctrl_iphase <= 0; - elsif rising_edge(clk) and ce = '1' then - ctrl_inst <= instr_din; - ctrl_iphase <= iphase; - end if; - end process; - -end generate; - -gen_instr_direct: -if use_instr_register = false generate - - ctrl_inst <= instr_din; - ctrl_iphase <= iphase; - -end generate; - -status_register: - process(clk, status_save) - begin - if rising_edge(clk) and status_save = '1' then - status_reg.alu <= alu_status; - end if; - end process; - -pc_pushpop: - process(ctrl.lines, int_pc_load, int_stk_push, int_stk_pop, was_pop2pc) - begin - pc_load <= ctrl.lines.pc_load or int_pc_load; - stk_push <= (ctrl.lines.stk_pushd or ctrl.lines.stk_push) or (int_stk_push and not was_pop2pc); - stk_pop <= ctrl.lines.stk_popd or int_stk_pop or (ctrl.lines.stk_pop and not int_pc_load); - end process; - -lines_delay: - process(clk) - begin - if rising_edge(clk) then - was_pcld <= ctrl.lines.pc_load; - was_pop2pc <= ctrl.lines.stk_pop and ctrl.lines.pc_load; - end if; - end process; - -stk_mux: - process(ctrl.lines, was_pcld, int_stk_push, pc_next, idata, reg_a_dout, creg_ctrl_out) - begin - if was_pcld = '1' and int_stk_push = '1' then - stk_in <= idata; - elsif ctrl.lines.stk_pushd = '1' then - stk_in <= creg_ctrl_out.stk_high & reg_a_dout; - else - stk_in <= pc_next; - end if; - - end process; - -pc_mux: - process(ctrl.lines, int_pc_load, int_stk_pop, idata, int_pc_addr, stk_out) - begin - - pc_in <= stk_out; - if int_pc_load = '1' then - if int_stk_pop = '0' then - pc_in <= int_pc_addr; - end if; - elsif ctrl.lines.pc_load = '1' then - if ctrl.lines.stk_pop = '0' then - pc_in <= idata; - end if; - end if; - - end process; - -mem_data_mux: - process(ctrl.lines.ddata_src_sel, reg_a_dout, reg_b_dout, const_data, creg_ctrl_out) - begin - case ctrl.lines.ddata_src_sel is - when reg_a => - mem_data <= reg_a_dout; - when reg_b => - mem_data <= reg_b_dout; - when const => - mem_data <= const_data; - when others => - mem_data <= const_data; - end case; - - end process; - -mem_addr_mux: - process(ctrl.lines.daddr_src_sel, reg_a_dout, reg_b_dout, const_data, creg_ctrl_out.bank_sel) - begin - case ctrl.lines.daddr_src_sel is - when reg_a => - mem_addr <= reg_a_dout; - when reg_b => - mem_addr <= reg_b_dout; - when const => - mem_addr <= const_data; - when others => - mem_addr <= const_data; - end case; - - end process; - -reg_in_mux: - process(ctrl.lines.reg_src_sel, cio_sel, xmem_din, alu_result, stk_out, cmem_dout, creg_dout) - variable data : dmem_data_t; - begin - case ctrl.lines.reg_src_sel is - when xmem_src => - data := xmem_din; - when cmem_src => - if cio_sel = '0' then - data := cmem_dout(dmem_data_t'range); - else - data := creg_dout(dmem_data_t'range); - end if; - when stk_src => - data := stk_out(dmem_data_t'range); - when others => - data := alu_result; - end case; - - reg_din <= data; - - end process; - -alu_op1_mux: - process(ctrl.lines.alu_op1_src_sel, reg_a_dout, reg_b_dout, const_data) - variable data : dmem_data_t; - begin - case ctrl.lines.alu_op1_src_sel is - when reg_a => - data := reg_a_dout; - when reg_b => - data := reg_b_dout; - when others => - data := const_data; - end case; - - alu_op1 <= data; - - end process; - -alu_op2_mux: - process(ctrl.lines.alu_op2_src_sel, reg_a_dout, reg_b_dout, const_data) - variable data : dmem_data_t; - begin - case ctrl.lines.alu_op2_src_sel is - when reg_a => - data := reg_a_dout; - when reg_b => - data := reg_b_dout; - when others => - data := const_data; - end case; - - alu_op2 <= data; - - end process; - --------------------------------------------------------------------- - inst_stack_ctrl: stack_ctrl - GENERIC MAP ( - addr_width => STACK_SIZE_BITS - ) - PORT MAP( - rst => rst, - clk => clk, - push => stk_push, - pop => stk_pop, - dout => stk_reg, - din => stk_in, - ptr_out => stk_ptr, - mem_we => stk_we - ); - - inst_pc: pc - PORT MAP( - rst => rst, - clk => clk, - inc => pc_inc, - load => pc_load, - pc_in => pc_in, - pc_out => pc_out, - pc_next => pc_next - ); - - inst_dpath_ctrl: dpath_ctrl - GENERIC MAP ( - use_rom => use_ctrl_rom - ) - PORT MAP( - inst_in => ctrl_inst, - iphase_in => ctrl_iphase, - status_in => cpu_status, - ctrl_out => ctrl, - ddout => const_data, - idout => idata - ); - - inst_int_ctrl: int_ctrl - PORT MAP( - rst => rst, - clk => clk, - ctrl_in => creg_ctrl_out.int_ctrl, - int_in => int_in, - int_ack_out => int_ack, - int_exit => ctrl.lines.int_exit, - iphase_in => ctrl_iphase, - stat_save_out => status_save, - stat_rest_out => status_restore, - pc_addr_out => int_pc_addr, - pc_load_out => int_pc_load, - stk_push_out => int_stk_push, - stk_pop_out => int_stk_pop - - ); - - inst_reg_ab: reg_dual - GENERIC MAP ( - addr_width => REG_SIZE_BITS, - data_width => DMEM_DATA_WIDTH - ) - PORT MAP( - clk => clk, - we_a => ctrl.lines.reg_we, - ptr_a => ctrl.reg_a_ptr, - ptr_b => ctrl.reg_b_ptr, - din_a => reg_din, - dout_a => reg_a_dout, - dout_b => reg_b_dout - ); - - inst_chipram: chipram - GENERIC MAP ( - addr_width => CHIPRAM_SIZE_BITS, - data_width => IMEM_ADDR_WIDTH - ) - PORT MAP( - clka => clk, - clkb => clk, - en_a => cpu_active, - en_b => cpu_active, - we_a => stk_we, - we_b => cmem_we, - addr_a => stk_addr, - addr_b => cmem_addr, - din_a => stk_reg, - din_b => cmem_din, - dout_a => stk_out, - dout_b => cmem_dout - ); - - inst_chipreg: chipreg - PORT MAP( - rst => rst, - clk => clk, - we => creg_we, - addr => mem_addr, - din => mem_data, - dout => creg_dout, - ctrl_in => creg_ctrl_in, - ctrl_out => creg_ctrl_out - ); - - inst_alu: alu - GENERIC MAP ( - data_width => DMEM_DATA_WIDTH - ) - PORT MAP( - rst => rst, - clk => clk, - op_en => ctrl.lines.alu_load, - cy_in => ctrl.lines.alu_cy_in, - op1_in => alu_op1, - op2_in => alu_op2, - opsel => ctrl.lines.alu_opsel, - res_out => alu_result, - stat_load => status_restore, - stat_in => status_reg.alu, - stat_out => alu_status - ); - -end rtl; diff --git a/lib/CPUs/JCpu/src/core/cpu_pkg.vhd b/lib/CPUs/JCpu/src/core/cpu_pkg.vhd deleted file mode 100644 index e28d103..0000000 --- a/lib/CPUs/JCpu/src/core/cpu_pkg.vhd +++ /dev/null @@ -1,856 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: Types, constants and functions for JCPU --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - - -package cpu_pkg is - - -- Revision of the CPU - constant REVISION : integer := 4; - - -- Chipram depth (valid values 9..floor(log2(BlockRamBytes))) - constant CHIPRAM_SIZE_BITS : integer := 10; - - -- Number of registers (16 registers fixed) - constant REG_SIZE_BITS : integer := 4; - - -- Instruction memory - constant IMEM_ADDR_WIDTH : integer := 12; - - -- Data memory - constant DMEM_DATA_WIDTH : integer := 8; - constant DMEM_ADDR_WIDTH : integer := 8; - - -- Instruction format - constant INST_OPCODE_WIDTH : integer := 6; - constant IMEM_DATA_WIDTH : integer := INST_OPCODE_WIDTH + DMEM_DATA_WIDTH + REG_SIZE_BITS; - - -- Microcode ROM - constant MUCODE_ADDR_WIDTH : integer := 9; - - -- Stack depth (uses lower half of CHIPRAM) - constant STACK_SIZE_BITS : integer := CHIPRAM_SIZE_BITS-1; - - --Types - subtype iphase_t is integer range 0 to 1; - type mem_access_t is (cmem_access, xmem_access, cio_access, xio_access); - type reg_src_t is (alu_src, stk_src, cmem_src, xmem_src); - type alu_src_t is (reg_a, reg_b, const); - type ddata_src_t is (reg_a, reg_b, const); - type daddr_src_t is (reg_a, reg_b, const); - subtype instr_name_t is string(1 to 12); - type instr_name_array_t is array (0 to 63) of instr_name_t; - subtype opcode_t is unsigned (INST_OPCODE_WIDTH-1 downto 0); - subtype inst_data_t is unsigned (IMEM_ADDR_WIDTH-1 downto 0); - subtype inst_addr_t is unsigned (IMEM_ADDR_WIDTH-1 downto 0); - subtype inst_t is unsigned (IMEM_DATA_WIDTH-1 downto 0); - subtype dmem_data_t is unsigned (DMEM_DATA_WIDTH-1 downto 0); - subtype dmem_addr_t is unsigned (DMEM_DATA_WIDTH-1 downto 0); - subtype reg_ptr_t is unsigned (3 downto 0); - type dmem_array_t is array (natural range <>) of dmem_data_t; - type instr_addr_array is array (integer range <>) of inst_addr_t; - subtype bank_sel_t is unsigned (CHIPRAM_SIZE_BITS-DMEM_DATA_WIDTH-2 downto 0); - - type alu_op_t is - ( - pass_op2, - op1_add_op2, - op1_sub_op2, - op1_addc_op2, - op1_subc_op2, - op1_and_op2, - op1_or_op2, - op1_xor_op2, - swap_op, - shl_op, - shr_op, - rol_op, - ror_op, - rolc_op, - rorc_op - ); - - type alu_status_t is record - zero : STD_LOGIC; - carry : STD_LOGIC; - end record; - - type cpu_status_t is record - alu : alu_status_t; - end record; - - type ctrl_lines_t is record - reg_we : STD_LOGIC; - reg_src_sel : reg_src_t; - alu_op1_src_sel : alu_src_t; - alu_op2_src_sel : alu_src_t; - alu_opsel : alu_op_t; - alu_load : STD_LOGIC; - alu_cy_in : STD_LOGIC; - ddata_src_sel : ddata_src_t; - daddr_src_sel : daddr_src_t; - pc_load : STD_LOGIC; - pc_inc : STD_LOGIC; - stk_push : STD_LOGIC; - stk_pop : STD_LOGIC; - stk_pushd : STD_LOGIC; - stk_popd : STD_LOGIC; - mem_access : mem_access_t; - mem_read : STD_LOGIC; - mem_write : STD_LOGIC; - int_exit : STD_LOGIC; - end record; - - type dpath_ctrl_out_t is record - lines : ctrl_lines_t; - reg_a_ptr : reg_ptr_t; - reg_b_ptr : reg_ptr_t; - end record; - - type int_ctrl_in_t is record - enable : std_logic; - end record; - - type creg_ctrl_out_t is record - bank_sel : bank_sel_t; - int_ctrl : int_ctrl_in_t; - stk_high : unsigned(IMEM_ADDR_WIDTH-DMEM_ADDR_WIDTH-1 downto 0); - cmem_high : unsigned(IMEM_ADDR_WIDTH-DMEM_ADDR_WIDTH-1 downto 0); - end record; - - type creg_ctrl_in_t is record - alu : alu_status_t; - end record; - - - type murom_t is array (0 to integer(2**MUCODE_ADDR_WIDTH)-1) of ctrl_lines_t; - - constant instr_name_array : instr_name_array_t := - ( - "NOP ", -- 00 - "HALT ", -- 01 - "MOV|R|R ", -- 02 - "MOV|R|K ", -- 03 - "MOVX|R|Ri ", -- 04 - "MOVX|R|Ki ", -- 05 - "MOVX|Ri|R ", -- 06 - "MOVX|Ri|K ", -- 07 - "MOVX|Ki|R ", -- 08 - "MOVC|R|Ri ", -- 09 - "MOVC|R|Ki ", -- 0A - "MOVC|Ri|R ", -- 0B - "MOVC|Ri|K ", -- 0C - "MOVC|Ki|R ", -- 0D - "CMP|R|R ", -- 0E - "CMP|R|K ", -- 0F - "ADD|R|R ", -- 10 - "ADD|R|K ", -- 11 - "ADDC|R|R ", -- 12 - "ADDC|R|K ", -- 13 - "SUB|R|R ", -- 14 - "SUB|R|K ", -- 15 - "SUBC|R|R ", -- 16 - "SUBC|R|K ", -- 17 - "AND|R|R ", -- 18 - "AND|R|K ", -- 19 - "OR|R|R ", -- 1A - "OR|R|K ", -- 1B - "XOR|R|R ", -- 1C - "XOR|R|K ", -- 1D - "SHL|R ", -- 1E - "SHR|R ", -- 1F - "ROL|R ", -- 20 - "ROR|R ", -- 21 - "ROLC|R ", -- 22 - "RORC|R ", -- 23 - "XOUT|Ki|R ", -- 24 - "XOUT|Ri|K ", -- 25 - "COUT|Ki|R ", -- 26 - "COUT|Ri|K ", -- 27 - "XIN|R|Ki ", -- 28 - "CIN|R|Ki ", -- 29 - "SWAP|R ", -- 2A - "SETC ", -- 2B - "UNDEF ", -- 2C - "UNDEF ", -- 2D - "SUB|K|R ", -- 2E - "SUBC|K|R ", -- 2F - "JMP|K ", -- 30 - "JZ|K ", -- 31 - "JNZ|K ", -- 32 - "JC|K ", -- 33 - "JNC|K ", -- 34 - "JLT|K ", -- 35 - "JGT|K ", -- 36 - "JLE|K ", -- 37 - "JGE|K ", -- 38 - "JEQ|K ", -- 39 - "JNE|K ", -- 3A - "CALL|K ", -- 3B - "PUSH|R ", -- 3C - "POP|R ", -- 3D - "RET ", -- 3E - "RETI " -- 3F - ); - -- Functions - function Instr(opcode : opcode_t) return inst_t; - function Instr(opcode : opcode_t; data : inst_data_t) return inst_t; - function Instr(opcode : opcode_t; data : inst_data_t; reg : integer) return inst_t; - function Instr(opcode : opcode_t; reg_a : integer) return inst_t; - function Instr(opcode : opcode_t; reg_a, reg_b : integer) return inst_t; - function Instr(opcode : opcode_t; reg_a, reg_b, reg_c : integer) return inst_t; - function ctrl_lines_default return ctrl_lines_t; - function idecoder(instr_name : instr_name_t; iphase : iphase_t; status : cpu_status_t) return ctrl_lines_t; - function idecoder(opcode : opcode_t; iphase : iphase_t; status : cpu_status_t) return ctrl_lines_t; - function gen_murom return murom_t; - function get_muromaddr (opcode : opcode_t; iphase : iphase_t; status : cpu_status_t) return unsigned; - function MIN (X, Y: INTEGER) return INTEGER; - function MAX (X, Y: INTEGER) return INTEGER; - -end cpu_pkg; - -package body cpu_pkg is - - function Instr(opcode : opcode_t) return inst_t is - variable inst : inst_t := (others => '0'); - begin - inst(inst_t'length-1 downto inst_t'length-opcode_t'length) := opcode; - return inst; - - end Instr; - - function Instr(opcode : opcode_t; data : inst_data_t) return inst_t is - variable inst : inst_t := (others => '0'); - begin - inst(inst_t'length-1 downto inst_t'length-opcode_t'length) := opcode; - inst(inst_t'length-opcode_t'length-1 downto inst_t'length-opcode_t'length-inst_addr_t'length) := data; - return inst; - - end Instr; - - function Instr(opcode : opcode_t; data : inst_data_t; reg : integer) return inst_t is - variable inst : inst_t := (others => '0'); - begin - inst(inst_t'length-1 downto inst_t'length-opcode_t'length) := opcode; - inst(inst_t'length-opcode_t'length-1 downto inst_t'length-opcode_t'length-inst_data_t'length) := data; - inst(reg_ptr_t'length-1 downto 0) := reg_ptr_t(to_unsigned(reg, reg_ptr_t'length)); - - return inst; - - end Instr; - - function Instr(opcode : opcode_t; reg_a : integer) return inst_t is - variable inst : inst_t := (others => '0'); - begin - inst(inst_t'length-1 downto inst_t'length-opcode_t'length) := opcode; - inst(reg_ptr_t'length-1 downto 0) := reg_ptr_t(to_unsigned(reg_a, reg_ptr_t'length)); - - return inst; - - end Instr; - - function Instr(opcode : opcode_t; reg_a, reg_b : integer) return inst_t is - variable inst : inst_t := (others => '0'); - begin - inst(inst_t'length-1 downto inst_t'length-opcode_t'length) := opcode; - inst(2*(reg_ptr_t'length)-1 downto reg_ptr_t'length) := reg_ptr_t(to_unsigned(reg_b, reg_ptr_t'length)); - inst(reg_ptr_t'length-1 downto 0) := reg_ptr_t(to_unsigned(reg_a, reg_ptr_t'length)); - - return inst; - - end Instr; - - function Instr(opcode : opcode_t; reg_a, reg_b, reg_c : integer) return inst_t is - variable inst : inst_t := (others => '0'); - begin - inst(inst_t'length-1 downto inst_t'length-opcode_t'length) := opcode; - inst(3*(reg_ptr_t'length)-1 downto 2*reg_ptr_t'length) := reg_ptr_t(to_unsigned(reg_c, reg_ptr_t'length)); - inst(2*(reg_ptr_t'length)-1 downto reg_ptr_t'length) := reg_ptr_t(to_unsigned(reg_b, reg_ptr_t'length)); - inst(reg_ptr_t'length-1 downto 0) := reg_ptr_t(to_unsigned(reg_a, reg_ptr_t'length)); - - return inst; - - end Instr; - - function ctrl_lines_default return ctrl_lines_t is - variable result : ctrl_lines_t; - begin - result.pc_load := '0'; - result.pc_inc := '0'; - result.stk_push := '0'; - result.stk_pop := '0'; - result.stk_pushd := '0'; - result.stk_popd := '0'; - result.reg_we := '0'; - result.reg_src_sel := alu_src; - result.ddata_src_sel := reg_a; - result.daddr_src_sel := reg_b; - result.alu_opsel := pass_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.alu_load := '0'; - result.alu_cy_in := '0'; - result.mem_access := cmem_access; - result.mem_read := '0'; - result.mem_write := '0'; - result.int_exit := '0'; - return result; - - end ctrl_lines_default; - - function idecoder(opcode : opcode_t; iphase : iphase_t; status : cpu_status_t) return ctrl_lines_t is - variable instr_name : instr_name_t; - begin - instr_name := instr_name_array(to_integer(opcode)); - return idecoder(instr_name, iphase, status); - end idecoder; - - function idecoder(instr_name : instr_name_t; iphase : iphase_t; status : cpu_status_t) return ctrl_lines_t is - variable result : ctrl_lines_t; - variable ze, cy : STD_LOGIC; - - begin - ze := status.alu.zero; - cy := status.alu.carry; - - result := ctrl_lines_default; - if iphase = 0 then - result.pc_inc := '1'; - end if; - - case instr_name is - - when "HALT " => - result.pc_inc := '0'; - when "SETC " => -- carry <= 1 - result.reg_src_sel := alu_src; - result.alu_opsel := pass_op2; - result.alu_op2_src_sel := reg_b; - result.alu_load := '1'; - result.alu_cy_in := '1'; - when "MOV|R|R " => -- R(a) <= R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := pass_op2; - result.alu_op2_src_sel := reg_b; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "MOV|R|K " => -- R(a) <= #kk - result.reg_src_sel := alu_src; - result.alu_opsel := pass_op2; - result.alu_op2_src_sel := const; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "MOVC|Ri|R " => -- [R(b)] <= R(a) - result.mem_access := cmem_access; - result.daddr_src_sel := reg_b; - result.ddata_src_sel := reg_a; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "MOVC|Ri|K " => -- [R(a)] <= kk - result.mem_access := cmem_access; - result.daddr_src_sel := reg_a; - result.ddata_src_sel := const; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "COUT|Ri|K " => -- [R(a)] <= kk - result.mem_access := cio_access; - result.daddr_src_sel := reg_a; - result.ddata_src_sel := const; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "MOVC|R|Ri " => -- R(a) <= [R(b)] - result.mem_access := cmem_access; - result.reg_src_sel := cmem_src; - result.daddr_src_sel := reg_b; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "MOVC|R|Ki " => -- R(a) <= [#addr] - result.mem_access := cmem_access; - result.reg_src_sel := cmem_src; - result.daddr_src_sel := const; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "CIN|R|Ki " => -- R(a) <= [#addr] - result.mem_access := cio_access; - result.reg_src_sel := cmem_src; - result.daddr_src_sel := const; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "MOVC|Ki|R " => -- [#addr] <= R(a) - result.mem_access := cmem_access; - result.daddr_src_sel := const; - result.ddata_src_sel := reg_a; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "COUT|Ki|R " => -- [#addr] <= R(a) - result.mem_access := cio_access; - result.daddr_src_sel := const; - result.ddata_src_sel := reg_a; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "MOVX|Ri|R " => -- [R(b)] <= R(a) - result.mem_access := xmem_access; - result.daddr_src_sel := reg_b; - result.ddata_src_sel := reg_a; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "MOVX|Ri|K " => -- [R(a)] <= kk - result.mem_access := xmem_access; - result.daddr_src_sel := reg_a; - result.ddata_src_sel := const; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "XOUT|Ri|K " => -- [R(a)] <= kk - result.mem_access := xio_access; - result.daddr_src_sel := reg_a; - result.ddata_src_sel := const; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "MOVX|R|Ri " => -- R(a) <= [R(b)] - result.mem_access := xmem_access; - result.reg_src_sel := xmem_src; - result.daddr_src_sel := reg_b; - if iphase = 0 then - result.mem_read := '1'; - elsif iphase = 1 then - result.reg_we := '1'; - end if; - when "MOVX|R|Ki " => -- R(a) <= [#addr] - result.mem_access := xmem_access; - result.reg_src_sel := xmem_src; - result.daddr_src_sel := const; - if iphase = 0 then - result.mem_read := '1'; - elsif iphase = 1 then - result.reg_we := '1'; - end if; - when "XIN|R|Ki " => -- R(a) <= [#addr] - result.mem_access := xio_access; - result.reg_src_sel := xmem_src; - result.daddr_src_sel := const; - if iphase = 0 then - result.mem_read := '1'; - elsif iphase = 1 then - result.reg_we := '1'; - end if; - when "MOVX|Ki|R " => -- [#addr] <= R(a) - result.mem_access := xmem_access; - result.daddr_src_sel := const; - result.ddata_src_sel := reg_a; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "XOUT|Ki|R " => -- [#addr] <= R(a) - result.mem_access := xio_access; - result.daddr_src_sel := const; - result.ddata_src_sel := reg_a; - if iphase = 0 then - result.mem_write := '1'; - end if; - when "ADD|R|R " => -- R(a) <= R(a) + R(b) - result.alu_opsel := op1_add_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "ADD|R|K " => -- R(a) <= R(a) + k - result.alu_opsel := op1_add_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "ADDC|R|R " => -- R(a) <= R(a) + R(b) - result.alu_opsel := op1_addc_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "ADDC|R|K " => -- R(a) <= R(a) + k - result.alu_opsel := op1_addc_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SUB|R|R " => -- R(a) <= R(a) + R(b) - result.alu_opsel := op1_sub_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SUB|R|K " => -- R(a) <= R(a) + k - result.alu_opsel := op1_sub_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SUB|K|R " => -- R(a) <= k - R(a) - result.alu_opsel := op1_sub_op2; - result.alu_op1_src_sel := const; - result.alu_op2_src_sel := reg_a; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SUBC|R|R " => -- R(a) <= R(a) + R(b) - result.alu_opsel := op1_subc_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SUBC|R|K " => -- R(a) <= R(a) + k - result.alu_opsel := op1_subc_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SUBC|K|R " => -- R(a) <= K - R(a) - result.alu_opsel := op1_subc_op2; - result.alu_op1_src_sel := const; - result.alu_op2_src_sel := reg_a; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "AND|R|R " => -- R(a) <= R(a) and R(b) - result.alu_opsel := op1_and_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "AND|R|K " => -- R(a) <= R(a) and k - result.alu_opsel := op1_and_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "OR|R|R " => -- R(a) <= R(a) or R(b) - result.alu_opsel := op1_or_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "OR|R|K " => -- R(a) <= R(a) or R(b) - result.alu_opsel := op1_or_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "XOR|R|R " => -- R(a) <= R(a) xor R(b) - result.alu_opsel := op1_xor_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "XOR|R|K " => -- R(a) <= R(a) xor R(b) - result.alu_opsel := op1_xor_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.reg_src_sel := alu_src; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SWAP|R " => -- R(a) <= R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := swap_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SHL|R " => -- R(a) <= R(a) xor R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := shl_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "SHR|R " => -- R(a) <= R(a) xor R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := shr_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "ROL|R " => -- R(a) <= R(a) xor R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := rol_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "ROR|R " => -- R(a) <= R(a) xor R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := ror_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "ROLC|R " => -- R(a) <= R(a) xor R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := rolc_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "RORC|R " => -- R(a) <= R(a) xor R(b) - result.reg_src_sel := alu_src; - result.alu_opsel := rorc_op; - result.alu_op1_src_sel := reg_a; - result.alu_load := '1'; - if iphase = 1 then - result.reg_we := '1'; - end if; - when "CMP|R|R " => -- - result.alu_opsel := op1_sub_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := reg_b; - result.alu_load := '1'; - when "CMP|R|K " => -- - result.alu_opsel := op1_sub_op2; - result.alu_op1_src_sel := reg_a; - result.alu_op2_src_sel := const; - result.alu_load := '1'; - when "JMP|K " => -- PC <= #addr - if iphase = 0 then - result.pc_load := '1'; - end if; - when "JZ|K " => -- PC <= #addr, zero - if iphase = 0 then - if ze = '1' then - result.pc_load := '1'; - end if; - end if; - when "JNZ|K " => -- PC <= #addr, !zero - if iphase = 0 then - if ze = '0' then - result.pc_load := '1'; - end if; - end if; - when "JC|K " => -- PC <= #addr, carry - if iphase = 0 then - if cy = '1' then - result.pc_load := '1'; - end if; - end if; - when "JNC|K " => -- PC <= #addr, !carry - if iphase = 0 then - if cy = '0' then - result.pc_load := '1'; - end if; - end if; - when "JLT|K " => -- PC <= #addr, !carry - if iphase = 0 then - if cy = '1' then - result.pc_load := '1'; - end if; - end if; - when "JGT|K " => -- - if iphase = 0 then - if (cy or ze) = '0' then - result.pc_load := '1'; - end if; - end if; - when "JLE|K " => -- - if iphase = 0 then - if (cy xor ze) = '1' then - result.pc_load := '1'; - end if; - end if; - when "JGE|K " => -- - if iphase = 0 then - if (not cy or ze) = '1' then - result.pc_load := '1'; - end if; - end if; - when "JEQ|K " => -- - if iphase = 0 then - if ze = '1' then - result.pc_load := '1'; - end if; - end if; - when "JNE|K " => -- - if iphase = 0 then - if ze = '0' then - result.pc_load := '1'; - end if; - end if; - when "PUSH|R " => -- push - if iphase = 0 then - result.stk_pushd := '1'; - end if; - when "POP|R " => -- pop - result.reg_src_sel := stk_src; - if iphase = 0 then - result.stk_popd := '1'; - elsif iphase = 1 then - result.reg_we := '1'; - end if; - when "CALL|K " => -- call - if iphase = 0 then - result.pc_load := '1'; - result.stk_push := '1'; - end if; - when "RET " => -- return - if iphase = 0 then - result.pc_load := '1'; - result.stk_pop := '1'; - end if; - when "RETI " => -- return - result.pc_inc := '0'; - result.int_exit := '1'; - - when others => null; -- nop - end case; - - return result; - - end idecoder; - - function gen_murom return murom_t is - variable result : murom_t; - variable opcode : opcode_t; - variable iphase : iphase_t; - variable addr : unsigned(MUCODE_ADDR_WIDTH-1 downto 0); - variable status : cpu_status_t; - variable pos : integer := 0; - - begin - for i in 0 to 2**addr'length-1 loop - addr := to_unsigned(i, addr'length); - opcode := addr(opcode'length-1 downto 0); - pos := opcode'length; - iphase := 0; - if addr(pos) = '1' then - iphase := 1; - end if; - pos := pos + 1; - status.alu.zero := addr(pos); - pos := pos + 1; - status.alu.carry := addr(pos); - - result(i) := idecoder(opcode, iphase, status); - end loop; - - return result; - end gen_murom; - - function get_muromaddr (opcode : opcode_t; iphase : iphase_t; status : cpu_status_t) return unsigned is - variable addr : unsigned(MUCODE_ADDR_WIDTH-1 downto 0); - begin - addr := status.alu.carry & status.alu.zero & to_unsigned(iphase, 1) & opcode; - return addr; - - end get_muromaddr; - - ------------------------------------------------------------- - function MIN (X, Y: INTEGER) return INTEGER is - variable res : integer := X; - begin - if Y < X then - res := Y; - end if; - - return res; - - end MIN; - - ------------------------------------------------------------- - function MAX (X, Y: INTEGER) return INTEGER is - variable res : integer := X; - begin - if Y > X then - res := Y; - end if; - - return res; - - end MAX; - - -end cpu_pkg; - diff --git a/lib/CPUs/JCpu/src/core/dpath_ctrl.vhd b/lib/CPUs/JCpu/src/core/dpath_ctrl.vhd deleted file mode 100644 index 1610d00..0000000 --- a/lib/CPUs/JCpu/src/core/dpath_ctrl.vhd +++ /dev/null @@ -1,87 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The datapath controller --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity dpath_ctrl is - Generic ( - use_rom : boolean := true - ); - Port ( - inst_in : in inst_t; - iphase_in : in iphase_t; - status_in : in cpu_status_t; - ctrl_out : out dpath_ctrl_out_t; - idout : out inst_addr_t; - ddout : out dmem_data_t - ); -end dpath_ctrl; - -architecture Behavioral of dpath_ctrl is - - signal opcode : opcode_t; - signal ctrl_lines : ctrl_lines_t; - signal dbg_iname : instr_name_t; - -begin - - idout <= inst_in(IMEM_ADDR_WIDTH-1 downto 0); - ddout <= inst_in(REG_SIZE_BITS+DMEM_DATA_WIDTH-1 downto REG_SIZE_BITS); - opcode <= inst_in(IMEM_DATA_WIDTH-1 downto IMEM_DATA_WIDTH-INST_OPCODE_WIDTH); - - ctrl_out.reg_a_ptr <= inst_in(reg_ptr_t'length-1 downto 0); - ctrl_out.reg_b_ptr <= inst_in(2*(reg_ptr_t'length)-1 downto reg_ptr_t'length); - ctrl_out.lines <= ctrl_lines; - - -- pragma translate_off - dbg_iname <= instr_name_array(to_integer(opcode)); - -- pragma translate_on - -gen_ctrl_rom: -if use_rom = true generate - - i_dec: - process(opcode, iphase_in, status_in) - constant rom_data : murom_t := gen_murom; - variable addr : unsigned(MUCODE_ADDR_WIDTH-1 downto 0); - begin - addr := get_muromaddr(opcode, iphase_in, status_in); - ctrl_lines <= rom_data(to_integer(addr)); - end process; -end generate; - -gen_ctrl: -if use_rom = false generate - i_dec: - process (opcode, iphase_in, status_in) - begin - ctrl_lines <= idecoder(opcode, iphase_in, status_in); - end process; -end generate; - -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/core/int_ctrl.vhd b/lib/CPUs/JCpu/src/core/int_ctrl.vhd deleted file mode 100644 index ebff3db..0000000 --- a/lib/CPUs/JCpu/src/core/int_ctrl.vhd +++ /dev/null @@ -1,138 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: Interrupt controller --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity int_ctrl is - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ctrl_in : in int_ctrl_in_t; - int_in : in STD_LOGIC; - int_exit : in STD_LOGIC; - iphase_in : in iphase_t; - pc_addr_out : out inst_addr_t; - int_ack_out : out STD_LOGIC; - stat_save_out : out STD_LOGIC; - stat_rest_out : out STD_LOGIC; - pc_load_out : out STD_LOGIC; - stk_push_out : out STD_LOGIC; - stk_pop_out : out STD_LOGIC - ); -end int_ctrl; - -architecture Behavioral of int_ctrl is - - type int_state_t is (int_idle, int_inject, int_active, int_release); - - signal int_state, int_state_next : int_state_t; - signal pc_load, int_ack, stk_push, stk_pop : STD_LOGIC; - signal int_request : std_logic; - - -begin - - int_ack_out <= int_ack; - pc_load_out <= pc_load; - stk_push_out <= stk_push; - stk_pop_out <= stk_pop; - ------------------------------------------------------------------------ -irg_ctrl_fsm: - process (int_state, iphase_in, int_request, int_exit) - begin - - pc_addr_out <= to_unsigned(1, inst_addr_t'length); - int_state_next <= int_state; - int_ack <= '0'; - pc_load <= '0'; - stk_push <= '0'; - stk_pop <= '0'; - case int_state is - - when int_idle => - if int_request = '1' and iphase_in = 1 then - int_state_next <= int_inject; - end if; - when int_inject => - if iphase_in = 0 then - int_ack <= '1'; - pc_load <= '1'; - elsif iphase_in = 1 then - stk_push <= '1'; - int_state_next <= int_active; - end if; - when int_active => - if int_exit = '1' and iphase_in = 1 then - int_state_next <= int_release; - end if; - when int_release => - if iphase_in = 0 then - stk_pop <= '1'; - pc_load <= '1'; - elsif iphase_in = 1 then - int_state_next <= int_idle; - end if; - when others => - int_state_next <= int_idle; - end case; - - end process; - -irq_ctrl_states: - process (rst, clk, int_state_next) - begin - if rst = '1' then - int_state <= int_idle; - elsif rising_edge(clk) then - int_state <= int_state_next; - end if; - end process; - ------------------------------------------------------------------------ -pin_sample: - process (clk) - begin - if rising_edge(clk) then - int_request <= '0'; - if ctrl_in.enable = '1' then - int_request <= int_in; - end if; - end if; - end process; - ------------------------------------------------------------------------ -stat_save_restore: - process (clk, stk_push, stk_pop) - begin - if rising_edge(clk) then - stat_save_out <= stk_push; - stat_rest_out <= stk_pop; - end if; - end process; - -end Behavioral; diff --git a/lib/CPUs/JCpu/src/core/pc.vhd b/lib/CPUs/JCpu/src/core/pc.vhd deleted file mode 100644 index 6b1d575..0000000 --- a/lib/CPUs/JCpu/src/core/pc.vhd +++ /dev/null @@ -1,70 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: Programm counter --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity pc is - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - inc : in STD_LOGIC; - load : in STD_LOGIC; - pc_in : in inst_addr_t; - pc_out : out inst_addr_t; - pc_next : out inst_addr_t - ); -end pc; - -architecture Behavioral of pc is - -begin - -proc_pc: - process(rst, clk, inc, load, pc_in) - variable vpc, vpc_reg: inst_addr_t; - begin - if rst = '1' then - vpc_reg := (others => '0'); - elsif rising_edge(clk) then - if inc = '1' or load = '1' then - vpc_reg := vpc; - elsif inc = '0' then - pc_next <= vpc; - end if; - end if; - - if load = '1' then - vpc := pc_in; - else - vpc := vpc_reg + 1; - end if; - pc_out <= vpc_reg; - - end process; - -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/core/reg_dual.vhd b/lib/CPUs/JCpu/src/core/reg_dual.vhd deleted file mode 100644 index 6b7e4d8..0000000 --- a/lib/CPUs/JCpu/src/core/reg_dual.vhd +++ /dev/null @@ -1,81 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: On-Chip work registers --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity reg_dual is - Generic ( - addr_width : integer := 3; - data_width : integer := 8 - ); - Port ( - clk : in STD_LOGIC; - we_a : in STD_LOGIC; - ptr_a : in reg_ptr_t; - ptr_b : in reg_ptr_t; - din_a : in unsigned (data_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -end reg_dual; - -architecture Behavioral of reg_dual is - - constant depth : integer := 2**addr_width; - type mem_t is array (0 to depth-1) of unsigned (data_width-1 downto 0); - signal addr_a, addr_b : unsigned (addr_width-1 downto 0) := (others => '0'); - - signal mem : mem_t; -begin - - addr_a <= TO_01(ptr_a(addr_width-1 downto 0)); - addr_b <= TO_01(ptr_b(addr_width-1 downto 0)); - -reg_in_ab: - process(clk) - begin - if rising_edge(clk) then - if we_a = '1' then - mem(to_integer(addr_a)) <= din_a; - end if; - end if; - end process; - -reg_out_a: - process(mem, addr_a) - begin - dout_a <= TO_01(mem(to_integer(addr_a))); - end process; - -reg_out_b: - process(mem, addr_b) - begin - dout_b <= TO_01(mem(to_integer(addr_b))); - end process; - -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/core/stack_ctrl.vhd b/lib/CPUs/JCpu/src/core/stack_ctrl.vhd deleted file mode 100644 index 7eccae3..0000000 --- a/lib/CPUs/JCpu/src/core/stack_ctrl.vhd +++ /dev/null @@ -1,73 +0,0 @@ --------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The call/return/data stack --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity stack_ctrl is -Generic ( - addr_width : integer := 3 -); -Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - push : in STD_LOGIC; - pop : in STD_LOGIC; - ptr_out : out unsigned (addr_width-1 downto 0); - din : in inst_addr_t; - dout : out inst_addr_t; - mem_we : out STD_LOGIC - ); -end stack_ctrl; - -architecture Behavioral of stack_ctrl is - - signal ptr : unsigned (addr_width-1 downto 0); - -begin - - ptr_out <= ptr; - -stk_ptr: - process(rst, clk, ptr, push, pop) - begin - if rst = '1' then - ptr <= (others => '0'); - dout <= (others => '0'); - mem_we <= '0'; - elsif rising_edge(clk) then - mem_we <= push; - if push = '1' then - ptr <= ptr + 1; - dout <= din; - elsif pop = '1' then - ptr <= ptr - 1; - end if; - end if; - end process; - -end Behavioral; - diff --git a/lib/CPUs/JCpu/src/cpu_embedded.vhd b/lib/CPUs/JCpu/src/cpu_embedded.vhd deleted file mode 100644 index 56c6dec..0000000 --- a/lib/CPUs/JCpu/src/cpu_embedded.vhd +++ /dev/null @@ -1,106 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.cpu_pkg.all; - -entity cpu_embedded is - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - int_in : in STD_LOGIC; - int_ack : out STD_LOGIC; - xmem_we : out STD_LOGIC; - xmem_re : out STD_LOGIC; - xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_addr : out unsigned (DMEM_ADDR_WIDTH-1 downto 0); - io_sel : out STD_LOGIC - ); -end cpu_embedded; - -architecture rtl of cpu_embedded is - - signal irom_data : unsigned (IMEM_DATA_WIDTH-1 downto 0); - signal irom_addr : unsigned (IMEM_ADDR_WIDTH-1 downto 0); - - COMPONENT cpu - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - int_in : in STD_LOGIC; - int_ack : out STD_LOGIC; - xmem_we : out STD_LOGIC; - xmem_re : out STD_LOGIC; - instr_din : in unsigned (IMEM_DATA_WIDTH-1 downto 0); - instr_addr : out unsigned (IMEM_ADDR_WIDTH-1 downto 0); - xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_addr : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - io_sel : out STD_LOGIC - ); - END COMPONENT; - - - COMPONENT irom - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - END COMPONENT; - -begin - -inst_cpu: cpu - PORT MAP( - rst => rst, - clk => clk, - ce => ce, - int_in => int_in, - int_ack => int_ack, - xmem_we => xmem_we, - xmem_re => xmem_re, - instr_din => irom_data, - instr_addr => irom_addr, - xmem_din => xmem_din, - xmem_dout => xmem_dout, - xmem_addr => xmem_addr, - io_sel => io_sel - ); - -inst_irom: irom - PORT MAP( - clk => clk, - ce => ce, - addr => irom_addr, - dout => irom_data - ); - -end rtl; diff --git a/lib/CPUs/JCpu/src/dctest_irom.vhdl b/lib/CPUs/JCpu/src/dctest_irom.vhdl deleted file mode 100644 index 7987a15..0000000 --- a/lib/CPUs/JCpu/src/dctest_irom.vhdl +++ /dev/null @@ -1,79 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); -END irom; - -ARCHITECTURE dctest OF irom IS - - type imem_rom_t is array (0 to 17) of inst_t; - - -- Assembled from dctest.jsm - constant imem_rom : imem_rom_t := - ( - "110000" & X"010", -- 0x000: JMP 0x010 - "110000" & X"011", -- 0x001: JMP 0x011 - "000000" & X"000", -- 0x002: - "000000" & X"000", -- 0x003: - "000000" & X"000", -- 0x004: - "000000" & X"000", -- 0x005: - "000000" & X"000", -- 0x006: - "000000" & X"000", -- 0x007: - "000000" & X"000", -- 0x008: - "000000" & X"000", -- 0x009: - "000000" & X"000", -- 0x00A: - "000000" & X"000", -- 0x00B: - "000000" & X"000", -- 0x00C: - "000000" & X"000", -- 0x00D: - "000000" & X"000", -- 0x00E: - "000000" & X"000", -- 0x00F: - "110000" & X"010", -- 0x010: JMP 0x010 - "111111" & X"000" -- 0x011: RETI - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -end dctest; - diff --git a/lib/CPUs/JCpu/src/dctest_irom_ld.vhdl b/lib/CPUs/JCpu/src/dctest_irom_ld.vhdl deleted file mode 100644 index 223dd46..0000000 --- a/lib/CPUs/JCpu/src/dctest_irom_ld.vhdl +++ /dev/null @@ -1,1181 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - -END irom; - -ARCHITECTURE loadable OF irom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from dctest.jsm - type imem_rom_t is array (0 to 1023) of inst_t; - signal imem_rom : imem_rom_t := - ( - "110000" & X"010", -- 0x000: JMP 0x010 - "110000" & X"011", -- 0x001: JMP 0x011 - "000000" & X"000", -- 0x002: - "000000" & X"000", -- 0x003: - "000000" & X"000", -- 0x004: - "000000" & X"000", -- 0x005: - "000000" & X"000", -- 0x006: - "000000" & X"000", -- 0x007: - "000000" & X"000", -- 0x008: - "000000" & X"000", -- 0x009: - "000000" & X"000", -- 0x00A: - "000000" & X"000", -- 0x00B: - "000000" & X"000", -- 0x00C: - "000000" & X"000", -- 0x00D: - "000000" & X"000", -- 0x00E: - "000000" & X"000", -- 0x00F: - "110000" & X"010", -- 0x010: JMP 0x010 - "111111" & X"000", -- 0x011: RETI - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000" - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : inst_addr_t; - signal jtag_ld_dout : inst_t; - signal jtag_ld_din : inst_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (31 downto 0); - constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); - jtag_ld_din <= user_regi(inst_t'length-1 downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/dctest_xrom.vhdl b/lib/CPUs/JCpu/src/dctest_xrom.vhdl deleted file mode 100644 index 24fe36c..0000000 --- a/lib/CPUs/JCpu/src/dctest_xrom.vhdl +++ /dev/null @@ -1,317 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); -END xrom; - -ARCHITECTURE dctest OF xrom IS - - type xmem_rom_t is array (0 to 255) of dmem_data_t; - - -- Assembled from dctest.jsm - constant xmem_rom : xmem_rom_t := - ( - X"00", -- 0x00 - X"00", -- 0x01 - X"00", -- 0x02 - X"00", -- 0x03 - X"01", -- 0x04 - X"12", -- 0x05 - X"41", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"48", -- 0x17 - X"61", -- 0x18 - X"6C", -- 0x19 - X"6C", -- 0x1A - X"6F", -- 0x1B - X"0D", -- 0x1C - X"0A", -- 0x1D - X"00", -- 0x1E - X"4A", -- 0x1F - X"65", -- 0x20 - X"6E", -- 0x21 - X"73", -- 0x22 - X"00", -- 0x23 - X"57", -- 0x24 - X"65", -- 0x25 - X"6C", -- 0x26 - X"63", -- 0x27 - X"6F", -- 0x28 - X"6D", -- 0x29 - X"65", -- 0x2A - X"20", -- 0x2B - X"74", -- 0x2C - X"6F", -- 0x2D - X"20", -- 0x2E - X"4A", -- 0x2F - X"41", -- 0x30 - X"53", -- 0x31 - X"4D", -- 0x32 - X"20", -- 0x33 - X"43", -- 0x34 - X"50", -- 0x35 - X"55", -- 0x36 - X"00", -- 0x37 - X"52", -- 0x38 - X"65", -- 0x39 - X"61", -- 0x3A - X"64", -- 0x3B - X"79", -- 0x3C - X"00", -- 0x3D - X"54", -- 0x3E - X"65", -- 0x3F - X"73", -- 0x40 - X"74", -- 0x41 - X"69", -- 0x42 - X"6E", -- 0x43 - X"67", -- 0x44 - X"00", -- 0x45 - X"50", -- 0x46 - X"61", -- 0x47 - X"73", -- 0x48 - X"73", -- 0x49 - X"65", -- 0x4A - X"64", -- 0x4B - X"00", -- 0x4C - X"45", -- 0x4D - X"72", -- 0x4E - X"72", -- 0x4F - X"6F", -- 0x50 - X"72", -- 0x51 - X"00", -- 0x52 - X"0D", -- 0x53 - X"0A", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -end dctest; - diff --git a/lib/CPUs/JCpu/src/dctest_xrom_ld.vhdl b/lib/CPUs/JCpu/src/dctest_xrom_ld.vhdl deleted file mode 100644 index 802ba50..0000000 --- a/lib/CPUs/JCpu/src/dctest_xrom_ld.vhdl +++ /dev/null @@ -1,413 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); - -END xrom; - -ARCHITECTURE loadable OF xrom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from dctest.jsm - type xmem_rom_t is array (0 to 255) of dmem_data_t; - signal xmem_rom : xmem_rom_t := - ( - X"00", -- 0x00 - X"00", -- 0x01 - X"00", -- 0x02 - X"00", -- 0x03 - X"01", -- 0x04 - X"12", -- 0x05 - X"41", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"48", -- 0x17 - X"61", -- 0x18 - X"6C", -- 0x19 - X"6C", -- 0x1A - X"6F", -- 0x1B - X"0D", -- 0x1C - X"0A", -- 0x1D - X"00", -- 0x1E - X"4A", -- 0x1F - X"65", -- 0x20 - X"6E", -- 0x21 - X"73", -- 0x22 - X"00", -- 0x23 - X"57", -- 0x24 - X"65", -- 0x25 - X"6C", -- 0x26 - X"63", -- 0x27 - X"6F", -- 0x28 - X"6D", -- 0x29 - X"65", -- 0x2A - X"20", -- 0x2B - X"74", -- 0x2C - X"6F", -- 0x2D - X"20", -- 0x2E - X"4A", -- 0x2F - X"41", -- 0x30 - X"53", -- 0x31 - X"4D", -- 0x32 - X"20", -- 0x33 - X"43", -- 0x34 - X"50", -- 0x35 - X"55", -- 0x36 - X"00", -- 0x37 - X"52", -- 0x38 - X"65", -- 0x39 - X"61", -- 0x3A - X"64", -- 0x3B - X"79", -- 0x3C - X"00", -- 0x3D - X"54", -- 0x3E - X"65", -- 0x3F - X"73", -- 0x40 - X"74", -- 0x41 - X"69", -- 0x42 - X"6E", -- 0x43 - X"67", -- 0x44 - X"00", -- 0x45 - X"50", -- 0x46 - X"61", -- 0x47 - X"73", -- 0x48 - X"73", -- 0x49 - X"65", -- 0x4A - X"64", -- 0x4B - X"00", -- 0x4C - X"45", -- 0x4D - X"72", -- 0x4E - X"72", -- 0x4F - X"6F", -- 0x50 - X"72", -- 0x51 - X"00", -- 0x52 - X"0D", -- 0x53 - X"0A", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : dmem_addr_t; - signal jtag_ld_dout : dmem_data_t; - signal jtag_ld_din : dmem_data_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (15 downto 0); - constant id : unsigned (15 downto 0) := X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); - jtag_ld_din <= user_regi(dmem_data_t'left downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/itest_irom.vhdl b/lib/CPUs/JCpu/src/itest_irom.vhdl deleted file mode 100644 index 0ed28f2..0000000 --- a/lib/CPUs/JCpu/src/itest_irom.vhdl +++ /dev/null @@ -1,1086 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY irom IS - Port - ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); -END irom; - -ARCHITECTURE itest OF irom IS - - type imem_rom_t is array (0 to 1023) of inst_t; - - -- Assembled from itest.jsm - constant imem_rom : imem_rom_t := - ( - "110000" & X"010", -- 0x000: JMP 0x010 - "110000" & X"288", -- 0x001: JMP 0x288 - "000000" & X"000", -- 0x002: - "000000" & X"000", -- 0x003: - "000000" & X"000", -- 0x004: - "000000" & X"000", -- 0x005: - "000000" & X"000", -- 0x006: - "000000" & X"000", -- 0x007: - "000000" & X"000", -- 0x008: - "000000" & X"000", -- 0x009: - "000000" & X"000", -- 0x00A: - "000000" & X"000", -- 0x00B: - "000000" & X"000", -- 0x00C: - "000000" & X"000", -- 0x00D: - "000000" & X"000", -- 0x00E: - "000000" & X"000", -- 0x00F: - "111011" & X"03B", -- 0x010: CALL 0x03B - "101001" & X"000", -- 0x011: CIN R00, (0x00) - "100100" & X"000", -- 0x012: XOUT (0x00), R00 - "111011" & X"04C", -- 0x013: CALL 0x04C - "000011" & X"010", -- 0x014: MOV R00, 0x01 - "100100" & X"010", -- 0x015: XOUT (0x01), R00 - "111011" & X"08D", -- 0x016: CALL 0x08D - "000011" & X"020", -- 0x017: MOV R00, 0x02 - "100100" & X"010", -- 0x018: XOUT (0x01), R00 - "111011" & X"0C9", -- 0x019: CALL 0x0C9 - "000011" & X"030", -- 0x01A: MOV R00, 0x03 - "100100" & X"010", -- 0x01B: XOUT (0x01), R00 - "111011" & X"0DB", -- 0x01C: CALL 0x0DB - "000011" & X"040", -- 0x01D: MOV R00, 0x04 - "100100" & X"010", -- 0x01E: XOUT (0x01), R00 - "111011" & X"0ED", -- 0x01F: CALL 0x0ED - "000011" & X"050", -- 0x020: MOV R00, 0x05 - "100100" & X"010", -- 0x021: XOUT (0x01), R00 - "111011" & X"0FF", -- 0x022: CALL 0x0FF - "000011" & X"060", -- 0x023: MOV R00, 0x06 - "100100" & X"010", -- 0x024: XOUT (0x01), R00 - "111011" & X"115", -- 0x025: CALL 0x115 - "000011" & X"070", -- 0x026: MOV R00, 0x07 - "100100" & X"010", -- 0x027: XOUT (0x01), R00 - "111011" & X"12B", -- 0x028: CALL 0x12B - "000011" & X"080", -- 0x029: MOV R00, 0x08 - "100100" & X"010", -- 0x02A: XOUT (0x01), R00 - "111011" & X"137", -- 0x02B: CALL 0x137 - "000011" & X"090", -- 0x02C: MOV R00, 0x09 - "100100" & X"010", -- 0x02D: XOUT (0x01), R00 - "111011" & X"15A", -- 0x02E: CALL 0x15A - "000011" & X"0A0", -- 0x02F: MOV R00, 0x0A - "100100" & X"010", -- 0x030: XOUT (0x01), R00 - "111011" & X"22A", -- 0x031: CALL 0x22A - "000011" & X"0B0", -- 0x032: MOV R00, 0x0B - "100100" & X"010", -- 0x033: XOUT (0x01), R00 - "111011" & X"24D", -- 0x034: CALL 0x24D - "000011" & X"0C0", -- 0x035: MOV R00, 0x0C - "100100" & X"010", -- 0x036: XOUT (0x01), R00 - "111011" & X"278", -- 0x037: CALL 0x278 - "000011" & X"FF0", -- 0x038: MOV R00, 0xFF - "100100" & X"010", -- 0x039: XOUT (0x01), R00 - "110000" & X"2FF", -- 0x03A: JMP 0x2FF - "000011" & X"000", -- 0x03B: MOV R00, 0x00 - "000011" & X"001", -- 0x03C: MOV R01, 0x00 - "000011" & X"002", -- 0x03D: MOV R02, 0x00 - "000011" & X"003", -- 0x03E: MOV R03, 0x00 - "000011" & X"004", -- 0x03F: MOV R04, 0x00 - "000011" & X"005", -- 0x040: MOV R05, 0x00 - "000011" & X"006", -- 0x041: MOV R06, 0x00 - "000011" & X"007", -- 0x042: MOV R07, 0x00 - "000011" & X"008", -- 0x043: MOV R08, 0x00 - "000011" & X"009", -- 0x044: MOV R09, 0x00 - "000011" & X"00A", -- 0x045: MOV R10, 0x00 - "000011" & X"00B", -- 0x046: MOV R11, 0x00 - "000011" & X"00C", -- 0x047: MOV R12, 0x00 - "000011" & X"00D", -- 0x048: MOV R13, 0x00 - "000011" & X"00E", -- 0x049: MOV R14, 0x00 - "000011" & X"00F", -- 0x04A: MOV R15, 0x00 - "111110" & X"000", -- 0x04B: RET - "000011" & X"100", -- 0x04C: MOV R00, 0x10 - "001111" & X"100", -- 0x04D: CMP R00, 0x10 - "111010" & X"3FF", -- 0x04E: JNE 0x3FF - "010001" & X"010", -- 0x04F: ADD R00, 0x01 - "000010" & X"001", -- 0x050: MOV R01, R00 - "001111" & X"111", -- 0x051: CMP R01, 0x11 - "111010" & X"3FF", -- 0x052: JNE 0x3FF - "010001" & X"011", -- 0x053: ADD R01, 0x01 - "000010" & X"012", -- 0x054: MOV R02, R01 - "001111" & X"122", -- 0x055: CMP R02, 0x12 - "111010" & X"3FF", -- 0x056: JNE 0x3FF - "010001" & X"012", -- 0x057: ADD R02, 0x01 - "000010" & X"023", -- 0x058: MOV R03, R02 - "001111" & X"133", -- 0x059: CMP R03, 0x13 - "111010" & X"3FF", -- 0x05A: JNE 0x3FF - "010001" & X"013", -- 0x05B: ADD R03, 0x01 - "000010" & X"034", -- 0x05C: MOV R04, R03 - "001111" & X"144", -- 0x05D: CMP R04, 0x14 - "111010" & X"3FF", -- 0x05E: JNE 0x3FF - "010001" & X"014", -- 0x05F: ADD R04, 0x01 - "000010" & X"045", -- 0x060: MOV R05, R04 - "001111" & X"155", -- 0x061: CMP R05, 0x15 - "111010" & X"3FF", -- 0x062: JNE 0x3FF - "010001" & X"015", -- 0x063: ADD R05, 0x01 - "000010" & X"056", -- 0x064: MOV R06, R05 - "001111" & X"166", -- 0x065: CMP R06, 0x16 - "111010" & X"3FF", -- 0x066: JNE 0x3FF - "010001" & X"016", -- 0x067: ADD R06, 0x01 - "000010" & X"067", -- 0x068: MOV R07, R06 - "001111" & X"177", -- 0x069: CMP R07, 0x17 - "111010" & X"3FF", -- 0x06A: JNE 0x3FF - "010001" & X"017", -- 0x06B: ADD R07, 0x01 - "000010" & X"078", -- 0x06C: MOV R08, R07 - "001111" & X"188", -- 0x06D: CMP R08, 0x18 - "111010" & X"3FF", -- 0x06E: JNE 0x3FF - "010001" & X"018", -- 0x06F: ADD R08, 0x01 - "000010" & X"089", -- 0x070: MOV R09, R08 - "001111" & X"199", -- 0x071: CMP R09, 0x19 - "111010" & X"3FF", -- 0x072: JNE 0x3FF - "010001" & X"019", -- 0x073: ADD R09, 0x01 - "000010" & X"09A", -- 0x074: MOV R10, R09 - "001111" & X"1AA", -- 0x075: CMP R10, 0x1A - "111010" & X"3FF", -- 0x076: JNE 0x3FF - "010001" & X"01A", -- 0x077: ADD R10, 0x01 - "000010" & X"0AB", -- 0x078: MOV R11, R10 - "001111" & X"1BB", -- 0x079: CMP R11, 0x1B - "111010" & X"3FF", -- 0x07A: JNE 0x3FF - "010001" & X"01B", -- 0x07B: ADD R11, 0x01 - "000010" & X"0BC", -- 0x07C: MOV R12, R11 - "001111" & X"1CC", -- 0x07D: CMP R12, 0x1C - "111010" & X"3FF", -- 0x07E: JNE 0x3FF - "010001" & X"01C", -- 0x07F: ADD R12, 0x01 - "000010" & X"0CD", -- 0x080: MOV R13, R12 - "001111" & X"1DD", -- 0x081: CMP R13, 0x1D - "111010" & X"3FF", -- 0x082: JNE 0x3FF - "010001" & X"01D", -- 0x083: ADD R13, 0x01 - "000010" & X"0DE", -- 0x084: MOV R14, R13 - "001111" & X"1EE", -- 0x085: CMP R14, 0x1E - "111010" & X"3FF", -- 0x086: JNE 0x3FF - "010001" & X"01E", -- 0x087: ADD R14, 0x01 - "000010" & X"0EF", -- 0x088: MOV R15, R14 - "001111" & X"1FF", -- 0x089: CMP R15, 0x1F - "111010" & X"3FF", -- 0x08A: JNE 0x3FF - "010001" & X"01F", -- 0x08B: ADD R15, 0x01 - "111110" & X"000", -- 0x08C: RET - "000011" & X"000", -- 0x08D: MOV R00, 0x00 - "001111" & X"000", -- 0x08E: TST R00 - "110010" & X"3FF", -- 0x08F: JNZ 0x3FF - "110011" & X"3FF", -- 0x090: JC 0x3FF - "001111" & X"000", -- 0x091: CMP R00, 0x00 - "111010" & X"3FF", -- 0x092: JNE 0x3FF - "110101" & X"3FF", -- 0x093: JLT 0x3FF - "110110" & X"3FF", -- 0x094: JGT 0x3FF - "110111" & X"097", -- 0x095: JLE 0x097 - "110000" & X"3FF", -- 0x096: JMP 0x3FF - "111001" & X"099", -- 0x097: JEQ 0x099 - "110000" & X"3FF", -- 0x098: JMP 0x3FF - "111000" & X"09B", -- 0x099: JGE 0x09B - "110000" & X"3FF", -- 0x09A: JMP 0x3FF - "001111" & X"550", -- 0x09B: CMP R00, 0x55 - "111001" & X"3FF", -- 0x09C: JEQ 0x3FF - "110101" & X"09F", -- 0x09D: JLT 0x09F - "110000" & X"3FF", -- 0x09E: JMP 0x3FF - "110111" & X"0A1", -- 0x09F: JLE 0x0A1 - "110000" & X"3FF", -- 0x0A0: JMP 0x3FF - "111000" & X"3FF", -- 0x0A1: JGE 0x3FF - "110110" & X"3FF", -- 0x0A2: JGT 0x3FF - "000011" & X"550", -- 0x0A3: MOV R00, 0x55 - "001111" & X"000", -- 0x0A4: TST R00 - "110001" & X"3FF", -- 0x0A5: JZ 0x3FF - "110011" & X"3FF", -- 0x0A6: JC 0x3FF - "001111" & X"AA0", -- 0x0A7: CMP R00, 0xAA - "111001" & X"3FF", -- 0x0A8: JEQ 0x3FF - "111010" & X"0AB", -- 0x0A9: JNE 0x0AB - "110000" & X"3FF", -- 0x0AA: JMP 0x3FF - "110101" & X"0AD", -- 0x0AB: JLT 0x0AD - "110000" & X"3FF", -- 0x0AC: JMP 0x3FF - "110111" & X"0AF", -- 0x0AD: JLE 0x0AF - "110000" & X"3FF", -- 0x0AE: JMP 0x3FF - "110110" & X"3FF", -- 0x0AF: JGT 0x3FF - "001111" & X"550", -- 0x0B0: CMP R00, 0x55 - "111001" & X"0B3", -- 0x0B1: JEQ 0x0B3 - "110000" & X"3FF", -- 0x0B2: JMP 0x3FF - "111010" & X"3FF", -- 0x0B3: JNE 0x3FF - "110101" & X"3FF", -- 0x0B4: JLT 0x3FF - "110111" & X"0B7", -- 0x0B5: JLE 0x0B7 - "110000" & X"3FF", -- 0x0B6: JMP 0x3FF - "110110" & X"3FF", -- 0x0B7: JGT 0x3FF - "111000" & X"0BA", -- 0x0B8: JGE 0x0BA - "110000" & X"3FF", -- 0x0B9: JMP 0x3FF - "000011" & X"AA0", -- 0x0BA: MOV R00, 0xAA - "001111" & X"000", -- 0x0BB: TST R00 - "110001" & X"3FF", -- 0x0BC: JZ 0x3FF - "110011" & X"3FF", -- 0x0BD: JC 0x3FF - "001111" & X"550", -- 0x0BE: CMP R00, 0x55 - "111001" & X"3FF", -- 0x0BF: JEQ 0x3FF - "111010" & X"0C2", -- 0x0C0: JNE 0x0C2 - "110000" & X"3FF", -- 0x0C1: JMP 0x3FF - "110110" & X"0C4", -- 0x0C2: JGT 0x0C4 - "110000" & X"3FF", -- 0x0C3: JMP 0x3FF - "111000" & X"0C6", -- 0x0C4: JGE 0x0C6 - "110000" & X"3FF", -- 0x0C5: JMP 0x3FF - "110101" & X"3FF", -- 0x0C6: JLT 0x3FF - "110111" & X"3FF", -- 0x0C7: JLE 0x3FF - "111110" & X"000", -- 0x0C8: RET - "000011" & X"000", -- 0x0C9: MOV R00, 0x00 - "000011" & X"001", -- 0x0CA: MOV R01, 0x00 - "000010" & X"002", -- 0x0CB: MOV R02, R00 - "000010" & X"013", -- 0x0CC: MOV R03, R01 - "010001" & X"010", -- 0x0CD: ADD R00, 0x01 - "010011" & X"001", -- 0x0CE: ADDC R01, 0x00 - "010001" & X"012", -- 0x0CF: ADD R02, 0x01 - "001111" & X"002", -- 0x0D0: CMP R02, 0x00 - "111010" & X"0D4", -- 0x0D1: JNE 0x0D4 - "010001" & X"013", -- 0x0D2: ADD R03, 0x01 - "001111" & X"023", -- 0x0D3: CMP R03, 0x02 - "111010" & X"0CD", -- 0x0D4: JNE 0x0CD - "001110" & X"020", -- 0x0D5: CMP R00, R02 - "111010" & X"3FF", -- 0x0D6: JNE 0x3FF - "001110" & X"031", -- 0x0D7: CMP R01, R03 - "111010" & X"3FF", -- 0x0D8: JNE 0x3FF - "000011" & X"000", -- 0x0D9: MOV R00, 0x00 - "111110" & X"000", -- 0x0DA: RET - "000011" & X"000", -- 0x0DB: MOV R00, 0x00 - "000011" & X"031", -- 0x0DC: MOV R01, 0x03 - "000010" & X"002", -- 0x0DD: MOV R02, R00 - "000010" & X"013", -- 0x0DE: MOV R03, R01 - "010101" & X"010", -- 0x0DF: SUB R00, 0x01 - "010111" & X"001", -- 0x0E0: SUBC R01, 0x00 - "010101" & X"012", -- 0x0E1: SUB R02, 0x01 - "001111" & X"FF2", -- 0x0E2: CMP R02, 0xFF - "111010" & X"0E6", -- 0x0E3: JNE 0x0E6 - "010101" & X"013", -- 0x0E4: SUB R03, 0x01 - "001111" & X"003", -- 0x0E5: CMP R03, 0x00 - "111010" & X"0DF", -- 0x0E6: JNE 0x0DF - "001110" & X"020", -- 0x0E7: CMP R00, R02 - "111010" & X"3FF", -- 0x0E8: JNE 0x3FF - "001110" & X"031", -- 0x0E9: CMP R01, R03 - "111010" & X"3FF", -- 0x0EA: JNE 0x3FF - "000011" & X"000", -- 0x0EB: MOV R00, 0x00 - "111110" & X"000", -- 0x0EC: RET - "000011" & X"030", -- 0x0ED: MOV R00, 0x03 - "000011" & X"051", -- 0x0EE: MOV R01, 0x05 - "101110" & X"050", -- 0x0EF: SUB 0x05, R00 - "010101" & X"031", -- 0x0F0: SUB R01, 0x03 - "001110" & X"010", -- 0x0F1: CMP R00, R01 - "111010" & X"3FF", -- 0x0F2: JNE 0x3FF - "000011" & X"030", -- 0x0F3: MOV R00, 0x03 - "000011" & X"051", -- 0x0F4: MOV R01, 0x05 - "010100" & X"010", -- 0x0F5: SUB R00, R01 - "101111" & X"000", -- 0x0F6: SUBC 0x00, R00 - "001111" & X"010", -- 0x0F7: CMP R00, 0x01 - "111010" & X"3FF", -- 0x0F8: JNE 0x3FF - "010001" & X"000", -- 0x0F9: ADD R00, 0x00 - "010110" & X"001", -- 0x0FA: SUBC R01, R00 - "001111" & X"041", -- 0x0FB: CMP R01, 0x04 - "111010" & X"3FF", -- 0x0FC: JNE 0x3FF - "000011" & X"000", -- 0x0FD: MOV R00, 0x00 - "111110" & X"000", -- 0x0FE: RET - "000011" & X"010", -- 0x0FF: MOV R00, 0x01 - "001101" & X"5A0", -- 0x100: MOVC (0x5A), R00 - "010101" & X"010", -- 0x101: DEC R00 - "001101" & X"000", -- 0x102: MOVC (0x00), R00 - "001010" & X"5A1", -- 0x103: MOVC R01, (0x5A) - "001100" & X"A51", -- 0x104: MOVC (R01), 0xA5 - "001001" & X"010", -- 0x105: MOVC R00, (R01) - "001001" & X"011", -- 0x106: MOVC R01, (R01) - "010001" & X"5A1", -- 0x107: ADD R01, 0x5A - "001001" & X"010", -- 0x108: MOVC R00, (R01) - "001011" & X"000", -- 0x109: MOVC (R00), R00 - "001001" & X"002", -- 0x10A: MOVC R02, (R00) - "001110" & X"002", -- 0x10B: CMP R02, R00 - "111010" & X"3FF", -- 0x10C: JNE 0x3FF - "001011" & X"021", -- 0x10D: MOVC (R01), R02 - "001001" & X"022", -- 0x10E: MOVC R02, (R02) - "001110" & X"012", -- 0x10F: CMP R02, R01 - "111010" & X"3FF", -- 0x110: JNE 0x3FF - "010101" & X"011", -- 0x111: DEC R01 - "010001" & X"010", -- 0x112: INC R00 - "110010" & X"109", -- 0x113: JNZ 0x109 - "111110" & X"000", -- 0x114: RET - "000011" & X"010", -- 0x115: MOV R00, 0x01 - "001000" & X"600", -- 0x116: MOVX (0x60), R00 - "010101" & X"010", -- 0x117: DEC R00 - "001000" & X"060", -- 0x118: MOVX (0x06), R00 - "000101" & X"601", -- 0x119: MOVX R01, (0x60) - "000111" & X"A51", -- 0x11A: MOVX (R01), 0xA5 - "000100" & X"010", -- 0x11B: MOVX R00, (R01) - "000100" & X"011", -- 0x11C: MOVX R01, (R01) - "010001" & X"5A1", -- 0x11D: ADD R01, 0x5A - "000100" & X"010", -- 0x11E: MOVX R00, (R01) - "000110" & X"000", -- 0x11F: MOVX (R00), R00 - "000100" & X"002", -- 0x120: MOVX R02, (R00) - "001110" & X"002", -- 0x121: CMP R02, R00 - "111010" & X"3FF", -- 0x122: JNE 0x3FF - "000110" & X"021", -- 0x123: MOVX (R01), R02 - "000100" & X"022", -- 0x124: MOVX R02, (R02) - "001110" & X"012", -- 0x125: CMP R02, R01 - "111010" & X"3FF", -- 0x126: JNE 0x3FF - "010101" & X"011", -- 0x127: DEC R01 - "010001" & X"010", -- 0x128: INC R00 - "110010" & X"11F", -- 0x129: JNZ 0x11F - "111110" & X"000", -- 0x12A: RET - "000011" & X"AA0", -- 0x12B: MOV R00, 0xAA - "000011" & X"001", -- 0x12C: MOV R01, 0x00 - "111100" & X"000", -- 0x12D: PUSH R00 - "010001" & X"010", -- 0x12E: INC R00 - "010101" & X"011", -- 0x12F: DEC R01 - "110010" & X"12D", -- 0x130: JNZ 0x12D - "111101" & X"000", -- 0x131: POP R00 - "010101" & X"011", -- 0x132: DEC R01 - "110010" & X"131", -- 0x133: JNZ 0x131 - "001111" & X"AA0", -- 0x134: CMP R00, 0xAA - "111010" & X"3FF", -- 0x135: JNE 0x3FF - "111110" & X"000", -- 0x136: RET - "000011" & X"550", -- 0x137: MOV R00, 0x55 - "111100" & X"000", -- 0x138: PUSH R00 - "000011" & X"000", -- 0x139: MOV R00, 0x00 - "000011" & X"FF1", -- 0x13A: MOV R01, 0xFF - "111011" & X"151", -- 0x13B: CALL 0x151 - "111101" & X"000", -- 0x13C: POP R00 - "001111" & X"550", -- 0x13D: CMP R00, 0x55 - "111010" & X"3FF", -- 0x13E: JNE 0x3FF - "000011" & X"010", -- 0x13F: MOV R00, 0x01 - "000011" & X"481", -- 0x140: MOV R01, 0x48 - "100110" & X"050", -- 0x141: COUT (0x05), R00 - "111100" & X"001", -- 0x142: PUSH R01 - "000011" & X"000", -- 0x143: MOV R00, 0x00 - "000011" & X"3B1", -- 0x144: MOV R01, 0x3B - "100110" & X"050", -- 0x145: COUT (0x05), R00 - "111100" & X"001", -- 0x146: PUSH R01 - "111110" & X"000", -- 0x147: RET - "000011" & X"010", -- 0x148: MOV R00, 0x01 - "000011" & X"501", -- 0x149: MOV R01, 0x50 - "100110" & X"050", -- 0x14A: COUT (0x05), R00 - "111100" & X"001", -- 0x14B: PUSH R01 - "000011" & X"000", -- 0x14C: MOV R00, 0x00 - "000011" & X"3B1", -- 0x14D: MOV R01, 0x3B - "100110" & X"050", -- 0x14E: COUT (0x05), R00 - "111100" & X"001", -- 0x14F: PUSH R01 - "111110" & X"000", -- 0x150: RET - "001110" & X"010", -- 0x151: CMP R00, R01 - "111001" & X"155", -- 0x152: JEQ 0x155 - "010001" & X"010", -- 0x153: INC R00 - "110000" & X"158", -- 0x154: JMP 0x158 - "010101" & X"010", -- 0x155: DEC R00 - "010101" & X"011", -- 0x156: DEC R01 - "111110" & X"000", -- 0x157: RET - "111011" & X"151", -- 0x158: CALL 0x151 - "110000" & X"155", -- 0x159: JMP 0x155 - "000011" & X"A50", -- 0x15A: MOV R00, 0xA5 - "000011" & X"5A1", -- 0x15B: MOV R01, 0x5A - "101010" & X"000", -- 0x15C: SWAP R00 - "001111" & X"5A0", -- 0x15D: CMP R00, 0x5A - "111010" & X"3FF", -- 0x15E: JNE 0x3FF - "101010" & X"000", -- 0x15F: SWAP R00 - "001111" & X"A50", -- 0x160: CMP R00, 0xA5 - "111010" & X"3FF", -- 0x161: JNE 0x3FF - "000011" & X"D20", -- 0x162: MOV R00, 0xD2 - "101010" & X"000", -- 0x163: SWAP R00 - "001111" & X"2D0", -- 0x164: CMP R00, 0x2D - "111010" & X"3FF", -- 0x165: JNE 0x3FF - "101010" & X"001", -- 0x166: SWAP R01 - "001111" & X"2D0", -- 0x167: CMP R00, 0x2D - "111010" & X"3FF", -- 0x168: JNE 0x3FF - "001111" & X"A51", -- 0x169: CMP R01, 0xA5 - "111010" & X"3FF", -- 0x16A: JNE 0x3FF - "000011" & X"2D0", -- 0x16B: MOV R00, 0x2D - "011110" & X"000", -- 0x16C: SHL R00 - "001111" & X"5A0", -- 0x16D: CMP R00, 0x5A - "111010" & X"3FF", -- 0x16E: JNE 0x3FF - "011110" & X"000", -- 0x16F: SHL R00 - "001111" & X"B40", -- 0x170: CMP R00, 0xB4 - "111010" & X"3FF", -- 0x171: JNE 0x3FF - "011110" & X"000", -- 0x172: SHL R00 - "001111" & X"680", -- 0x173: CMP R00, 0x68 - "111010" & X"3FF", -- 0x174: JNE 0x3FF - "011110" & X"000", -- 0x175: SHL R00 - "001111" & X"D00", -- 0x176: CMP R00, 0xD0 - "111010" & X"3FF", -- 0x177: JNE 0x3FF - "011110" & X"000", -- 0x178: SHL R00 - "001111" & X"A00", -- 0x179: CMP R00, 0xA0 - "111010" & X"3FF", -- 0x17A: JNE 0x3FF - "011110" & X"000", -- 0x17B: SHL R00 - "001111" & X"400", -- 0x17C: CMP R00, 0x40 - "111010" & X"3FF", -- 0x17D: JNE 0x3FF - "011110" & X"000", -- 0x17E: SHL R00 - "001111" & X"800", -- 0x17F: CMP R00, 0x80 - "111010" & X"3FF", -- 0x180: JNE 0x3FF - "011110" & X"000", -- 0x181: SHL R00 - "001111" & X"000", -- 0x182: CMP R00, 0x00 - "111010" & X"3FF", -- 0x183: JNE 0x3FF - "000011" & X"841", -- 0x184: MOV R01, 0x84 - "011111" & X"001", -- 0x185: SHR R01 - "001111" & X"421", -- 0x186: CMP R01, 0x42 - "111010" & X"3FF", -- 0x187: JNE 0x3FF - "011111" & X"001", -- 0x188: SHR R01 - "001111" & X"211", -- 0x189: CMP R01, 0x21 - "111010" & X"3FF", -- 0x18A: JNE 0x3FF - "011111" & X"001", -- 0x18B: SHR R01 - "001111" & X"101", -- 0x18C: CMP R01, 0x10 - "111010" & X"3FF", -- 0x18D: JNE 0x3FF - "011111" & X"001", -- 0x18E: SHR R01 - "001111" & X"081", -- 0x18F: CMP R01, 0x08 - "111010" & X"3FF", -- 0x190: JNE 0x3FF - "011111" & X"001", -- 0x191: SHR R01 - "001111" & X"041", -- 0x192: CMP R01, 0x04 - "111010" & X"3FF", -- 0x193: JNE 0x3FF - "011111" & X"001", -- 0x194: SHR R01 - "001111" & X"021", -- 0x195: CMP R01, 0x02 - "111010" & X"3FF", -- 0x196: JNE 0x3FF - "011111" & X"001", -- 0x197: SHR R01 - "001111" & X"011", -- 0x198: CMP R01, 0x01 - "111010" & X"3FF", -- 0x199: JNE 0x3FF - "011111" & X"001", -- 0x19A: SHR R01 - "001111" & X"001", -- 0x19B: CMP R01, 0x00 - "111010" & X"3FF", -- 0x19C: JNE 0x3FF - "000011" & X"C50", -- 0x19D: MOV R00, 0xC5 - "100000" & X"000", -- 0x19E: ROL R00 - "001111" & X"8B0", -- 0x19F: CMP R00, 0x8B - "111010" & X"3FF", -- 0x1A0: JNE 0x3FF - "100000" & X"000", -- 0x1A1: ROL R00 - "001111" & X"170", -- 0x1A2: CMP R00, 0x17 - "111010" & X"3FF", -- 0x1A3: JNE 0x3FF - "100000" & X"000", -- 0x1A4: ROL R00 - "001111" & X"2E0", -- 0x1A5: CMP R00, 0x2E - "111010" & X"3FF", -- 0x1A6: JNE 0x3FF - "100000" & X"000", -- 0x1A7: ROL R00 - "001111" & X"5C0", -- 0x1A8: CMP R00, 0x5C - "111010" & X"3FF", -- 0x1A9: JNE 0x3FF - "100000" & X"000", -- 0x1AA: ROL R00 - "001111" & X"B80", -- 0x1AB: CMP R00, 0xB8 - "111010" & X"3FF", -- 0x1AC: JNE 0x3FF - "100000" & X"000", -- 0x1AD: ROL R00 - "001111" & X"710", -- 0x1AE: CMP R00, 0x71 - "111010" & X"3FF", -- 0x1AF: JNE 0x3FF - "100000" & X"000", -- 0x1B0: ROL R00 - "001111" & X"E20", -- 0x1B1: CMP R00, 0xE2 - "111010" & X"3FF", -- 0x1B2: JNE 0x3FF - "100000" & X"000", -- 0x1B3: ROL R00 - "001111" & X"C50", -- 0x1B4: CMP R00, 0xC5 - "111010" & X"3FF", -- 0x1B5: JNE 0x3FF - "000011" & X"631", -- 0x1B6: MOV R01, 0x63 - "100001" & X"001", -- 0x1B7: ROR R01 - "001111" & X"B11", -- 0x1B8: CMP R01, 0xB1 - "111010" & X"3FF", -- 0x1B9: JNE 0x3FF - "100001" & X"001", -- 0x1BA: ROR R01 - "001111" & X"D81", -- 0x1BB: CMP R01, 0xD8 - "111010" & X"3FF", -- 0x1BC: JNE 0x3FF - "100001" & X"001", -- 0x1BD: ROR R01 - "001111" & X"6C1", -- 0x1BE: CMP R01, 0x6C - "111010" & X"3FF", -- 0x1BF: JNE 0x3FF - "100001" & X"001", -- 0x1C0: ROR R01 - "001111" & X"361", -- 0x1C1: CMP R01, 0x36 - "111010" & X"3FF", -- 0x1C2: JNE 0x3FF - "100001" & X"001", -- 0x1C3: ROR R01 - "001111" & X"1B1", -- 0x1C4: CMP R01, 0x1B - "111010" & X"3FF", -- 0x1C5: JNE 0x3FF - "100001" & X"001", -- 0x1C6: ROR R01 - "001111" & X"8D1", -- 0x1C7: CMP R01, 0x8D - "111010" & X"3FF", -- 0x1C8: JNE 0x3FF - "100001" & X"001", -- 0x1C9: ROR R01 - "001111" & X"C61", -- 0x1CA: CMP R01, 0xC6 - "111010" & X"3FF", -- 0x1CB: JNE 0x3FF - "100001" & X"001", -- 0x1CC: ROR R01 - "001111" & X"631", -- 0x1CD: CMP R01, 0x63 - "111010" & X"3FF", -- 0x1CE: JNE 0x3FF - "011100" & X"000", -- 0x1CF: XOR R00, R00 - "000011" & X"C50", -- 0x1D0: MOV R00, 0xC5 - "100010" & X"000", -- 0x1D1: ROLC R00 - "111100" & X"000", -- 0x1D2: PUSH R00 - "100010" & X"000", -- 0x1D3: ROLC R00 - "111100" & X"000", -- 0x1D4: PUSH R00 - "100010" & X"000", -- 0x1D5: ROLC R00 - "111100" & X"000", -- 0x1D6: PUSH R00 - "100010" & X"000", -- 0x1D7: ROLC R00 - "111100" & X"000", -- 0x1D8: PUSH R00 - "100010" & X"000", -- 0x1D9: ROLC R00 - "111100" & X"000", -- 0x1DA: PUSH R00 - "100010" & X"000", -- 0x1DB: ROLC R00 - "111100" & X"000", -- 0x1DC: PUSH R00 - "100010" & X"000", -- 0x1DD: ROLC R00 - "111100" & X"000", -- 0x1DE: PUSH R00 - "100010" & X"000", -- 0x1DF: ROLC R00 - "111100" & X"000", -- 0x1E0: PUSH R00 - "100010" & X"000", -- 0x1E1: ROLC R00 - "001111" & X"C50", -- 0x1E2: CMP R00, 0xC5 - "111010" & X"3FF", -- 0x1E3: JNE 0x3FF - "111101" & X"000", -- 0x1E4: POP R00 - "001111" & X"620", -- 0x1E5: CMP R00, 0x62 - "111010" & X"3FF", -- 0x1E6: JNE 0x3FF - "111101" & X"000", -- 0x1E7: POP R00 - "001111" & X"B10", -- 0x1E8: CMP R00, 0xB1 - "111010" & X"3FF", -- 0x1E9: JNE 0x3FF - "111101" & X"000", -- 0x1EA: POP R00 - "001111" & X"580", -- 0x1EB: CMP R00, 0x58 - "111010" & X"3FF", -- 0x1EC: JNE 0x3FF - "111101" & X"000", -- 0x1ED: POP R00 - "001111" & X"AC0", -- 0x1EE: CMP R00, 0xAC - "111010" & X"3FF", -- 0x1EF: JNE 0x3FF - "111101" & X"000", -- 0x1F0: POP R00 - "001111" & X"560", -- 0x1F1: CMP R00, 0x56 - "111010" & X"3FF", -- 0x1F2: JNE 0x3FF - "111101" & X"000", -- 0x1F3: POP R00 - "001111" & X"2B0", -- 0x1F4: CMP R00, 0x2B - "111010" & X"3FF", -- 0x1F5: JNE 0x3FF - "111101" & X"000", -- 0x1F6: POP R00 - "001111" & X"150", -- 0x1F7: CMP R00, 0x15 - "111010" & X"3FF", -- 0x1F8: JNE 0x3FF - "111101" & X"000", -- 0x1F9: POP R00 - "001111" & X"8A0", -- 0x1FA: CMP R00, 0x8A - "111010" & X"3FF", -- 0x1FB: JNE 0x3FF - "011100" & X"011", -- 0x1FC: XOR R01, R01 - "000011" & X"631", -- 0x1FD: MOV R01, 0x63 - "100011" & X"001", -- 0x1FE: RORC R01 - "111100" & X"001", -- 0x1FF: PUSH R01 - "100011" & X"001", -- 0x200: RORC R01 - "111100" & X"001", -- 0x201: PUSH R01 - "100011" & X"001", -- 0x202: RORC R01 - "111100" & X"001", -- 0x203: PUSH R01 - "100011" & X"001", -- 0x204: RORC R01 - "111100" & X"001", -- 0x205: PUSH R01 - "100011" & X"001", -- 0x206: RORC R01 - "111100" & X"001", -- 0x207: PUSH R01 - "100011" & X"001", -- 0x208: RORC R01 - "111100" & X"001", -- 0x209: PUSH R01 - "100011" & X"001", -- 0x20A: RORC R01 - "111100" & X"001", -- 0x20B: PUSH R01 - "100011" & X"001", -- 0x20C: RORC R01 - "111100" & X"001", -- 0x20D: PUSH R01 - "100011" & X"001", -- 0x20E: RORC R01 - "001111" & X"631", -- 0x20F: CMP R01, 0x63 - "111010" & X"3FF", -- 0x210: JNE 0x3FF - "111101" & X"001", -- 0x211: POP R01 - "001111" & X"C61", -- 0x212: CMP R01, 0xC6 - "111010" & X"3FF", -- 0x213: JNE 0x3FF - "111101" & X"001", -- 0x214: POP R01 - "001111" & X"8C1", -- 0x215: CMP R01, 0x8C - "111010" & X"3FF", -- 0x216: JNE 0x3FF - "111101" & X"001", -- 0x217: POP R01 - "001111" & X"191", -- 0x218: CMP R01, 0x19 - "111010" & X"3FF", -- 0x219: JNE 0x3FF - "111101" & X"001", -- 0x21A: POP R01 - "001111" & X"331", -- 0x21B: CMP R01, 0x33 - "111010" & X"3FF", -- 0x21C: JNE 0x3FF - "111101" & X"001", -- 0x21D: POP R01 - "001111" & X"661", -- 0x21E: CMP R01, 0x66 - "111010" & X"3FF", -- 0x21F: JNE 0x3FF - "111101" & X"001", -- 0x220: POP R01 - "001111" & X"CC1", -- 0x221: CMP R01, 0xCC - "111010" & X"3FF", -- 0x222: JNE 0x3FF - "111101" & X"001", -- 0x223: POP R01 - "001111" & X"981", -- 0x224: CMP R01, 0x98 - "111010" & X"3FF", -- 0x225: JNE 0x3FF - "111101" & X"001", -- 0x226: POP R01 - "001111" & X"311", -- 0x227: CMP R01, 0x31 - "111010" & X"3FF", -- 0x228: JNE 0x3FF - "111110" & X"000", -- 0x229: RET - "000011" & X"A50", -- 0x22A: MOV R00, 0xA5 - "101010" & X"000", -- 0x22B: SWAP R00 - "111100" & X"000", -- 0x22C: PUSH R00 - "011001" & X"0F0", -- 0x22D: AND R00, 0x0F - "001111" & X"0A0", -- 0x22E: CMP R00, 0x0A - "111010" & X"3FF", -- 0x22F: JNE 0x3FF - "111101" & X"000", -- 0x230: POP R00 - "111100" & X"000", -- 0x231: PUSH R00 - "011001" & X"0F0", -- 0x232: AND R00, 0x0F - "001111" & X"0A0", -- 0x233: CMP R00, 0x0A - "111101" & X"001", -- 0x234: POP R01 - "111010" & X"3FF", -- 0x235: JNE 0x3FF - "101010" & X"001", -- 0x236: SWAP R01 - "000011" & X"0F2", -- 0x237: MOV R02, 0x0F - "011000" & X"021", -- 0x238: AND R01, R02 - "001111" & X"051", -- 0x239: CMP R01, 0x05 - "111010" & X"3FF", -- 0x23A: JNE 0x3FF - "000011" & X"050", -- 0x23B: MOV R00, 0x05 - "000011" & X"A02", -- 0x23C: MOV R02, 0xA0 - "101010" & X"000", -- 0x23D: SWAP R00 - "011010" & X"002", -- 0x23E: OR R02, R00 - "001111" & X"F02", -- 0x23F: CMP R02, 0xF0 - "111010" & X"3FF", -- 0x240: JNE 0x3FF - "101010" & X"000", -- 0x241: SWAP R00 - "011011" & X"500", -- 0x242: OR R00, 0x50 - "001111" & X"550", -- 0x243: CMP R00, 0x55 - "111010" & X"3FF", -- 0x244: JNE 0x3FF - "000011" & X"011", -- 0x245: MOV R01, 0x01 - "000011" & X"010", -- 0x246: MOV R00, 0x01 - "011101" & X"010", -- 0x247: XOR R00, 0x01 - "110010" & X"3FF", -- 0x248: JNZ 0x3FF - "011100" & X"010", -- 0x249: XOR R00, R01 - "001111" & X"010", -- 0x24A: CMP R00, 0x01 - "111010" & X"3FF", -- 0x24B: JNE 0x3FF - "111110" & X"000", -- 0x24C: RET - "000011" & X"030", -- 0x24D: MOV R00, 0x03 - "100110" & X"030", -- 0x24E: COUT (0x03), R00 - "101000" & X"020", -- 0x24F: XIN R00, (0x02) - "011011" & X"010", -- 0x250: OR R00, 0x01 - "100100" & X"020", -- 0x251: XOUT (0x02), R00 - "000000" & X"000", -- 0x252: NOP - "000000" & X"000", -- 0x253: NOP - "000000" & X"000", -- 0x254: NOP - "000000" & X"000", -- 0x255: NOP - "000000" & X"000", -- 0x256: NOP - "000000" & X"000", -- 0x257: NOP - "101000" & X"020", -- 0x258: XIN R00, (0x02) - "011001" & X"FE0", -- 0x259: AND R00, 0xFE - "100100" & X"020", -- 0x25A: XOUT (0x02), R00 - "000000" & X"000", -- 0x25B: NOP - "000000" & X"000", -- 0x25C: NOP - "000000" & X"000", -- 0x25D: NOP - "000000" & X"000", -- 0x25E: NOP - "101001" & X"030", -- 0x25F: CIN R00, (0x03) - "011011" & X"800", -- 0x260: OR R00, 0x80 - "100110" & X"030", -- 0x261: COUT (0x03), R00 - "000000" & X"000", -- 0x262: NOP - "101001" & X"030", -- 0x263: CIN R00, (0x03) - "011011" & X"800", -- 0x264: OR R00, 0x80 - "100110" & X"030", -- 0x265: COUT (0x03), R00 - "000000" & X"000", -- 0x266: NOP - "101001" & X"030", -- 0x267: CIN R00, (0x03) - "011011" & X"800", -- 0x268: OR R00, 0x80 - "100110" & X"030", -- 0x269: COUT (0x03), R00 - "000000" & X"000", -- 0x26A: NOP - "101001" & X"030", -- 0x26B: CIN R00, (0x03) - "011011" & X"800", -- 0x26C: OR R00, 0x80 - "100110" & X"030", -- 0x26D: COUT (0x03), R00 - "000000" & X"000", -- 0x26E: NOP - "000000" & X"000", -- 0x26F: NOP - "000000" & X"000", -- 0x270: NOP - "000000" & X"000", -- 0x271: NOP - "000000" & X"000", -- 0x272: NOP - "000000" & X"000", -- 0x273: NOP - "000000" & X"000", -- 0x274: NOP - "000000" & X"000", -- 0x275: NOP - "000000" & X"000", -- 0x276: NOP - "111110" & X"000", -- 0x277: RET - "010101" & X"000", -- 0x278: SUB R00, 0x00 - "110011" & X"3FF", -- 0x279: JC 0x3FF - "101011" & X"000", -- 0x27A: SETC - "110100" & X"3FF", -- 0x27B: JNC 0x3FF - "000000" & X"000", -- 0x27C: NOP - "010101" & X"000", -- 0x27D: SUB R00, 0x00 - "110011" & X"3FF", -- 0x27E: JC 0x3FF - "000011" & X"000", -- 0x27F: MOV R00, 0x00 - "010101" & X"000", -- 0x280: CLRC - "110011" & X"3FF", -- 0x281: JC 0x3FF - "101011" & X"000", -- 0x282: SETC - "110100" & X"3FF", -- 0x283: JNC 0x3FF - "000000" & X"000", -- 0x284: NOP - "010101" & X"000", -- 0x285: CLRC - "110011" & X"3FF", -- 0x286: JC 0x3FF - "111110" & X"000", -- 0x287: RET - "010001" & X"01E", -- 0x288: INC R14 - "111111" & X"000", -- 0x289: RETI - "000000" & X"000", -- 0x28A: - "000000" & X"000", -- 0x28B: - "000000" & X"000", -- 0x28C: - "000000" & X"000", -- 0x28D: - "000000" & X"000", -- 0x28E: - "000000" & X"000", -- 0x28F: - "000000" & X"000", -- 0x290: - "000000" & X"000", -- 0x291: - "000000" & X"000", -- 0x292: - "000000" & X"000", -- 0x293: - "000000" & X"000", -- 0x294: - "000000" & X"000", -- 0x295: - "000000" & X"000", -- 0x296: - "000000" & X"000", -- 0x297: - "000000" & X"000", -- 0x298: - "000000" & X"000", -- 0x299: - "000000" & X"000", -- 0x29A: - "000000" & X"000", -- 0x29B: - "000000" & X"000", -- 0x29C: - "000000" & X"000", -- 0x29D: - "000000" & X"000", -- 0x29E: - "000000" & X"000", -- 0x29F: - "000000" & X"000", -- 0x2A0: - "000000" & X"000", -- 0x2A1: - "000000" & X"000", -- 0x2A2: - "000000" & X"000", -- 0x2A3: - "000000" & X"000", -- 0x2A4: - "000000" & X"000", -- 0x2A5: - "000000" & X"000", -- 0x2A6: - "000000" & X"000", -- 0x2A7: - "000000" & X"000", -- 0x2A8: - "000000" & X"000", -- 0x2A9: - "000000" & X"000", -- 0x2AA: - "000000" & X"000", -- 0x2AB: - "000000" & X"000", -- 0x2AC: - "000000" & X"000", -- 0x2AD: - "000000" & X"000", -- 0x2AE: - "000000" & X"000", -- 0x2AF: - "000000" & X"000", -- 0x2B0: - "000000" & X"000", -- 0x2B1: - "000000" & X"000", -- 0x2B2: - "000000" & X"000", -- 0x2B3: - "000000" & X"000", -- 0x2B4: - "000000" & X"000", -- 0x2B5: - "000000" & X"000", -- 0x2B6: - "000000" & X"000", -- 0x2B7: - "000000" & X"000", -- 0x2B8: - "000000" & X"000", -- 0x2B9: - "000000" & X"000", -- 0x2BA: - "000000" & X"000", -- 0x2BB: - "000000" & X"000", -- 0x2BC: - "000000" & X"000", -- 0x2BD: - "000000" & X"000", -- 0x2BE: - "000000" & X"000", -- 0x2BF: - "000000" & X"000", -- 0x2C0: - "000000" & X"000", -- 0x2C1: - "000000" & X"000", -- 0x2C2: - "000000" & X"000", -- 0x2C3: - "000000" & X"000", -- 0x2C4: - "000000" & X"000", -- 0x2C5: - "000000" & X"000", -- 0x2C6: - "000000" & X"000", -- 0x2C7: - "000000" & X"000", -- 0x2C8: - "000000" & X"000", -- 0x2C9: - "000000" & X"000", -- 0x2CA: - "000000" & X"000", -- 0x2CB: - "000000" & X"000", -- 0x2CC: - "000000" & X"000", -- 0x2CD: - "000000" & X"000", -- 0x2CE: - "000000" & X"000", -- 0x2CF: - "000000" & X"000", -- 0x2D0: - "000000" & X"000", -- 0x2D1: - "000000" & X"000", -- 0x2D2: - "000000" & X"000", -- 0x2D3: - "000000" & X"000", -- 0x2D4: - "000000" & X"000", -- 0x2D5: - "000000" & X"000", -- 0x2D6: - "000000" & X"000", -- 0x2D7: - "000000" & X"000", -- 0x2D8: - "000000" & X"000", -- 0x2D9: - "000000" & X"000", -- 0x2DA: - "000000" & X"000", -- 0x2DB: - "000000" & X"000", -- 0x2DC: - "000000" & X"000", -- 0x2DD: - "000000" & X"000", -- 0x2DE: - "000000" & X"000", -- 0x2DF: - "000000" & X"000", -- 0x2E0: - "000000" & X"000", -- 0x2E1: - "000000" & X"000", -- 0x2E2: - "000000" & X"000", -- 0x2E3: - "000000" & X"000", -- 0x2E4: - "000000" & X"000", -- 0x2E5: - "000000" & X"000", -- 0x2E6: - "000000" & X"000", -- 0x2E7: - "000000" & X"000", -- 0x2E8: - "000000" & X"000", -- 0x2E9: - "000000" & X"000", -- 0x2EA: - "000000" & X"000", -- 0x2EB: - "000000" & X"000", -- 0x2EC: - "000000" & X"000", -- 0x2ED: - "000000" & X"000", -- 0x2EE: - "000000" & X"000", -- 0x2EF: - "000000" & X"000", -- 0x2F0: - "000000" & X"000", -- 0x2F1: - "000000" & X"000", -- 0x2F2: - "000000" & X"000", -- 0x2F3: - "000000" & X"000", -- 0x2F4: - "000000" & X"000", -- 0x2F5: - "000000" & X"000", -- 0x2F6: - "000000" & X"000", -- 0x2F7: - "000000" & X"000", -- 0x2F8: - "000000" & X"000", -- 0x2F9: - "000000" & X"000", -- 0x2FA: - "000000" & X"000", -- 0x2FB: - "000000" & X"000", -- 0x2FC: - "000000" & X"000", -- 0x2FD: - "000000" & X"000", -- 0x2FE: - "110000" & X"2FF", -- 0x2FF: JMP 0x2FF - "000000" & X"000", -- 0x300: - "000000" & X"000", -- 0x301: - "000000" & X"000", -- 0x302: - "000000" & X"000", -- 0x303: - "000000" & X"000", -- 0x304: - "000000" & X"000", -- 0x305: - "000000" & X"000", -- 0x306: - "000000" & X"000", -- 0x307: - "000000" & X"000", -- 0x308: - "000000" & X"000", -- 0x309: - "000000" & X"000", -- 0x30A: - "000000" & X"000", -- 0x30B: - "000000" & X"000", -- 0x30C: - "000000" & X"000", -- 0x30D: - "000000" & X"000", -- 0x30E: - "000000" & X"000", -- 0x30F: - "000000" & X"000", -- 0x310: - "000000" & X"000", -- 0x311: - "000000" & X"000", -- 0x312: - "000000" & X"000", -- 0x313: - "000000" & X"000", -- 0x314: - "000000" & X"000", -- 0x315: - "000000" & X"000", -- 0x316: - "000000" & X"000", -- 0x317: - "000000" & X"000", -- 0x318: - "000000" & X"000", -- 0x319: - "000000" & X"000", -- 0x31A: - "000000" & X"000", -- 0x31B: - "000000" & X"000", -- 0x31C: - "000000" & X"000", -- 0x31D: - "000000" & X"000", -- 0x31E: - "000000" & X"000", -- 0x31F: - "000000" & X"000", -- 0x320: - "000000" & X"000", -- 0x321: - "000000" & X"000", -- 0x322: - "000000" & X"000", -- 0x323: - "000000" & X"000", -- 0x324: - "000000" & X"000", -- 0x325: - "000000" & X"000", -- 0x326: - "000000" & X"000", -- 0x327: - "000000" & X"000", -- 0x328: - "000000" & X"000", -- 0x329: - "000000" & X"000", -- 0x32A: - "000000" & X"000", -- 0x32B: - "000000" & X"000", -- 0x32C: - "000000" & X"000", -- 0x32D: - "000000" & X"000", -- 0x32E: - "000000" & X"000", -- 0x32F: - "000000" & X"000", -- 0x330: - "000000" & X"000", -- 0x331: - "000000" & X"000", -- 0x332: - "000000" & X"000", -- 0x333: - "000000" & X"000", -- 0x334: - "000000" & X"000", -- 0x335: - "000000" & X"000", -- 0x336: - "000000" & X"000", -- 0x337: - "000000" & X"000", -- 0x338: - "000000" & X"000", -- 0x339: - "000000" & X"000", -- 0x33A: - "000000" & X"000", -- 0x33B: - "000000" & X"000", -- 0x33C: - "000000" & X"000", -- 0x33D: - "000000" & X"000", -- 0x33E: - "000000" & X"000", -- 0x33F: - "000000" & X"000", -- 0x340: - "000000" & X"000", -- 0x341: - "000000" & X"000", -- 0x342: - "000000" & X"000", -- 0x343: - "000000" & X"000", -- 0x344: - "000000" & X"000", -- 0x345: - "000000" & X"000", -- 0x346: - "000000" & X"000", -- 0x347: - "000000" & X"000", -- 0x348: - "000000" & X"000", -- 0x349: - "000000" & X"000", -- 0x34A: - "000000" & X"000", -- 0x34B: - "000000" & X"000", -- 0x34C: - "000000" & X"000", -- 0x34D: - "000000" & X"000", -- 0x34E: - "000000" & X"000", -- 0x34F: - "000000" & X"000", -- 0x350: - "000000" & X"000", -- 0x351: - "000000" & X"000", -- 0x352: - "000000" & X"000", -- 0x353: - "000000" & X"000", -- 0x354: - "000000" & X"000", -- 0x355: - "000000" & X"000", -- 0x356: - "000000" & X"000", -- 0x357: - "000000" & X"000", -- 0x358: - "000000" & X"000", -- 0x359: - "000000" & X"000", -- 0x35A: - "000000" & X"000", -- 0x35B: - "000000" & X"000", -- 0x35C: - "000000" & X"000", -- 0x35D: - "000000" & X"000", -- 0x35E: - "000000" & X"000", -- 0x35F: - "000000" & X"000", -- 0x360: - "000000" & X"000", -- 0x361: - "000000" & X"000", -- 0x362: - "000000" & X"000", -- 0x363: - "000000" & X"000", -- 0x364: - "000000" & X"000", -- 0x365: - "000000" & X"000", -- 0x366: - "000000" & X"000", -- 0x367: - "000000" & X"000", -- 0x368: - "000000" & X"000", -- 0x369: - "000000" & X"000", -- 0x36A: - "000000" & X"000", -- 0x36B: - "000000" & X"000", -- 0x36C: - "000000" & X"000", -- 0x36D: - "000000" & X"000", -- 0x36E: - "000000" & X"000", -- 0x36F: - "000000" & X"000", -- 0x370: - "000000" & X"000", -- 0x371: - "000000" & X"000", -- 0x372: - "000000" & X"000", -- 0x373: - "000000" & X"000", -- 0x374: - "000000" & X"000", -- 0x375: - "000000" & X"000", -- 0x376: - "000000" & X"000", -- 0x377: - "000000" & X"000", -- 0x378: - "000000" & X"000", -- 0x379: - "000000" & X"000", -- 0x37A: - "000000" & X"000", -- 0x37B: - "000000" & X"000", -- 0x37C: - "000000" & X"000", -- 0x37D: - "000000" & X"000", -- 0x37E: - "000000" & X"000", -- 0x37F: - "000000" & X"000", -- 0x380: - "000000" & X"000", -- 0x381: - "000000" & X"000", -- 0x382: - "000000" & X"000", -- 0x383: - "000000" & X"000", -- 0x384: - "000000" & X"000", -- 0x385: - "000000" & X"000", -- 0x386: - "000000" & X"000", -- 0x387: - "000000" & X"000", -- 0x388: - "000000" & X"000", -- 0x389: - "000000" & X"000", -- 0x38A: - "000000" & X"000", -- 0x38B: - "000000" & X"000", -- 0x38C: - "000000" & X"000", -- 0x38D: - "000000" & X"000", -- 0x38E: - "000000" & X"000", -- 0x38F: - "000000" & X"000", -- 0x390: - "000000" & X"000", -- 0x391: - "000000" & X"000", -- 0x392: - "000000" & X"000", -- 0x393: - "000000" & X"000", -- 0x394: - "000000" & X"000", -- 0x395: - "000000" & X"000", -- 0x396: - "000000" & X"000", -- 0x397: - "000000" & X"000", -- 0x398: - "000000" & X"000", -- 0x399: - "000000" & X"000", -- 0x39A: - "000000" & X"000", -- 0x39B: - "000000" & X"000", -- 0x39C: - "000000" & X"000", -- 0x39D: - "000000" & X"000", -- 0x39E: - "000000" & X"000", -- 0x39F: - "000000" & X"000", -- 0x3A0: - "000000" & X"000", -- 0x3A1: - "000000" & X"000", -- 0x3A2: - "000000" & X"000", -- 0x3A3: - "000000" & X"000", -- 0x3A4: - "000000" & X"000", -- 0x3A5: - "000000" & X"000", -- 0x3A6: - "000000" & X"000", -- 0x3A7: - "000000" & X"000", -- 0x3A8: - "000000" & X"000", -- 0x3A9: - "000000" & X"000", -- 0x3AA: - "000000" & X"000", -- 0x3AB: - "000000" & X"000", -- 0x3AC: - "000000" & X"000", -- 0x3AD: - "000000" & X"000", -- 0x3AE: - "000000" & X"000", -- 0x3AF: - "000000" & X"000", -- 0x3B0: - "000000" & X"000", -- 0x3B1: - "000000" & X"000", -- 0x3B2: - "000000" & X"000", -- 0x3B3: - "000000" & X"000", -- 0x3B4: - "000000" & X"000", -- 0x3B5: - "000000" & X"000", -- 0x3B6: - "000000" & X"000", -- 0x3B7: - "000000" & X"000", -- 0x3B8: - "000000" & X"000", -- 0x3B9: - "000000" & X"000", -- 0x3BA: - "000000" & X"000", -- 0x3BB: - "000000" & X"000", -- 0x3BC: - "000000" & X"000", -- 0x3BD: - "000000" & X"000", -- 0x3BE: - "000000" & X"000", -- 0x3BF: - "000000" & X"000", -- 0x3C0: - "000000" & X"000", -- 0x3C1: - "000000" & X"000", -- 0x3C2: - "000000" & X"000", -- 0x3C3: - "000000" & X"000", -- 0x3C4: - "000000" & X"000", -- 0x3C5: - "000000" & X"000", -- 0x3C6: - "000000" & X"000", -- 0x3C7: - "000000" & X"000", -- 0x3C8: - "000000" & X"000", -- 0x3C9: - "000000" & X"000", -- 0x3CA: - "000000" & X"000", -- 0x3CB: - "000000" & X"000", -- 0x3CC: - "000000" & X"000", -- 0x3CD: - "000000" & X"000", -- 0x3CE: - "000000" & X"000", -- 0x3CF: - "000000" & X"000", -- 0x3D0: - "000000" & X"000", -- 0x3D1: - "000000" & X"000", -- 0x3D2: - "000000" & X"000", -- 0x3D3: - "000000" & X"000", -- 0x3D4: - "000000" & X"000", -- 0x3D5: - "000000" & X"000", -- 0x3D6: - "000000" & X"000", -- 0x3D7: - "000000" & X"000", -- 0x3D8: - "000000" & X"000", -- 0x3D9: - "000000" & X"000", -- 0x3DA: - "000000" & X"000", -- 0x3DB: - "000000" & X"000", -- 0x3DC: - "000000" & X"000", -- 0x3DD: - "000000" & X"000", -- 0x3DE: - "000000" & X"000", -- 0x3DF: - "000000" & X"000", -- 0x3E0: - "000000" & X"000", -- 0x3E1: - "000000" & X"000", -- 0x3E2: - "000000" & X"000", -- 0x3E3: - "000000" & X"000", -- 0x3E4: - "000000" & X"000", -- 0x3E5: - "000000" & X"000", -- 0x3E6: - "000000" & X"000", -- 0x3E7: - "000000" & X"000", -- 0x3E8: - "000000" & X"000", -- 0x3E9: - "000000" & X"000", -- 0x3EA: - "000000" & X"000", -- 0x3EB: - "000000" & X"000", -- 0x3EC: - "000000" & X"000", -- 0x3ED: - "000000" & X"000", -- 0x3EE: - "000000" & X"000", -- 0x3EF: - "000000" & X"000", -- 0x3F0: - "000000" & X"000", -- 0x3F1: - "000000" & X"000", -- 0x3F2: - "000000" & X"000", -- 0x3F3: - "000000" & X"000", -- 0x3F4: - "000000" & X"000", -- 0x3F5: - "000000" & X"000", -- 0x3F6: - "000000" & X"000", -- 0x3F7: - "000000" & X"000", -- 0x3F8: - "000000" & X"000", -- 0x3F9: - "000000" & X"000", -- 0x3FA: - "000000" & X"000", -- 0x3FB: - "000000" & X"000", -- 0x3FC: - "000000" & X"000", -- 0x3FD: - "000000" & X"000", -- 0x3FE: - "110000" & X"3FF" -- 0x3FF: JMP 0x3FF - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -end itest; - diff --git a/lib/CPUs/JCpu/src/itest_irom_ld.vhdl b/lib/CPUs/JCpu/src/itest_irom_ld.vhdl deleted file mode 100644 index d4371a1..0000000 --- a/lib/CPUs/JCpu/src/itest_irom_ld.vhdl +++ /dev/null @@ -1,1181 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - -END irom; - -ARCHITECTURE loadable OF irom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from itest.jsm - type imem_rom_t is array (0 to 1023) of inst_t; - signal imem_rom : imem_rom_t := - ( - "110000" & X"010", -- 0x000: JMP 0x010 - "110000" & X"288", -- 0x001: JMP 0x288 - "000000" & X"000", -- 0x002: - "000000" & X"000", -- 0x003: - "000000" & X"000", -- 0x004: - "000000" & X"000", -- 0x005: - "000000" & X"000", -- 0x006: - "000000" & X"000", -- 0x007: - "000000" & X"000", -- 0x008: - "000000" & X"000", -- 0x009: - "000000" & X"000", -- 0x00A: - "000000" & X"000", -- 0x00B: - "000000" & X"000", -- 0x00C: - "000000" & X"000", -- 0x00D: - "000000" & X"000", -- 0x00E: - "000000" & X"000", -- 0x00F: - "111011" & X"03B", -- 0x010: CALL 0x03B - "101001" & X"000", -- 0x011: CIN R00, (0x00) - "100100" & X"000", -- 0x012: XOUT (0x00), R00 - "111011" & X"04C", -- 0x013: CALL 0x04C - "000011" & X"010", -- 0x014: MOV R00, 0x01 - "100100" & X"010", -- 0x015: XOUT (0x01), R00 - "111011" & X"08D", -- 0x016: CALL 0x08D - "000011" & X"020", -- 0x017: MOV R00, 0x02 - "100100" & X"010", -- 0x018: XOUT (0x01), R00 - "111011" & X"0C9", -- 0x019: CALL 0x0C9 - "000011" & X"030", -- 0x01A: MOV R00, 0x03 - "100100" & X"010", -- 0x01B: XOUT (0x01), R00 - "111011" & X"0DB", -- 0x01C: CALL 0x0DB - "000011" & X"040", -- 0x01D: MOV R00, 0x04 - "100100" & X"010", -- 0x01E: XOUT (0x01), R00 - "111011" & X"0ED", -- 0x01F: CALL 0x0ED - "000011" & X"050", -- 0x020: MOV R00, 0x05 - "100100" & X"010", -- 0x021: XOUT (0x01), R00 - "111011" & X"0FF", -- 0x022: CALL 0x0FF - "000011" & X"060", -- 0x023: MOV R00, 0x06 - "100100" & X"010", -- 0x024: XOUT (0x01), R00 - "111011" & X"115", -- 0x025: CALL 0x115 - "000011" & X"070", -- 0x026: MOV R00, 0x07 - "100100" & X"010", -- 0x027: XOUT (0x01), R00 - "111011" & X"12B", -- 0x028: CALL 0x12B - "000011" & X"080", -- 0x029: MOV R00, 0x08 - "100100" & X"010", -- 0x02A: XOUT (0x01), R00 - "111011" & X"137", -- 0x02B: CALL 0x137 - "000011" & X"090", -- 0x02C: MOV R00, 0x09 - "100100" & X"010", -- 0x02D: XOUT (0x01), R00 - "111011" & X"15A", -- 0x02E: CALL 0x15A - "000011" & X"0A0", -- 0x02F: MOV R00, 0x0A - "100100" & X"010", -- 0x030: XOUT (0x01), R00 - "111011" & X"22A", -- 0x031: CALL 0x22A - "000011" & X"0B0", -- 0x032: MOV R00, 0x0B - "100100" & X"010", -- 0x033: XOUT (0x01), R00 - "111011" & X"24D", -- 0x034: CALL 0x24D - "000011" & X"0C0", -- 0x035: MOV R00, 0x0C - "100100" & X"010", -- 0x036: XOUT (0x01), R00 - "111011" & X"278", -- 0x037: CALL 0x278 - "000011" & X"FF0", -- 0x038: MOV R00, 0xFF - "100100" & X"010", -- 0x039: XOUT (0x01), R00 - "110000" & X"2FF", -- 0x03A: JMP 0x2FF - "000011" & X"000", -- 0x03B: MOV R00, 0x00 - "000011" & X"001", -- 0x03C: MOV R01, 0x00 - "000011" & X"002", -- 0x03D: MOV R02, 0x00 - "000011" & X"003", -- 0x03E: MOV R03, 0x00 - "000011" & X"004", -- 0x03F: MOV R04, 0x00 - "000011" & X"005", -- 0x040: MOV R05, 0x00 - "000011" & X"006", -- 0x041: MOV R06, 0x00 - "000011" & X"007", -- 0x042: MOV R07, 0x00 - "000011" & X"008", -- 0x043: MOV R08, 0x00 - "000011" & X"009", -- 0x044: MOV R09, 0x00 - "000011" & X"00A", -- 0x045: MOV R10, 0x00 - "000011" & X"00B", -- 0x046: MOV R11, 0x00 - "000011" & X"00C", -- 0x047: MOV R12, 0x00 - "000011" & X"00D", -- 0x048: MOV R13, 0x00 - "000011" & X"00E", -- 0x049: MOV R14, 0x00 - "000011" & X"00F", -- 0x04A: MOV R15, 0x00 - "111110" & X"000", -- 0x04B: RET - "000011" & X"100", -- 0x04C: MOV R00, 0x10 - "001111" & X"100", -- 0x04D: CMP R00, 0x10 - "111010" & X"3FF", -- 0x04E: JNE 0x3FF - "010001" & X"010", -- 0x04F: ADD R00, 0x01 - "000010" & X"001", -- 0x050: MOV R01, R00 - "001111" & X"111", -- 0x051: CMP R01, 0x11 - "111010" & X"3FF", -- 0x052: JNE 0x3FF - "010001" & X"011", -- 0x053: ADD R01, 0x01 - "000010" & X"012", -- 0x054: MOV R02, R01 - "001111" & X"122", -- 0x055: CMP R02, 0x12 - "111010" & X"3FF", -- 0x056: JNE 0x3FF - "010001" & X"012", -- 0x057: ADD R02, 0x01 - "000010" & X"023", -- 0x058: MOV R03, R02 - "001111" & X"133", -- 0x059: CMP R03, 0x13 - "111010" & X"3FF", -- 0x05A: JNE 0x3FF - "010001" & X"013", -- 0x05B: ADD R03, 0x01 - "000010" & X"034", -- 0x05C: MOV R04, R03 - "001111" & X"144", -- 0x05D: CMP R04, 0x14 - "111010" & X"3FF", -- 0x05E: JNE 0x3FF - "010001" & X"014", -- 0x05F: ADD R04, 0x01 - "000010" & X"045", -- 0x060: MOV R05, R04 - "001111" & X"155", -- 0x061: CMP R05, 0x15 - "111010" & X"3FF", -- 0x062: JNE 0x3FF - "010001" & X"015", -- 0x063: ADD R05, 0x01 - "000010" & X"056", -- 0x064: MOV R06, R05 - "001111" & X"166", -- 0x065: CMP R06, 0x16 - "111010" & X"3FF", -- 0x066: JNE 0x3FF - "010001" & X"016", -- 0x067: ADD R06, 0x01 - "000010" & X"067", -- 0x068: MOV R07, R06 - "001111" & X"177", -- 0x069: CMP R07, 0x17 - "111010" & X"3FF", -- 0x06A: JNE 0x3FF - "010001" & X"017", -- 0x06B: ADD R07, 0x01 - "000010" & X"078", -- 0x06C: MOV R08, R07 - "001111" & X"188", -- 0x06D: CMP R08, 0x18 - "111010" & X"3FF", -- 0x06E: JNE 0x3FF - "010001" & X"018", -- 0x06F: ADD R08, 0x01 - "000010" & X"089", -- 0x070: MOV R09, R08 - "001111" & X"199", -- 0x071: CMP R09, 0x19 - "111010" & X"3FF", -- 0x072: JNE 0x3FF - "010001" & X"019", -- 0x073: ADD R09, 0x01 - "000010" & X"09A", -- 0x074: MOV R10, R09 - "001111" & X"1AA", -- 0x075: CMP R10, 0x1A - "111010" & X"3FF", -- 0x076: JNE 0x3FF - "010001" & X"01A", -- 0x077: ADD R10, 0x01 - "000010" & X"0AB", -- 0x078: MOV R11, R10 - "001111" & X"1BB", -- 0x079: CMP R11, 0x1B - "111010" & X"3FF", -- 0x07A: JNE 0x3FF - "010001" & X"01B", -- 0x07B: ADD R11, 0x01 - "000010" & X"0BC", -- 0x07C: MOV R12, R11 - "001111" & X"1CC", -- 0x07D: CMP R12, 0x1C - "111010" & X"3FF", -- 0x07E: JNE 0x3FF - "010001" & X"01C", -- 0x07F: ADD R12, 0x01 - "000010" & X"0CD", -- 0x080: MOV R13, R12 - "001111" & X"1DD", -- 0x081: CMP R13, 0x1D - "111010" & X"3FF", -- 0x082: JNE 0x3FF - "010001" & X"01D", -- 0x083: ADD R13, 0x01 - "000010" & X"0DE", -- 0x084: MOV R14, R13 - "001111" & X"1EE", -- 0x085: CMP R14, 0x1E - "111010" & X"3FF", -- 0x086: JNE 0x3FF - "010001" & X"01E", -- 0x087: ADD R14, 0x01 - "000010" & X"0EF", -- 0x088: MOV R15, R14 - "001111" & X"1FF", -- 0x089: CMP R15, 0x1F - "111010" & X"3FF", -- 0x08A: JNE 0x3FF - "010001" & X"01F", -- 0x08B: ADD R15, 0x01 - "111110" & X"000", -- 0x08C: RET - "000011" & X"000", -- 0x08D: MOV R00, 0x00 - "001111" & X"000", -- 0x08E: TST R00 - "110010" & X"3FF", -- 0x08F: JNZ 0x3FF - "110011" & X"3FF", -- 0x090: JC 0x3FF - "001111" & X"000", -- 0x091: CMP R00, 0x00 - "111010" & X"3FF", -- 0x092: JNE 0x3FF - "110101" & X"3FF", -- 0x093: JLT 0x3FF - "110110" & X"3FF", -- 0x094: JGT 0x3FF - "110111" & X"097", -- 0x095: JLE 0x097 - "110000" & X"3FF", -- 0x096: JMP 0x3FF - "111001" & X"099", -- 0x097: JEQ 0x099 - "110000" & X"3FF", -- 0x098: JMP 0x3FF - "111000" & X"09B", -- 0x099: JGE 0x09B - "110000" & X"3FF", -- 0x09A: JMP 0x3FF - "001111" & X"550", -- 0x09B: CMP R00, 0x55 - "111001" & X"3FF", -- 0x09C: JEQ 0x3FF - "110101" & X"09F", -- 0x09D: JLT 0x09F - "110000" & X"3FF", -- 0x09E: JMP 0x3FF - "110111" & X"0A1", -- 0x09F: JLE 0x0A1 - "110000" & X"3FF", -- 0x0A0: JMP 0x3FF - "111000" & X"3FF", -- 0x0A1: JGE 0x3FF - "110110" & X"3FF", -- 0x0A2: JGT 0x3FF - "000011" & X"550", -- 0x0A3: MOV R00, 0x55 - "001111" & X"000", -- 0x0A4: TST R00 - "110001" & X"3FF", -- 0x0A5: JZ 0x3FF - "110011" & X"3FF", -- 0x0A6: JC 0x3FF - "001111" & X"AA0", -- 0x0A7: CMP R00, 0xAA - "111001" & X"3FF", -- 0x0A8: JEQ 0x3FF - "111010" & X"0AB", -- 0x0A9: JNE 0x0AB - "110000" & X"3FF", -- 0x0AA: JMP 0x3FF - "110101" & X"0AD", -- 0x0AB: JLT 0x0AD - "110000" & X"3FF", -- 0x0AC: JMP 0x3FF - "110111" & X"0AF", -- 0x0AD: JLE 0x0AF - "110000" & X"3FF", -- 0x0AE: JMP 0x3FF - "110110" & X"3FF", -- 0x0AF: JGT 0x3FF - "001111" & X"550", -- 0x0B0: CMP R00, 0x55 - "111001" & X"0B3", -- 0x0B1: JEQ 0x0B3 - "110000" & X"3FF", -- 0x0B2: JMP 0x3FF - "111010" & X"3FF", -- 0x0B3: JNE 0x3FF - "110101" & X"3FF", -- 0x0B4: JLT 0x3FF - "110111" & X"0B7", -- 0x0B5: JLE 0x0B7 - "110000" & X"3FF", -- 0x0B6: JMP 0x3FF - "110110" & X"3FF", -- 0x0B7: JGT 0x3FF - "111000" & X"0BA", -- 0x0B8: JGE 0x0BA - "110000" & X"3FF", -- 0x0B9: JMP 0x3FF - "000011" & X"AA0", -- 0x0BA: MOV R00, 0xAA - "001111" & X"000", -- 0x0BB: TST R00 - "110001" & X"3FF", -- 0x0BC: JZ 0x3FF - "110011" & X"3FF", -- 0x0BD: JC 0x3FF - "001111" & X"550", -- 0x0BE: CMP R00, 0x55 - "111001" & X"3FF", -- 0x0BF: JEQ 0x3FF - "111010" & X"0C2", -- 0x0C0: JNE 0x0C2 - "110000" & X"3FF", -- 0x0C1: JMP 0x3FF - "110110" & X"0C4", -- 0x0C2: JGT 0x0C4 - "110000" & X"3FF", -- 0x0C3: JMP 0x3FF - "111000" & X"0C6", -- 0x0C4: JGE 0x0C6 - "110000" & X"3FF", -- 0x0C5: JMP 0x3FF - "110101" & X"3FF", -- 0x0C6: JLT 0x3FF - "110111" & X"3FF", -- 0x0C7: JLE 0x3FF - "111110" & X"000", -- 0x0C8: RET - "000011" & X"000", -- 0x0C9: MOV R00, 0x00 - "000011" & X"001", -- 0x0CA: MOV R01, 0x00 - "000010" & X"002", -- 0x0CB: MOV R02, R00 - "000010" & X"013", -- 0x0CC: MOV R03, R01 - "010001" & X"010", -- 0x0CD: ADD R00, 0x01 - "010011" & X"001", -- 0x0CE: ADDC R01, 0x00 - "010001" & X"012", -- 0x0CF: ADD R02, 0x01 - "001111" & X"002", -- 0x0D0: CMP R02, 0x00 - "111010" & X"0D4", -- 0x0D1: JNE 0x0D4 - "010001" & X"013", -- 0x0D2: ADD R03, 0x01 - "001111" & X"023", -- 0x0D3: CMP R03, 0x02 - "111010" & X"0CD", -- 0x0D4: JNE 0x0CD - "001110" & X"020", -- 0x0D5: CMP R00, R02 - "111010" & X"3FF", -- 0x0D6: JNE 0x3FF - "001110" & X"031", -- 0x0D7: CMP R01, R03 - "111010" & X"3FF", -- 0x0D8: JNE 0x3FF - "000011" & X"000", -- 0x0D9: MOV R00, 0x00 - "111110" & X"000", -- 0x0DA: RET - "000011" & X"000", -- 0x0DB: MOV R00, 0x00 - "000011" & X"031", -- 0x0DC: MOV R01, 0x03 - "000010" & X"002", -- 0x0DD: MOV R02, R00 - "000010" & X"013", -- 0x0DE: MOV R03, R01 - "010101" & X"010", -- 0x0DF: SUB R00, 0x01 - "010111" & X"001", -- 0x0E0: SUBC R01, 0x00 - "010101" & X"012", -- 0x0E1: SUB R02, 0x01 - "001111" & X"FF2", -- 0x0E2: CMP R02, 0xFF - "111010" & X"0E6", -- 0x0E3: JNE 0x0E6 - "010101" & X"013", -- 0x0E4: SUB R03, 0x01 - "001111" & X"003", -- 0x0E5: CMP R03, 0x00 - "111010" & X"0DF", -- 0x0E6: JNE 0x0DF - "001110" & X"020", -- 0x0E7: CMP R00, R02 - "111010" & X"3FF", -- 0x0E8: JNE 0x3FF - "001110" & X"031", -- 0x0E9: CMP R01, R03 - "111010" & X"3FF", -- 0x0EA: JNE 0x3FF - "000011" & X"000", -- 0x0EB: MOV R00, 0x00 - "111110" & X"000", -- 0x0EC: RET - "000011" & X"030", -- 0x0ED: MOV R00, 0x03 - "000011" & X"051", -- 0x0EE: MOV R01, 0x05 - "101110" & X"050", -- 0x0EF: SUB 0x05, R00 - "010101" & X"031", -- 0x0F0: SUB R01, 0x03 - "001110" & X"010", -- 0x0F1: CMP R00, R01 - "111010" & X"3FF", -- 0x0F2: JNE 0x3FF - "000011" & X"030", -- 0x0F3: MOV R00, 0x03 - "000011" & X"051", -- 0x0F4: MOV R01, 0x05 - "010100" & X"010", -- 0x0F5: SUB R00, R01 - "101111" & X"000", -- 0x0F6: SUBC 0x00, R00 - "001111" & X"010", -- 0x0F7: CMP R00, 0x01 - "111010" & X"3FF", -- 0x0F8: JNE 0x3FF - "010001" & X"000", -- 0x0F9: ADD R00, 0x00 - "010110" & X"001", -- 0x0FA: SUBC R01, R00 - "001111" & X"041", -- 0x0FB: CMP R01, 0x04 - "111010" & X"3FF", -- 0x0FC: JNE 0x3FF - "000011" & X"000", -- 0x0FD: MOV R00, 0x00 - "111110" & X"000", -- 0x0FE: RET - "000011" & X"010", -- 0x0FF: MOV R00, 0x01 - "001101" & X"5A0", -- 0x100: MOVC (0x5A), R00 - "010101" & X"010", -- 0x101: DEC R00 - "001101" & X"000", -- 0x102: MOVC (0x00), R00 - "001010" & X"5A1", -- 0x103: MOVC R01, (0x5A) - "001100" & X"A51", -- 0x104: MOVC (R01), 0xA5 - "001001" & X"010", -- 0x105: MOVC R00, (R01) - "001001" & X"011", -- 0x106: MOVC R01, (R01) - "010001" & X"5A1", -- 0x107: ADD R01, 0x5A - "001001" & X"010", -- 0x108: MOVC R00, (R01) - "001011" & X"000", -- 0x109: MOVC (R00), R00 - "001001" & X"002", -- 0x10A: MOVC R02, (R00) - "001110" & X"002", -- 0x10B: CMP R02, R00 - "111010" & X"3FF", -- 0x10C: JNE 0x3FF - "001011" & X"021", -- 0x10D: MOVC (R01), R02 - "001001" & X"022", -- 0x10E: MOVC R02, (R02) - "001110" & X"012", -- 0x10F: CMP R02, R01 - "111010" & X"3FF", -- 0x110: JNE 0x3FF - "010101" & X"011", -- 0x111: DEC R01 - "010001" & X"010", -- 0x112: INC R00 - "110010" & X"109", -- 0x113: JNZ 0x109 - "111110" & X"000", -- 0x114: RET - "000011" & X"010", -- 0x115: MOV R00, 0x01 - "001000" & X"600", -- 0x116: MOVX (0x60), R00 - "010101" & X"010", -- 0x117: DEC R00 - "001000" & X"060", -- 0x118: MOVX (0x06), R00 - "000101" & X"601", -- 0x119: MOVX R01, (0x60) - "000111" & X"A51", -- 0x11A: MOVX (R01), 0xA5 - "000100" & X"010", -- 0x11B: MOVX R00, (R01) - "000100" & X"011", -- 0x11C: MOVX R01, (R01) - "010001" & X"5A1", -- 0x11D: ADD R01, 0x5A - "000100" & X"010", -- 0x11E: MOVX R00, (R01) - "000110" & X"000", -- 0x11F: MOVX (R00), R00 - "000100" & X"002", -- 0x120: MOVX R02, (R00) - "001110" & X"002", -- 0x121: CMP R02, R00 - "111010" & X"3FF", -- 0x122: JNE 0x3FF - "000110" & X"021", -- 0x123: MOVX (R01), R02 - "000100" & X"022", -- 0x124: MOVX R02, (R02) - "001110" & X"012", -- 0x125: CMP R02, R01 - "111010" & X"3FF", -- 0x126: JNE 0x3FF - "010101" & X"011", -- 0x127: DEC R01 - "010001" & X"010", -- 0x128: INC R00 - "110010" & X"11F", -- 0x129: JNZ 0x11F - "111110" & X"000", -- 0x12A: RET - "000011" & X"AA0", -- 0x12B: MOV R00, 0xAA - "000011" & X"001", -- 0x12C: MOV R01, 0x00 - "111100" & X"000", -- 0x12D: PUSH R00 - "010001" & X"010", -- 0x12E: INC R00 - "010101" & X"011", -- 0x12F: DEC R01 - "110010" & X"12D", -- 0x130: JNZ 0x12D - "111101" & X"000", -- 0x131: POP R00 - "010101" & X"011", -- 0x132: DEC R01 - "110010" & X"131", -- 0x133: JNZ 0x131 - "001111" & X"AA0", -- 0x134: CMP R00, 0xAA - "111010" & X"3FF", -- 0x135: JNE 0x3FF - "111110" & X"000", -- 0x136: RET - "000011" & X"550", -- 0x137: MOV R00, 0x55 - "111100" & X"000", -- 0x138: PUSH R00 - "000011" & X"000", -- 0x139: MOV R00, 0x00 - "000011" & X"FF1", -- 0x13A: MOV R01, 0xFF - "111011" & X"151", -- 0x13B: CALL 0x151 - "111101" & X"000", -- 0x13C: POP R00 - "001111" & X"550", -- 0x13D: CMP R00, 0x55 - "111010" & X"3FF", -- 0x13E: JNE 0x3FF - "000011" & X"010", -- 0x13F: MOV R00, 0x01 - "000011" & X"481", -- 0x140: MOV R01, 0x48 - "100110" & X"050", -- 0x141: COUT (0x05), R00 - "111100" & X"001", -- 0x142: PUSH R01 - "000011" & X"000", -- 0x143: MOV R00, 0x00 - "000011" & X"3B1", -- 0x144: MOV R01, 0x3B - "100110" & X"050", -- 0x145: COUT (0x05), R00 - "111100" & X"001", -- 0x146: PUSH R01 - "111110" & X"000", -- 0x147: RET - "000011" & X"010", -- 0x148: MOV R00, 0x01 - "000011" & X"501", -- 0x149: MOV R01, 0x50 - "100110" & X"050", -- 0x14A: COUT (0x05), R00 - "111100" & X"001", -- 0x14B: PUSH R01 - "000011" & X"000", -- 0x14C: MOV R00, 0x00 - "000011" & X"3B1", -- 0x14D: MOV R01, 0x3B - "100110" & X"050", -- 0x14E: COUT (0x05), R00 - "111100" & X"001", -- 0x14F: PUSH R01 - "111110" & X"000", -- 0x150: RET - "001110" & X"010", -- 0x151: CMP R00, R01 - "111001" & X"155", -- 0x152: JEQ 0x155 - "010001" & X"010", -- 0x153: INC R00 - "110000" & X"158", -- 0x154: JMP 0x158 - "010101" & X"010", -- 0x155: DEC R00 - "010101" & X"011", -- 0x156: DEC R01 - "111110" & X"000", -- 0x157: RET - "111011" & X"151", -- 0x158: CALL 0x151 - "110000" & X"155", -- 0x159: JMP 0x155 - "000011" & X"A50", -- 0x15A: MOV R00, 0xA5 - "000011" & X"5A1", -- 0x15B: MOV R01, 0x5A - "101010" & X"000", -- 0x15C: SWAP R00 - "001111" & X"5A0", -- 0x15D: CMP R00, 0x5A - "111010" & X"3FF", -- 0x15E: JNE 0x3FF - "101010" & X"000", -- 0x15F: SWAP R00 - "001111" & X"A50", -- 0x160: CMP R00, 0xA5 - "111010" & X"3FF", -- 0x161: JNE 0x3FF - "000011" & X"D20", -- 0x162: MOV R00, 0xD2 - "101010" & X"000", -- 0x163: SWAP R00 - "001111" & X"2D0", -- 0x164: CMP R00, 0x2D - "111010" & X"3FF", -- 0x165: JNE 0x3FF - "101010" & X"001", -- 0x166: SWAP R01 - "001111" & X"2D0", -- 0x167: CMP R00, 0x2D - "111010" & X"3FF", -- 0x168: JNE 0x3FF - "001111" & X"A51", -- 0x169: CMP R01, 0xA5 - "111010" & X"3FF", -- 0x16A: JNE 0x3FF - "000011" & X"2D0", -- 0x16B: MOV R00, 0x2D - "011110" & X"000", -- 0x16C: SHL R00 - "001111" & X"5A0", -- 0x16D: CMP R00, 0x5A - "111010" & X"3FF", -- 0x16E: JNE 0x3FF - "011110" & X"000", -- 0x16F: SHL R00 - "001111" & X"B40", -- 0x170: CMP R00, 0xB4 - "111010" & X"3FF", -- 0x171: JNE 0x3FF - "011110" & X"000", -- 0x172: SHL R00 - "001111" & X"680", -- 0x173: CMP R00, 0x68 - "111010" & X"3FF", -- 0x174: JNE 0x3FF - "011110" & X"000", -- 0x175: SHL R00 - "001111" & X"D00", -- 0x176: CMP R00, 0xD0 - "111010" & X"3FF", -- 0x177: JNE 0x3FF - "011110" & X"000", -- 0x178: SHL R00 - "001111" & X"A00", -- 0x179: CMP R00, 0xA0 - "111010" & X"3FF", -- 0x17A: JNE 0x3FF - "011110" & X"000", -- 0x17B: SHL R00 - "001111" & X"400", -- 0x17C: CMP R00, 0x40 - "111010" & X"3FF", -- 0x17D: JNE 0x3FF - "011110" & X"000", -- 0x17E: SHL R00 - "001111" & X"800", -- 0x17F: CMP R00, 0x80 - "111010" & X"3FF", -- 0x180: JNE 0x3FF - "011110" & X"000", -- 0x181: SHL R00 - "001111" & X"000", -- 0x182: CMP R00, 0x00 - "111010" & X"3FF", -- 0x183: JNE 0x3FF - "000011" & X"841", -- 0x184: MOV R01, 0x84 - "011111" & X"001", -- 0x185: SHR R01 - "001111" & X"421", -- 0x186: CMP R01, 0x42 - "111010" & X"3FF", -- 0x187: JNE 0x3FF - "011111" & X"001", -- 0x188: SHR R01 - "001111" & X"211", -- 0x189: CMP R01, 0x21 - "111010" & X"3FF", -- 0x18A: JNE 0x3FF - "011111" & X"001", -- 0x18B: SHR R01 - "001111" & X"101", -- 0x18C: CMP R01, 0x10 - "111010" & X"3FF", -- 0x18D: JNE 0x3FF - "011111" & X"001", -- 0x18E: SHR R01 - "001111" & X"081", -- 0x18F: CMP R01, 0x08 - "111010" & X"3FF", -- 0x190: JNE 0x3FF - "011111" & X"001", -- 0x191: SHR R01 - "001111" & X"041", -- 0x192: CMP R01, 0x04 - "111010" & X"3FF", -- 0x193: JNE 0x3FF - "011111" & X"001", -- 0x194: SHR R01 - "001111" & X"021", -- 0x195: CMP R01, 0x02 - "111010" & X"3FF", -- 0x196: JNE 0x3FF - "011111" & X"001", -- 0x197: SHR R01 - "001111" & X"011", -- 0x198: CMP R01, 0x01 - "111010" & X"3FF", -- 0x199: JNE 0x3FF - "011111" & X"001", -- 0x19A: SHR R01 - "001111" & X"001", -- 0x19B: CMP R01, 0x00 - "111010" & X"3FF", -- 0x19C: JNE 0x3FF - "000011" & X"C50", -- 0x19D: MOV R00, 0xC5 - "100000" & X"000", -- 0x19E: ROL R00 - "001111" & X"8B0", -- 0x19F: CMP R00, 0x8B - "111010" & X"3FF", -- 0x1A0: JNE 0x3FF - "100000" & X"000", -- 0x1A1: ROL R00 - "001111" & X"170", -- 0x1A2: CMP R00, 0x17 - "111010" & X"3FF", -- 0x1A3: JNE 0x3FF - "100000" & X"000", -- 0x1A4: ROL R00 - "001111" & X"2E0", -- 0x1A5: CMP R00, 0x2E - "111010" & X"3FF", -- 0x1A6: JNE 0x3FF - "100000" & X"000", -- 0x1A7: ROL R00 - "001111" & X"5C0", -- 0x1A8: CMP R00, 0x5C - "111010" & X"3FF", -- 0x1A9: JNE 0x3FF - "100000" & X"000", -- 0x1AA: ROL R00 - "001111" & X"B80", -- 0x1AB: CMP R00, 0xB8 - "111010" & X"3FF", -- 0x1AC: JNE 0x3FF - "100000" & X"000", -- 0x1AD: ROL R00 - "001111" & X"710", -- 0x1AE: CMP R00, 0x71 - "111010" & X"3FF", -- 0x1AF: JNE 0x3FF - "100000" & X"000", -- 0x1B0: ROL R00 - "001111" & X"E20", -- 0x1B1: CMP R00, 0xE2 - "111010" & X"3FF", -- 0x1B2: JNE 0x3FF - "100000" & X"000", -- 0x1B3: ROL R00 - "001111" & X"C50", -- 0x1B4: CMP R00, 0xC5 - "111010" & X"3FF", -- 0x1B5: JNE 0x3FF - "000011" & X"631", -- 0x1B6: MOV R01, 0x63 - "100001" & X"001", -- 0x1B7: ROR R01 - "001111" & X"B11", -- 0x1B8: CMP R01, 0xB1 - "111010" & X"3FF", -- 0x1B9: JNE 0x3FF - "100001" & X"001", -- 0x1BA: ROR R01 - "001111" & X"D81", -- 0x1BB: CMP R01, 0xD8 - "111010" & X"3FF", -- 0x1BC: JNE 0x3FF - "100001" & X"001", -- 0x1BD: ROR R01 - "001111" & X"6C1", -- 0x1BE: CMP R01, 0x6C - "111010" & X"3FF", -- 0x1BF: JNE 0x3FF - "100001" & X"001", -- 0x1C0: ROR R01 - "001111" & X"361", -- 0x1C1: CMP R01, 0x36 - "111010" & X"3FF", -- 0x1C2: JNE 0x3FF - "100001" & X"001", -- 0x1C3: ROR R01 - "001111" & X"1B1", -- 0x1C4: CMP R01, 0x1B - "111010" & X"3FF", -- 0x1C5: JNE 0x3FF - "100001" & X"001", -- 0x1C6: ROR R01 - "001111" & X"8D1", -- 0x1C7: CMP R01, 0x8D - "111010" & X"3FF", -- 0x1C8: JNE 0x3FF - "100001" & X"001", -- 0x1C9: ROR R01 - "001111" & X"C61", -- 0x1CA: CMP R01, 0xC6 - "111010" & X"3FF", -- 0x1CB: JNE 0x3FF - "100001" & X"001", -- 0x1CC: ROR R01 - "001111" & X"631", -- 0x1CD: CMP R01, 0x63 - "111010" & X"3FF", -- 0x1CE: JNE 0x3FF - "011100" & X"000", -- 0x1CF: XOR R00, R00 - "000011" & X"C50", -- 0x1D0: MOV R00, 0xC5 - "100010" & X"000", -- 0x1D1: ROLC R00 - "111100" & X"000", -- 0x1D2: PUSH R00 - "100010" & X"000", -- 0x1D3: ROLC R00 - "111100" & X"000", -- 0x1D4: PUSH R00 - "100010" & X"000", -- 0x1D5: ROLC R00 - "111100" & X"000", -- 0x1D6: PUSH R00 - "100010" & X"000", -- 0x1D7: ROLC R00 - "111100" & X"000", -- 0x1D8: PUSH R00 - "100010" & X"000", -- 0x1D9: ROLC R00 - "111100" & X"000", -- 0x1DA: PUSH R00 - "100010" & X"000", -- 0x1DB: ROLC R00 - "111100" & X"000", -- 0x1DC: PUSH R00 - "100010" & X"000", -- 0x1DD: ROLC R00 - "111100" & X"000", -- 0x1DE: PUSH R00 - "100010" & X"000", -- 0x1DF: ROLC R00 - "111100" & X"000", -- 0x1E0: PUSH R00 - "100010" & X"000", -- 0x1E1: ROLC R00 - "001111" & X"C50", -- 0x1E2: CMP R00, 0xC5 - "111010" & X"3FF", -- 0x1E3: JNE 0x3FF - "111101" & X"000", -- 0x1E4: POP R00 - "001111" & X"620", -- 0x1E5: CMP R00, 0x62 - "111010" & X"3FF", -- 0x1E6: JNE 0x3FF - "111101" & X"000", -- 0x1E7: POP R00 - "001111" & X"B10", -- 0x1E8: CMP R00, 0xB1 - "111010" & X"3FF", -- 0x1E9: JNE 0x3FF - "111101" & X"000", -- 0x1EA: POP R00 - "001111" & X"580", -- 0x1EB: CMP R00, 0x58 - "111010" & X"3FF", -- 0x1EC: JNE 0x3FF - "111101" & X"000", -- 0x1ED: POP R00 - "001111" & X"AC0", -- 0x1EE: CMP R00, 0xAC - "111010" & X"3FF", -- 0x1EF: JNE 0x3FF - "111101" & X"000", -- 0x1F0: POP R00 - "001111" & X"560", -- 0x1F1: CMP R00, 0x56 - "111010" & X"3FF", -- 0x1F2: JNE 0x3FF - "111101" & X"000", -- 0x1F3: POP R00 - "001111" & X"2B0", -- 0x1F4: CMP R00, 0x2B - "111010" & X"3FF", -- 0x1F5: JNE 0x3FF - "111101" & X"000", -- 0x1F6: POP R00 - "001111" & X"150", -- 0x1F7: CMP R00, 0x15 - "111010" & X"3FF", -- 0x1F8: JNE 0x3FF - "111101" & X"000", -- 0x1F9: POP R00 - "001111" & X"8A0", -- 0x1FA: CMP R00, 0x8A - "111010" & X"3FF", -- 0x1FB: JNE 0x3FF - "011100" & X"011", -- 0x1FC: XOR R01, R01 - "000011" & X"631", -- 0x1FD: MOV R01, 0x63 - "100011" & X"001", -- 0x1FE: RORC R01 - "111100" & X"001", -- 0x1FF: PUSH R01 - "100011" & X"001", -- 0x200: RORC R01 - "111100" & X"001", -- 0x201: PUSH R01 - "100011" & X"001", -- 0x202: RORC R01 - "111100" & X"001", -- 0x203: PUSH R01 - "100011" & X"001", -- 0x204: RORC R01 - "111100" & X"001", -- 0x205: PUSH R01 - "100011" & X"001", -- 0x206: RORC R01 - "111100" & X"001", -- 0x207: PUSH R01 - "100011" & X"001", -- 0x208: RORC R01 - "111100" & X"001", -- 0x209: PUSH R01 - "100011" & X"001", -- 0x20A: RORC R01 - "111100" & X"001", -- 0x20B: PUSH R01 - "100011" & X"001", -- 0x20C: RORC R01 - "111100" & X"001", -- 0x20D: PUSH R01 - "100011" & X"001", -- 0x20E: RORC R01 - "001111" & X"631", -- 0x20F: CMP R01, 0x63 - "111010" & X"3FF", -- 0x210: JNE 0x3FF - "111101" & X"001", -- 0x211: POP R01 - "001111" & X"C61", -- 0x212: CMP R01, 0xC6 - "111010" & X"3FF", -- 0x213: JNE 0x3FF - "111101" & X"001", -- 0x214: POP R01 - "001111" & X"8C1", -- 0x215: CMP R01, 0x8C - "111010" & X"3FF", -- 0x216: JNE 0x3FF - "111101" & X"001", -- 0x217: POP R01 - "001111" & X"191", -- 0x218: CMP R01, 0x19 - "111010" & X"3FF", -- 0x219: JNE 0x3FF - "111101" & X"001", -- 0x21A: POP R01 - "001111" & X"331", -- 0x21B: CMP R01, 0x33 - "111010" & X"3FF", -- 0x21C: JNE 0x3FF - "111101" & X"001", -- 0x21D: POP R01 - "001111" & X"661", -- 0x21E: CMP R01, 0x66 - "111010" & X"3FF", -- 0x21F: JNE 0x3FF - "111101" & X"001", -- 0x220: POP R01 - "001111" & X"CC1", -- 0x221: CMP R01, 0xCC - "111010" & X"3FF", -- 0x222: JNE 0x3FF - "111101" & X"001", -- 0x223: POP R01 - "001111" & X"981", -- 0x224: CMP R01, 0x98 - "111010" & X"3FF", -- 0x225: JNE 0x3FF - "111101" & X"001", -- 0x226: POP R01 - "001111" & X"311", -- 0x227: CMP R01, 0x31 - "111010" & X"3FF", -- 0x228: JNE 0x3FF - "111110" & X"000", -- 0x229: RET - "000011" & X"A50", -- 0x22A: MOV R00, 0xA5 - "101010" & X"000", -- 0x22B: SWAP R00 - "111100" & X"000", -- 0x22C: PUSH R00 - "011001" & X"0F0", -- 0x22D: AND R00, 0x0F - "001111" & X"0A0", -- 0x22E: CMP R00, 0x0A - "111010" & X"3FF", -- 0x22F: JNE 0x3FF - "111101" & X"000", -- 0x230: POP R00 - "111100" & X"000", -- 0x231: PUSH R00 - "011001" & X"0F0", -- 0x232: AND R00, 0x0F - "001111" & X"0A0", -- 0x233: CMP R00, 0x0A - "111101" & X"001", -- 0x234: POP R01 - "111010" & X"3FF", -- 0x235: JNE 0x3FF - "101010" & X"001", -- 0x236: SWAP R01 - "000011" & X"0F2", -- 0x237: MOV R02, 0x0F - "011000" & X"021", -- 0x238: AND R01, R02 - "001111" & X"051", -- 0x239: CMP R01, 0x05 - "111010" & X"3FF", -- 0x23A: JNE 0x3FF - "000011" & X"050", -- 0x23B: MOV R00, 0x05 - "000011" & X"A02", -- 0x23C: MOV R02, 0xA0 - "101010" & X"000", -- 0x23D: SWAP R00 - "011010" & X"002", -- 0x23E: OR R02, R00 - "001111" & X"F02", -- 0x23F: CMP R02, 0xF0 - "111010" & X"3FF", -- 0x240: JNE 0x3FF - "101010" & X"000", -- 0x241: SWAP R00 - "011011" & X"500", -- 0x242: OR R00, 0x50 - "001111" & X"550", -- 0x243: CMP R00, 0x55 - "111010" & X"3FF", -- 0x244: JNE 0x3FF - "000011" & X"011", -- 0x245: MOV R01, 0x01 - "000011" & X"010", -- 0x246: MOV R00, 0x01 - "011101" & X"010", -- 0x247: XOR R00, 0x01 - "110010" & X"3FF", -- 0x248: JNZ 0x3FF - "011100" & X"010", -- 0x249: XOR R00, R01 - "001111" & X"010", -- 0x24A: CMP R00, 0x01 - "111010" & X"3FF", -- 0x24B: JNE 0x3FF - "111110" & X"000", -- 0x24C: RET - "000011" & X"030", -- 0x24D: MOV R00, 0x03 - "100110" & X"030", -- 0x24E: COUT (0x03), R00 - "101000" & X"020", -- 0x24F: XIN R00, (0x02) - "011011" & X"010", -- 0x250: OR R00, 0x01 - "100100" & X"020", -- 0x251: XOUT (0x02), R00 - "000000" & X"000", -- 0x252: NOP - "000000" & X"000", -- 0x253: NOP - "000000" & X"000", -- 0x254: NOP - "000000" & X"000", -- 0x255: NOP - "000000" & X"000", -- 0x256: NOP - "000000" & X"000", -- 0x257: NOP - "101000" & X"020", -- 0x258: XIN R00, (0x02) - "011001" & X"FE0", -- 0x259: AND R00, 0xFE - "100100" & X"020", -- 0x25A: XOUT (0x02), R00 - "000000" & X"000", -- 0x25B: NOP - "000000" & X"000", -- 0x25C: NOP - "000000" & X"000", -- 0x25D: NOP - "000000" & X"000", -- 0x25E: NOP - "101001" & X"030", -- 0x25F: CIN R00, (0x03) - "011011" & X"800", -- 0x260: OR R00, 0x80 - "100110" & X"030", -- 0x261: COUT (0x03), R00 - "000000" & X"000", -- 0x262: NOP - "101001" & X"030", -- 0x263: CIN R00, (0x03) - "011011" & X"800", -- 0x264: OR R00, 0x80 - "100110" & X"030", -- 0x265: COUT (0x03), R00 - "000000" & X"000", -- 0x266: NOP - "101001" & X"030", -- 0x267: CIN R00, (0x03) - "011011" & X"800", -- 0x268: OR R00, 0x80 - "100110" & X"030", -- 0x269: COUT (0x03), R00 - "000000" & X"000", -- 0x26A: NOP - "101001" & X"030", -- 0x26B: CIN R00, (0x03) - "011011" & X"800", -- 0x26C: OR R00, 0x80 - "100110" & X"030", -- 0x26D: COUT (0x03), R00 - "000000" & X"000", -- 0x26E: NOP - "000000" & X"000", -- 0x26F: NOP - "000000" & X"000", -- 0x270: NOP - "000000" & X"000", -- 0x271: NOP - "000000" & X"000", -- 0x272: NOP - "000000" & X"000", -- 0x273: NOP - "000000" & X"000", -- 0x274: NOP - "000000" & X"000", -- 0x275: NOP - "000000" & X"000", -- 0x276: NOP - "111110" & X"000", -- 0x277: RET - "010101" & X"000", -- 0x278: SUB R00, 0x00 - "110011" & X"3FF", -- 0x279: JC 0x3FF - "101011" & X"000", -- 0x27A: SETC - "110100" & X"3FF", -- 0x27B: JNC 0x3FF - "000000" & X"000", -- 0x27C: NOP - "010101" & X"000", -- 0x27D: SUB R00, 0x00 - "110011" & X"3FF", -- 0x27E: JC 0x3FF - "000011" & X"000", -- 0x27F: MOV R00, 0x00 - "010101" & X"000", -- 0x280: CLRC - "110011" & X"3FF", -- 0x281: JC 0x3FF - "101011" & X"000", -- 0x282: SETC - "110100" & X"3FF", -- 0x283: JNC 0x3FF - "000000" & X"000", -- 0x284: NOP - "010101" & X"000", -- 0x285: CLRC - "110011" & X"3FF", -- 0x286: JC 0x3FF - "111110" & X"000", -- 0x287: RET - "010001" & X"01E", -- 0x288: INC R14 - "111111" & X"000", -- 0x289: RETI - "000000" & X"000", -- 0x28A: - "000000" & X"000", -- 0x28B: - "000000" & X"000", -- 0x28C: - "000000" & X"000", -- 0x28D: - "000000" & X"000", -- 0x28E: - "000000" & X"000", -- 0x28F: - "000000" & X"000", -- 0x290: - "000000" & X"000", -- 0x291: - "000000" & X"000", -- 0x292: - "000000" & X"000", -- 0x293: - "000000" & X"000", -- 0x294: - "000000" & X"000", -- 0x295: - "000000" & X"000", -- 0x296: - "000000" & X"000", -- 0x297: - "000000" & X"000", -- 0x298: - "000000" & X"000", -- 0x299: - "000000" & X"000", -- 0x29A: - "000000" & X"000", -- 0x29B: - "000000" & X"000", -- 0x29C: - "000000" & X"000", -- 0x29D: - "000000" & X"000", -- 0x29E: - "000000" & X"000", -- 0x29F: - "000000" & X"000", -- 0x2A0: - "000000" & X"000", -- 0x2A1: - "000000" & X"000", -- 0x2A2: - "000000" & X"000", -- 0x2A3: - "000000" & X"000", -- 0x2A4: - "000000" & X"000", -- 0x2A5: - "000000" & X"000", -- 0x2A6: - "000000" & X"000", -- 0x2A7: - "000000" & X"000", -- 0x2A8: - "000000" & X"000", -- 0x2A9: - "000000" & X"000", -- 0x2AA: - "000000" & X"000", -- 0x2AB: - "000000" & X"000", -- 0x2AC: - "000000" & X"000", -- 0x2AD: - "000000" & X"000", -- 0x2AE: - "000000" & X"000", -- 0x2AF: - "000000" & X"000", -- 0x2B0: - "000000" & X"000", -- 0x2B1: - "000000" & X"000", -- 0x2B2: - "000000" & X"000", -- 0x2B3: - "000000" & X"000", -- 0x2B4: - "000000" & X"000", -- 0x2B5: - "000000" & X"000", -- 0x2B6: - "000000" & X"000", -- 0x2B7: - "000000" & X"000", -- 0x2B8: - "000000" & X"000", -- 0x2B9: - "000000" & X"000", -- 0x2BA: - "000000" & X"000", -- 0x2BB: - "000000" & X"000", -- 0x2BC: - "000000" & X"000", -- 0x2BD: - "000000" & X"000", -- 0x2BE: - "000000" & X"000", -- 0x2BF: - "000000" & X"000", -- 0x2C0: - "000000" & X"000", -- 0x2C1: - "000000" & X"000", -- 0x2C2: - "000000" & X"000", -- 0x2C3: - "000000" & X"000", -- 0x2C4: - "000000" & X"000", -- 0x2C5: - "000000" & X"000", -- 0x2C6: - "000000" & X"000", -- 0x2C7: - "000000" & X"000", -- 0x2C8: - "000000" & X"000", -- 0x2C9: - "000000" & X"000", -- 0x2CA: - "000000" & X"000", -- 0x2CB: - "000000" & X"000", -- 0x2CC: - "000000" & X"000", -- 0x2CD: - "000000" & X"000", -- 0x2CE: - "000000" & X"000", -- 0x2CF: - "000000" & X"000", -- 0x2D0: - "000000" & X"000", -- 0x2D1: - "000000" & X"000", -- 0x2D2: - "000000" & X"000", -- 0x2D3: - "000000" & X"000", -- 0x2D4: - "000000" & X"000", -- 0x2D5: - "000000" & X"000", -- 0x2D6: - "000000" & X"000", -- 0x2D7: - "000000" & X"000", -- 0x2D8: - "000000" & X"000", -- 0x2D9: - "000000" & X"000", -- 0x2DA: - "000000" & X"000", -- 0x2DB: - "000000" & X"000", -- 0x2DC: - "000000" & X"000", -- 0x2DD: - "000000" & X"000", -- 0x2DE: - "000000" & X"000", -- 0x2DF: - "000000" & X"000", -- 0x2E0: - "000000" & X"000", -- 0x2E1: - "000000" & X"000", -- 0x2E2: - "000000" & X"000", -- 0x2E3: - "000000" & X"000", -- 0x2E4: - "000000" & X"000", -- 0x2E5: - "000000" & X"000", -- 0x2E6: - "000000" & X"000", -- 0x2E7: - "000000" & X"000", -- 0x2E8: - "000000" & X"000", -- 0x2E9: - "000000" & X"000", -- 0x2EA: - "000000" & X"000", -- 0x2EB: - "000000" & X"000", -- 0x2EC: - "000000" & X"000", -- 0x2ED: - "000000" & X"000", -- 0x2EE: - "000000" & X"000", -- 0x2EF: - "000000" & X"000", -- 0x2F0: - "000000" & X"000", -- 0x2F1: - "000000" & X"000", -- 0x2F2: - "000000" & X"000", -- 0x2F3: - "000000" & X"000", -- 0x2F4: - "000000" & X"000", -- 0x2F5: - "000000" & X"000", -- 0x2F6: - "000000" & X"000", -- 0x2F7: - "000000" & X"000", -- 0x2F8: - "000000" & X"000", -- 0x2F9: - "000000" & X"000", -- 0x2FA: - "000000" & X"000", -- 0x2FB: - "000000" & X"000", -- 0x2FC: - "000000" & X"000", -- 0x2FD: - "000000" & X"000", -- 0x2FE: - "110000" & X"2FF", -- 0x2FF: JMP 0x2FF - "000000" & X"000", -- 0x300: - "000000" & X"000", -- 0x301: - "000000" & X"000", -- 0x302: - "000000" & X"000", -- 0x303: - "000000" & X"000", -- 0x304: - "000000" & X"000", -- 0x305: - "000000" & X"000", -- 0x306: - "000000" & X"000", -- 0x307: - "000000" & X"000", -- 0x308: - "000000" & X"000", -- 0x309: - "000000" & X"000", -- 0x30A: - "000000" & X"000", -- 0x30B: - "000000" & X"000", -- 0x30C: - "000000" & X"000", -- 0x30D: - "000000" & X"000", -- 0x30E: - "000000" & X"000", -- 0x30F: - "000000" & X"000", -- 0x310: - "000000" & X"000", -- 0x311: - "000000" & X"000", -- 0x312: - "000000" & X"000", -- 0x313: - "000000" & X"000", -- 0x314: - "000000" & X"000", -- 0x315: - "000000" & X"000", -- 0x316: - "000000" & X"000", -- 0x317: - "000000" & X"000", -- 0x318: - "000000" & X"000", -- 0x319: - "000000" & X"000", -- 0x31A: - "000000" & X"000", -- 0x31B: - "000000" & X"000", -- 0x31C: - "000000" & X"000", -- 0x31D: - "000000" & X"000", -- 0x31E: - "000000" & X"000", -- 0x31F: - "000000" & X"000", -- 0x320: - "000000" & X"000", -- 0x321: - "000000" & X"000", -- 0x322: - "000000" & X"000", -- 0x323: - "000000" & X"000", -- 0x324: - "000000" & X"000", -- 0x325: - "000000" & X"000", -- 0x326: - "000000" & X"000", -- 0x327: - "000000" & X"000", -- 0x328: - "000000" & X"000", -- 0x329: - "000000" & X"000", -- 0x32A: - "000000" & X"000", -- 0x32B: - "000000" & X"000", -- 0x32C: - "000000" & X"000", -- 0x32D: - "000000" & X"000", -- 0x32E: - "000000" & X"000", -- 0x32F: - "000000" & X"000", -- 0x330: - "000000" & X"000", -- 0x331: - "000000" & X"000", -- 0x332: - "000000" & X"000", -- 0x333: - "000000" & X"000", -- 0x334: - "000000" & X"000", -- 0x335: - "000000" & X"000", -- 0x336: - "000000" & X"000", -- 0x337: - "000000" & X"000", -- 0x338: - "000000" & X"000", -- 0x339: - "000000" & X"000", -- 0x33A: - "000000" & X"000", -- 0x33B: - "000000" & X"000", -- 0x33C: - "000000" & X"000", -- 0x33D: - "000000" & X"000", -- 0x33E: - "000000" & X"000", -- 0x33F: - "000000" & X"000", -- 0x340: - "000000" & X"000", -- 0x341: - "000000" & X"000", -- 0x342: - "000000" & X"000", -- 0x343: - "000000" & X"000", -- 0x344: - "000000" & X"000", -- 0x345: - "000000" & X"000", -- 0x346: - "000000" & X"000", -- 0x347: - "000000" & X"000", -- 0x348: - "000000" & X"000", -- 0x349: - "000000" & X"000", -- 0x34A: - "000000" & X"000", -- 0x34B: - "000000" & X"000", -- 0x34C: - "000000" & X"000", -- 0x34D: - "000000" & X"000", -- 0x34E: - "000000" & X"000", -- 0x34F: - "000000" & X"000", -- 0x350: - "000000" & X"000", -- 0x351: - "000000" & X"000", -- 0x352: - "000000" & X"000", -- 0x353: - "000000" & X"000", -- 0x354: - "000000" & X"000", -- 0x355: - "000000" & X"000", -- 0x356: - "000000" & X"000", -- 0x357: - "000000" & X"000", -- 0x358: - "000000" & X"000", -- 0x359: - "000000" & X"000", -- 0x35A: - "000000" & X"000", -- 0x35B: - "000000" & X"000", -- 0x35C: - "000000" & X"000", -- 0x35D: - "000000" & X"000", -- 0x35E: - "000000" & X"000", -- 0x35F: - "000000" & X"000", -- 0x360: - "000000" & X"000", -- 0x361: - "000000" & X"000", -- 0x362: - "000000" & X"000", -- 0x363: - "000000" & X"000", -- 0x364: - "000000" & X"000", -- 0x365: - "000000" & X"000", -- 0x366: - "000000" & X"000", -- 0x367: - "000000" & X"000", -- 0x368: - "000000" & X"000", -- 0x369: - "000000" & X"000", -- 0x36A: - "000000" & X"000", -- 0x36B: - "000000" & X"000", -- 0x36C: - "000000" & X"000", -- 0x36D: - "000000" & X"000", -- 0x36E: - "000000" & X"000", -- 0x36F: - "000000" & X"000", -- 0x370: - "000000" & X"000", -- 0x371: - "000000" & X"000", -- 0x372: - "000000" & X"000", -- 0x373: - "000000" & X"000", -- 0x374: - "000000" & X"000", -- 0x375: - "000000" & X"000", -- 0x376: - "000000" & X"000", -- 0x377: - "000000" & X"000", -- 0x378: - "000000" & X"000", -- 0x379: - "000000" & X"000", -- 0x37A: - "000000" & X"000", -- 0x37B: - "000000" & X"000", -- 0x37C: - "000000" & X"000", -- 0x37D: - "000000" & X"000", -- 0x37E: - "000000" & X"000", -- 0x37F: - "000000" & X"000", -- 0x380: - "000000" & X"000", -- 0x381: - "000000" & X"000", -- 0x382: - "000000" & X"000", -- 0x383: - "000000" & X"000", -- 0x384: - "000000" & X"000", -- 0x385: - "000000" & X"000", -- 0x386: - "000000" & X"000", -- 0x387: - "000000" & X"000", -- 0x388: - "000000" & X"000", -- 0x389: - "000000" & X"000", -- 0x38A: - "000000" & X"000", -- 0x38B: - "000000" & X"000", -- 0x38C: - "000000" & X"000", -- 0x38D: - "000000" & X"000", -- 0x38E: - "000000" & X"000", -- 0x38F: - "000000" & X"000", -- 0x390: - "000000" & X"000", -- 0x391: - "000000" & X"000", -- 0x392: - "000000" & X"000", -- 0x393: - "000000" & X"000", -- 0x394: - "000000" & X"000", -- 0x395: - "000000" & X"000", -- 0x396: - "000000" & X"000", -- 0x397: - "000000" & X"000", -- 0x398: - "000000" & X"000", -- 0x399: - "000000" & X"000", -- 0x39A: - "000000" & X"000", -- 0x39B: - "000000" & X"000", -- 0x39C: - "000000" & X"000", -- 0x39D: - "000000" & X"000", -- 0x39E: - "000000" & X"000", -- 0x39F: - "000000" & X"000", -- 0x3A0: - "000000" & X"000", -- 0x3A1: - "000000" & X"000", -- 0x3A2: - "000000" & X"000", -- 0x3A3: - "000000" & X"000", -- 0x3A4: - "000000" & X"000", -- 0x3A5: - "000000" & X"000", -- 0x3A6: - "000000" & X"000", -- 0x3A7: - "000000" & X"000", -- 0x3A8: - "000000" & X"000", -- 0x3A9: - "000000" & X"000", -- 0x3AA: - "000000" & X"000", -- 0x3AB: - "000000" & X"000", -- 0x3AC: - "000000" & X"000", -- 0x3AD: - "000000" & X"000", -- 0x3AE: - "000000" & X"000", -- 0x3AF: - "000000" & X"000", -- 0x3B0: - "000000" & X"000", -- 0x3B1: - "000000" & X"000", -- 0x3B2: - "000000" & X"000", -- 0x3B3: - "000000" & X"000", -- 0x3B4: - "000000" & X"000", -- 0x3B5: - "000000" & X"000", -- 0x3B6: - "000000" & X"000", -- 0x3B7: - "000000" & X"000", -- 0x3B8: - "000000" & X"000", -- 0x3B9: - "000000" & X"000", -- 0x3BA: - "000000" & X"000", -- 0x3BB: - "000000" & X"000", -- 0x3BC: - "000000" & X"000", -- 0x3BD: - "000000" & X"000", -- 0x3BE: - "000000" & X"000", -- 0x3BF: - "000000" & X"000", -- 0x3C0: - "000000" & X"000", -- 0x3C1: - "000000" & X"000", -- 0x3C2: - "000000" & X"000", -- 0x3C3: - "000000" & X"000", -- 0x3C4: - "000000" & X"000", -- 0x3C5: - "000000" & X"000", -- 0x3C6: - "000000" & X"000", -- 0x3C7: - "000000" & X"000", -- 0x3C8: - "000000" & X"000", -- 0x3C9: - "000000" & X"000", -- 0x3CA: - "000000" & X"000", -- 0x3CB: - "000000" & X"000", -- 0x3CC: - "000000" & X"000", -- 0x3CD: - "000000" & X"000", -- 0x3CE: - "000000" & X"000", -- 0x3CF: - "000000" & X"000", -- 0x3D0: - "000000" & X"000", -- 0x3D1: - "000000" & X"000", -- 0x3D2: - "000000" & X"000", -- 0x3D3: - "000000" & X"000", -- 0x3D4: - "000000" & X"000", -- 0x3D5: - "000000" & X"000", -- 0x3D6: - "000000" & X"000", -- 0x3D7: - "000000" & X"000", -- 0x3D8: - "000000" & X"000", -- 0x3D9: - "000000" & X"000", -- 0x3DA: - "000000" & X"000", -- 0x3DB: - "000000" & X"000", -- 0x3DC: - "000000" & X"000", -- 0x3DD: - "000000" & X"000", -- 0x3DE: - "000000" & X"000", -- 0x3DF: - "000000" & X"000", -- 0x3E0: - "000000" & X"000", -- 0x3E1: - "000000" & X"000", -- 0x3E2: - "000000" & X"000", -- 0x3E3: - "000000" & X"000", -- 0x3E4: - "000000" & X"000", -- 0x3E5: - "000000" & X"000", -- 0x3E6: - "000000" & X"000", -- 0x3E7: - "000000" & X"000", -- 0x3E8: - "000000" & X"000", -- 0x3E9: - "000000" & X"000", -- 0x3EA: - "000000" & X"000", -- 0x3EB: - "000000" & X"000", -- 0x3EC: - "000000" & X"000", -- 0x3ED: - "000000" & X"000", -- 0x3EE: - "000000" & X"000", -- 0x3EF: - "000000" & X"000", -- 0x3F0: - "000000" & X"000", -- 0x3F1: - "000000" & X"000", -- 0x3F2: - "000000" & X"000", -- 0x3F3: - "000000" & X"000", -- 0x3F4: - "000000" & X"000", -- 0x3F5: - "000000" & X"000", -- 0x3F6: - "000000" & X"000", -- 0x3F7: - "000000" & X"000", -- 0x3F8: - "000000" & X"000", -- 0x3F9: - "000000" & X"000", -- 0x3FA: - "000000" & X"000", -- 0x3FB: - "000000" & X"000", -- 0x3FC: - "000000" & X"000", -- 0x3FD: - "000000" & X"000", -- 0x3FE: - "110000" & X"3FF" -- 0x3FF: JMP 0x3FF - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : inst_addr_t; - signal jtag_ld_dout : inst_t; - signal jtag_ld_din : inst_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (31 downto 0); - constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); - jtag_ld_din <= user_regi(inst_t'length-1 downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/itest_xrom.vhdl b/lib/CPUs/JCpu/src/itest_xrom.vhdl deleted file mode 100644 index 4206abc..0000000 --- a/lib/CPUs/JCpu/src/itest_xrom.vhdl +++ /dev/null @@ -1,317 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); -END xrom; - -ARCHITECTURE itest OF xrom IS - - type xmem_rom_t is array (0 to 255) of dmem_data_t; - - -- Assembled from itest.jsm - constant xmem_rom : xmem_rom_t := - ( - X"48", -- 0x00 - X"61", -- 0x01 - X"6C", -- 0x02 - X"6C", -- 0x03 - X"6F", -- 0x04 - X"00", -- 0x05 - X"00", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"00", -- 0x17 - X"00", -- 0x18 - X"00", -- 0x19 - X"00", -- 0x1A - X"00", -- 0x1B - X"00", -- 0x1C - X"00", -- 0x1D - X"00", -- 0x1E - X"00", -- 0x1F - X"00", -- 0x20 - X"00", -- 0x21 - X"00", -- 0x22 - X"00", -- 0x23 - X"00", -- 0x24 - X"00", -- 0x25 - X"00", -- 0x26 - X"00", -- 0x27 - X"00", -- 0x28 - X"00", -- 0x29 - X"00", -- 0x2A - X"00", -- 0x2B - X"00", -- 0x2C - X"00", -- 0x2D - X"00", -- 0x2E - X"00", -- 0x2F - X"00", -- 0x30 - X"00", -- 0x31 - X"00", -- 0x32 - X"00", -- 0x33 - X"00", -- 0x34 - X"00", -- 0x35 - X"00", -- 0x36 - X"00", -- 0x37 - X"00", -- 0x38 - X"00", -- 0x39 - X"00", -- 0x3A - X"00", -- 0x3B - X"00", -- 0x3C - X"00", -- 0x3D - X"00", -- 0x3E - X"00", -- 0x3F - X"00", -- 0x40 - X"00", -- 0x41 - X"00", -- 0x42 - X"00", -- 0x43 - X"00", -- 0x44 - X"00", -- 0x45 - X"00", -- 0x46 - X"00", -- 0x47 - X"00", -- 0x48 - X"00", -- 0x49 - X"00", -- 0x4A - X"00", -- 0x4B - X"00", -- 0x4C - X"00", -- 0x4D - X"00", -- 0x4E - X"00", -- 0x4F - X"00", -- 0x50 - X"00", -- 0x51 - X"00", -- 0x52 - X"00", -- 0x53 - X"00", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -end itest; - diff --git a/lib/CPUs/JCpu/src/itest_xrom_ld.vhdl b/lib/CPUs/JCpu/src/itest_xrom_ld.vhdl deleted file mode 100644 index 60a84ac..0000000 --- a/lib/CPUs/JCpu/src/itest_xrom_ld.vhdl +++ /dev/null @@ -1,413 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); - -END xrom; - -ARCHITECTURE loadable OF xrom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from itest.jsm - type xmem_rom_t is array (0 to 255) of dmem_data_t; - signal xmem_rom : xmem_rom_t := - ( - X"48", -- 0x00 - X"61", -- 0x01 - X"6C", -- 0x02 - X"6C", -- 0x03 - X"6F", -- 0x04 - X"00", -- 0x05 - X"00", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"00", -- 0x17 - X"00", -- 0x18 - X"00", -- 0x19 - X"00", -- 0x1A - X"00", -- 0x1B - X"00", -- 0x1C - X"00", -- 0x1D - X"00", -- 0x1E - X"00", -- 0x1F - X"00", -- 0x20 - X"00", -- 0x21 - X"00", -- 0x22 - X"00", -- 0x23 - X"00", -- 0x24 - X"00", -- 0x25 - X"00", -- 0x26 - X"00", -- 0x27 - X"00", -- 0x28 - X"00", -- 0x29 - X"00", -- 0x2A - X"00", -- 0x2B - X"00", -- 0x2C - X"00", -- 0x2D - X"00", -- 0x2E - X"00", -- 0x2F - X"00", -- 0x30 - X"00", -- 0x31 - X"00", -- 0x32 - X"00", -- 0x33 - X"00", -- 0x34 - X"00", -- 0x35 - X"00", -- 0x36 - X"00", -- 0x37 - X"00", -- 0x38 - X"00", -- 0x39 - X"00", -- 0x3A - X"00", -- 0x3B - X"00", -- 0x3C - X"00", -- 0x3D - X"00", -- 0x3E - X"00", -- 0x3F - X"00", -- 0x40 - X"00", -- 0x41 - X"00", -- 0x42 - X"00", -- 0x43 - X"00", -- 0x44 - X"00", -- 0x45 - X"00", -- 0x46 - X"00", -- 0x47 - X"00", -- 0x48 - X"00", -- 0x49 - X"00", -- 0x4A - X"00", -- 0x4B - X"00", -- 0x4C - X"00", -- 0x4D - X"00", -- 0x4E - X"00", -- 0x4F - X"00", -- 0x50 - X"00", -- 0x51 - X"00", -- 0x52 - X"00", -- 0x53 - X"00", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : dmem_addr_t; - signal jtag_ld_dout : dmem_data_t; - signal jtag_ld_din : dmem_data_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (15 downto 0); - constant id : unsigned (15 downto 0) := X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); - jtag_ld_din <= user_regi(dmem_data_t'left downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/mul8x8_irom.vhdl b/lib/CPUs/JCpu/src/mul8x8_irom.vhdl deleted file mode 100644 index 3b0de3b..0000000 --- a/lib/CPUs/JCpu/src/mul8x8_irom.vhdl +++ /dev/null @@ -1,88 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); -END irom; - -ARCHITECTURE mul8x8 OF irom IS - - type imem_rom_t is array (0 to 26) of inst_t; - - -- Assembled from mul8x8.jsm - constant imem_rom : imem_rom_t := - ( - "110000" & X"001", -- 0x000: JMP 0x001 - "000011" & X"450", -- 0x001: MOV R00, 0x45 - "000011" & X"F51", -- 0x002: MOV R01, 0xF5 - "111011" & X"005", -- 0x003: CALL 0x005 - "110000" & X"004", -- 0x004: JMP 0x004 - "111100" & X"002", -- 0x005: PUSH R02 - "111100" & X"003", -- 0x006: PUSH R03 - "111100" & X"004", -- 0x007: PUSH R04 - "000010" & X"014", -- 0x008: MOV R04, R01 - "000011" & X"001", -- 0x009: MOV R01, 0x00 - "000011" & X"002", -- 0x00A: MOV R02, 0x00 - "000011" & X"003", -- 0x00B: MOV R03, 0x00 - "001111" & X"014", -- 0x00C: CMP R04, 0x01 - "111001" & X"015", -- 0x00D: JEQ 0x015 - "011111" & X"004", -- 0x00E: SHR R04 - "110100" & X"012", -- 0x00F: JNC 0x012 - "010000" & X"002", -- 0x010: ADD R02, R00 - "010010" & X"013", -- 0x011: ADDC R03, R01 - "011110" & X"000", -- 0x012: SHL R00 - "100010" & X"001", -- 0x013: ROLC R01 - "110000" & X"00C", -- 0x014: JMP 0x00C - "010000" & X"020", -- 0x015: ADD R00, R02 - "010010" & X"031", -- 0x016: ADDC R01, R03 - "111101" & X"004", -- 0x017: POP R04 - "111101" & X"003", -- 0x018: POP R03 - "111101" & X"002", -- 0x019: POP R02 - "111110" & X"000" -- 0x01A: RET - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -end mul8x8; - diff --git a/lib/CPUs/JCpu/src/mul8x8_irom_ld.vhdl b/lib/CPUs/JCpu/src/mul8x8_irom_ld.vhdl deleted file mode 100644 index 4303d08..0000000 --- a/lib/CPUs/JCpu/src/mul8x8_irom_ld.vhdl +++ /dev/null @@ -1,1181 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - -END irom; - -ARCHITECTURE loadable OF irom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from mul8x8.jsm - type imem_rom_t is array (0 to 1023) of inst_t; - signal imem_rom : imem_rom_t := - ( - "110000" & X"001", -- 0x000: JMP 0x001 - "000011" & X"450", -- 0x001: MOV R00, 0x45 - "000011" & X"F51", -- 0x002: MOV R01, 0xF5 - "111011" & X"005", -- 0x003: CALL 0x005 - "110000" & X"004", -- 0x004: JMP 0x004 - "111100" & X"002", -- 0x005: PUSH R02 - "111100" & X"003", -- 0x006: PUSH R03 - "111100" & X"004", -- 0x007: PUSH R04 - "000010" & X"014", -- 0x008: MOV R04, R01 - "000011" & X"001", -- 0x009: MOV R01, 0x00 - "000011" & X"002", -- 0x00A: MOV R02, 0x00 - "000011" & X"003", -- 0x00B: MOV R03, 0x00 - "001111" & X"014", -- 0x00C: CMP R04, 0x01 - "111001" & X"015", -- 0x00D: JEQ 0x015 - "011111" & X"004", -- 0x00E: SHR R04 - "110100" & X"012", -- 0x00F: JNC 0x012 - "010000" & X"002", -- 0x010: ADD R02, R00 - "010010" & X"013", -- 0x011: ADDC R03, R01 - "011110" & X"000", -- 0x012: SHL R00 - "100010" & X"001", -- 0x013: ROLC R01 - "110000" & X"00C", -- 0x014: JMP 0x00C - "010000" & X"020", -- 0x015: ADD R00, R02 - "010010" & X"031", -- 0x016: ADDC R01, R03 - "111101" & X"004", -- 0x017: POP R04 - "111101" & X"003", -- 0x018: POP R03 - "111101" & X"002", -- 0x019: POP R02 - "111110" & X"000", -- 0x01A: RET - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000" - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : inst_addr_t; - signal jtag_ld_dout : inst_t; - signal jtag_ld_din : inst_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (31 downto 0); - constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); - jtag_ld_din <= user_regi(inst_t'length-1 downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/mul8x8_xrom.vhdl b/lib/CPUs/JCpu/src/mul8x8_xrom.vhdl deleted file mode 100644 index 508e8cf..0000000 --- a/lib/CPUs/JCpu/src/mul8x8_xrom.vhdl +++ /dev/null @@ -1,317 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); -END xrom; - -ARCHITECTURE mul8x8 OF xrom IS - - type xmem_rom_t is array (0 to 255) of dmem_data_t; - - -- Assembled from mul8x8.jsm - constant xmem_rom : xmem_rom_t := - ( - X"00", -- 0x00 - X"00", -- 0x01 - X"00", -- 0x02 - X"00", -- 0x03 - X"00", -- 0x04 - X"00", -- 0x05 - X"00", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"00", -- 0x17 - X"00", -- 0x18 - X"00", -- 0x19 - X"00", -- 0x1A - X"00", -- 0x1B - X"00", -- 0x1C - X"00", -- 0x1D - X"00", -- 0x1E - X"00", -- 0x1F - X"00", -- 0x20 - X"00", -- 0x21 - X"00", -- 0x22 - X"00", -- 0x23 - X"00", -- 0x24 - X"00", -- 0x25 - X"00", -- 0x26 - X"00", -- 0x27 - X"00", -- 0x28 - X"00", -- 0x29 - X"00", -- 0x2A - X"00", -- 0x2B - X"00", -- 0x2C - X"00", -- 0x2D - X"00", -- 0x2E - X"00", -- 0x2F - X"00", -- 0x30 - X"00", -- 0x31 - X"00", -- 0x32 - X"00", -- 0x33 - X"00", -- 0x34 - X"00", -- 0x35 - X"00", -- 0x36 - X"00", -- 0x37 - X"00", -- 0x38 - X"00", -- 0x39 - X"00", -- 0x3A - X"00", -- 0x3B - X"00", -- 0x3C - X"00", -- 0x3D - X"00", -- 0x3E - X"00", -- 0x3F - X"00", -- 0x40 - X"00", -- 0x41 - X"00", -- 0x42 - X"00", -- 0x43 - X"00", -- 0x44 - X"00", -- 0x45 - X"00", -- 0x46 - X"00", -- 0x47 - X"00", -- 0x48 - X"00", -- 0x49 - X"00", -- 0x4A - X"00", -- 0x4B - X"00", -- 0x4C - X"00", -- 0x4D - X"00", -- 0x4E - X"00", -- 0x4F - X"00", -- 0x50 - X"00", -- 0x51 - X"00", -- 0x52 - X"00", -- 0x53 - X"00", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -end mul8x8; - diff --git a/lib/CPUs/JCpu/src/mul8x8_xrom_ld.vhdl b/lib/CPUs/JCpu/src/mul8x8_xrom_ld.vhdl deleted file mode 100644 index a75d090..0000000 --- a/lib/CPUs/JCpu/src/mul8x8_xrom_ld.vhdl +++ /dev/null @@ -1,413 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); - -END xrom; - -ARCHITECTURE loadable OF xrom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from mul8x8.jsm - type xmem_rom_t is array (0 to 255) of dmem_data_t; - signal xmem_rom : xmem_rom_t := - ( - X"00", -- 0x00 - X"00", -- 0x01 - X"00", -- 0x02 - X"00", -- 0x03 - X"00", -- 0x04 - X"00", -- 0x05 - X"00", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"00", -- 0x17 - X"00", -- 0x18 - X"00", -- 0x19 - X"00", -- 0x1A - X"00", -- 0x1B - X"00", -- 0x1C - X"00", -- 0x1D - X"00", -- 0x1E - X"00", -- 0x1F - X"00", -- 0x20 - X"00", -- 0x21 - X"00", -- 0x22 - X"00", -- 0x23 - X"00", -- 0x24 - X"00", -- 0x25 - X"00", -- 0x26 - X"00", -- 0x27 - X"00", -- 0x28 - X"00", -- 0x29 - X"00", -- 0x2A - X"00", -- 0x2B - X"00", -- 0x2C - X"00", -- 0x2D - X"00", -- 0x2E - X"00", -- 0x2F - X"00", -- 0x30 - X"00", -- 0x31 - X"00", -- 0x32 - X"00", -- 0x33 - X"00", -- 0x34 - X"00", -- 0x35 - X"00", -- 0x36 - X"00", -- 0x37 - X"00", -- 0x38 - X"00", -- 0x39 - X"00", -- 0x3A - X"00", -- 0x3B - X"00", -- 0x3C - X"00", -- 0x3D - X"00", -- 0x3E - X"00", -- 0x3F - X"00", -- 0x40 - X"00", -- 0x41 - X"00", -- 0x42 - X"00", -- 0x43 - X"00", -- 0x44 - X"00", -- 0x45 - X"00", -- 0x46 - X"00", -- 0x47 - X"00", -- 0x48 - X"00", -- 0x49 - X"00", -- 0x4A - X"00", -- 0x4B - X"00", -- 0x4C - X"00", -- 0x4D - X"00", -- 0x4E - X"00", -- 0x4F - X"00", -- 0x50 - X"00", -- 0x51 - X"00", -- 0x52 - X"00", -- 0x53 - X"00", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : dmem_addr_t; - signal jtag_ld_dout : dmem_data_t; - signal jtag_ld_din : dmem_data_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (15 downto 0); - constant id : unsigned (15 downto 0) := X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); - jtag_ld_din <= user_regi(dmem_data_t'left downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/reti_issue_irom.vhdl b/lib/CPUs/JCpu/src/reti_issue_irom.vhdl deleted file mode 100644 index 9355a7d..0000000 --- a/lib/CPUs/JCpu/src/reti_issue_irom.vhdl +++ /dev/null @@ -1,89 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); -END irom; - -ARCHITECTURE reti_issue OF irom IS - - type imem_rom_t is array (0 to 27) of inst_t; - - -- Assembled from reti_issue.jsm - constant imem_rom : imem_rom_t := - ( - "110000" & X"002", -- 0x000: JMP 0x002 - "111111" & X"000", -- 0x001: RETI - "000011" & X"050", -- 0x002: MOV R00, 0x05 - "100110" & X"030", -- 0x003: COUT (0x03), R00 - "000011" & X"000", -- 0x004: MOV R00, 0x00 - "000000" & X"000", -- 0x005: NOP - "010001" & X"010", -- 0x006: INC R00 - "000000" & X"000", -- 0x007: NOP - "111011" & X"01B", -- 0x008: CALL 0x01B - "000000" & X"000", -- 0x009: NOP - "111100" & X"003", -- 0x00A: PUSH R03 - "000000" & X"000", -- 0x00B: NOP - "111100" & X"002", -- 0x00C: PUSH R02 - "000000" & X"000", -- 0x00D: NOP - "111100" & X"001", -- 0x00E: PUSH R01 - "000000" & X"000", -- 0x00F: NOP - "111100" & X"000", -- 0x010: PUSH R00 - "000000" & X"000", -- 0x011: NOP - "111101" & X"000", -- 0x012: POP R00 - "000000" & X"000", -- 0x013: NOP - "111101" & X"001", -- 0x014: POP R01 - "000000" & X"000", -- 0x015: NOP - "111101" & X"002", -- 0x016: POP R02 - "000000" & X"000", -- 0x017: NOP - "111101" & X"003", -- 0x018: POP R03 - "000000" & X"000", -- 0x019: NOP - "110000" & X"005", -- 0x01A: JMP 0x005 - "111110" & X"000" -- 0x01B: RET - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -end reti_issue; - diff --git a/lib/CPUs/JCpu/src/reti_issue_irom_ld.vhdl b/lib/CPUs/JCpu/src/reti_issue_irom_ld.vhdl deleted file mode 100644 index d1b4bd1..0000000 --- a/lib/CPUs/JCpu/src/reti_issue_irom_ld.vhdl +++ /dev/null @@ -1,1181 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - -END irom; - -ARCHITECTURE loadable OF irom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from reti_issue.jsm - type imem_rom_t is array (0 to 1023) of inst_t; - signal imem_rom : imem_rom_t := - ( - "110000" & X"002", -- 0x000: JMP 0x002 - "111111" & X"000", -- 0x001: RETI - "000011" & X"050", -- 0x002: MOV R00, 0x05 - "100110" & X"030", -- 0x003: COUT (0x03), R00 - "000011" & X"000", -- 0x004: MOV R00, 0x00 - "000000" & X"000", -- 0x005: NOP - "010001" & X"010", -- 0x006: INC R00 - "000000" & X"000", -- 0x007: NOP - "111011" & X"01B", -- 0x008: CALL 0x01B - "000000" & X"000", -- 0x009: NOP - "111100" & X"003", -- 0x00A: PUSH R03 - "000000" & X"000", -- 0x00B: NOP - "111100" & X"002", -- 0x00C: PUSH R02 - "000000" & X"000", -- 0x00D: NOP - "111100" & X"001", -- 0x00E: PUSH R01 - "000000" & X"000", -- 0x00F: NOP - "111100" & X"000", -- 0x010: PUSH R00 - "000000" & X"000", -- 0x011: NOP - "111101" & X"000", -- 0x012: POP R00 - "000000" & X"000", -- 0x013: NOP - "111101" & X"001", -- 0x014: POP R01 - "000000" & X"000", -- 0x015: NOP - "111101" & X"002", -- 0x016: POP R02 - "000000" & X"000", -- 0x017: NOP - "111101" & X"003", -- 0x018: POP R03 - "000000" & X"000", -- 0x019: NOP - "110000" & X"005", -- 0x01A: JMP 0x005 - "111110" & X"000", -- 0x01B: RET - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000", - "000000" & X"000" - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : inst_addr_t; - signal jtag_ld_dout : inst_t; - signal jtag_ld_din : inst_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (31 downto 0); - constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); - jtag_ld_din <= user_regi(inst_t'length-1 downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/reti_issue_xrom.vhdl b/lib/CPUs/JCpu/src/reti_issue_xrom.vhdl deleted file mode 100644 index a7a33f9..0000000 --- a/lib/CPUs/JCpu/src/reti_issue_xrom.vhdl +++ /dev/null @@ -1,317 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); -END xrom; - -ARCHITECTURE reti_issue OF xrom IS - - type xmem_rom_t is array (0 to 255) of dmem_data_t; - - -- Assembled from reti_issue.jsm - constant xmem_rom : xmem_rom_t := - ( - X"00", -- 0x00 - X"00", -- 0x01 - X"00", -- 0x02 - X"00", -- 0x03 - X"00", -- 0x04 - X"00", -- 0x05 - X"00", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"00", -- 0x17 - X"00", -- 0x18 - X"00", -- 0x19 - X"00", -- 0x1A - X"00", -- 0x1B - X"00", -- 0x1C - X"00", -- 0x1D - X"00", -- 0x1E - X"00", -- 0x1F - X"00", -- 0x20 - X"00", -- 0x21 - X"00", -- 0x22 - X"00", -- 0x23 - X"00", -- 0x24 - X"00", -- 0x25 - X"00", -- 0x26 - X"00", -- 0x27 - X"00", -- 0x28 - X"00", -- 0x29 - X"00", -- 0x2A - X"00", -- 0x2B - X"00", -- 0x2C - X"00", -- 0x2D - X"00", -- 0x2E - X"00", -- 0x2F - X"00", -- 0x30 - X"00", -- 0x31 - X"00", -- 0x32 - X"00", -- 0x33 - X"00", -- 0x34 - X"00", -- 0x35 - X"00", -- 0x36 - X"00", -- 0x37 - X"00", -- 0x38 - X"00", -- 0x39 - X"00", -- 0x3A - X"00", -- 0x3B - X"00", -- 0x3C - X"00", -- 0x3D - X"00", -- 0x3E - X"00", -- 0x3F - X"00", -- 0x40 - X"00", -- 0x41 - X"00", -- 0x42 - X"00", -- 0x43 - X"00", -- 0x44 - X"00", -- 0x45 - X"00", -- 0x46 - X"00", -- 0x47 - X"00", -- 0x48 - X"00", -- 0x49 - X"00", -- 0x4A - X"00", -- 0x4B - X"00", -- 0x4C - X"00", -- 0x4D - X"00", -- 0x4E - X"00", -- 0x4F - X"00", -- 0x50 - X"00", -- 0x51 - X"00", -- 0x52 - X"00", -- 0x53 - X"00", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - -begin - -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -end reti_issue; - diff --git a/lib/CPUs/JCpu/src/reti_issue_xrom_ld.vhdl b/lib/CPUs/JCpu/src/reti_issue_xrom_ld.vhdl deleted file mode 100644 index 244c1b5..0000000 --- a/lib/CPUs/JCpu/src/reti_issue_xrom_ld.vhdl +++ /dev/null @@ -1,413 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); - -END xrom; - -ARCHITECTURE loadable OF xrom IS - - -- JASM_ROM_INSERT_HERE - - -- Assembled from reti_issue.jsm - type xmem_rom_t is array (0 to 255) of dmem_data_t; - signal xmem_rom : xmem_rom_t := - ( - X"00", -- 0x00 - X"00", -- 0x01 - X"00", -- 0x02 - X"00", -- 0x03 - X"00", -- 0x04 - X"00", -- 0x05 - X"00", -- 0x06 - X"00", -- 0x07 - X"00", -- 0x08 - X"00", -- 0x09 - X"00", -- 0x0A - X"00", -- 0x0B - X"00", -- 0x0C - X"00", -- 0x0D - X"00", -- 0x0E - X"00", -- 0x0F - X"00", -- 0x10 - X"00", -- 0x11 - X"00", -- 0x12 - X"00", -- 0x13 - X"00", -- 0x14 - X"00", -- 0x15 - X"00", -- 0x16 - X"00", -- 0x17 - X"00", -- 0x18 - X"00", -- 0x19 - X"00", -- 0x1A - X"00", -- 0x1B - X"00", -- 0x1C - X"00", -- 0x1D - X"00", -- 0x1E - X"00", -- 0x1F - X"00", -- 0x20 - X"00", -- 0x21 - X"00", -- 0x22 - X"00", -- 0x23 - X"00", -- 0x24 - X"00", -- 0x25 - X"00", -- 0x26 - X"00", -- 0x27 - X"00", -- 0x28 - X"00", -- 0x29 - X"00", -- 0x2A - X"00", -- 0x2B - X"00", -- 0x2C - X"00", -- 0x2D - X"00", -- 0x2E - X"00", -- 0x2F - X"00", -- 0x30 - X"00", -- 0x31 - X"00", -- 0x32 - X"00", -- 0x33 - X"00", -- 0x34 - X"00", -- 0x35 - X"00", -- 0x36 - X"00", -- 0x37 - X"00", -- 0x38 - X"00", -- 0x39 - X"00", -- 0x3A - X"00", -- 0x3B - X"00", -- 0x3C - X"00", -- 0x3D - X"00", -- 0x3E - X"00", -- 0x3F - X"00", -- 0x40 - X"00", -- 0x41 - X"00", -- 0x42 - X"00", -- 0x43 - X"00", -- 0x44 - X"00", -- 0x45 - X"00", -- 0x46 - X"00", -- 0x47 - X"00", -- 0x48 - X"00", -- 0x49 - X"00", -- 0x4A - X"00", -- 0x4B - X"00", -- 0x4C - X"00", -- 0x4D - X"00", -- 0x4E - X"00", -- 0x4F - X"00", -- 0x50 - X"00", -- 0x51 - X"00", -- 0x52 - X"00", -- 0x53 - X"00", -- 0x54 - X"00", -- 0x55 - X"00", -- 0x56 - X"00", -- 0x57 - X"00", -- 0x58 - X"00", -- 0x59 - X"00", -- 0x5A - X"00", -- 0x5B - X"00", -- 0x5C - X"00", -- 0x5D - X"00", -- 0x5E - X"00", -- 0x5F - X"00", -- 0x60 - X"00", -- 0x61 - X"00", -- 0x62 - X"00", -- 0x63 - X"00", -- 0x64 - X"00", -- 0x65 - X"00", -- 0x66 - X"00", -- 0x67 - X"00", -- 0x68 - X"00", -- 0x69 - X"00", -- 0x6A - X"00", -- 0x6B - X"00", -- 0x6C - X"00", -- 0x6D - X"00", -- 0x6E - X"00", -- 0x6F - X"00", -- 0x70 - X"00", -- 0x71 - X"00", -- 0x72 - X"00", -- 0x73 - X"00", -- 0x74 - X"00", -- 0x75 - X"00", -- 0x76 - X"00", -- 0x77 - X"00", -- 0x78 - X"00", -- 0x79 - X"00", -- 0x7A - X"00", -- 0x7B - X"00", -- 0x7C - X"00", -- 0x7D - X"00", -- 0x7E - X"00", -- 0x7F - X"00", -- 0x80 - X"00", -- 0x81 - X"00", -- 0x82 - X"00", -- 0x83 - X"00", -- 0x84 - X"00", -- 0x85 - X"00", -- 0x86 - X"00", -- 0x87 - X"00", -- 0x88 - X"00", -- 0x89 - X"00", -- 0x8A - X"00", -- 0x8B - X"00", -- 0x8C - X"00", -- 0x8D - X"00", -- 0x8E - X"00", -- 0x8F - X"00", -- 0x90 - X"00", -- 0x91 - X"00", -- 0x92 - X"00", -- 0x93 - X"00", -- 0x94 - X"00", -- 0x95 - X"00", -- 0x96 - X"00", -- 0x97 - X"00", -- 0x98 - X"00", -- 0x99 - X"00", -- 0x9A - X"00", -- 0x9B - X"00", -- 0x9C - X"00", -- 0x9D - X"00", -- 0x9E - X"00", -- 0x9F - X"00", -- 0xA0 - X"00", -- 0xA1 - X"00", -- 0xA2 - X"00", -- 0xA3 - X"00", -- 0xA4 - X"00", -- 0xA5 - X"00", -- 0xA6 - X"00", -- 0xA7 - X"00", -- 0xA8 - X"00", -- 0xA9 - X"00", -- 0xAA - X"00", -- 0xAB - X"00", -- 0xAC - X"00", -- 0xAD - X"00", -- 0xAE - X"00", -- 0xAF - X"00", -- 0xB0 - X"00", -- 0xB1 - X"00", -- 0xB2 - X"00", -- 0xB3 - X"00", -- 0xB4 - X"00", -- 0xB5 - X"00", -- 0xB6 - X"00", -- 0xB7 - X"00", -- 0xB8 - X"00", -- 0xB9 - X"00", -- 0xBA - X"00", -- 0xBB - X"00", -- 0xBC - X"00", -- 0xBD - X"00", -- 0xBE - X"00", -- 0xBF - X"00", -- 0xC0 - X"00", -- 0xC1 - X"00", -- 0xC2 - X"00", -- 0xC3 - X"00", -- 0xC4 - X"00", -- 0xC5 - X"00", -- 0xC6 - X"00", -- 0xC7 - X"00", -- 0xC8 - X"00", -- 0xC9 - X"00", -- 0xCA - X"00", -- 0xCB - X"00", -- 0xCC - X"00", -- 0xCD - X"00", -- 0xCE - X"00", -- 0xCF - X"00", -- 0xD0 - X"00", -- 0xD1 - X"00", -- 0xD2 - X"00", -- 0xD3 - X"00", -- 0xD4 - X"00", -- 0xD5 - X"00", -- 0xD6 - X"00", -- 0xD7 - X"00", -- 0xD8 - X"00", -- 0xD9 - X"00", -- 0xDA - X"00", -- 0xDB - X"00", -- 0xDC - X"00", -- 0xDD - X"00", -- 0xDE - X"00", -- 0xDF - X"00", -- 0xE0 - X"00", -- 0xE1 - X"00", -- 0xE2 - X"00", -- 0xE3 - X"00", -- 0xE4 - X"00", -- 0xE5 - X"00", -- 0xE6 - X"00", -- 0xE7 - X"00", -- 0xE8 - X"00", -- 0xE9 - X"00", -- 0xEA - X"00", -- 0xEB - X"00", -- 0xEC - X"00", -- 0xED - X"00", -- 0xEE - X"00", -- 0xEF - X"00", -- 0xF0 - X"00", -- 0xF1 - X"00", -- 0xF2 - X"00", -- 0xF3 - X"00", -- 0xF4 - X"00", -- 0xF5 - X"00", -- 0xF6 - X"00", -- 0xF7 - X"00", -- 0xF8 - X"00", -- 0xF9 - X"00", -- 0xFA - X"00", -- 0xFB - X"00", -- 0xFC - X"00", -- 0xFD - X"00", -- 0xFE - X"00" -- 0xFF - ); - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : dmem_addr_t; - signal jtag_ld_dout : dmem_data_t; - signal jtag_ld_din : dmem_data_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (15 downto 0); - constant id : unsigned (15 downto 0) := X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); - jtag_ld_din <= user_regi(dmem_data_t'left downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd b/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd deleted file mode 100644 index dafb553..0000000 --- a/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd +++ /dev/null @@ -1,126 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: testbench for embedded cpu with rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; -use std.textio.all; -- Imports the standard textio package. - -library work; -use work.cpu_pkg.all; - -ENTITY tb_cpu_embedded IS -END tb_cpu_embedded; - -ARCHITECTURE behavior OF tb_cpu_embedded IS - - COMPONENT cpu_embedded - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - int_in : in STD_LOGIC; - int_ack : out STD_LOGIC; - xmem_we : out STD_LOGIC; - xmem_re : out STD_LOGIC; - xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_addr : out unsigned (DMEM_ADDR_WIDTH-1 downto 0); - io_sel : out STD_LOGIC - ); - END COMPONENT; - - constant CLK_PERIOD : time := 10 ns; - type sram_t is array (integer range <>) of dmem_data_t; - signal rst : std_logic := '1'; - signal clk : std_logic := '1'; - signal ce : std_logic := '0'; - signal int_in : std_logic := '0'; - signal int_ack : std_logic; - signal xmem_din : dmem_data_t := (others => '-'); - signal xmem_dout : dmem_data_t; - signal xmem_addr : dmem_addr_t; - signal xmem_we : std_logic; - signal xmem_re : std_logic; - signal io_sel : std_logic; - signal sram : sram_t(0 to 2**dmem_addr_t'length-1); - - -BEGIN - -uut: cpu_embedded - PORT MAP( - rst => rst, - clk => clk, - ce => ce, - int_in => int_in, - int_ack => int_ack, - xmem_we => xmem_we, - xmem_re => xmem_re, - xmem_din => xmem_din, - xmem_dout => xmem_dout, - xmem_addr => xmem_addr, - io_sel => io_sel - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - -STIMULUS: process - - begin - - wait for 3*CLK_PERIOD; - rst <= '0'; - wait for 2*CLK_PERIOD; - - wait until rising_edge(clk); - ce <= '1'; - - wait for 1000*CLK_PERIOD; - - assert false report "Test finished" severity error; - wait; - - end process; - -SRAM_RW: process(rst, clk, xmem_addr, xmem_dout, xmem_we) - begin - if (rst = '1') then - xmem_din <= X"00"; - elsif rising_edge(clk) then - if io_sel = '0' then - if xmem_we = '1' then - sram(to_integer(xmem_addr)) <= xmem_dout; - end if; - xmem_din <= to_01(sram(to_integer(xmem_addr))); - else - xmem_din <= X"FF"; - end if; - end if; - end process; - -END; diff --git a/lib/CPUs/JCpu/src/tb_cpu_itest.vhd b/lib/CPUs/JCpu/src/tb_cpu_itest.vhd deleted file mode 100644 index 243ba8f..0000000 --- a/lib/CPUs/JCpu/src/tb_cpu_itest.vhd +++ /dev/null @@ -1,200 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: Formal test of correct function of JCPU, --- also writes 'opc.lst' for JASM-assembler --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; -use std.textio.all; -- Imports the standard textio package. - -library work; -use work.cpu_pkg.all; -use work.PCK_FIO.all; - -ENTITY tb_cpu IS -END tb_cpu; - -ARCHITECTURE behavior OF tb_cpu IS - - COMPONENT cpu - Generic ( - use_instr_register : boolean; - use_ctrl_rom : boolean - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - int_in : in STD_LOGIC; - int_ack : out STD_LOGIC; - xmem_we : out STD_LOGIC; - xmem_re : out STD_LOGIC; - instr_din : in unsigned (IMEM_DATA_WIDTH-1 downto 0); - instr_addr : out unsigned (IMEM_ADDR_WIDTH-1 downto 0); - xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - xmem_addr : out unsigned (DMEM_DATA_WIDTH-1 downto 0); - io_sel : out STD_LOGIC - - ); - END COMPONENT; - - COMPONENT irom - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - END COMPONENT; - - constant CLK_PERIOD : time := 10 ns; - type prom_t is array (integer range <>) of inst_t; - type sram_t is array (integer range <>) of dmem_data_t; - signal rst : std_logic := '1'; - signal clk : std_logic := '1'; - signal ce : std_logic := '0'; - signal int_in : std_logic := '0'; - signal int_ack : std_logic; - signal irom_data : unsigned (IMEM_DATA_WIDTH-1 downto 0) := (others => '-'); - signal irom_addr : unsigned (IMEM_ADDR_WIDTH-1 downto 0); - signal xmem_din : dmem_data_t := (others => '-'); - signal xmem_dout : dmem_data_t; - signal xmem_addr : unsigned (DMEM_DATA_WIDTH-1 downto 0); - signal xmem_we : std_logic; - signal xmem_re : std_logic; - signal io_sel : std_logic; - signal sram : sram_t(0 to 2**DMEM_DATA_WIDTH-1); - - type reg_t is record - revision : dmem_data_t; - testid : dmem_data_t; - interrupt : std_logic; - end record; - - signal reg : reg_t; - - -BEGIN - - int_in <= reg.interrupt; -uut: cpu - GENERIC MAP - ( - use_instr_register => false, - use_ctrl_rom => true - ) - PORT MAP( - rst => rst, - clk => clk, - ce => ce, - int_in => int_in, - int_ack => int_ack, - xmem_we => xmem_we, - xmem_re => xmem_re, - instr_din => irom_data, - instr_addr => irom_addr, - xmem_din => xmem_din, - xmem_dout => xmem_dout, - xmem_addr => xmem_addr, - io_sel => io_sel - ); - -the_irom: irom - PORT MAP( - clk => clk, - ce => ce, - addr => irom_addr, - dout => irom_data - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - -STIMULUS: process - file RESULT: text open write_mode is "../tools/opc.list"; - variable L: line; - - begin - - for i in 0 to instr_name_array'length-1 loop - fprint(RESULT, L,"%d %s\n", fo(i), instr_name_array(i)); - end loop; - - wait for 3*CLK_PERIOD; - rst <= '0'; - wait for 2*CLK_PERIOD; - - wait until rising_edge(clk); - ce <= '1'; - - assert false report "Test finished" severity error; - wait; - - end process; - -SRAM_RW: process(rst, clk) - begin - if (rst = '1') then - reg.revision <= (others => '0'); - reg.testid <= (others => '0'); - reg.interrupt <= '0'; - elsif rising_edge(clk) then - if int_ack = '1' then --- reg.interrupt <= '0'; - end if; - if xmem_we = '1' then - if io_sel = '0' then - sram(to_integer(xmem_addr)) <= xmem_dout; - else - case xmem_addr is - when X"00" => - reg.revision <= xmem_dout; - when X"01" => - reg.testid <= xmem_dout; - when X"02" => - reg.interrupt <= xmem_dout(0); - when others => null; - end case; - end if; - else - if io_sel = '0' then - xmem_din <= to_01(sram(to_integer(xmem_addr))); - else - case xmem_addr is - when X"00" => - xmem_din <= reg.revision; - when X"01" => - xmem_din <= reg.testid; - when others => - xmem_din <= X"BC"; - end case; - end if; - end if; - end if; - end process; - -END; diff --git a/lib/CPUs/JCpu/syn/ise91/cpu_vhdl.prj b/lib/CPUs/JCpu/syn/ise91/cpu_vhdl.prj deleted file mode 100644 index 18718bf..0000000 --- a/lib/CPUs/JCpu/syn/ise91/cpu_vhdl.prj +++ /dev/null @@ -1,10 +0,0 @@ -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\cpu_pkg.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\stack_ctrl.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\reg_dual.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\pc.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\int_ctrl.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\dpath_ctrl.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\chipreg.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\chipram.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\alu.vhd" -vhdl work "W:\vhdl\lib\CPUs\JCpu\src\core\cpu.vhd" diff --git a/lib/CPUs/JCpu/tools/eval_scan.rb b/lib/CPUs/JCpu/tools/eval_scan.rb deleted file mode 100644 index 0c38397..0000000 --- a/lib/CPUs/JCpu/tools/eval_scan.rb +++ /dev/null @@ -1,42 +0,0 @@ -#!/usr/bin/env ruby - -str1 = %Q!lbl: dc "Hallo", ", ", 0, 1, " der","Jens"! - -i=0; - -def get_stri_lit (str) - res = [""]; - state = "out" - - j = 0; - k = 0; - for i in (0..str.length-1) - c = str[i]; - nstate = state - case state - when "out" - if c == "\""[0] - nstate = "in" - end - when "in" - if c == "\""[0] - nstate = "out" - if j > 0 - k = k + 1; - res[k] = "" - end - else - res[k] = res[k] + format("%c", c); - j = j + 1; - end - end - state = nstate - end; - return res -end - -get_stri_lit(str1).each do |word| - puts word -end - - \ No newline at end of file diff --git a/lib/CPUs/JCpu/tools/insrom.rb b/lib/CPUs/JCpu/tools/insrom.rb deleted file mode 100644 index 6713f9f..0000000 --- a/lib/CPUs/JCpu/tools/insrom.rb +++ /dev/null @@ -1,46 +0,0 @@ -#!/usr/bin/env ruby - -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: Insertion of code fragments into templates -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -arg = $* -rom_filename = arg[0].to_s -tpl_filename = arg[1].to_s - -subst_pattern = "JASM_ROM_INSERT_HERE" - -# -------------------------------------------------------- -# Open file -# -------------------------------------------------------- -romfile = File.open(rom_filename, "r") -tplfile = File.open(tpl_filename, "r") -re = Regexp.new(subst_pattern) - -while (line = tplfile.gets) - puts line - line.scan(re).each do |word| - romfile.each do |raw_line| - puts raw_line - end - end -end diff --git a/lib/CPUs/JCpu/tools/irom.vhd.tpl b/lib/CPUs/JCpu/tools/irom.vhd.tpl deleted file mode 100644 index 5f11f86..0000000 --- a/lib/CPUs/JCpu/tools/irom.vhd.tpl +++ /dev/null @@ -1,32 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE - diff --git a/lib/CPUs/JCpu/tools/irom_ld.vhd.tpl b/lib/CPUs/JCpu/tools/irom_ld.vhd.tpl deleted file mode 100644 index eaa41f3..0000000 --- a/lib/CPUs/JCpu/tools/irom_ld.vhd.tpl +++ /dev/null @@ -1,151 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY irom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in inst_addr_t; - dout : out inst_t - ); - -END irom; - -ARCHITECTURE loadable OF irom IS - - -- JASM_ROM_INSERT_HERE - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : inst_addr_t; - signal jtag_ld_dout : inst_t; - signal jtag_ld_din : inst_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (31 downto 0); - constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); - jtag_ld_din <= user_regi(inst_t'length-1 downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= imem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/JCpu/tools/jasm.bak.rb b/lib/CPUs/JCpu/tools/jasm.bak.rb deleted file mode 100644 index 4c9feb0..0000000 --- a/lib/CPUs/JCpu/tools/jasm.bak.rb +++ /dev/null @@ -1,494 +0,0 @@ -#!/usr/bin/env ruby - -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: A small assembler for the JCPU - -# Copyright (C) 2007 J. Ahrensfeld - -# This library is free software; you can redistribute it and/or -# modify it under the terms of the GNU Lesser General Public -# License as published by the Free Software Foundation; either -# version 2.1 of the License, or (at your option) any later version. - -# This library is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# Lesser General Public License for more details. - -# You should have received a copy of the GNU Lesser General Public -# License along with this library; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - -# For questions and ideas, please contact the author at jens@jayfield.org - -# --------------------------------------------------------------------- - -arg = $* -MAX_SIZE_ROM = 1024 -PROJECT_NAME = arg.to_s.gsub(/\..*/, "") -ENTITY_NAME = "rom" -ENTITY_DATA_TYPE = "inst_t" -ENTITY_ADDR_TYPE = "inst_addr_t" -OPC_LIST_NAME = "/cygdrive/w/vhdl/lib/CPUs/JCpu/tools/opc.list" - -# -------------------------------------------------------- -# Open file -# -------------------------------------------------------- -filename = arg.to_s -if !File.exists?(filename) - STDERR.puts "#{filename} does not exist" - exit 1 -end - -# -------------------------------------------------------- -# Pass 1 -# -------------------------------------------------------- -lc = 0 # Line counter -pc = 0 # Program counter -chip_dc = [0,0,0,0] # chip data counter -xmem_dc = 0 # xmem data counter -curr_segment = "UNDEF"; -page = 0 - -label_list=[[],[]] -instr_list=[nil] -file = File.open(filename, "r") -file.each do |raw_line| - lc += 1 - - # Make all upper case - iline = "#{raw_line}".strip.upcase - - # Remove comments - iline = iline.gsub(/;.*/, "") - - # Split instruction at spaces - iline_member = iline.split(" ") - - if iline_member[0] == nil - next - end - - mc = 0; - label = nil - clean_line = nil - if (iline_member[0] =~ /\w+:/) - mc += 1 - label = iline_member[0].delete(":") - if label_list.rindex(label) != nil - STDERR.puts format("Error in line %d: Duplicate label \"%s\" found", lc, label) - exit 1 - end - end - - case iline_member[mc] - when nil - value = format("0x%3.3X",pc) - when "EQU" - if 0 == (iline_member[mc+1] =~ /\d+/) - value = format("0x%2.2X",eval(iline_member[mc+1..iline_member.nitems].to_s)) - else - value = iline_member[mc+1] - end - when "ORG", "CODE" - pc = eval(iline_member[mc+1..iline_member.nitems].to_s) - value = format("0x%3.3X",pc) - when "CDATA", "CMEM" - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: CDATA needs argument!", lc) - exit 1 - end - curr_segment = "CMEM"; - page = iline_member[mc+1].to_i(16) - when "XDATA", "XMEM" - curr_segment = "XMEM"; - when "DC" - len = 0; - iline.split("DC")[1].delete("0x").scan(/[0-9A-Fa-f]+/).each do |byte| - len += 1 - end - if curr_segment == "CMEM" - STDERR.puts format("Error in line %d: CDATA cannot be initialized!", lc) - exit 1 - else - value = format("0x%2.2X",xmem_dc) - puts format("Found DC defining %d bytes at 0x%4.4X in %s", len, xmem_dc, curr_segment); - xmem_dc += len - end - when "DB" - len = iline_member[mc+1].to_i - if curr_segment == "CMEM" - value = format("0x%2.2X",chip_dc[page]) - puts format("Found DB reserving %d bytes at 0x%4.4X in %s(%d)", len, chip_dc[page], curr_segment, page); - chip_dc[page] += len - else - value = format("0x%2.2X",xmem_dc) - puts format("Found DB reserving %d bytes at 0x%4.4X in %s", len, xmem_dc, curr_segment); - xmem_dc += len - end - else - op_line = iline_member[mc+1..iline_member.nitems].to_s - value = format("0x%3.3X",pc) - opc = iline_member[mc] - if iline_member[mc+1] != nil - op1 = op_line.gsub(/,+.*$/, "") - end - if iline_member[mc+2] != nil - op2 = op_line.scan(/,.+$/).to_s.delete(", ") - end - if instr_list[pc] == nil - instr_list[pc] = [lc, pc, opc , op1 , op2] - pc += 1 - else - STDERR.puts format("Error in line %d: Overlapping sections at %3.3X", lc, pc) - exit 1 - end - end; - - # Push labels - if label - label_list = label_list + [label, value] - end -end -file.close - -# -------------------------------------------------------- -def instr(opcode) - return format("\"%6.6B\" & X\"%3.3X\"",opcode ,0) -end - -def tcl_bits(pc, opcode) - return format("%10.10B%6.6B%12.12B",pc, opcode ,0) -end - -def instr_k(opcode, k) - return format("\"%6.6B\" & X\"%3.3X\"",opcode ,k) -end - -def tcl_bits_k(pc, opcode, k) - return format("%10.10B%6.6B%12.12B",pc, opcode ,k) -end - -def instr_r(opcode, r) - return format("\"%6.6B\" & X\"%2.2X%X\"",opcode ,0, r) -end - -def tcl_bits_r(pc, opcode, r) - return format("%10.10B%6.6B%8.8B%4.4B",pc, opcode ,0,r) -end - -def instr_kr(opcode, k, r) - return format("\"%6.6B\" & X\"%2.2X%X\"",opcode,k, r) -end - -def tcl_bits_kr(pc, opcode, k, r) - return format("%10.10B%6.6B%8.8B%4.4B",pc, opcode, k, r) -end - -def instr_rk(opcode, r, k) - return format("\"%6.6B\" & X\"%2.2X%X\"",opcode,k, r) -end - -def tcl_bits_rk(pc, opcode, r, k) - return format("%10.10B%6.6B%8.8B%4.4B",pc, opcode, k, r) -end - -def instr_rr(opcode, ra, rb) - return format("\"%6.6B\" & X\"%X%X%X\"",opcode,0, rb, ra) -end - -def tcl_bits_rr(pc, opcode, ra, rb) - return format("%10.10B%6.6B%4.4B%4.4B%4.4B",pc, opcode, 0, rb, ra) -end - -# -------------------------------------------------------- -# Read mnemonic set -# -------------------------------------------------------- -filename = OPC_LIST_NAME -if !File.exists?(filename) - STDERR.puts "#{filename} does not exist" - exit 1 -end - -mnemo_list = [] -num_opcodes = 0 -file = File.open(filename, "r") -file.each do |raw_line| - mnemo_list[num_opcodes] = raw_line.split(" ")[1] - num_opcodes += 1 -end - -# -------------------------------------------------------- -# Pass 2 -# -------------------------------------------------------- -pc = 0 -opc_start = 2 -num_errors = 0 -vhdl_trans_list = [nil] -vhdl_comment_list = [nil] -vhdl_tcl_list = [nil] -instr_list.each do |instruct| - - # puts instruct - if instruct == nil - vhdl_trans_list[pc] = format("\"%6.6B\" & X\"%3.3X\"",0 ,0) - vhdl_comment_list[pc] = format("0x%3.3X:", pc) - vhdl_tcl_list[pc] = tcl_bits(pc, 0) - pc += 1 - next - end - - # determine arglen of instruction - ilen = 0 - if instruct[opc_start+1] == nil - arglen = 0 - elsif instruct[opc_start+2] == nil - arglen = 1 - elsif instruct[opc_start+3] == nil - arglen = 2 - end - - # Symbol substitution - error = false - for i in (1..3) - subst_pos = opc_start+i - if instruct[subst_pos] == nil - next - end - expr_token = "" - expr_subst = nil - is_direct = true; - -# instruct[subst_pos] = instruct[subst_pos].delete(" ") - - # checks R0 .. R16, Mnemonics - instr_str = instruct[subst_pos] - if 0 == (instr_str =~ /\(.+\)/) - instr_str = instr_str.delete("()") - is_direct = false; - end - - expr_token = instr_str.split(/\+|\-|\*|\//)[0] - if (0 != (expr_token =~ /R[0-9]+/)) && (0 != (expr_token =~ /\d+/)) - idx = label_list.rindex(expr_token) - if idx != nil - expr_subst = label_list[idx+1] - instruct[subst_pos] = instruct[subst_pos].gsub(expr_token, expr_subst) - else - STDERR.puts format("Error in line %d: Symbol \"%s\" not found", instruct[0], expr_token) - error = true - end - end - - if expr_subst != nil - if 0 == (expr_subst =~ /\d+/) - if is_direct == true - instruct[subst_pos] = format("0x%2.2X", eval(instruct[subst_pos])) - else - instruct[subst_pos] = format("(0x%2.2X)", eval(instruct[subst_pos])) - end - else - if 0 != (expr_subst =~ /R[0-9]+/) - STDERR.puts format("Error in line %d: Invalid expression \"%s\"", instruct[0], expr_subst) - error = true - end - end - end - end - - # Parse operands - reg = [0,0] - kk = 0 - format = instruct[opc_start] - for i in (0..1) - if instruct[opc_start+i+1] =~ Regexp.new("R[0-9]+") - # Check indirect addressing - reg[i] = instruct[opc_start+i+1].delete("R()").to_i - format += "|R" - if reg[i] > 15 - STDERR.puts format("Error in line %d: Invalid register \"R%d\" specified", instruct[0], reg[i]) - error = true - end - else - if instruct[opc_start+i+1] =~ Regexp.new("[0-9A-F]+") - kk = instruct[opc_start+i+1].delete("()").to_i(16) - format += "|K" - end - end - if instruct[opc_start+i+1] =~ Regexp.new("\\(.+\\)") - format += "i"; - end - end - - # Output instruction - opcode = mnemo_list.rindex(format).to_i - mnemo = instruct[2]; - - case format - when "NOP", "HALT", "RET", "RETI" - vhdl_trans_list[pc] = instr(opcode) - vhdl_tcl_list[pc] = tcl_bits(pc, opcode) - minstr_comment = format("0x%3.3X: %s", pc, mnemo) - when "MOVC|R|Ri", "MOVX|R|Ri" - vhdl_trans_list[pc] = instr_rr(opcode, reg[0], reg[1]); - vhdl_tcl_list[pc] = tcl_bits_rr(pc, opcode, reg[0], reg[1]) - minstr_comment = format("0x%3.3X: %s R%2.2d, (R%2.2d)", pc, mnemo, reg[0], reg[1]) - when "MOV|R|R", "SUB|R|R", "ADD|R|R", "AND|R|R", "OR|R|R", "XOR|R|R", "CMP|R|R" - vhdl_trans_list[pc] = instr_rr(opcode, reg[0], reg[1]); - vhdl_tcl_list[pc] = tcl_bits_rr(pc, opcode, reg[0], reg[1]) - minstr_comment = format("0x%3.3X: %s R%2.2d, R%2.2d", pc, mnemo, reg[0], reg[1]) - when "MOVC|Ri|R", "MOVX|Ri|R" - vhdl_trans_list[pc] = instr_rr(opcode, reg[1], reg[0]); - vhdl_tcl_list[pc] = tcl_bits_rr(pc, opcode, reg[1], reg[0]) - minstr_comment = format("0x%3.3X: %s (R%2.2d), R%2.2d", pc, mnemo, reg[1], reg[0]) - when "MOVC|Ri|K", "MOVX|Ri|K", "COUT|Ri|K", "XOUT|Ri|K" - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - minstr_comment = format("0x%3.3X: %s (R%2.2d), 0x%2.2X", pc, mnemo, reg[0], kk) - when "MOVC|R|Ki", "MOVX|R|Ki", "CIN|R|Ki", "XIN|R|Ki" - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - minstr_comment = format("0x%3.3X: %s R%2.2d, (0x%2.2X)", pc, mnemo, reg[0], kk) - when "MOV|R|K", "SUB|R|K", "ADD|R|K", "AND|R|K", "OR|R|K", "XOR|R|K", "CMP|R|K" - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - minstr_comment = format("0x%3.3X: %s R%2.2d, 0x%2.2X", pc, mnemo, reg[0], kk) - when "MOVC|Ki|R", "MOVC|Ki|R", "MOVX|Ki|R", "MOVX|Ki|R", "COUT|Ki|R", "XOUT|Ki|R" - vhdl_trans_list[pc] = instr_kr(opcode, kk, reg[1]); - vhdl_tcl_list[pc] = tcl_bits_kr(pc, opcode, kk, reg[1]) - minstr_comment = format("0x%3.3X: %s (0x%2.2X), R%2.2d", pc, mnemo, kk, reg[1]) - when "CALL|K", "JMP|K", "JNZ|K", "JZ|K","JNC|K", "JC|K", "JLT|K", "JGT|K", "JLE|K", "JGE|K", "JEQ|K", "JNE|K" - vhdl_trans_list[pc] = instr_k(opcode, kk) - vhdl_tcl_list[pc] = tcl_bits_k(pc, opcode, kk) - minstr_comment = format("0x%3.3X: %s 0x%3.3X", pc, mnemo, kk) - when "PUSH|R", "POP|R", "SHR|R", "SHL|R", "ROR|R", "ROL|R", "RORC|R", "ROLC|R" - vhdl_trans_list[pc] = instr_r(opcode, reg[0]) - vhdl_tcl_list[pc] = tcl_bits_r(pc, opcode, reg[0]) - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - when "TST|R" - kk = 0 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("CMP|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "INC|R" - kk = 1 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("ADD|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "DEC|R" - kk = 1 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("SUB|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - else - STDERR.puts format("Error in line %d: Not yet implemented %s", instruct[0], format) - error = true - end - - if error - num_errors += 1 - break - end - vhdl_comment_list[pc] = minstr_comment - - puts vhdl_trans_list[pc] + " -- " + minstr_comment - - pc += 1 -end - -# -------------------------------------------------------- -# Output ROM file -# -------------------------------------------------------- -if num_errors == 0 - - filename = format("rom_%s.vhdl.snip", PROJECT_NAME) - file = File.open(filename, "w") - - file.puts format("ENTITY %s IS\n", ENTITY_NAME) - file.puts format("\tPort (\n") - file.puts format("\tclk\t\t\t: in STD_LOGIC;\n") - file.puts format("\tce\t\t\t: in STD_LOGIC;\n") - file.puts format("\taddr\t\t: in %s;\n", ENTITY_ADDR_TYPE) - file.puts format("\tdout\t\t: out %s\n", ENTITY_DATA_TYPE) - file.puts format("\t);\n") - file.puts format("END %s;\n", ENTITY_NAME) - file.puts format("\n") - file.puts format("ARCHITECTURE %s OF %s IS \n", PROJECT_NAME, ENTITY_NAME) - file.puts format("\n") - file.puts format("\ttype instruction_rom_t is array (0 to %d) of %s;\n", pc-1, ENTITY_DATA_TYPE) - file.puts format("\n") - file.puts format("\tconstant instruction_rom : instruction_rom_t :=\n") - file.puts format("\t(\n"); - for i in (0..pc-2) - file.puts "\t\t" + vhdl_trans_list[i] + ", -- " + vhdl_comment_list[i] + "\n" - end; - file.puts "\t\t" + vhdl_trans_list[pc-1] + " -- " + vhdl_comment_list[pc-1] + "\n" - file.puts format("\t);\n") - file.puts format("\n") - file.puts format("begin") - file.puts format("\n") - file.puts format("PROM_READ:") - file.puts format("\tprocess(clk, ce)\n") - file.puts format("\tbegin\n") - file.puts format("\t\tif rising_edge(clk) and ce = '1' then\n") - file.puts format("\t\t\tdout <= instruction_rom(to_integer(addr));\n") - file.puts format("\t\tend if;\n") - file.puts format("\tend process;\n") - file.puts format("\n") - file.puts format("end %s;\n", PROJECT_NAME) - puts format("ROM file written to \"%s\"\n",filename) - file.close -end -if num_errors == 0 - - filename = format("preinit_%s.vhdl.snip", PROJECT_NAME) - file = File.open(filename, "w") - - file.puts format("\tsignal instruction_rom : instruction_rom_t :=\n") - file.puts format("\t(\n"); - for i in (0..pc-2) - file.puts "\t\t" + vhdl_trans_list[i] + ", -- " + vhdl_comment_list[i] + "\n" - end; - if pc < (MAX_SIZE_ROM-1) - file.puts "\t\t" + vhdl_trans_list[pc-1] + ", -- " + vhdl_comment_list[pc-1] + "\n" - for i in (pc..(MAX_SIZE_ROM-2)) - file.puts "\t\t" + instr(0) + ",\n" - end; - file.puts "\t\t" + instr(0) + "\n" - else - file.puts "\t\t" + vhdl_trans_list[pc-1] + " -- " + vhdl_comment_list[pc-1] + "\n" - end - file.puts format("\t);\n") - puts format("PREINIT file written to \"%s\"\n",filename) - file.close -end -if num_errors == 0 - filename = format("rom_%s.tcl.snip", PROJECT_NAME) - file = File.open(filename, "w") - for i in (0..pc-1) - # Chipscope 8.1 -# file.puts format("jtag_shiftdr $handle -buffer \"%s\" -endstate RTI -device $devid", vhdl_tcl_list[i].reverse); - - # Chipscope 9.1 - file.puts format("\# %s", vhdl_comment_list[i]) - file.puts format("::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 %d \"%8.8X\"\n\n", vhdl_tcl_list[i].length, vhdl_tcl_list[i].to_i(2)); - end; - puts format("TCL snippet written to \"%s\"\n",filename) - file.close -end - -# -------------------------------------------------------- -# Output final statistics -# -------------------------------------------------------- -if num_errors == 0 - puts "Program uses #{pc} instruction addresses" - puts "No errors found" - exit 0 -else - puts "#{num_errors} errors found" - exit 1 -end diff --git a/lib/CPUs/JCpu/tools/jasm.rb b/lib/CPUs/JCpu/tools/jasm.rb deleted file mode 100644 index fdad0bb..0000000 --- a/lib/CPUs/JCpu/tools/jasm.rb +++ /dev/null @@ -1,814 +0,0 @@ -#!/usr/bin/env ruby - -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: A small assembler for the JCPU -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -arg = $* -FILE_SUFFIX = "jsm" -IROM_MAX_SIZE = 1024 -IROM_ENTITY_NAME = "irom" -IROM_DATA_TYPE = "inst_t" -IROM_ADDR_TYPE = "inst_addr_t" -XROM_MAX_SIZE = 256 -XROM_DATA_TYPE = "dmem_data_t" -XROM_ADDR_TYPE = "dmem_addr_t" -XROM_ENTITY_NAME = "xrom" -OPC_LIST_NAME = "/cygdrive/w/vhdl/lib/CPUs/JCpu/tools/opc.list" - -# -------------------------------------------------------- -class Parser - def curr_segment - @curr_segment - end - def curr_segment=(arg) - @curr_segment=arg - end - def add_label(labelname, addr) - @label_list = @label_list + [labelname, addr] - end - def getLabelIdByName(label) - return @label_list.rindex(label) - end - def getLabelNameById(id) - return @label_list[id] - end - def put_instr(name, lc, opc , op1 , op2) - if get_instr != nil - STDERR.puts format("Error in line %d: Overlapping sections at %3.3X", lc, @pc) - exit 1 - end - @instr_list[@pc] = [lc, @pc, opc , op1 , op2, name] - end - def get_instr - return @instr_list[@pc] - end - def put_xmem(value, lc) - if get_xmem != nil - STDERR.puts format("Error in line %d: Overlapping sections at %3.3X (%s)", lc, xmem_dc, curr_segment) - exit 1 - end - @xmem[xmem_dc] = value - @xmem_dc = xmem_dc + 1 - end - def get_xmem - return @xmem[xmem_dc] - end - def xmem - return @xmem - end - def put_cmem(value, lc) - if get_cmem(page) != nil - STDERR.puts format("Error in line %d: Overlapping sections at %3.3X (%s)", lc, cmem_dc, curr_segment) - exit 1 - end - @cmem[page][cmem_dc] = value - @cmem_dc[page] = cmem_dc + 1 - end - def get_cmem(pg) - return @cmem[pg][cmem_dc] - end - def cmem(page) - return @cmem[page] - end - def cmem_dc=(addr) - @cmem_dc[page] = addr - end - def cmem_dc - @cmem_dc[page] - end - def xmem_dc=(addr) - @xmem_dc = addr - end - def xmem_dc - @xmem_dc - end - def page=(page) - @page = page; - end - def page - @page; - end - def pc=(pc) - @pc = pc; - if (pc > @pc_max) - @pc_max = pc - end - end - def pc - @pc; - end - def pc_max - @pc_max; - end - def instr_list - @instr_list - end - def label_list - @label_list - end - - def initialize() - @pc_max = 0 - @pc = 0 # Program counter - @cmem_dc = [0,0,0,0] # chip data counter - @xmem_dc = 0 # xmem data counter - @curr_segment = "UNDEF"; - @page = 0 - @label_list=[[],[]] - @instr_list=[nil] - @cmem = [[],[]]; - @xmem = []; - end - def method_missing(name, *args) - puts "I don't know the method #{name}" - end -end - -# -------------------------------------------------------- -def parse(name, obj) - -lc = 0 # Line counter -file = File.open(name, "r") - -file.each do |raw_line| - lc += 1 - - # Make all upper case - iline = "#{raw_line}".strip - - # Remove comments - iline = iline.gsub(/;.*/, "") - - # Split instruction at spaces - iline_member = iline.split(" ") - - if iline_member[0] == nil - next - end - - mc = 0; - label = nil - clean_line = nil - if (iline_member[0] =~ /\w+:/) - mc += 1 - label = iline_member[0].delete(":") - if obj.getLabelIdByName(label) != nil - STDERR.puts format("Error in line %d: Duplicate label \"%s\" found", lc, label) - exit 1 - end - end - - token = iline_member[mc] - if token - token = token.upcase - end - - case token - when nil - if obj.curr_segment == "CMEM" - curr_addr = format("0x%3.3X",obj.cmem_dc) - elsif obj.curr_segment == "XMEM" - curr_addr = format("0x%3.3X",obj.xmem_dc) - elsif obj.curr_segment == "CODE" - curr_addr = format("0x%3.3X",obj.pc) - else - STDERR.puts format("Error in line %d: Undefined segment", lc) - exit 1 - end - when "INCLUDE" - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: %s needs argument!", lc, token) - exit 1 - end - inc_name = iline_member[mc+1].delete("\"") - puts format("Inserting \"%s\" into \"%s\" at line %d", inc_name, name, lc); - parse(inc_name, obj) - when "EQU" - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: %s needs argument!", lc, token) - exit 1 - end - if 0 == (iline_member[mc+1] =~ /\d+/) - curr_addr = format("0x%2.2X",eval(iline_member[mc+1..iline_member.nitems].to_s)) - else - curr_addr = iline_member[mc+1] - end - when "ORG" - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: %s needs argument!", lc, token) - exit 1 - end - offset = eval(iline_member[mc+1..iline_member.nitems].to_s) - case obj.curr_segment - when "CODE" - obj.pc = offset - curr_addr = format("0x%3.3X",obj.pc) - when "CMEM" - obj.cmem_dc = offset - when "XMEM" - obj.xmem_dc = offset - - end - when "CODE" - curr_addr = format("0x%3.3X",obj.pc) - obj.curr_segment = "CODE"; - when "CDATA", "CMEM" - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: %s needs argument!", lc, token) - exit 1 - end - obj.curr_segment = "CMEM"; - obj.page = iline_member[mc+1].to_i(16) - when "XDATA", "XMEM" - obj.curr_segment = "XMEM"; - when "DC" - len = 0; - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: %s needs argument!", lc, token) - exit 1 - end - if obj.curr_segment == "CMEM" - STDERR.puts format("Error in line %d: %s cannot be initialized!", lc, obj.curr_segment) - exit 1 - elsif obj.curr_segment == "XMEM" - curr_addr = format("0x%2.2X",obj.xmem_dc) - dc_old = obj.xmem_dc; - val_array = raw_line.split(/dc|DC|Dc|dC/)[1].delete("\t").gsub(/;.*/, "").split(",") - - # Parse string literals - val_array.each do |item| - if 0 == (item =~ /.*\".*\"/) - str = item.delete("\"") - puts item - for nn in (0..str.length-1) - if str[nn] > 31 - obj.put_xmem(str[nn], lc); - puts "S: " + str[nn].to_s - len += 1 - end - end; - else - argument = item - puts "B: " + argument - obj.put_xmem(eval(argument), lc); - len += 1 - end - end - puts format("Found DC defining %d bytes at 0x%4.4X in %s", len, dc_old, obj.curr_segment); - else - STDERR.puts format("Error in line %d: Invalid segment %s for \"%s\"", lc, obj.curr_segment, token) - exit 1 - end - when "DB" - if iline_member[mc+1] == nil - STDERR.puts format("Error in line %d: %s needs argument!", lc, token) - exit 1 - end - len = eval(iline_member[mc+1]).to_i - if obj.curr_segment == "CMEM" - curr_addr = format("0x%2.2X",obj.cmem_dc) - puts format("Found DB reserving %d bytes at 0x%4.4X in %s(%d)", len, obj.cmem_dc, obj.curr_segment, obj.page); - for nn in (1..len) - obj.put_cmem(0, lc) - end - elsif obj.curr_segment == "XMEM" - curr_addr = format("0x%2.2X",obj.xmem_dc) - puts format("Found DB reserving %d bytes at 0x%4.4X in %s", len, obj.xmem_dc, obj.curr_segment); - for nn in (1..len) - obj.put_xmem(0, lc) - end - else - STDERR.puts format("Error in line %d: Invalid segment %s for \"%s\"", lc, obj.curr_segment, token) - exit 1 - end - else - if obj.curr_segment != "CODE" - STDERR.puts format("Error in line %d: Invalid segment %s for \"%s\"", lc, obj.curr_segment, token) - exit 1 - end - - op_line = iline_member[mc+1..iline_member.nitems].to_s - curr_addr = format("0x%3.3X",obj.pc) - opc = token - if iline_member[mc+1] != nil - op1 = op_line.gsub(/,+.*$/, "") - end - if iline_member[mc+2] != nil - op2 = op_line.scan(/,.+$/).to_s.delete(", ") - end - obj.put_instr(name, lc, opc, op1, op2) - obj.pc = obj.pc + 1 - end; - - # Push labels - if label - obj.add_label(label, curr_addr) - end -end -file.close -return obj -end - -# -------------------------------------------------------- -# Instruction formatting -# -------------------------------------------------------- -def instr(opcode) - return format("\"%6.6B\" & X\"%3.3X\"",opcode ,0) -end - -def tcl_bits(pc, opcode) - return format("%12.12B%8.8B%12.12B",pc, opcode ,0) -end - -def instr_k(opcode, k) - return format("\"%6.6B\" & X\"%3.3X\"",opcode ,k) -end - -def tcl_bits_k(pc, opcode, k) - return format("%12.12B%8.8B%12.12B",pc, opcode ,k) -end - -def instr_r(opcode, r) - return format("\"%6.6B\" & X\"%2.2X%X\"",opcode ,0, r) -end - -def tcl_bits_r(pc, opcode, r) - return format("%12.12B%8.8B%8.8B%4.4B",pc, opcode ,0,r) -end - -def instr_kr(opcode, k, r) - return format("\"%6.6B\" & X\"%2.2X%X\"",opcode,k, r) -end - -def tcl_bits_kr(pc, opcode, k, r) - return format("%12.12B%8.8B%8.8B%4.4B",pc, opcode, k, r) -end - -def instr_rk(opcode, r, k) - return format("\"%6.6B\" & X\"%2.2X%X\"",opcode,k, r) -end - -def tcl_bits_rk(pc, opcode, r, k) - return format("%12.12B%8.8B%8.8B%4.4B",pc, opcode, k, r) -end - -def instr_rr(opcode, ra, rb) - return format("\"%6.6B\" & X\"%X%X%X\"",opcode,0, rb, ra) -end - -def tcl_bits_rr(pc, opcode, ra, rb) - return format("%12.12B%8.8B%4.4B%4.4B%4.4B",pc, opcode, 0, rb, ra) -end - -# -------------------------------------------------------- -# Open file -# -------------------------------------------------------- -filename = arg.to_s -if !File.exists?(filename) - STDERR.puts "#{filename} does not exist" - exit 1 -end -PROJECT_NAME = File.basename(filename, "." + FILE_SUFFIX) - -# -------------------------------------------------------- -# Pass 1 -# -------------------------------------------------------- -first_pass = Parser.new(); -parse(filename, first_pass) - -# -------------------------------------------------------- -# Read mnemonic set -# -------------------------------------------------------- -filename = OPC_LIST_NAME -if !File.exists?(filename) - STDERR.puts "#{filename} does not exist" - exit 1 -end - -mnemo_list = [] -num_opcodes = 0 -file = File.open(filename, "r") -file.each do |raw_line| - mnemo_list[num_opcodes] = raw_line.split(" ")[1] - num_opcodes += 1 -end - -# -------------------------------------------------------- -# Pass 2 -# -------------------------------------------------------- -pc = 0 -opc_start = 2 -num_errors = 0 -vhdl_trans_list = [nil] -vhdl_comment_list = [nil] -vhdl_tcl_list = [nil] - -# ToDo: Use class-methods -label_list = first_pass.label_list -instr_list = first_pass.instr_list - -instr_list.each do |instruct| - - # puts instruct - if instruct == nil - vhdl_trans_list[pc] = format("\"%6.6B\" & X\"%3.3X\"",0 ,0) - vhdl_comment_list[pc] = format("0x%3.3X:", pc) - vhdl_tcl_list[pc] = tcl_bits(pc, 0) - pc += 1 - next - end - - # determine arglen of instruction - ilen = 0 - if instruct[opc_start+1] == nil - arglen = 0 - elsif instruct[opc_start+2] == nil - arglen = 1 - elsif instruct[opc_start+3] == nil - arglen = 2 - end - - # Symbol substitution - error = false - for i in (1..2) - subst_pos = opc_start+i - if instruct[subst_pos] == nil - next - end - expr_token = "" - expr_subst = nil - is_direct = true; - - # checks R0 .. R16, Mnemonics - instruct[subst_pos] = instruct[subst_pos].gsub(/'low/, "") - if (nil != (instruct[subst_pos] =~ /'high/)) - instruct[subst_pos]= format("%s/256", instruct[subst_pos].gsub(/'high/, "")) - end - instr_str = instruct[subst_pos] - if 0 == (instr_str =~ /\(.+\)/) - instr_str = instr_str.delete("()") - is_direct = false; - end - - expr_token = instr_str.split(/\+|\-|\*|\/|\||\&/)[0] - if (0 != (expr_token =~ /R[0-9]+/)) && (0 != (expr_token =~ /\d+/)) - idx = label_list.rindex(expr_token) - if idx != nil - expr_subst = label_list[idx+1] - instruct[subst_pos] = instruct[subst_pos].gsub(expr_token, expr_subst) - else - STDERR.puts format("%s: Error in line %d: Symbol \"%s\" not found", instruct[5], instruct[0], expr_token) - error = true - end - end - - if expr_subst != nil - if 0 == (expr_subst =~ /\d+/) - if is_direct == true - instruct[subst_pos] = format("0x%2.2X", eval(instruct[subst_pos])) - else - instruct[subst_pos] = format("(0x%2.2X)", eval(instruct[subst_pos])) - end - else - if 0 != (expr_subst =~ /R[0-9]+/) - STDERR.puts format("%s: Error in line %d: Invalid expression \"%s\"", instruct[5], instruct[0], expr_subst) - error = true - end - end - end - end - - # Parse operands - reg = [0,0] - kk = 0 - format = instruct[opc_start] - for i in (0..1) - if instruct[opc_start+i+1] =~ Regexp.new("R[0-9]+") - # Check indirect addressing - reg[i] = instruct[opc_start+i+1].delete("R()").to_i - format += "|R" - if reg[i] > 15 - STDERR.puts format("%s: Error in line %d: Invalid register \"R%d\" specified", instruct[5], instruct[0], reg[i]) - error = true - end - else - if instruct[opc_start+i+1] =~ Regexp.new("[0-9A-F]+") - kk = eval(instruct[opc_start+i+1].delete("()")) - format += "|K" - end - end - if instruct[opc_start+i+1] =~ Regexp.new("\\(.+\\)") - format += "i"; - end - end - - if error - num_errors += 1 - break - end - - # Output instruction - opcode = mnemo_list.rindex(format).to_i - mnemo = instruct[2]; - - case format - # Native instructions - when "NOP", "HALT", "RET", "RETI", "SETC" - vhdl_trans_list[pc] = instr(opcode) - vhdl_tcl_list[pc] = tcl_bits(pc, opcode) - minstr_comment = format("0x%3.3X: %s", pc, mnemo) - when "MOVC|R|Ri", "MOVX|R|Ri" - vhdl_trans_list[pc] = instr_rr(opcode, reg[0], reg[1]); - vhdl_tcl_list[pc] = tcl_bits_rr(pc, opcode, reg[0], reg[1]) - minstr_comment = format("0x%3.3X: %s R%2.2d, (R%2.2d)", pc, mnemo, reg[0], reg[1]) - when "MOV|R|R", "SUB|R|R", "SUBC|R|R", "ADD|R|R", "ADDC|R|R", "AND|R|R", "OR|R|R", "XOR|R|R", "CMP|R|R" - vhdl_trans_list[pc] = instr_rr(opcode, reg[0], reg[1]); - vhdl_tcl_list[pc] = tcl_bits_rr(pc, opcode, reg[0], reg[1]) - minstr_comment = format("0x%3.3X: %s R%2.2d, R%2.2d", pc, mnemo, reg[0], reg[1]) - when "MOVC|Ri|R", "MOVX|Ri|R" - vhdl_trans_list[pc] = instr_rr(opcode, reg[1], reg[0]); - vhdl_tcl_list[pc] = tcl_bits_rr(pc, opcode, reg[1], reg[0]) - minstr_comment = format("0x%3.3X: %s (R%2.2d), R%2.2d", pc, mnemo, reg[1], reg[0]) - when "MOVC|Ri|K", "MOVX|Ri|K", "COUT|Ri|K", "XOUT|Ri|K" - kk = kk % 256; - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - minstr_comment = format("0x%3.3X: %s (R%2.2d), 0x%2.2X", pc, mnemo, reg[0], kk) - when "MOVC|R|Ki", "MOVX|R|Ki", "CIN|R|Ki", "XIN|R|Ki" - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - minstr_comment = format("0x%3.3X: %s R%2.2d, (0x%2.2X)", pc, mnemo, reg[0], kk) - when "MOV|R|K", "SUB|R|K", "SUBC|R|K", "ADD|R|K", "ADDC|R|K", "AND|R|K", "OR|R|K", "XOR|R|K", "CMP|R|K" - kk = kk % 256; - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - minstr_comment = format("0x%3.3X: %s R%2.2d, 0x%2.2X", pc, mnemo, reg[0], kk) - when "SUB|K|R", "SUBC|K|R" - kk = kk % 256; - vhdl_trans_list[pc] = instr_kr(opcode, kk, reg[1]); - vhdl_tcl_list[pc] = tcl_bits_kr(pc, opcode, kk, reg[1]) - minstr_comment = format("0x%3.3X: %s 0x%2.2d, R%2.2X", pc, mnemo, kk, reg[1]) - when "MOVC|Ki|R", "MOVC|Ki|R", "MOVX|Ki|R", "MOVX|Ki|R", "COUT|Ki|R", "XOUT|Ki|R" - vhdl_trans_list[pc] = instr_kr(opcode, kk, reg[1]); - vhdl_tcl_list[pc] = tcl_bits_kr(pc, opcode, kk, reg[1]) - minstr_comment = format("0x%3.3X: %s (0x%2.2X), R%2.2d", pc, mnemo, kk, reg[1]) - when "CALL|K", "JMP|K", "JNZ|K", "JZ|K","JNC|K", "JC|K", "JLT|K", "JGT|K", "JLE|K", "JGE|K", "JEQ|K", "JNE|K" - vhdl_trans_list[pc] = instr_k(opcode, kk) - vhdl_tcl_list[pc] = tcl_bits_k(pc, opcode, kk) - minstr_comment = format("0x%3.3X: %s 0x%3.3X", pc, mnemo, kk) - when "PUSH|R", "POP|R", "SHR|R", "SHL|R", "ROR|R", "ROL|R", "RORC|R", "ROLC|R", "SWAP|R" - vhdl_trans_list[pc] = instr_r(opcode, reg[0]) - vhdl_tcl_list[pc] = tcl_bits_r(pc, opcode, reg[0]) - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - # Synthetic instructions - when "CLRC" - kk = 0; - minstr_comment = format("0x%3.3X: %s", pc, mnemo) - opcode = mnemo_list.rindex("SUB|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "TST|R" - kk = 0 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("CMP|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "NEG|R" - kk = 0 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("SUB|K|R").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "NOT|R" - kk = 0 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("XOR|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "INC|R" - kk = 1 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("ADD|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - when "DEC|R" - kk = 1 - minstr_comment = format("0x%3.3X: %s R%2.2d", pc, mnemo, reg[0]) - opcode = mnemo_list.rindex("SUB|R|K").to_i - vhdl_trans_list[pc] = instr_rk(opcode, reg[0], kk); - vhdl_tcl_list[pc] = tcl_bits_rk(pc, opcode, reg[0], kk) - else - STDERR.puts format("%s: Error in line %d: Not yet implemented %s", instruct[5], instruct[0], format) - error = true - end - - if error - num_errors += 1 - break - end - - vhdl_comment_list[pc] = minstr_comment - - puts vhdl_trans_list[pc] + " -- " + minstr_comment - - pc += 1 -end - -# -------------------------------------------------------- -# Output ROM file -# -------------------------------------------------------- -if num_errors == 0 - - # I-ROM VHDL-ROM - filename = format("%s.irom.vhdl.snip", PROJECT_NAME) - file = File.open(filename, "w") - - file.puts format("ENTITY %s IS\n", IROM_ENTITY_NAME) - file.puts format("\tPort (\n") - file.puts format("\tclk\t\t\t: in STD_LOGIC;\n") - file.puts format("\tce\t\t\t: in STD_LOGIC;\n") - file.puts format("\taddr\t\t: in %s;\n", IROM_ADDR_TYPE) - file.puts format("\tdout\t\t: out %s\n", IROM_DATA_TYPE) - file.puts format("\t);\n") - file.puts format("END %s;\n", IROM_ENTITY_NAME) - file.puts format("\n") - file.puts format("ARCHITECTURE %s OF %s IS \n", PROJECT_NAME, IROM_ENTITY_NAME) - file.puts format("\n") - file.puts format("\ttype imem_rom_t is array (0 to %d) of %s;\n", [IROM_MAX_SIZE, pc].min-1 , IROM_DATA_TYPE) - file.puts format("\n") - file.puts format("\t-- Assembled from %s.%s", PROJECT_NAME, FILE_SUFFIX) - file.puts format("\tconstant imem_rom : imem_rom_t :=\n") - file.puts format("\t(\n"); - for i in (0..[IROM_MAX_SIZE, pc].min-2) - file.puts "\t\t" + vhdl_trans_list[i] + ", -- " + vhdl_comment_list[i] + "\n" - end; - file.puts "\t\t" + vhdl_trans_list[pc-1] + " -- " + vhdl_comment_list[pc-1] + "\n" - file.puts format("\t);\n") - file.puts format("\n") - file.puts format("begin") - file.puts format("\n") - file.puts format("PROM_READ:") - file.puts format("\tprocess(clk, ce)\n") - file.puts format("\tbegin\n") - file.puts format("\t\tif rising_edge(clk) and ce = '1' then\n") - file.puts format("\t\t\tdout <= imem_rom(to_integer(addr));\n") - file.puts format("\t\tend if;\n") - file.puts format("\tend process;\n") - file.puts format("\n") - file.puts format("end %s;\n", PROJECT_NAME) - puts format("I-ROM file written to \"%s\"\n",filename) - file.close - - # I-ROM VHDL-ROM (loadable) - filename = format("%s.irom_ld.vhdl.snip", PROJECT_NAME) - file = File.open(filename, "w") - - file.puts format("\n\t-- Assembled from %s.%s", PROJECT_NAME, FILE_SUFFIX) - file.puts format("\ttype imem_rom_t is array (0 to %d) of %s;\n", IROM_MAX_SIZE-1, IROM_DATA_TYPE) - file.puts format("\tsignal imem_rom : imem_rom_t :=\n") - file.puts format("\t(\n"); - for i in (0..pc-2) - file.puts "\t\t" + vhdl_trans_list[i] + ", -- " + vhdl_comment_list[i] + "\n" - end; - if pc < (IROM_MAX_SIZE-1) - file.puts "\t\t" + vhdl_trans_list[pc-1] + ", -- " + vhdl_comment_list[pc-1] + "\n" - for i in (pc..(IROM_MAX_SIZE-2)) - file.puts "\t\t" + instr(0) + ",\n" - end; - file.puts "\t\t" + instr(0) + "\n" - else - file.puts "\t\t" + vhdl_trans_list[pc-1] + " -- " + vhdl_comment_list[pc-1] + "\n" - end - file.puts format("\t);\n") - puts format("I-ROM (loadable) file written to \"%s\"\n",filename) - file.close - - # I-ROM TCL-Loader - filename = format("%s.irom.tcl.snip", PROJECT_NAME) - file = File.open(filename, "w") - file.puts format("# Assembled from %s.%s", PROJECT_NAME, FILE_SUFFIX) - file.puts format("# ---------------------------------------------------------------"); - file.puts format("# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA"); - file.puts format("# User 1") - file.puts format("set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength \"3C2\"]\n\n") - for i in (0..pc-1) - # Chipscope 8.1 -# file.puts format("jtag_shiftdr $handle -buffer \"%s\" -endstate RTI -device $devid", vhdl_tcl_list[i].reverse); - - # Chipscope 9.1 - file.puts format("\# %s", vhdl_comment_list[i]) - file.puts format("::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 %d \"%8.8X\"\n\n", vhdl_tcl_list[i].length, vhdl_tcl_list[i].to_i(2)); - end; - puts format("I-ROM TCL-loader written to \"%s\"\n",filename) - file.close - - # X-ROM VHDL-ROM - filename = format("%s.xrom.vhdl.snip", PROJECT_NAME) - file = File.open(filename, "w") - - file.puts format("ENTITY %s IS\n", XROM_ENTITY_NAME) - file.puts format("\tPort (\n") - file.puts format("\tclk\t\t\t: in STD_LOGIC;\n") - file.puts format("\tce\t\t\t: in STD_LOGIC;\n") - file.puts format("\taddr\t\t: in %s;\n", XROM_ADDR_TYPE) - file.puts format("\tdout\t\t: out %s\n", XROM_DATA_TYPE) - file.puts format("\t);\n") - file.puts format("END %s;\n", XROM_ENTITY_NAME) - file.puts format("\n") - file.puts format("ARCHITECTURE %s OF %s IS \n", PROJECT_NAME, XROM_ENTITY_NAME) - file.puts format("\n") - file.puts format("\ttype xmem_rom_t is array (0 to %d) of %s;\n", XROM_MAX_SIZE-1, XROM_DATA_TYPE) - file.puts format("\n") - file.puts format("\t-- Assembled from %s.%s", PROJECT_NAME, FILE_SUFFIX) - file.puts format("\tconstant xmem_rom : xmem_rom_t :=\n") - file.puts format("\t(\n"); - for i in (0..XROM_MAX_SIZE-2) - file.puts format("\t\tX\"%2.2X\", -- 0x%2.2X\n", first_pass.xmem[i], i) - end; - i = XROM_MAX_SIZE-1 - file.puts format("\t\tX\"%2.2X\" -- 0x%2.2X\n", first_pass.xmem[i], i) - file.puts format("\t);\n") - file.puts format("\n") - file.puts format("begin") - file.puts format("\n") - file.puts format("PROM_READ:") - file.puts format("\tprocess(clk, ce)\n") - file.puts format("\tbegin\n") - file.puts format("\t\tif rising_edge(clk) and ce = '1' then\n") - file.puts format("\t\t\tdout <= xmem_rom(to_integer(addr));\n") - file.puts format("\t\tend if;\n") - file.puts format("\tend process;\n") - file.puts format("\n") - file.puts format("end %s;\n", PROJECT_NAME) - puts format("X-ROM file written to \"%s\"\n",filename) - file.close - - # X-ROM VHDL-ROM (loadable) - filename = format("%s.xrom_ld.vhdl.snip", PROJECT_NAME) - file = File.open(filename, "w") - - file.puts format("\n\t-- Assembled from %s.%s", PROJECT_NAME, FILE_SUFFIX) - file.puts format("\ttype xmem_rom_t is array (0 to %d) of %s;\n", XROM_MAX_SIZE-1, XROM_DATA_TYPE) - file.puts format("\tsignal xmem_rom : xmem_rom_t :=\n") - file.puts format("\t(\n"); - for i in (0..XROM_MAX_SIZE-2) - file.puts format("\t\tX\"%2.2X\", -- 0x%2.2X\n", first_pass.xmem[i], i) - end; - i = XROM_MAX_SIZE-1 - file.puts format("\t\tX\"%2.2X\" -- 0x%2.2X\n", first_pass.xmem[i], i) - file.puts format("\t);\n") - puts format("X-ROM (loadable) file written to \"%s\"\n",filename) - file.close - - # X-ROM TCL-Loader - filename = format("%s.xrom.tcl.snip", PROJECT_NAME) - file = File.open(filename, "w") - file.puts format("# Assembled from %s.%s", PROJECT_NAME, FILE_SUFFIX) - file.puts format("# ---------------------------------------------------------------"); - file.puts format("# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA"); - file.puts format("# User 2") - file.puts format("set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength \"3C3\"]\n\n") - for i in (0..first_pass.xmem.length-1) - # Chipscope 8.1 -# file.puts format("jtag_shiftdr $handle -buffer \"%s\" -endstate RTI -device $devid", vhdl_tcl_list[i].reverse); - - # Chipscope 9.1 - file.puts format("::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 %d \"%2.2X%2.2X\"\n", 16, i, first_pass.xmem[i]); - end; - puts format("X-ROM TCL-loader written to \"%s\"\n",filename) - file.close - -end - -# -------------------------------------------------------- -# Output final statistics -# -------------------------------------------------------- -if num_errors == 0 - puts "Program uses #{first_pass.pc_max} instruction addresses" - puts "No errors found" - exit 0 -else - puts "#{num_errors} errors found" - exit 1 -end - diff --git a/lib/CPUs/JCpu/tools/lib/cg.inc.jsm b/lib/CPUs/JCpu/tools/lib/cg.inc.jsm deleted file mode 100644 index 01c36c4..0000000 --- a/lib/CPUs/JCpu/tools/lib/cg.inc.jsm +++ /dev/null @@ -1,72 +0,0 @@ -; ------------------------------------------------- -; lcd.inc.jsm -; ------------------------------------------------- -; needs xio-address equates for -; reg_cg_char_addr: equ 0xXX ; RW -; reg_cg_line_addr: equ 0xXX ; RW -; reg_cg_data: equ 0xXX ; RW -; reg_cg_ctrl: equ 0xXX ; WO - -; needs delay.inc.jsm - -; ------------------------------------------------- -cg_clr_line: push R0 - mov R0, 2 - xout (reg_cg_ctrl), R0 - pop R0 - ret - -; ------------------------------------------------- -cg_clr_screen: push R0 - mov R0, 1 - xout (reg_cg_ctrl), R0 - pop R0 - ret - -; ------------------------------------------------- -; R0 : char address -; R1 : line address -cg_set_addr: call cg_wait_rdy - xout (reg_cg_line_addr), R1 - xout (reg_cg_char_addr), R0 - ret - -; ------------------------------------------------- -; R0 : character -cg_putchar: call cg_wait_rdy - xout (reg_cg_data), R0 - ret - -; ------------------------------------------------- -; R1 : ptr to string -cg_puts: push R0 -cg_p_lp: movx R0, (R1) - inc R1 - tst R0 - jz ex_cgp - call cg_putchar - jmp cg_p_lp -ex_cgp: pop R0 - ret - -; ------------------------------------------------- -; R1 : ptr to string -cg_clr_puts: call cg_clr_line - call cg_puts - ret - -; ------------------------------------------------- -; R1 : ptr to string -cg_puts_clr: call cg_puts - call cg_clr_line - ret - -; ------------------------------------------------- -cg_wait_rdy: push R0 -cg_wr_lp: xin R0, (reg_hwstat) - and R0, 0x02 - jz cg_wr_lp - pop R0 - ret - -; ------------------------------------------------- diff --git a/lib/CPUs/JCpu/tools/lib/cregs.inc.jsm b/lib/CPUs/JCpu/tools/lib/cregs.inc.jsm deleted file mode 100644 index 06d39d9..0000000 --- a/lib/CPUs/JCpu/tools/lib/cregs.inc.jsm +++ /dev/null @@ -1,7 +0,0 @@ -; JCPU On-Chip register -cpu_revision: equ 0x00 ; RO -cpu_control: equ 0x01 ; R/W -cpu_status: equ 0x02 ; RO -cpu_int_ctrl: equ 0x03 ; RW -cpu_cmem_high: equ 0x04 ; RW -cpu_stack_high: equ 0x05 ; RW diff --git a/lib/CPUs/JCpu/tools/lib/delays.inc.jsm b/lib/CPUs/JCpu/tools/lib/delays.inc.jsm deleted file mode 100644 index 6f002ee..0000000 --- a/lib/CPUs/JCpu/tools/lib/delays.inc.jsm +++ /dev/null @@ -1,64 +0,0 @@ -; ------------------------------------------------- -; Delays -; ------------------------------------------------- -delay1s: push R15 - mov R15, 10 -loop1s: call delay100ms - dec R15 - jnz loop1s - pop R15 - ret - -delay100ms: push R15 - mov R15, 10 -loop100ms: call delay10ms - dec R15 - jnz loop100ms - pop R15 - ret - -delay10ms: push R15 - mov R15, 10 -loop10ms: call delay1ms - dec R15 - jnz loop10ms - pop R15 - ret - -delay1ms: push R15 - mov R15, 10 -loop1ms: call delay100us - dec R15 - jnz loop1ms - pop R15 - ret - -delay100us: push R15 - mov R15, 10 -loop100us: call delay10us - dec R15 - jnz loop100us - pop R15 - ret - -delay10us: push R15 - mov R15, 99 -loop10us: nop - nop - nop - dec R15 - jnz loop10us - pop R15 - ret - -delay1us: push R15 - mov R15, 9 -loop1us: nop - nop - nop - dec R15 - jnz loop1us - pop R15 - ret - -; ------------------------------------------------- diff --git a/lib/CPUs/JCpu/tools/lib/lcd.inc.jsm b/lib/CPUs/JCpu/tools/lib/lcd.inc.jsm deleted file mode 100644 index d2883fa..0000000 --- a/lib/CPUs/JCpu/tools/lib/lcd.inc.jsm +++ /dev/null @@ -1,208 +0,0 @@ -; ------------------------------------------------- -; lcd.inc.jsm -; ------------------------------------------------- -; needs xmem-address definition for -; - lcd_port (LCD-Base) - -; needs delay.inc.jsm - -; ------------------------------------------------- -lcd_cmd: equ 0x00 -lcd_rd: equ 0x20 -lcd_data: equ 0x40 -lcd_enable: equ 0x80 - -LCD_CMD_Z1: equ 0x80 -LCD_CMD_Z2: equ 0xC0 -LCD_CMD_CLEAR: equ 0x01 - -; ------------------------------------------------- -; Init LCD -; ------------------------------------------------- -LCD_init: mov R2, 0x00 - mov R0, 0x03 - call _write_lcd - call delay10ms - mov R2, 0x00 - mov R0, 0x03 - call _write_lcd - call delay10ms - - mov R2, 0x00 - mov R0, 0x02 - call _write_lcd - call delay1ms - - ; 1. Function set: 4-Bit mode, two display lines - mov R0, 0x28 - call LCD_writecmd - - ; 2. Display on, no cursor - mov R0, 0x0C - call LCD_writecmd - - ; 3. Cursor shift during write - mov R0, 0x06 - call LCD_writecmd - - ; 4. Display clear - mov R0, 0x01 - call LCD_writecmd - - ret - -; ------------------------------------------------- -; LCD_waitbsy -; ------------------------------------------------- -LCD_waitbsy: push R0 -bsy_loop: call LCD_readstat - and R0, 0x80 - jz ex_bsy - call delay1us - jmp bsy_loop -ex_bsy: pop R0 - ret - -; ------------------------------------------------- -; LCD_writecmd -; ------------------------------------------------- -; R0 = cmd -LCD_writeaddr: -LCD_writecmd: push R2 - mov R2, lcd_cmd - call LCD_write - pop R2 - ret - -; ------------------------------------------------- -; LCD_putsx -; ------------------------------------------------- -; R1 = address of null-terminated string in XMEM -LCD_putsx: push R0 -putsx_loop: movx R0, (R1) - inc R1 - tst R0 - jz putsx_ex - call LCD_writechar - jmp putsx_loop -putsx_ex: pop R0 - ret - -; ------------------------------------------------- -; LCD_putsc -; ------------------------------------------------- -; R1 = address of null-terminated string in CMEM -LCD_putsc: push R0 -putsc_loop: movc R0, (R1) - inc R1 - tst R0 - jz putsc_ex - call LCD_writechar - jmp putsc_loop -putsc_ex: pop R0 - ret - -; ------------------------------------------------- -; LCD_writechar -; ------------------------------------------------- -; R0 = char -LCD_writedata: -LCD_writechar: push R2 - mov R2, lcd_data - call LCD_write - pop R2 - ret - -; ------------------------------------------------- -; LCD_write -; ------------------------------------------------- -; R0 = input -; R2 = register -LCD_write: call LCD_waitbsy - push R0 - swap R0 - call _write_lcd - pop R0 - call _write_lcd - ret - -; ------------------------------------------------- -; LCD_readstat -; ------------------------------------------------- -; R0 = status -LCD_readstat: push R2 - mov R2, lcd_cmd - call LCD_read - pop R2 - ret - -; ------------------------------------------------- -; LCD_read -; ------------------------------------------------- -; R0 = output -; R2 = register -LCD_read: call _read_lcd - swap R0 - push R0 - call _read_lcd - pop R2 - or R0, R2 - ret - -; ------------------------------------------------- -; _write -; ------------------------------------------------- -; R0 = input -_write_lcd: push R1 - - and R0, 0x0F - mov R1, R0 - or R1, R2 - xout (lcd_port), R1 - call delay1us - - mov R1, R0 - or R1, R2 - or R1, lcd_enable - xout (lcd_port), R1 - call delay1us - - mov R1, R0 - or R1, R2 - xout (lcd_port), R1 - call delay1us - - or R1, lcd_rd - xout (lcd_port), R1 - - pop R1 - ret - -; ------------------------------------------------- -; _read -; ------------------------------------------------- -; R0 = output -_read_lcd: push R1 - - mov R1, lcd_rd - or R1, R2 - xout (lcd_port), R1 - call delay1us - - mov R1, lcd_rd - or R1, R2 - or R1, lcd_enable - xout (lcd_port), R1 - call delay1us - xin R0, (lcd_port) - and R0, 0x0F - - mov R1, lcd_rd - or R1, R2 - xout (lcd_port), R1 - call delay1us - - pop R1 - ret - - \ No newline at end of file diff --git a/lib/CPUs/JCpu/tools/lib/mul8x8.inc.jsm b/lib/CPUs/JCpu/tools/lib/mul8x8.inc.jsm deleted file mode 100644 index 2f66e2a..0000000 --- a/lib/CPUs/JCpu/tools/lib/mul8x8.inc.jsm +++ /dev/null @@ -1,42 +0,0 @@ -; ------------------------------------------------- -; mul8x8.inc.jsm -; ------------------------------------------------- - -; ------------------------------------------------- -; Parameter: -; R0 : operand 1 -; R1 : operand 2 -; Return: -; R0 : product low -; R1 : product high -mul8x8: push R2 - push R3 - push R4 - - mov R4, R1 - mov R1, 0 - mov R2, 0 - mov R3, 0 - -loop1: cmp R4, 0x01 - jeq ende1 - - shr R4 - jnc next1 - - add R2, R0 - addc R3, R1 - -next1: shl R0 - rolc R1 - jmp loop1 - -ende1: add R0, R2 - addc R1, R3 - - pop R4 - pop R3 - pop R2 - ret - -; ------------------------------------------------- diff --git a/lib/CPUs/JCpu/tools/lib/uart.inc.jsm b/lib/CPUs/JCpu/tools/lib/uart.inc.jsm deleted file mode 100644 index 1733305..0000000 --- a/lib/CPUs/JCpu/tools/lib/uart.inc.jsm +++ /dev/null @@ -1,32 +0,0 @@ -; ------------------------------------------------- -; uart.inc.jsm -; ------------------------------------------------- -; needs xmem-address definition for -; - uart_status (Status register) -; - uart_data (Data register) - -; ------------------------------------------------- -; sout -; ------------------------------------------------- -; R0 = input -sout: push R1 -sout1: xin R1, (uart_status) - and R1, 0x02 - jnz sout1 - xout (uart_data), R0 - pop R1 - ret - -; ------------------------------------------------- -; sin -; ------------------------------------------------- -; R0 = output -sin: push R1 -sin1: xin R1, (uart_status) - and R1, 0x10 - jnz sin1 - xin R0, (uart_data) - pop R1 - ret - -; ------------------------------------------------- diff --git a/lib/CPUs/JCpu/tools/lib/utils.inc.jsm b/lib/CPUs/JCpu/tools/lib/utils.inc.jsm deleted file mode 100644 index f354d7c..0000000 --- a/lib/CPUs/JCpu/tools/lib/utils.inc.jsm +++ /dev/null @@ -1,32 +0,0 @@ -; ------------------------------------------------- -; utils.inc.jsm -; ------------------------------------------------- - - -; ------------------------------------------------- -; Parameter -; R0 : Bin value in lower nibble -; Return -; R0 : Hex character representing lower nibble -nibble2hex: and R0, 0x0F - cmp R0, 0x0A - jlt isNum1 - add R0, 0x07 -isNum1: add R0, 0x30 - ret - -; ------------------------------------------------- -; Parameter -; R0 : Bin value -; Return -; R0 : Hex character high -; R1 : Hex character low -bin2hex: push R0 - call nibble2hex - mov R1, R0 - pop R0 - swap R0 - call nibble2hex - ret - -; ------------------------------------------------- diff --git a/lib/CPUs/JCpu/tools/opc.list b/lib/CPUs/JCpu/tools/opc.list deleted file mode 100644 index 59b3cfa..0000000 --- a/lib/CPUs/JCpu/tools/opc.list +++ /dev/null @@ -1,64 +0,0 @@ -0 NOP -1 HALT -2 MOV|R|R -3 MOV|R|K -4 MOVX|R|Ri -5 MOVX|R|Ki -6 MOVX|Ri|R -7 MOVX|Ri|K -8 MOVX|Ki|R -9 MOVC|R|Ri -10 MOVC|R|Ki -11 MOVC|Ri|R -12 MOVC|Ri|K -13 MOVC|Ki|R -14 CMP|R|R -15 CMP|R|K -16 ADD|R|R -17 ADD|R|K -18 ADDC|R|R -19 ADDC|R|K -20 SUB|R|R -21 SUB|R|K -22 SUBC|R|R -23 SUBC|R|K -24 AND|R|R -25 AND|R|K -26 OR|R|R -27 OR|R|K -28 XOR|R|R -29 XOR|R|K -30 SHL|R -31 SHR|R -32 ROL|R -33 ROR|R -34 ROLC|R -35 RORC|R -36 XOUT|Ki|R -37 XOUT|Ri|K -38 COUT|Ki|R -39 COUT|Ri|K -40 XIN|R|Ki -41 CIN|R|Ki -42 SWAP|R -43 SETC -44 UNDEF -45 UNDEF -46 SUB|K|R -47 SUBC|K|R -48 JMP|K -49 JZ|K -50 JNZ|K -51 JC|K -52 JNC|K -53 JLT|K -54 JGT|K -55 JLE|K -56 JGE|K -57 JEQ|K -58 JNE|K -59 CALL|K -60 PUSH|R -61 POP|R -62 RET -63 RETI diff --git a/lib/CPUs/JCpu/tools/regx.rb b/lib/CPUs/JCpu/tools/regx.rb deleted file mode 100644 index 47775c9..0000000 --- a/lib/CPUs/JCpu/tools/regx.rb +++ /dev/null @@ -1,20 +0,0 @@ -#!/usr/bin/env ruby - -st = "\033[7m" -en = "\033[m" - - while TRUE - print "str> " - STDOUT.flush - str = gets - break if not str - str.chop! - print "pat> " - STDOUT.flush - re = gets - break if not re - re.chop! - str.gsub! re, "#{st}\\&#{en}" - print str, "\n" -end -print "\n" diff --git a/lib/CPUs/JCpu/tools/rom.tcl.tpl b/lib/CPUs/JCpu/tools/rom.tcl.tpl deleted file mode 100644 index 9f5c0dc..0000000 --- a/lib/CPUs/JCpu/tools/rom.tcl.tpl +++ /dev/null @@ -1,61 +0,0 @@ -# ---------------------------------------------------------------------- -# Project: JCPU, a portable 8-bit RISC CPU written in VHDL -# This file: The ROM file for upload to target over JTAG -# -# Copyright (C) 2007 J. Ahrensfeld -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# For questions and ideas, please contact the author at jens@jayfield.org -# -# --------------------------------------------------------------------- - -# --------------------------------------------------------------------- -# For Chipscope 9.1 -# --------------------------------------------------------------------- -# Source JTAG/TCL frame work -cd $env(CHIPSCOPE)\\bin\\nt -source csejtag.tcl - -namespace import ::chipscope::* - -# Platform USB Cable -set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] -# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" - -# Create session -set handle [::chipscope::csejtag_session create 0] - -# Open JTAG and lock -set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] -set lock_result [::chipscope::csejtag_target lock $handle 1000] - -set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] - -# Get Device ID -set devtype "Virtex-4SX" -set devid 2 -set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] -set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] - -set CSE_OP $CSEJTAG_SHIFT_READWRITE -set CSE_ES $CSEJTAG_RUN_TEST_IDLE - -# Write Program -# JASM_ROM_INSERT_HERE - -::chipscope::csejtag_target unlock $handle -::chipscope::csejtag_target close $handle -::chipscope::csejtag_session destroy $handle -exit diff --git a/lib/CPUs/JCpu/tools/templates.rb b/lib/CPUs/JCpu/tools/templates.rb deleted file mode 100644 index 632f11c..0000000 --- a/lib/CPUs/JCpu/tools/templates.rb +++ /dev/null @@ -1,44 +0,0 @@ -#!/usr/bin/env ruby - - -template = <<'END' - -- (tv #1342) read output FIFO - ( - cycles => 1, - cm_i => bus_read_init(addr => ADDR_KS_OFIFO_DOUT), - sep => msg(""), - cm_o => bus_no_ack, - irq => (others => '0') - ), - - -- (tv #1343) wait while FIFO is read - ( - cycles => 2, - cm_i => bus_wait_ack, - sep => msg(""), - cm_o => bus_no_ack, - irq => (others => '0') - ), - - -- (tv #1343) wait for ack - ( - cycles => 1, - cm_i => bus_wait_ack, - sep => msg(""), - cm_o => bus_read_ack(dat => #{exp_data}), - irq => (others => '0') - ), - -END - -puts "KS-128 testvectors:\n" -puts "\n" * 3 - - -0.upto(10) { |sk_no| - 3.downto(0) { |sl_no| - exp_data = "slice_32(TC1_SUBKEYS(#{sk_no}), #{sl_no})" - t = template.gsub(/"/, '\\"') - puts eval("format(\"#{t}\")") - } -} diff --git a/lib/CPUs/JCpu/tools/xrom.vhd.tpl b/lib/CPUs/JCpu/tools/xrom.vhd.tpl deleted file mode 100644 index 5f11f86..0000000 --- a/lib/CPUs/JCpu/tools/xrom.vhd.tpl +++ /dev/null @@ -1,32 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: The ROM file for use in your VHDL design --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.cpu_pkg.all; - --- JASM_ROM_INSERT_HERE - diff --git a/lib/CPUs/JCpu/tools/xrom_ld.vhd.tpl b/lib/CPUs/JCpu/tools/xrom_ld.vhd.tpl deleted file mode 100644 index 696487f..0000000 --- a/lib/CPUs/JCpu/tools/xrom_ld.vhd.tpl +++ /dev/null @@ -1,151 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: loadable ROM --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library UNISIM; -use UNISIM.VComponents.all; - -library work; -use work.cpu_pkg.all; - -ENTITY xrom IS - Port ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in dmem_addr_t; - dout : out dmem_data_t - ); - -END xrom; - -ARCHITECTURE loadable OF xrom IS - - -- JASM_ROM_INSERT_HERE - - signal jtag_ld_clk : STD_LOGIC; - signal jtag_ld_we : STD_LOGIC; - signal jtag_ld_addr : dmem_addr_t; - signal jtag_ld_dout : dmem_data_t; - signal jtag_ld_din : dmem_data_t; - signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; - signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; - signal user_regi, user_rego : unsigned (15 downto 0); - constant id : unsigned (15 downto 0) := X"BEEF"; - -begin - --------------------------------------------------------------------------- --- Virtex-4: JTAG Loader --------------------------------------------------------------------------- - i00_BUFG : BUFG - port map - ( - O => bs_clk1, - I => bs_clk0 - ); - - i01_BUFG : BUFG - port map - ( - O => bs_update1, - I => bs_update0 - ); - - BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 - generic map - ( - JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) - ) - port map - ( - CAPTURE => bs_capture, -- CAPTURE output from TAP controller - DRCK => bs_clk0, -- Data register output for USER functions - RESET => bs_rst, -- Reset output from TAP controller - SEL => bs_sel, -- USER active output - SHIFT => bs_shift, -- SHIFT output from TAP controller - TDI => bs_tdi, -- TDI output from TAP controller - UPDATE => bs_update0, -- UPDATE output from TAP controller - TDO => bs_tdo -- Data input for USER function - ); - - jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); - jtag_ld_din <= user_regi(dmem_data_t'left downto 0); - jtag_ld_clk <= bs_update1; - jtag_ld_we <= bs_sel; - -sipo: - process (bs_rst, bs_clk1, bs_tdi, bs_shift) - begin - if bs_rst = '1' then - user_regi <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_regi <= bs_tdi & user_regi(user_regi'left downto 1); - end if; - end if; - end process; - -piso: - process (bs_rst, bs_clk1, bs_shift, user_rego) - begin - bs_tdo <= user_rego(0); - if bs_rst = '1' then - user_rego <= (others => '0'); - elsif rising_edge(bs_clk1) then - if bs_shift = '1' then - user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); - else - user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; --- user_rego <= id; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ROM Read/Write --------------------------------------------------------------------------- -PROM_READ: - process(clk, ce) - begin - if rising_edge(clk) and ce = '1' then - dout <= xmem_rom(to_integer(addr)); - end if; - end process; - -PROM_WRITE: - process(jtag_ld_clk, jtag_ld_we) - begin - if rising_edge(jtag_ld_clk) then - if jtag_ld_we = '1' then - xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; - else - jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); - end if; - end if; - end process; - --------------------------------------------------------------------------- -end loadable; diff --git a/lib/CPUs/MIPS/bsp/examples/.directory_history b/lib/CPUs/MIPS/bsp/examples/.directory_history deleted file mode 100644 index b367532..0000000 --- a/lib/CPUs/MIPS/bsp/examples/.directory_history +++ /dev/null @@ -1,34 +0,0 @@ -VHDL/lib/CPUs/MIPS/bsp/examples/dbg.c - -VHDL/lib/CPUs/MIPS/bsp/examples/irq.c - -VHDL/lib/CPUs/MIPS/bsp/examples/irq.h - -VHDL/lib/CPUs/MIPS/bsp/examples/kernel.S - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys.h - -VHDL/lib/CPUs/MIPS/bsp/examples/mips_gfx.c - -VHDL/lib/CPUs/MIPS/bsp/examples/mips_gfx.h - -VHDL/lib/CPUs/MIPS/bsp/examples/mips_ps2.c - -VHDL/lib/CPUs/MIPS/bsp/examples/mips_ps2.h - -VHDL/lib/CPUs/MIPS/bsp/examples/mipsdis.c - -VHDL/lib/CPUs/MIPS/bsp/examples/mipsdis.h - -VHDL/lib/CPUs/MIPS/bsp/examples/regdef.h - -VHDL/lib/CPUs/MIPS/bsp/examples/startup.S - -VHDL/lib/CPUs/MIPS/bsp/examples/xcpt.c - -VHDL/lib/CPUs/MIPS/bsp/examples/xcpt.h - -VHDL/lib/CPUs/MIPS/bsp/examples/xcpt_asm.h - diff --git a/lib/CPUs/MIPS/bsp/examples/Bessel.c b/lib/CPUs/MIPS/bsp/examples/Bessel.c deleted file mode 100644 index 080fe17..0000000 --- a/lib/CPUs/MIPS/bsp/examples/Bessel.c +++ /dev/null @@ -1,87 +0,0 @@ -/************************************************************************/ -/* Ein Programm zur Berechnung der Bessel-Koeffizienten Jn -/* Dateiname : Bessel.cpp -/* Autoren : T. Burr, J. Ahrensfeld -/* Datum : 28.10.1999 -/* letzte Änderung : 28.01.2000 -/* Version : 1.0 -/************************************************************************/ - -#include "stdio.h" -#include "math.h" -#include "stdlib.h" - - -#define MAX_SUM 25 -#define VERSION "1.0" - -/************************************************************************/ -/* Funktionsdeklarationen */ -/************************************************************************/ -// Fakultätsberechnung -double fak (int N) -{ - int index; - double erg=1; - - for (index = 1; index <= N; index++) - erg = erg * index; - - return erg; -} - -// Bessel() -// Berechnung von Jn von mfm -double bessel(int n, double mfm) -{ - int m; - double Jn=0; - - for (m=0; m < MAX_SUM; m++) - { - Jn = Jn + (pow(-1.0,m)/(fak(m)*fak(m+n))*pow(mfm/2.0,(2*m+n))); - } - return Jn; -} - - -/************************************************************************/ -/* Das Hauptprogramm -/************************************************************************/ -void main() -{ - - int N, Nmax; - double erg; - float mfm; - - printf("\n\t Besselfunktion Version %s",VERSION); - printf("\n\t ~~~~~~~~~~~~~~~~~~~~~~~~~~\n"); - printf("\n\tCopyright by J. Ahrensfeld & T. Burr\n\n"); - -// --------------------------------------------------------------------------------- - // Benutzereingaben - printf("\nBerechnungen fuer J = 0..."); - if(scanf("%d",&Nmax)==0) - exit (-1); - - printf("Bitte Modulationsindex eingeben : "); - if(scanf("%f",&mfm)==0) - exit(-1); - - printf("\n"); - -// --------------------------------------------------------------------------------- - // Berechnung - for (N=0; N <= Nmax; N++) - { - erg = bessel(N,(double)mfm); - printf("J(%d) = %10.8f\n",N,erg); - } - - printf("FERTIG.\n"); - - } - -/************************************************************************/ - diff --git a/lib/CPUs/MIPS/bsp/examples/Makefile b/lib/CPUs/MIPS/bsp/examples/Makefile deleted file mode 100644 index 71d95b0..0000000 --- a/lib/CPUs/MIPS/bsp/examples/Makefile +++ /dev/null @@ -1,333 +0,0 @@ -ENDIAN='big' - -ifeq ($(ENDIAN), 'big') - ENDIAN_FLAGS=-EB - CFLAGS=$(ENDIAN_FLAGS) -specs=specs/eb/specs -msoft-float -O2 -march=r3000 -I. -Ilibsys -Wl,-M -else - ENDIAN_FLAGS=-EL - CFLAGS=$(ENDIAN_FLAGS) -specs=specs/specs -msoft-float -O2 -march=r3000 -I. -Ilibsys -Wl,-M -endif - -LIBS=-lm -lsys - -AS=mipsel-elf-as -AR=mipsel-elf-ar -CC=mipsel-elf-gcc -LD=mipsel-elf-ld -OBJDUMP=mipsel-elf-objdump -OBJCOPY=mipsel-elf-objcopy -FLASHGEN=flashgen - -PROG = hello.elf testbench.elf test_irq.elf dhry.elf queens.elf stanford.elf paranoia.elf rmd160_test.elf Bessel.elf whet.elf phrasen.elf dttl.elf richards_benchmark.elf test_exception.elf life.elf r3.elf gunzip.elf basic_math.elf jman_patches.elf jman_patchmeshes.elf jman_polys.elf test_hpi.elf test_vga.elf - -all: $(PROG) - -libsys.a: - $(MAKE) -C libsys - -hello.elf: hello.c libsys.a - $(CC) $(CFLAGS) -o $@ -Os hello.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -testbench.elf: testbench.c libsys.a - $(CC) $(CFLAGS) -O3 -o $@ -DHZ=1000 -DNOSIGNAL -DBATCHMODE -DNOMAIN -Os -g testbench.c paranoia.c delay_mips.c bogomips.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -test_irq.elf: test_irq.c libsys.a - $(CC) $(CFLAGS) -o $@ test_irq.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -dhry.elf: dhry_1.c dhry_2.c dhry.h libsys.a - $(CC) $(CFLAGS) -o $@ -DHZ=1000 dhry_1.c dhry_2.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -queens.elf: queens.c libsys.a - $(CC) $(CFLAGS) -o $@ -DUNIX_Old -DHZ=1000 queens.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -stanford.elf: stanford.c libsys.a - $(CC) $(CFLAGS) -O3 -o $@ -DHZ=1000 stanford.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -paranoia.elf: paranoia.c libsys.a - $(CC) $(CFLAGS) -O3 -o $@ -DNOSIGNAL -DBATCHMODE paranoia.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -rmd160_test.elf: rmd160_test.c rmd160.c rmd160.h libsys.a - $(CC) $(CFLAGS) -O3 -o $@ rmd160_test.c rmd160.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -hashtest.elf: hashtest.c rmd160.c rmd160.h libsys.a - $(CC) $(CFLAGS) -O3 -o $@ hashtest.c rmd160.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -Bessel.elf: Bessel.c libsys.a - $(CC) $(CFLAGS) -o $@ Bessel.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -whet.elf: whet.c libsys.a - $(CC) $(CFLAGS) -o $@ whet.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -phrasen.elf: phrasen.c libsys.a - $(CC) $(CFLAGS) -o $@ phrasen.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -dttl.elf: dttl.c random.c libsys.a - $(CC) $(CFLAGS) -o $@ dttl.c random.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -richards_benchmark.elf: richards_benchmark.c libsys.a - $(CC) $(CFLAGS) -o $@ richards_benchmark.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -test_exception.elf: test_exception.c libsys.a - $(CC) $(CFLAGS) -o $@ -O1 test_exception.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -life.elf: life.c libsys.a - $(CC) $(CFLAGS) -o $@ -g life.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -r3.elf: r3.c libsys.a - $(CC) $(CFLAGS) -O3 -o $@ -DJMIPS_VGA -O2 r3.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -gunzip.elf: gunzip.c inflate.c crc32.c libsys.a - $(CC) $(CFLAGS) -o $@ -o $@ gunzip.c inflate.c crc32.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -basic_math.elf: basicmath_small.c rad2deg.c cubic.c isqrt.c libsys.a - $(CC) $(CFLAGS) -o $@ -o $@ basicmath_small.c rad2deg.c cubic.c isqrt.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -JMAN_SRC= \ - jman/bintree.c \ - jman/camset.c \ - jman/engine.c \ - jman/graph_state.c \ - jman/grid.c \ - jman/imageio.c \ - jman/linklist.c \ - jman/matrix.c \ - jman/object.c \ - jman/render.c \ - jman/ri.c \ - jman/ribgen.c \ - jman/stack.c \ - jman/vars.c - -jman_patches.elf: $(JMAN_SRC) jman/main_patches.c libsys.a - $(CC) $(CFLAGS) -I../ -o $@ -o $@ jman/main_patches.c $(JMAN_SRC) $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -jman_patchmeshes.elf: $(JMAN_SRC) jman/main_patchmeshes.c jman/patches2.c libsys.a - $(CC) $(CFLAGS) -I../ -o $@ -o $@ jman/main_patchmeshes.c jman/patches2.c $(JMAN_SRC) $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -jman_polys.elf: $(JMAN_SRC) jman/main_polypin.c jman/polys.c libsys.a - $(CC) $(CFLAGS) -I../ -o $@ -o $@ jman/main_polypin.c jman/polys.c $(JMAN_SRC) $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -serdump.elf: serdump.c libsys.a - $(CC) $(CFLAGS) -O3 -o $@ -O2 serdump.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -pppi.elf: pppissue/test1.c pppissue/utils.c pppissue/pppd.h libsys.a - $(CC) $(CFLAGS) -O2 -o $@ -O2 pppissue/test1.c pppissue/utils.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -lwl.elf: lwl.c libsys.a - $(CC) $(CFLAGS) -O2 -o $@ lwl.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -ucb.elf: ucb.c libsys.a - $(CC) $(CFLAGS) -O2 -o $@ ucb.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -test_hpi.elf: hpi.c test_hpi.c cfiflash.c libsys.a - $(CC) $(CFLAGS) -o $@ -g hpi.c test_hpi.c cfiflash.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin - cat $@.srec | packhex > $@.pack - -test_vga.elf: test_vga.c libsys.a - $(CC) $(CFLAGS) -o $@ test_vga.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -barcode.elf: barcode.c libsys.a - $(CC) $(CFLAGS) -o $@ barcode.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -lua.elf: lua_init.c libsys.a - $(CC) $(CFLAGS) -I./lua-5.1.4/etc -I./lua-5.1.4/src -o $@ lua_init.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -mandelbrot.elf: mandelbrot.c libsys.a - $(CC) $(CFLAGS) -o $@ mandelbrot.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -bogomips.elf: bogomips.c delay_mips.c libsys.a - $(CC) $(CFLAGS) -DHZ=1000 -o $@ bogomips.c delay_mips.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -test_asm.elf: test_asm.S libsys.a - $(CC) $(CFLAGS) -DHZ=1000 -o $@ test_asm.S $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -test_ac97.elf: test_ac97.c libsys.a - $(CC) $(CFLAGS) -o $@ test_ac97.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -test_dcache.elf: test_dcache.c libsys.a - $(CC) $(CFLAGS) -O0 -o $@ test_dcache.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -aes256_1.elf: aes256_1.c aes256.c aes256.h libsys.a - $(CC) $(CFLAGS) -O3 -o $@ aes256_1.c aes256.c $(LIBS) >$@.map - $(OBJDUMP) -d $@ > $@.dis - $(OBJCOPY) $@ -O binary $@.bin - $(OBJCOPY) -O srec $@ $@.srec - $(FLASHGEN) $@.bin $(ENDIAN_FLAGS) - cat $@.srec | packhex > $@.pack - -clean: - rm -rf *.a *.o *.bin *.map *.dis *.srec *.pack *.elf $(PROG) > /dev/null diff --git a/lib/CPUs/MIPS/bsp/examples/aes256.c b/lib/CPUs/MIPS/bsp/examples/aes256.c deleted file mode 100644 index 97a5136..0000000 --- a/lib/CPUs/MIPS/bsp/examples/aes256.c +++ /dev/null @@ -1,359 +0,0 @@ -/* -* Byte-oriented AES-256 implementation. -* All lookup tables replaced with 'on the fly' calculations. -* -* Copyright (c) 2007-2009 Ilya O. Levin, http://www.literatecode.com -* Other contributors: Hal Finney -* -* Permission to use, copy, modify, and distribute this software for any -* purpose with or without fee is hereby granted, provided that the above -* copyright notice and this permission notice appear in all copies. -* -* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -*/ -#include "aes256.h" - -#define F(x) (((x)<<1) ^ ((((x)>>7) & 1) * 0x1b)) -#define FD(x) (((x) >> 1) ^ (((x) & 1) ? 0x8d : 0)) - -#define BACK_TO_TABLES -#ifdef BACK_TO_TABLES - -const uint8_t sbox[256] = { - 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, - 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, - 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, - 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, - 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, - 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, - 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, - 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, - 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, - 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, - 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, - 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, - 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, - 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, - 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, - 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, - 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, - 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, - 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, - 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, - 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, - 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, - 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, - 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, - 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, - 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, - 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, - 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, - 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, - 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, - 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, - 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 -}; -const uint8_t sboxinv[256] = { - 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, - 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb, - 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, - 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb, - 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, - 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e, - 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, - 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25, - 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, - 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92, - 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, - 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84, - 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, - 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06, - 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, - 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b, - 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, - 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73, - 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, - 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e, - 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, - 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b, - 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, - 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4, - 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, - 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f, - 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, - 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef, - 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, - 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61, - 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, - 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d -}; - -#define rj_sbox(x) sbox[(x)] -#define rj_sbox_inv(x) sboxinv[(x)] - -#else /* tableless subroutines */ - -/* -------------------------------------------------------------------------- */ -uint8_t gf_alog(uint8_t x) // calculate anti-logarithm gen 3 -{ - uint8_t atb = 1, z; - - while (x--) {z = atb; atb <<= 1; if (z & 0x80) atb^= 0x1b; atb ^= z;} - - return atb; -} /* gf_alog */ - -/* -------------------------------------------------------------------------- */ -uint8_t gf_log(uint8_t x) // calculate logarithm gen 3 -{ - uint8_t atb = 1, i = 0, z; - - do { - if (atb == x) break; - z = atb; atb <<= 1; if (z & 0x80) atb^= 0x1b; atb ^= z; - } while (++i > 0); - - return i; -} /* gf_log */ - - -/* -------------------------------------------------------------------------- */ -uint8_t gf_mulinv(uint8_t x) // calculate multiplicative inverse -{ - return (x) ? gf_alog(255 - gf_log(x)) : 0; -} /* gf_mulinv */ - -/* -------------------------------------------------------------------------- */ -uint8_t rj_sbox(uint8_t x) -{ - uint8_t y, sb; - - sb = y = gf_mulinv(x); - y = (y<<1)|(y>>7); sb ^= y; y = (y<<1)|(y>>7); sb ^= y; - y = (y<<1)|(y>>7); sb ^= y; y = (y<<1)|(y>>7); sb ^= y; - - return (sb ^ 0x63); -} /* rj_sbox */ - -/* -------------------------------------------------------------------------- */ -uint8_t rj_sbox_inv(uint8_t x) -{ - uint8_t y, sb; - - y = x ^ 0x63; - sb = y = (y<<1)|(y>>7); - y = (y<<2)|(y>>6); sb ^= y; y = (y<<3)|(y>>5); sb ^= y; - - return gf_mulinv(sb); -} /* rj_sbox_inv */ - -#endif - -/* -------------------------------------------------------------------------- */ -uint8_t rj_xtime(uint8_t x) -{ - return (x & 0x80) ? ((x << 1) ^ 0x1b) : (x << 1); -} /* rj_xtime */ - -/* -------------------------------------------------------------------------- */ -void aes_subBytes(uint8_t *buf) -{ - register uint8_t i = 16; - - while (i--) buf[i] = rj_sbox(buf[i]); -} /* aes_subBytes */ - -/* -------------------------------------------------------------------------- */ -void aes_subBytes_inv(uint8_t *buf) -{ - register uint8_t i = 16; - - while (i--) buf[i] = rj_sbox_inv(buf[i]); -} /* aes_subBytes_inv */ - -/* -------------------------------------------------------------------------- */ -void aes_addRoundKey(uint8_t *buf, uint8_t *key) -{ - register uint8_t i = 16; - - while (i--) buf[i] ^= key[i]; -} /* aes_addRoundKey */ - -/* -------------------------------------------------------------------------- */ -void aes_addRoundKey_cpy(uint8_t *buf, uint8_t *key, uint8_t *cpk) -{ - register uint8_t i = 16; - - while (i--) buf[i] ^= (cpk[i] = key[i]), cpk[16+i] = key[16 + i]; -} /* aes_addRoundKey_cpy */ - - -/* -------------------------------------------------------------------------- */ -void aes_shiftRows(uint8_t *buf) -{ - register uint8_t i, j; /* to make it potentially parallelable :) */ - - i = buf[1]; buf[1] = buf[5]; buf[5] = buf[9]; buf[9] = buf[13]; buf[13] = i; - i = buf[10]; buf[10] = buf[2]; buf[2] = i; - j = buf[3]; buf[3] = buf[15]; buf[15] = buf[11]; buf[11] = buf[7]; buf[7] = j; - j = buf[14]; buf[14] = buf[6]; buf[6] = j; - -} /* aes_shiftRows */ - -/* -------------------------------------------------------------------------- */ -void aes_shiftRows_inv(uint8_t *buf) -{ - register uint8_t i, j; /* same as above :) */ - - i = buf[1]; buf[1] = buf[13]; buf[13] = buf[9]; buf[9] = buf[5]; buf[5] = i; - i = buf[2]; buf[2] = buf[10]; buf[10] = i; - j = buf[3]; buf[3] = buf[7]; buf[7] = buf[11]; buf[11] = buf[15]; buf[15] = j; - j = buf[6]; buf[6] = buf[14]; buf[14] = j; - -} /* aes_shiftRows_inv */ - -/* -------------------------------------------------------------------------- */ -void aes_mixColumns(uint8_t *buf) -{ - register uint8_t i, a, b, c, d, e; - - for (i = 0; i < 16; i += 4) - { - a = buf[i]; b = buf[i + 1]; c = buf[i + 2]; d = buf[i + 3]; - e = a ^ b ^ c ^ d; - buf[i] ^= e ^ rj_xtime(a^b); buf[i+1] ^= e ^ rj_xtime(b^c); - buf[i+2] ^= e ^ rj_xtime(c^d); buf[i+3] ^= e ^ rj_xtime(d^a); - } -} /* aes_mixColumns */ - -/* -------------------------------------------------------------------------- */ -void aes_mixColumns_inv(uint8_t *buf) -{ - register uint8_t i, a, b, c, d, e, x, y, z; - - for (i = 0; i < 16; i += 4) - { - a = buf[i]; b = buf[i + 1]; c = buf[i + 2]; d = buf[i + 3]; - e = a ^ b ^ c ^ d; - z = rj_xtime(e); - x = e ^ rj_xtime(rj_xtime(z^a^c)); y = e ^ rj_xtime(rj_xtime(z^b^d)); - buf[i] ^= x ^ rj_xtime(a^b); buf[i+1] ^= y ^ rj_xtime(b^c); - buf[i+2] ^= x ^ rj_xtime(c^d); buf[i+3] ^= y ^ rj_xtime(d^a); - } -} /* aes_mixColumns_inv */ - -/* -------------------------------------------------------------------------- */ -void aes_expandEncKey(uint8_t *k, uint8_t *rc) -{ - register uint8_t i; - - k[0] ^= rj_sbox(k[29]) ^ (*rc); - k[1] ^= rj_sbox(k[30]); - k[2] ^= rj_sbox(k[31]); - k[3] ^= rj_sbox(k[28]); - *rc = F( *rc); - - for(i = 4; i < 16; i += 4) k[i] ^= k[i-4], k[i+1] ^= k[i-3], - k[i+2] ^= k[i-2], k[i+3] ^= k[i-1]; - k[16] ^= rj_sbox(k[12]); - k[17] ^= rj_sbox(k[13]); - k[18] ^= rj_sbox(k[14]); - k[19] ^= rj_sbox(k[15]); - - for(i = 20; i < 32; i += 4) k[i] ^= k[i-4], k[i+1] ^= k[i-3], - k[i+2] ^= k[i-2], k[i+3] ^= k[i-1]; - -} /* aes_expandEncKey */ - -/* -------------------------------------------------------------------------- */ -void aes_expandDecKey(uint8_t *k, uint8_t *rc) -{ - uint8_t i; - - for(i = 28; i > 16; i -= 4) k[i+0] ^= k[i-4], k[i+1] ^= k[i-3], - k[i+2] ^= k[i-2], k[i+3] ^= k[i-1]; - - k[16] ^= rj_sbox(k[12]); - k[17] ^= rj_sbox(k[13]); - k[18] ^= rj_sbox(k[14]); - k[19] ^= rj_sbox(k[15]); - - for(i = 12; i > 0; i -= 4) k[i+0] ^= k[i-4], k[i+1] ^= k[i-3], - k[i+2] ^= k[i-2], k[i+3] ^= k[i-1]; - - *rc = FD(*rc); - k[0] ^= rj_sbox(k[29]) ^ (*rc); - k[1] ^= rj_sbox(k[30]); - k[2] ^= rj_sbox(k[31]); - k[3] ^= rj_sbox(k[28]); -} /* aes_expandDecKey */ - - -/* -------------------------------------------------------------------------- */ -void aes256_init(aes256_context *ctx, uint8_t *k) -{ - uint8_t rcon = 1; - register uint8_t i; - - for (i = 0; i < sizeof(ctx->key); i++) ctx->enckey[i] = ctx->deckey[i] = k[i]; - for (i = 8;--i;) aes_expandEncKey(ctx->deckey, &rcon); -} /* aes256_init */ - -/* -------------------------------------------------------------------------- */ -void aes256_done(aes256_context *ctx) -{ - register uint8_t i; - - for (i = 0; i < sizeof(ctx->key); i++) - ctx->key[i] = ctx->enckey[i] = ctx->deckey[i] = 0; -} /* aes256_done */ - -/* -------------------------------------------------------------------------- */ -void aes256_encrypt_ecb(aes256_context *ctx, uint8_t *buf) -{ - uint8_t i, rcon; - - aes_addRoundKey_cpy(buf, ctx->enckey, ctx->key); - for(i = 1, rcon = 1; i < 14; ++i) - { - aes_subBytes(buf); - aes_shiftRows(buf); - aes_mixColumns(buf); - if( i & 1 ) aes_addRoundKey( buf, &ctx->key[16]); - else aes_expandEncKey(ctx->key, &rcon), aes_addRoundKey(buf, ctx->key); - } - aes_subBytes(buf); - aes_shiftRows(buf); - aes_expandEncKey(ctx->key, &rcon); - aes_addRoundKey(buf, ctx->key); -} /* aes256_encrypt */ - -/* -------------------------------------------------------------------------- */ -void aes256_decrypt_ecb(aes256_context *ctx, uint8_t *buf) -{ - uint8_t i, rcon; - - aes_addRoundKey_cpy(buf, ctx->deckey, ctx->key); - aes_shiftRows_inv(buf); - aes_subBytes_inv(buf); - - for (i = 14, rcon = 0x80; --i;) - { - if( ( i & 1 ) ) - { - aes_expandDecKey(ctx->key, &rcon); - aes_addRoundKey(buf, &ctx->key[16]); - } - else aes_addRoundKey(buf, ctx->key); - aes_mixColumns_inv(buf); - aes_shiftRows_inv(buf); - aes_subBytes_inv(buf); - } - aes_addRoundKey( buf, ctx->key); -} /* aes256_decrypt */ diff --git a/lib/CPUs/MIPS/bsp/examples/aes256.h b/lib/CPUs/MIPS/bsp/examples/aes256.h deleted file mode 100644 index c5a22ba..0000000 --- a/lib/CPUs/MIPS/bsp/examples/aes256.h +++ /dev/null @@ -1,42 +0,0 @@ -/* -* Byte-oriented AES-256 implementation. -* All lookup tables replaced with 'on the fly' calculations. -* -* Copyright (c) 2007-2009 Ilya O. Levin, http://www.literatecode.com -* Other contributors: Hal Finney -* -* Permission to use, copy, modify, and distribute this software for any -* purpose with or without fee is hereby granted, provided that the above -* copyright notice and this permission notice appear in all copies. -* -* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -*/ -#ifndef uint8_t -#define uint8_t unsigned char -#endif - -#ifdef __cplusplus -extern "C" { -#endif - - typedef struct { - uint8_t key[32]; - uint8_t enckey[32]; - uint8_t deckey[32]; - } aes256_context; - - - void aes256_init(aes256_context *, uint8_t * /* key */); - void aes256_done(aes256_context *); - void aes256_encrypt_ecb(aes256_context *, uint8_t * /* plaintext */); - void aes256_decrypt_ecb(aes256_context *, uint8_t * /* cipertext */); - -#ifdef __cplusplus -} -#endif diff --git a/lib/CPUs/MIPS/bsp/examples/aes256_1.c b/lib/CPUs/MIPS/bsp/examples/aes256_1.c deleted file mode 100644 index 8a987b8..0000000 --- a/lib/CPUs/MIPS/bsp/examples/aes256_1.c +++ /dev/null @@ -1,76 +0,0 @@ -/* -* Byte-oriented AES-256 implementation. -* All lookup tables replaced with 'on the fly' calculations. -* -* Copyright (c) 2007 Ilya O. Levin, http://www.literatecode.com -* -* Permission to use, copy, modify, and distribute this software for any -* purpose with or without fee is hereby granted, provided that the above -* copyright notice and this permission notice appear in all copies. -* -* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -*/ -#include -#include -#include -#include -#include -#include "aes256.h" - -#ifndef NUM_BLOCKS -#define NUM_BLOCKS 10000 -#endif - -#define DUMP(s, i, buf, sz) {printf(s); \ - for (i = 0; i < (sz);i++) \ - printf("%02x ", buf[i]); \ - printf("\n");} - - -int main (int argc, char *argv[]) -{ - aes256_context ctx; - uint8_t key[32]; - uint8_t buf[16], i; - long start, end, j; - - /* put a test vector */ - for (i = 0; i < sizeof(buf);i++) buf[i] = i * 16 + i; - for (i = 0; i < sizeof(key);i++) key[i] = i; - - DUMP("txt: ", i, buf, sizeof(buf)); - DUMP("key: ", i, key, sizeof(key)); - printf("---\n"); - - aes256_init(&ctx, key); - start = clock(); - for (j=0; j < NUM_BLOCKS; j++) - { - aes256_encrypt_ecb(&ctx, buf); - } - end = clock(); - DUMP("enc: ", i, buf, sizeof(buf)); - - printf("Speed %f blocks/s\n", (float)j/((float)(end-start)/CLOCKS_PER_SEC)); - - aes256_init(&ctx, key); - start = clock(); - for (j=0; j < NUM_BLOCKS; j++) - { - aes256_decrypt_ecb(&ctx, buf); - } - end = clock(); - DUMP("dec: ", i, buf, sizeof(buf)); - - printf("Speed %f blocks/s\n", (float)j/((float)(end-start)/CLOCKS_PER_SEC)); - - aes256_done(&ctx); - - return 0; -} /* main */ diff --git a/lib/CPUs/MIPS/bsp/examples/barcode.c b/lib/CPUs/MIPS/bsp/examples/barcode.c deleted file mode 100644 index e1dc1bc..0000000 --- a/lib/CPUs/MIPS/bsp/examples/barcode.c +++ /dev/null @@ -1,358 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include - -#define CPU_FREQ_HZ 100000000 -#include "libsys.h" -#include "irq.h" - -UINT32 buffer[16384]; - -#define T_SAMPLE 5000 -#define TIMEOUT 1000 - -typedef struct _bar_t -{ - UINT32 T; - UINT32 black; -} bar_t; - -enum -{ - state_idle = 0, - state_sample, - state_finish -}; - -typedef struct _sbar_cand_t -{ - UINT32 T; - UINT32 is_primitive; -} bar_cand_t; - -bar_t bars[1024]; - -void bsort(float *pData, UINT32 len) -{ - float t; - int i, j; - - for(i=len-1; i>=0; i--) - { - for(j=1; j pData[j]) - { - t = pData[j-1]; - pData[j-1] = pData[j]; - pData[j] = t; - } - } - } -} - -typedef struct _smedian_t -{ - UINT32 N; - UINT32 is_dirty; - float *pBuf, *pSorted; - UINT32 w; - float median; -} median_t; - -void Median_init(median_t *pObj, UINT32 N, float init_val) -{ - int i; - pObj->pBuf = (float*)malloc(N*sizeof(float)); - pObj->pSorted = (float*)malloc(N*sizeof(float)); - for (i=0; i < N; i++) - pObj->pBuf[0] = init_val; - pObj->median = init_val; - pObj->is_dirty = 0; - pObj->w = 0; - pObj->N = N; -} - -void Median_free(median_t *pObj) -{ - if (pObj->pBuf) - free(pObj->pBuf); - - if (pObj->pSorted) - free(pObj->pSorted); - - pObj->pBuf = NULL; - pObj->pSorted = NULL; - -} - -void Median_value_add(median_t *pObj, float value) -{ - pObj->is_dirty = 1; - pObj->pBuf[pObj->w++] = value; - - if (pObj->w == pObj->N) - pObj->w = 0; - -} - -float Median_get(median_t *pObj) -{ - if (!pObj->is_dirty) - return pObj->median; - - memcpy(pObj->pSorted, pObj->pBuf, pObj->N*sizeof(float)); - - bsort(pObj->pSorted, pObj->N); - - if (pObj->N&1) - { - pObj->median = pObj->pSorted[(pObj->N-1)/2]; - } - else - { - pObj->median = 0.5f*(pObj->pSorted[pObj->N/2] + pObj->pSorted[pObj->N/2+1]); - } - - pObj->is_dirty = 0; - - return pObj->median; -} - -// ------------------------------------------------------------- -UINT32 detect_module(UINT32 T, UINT32 T0) -{ - UINT32 m, best_M; - float err, kc, best_err; - - best_err = 4.f; - best_M = 0; - - for (m=1; m < 5; m++) - { - kc = (float)T/(m*T0); - err = fabs(kc - 1); - - if (err < best_err) - { - best_M = m; - best_err = err; - } - } - - return best_M; -} - -void handler7(void) -{ - UINT32 volatile *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 volatile *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 volatile *pPS20_stat = (UINT32*)SYS_PS2_0_STAT; - UINT32 volatile *pPS21_stat = (UINT32*)SYS_PS2_1_STAT; - static UINT32 state, bar_count; - static UINT32 timeout_count, timeout_reload; - static UINT32 white, pin_last, skip, start; - static UINT32 module_cnt_w, module_cnt_b, Tmod0_w, Tmod0_b, M, T0; - float ratio, error, kc; - UINT32 i; - static median_t med_b, med_w; - static bar_cand_t bc_b, bc_w; - static median_t speed_b, speed_w; - - if (*pTim_stat & 1) - { - *pTim_stat = 1; - white = ((*pPS20_stat & SYS_PS2_BIT_PIN_DATA) == 0); - - switch (state) - { - case state_idle: - timeout_reload = TIMEOUT; - if (white != pin_last) - { - if (white) - break; - - state = state_sample; - module_cnt_b = 0; - module_cnt_w = 0; - Tmod0_w = 0xFFFFFFFF; - Tmod0_b = 0xFFFFFFFF; - bar_count = 0; - Median_init(&med_b, 3, 0); - Median_init(&med_w, 3, 0); - Median_init(&speed_b, 3, 1); - Median_init(&speed_w, 3, 1); - } - break; - - case state_sample: - if (!timeout_count) - { - state = state_finish; - break; - } - - if (white) - { - module_cnt_w++; - } - else - { - module_cnt_b++; - } - if (white != pin_last) - { - if (pin_last) - { - if (bar_count < 10) - { - if (1.5*module_cnt_w < Tmod0_w) - { - Tmod0_w = module_cnt_w; - } - } - Median_value_add(&med_w, Tmod0_w); - - timeout_reload = 10*Tmod0_w; - bars[bar_count].T = module_cnt_w; - bars[bar_count].black = 0; - module_cnt_w = 0; - - } - else - { - if (bar_count < 10) - { - if (1.5*module_cnt_b < Tmod0_b) - { - Tmod0_b = module_cnt_b; - } - } - Median_value_add(&med_b, Tmod0_b); - - timeout_reload = 10*Tmod0_b; - bars[bar_count].T = module_cnt_b; - bars[bar_count].black = 1; - module_cnt_b = 0; - } - bar_count++; - - } - break; - - case state_finish: - printf("------------------------------------------------\n"); - printf(" Black White \n"); - skip = 0; - start = 1; - Tmod0_w = Median_get(&med_w); - Tmod0_b = Median_get(&med_b); - for (i=0; i < bar_count; i++) - { - if (bars[i].black) - { - T0 = Median_get(&med_b); - ratio = (float)bars[i].T/T0; - if (start) - { - if (ratio > 4) - { - skip = 1; - continue; - } - } - start = 0; - skip = 0; - M = detect_module(bars[i].T, T0); - kc = (float)bars[i].T/(M*T0); - error = kc - 1; - -// printf("M=%d, R=%2.2f, E=%+2.2f [%04d]", M, ratio, error, T0); -// if (M == 1) - Median_value_add(&med_b, (UINT32)(T0*kc)); - Median_value_add(&speed_b, (float)bars[i].T/(M*Tmod0_b)); - - printf("%06d %2.6f ", bars[i].T, Median_get(&speed_b)); - - } - else - { - if (skip) - continue; - - T0 = Median_get(&med_w); - ratio = (float)bars[i].T/T0; - if (ratio > 9) - { - start = 1; -// printf("\n"); -// printf("------------------------------------------------\n"); -// printf(" Black White \n"); - continue; - } - - - M = detect_module(bars[i].T, T0); - kc = (float)bars[i].T/(M*T0); - error = kc - 1; - -// printf(" M=%d, R=%2.2f, E=%+2.2f [%04d]", M, ratio, error, T0); -// if (M == 1) - Median_value_add(&med_w, (UINT32)(T0*kc)); - Median_value_add(&speed_w, (float)bars[i].T/(M*Tmod0_w)); - - printf("%06d %2.6f ", bars[i].T, Median_get(&speed_w)); - printf("\n"); - } - } - Median_free(&med_b); - Median_free(&med_w); - Median_free(&speed_b); - Median_free(&speed_w); - if (bar_count) - printf("\n"); - - state = state_idle; - break; - - } - if (white != pin_last) - timeout_count = timeout_reload; - - pin_last = white; - if (timeout_count) - timeout_count--; - - } -} - -int main(void) -{ - - int i; - UINT32 volatile *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 volatile *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 volatile *pTim0_cnt = (UINT32*)SYS_ITIM0_CNT; - UINT32 volatile *pTim0_cmp = (UINT32*)SYS_ITIM0_CMP; - - *pTim0_cnt = 0; - *pTim0_cmp = (UINT32)T_SAMPLE; - *pTim_stat = 1; - *pTim_ctrl = 3; - - interrupt_register(7, (void*)handler7); - - printf("Jenners BarCoder\n"); - - interrupt_enable(7); - - while(1) - { - } - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/barcode.new.c b/lib/CPUs/MIPS/bsp/examples/barcode.new.c deleted file mode 100644 index 06f1152..0000000 --- a/lib/CPUs/MIPS/bsp/examples/barcode.new.c +++ /dev/null @@ -1,322 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include - -#define CPU_FREQ_HZ 100000000 -#include "libsys.h" -#include "irq.h" - -UINT32 buffer[16384]; - -#define T_SAMPLE 5000 -#define TIMEOUT 1000 - -typedef struct _bar_t -{ - UINT32 T; - UINT32 black; -} bar_t; - -enum -{ - state_idle = 0, - state_sample, - state_finish -}; - -bar_t bars[1024]; - -void bsort(float *pData, UINT32 len) -{ - float t; - int i, j; - - for(i=len-1; i>=0; i--) - { - for(j=1; j pData[j]) - { - t = pData[j-1]; - pData[j-1] = pData[j]; - pData[j] = t; - } - } - } -} - -typedef struct _smedian_t -{ - UINT32 N; - UINT32 is_dirty; - float *pBuf, *pSorted; - UINT32 w; - float median; -} median_t; - -void Median_init(median_t *pObj, UINT32 N, float init_val) -{ - int i; - pObj->pBuf = (float*)malloc(N*sizeof(float)); - pObj->pSorted = (float*)malloc(N*sizeof(float)); - for (i=0; i < N; i++) - pObj->pBuf[0] = init_val; - pObj->median = init_val; - pObj->is_dirty = 0; - pObj->w = 0; - pObj->N = N; -} - -void Median_free(median_t *pObj) -{ - if (pObj->pBuf) - free(pObj->pBuf); - - if (pObj->pSorted) - free(pObj->pSorted); - - pObj->pBuf = NULL; - pObj->pSorted = NULL; - -} - -void Median_value_add(median_t *pObj, float value) -{ - pObj->is_dirty = 1; - pObj->pBuf[pObj->w++] = value; - - if (pObj->w == pObj->N) - pObj->w = 0; - -} - -float Median_get(median_t *pObj) -{ - if (!pObj->is_dirty) - return pObj->median; - - memcpy(pObj->pSorted, pObj->pBuf, pObj->N*sizeof(float)); - - bsort(pObj->pSorted, pObj->N); - - if (pObj->N&1) - { - pObj->median = pObj->pSorted[(pObj->N-1)/2]; - } - else - { - pObj->median = 0.5f*(pObj->pSorted[pObj->N/2] + pObj->pSorted[pObj->N/2+1]); - } - - pObj->is_dirty = 0; - - return pObj->median; -} - -// ------------------------------------------------------------- -UINT32 detect_module(UINT32 T, UINT32 *pBC) -{ - UINT32 m, best_M; - float err, kc, best_err; - - best_err = 4.f; - best_M = 0; - - for (m=0; m < 4; m++) - { - kc = (float)T/pBC[m]; - err = fabs(kc - 1); - - if (err < best_err) - { - best_M = m+1; - best_err = err; - } - } - - return best_M; -} - -void handler7(void) -{ - UINT32 volatile *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 volatile *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 volatile *pPS20_stat = (UINT32*)SYS_PS2_0_STAT; - UINT32 volatile *pPS21_stat = (UINT32*)SYS_PS2_1_STAT; - static UINT32 state, bar_count; - static UINT32 timeout_count, timeout_reload; - static UINT32 white, pin_last, skip, start; - static UINT32 module_cnt_w, module_cnt_b, Tmod0_w, Tmod0_b, M, T0; - float ratio, error, kc; - UINT32 i, j; - static median_t med_b, med_w; - static UINT32 bc_b[4], bc_w[4]; - - if (*pTim_stat & 1) - { - *pTim_stat = 1; - white = ((*pPS20_stat & SYS_PS2_BIT_PIN_DATA) == 0); - - switch (state) - { - case state_idle: - timeout_reload = TIMEOUT; - if (white != pin_last) - { - if (white) - break; - - state = state_sample; - module_cnt_b = 0; - module_cnt_w = 0; - Tmod0_w = 0xFFFFFFFF; - Tmod0_b = 0xFFFFFFFF; - bar_count = 0; - Median_init(&med_b, 3, 1); - Median_init(&med_w, 3, 1); - } - break; - - case state_sample: - if (!timeout_count) - { - state = state_finish; - break; - } - - if (white) - { - module_cnt_w++; - } - else - { - module_cnt_b++; - } - if (white != pin_last) - { - if (pin_last) - { - if (bar_count < 10) - { - if (1.5*module_cnt_w < Tmod0_w) - { - Tmod0_w = module_cnt_w; - } - } - timeout_reload = 10*Tmod0_w; - bars[bar_count].T = module_cnt_w; - bars[bar_count].black = 0; - module_cnt_w = 0; - - } - else - { - if (bar_count < 10) - { - if (1.5*module_cnt_b < Tmod0_b) - { - Tmod0_b = module_cnt_b; - } - } - timeout_reload = 10*Tmod0_b; - bars[bar_count].T = module_cnt_b; - bars[bar_count].black = 1; - module_cnt_b = 0; - } - bar_count++; - - } - break; - - case state_finish: - printf("------------------------------------------------\n"); - printf(" Black White \n"); - skip = 0; - start = 1; - for (i=0; i < 4; i++) - { - bc_b[i] = (i+1)*Tmod0_b; - bc_w[i] = (i+1)*Tmod0_w; - } - for (i=0; i < bar_count; i++) - { - if (bars[i].black) - { - M = detect_module(bars[i].T, bc_b); - if (M) - { - kc = (float)bars[i].T/bc_b[M-1]; - error = kc - 1; - Median_value_add(&med_b, kc); - printf("M=%d, R=%2.2f, E=%+2.2f [%04d]", M, kc, error, bc_b[M-1]); - kc = Median_get(&med_b); - bc_b[M-1] = (UINT32)(kc*bc_b[M-1]); - } -// printf("%d", M); - - } - else - { - M = detect_module(bars[i].T, bc_w); - if (M) - { - kc = (float)bars[i].T/bc_w[M-1]; - error = kc - 1; - Median_value_add(&med_w, kc); - printf(" M=%d, R=%2.2f, E=%+2.2f [%04d]", M, kc, error, bc_w[M-1]); - kc = Median_get(&med_w); - bc_w[M-1] = (UINT32)(kc*bc_w[M-1]); - - } -// printf("%d", M); - printf("\n"); - } - } - Median_free(&med_b); - Median_free(&med_w); - if (bar_count) - printf("\n"); - - state = state_idle; - break; - - } - if (white != pin_last) - timeout_count = timeout_reload; - - pin_last = white; - if (timeout_count) - timeout_count--; - - } -} - -int main(void) -{ - - int i; - UINT32 volatile *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 volatile *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 volatile *pTim0_cnt = (UINT32*)SYS_ITIM0_CNT; - UINT32 volatile *pTim0_cmp = (UINT32*)SYS_ITIM0_CMP; - - *pTim0_cnt = 0; - *pTim0_cmp = (UINT32)T_SAMPLE; - *pTim_stat = 1; - *pTim_ctrl = 3; - - interrupt_register(7, (void*)handler7); - - printf("Jenners BarCoder\n"); - - interrupt_enable(7); - - while(1) - { - } - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/basicmath_small.c b/lib/CPUs/MIPS/bsp/examples/basicmath_small.c deleted file mode 100644 index 049fea2..0000000 --- a/lib/CPUs/MIPS/bsp/examples/basicmath_small.c +++ /dev/null @@ -1,84 +0,0 @@ -#include "snipmath.h" -#include - -/* The printf's may be removed to isolate just the math calculations */ - -int main(void) -{ - double a1 = 1.0, b1 = -10.5, c1 = 32.0, d1 = -30.0; - double a2 = 1.0, b2 = -4.5, c2 = 17.0, d2 = -30.0; - double a3 = 1.0, b3 = -3.5, c3 = 22.0, d3 = -31.0; - double a4 = 1.0, b4 = -13.7, c4 = 1.0, d4 = -35.0; - double x[3]; - double X; - int solutions; - int i; - unsigned long l = 0x3fed0169L; - struct int_sqrt q; - long n = 0; - - /* solve soem cubic functions */ - printf("********* CUBIC FUNCTIONS ***********\n"); - /* should get 3 solutions: 2, 6 & 2.5 */ - SolveCubic(a1, b1, c1, d1, &solutions, x); - printf("Solutions:"); - for(i=0;i0;b1--) { - for(c1=5;c1<15;c1+=0.5) { - for(d1=-1;d1>-11;d1--) { - SolveCubic(a1, b1, c1, d1, &solutions, x); - printf("Solutions:"); - for(i=0;i -#include - -/* this should be approx 2 Bo*oMips to start (note initial shift), and will - * still work even if initially too large, it will just take slightly longer */ -unsigned long loops_per_jiffy = (1<<12); - -/* This is the number of bits of precision for the loops_per_jiffy. Each - * bit takes on average 1.5/HZ seconds. This (like the original) is a little - * better than 1% */ -#define LPS_PREC 8 - -extern void delay(unsigned int loops); - -//plagiarized straight from the 2.4 sources. -#ifdef NOMAIN -int calibrate_delay(void) -#else -int main(void) -#endif -{ - unsigned long ticks, loopbit; - int lps_precision = LPS_PREC; - - loops_per_jiffy = (1<<12); - - printf("Calibrating delay loop... "); - while (loops_per_jiffy <<= 1) { - /* wait for "start of" clock tick */ - ticks = clock(); - while (ticks == clock()) - /* nothing */; - /* Go .. */ - ticks = clock(); - delay(loops_per_jiffy); - ticks = clock() - ticks; - if (ticks) - break; - } - -/* Do a binary approximation to get loops_per_jiffy set to equal one clock - (up to lps_precision bits) */ - - loops_per_jiffy >>= 1; - loopbit = loops_per_jiffy; - while ( lps_precision-- && (loopbit >>= 1) ) { - loops_per_jiffy |= loopbit; - ticks = clock(); - while (ticks == clock()); - ticks = clock(); - delay(loops_per_jiffy); - if (clock() != ticks) /* longer than 1 tick */ - loops_per_jiffy &= ~loopbit; - } - - -/* Round the value and print it */ - printf("%lu.%02lu BogoMIPS\n", - loops_per_jiffy/(500000/HZ), - (loops_per_jiffy/(5000/HZ)) % 100); - - - return loops_per_jiffy; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/Makefile b/lib/CPUs/MIPS/bsp/examples/bootloader/Makefile deleted file mode 100644 index 513a332..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -ENDIAN='big' - -ifeq ($(ENDIAN), 'big') - ENDIAN_FLAGS=-EB - LIB_DIRS=-L $(MIPS_TOOLS_PREFIX)/mipsel-elf/lib/eb -L $(MIPS_TOOLS_PREFIX)/lib/gcc/mipsel-elf/$(MIPS_GCC_VER)/eb -else - ENDIAN_FLAGS=-EL - LIB_DIRS=-L $(MIPS_TOOLS_PREFIX)/mipsel-elf/lib -L $(MIPS_TOOLS_PREFIX)/lib/gcc/mipsel-elf/$(MIPS_GCC_VER) -endif - -CFLAGS=$(ENDIAN_FLAGS) -Os -I. -I../ -I../libsys -msoft-float -march=r3000 -LFLAGS=$(ENDIAN_FLAGS) -M -T bootloader.ld - -LIBS=-lc -lgcc - -CC=mipsel-elf-gcc -LD=mipsel-elf-ld -OBJDUMP=mipsel-elf-objdump -OBJCOPY=mipsel-elf-objcopy - -all: bootloader_flash - -libsys: startup_boot.S init_boot.S kernel_boot.S libsys_boot.c - $(CC) $(CFLAGS) -c startup_boot.S -o startup.o - $(CC) $(CFLAGS) -c init_boot.S -o init.o - $(CC) $(CFLAGS) -c kernel_boot.S -o kernel.o - $(CC) $(CFLAGS) -c libsys_boot.c -o libsys.o - -bootloader: libsys bootloader.c - $(CC) $(CFLAGS) -g -c bootloader.c - $(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o bootloader.o -o bootloader.elf $(LIBS) >bootloader.map - $(OBJDUMP) -d bootloader.elf > bootloader.dis - $(OBJCOPY) bootloader.elf -O binary bootloader.ROM.bin - $(OBJCOPY) -O srec bootloader.elf bootloader.srec - romgen bootloader.ROM.bin 10 $(ENDIAN_FLAGS) - -bootloader_flash: libsys bootloader_with_flash.c - $(CC) $(CFLAGS) -g -c bootloader_with_flash.c - $(CC) $(CFLAGS) -g -c ../cfiflash.c - $(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o cfiflash.o bootloader_with_flash.o -o bootloader.elf $(LIBS) >bootloader.map - $(OBJDUMP) -d bootloader.elf > bootloader.dis - $(OBJCOPY) bootloader.elf -O binary bootloader.ROM.bin - $(OBJCOPY) -O srec bootloader.elf bootloader.srec - romgen bootloader.ROM.bin 11 $(ENDIAN_FLAGS) - -clean: - rm -rf *.o *.bin *.map *.dis *.srec *.elf *.vhd* *.tcl bootloader > /dev/null diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.c b/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.c deleted file mode 100644 index 7ade222..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.c +++ /dev/null @@ -1,247 +0,0 @@ -#include "libsys_boot.h" - -typedef struct _ssrec_t -{ - UINT32 addr; - UINT32 size; - UINT32 type; - UINT8 *data; - -} srec_t; - -enum srec_type -{ - srec_err, srec_sob, srec_data, srec_rec, srec_eob -}; - -UINT8 h2i(UINT8 *c) -{ - int i; - UINT8 t, b = 0; - - for (i=0; i < 2; i++) - { - t = c[i]; - if (t >= 'A') - t = t - 'A' + 10; - else - t -= '0'; - - b = (b << 4) | t; - } - return b; -} - -int decode_srec(srec_t *pRec, UINT8 *pBuf, int buflen) -{ - UINT8 chksum, byte; - int alen, i; - - if (!buflen) - return srec_err; - - pRec->type = srec_rec; - alen = 0; - if ((pBuf[1] > '0') && (pBuf[1] < '4')) - { - alen = pBuf[1] - '0' + 1; - pRec->type = srec_data; - } - else if ((pBuf[1] >= '7') && (pBuf[1] <= '9')) - { - alen = 11 - (pBuf[1] - '0'); - pRec->type = srec_eob; - } - else if (pBuf[1] == '0') - { - alen = 2; - pRec->type = srec_sob; - } - - byte = h2i(&pBuf[2]); - pRec->size = byte; - chksum = byte; - - pRec->addr = 0; - for (i=0; i < alen; i++) - { - byte = h2i(&pBuf[4+2*i]); - pRec->addr = pRec->addr << 8 | byte; - chksum += byte; - } - pRec->size -= (alen+1); - - pRec->data = (UINT8*) &pBuf[4 + 2*alen]; - for (i=0; i < (int)pRec->size; i++) - { - byte = h2i(&pRec->data[2*i]); - pRec->data[i] = byte; - chksum += byte; - } - chksum = ~chksum; - byte = h2i(&pRec->data[2*i]); - if (chksum != byte) - return 0; - - return pRec->type; -} - -int srec_getline(UINT8 *pLine) -{ - char c; - int i = 0; - - do - { - c = readchar(); - - } while ((c != 's') && (c != 'S')); - - while(((c != 0x0D) && (c != 0x0A))) - { - pLine[i++] = c; - c = readchar(); - }; - - return i; -} - -void Jump_to(void *pEntry) -{ - __asm - ( - ".set noreorder\n" - ); - __asm - ( - "jr %[pEntry]\n" // jump entry - : - : [pEntry] "r" (pEntry) - ); - __asm - ( - "nop\n" - ); - __asm - ( - ".set reorder\n" - ); -} - -void Exec_at(void *pEntry) -{ - __asm - ( - ".set noreorder\n" - ); - - __asm - ( - "mfc0 $26, $12\n" // change exception vector - "li $27, 0xFFBFFFFF\n" - "and $26, $27\n" - "mtc0 $26, $12\n" - ); - - __asm - ( - "lw $v0, 16($sp)\n" - "nop\n" - "jr $v0\n" // jump entry - "rfe\n" - ); - - __asm - ( - ".set reorder\n" - ); -} -void PrintCPUinfo(void) -{ - int result, rev_id; - - char *cpu_type_str[7] = {"invalid", "R2000", "R3000", "R6000", "R4000", "reserved", "R6000A"}; - - // Print Status register - result = CP0_SR_read(); - - sputs("Status : "); - print_word(result); - sputs("\n"); - - // Print Revision - result = CP0_PRID_read(); - rev_id = (result >> 8) & 0xFF; - sputs("CPU type: "); - if ((rev_id > 0) && (rev_id < 0x07)) - { - sputs(cpu_type_str[rev_id]); - sputs(" Rev."); - rev_id = result & 0xFF; - print_byte((char)rev_id); - } - else - sputs("Unknown"); - - sputs("\n"); - -} - -#define MAX_IMG_SIZE (1024*1024) // bytes - -int main(int argc, char *argv[]) -{ - UINT8 buf[256]; - srec_t srec; - int result, srec_state, i; - UINT32 haddr; - volatile UINT8 *pMem; - haddr = 0; - - // ---------------------------------------------------------- - sputs("\n\n"); - PrintCPUinfo(); - sputs("Booting from UART.."); - - while(1) - { - sputs("."); - while(1) - { - result = srec_getline(buf); - srec_state = decode_srec(&srec, buf, result); - switch (srec_state) - { - case srec_data: - if ((srec.addr + srec.size) > haddr) - haddr = srec.addr + srec.size; - - pMem = (UINT8*)srec.addr; - for (i=0; i < srec.size; i++) - *pMem++ = srec.data[i]; - - break; - - case srec_eob: - sputs("done\n\n"); - sputs("Execute program at "); - print_word(srec.addr); - sputs("\n\n"); - - Exec_at((void*)srec.addr); - break; - - default: - result = -1; - break; - } - if (result < 0) - { - break; - } - - }; - } - return 0; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.ld b/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.ld deleted file mode 100644 index c3cd35e..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader.ld +++ /dev/null @@ -1,53 +0,0 @@ -MEMORY -{ - rom : ORIGIN = 0xBFC00000, LENGTH = 0x00002000 /* 8K */ - ram : ORIGIN = 0x40000000, LENGTH = 0x00002000 /* 8K */ -} - -OUTPUT_ARCH(mips) -SEARCH_DIR("."); -SEARCH_DIR("/usr/local/mipsel-elf/lib:/usr/local/mipsel-elf/lib/eb"); -SEARCH_DIR("/usr/local/lib/gcc/mipsel-elf/4.3.3:/usr/local/lib/gcc/mipsel-elf/4.3.3/eb"); - -stack_ptr = 0x7FFFEFF0; -baudrate = 0x0D; -sys_led_port = 0xA0000000; -sys_uart_data = 0xA0010000; -sys_uart_stat = 0xA0010004; -sys_uart_baud = 0xA0010008; -sys_timer_usec = 0xA000008; -sys_timer_sec = 0xA000000C; - - -SECTIONS -{ - .init ORIGIN(rom) : - { - start = ALIGN(4); - entry = ALIGN(4); - _entry = ALIGN(4); - __entry = ALIGN(4); - *(.stext) - } > rom - - .ktext ORIGIN(rom) + 0x180 : - { - *(.ktext) - } > rom - - .text . : - { - *(.text) - } > rom - - .rodata . : - { - *(.rodata*) - } > rom - - .data ORIGIN(ram) : - { - *(.*data) *(.*bss) *(.*common) - } > ram - -} diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader_with_flash.c b/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader_with_flash.c deleted file mode 100644 index 197ab44..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/bootloader_with_flash.c +++ /dev/null @@ -1,383 +0,0 @@ -#include "libsys_boot.h" -#include "cfiflash.h" - -#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian; -#define MAGIC_EL 0x3149464A // "JFI1" in little-endian; - -typedef struct _ssrec_t -{ - UINT32 addr; - UINT32 size; - UINT32 type; - UINT8 *data; - -} srec_t; -typedef struct _sflash_alloc_tbl_t -{ - UINT32 images[16]; - -} flash_alloc_tbl_t; - -typedef struct _sflash_img_hdr_t -{ - UINT32 magic; - UINT32 target_base; - UINT32 img_base; - UINT32 img_size; - UINT32 hdr_next; - UINT8 img_name[128]; - UINT8 res[108]; - -} flash_img_hdr_t; - -enum srec_type -{ - srec_err, srec_sob, srec_data, srec_rec, srec_eob -}; - -UINT8 h2i(UINT8 *c) -{ - int i; - UINT8 t, b = 0; - - for (i=0; i < 2; i++) - { - t = c[i]; - if (t >= 'A') - t = t - 'A' + 10; - else - t -= '0'; - - b = (b << 4) | t; - } - return b; -} - -int decode_srec(srec_t *pRec, UINT8 *pBuf, int buflen) -{ - UINT8 chksum, byte; - int alen, i; - - if (!buflen) - return srec_err; - - pRec->type = srec_rec; - alen = 0; - if ((pBuf[1] > '0') && (pBuf[1] < '4')) - { - alen = pBuf[1] - '0' + 1; - pRec->type = srec_data; - } - else if ((pBuf[1] >= '7') && (pBuf[1] <= '9')) - { - alen = 11 - (pBuf[1] - '0'); - pRec->type = srec_eob; - } - else if (pBuf[1] == '0') - { - alen = 2; - pRec->type = srec_sob; - } - - byte = h2i(&pBuf[2]); - pRec->size = byte; - chksum = byte; - - pRec->addr = 0; - for (i=0; i < alen; i++) - { - byte = h2i(&pBuf[4+2*i]); - pRec->addr = pRec->addr << 8 | byte; - chksum += byte; - } - pRec->size -= (alen+1); - - pRec->data = (UINT8*) &pBuf[4 + 2*alen]; - for (i=0; i < (int)pRec->size; i++) - { - byte = h2i(&pRec->data[2*i]); - pRec->data[i] = byte; - chksum += byte; - } - chksum = ~chksum; - byte = h2i(&pRec->data[2*i]); - if (chksum != byte) - return 0; - - return pRec->type; -} - -int srec_getline(UINT8 *pLine) -{ - char c; - int i = 0; - - do - { - c = readchar(); - - } while ((c != 's') && (c != 'S')); - - while(((c != 0x0D) && (c != 0x0A))) - { - pLine[i++] = c; - c = readchar(); - }; - - return i; -} - -void Jump_to(void *pEntry) -{ - __asm - ( - ".set noreorder\n" - ); - __asm - ( - "jr %[pEntry]\n" // jump entry - : - : [pEntry] "r" (pEntry) - ); - __asm - ( - "nop\n" - ); - __asm - ( - ".set reorder\n" - ); -} - -void Exec_at(void *pEntry) -{ - __asm - ( - ".set noreorder\n" - ); - - __asm - ( - "li $26, 0x10000000\n" - "mtc0 $26, $12\n" - ); - - __asm - ( - "jr %[pEntry]\n" // jump entry - : - : [pEntry] "r" (pEntry) - ); - - __asm - ( - "rfe\n" - ); - - __asm - ( - ".set reorder\n" - ); -} - -void Exec_RE_at(void *pEntry) -{ - __asm - ( - ".set noreorder\n" - ); - - __asm - ( - "mfc0 $26, $12\n" // change exception vector - "li $27, 0xFFBFFFFF\n" - "and $26, $27\n" - "li $27, 0x02000000\n" // Reverse Endianess - "or $26, $27\n" - "mtc0 $26, $12\n" - ); - - __asm - ( - "jr %[pEntry]\n" // jump entry - : - : [pEntry] "r" (pEntry) - ); - - __asm - ( - "rfe\n" - ); - - __asm - ( - ".set reorder\n" - ); -} - -#define MAX_IMG_SIZE (1024*1024) // bytes -#define SDRAM_BASE 0x40000000 -#define FLASH_USE_BLOCK 1 - -int main(int argc, char *argv[]) -{ - UINT8 buf[256]; - srec_t srec; - int srec_state, i; - UINT32 haddr, result; - flash_t flash; - flash_img_hdr_t img_hdr = {0}; - flash_img_hdr_t *pImg_hdr; - UINT32 img_size, block_sel; - - volatile UINT32 *pLED = (UINT32*)SYS_LED_PORT; - volatile UINT32 *pBtn = (UINT32*)SYS_GPIO0; - volatile UINT32 *pDip = (UINT32*)SYS_GPIO1; - volatile UINT8 *pMem; - volatile UINT32 *pFlashIO = (UINT32*)SYS_FLASH_IO; // Flash in uncached area - volatile UINT32 *pFlashMem = (UINT32*)SYS_FLASH_MEM; // Flash in cached area - volatile UINT32 *ram32 = (UINT32*)SDRAM_BASE; - UINT32 flash_offset; - - *pLED = 0; - haddr = 0; - block_sel = 0x7F & (UINT32)*pDip; - - // ---------------------------------------------------------- - if (IS_ERROR(flash_find(&flash, SYS_FLASH_IO))) - { - sputs("Cannot find flash device. Exit now!\n\n"); - return 1; - } - - // Get flash offset by value of DIP-switch - flash_offset = flash_get_offset_by_blocknum(&flash, block_sel); - - ram32 = (UINT32*)(SDRAM_BASE); - pFlashIO = (UINT32*)(SYS_FLASH_IO + flash_offset); - - if (!(*pBtn & 8)) - { - sputs("\n\n"); - pImg_hdr = (flash_img_hdr_t*)pFlashIO; - if ((pImg_hdr->magic != MAGIC_EL) && (pImg_hdr->magic != MAGIC_EB)) - { - sputs("\n\n"); - sputs("Invalid image found at ");print_word(flash_offset); sputs(". Abort.\n"); - return 1; - } - - sputs("Booting application from flash (");print_word(flash_offset);sputs(")..."); - - ram32 = (UINT32*)pImg_hdr->target_base; - img_size = pImg_hdr->img_size; - - // It's safe to use cached Flash, - // because D-Cache was invalidated during execution of start code - pFlashMem = (UINT32*)(SYS_FLASH_MEM + pImg_hdr->img_base); - - for (i=0; i < img_size/4; i++) - ram32[i] = pFlashMem[i]; - - sputs("done\n"); - - sputs("Execute at ");print_word(pImg_hdr->target_base); sputs("\n\n"); - Exec_at((void*)ram32); - } - else - { - - sputs("\n\n"); - - sputs("Reading HEX-Record from UART.."); - - // Erase SDRAM - for (i=0; i < MAX_IMG_SIZE/4; i++) - ram32[i] = 0; - - - while(1) - { - sputs("."); - while(1) - { - result = srec_getline(buf); - srec_state = decode_srec(&srec, buf, result); - *pLED = 0; - switch (srec_state) - { - case srec_data: - if ((srec.addr + srec.size) > haddr) - haddr = srec.addr + srec.size; - - pMem = (UINT8*)srec.addr; - for (i=0; i < srec.size; i++) - *pMem++ = srec.data[i]; - - break; - - case srec_eob: - sputs("done\n\n"); - img_hdr.magic = MAGIC_EB; - img_hdr.target_base = srec.addr; - img_hdr.img_size = haddr - srec.addr; - img_hdr.img_base = flash_offset + sizeof(flash_img_hdr_t); - img_hdr.hdr_next = flash_get_offset_blockaligned(&flash, img_hdr.img_base + img_hdr.img_size); - sputs("Size of application : ");print_word(img_hdr.img_size); sputs("\n"); - sputs("Programming flash at : ");print_word(flash_offset); sputs("\n"); - sputs("Next free flash offset : ");print_word(img_hdr.hdr_next); sputs("\n"); - - sputs("Flash erase..."); - result = flash_erase(&flash, flash_offset, img_hdr.img_size + sizeof(flash_img_hdr_t)); - if (IS_ERROR(result)) - { - sputs("failed (");print_word(result);sputs(")\n"); - break; - } - sputs("done\n"); - - sputs("Flash write..."); - result = flash_program(&flash, flash_offset, (UINT8*)&img_hdr, sizeof(flash_img_hdr_t)); - if (IS_ERROR(result)) - { - sputs("failed (");print_word(result);sputs(")\n"); - break; - } - result = flash_program(&flash, img_hdr.img_base, (UINT8*)img_hdr.target_base, img_hdr.img_size); - if (IS_ERROR(result)) - { - sputs("failed (");print_word(result);sputs(")\n"); - break; - } - sputs("done\n"); - - sputs("Flash verify..."); - result = flash_verify(&flash, img_hdr.img_base, (UINT8*)img_hdr.target_base, img_hdr.img_size); - if (IS_ERROR(result)) - { - sputs("failed (");print_word(result);sputs(")\n"); - break; - } - sputs("passed\n"); - - // Jump to reset vector - Jump_to((void*)0xBFC00000); - - break; - - default: - result = -1; - break; - } - if (IS_ERROR(result)) - { - *pLED = 0x40000000; - break; - } - - }; - } - } - return 0; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/init_boot.S b/lib/CPUs/MIPS/bsp/examples/bootloader/init_boot.S deleted file mode 100644 index 84a8d9d..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/init_boot.S +++ /dev/null @@ -1,19 +0,0 @@ - .file "init.S" - - .text - .section .init,"ax" - .align 2 - .globl _init - .extern end - -_init: - .set noreorder - - # set uart - la $26, sys_uart_baud - addiu $27, $0, baudrate - sw $27, 0($26) - - jr $ra - - .set reorder diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/jtag_upd.bat b/lib/CPUs/MIPS/bsp/examples/bootloader/jtag_upd.bat deleted file mode 100644 index 33bc43a..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/jtag_upd.bat +++ /dev/null @@ -1,13 +0,0 @@ -@rem -@rem Setup Chipscope's TCL JTAG path -@rem -@rem Usage: cs_xtclsh.bat args... -@rem -@date /T > date.tmp -@date 15.03.2009 -@set CS_PATH=%XILINX%\ChipScope\bin\nt -@echo %CS_PATH% - -@call %CS_PATH%\cs_xtclsh bootloader.ROM.tcl -@type date.tmp | date >nul -@del date.tmp diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/kernel_boot.S b/lib/CPUs/MIPS/bsp/examples/bootloader/kernel_boot.S deleted file mode 100644 index b4a8694..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/kernel_boot.S +++ /dev/null @@ -1,46 +0,0 @@ - .file "kernel.S" - - .section .ktext,"ax" - .align 2 - - .macro kpush reg - addiu $sp, 4 - sw \reg, 0($sp) - .endm - - .macro kpop reg - lw \reg, 0($sp) - addiu $sp, -4 - .endm - -_exc_handler: - - .set noreorder - - # Set Error LED and ExcCode LEDs - # Get Cause - mfc0 $26, $13 - li $27, 0xC0000000 - srl $26, 2 - andi $26, 0x000F - or $26, $27 - la $27, sys_led_port - sw $26, 0($27) - - # wait for all interrupts = 0 -$w4x: mfc0 $26, $13 - nop - srl $26, 8 - andi $26, 0xFF - bnez $26, $w4x - nop - - # Get return address - mfc0 $26, $14 - - # Return - nop - jr $26 - rfe - .set reorder - diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.c b/lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.c deleted file mode 100644 index 0f39d80..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.c +++ /dev/null @@ -1,214 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include "libsys_boot.h" - -// --------------------------------------------------------------------------------- -// MIPS specific -UINT32 CP0_SR_read(void) -{ - UINT32 result; - - __asm - ( - "mfc0 %[val], $12\n" - : [val] "=r" (result) - ); - - return result; -} - -void CP0_SR_write(UINT32 val) -{ - __asm - ( - "mtc0 %[val], $12\n" - : /* no output */ - : [val] "r" (val) - ); -} - -UINT32 CP0_CR_read(void) -{ - UINT32 result; - - __asm - ( - "mfc0 %[val], $13\n" - : [val] "=r" (result) - ); - - return result; -} - -void CP0_CR_write(UINT32 val) -{ - __asm - ( - "mtc0 %[val], $13\n" - : - : [val] "r" (val) - ); -} - -UINT32 CP0_PRID_read(void) -{ - UINT32 result; - - __asm - ( - "mfc0 %[val], $15\n" - : [val] "=r" (result) - ); - - return result; -} - -// --------------------------------------------------------------------------------- -char readchar(void) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT; - volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA; - - while(!(0x10 & *pUART_stat)); - - return (char)*pUART_data; -} - -void writechar(char c) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT; - volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA; - - while((0x02 & *pUART_stat) != 0); - - *pUART_data = (UINT32)c; -} - -void _putchar(char c) -{ - if (c == 0x0A) - { - writechar(0x0D); - } - writechar(c); -} - -int sputs(char *pStr) -{ - char *start; - start = pStr; - - while(*pStr) - _putchar(*(pStr++)); - - return pStr - start; -} - -void print_byte(char byte) -{ - int i; - unsigned char c, nibble; - - for (i=0; i < 2; i++) - { - nibble = (char)((byte >> 4) & 0xF); - byte <<= 4; - - if (nibble < 10) - c = nibble + '0'; - else - c = nibble + 'A' - 10; - - _putchar(c); - } -} - -void print_word(int word) -{ - int i; - unsigned char c, nibble; - - for (i=0; i < 4; i++) - { - c = (char) (word >> 24); - print_byte(c); - word <<= 8; - } -} - -// --------------------------------------------------------------------------------- -// PrintBuffer8() -// Prints byte buffer as hex and ascii interpretation -// --------------------------------------------------------------------------------- -// _Parameters : -// pBuf: : IN: Buffer to display -// nbpr : Number of bytes per row to display -// len : Length of input buffer -// _Return: none -// -// --------------------------------------------------------------------------- -void PrintBuffer8(UINT8 *pBuf, int nbpr, int len) -{ - memdump(pBuf, 1, nbpr, len); -} - -void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len) -{ - int i, j, cnt_hex, cnt_asc, base; - unsigned char c; - - i = j = 0; - cnt_hex = len; - cnt_asc = len; - base = 0; - if (!print_offset_only) - base = (int)pBuf; - - do - { - print_word(base + i); - sputs(": "); - for (j=0; j < num_bytes_per_row; j++) - { - if (cnt_hex) - { - print_byte(pBuf[i+j]); - sputs(" "); - cnt_hex--; - } - else - { - sputs(" "); - break; - } - - } - - sputs(" "); - for (j=0; j < num_bytes_per_row; j++) - { - if (cnt_asc) - { - c = pBuf[i+j]; - if((c < 0x20) || (c > 0x7F)) - c = '.'; - - _putchar(c); - cnt_asc--; - } - else - { - sputs(" "); - break; - } - } - sputs("\n"); - i += num_bytes_per_row; - - } while (cnt_hex); -} - diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.h b/lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.h deleted file mode 100644 index 3bf4ecc..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/libsys_boot.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef LIBSYS_H -#define LIBSYS_H - -// --------------------------------------------------------- -// Types -// --------------------------------------------------------- -#define INT8 char -#define INT16 short -#define INT32 long -#define UINT8 unsigned char -#define UINT16 unsigned short -#define UINT32 unsigned long -#define INT int -#define UINT unsigned int -#define FLOAT32 float -#define FLOAT64 double - -#define IS_ERROR(e) ((e & 0x80000000) == 0x80000000) - -#define SYS_GPIO0 0xA0000000 -#define SYS_GPIO1 0xA0000004 -#define SYS_LED_PORT SYS_GPIO0 -#define SYS_USB_CTRL SYS_GPIO1 -#define SYS_TIMER_USEC 0xA0000008 -#define SYS_TIMER_SEC 0xA000000C -#define SYS_UART_DATA 0xA0010000 -#define SYS_UART_STAT 0xA0010004 -#define SYS_UART_BAUD 0xA0010008 -#define SYS_USB_DATA 0xA0020000 -#define SYS_USB_MBX 0xA0020004 -#define SYS_USB_ADDR 0xA0020008 -#define SYS_USB_STATUS 0xA002000C -#define SYS_FLASH_IO 0xA4000000 -#define SYS_FLASH_MEM 0x00000000 - -// MIPS specific -UINT32 CP0_SR_read(void); -void CP0_SR_write(UINT32 val); -UINT32 CP0_CR_read(void); -void CP0_CR_write(UINT32 val); -UINT32 CP0_PRID_read(void); - -// General -char readchar(void); -void writechar(char c); -int write(int file, char *ptr, int len); -int sputs(char *pStr); -void print_byte(char byte); -void print_word(int word); -void PrintBuffer8(UINT8 *pBuf, int nbpr, int len); -void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len); - -#endif // LIBSYS_H - diff --git a/lib/CPUs/MIPS/bsp/examples/bootloader/startup_boot.S b/lib/CPUs/MIPS/bsp/examples/bootloader/startup_boot.S deleted file mode 100644 index 8da9ee0..0000000 --- a/lib/CPUs/MIPS/bsp/examples/bootloader/startup_boot.S +++ /dev/null @@ -1,43 +0,0 @@ - .file "startup.S" - - .text - .section .init,"ax" - .extern _init - .align 2 - -_start: - .set noreorder - - # set stack pointer - la $sp, stack_ptr - - # Set Kernel mode - li $26, 0x1040000C - mtc0 $26, $12 - li $26, 0x00000000 - mtc0 $26, $13 - - mfc0 $26, $15 - nop - mtc0 $26, $31 - - # Invalidate I-Cache - cop0 32 - - # Invalidate D-Cache - cop0 34 - - # jump init - la $26, _init - jalr $26 - nop - - la $26, main - jalr $26 - nop -_terminate: - nop - j _terminate - nop - - .set reorder diff --git a/lib/CPUs/MIPS/bsp/examples/cfiflash.c b/lib/CPUs/MIPS/bsp/examples/cfiflash.c deleted file mode 100644 index bbfbe43..0000000 --- a/lib/CPUs/MIPS/bsp/examples/cfiflash.c +++ /dev/null @@ -1,415 +0,0 @@ -#include -#include -#include "libsys.h" -#include "cfiflash.h" - -UINT32 cfi_get_status(flash_t *pObj) -{ - volatile UINT32 *pF; - UINT32 status; - - pF = (UINT32*)pObj->pBase; - - *pF = 0x00700070; - - status = *pF; - - *pF = 0x00FF00FF; - - return status; - -} - -void cfi_init(flash_t *pObj, UINT32 base_addr) -{ - int i; - UINT8 *pInfo; - UINT32 endian; - UINT8 *pEndian; - - pObj->pBase = (void*)base_addr; - - pInfo = (UINT8*)&pObj->info; - for (i=0; i < sizeof(flash_info_t); i++) - { - pInfo[i] = 0; - } - pObj->eb = 0; - endian = 0x12345678; - pEndian = (UINT8*)&endian; - if (*pEndian == 0x12) - { - pObj->eb = 1; - } - -} - -UINT32 cfi_find(flash_t *pObj) -{ - int i; - volatile UINT32 *pF; - volatile UINT16 *pF16; -// UINT8 qry_ref[12] = {0x51, 0x00, 0x51, 0x00, 0x52, 0x00, 0x52, 0x00, 0x59, 0x00, 0x59, 0x00}; - UINT32 size; - - pF = (UINT32*)pObj->pBase; - pF16 = (UINT16*)pObj->pBase; - - // Look for flash - *pF = 0x00980098; -// for (i=0; i < sizeof(qry_ref); i++) -// if (((UINT8*)(&pF[0x10]))[i] != qry_ref[i]) -// return (UINT32)-1; - - *pF = 0x00FF00FF; - *pF = 0x00900090; - -/* - printf("ManID : %8.8X\n", (UINT32)pF[0]); - printf("Device code : %8.8X\n", (UINT32)pF[1]); - printf("Block info : %8.8X\n", (UINT32)pF[2]); - - printf("VCC(min) : %8.8X\n", (UINT32)pF[0x1B]); - printf("VCC(max) : %8.8X\n", (UINT32)pF[0x1C]); - printf("VPP(min) : %8.8X\n", (UINT32)pF[0x1D]); - printf("VPP(max) : %8.8X\n", (UINT32)pF[0x1E]); - printf("Device Layout : %8.8X\n", (UINT32)pF[0x27]); - printf("Interface type : %8.8X %8.8X\n", (UINT32)pF[0x28], (UINT32)pF[0x29]); - printf("Write buffer size : %8.8X %8.8X\n", (UINT32)pF[0x2A], (UINT32)pF[0x2B]); - printf("Num. erase blocks : %8.8X\n", (UINT32)pF[0x2C]); - printf("Erase block info : %8.8X %8.8X %8.8X %8.8X\n", (UINT32)pF[0x2D], (UINT32)pF[0x2E], (UINT32)pF[0x2F], (UINT32)pF[0x30]); -*/ - pObj->info.num_flash = 2; - pObj->info.if_width = 32; - size = (UINT32)pF16[2*0x27]; - pObj->info.flashsize = pObj->info.num_flash; - for (i=0; i < size; i++) - pObj->info.flashsize *= 2; - - size = (UINT32)(pF16[2*0x2B] << 8 | pF16[2*0x2A]); - pObj->info.wbuf_size = pObj->info.num_flash; - for (i=0; i < size; i++) - pObj->info.wbuf_size *= 2; - - pObj->info.nblocks = (UINT32)(pF16[2*0x2E] << 8 | pF16[2*0x2D]) + 1; - pObj->info.blocksize = pObj->info.num_flash * ((UINT32)(pF16[2*0x30] << 8 | pF16[2*0x2F]) * 256); - - *pF = 0x00FF00FF; - - return 0; -} - -UINT32 cfi_block_is_locked(flash_t *pObj, UINT32 word_index) -{ - volatile UINT32 *pF; - UINT32 status, block_index, block_mask; - UINT32 error; - - pF = (UINT32*)pObj->pBase; - - if (word_index >= (pObj->info.flashsize/4)) - return CFI_ERR_INVPARAM; - - block_mask = ((pObj->info.nblocks-1) << 16); - block_index = word_index & block_mask; - - *pF = 0x00900090; - - error = ((UINT32)pF[block_index+2] & 0x00010001) != 0; - *pF = 0x00FF00FF; - - return error; -} - -UINT32 cfi_block_erase(flash_t *pObj, UINT32 word_index) -{ - volatile UINT32 *pF; - UINT32 status, block_index, block_mask; - UINT32 error; - - pF = (UINT32*)pObj->pBase; - - if (word_index >= (pObj->info.flashsize/4)) - return CFI_ERR_INVPARAM; - - block_mask = ((pObj->info.nblocks-1) << 16); - block_index = word_index & block_mask; - - pF[block_index] = 0x00200020; - pF[block_index] = 0x00D000D0; - - error = 0; - do - { - status = pF[block_index]; - - } while((status & SR_BIT_ISMS) != SR_BIT_ISMS); - - if (status & (SR_BIT_ECLBS | SR_BIT_VPENS | SR_BIT_DPS)) - { - error = CFI_ERR_DEV_FAIL | status; - } - - pF[block_index] = 0x00FF00FF; - - return error; -} - -UINT32 cfi_block_lock(flash_t *pObj, UINT32 word_index) -{ - volatile UINT32 *pF; - UINT32 status, block_index, block_mask; - UINT32 error; - - pF = (UINT32*)pObj->pBase; - - if (word_index >= (pObj->info.flashsize/4)) - return CFI_ERR_INVPARAM; - - block_mask = ((pObj->info.nblocks-1) << 16); - block_index = word_index & block_mask; - - pF[block_index] = 0x00600060; - pF[block_index] = 0x00010001; - - error = 0; - do - { - status = pF[block_index]; - - } while((status & SR_BIT_ISMS) != SR_BIT_ISMS); - - if (status & (SR_BIT_PSLBS | SR_BIT_VPENS | SR_BIT_ECLBS)) - { - error = CFI_ERR_DEV_FAIL | status; - } - - pF[block_index] = 0x00FF00FF; - - return error; -} - -UINT32 cfi_block_unlock(flash_t *pObj, UINT32 word_index) -{ - volatile UINT32 *pF; - UINT32 status, block_index, block_mask; - UINT32 error; - - pF = (UINT32*)pObj->pBase; - - if (word_index >= (pObj->info.flashsize/4)) - return CFI_ERR_INVPARAM; - - block_mask = ((pObj->info.nblocks-1) << 16); - block_index = word_index & block_mask; - - pF[block_index] = 0x00600060; - pF[block_index] = 0x00D000D0; - - error = 0; - do - { - status = pF[block_index]; - - } while((status & SR_BIT_ISMS) != SR_BIT_ISMS); - - if (status & (SR_BIT_PSLBS | SR_BIT_VPENS | SR_BIT_ECLBS)) - { - error = CFI_ERR_DEV_FAIL | status; - } - - pF[block_index] = 0x00FF00FF; - - return error; -} - -UINT32 cfi_program_single(flash_t *pObj, UINT32 word_index, UINT32 word) -{ - volatile UINT32 *pF; - UINT32 status, error; - - pF = (UINT32*)pObj->pBase; - - if (word_index >= (pObj->info.flashsize/4)) - return CFI_ERR_INVPARAM; - - pF[word_index] = 0x00400040; - pF[word_index] = word; - - error = 0; - do - { - status = pF[word_index]; - - } while((status & SR_BIT_ISMS) != SR_BIT_ISMS); - - if (status & (SR_BIT_PSLBS | SR_BIT_VPENS | SR_BIT_DPS)) - { - error = CFI_ERR_DEV_FAIL | status; - } - - pF[word_index] = 0x00FF00FF; - - return error; - -} - -UINT32 cfi_program_multi(flash_t *pObj, UINT32 word_index, UINT32 *pWords, UINT32 num_words) -{ - int i, j, k; - volatile UINT32 *pF; - UINT32 status, bcurr, bnext, block_mask, nblock_write, nbuf_write; - UINT32 error; - - pF = (UINT32*)pObj->pBase; - - if (word_index >= (pObj->info.flashsize/4)) - return CFI_ERR_INVPARAM; - - block_mask = ((pObj->info.nblocks-1) << 16); - - k = 0; - while(num_words) - { - - bcurr = word_index & block_mask; - bnext = bcurr + (1 << 16); - nblock_write = bnext - word_index; - if (nblock_write > num_words) - nblock_write = num_words; - - while(nblock_write) - { - error = 0; - pF[bcurr] = 0x00E800E8; - do - { - status = pF[bcurr]; - - } while((status & SR_BIT_ISMS) != SR_BIT_ISMS); - if (status & (SR_BIT_PSLBS | SR_BIT_VPENS | SR_BIT_DPS)) - { - error = CFI_ERR_DEV_FAIL | status; - break; - } - - nbuf_write = nblock_write; - if (nblock_write > pObj->info.wbuf_size/4) - nbuf_write = pObj->info.wbuf_size/4; - - pF[bcurr] = (nbuf_write-1) << 16 | (nbuf_write-1); - - for (j=0; j < nbuf_write; j++) - pF[word_index+j] = pWords[k++]; - - word_index += j; - nblock_write -= j; - num_words -= j; - - error = 0; - pF[bcurr] = 0x00D000D0; - do - { - status = pF[bcurr]; - - } while((status & SR_BIT_ISMS) != SR_BIT_ISMS); - if (status & (SR_BIT_PSLBS | SR_BIT_VPENS | SR_BIT_DPS)) - { - error = CFI_ERR_DEV_FAIL | status; - break; - } - - pF[bcurr] = 0x00FF00FF; - } - - if (IS_ERROR(error)) - { - pF[bcurr] = 0x00FF00FF; - break; - } - bcurr = bnext; - } - - return error; - -} - -UINT32 flash_find(flash_t *pObj, UINT32 base_addr) -{ - cfi_init(pObj, base_addr); - return cfi_find(pObj); -} - -UINT32 flash_erase(flash_t *pObj, UINT32 offset, UINT32 size) -{ - int i; - UINT32 offset_end, error; - - if (size % 4) - size = 4*(size/4 + 1); - - offset_end = offset + size; - - for (i=offset; i < offset_end; i += pObj->info.blocksize) - { - if (cfi_block_is_locked(pObj, i/4)) - { - error = cfi_block_unlock(pObj, i/4); - if (IS_ERROR(error)) - break; - } - error = cfi_block_erase(pObj, i/4); - if (IS_ERROR(error)) - break; - } - - return error; - -} - -UINT32 flash_program(flash_t *pObj, UINT32 offset, UINT8 *pData, UINT32 size) -{ - if (size % 4) - size = 4*(size/4 + 1); - - return cfi_program_multi(pObj, offset/4, (UINT32*)pData, size/4); -} - -UINT32 flash_verify(flash_t *pObj, UINT32 offset, UINT8 *pData, UINT32 size) -{ - int i; - UINT8 *pF; - - pF = (UINT8*)(pObj->pBase + offset); - - for (i=0; i < size; i++) - if (pF[i] != pData[i]) - return CFI_ERR_VFY_FAIL; - - return 0; -} - -UINT32 flash_get_blocknum_by_offset(flash_t *pObj, UINT32 offset) -{ - UINT32 blocknum; - - blocknum = offset/pObj->info.blocksize; - if (offset%pObj->info.blocksize) - blocknum++; - - return blocknum; -} - -UINT32 flash_get_offset_by_blocknum(flash_t *pObj, UINT32 blocknum) -{ - if (blocknum >= pObj->info.nblocks) - blocknum = pObj->info.nblocks - 1; - - return blocknum*pObj->info.blocksize; -} - -UINT32 flash_get_offset_blockaligned(flash_t *pObj, UINT32 offset) -{ - return flash_get_blocknum_by_offset(pObj, offset) * pObj->info.blocksize; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/cfiflash.h b/lib/CPUs/MIPS/bsp/examples/cfiflash.h deleted file mode 100644 index 1233642..0000000 --- a/lib/CPUs/MIPS/bsp/examples/cfiflash.h +++ /dev/null @@ -1,58 +0,0 @@ -/************************************************************************/ -#ifndef CFIFLASH_H -#define CFIFLASH_H - -#include "libsys.h" - -#define SR_BIT_DPS 0x00020002 -#define SR_BIT_PSS 0x00040004 -#define SR_BIT_VPENS 0x00080008 -#define SR_BIT_PSLBS 0x00100010 -#define SR_BIT_ECLBS 0x00200020 -#define SR_BIT_ESS 0x00400040 -#define SR_BIT_ISMS 0x00800080 - -#define CFI_ERR_BASE (LSYS_ERR_BASE + 0x00100000) -#define CFI_ERR_GENERAL (CFI_ERR_BASE + 0) -#define CFI_ERR_NOTFOUND (CFI_ERR_BASE + 1) -#define CFI_ERR_INVPARAM (CFI_ERR_BASE + 2) -#define CFI_ERR_VFY_FAIL (CFI_ERR_BASE + 3) -#define CFI_ERR_DEV_FAIL (CFI_ERR_BASE + 0x10000000) - -typedef struct _sflash_info_t -{ - UINT32 flashsize; - UINT32 blocksize; - UINT32 nblocks; - UINT32 wbuf_size; - UINT32 if_width; - UINT32 num_flash; - -} flash_info_t; - -typedef struct _sflash_t -{ - void *pBase; - UINT32 eb; - flash_info_t info; - -} flash_t; - -void cfi_init(flash_t *pObj, UINT32 base_addr); -UINT32 cfi_find(flash_t *pObj); -UINT32 cfi_block_is_locked(flash_t *pObj, UINT32 word_index); -UINT32 cfi_block_erase(flash_t *pObj, UINT32 word_index); -UINT32 cfi_block_lock(flash_t *pObj, UINT32 word_index); -UINT32 cfi_block_unlock(flash_t *pObj, UINT32 word_index); -UINT32 cfi_program_single(flash_t *pObj, UINT32 word_index, UINT32 word); -UINT32 cfi_program_multi(flash_t *pObj, UINT32 word_index, UINT32 *pWords, UINT32 num_words); - -UINT32 flash_get_offset_by_blocknum(flash_t *pObj, UINT32 blocknum); -UINT32 flash_get_blocknum_by_offset(flash_t *pObj, UINT32 offset); -UINT32 flash_get_offset_blockaligned(flash_t *pObj, UINT32 offset); -UINT32 flash_find(flash_t *pObj, UINT32 base_addr); -UINT32 flash_erase(flash_t *pObj, UINT32 offset, UINT32 size); -UINT32 flash_program(flash_t *pObj, UINT32 offset, UINT8 *pData, UINT32 size); -UINT32 flash_verify(flash_t *pObj, UINT32 offset, UINT8 *pData, UINT32 size); - -#endif // CFIFLASH_H diff --git a/lib/CPUs/MIPS/bsp/examples/crc32.c b/lib/CPUs/MIPS/bsp/examples/crc32.c deleted file mode 100644 index 6f63429..0000000 --- a/lib/CPUs/MIPS/bsp/examples/crc32.c +++ /dev/null @@ -1,54 +0,0 @@ -#include - -unsigned long MakeCRC32(char *data, unsigned int len, unsigned int CRC) -{ - /* ======================================================================== - * Table of CRC-32's of all single-byte values (made by makecrc.c) - */ - unsigned long crc_32_tab[] = { - 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L, 0x706af48fL, 0xe963a535L, 0x9e6495a3L, - 0x0edb8832L, 0x79dcb8a4L, 0xe0d5e91eL, 0x97d2d988L, 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L, 0x90bf1d91L, - 0x1db71064L, 0x6ab020f2L, 0xf3b97148L, 0x84be41deL, 0x1adad47dL, 0x6ddde4ebL, 0xf4d4b551L, 0x83d385c7L, - 0x136c9856L, 0x646ba8c0L, 0xfd62f97aL, 0x8a65c9ecL, 0x14015c4fL, 0x63066cd9L, 0xfa0f3d63L, 0x8d080df5L, - 0x3b6e20c8L, 0x4c69105eL, 0xd56041e4L, 0xa2677172L, 0x3c03e4d1L, 0x4b04d447L, 0xd20d85fdL, 0xa50ab56bL, - 0x35b5a8faL, 0x42b2986cL, 0xdbbbc9d6L, 0xacbcf940L, 0x32d86ce3L, 0x45df5c75L, 0xdcd60dcfL, 0xabd13d59L, - 0x26d930acL, 0x51de003aL, 0xc8d75180L, 0xbfd06116L, 0x21b4f4b5L, 0x56b3c423L, 0xcfba9599L, 0xb8bda50fL, - 0x2802b89eL, 0x5f058808L, 0xc60cd9b2L, 0xb10be924L, 0x2f6f7c87L, 0x58684c11L, 0xc1611dabL, 0xb6662d3dL, - 0x76dc4190L, 0x01db7106L, 0x98d220bcL, 0xefd5102aL, 0x71b18589L, 0x06b6b51fL, 0x9fbfe4a5L, 0xe8b8d433L, - 0x7807c9a2L, 0x0f00f934L, 0x9609a88eL, 0xe10e9818L, 0x7f6a0dbbL, 0x086d3d2dL, 0x91646c97L, 0xe6635c01L, - 0x6b6b51f4L, 0x1c6c6162L, 0x856530d8L, 0xf262004eL, 0x6c0695edL, 0x1b01a57bL, 0x8208f4c1L, 0xf50fc457L, - 0x65b0d9c6L, 0x12b7e950L, 0x8bbeb8eaL, 0xfcb9887cL, 0x62dd1ddfL, 0x15da2d49L, 0x8cd37cf3L, 0xfbd44c65L, - 0x4db26158L, 0x3ab551ceL, 0xa3bc0074L, 0xd4bb30e2L, 0x4adfa541L, 0x3dd895d7L, 0xa4d1c46dL, 0xd3d6f4fbL, - 0x4369e96aL, 0x346ed9fcL, 0xad678846L, 0xda60b8d0L, 0x44042d73L, 0x33031de5L, 0xaa0a4c5fL, 0xdd0d7cc9L, - 0x5005713cL, 0x270241aaL, 0xbe0b1010L, 0xc90c2086L, 0x5768b525L, 0x206f85b3L, 0xb966d409L, 0xce61e49fL, - 0x5edef90eL, 0x29d9c998L, 0xb0d09822L, 0xc7d7a8b4L, 0x59b33d17L, 0x2eb40d81L, 0xb7bd5c3bL, 0xc0ba6cadL, - 0xedb88320L, 0x9abfb3b6L, 0x03b6e20cL, 0x74b1d29aL, 0xead54739L, 0x9dd277afL, 0x04db2615L, 0x73dc1683L, - 0xe3630b12L, 0x94643b84L, 0x0d6d6a3eL, 0x7a6a5aa8L, 0xe40ecf0bL, 0x9309ff9dL, 0x0a00ae27L, 0x7d079eb1L, - 0xf00f9344L, 0x8708a3d2L, 0x1e01f268L, 0x6906c2feL, 0xf762575dL, 0x806567cbL, 0x196c3671L, 0x6e6b06e7L, - 0xfed41b76L, 0x89d32be0L, 0x10da7a5aL, 0x67dd4accL, 0xf9b9df6fL, 0x8ebeeff9L, 0x17b7be43L, 0x60b08ed5L, - 0xd6d6a3e8L, 0xa1d1937eL, 0x38d8c2c4L, 0x4fdff252L, 0xd1bb67f1L, 0xa6bc5767L, 0x3fb506ddL, 0x48b2364bL, - 0xd80d2bdaL, 0xaf0a1b4cL, 0x36034af6L, 0x41047a60L, 0xdf60efc3L, 0xa867df55L, 0x316e8eefL, 0x4669be79L, - 0xcb61b38cL, 0xbc66831aL, 0x256fd2a0L, 0x5268e236L, 0xcc0c7795L, 0xbb0b4703L, 0x220216b9L, 0x5505262fL, - 0xc5ba3bbeL, 0xb2bd0b28L, 0x2bb45a92L, 0x5cb36a04L, 0xc2d7ffa7L, 0xb5d0cf31L, 0x2cd99e8bL, 0x5bdeae1dL, - 0x9b64c2b0L, 0xec63f226L, 0x756aa39cL, 0x026d930aL, 0x9c0906a9L, 0xeb0e363fL, 0x72076785L, 0x05005713L, - 0x95bf4a82L, 0xe2b87a14L, 0x7bb12baeL, 0x0cb61b38L, 0x92d28e9bL, 0xe5d5be0dL, 0x7cdcefb7L, 0x0bdbdf21L, - 0x86d3d2d4L, 0xf1d4e242L, 0x68ddb3f8L, 0x1fda836eL, 0x81be16cdL, 0xf6b9265bL, 0x6fb077e1L, 0x18b74777L, - 0x88085ae6L, 0xff0f6a70L, 0x66063bcaL, 0x11010b5cL, 0x8f659effL, 0xf862ae69L, 0x616bffd3L, 0x166ccf45L, - 0xa00ae278L, 0xd70dd2eeL, 0x4e048354L, 0x3903b3c2L, 0xa7672661L, 0xd06016f7L, 0x4969474dL, 0x3e6e77dbL, - 0xaed16a4aL, 0xd9d65adcL, 0x40df0b66L, 0x37d83bf0L, 0xa9bcae53L, 0xdebb9ec5L, 0x47b2cf7fL, 0x30b5ffe9L, - 0xbdbdf21cL, 0xcabac28aL, 0x53b39330L, 0x24b4a3a6L, 0xbad03605L, 0xcdd70693L, 0x54de5729L, 0x23d967bfL, - 0xb3667a2eL, 0xc4614ab8L, 0x5d681b02L, 0x2a6f2b94L, 0xb40bbe37L, 0xc30c8ea1L, 0x5a05df1bL, 0x2d02ef8dL - }; - - if (data == NULL) - return 0; - - CRC = ~CRC; - while (len --) - { - CRC = crc_32_tab[((unsigned char) CRC ^ *data) & 0xFF] ^ (CRC >> 8); - data ++; - } - - return ~CRC; -} diff --git a/lib/CPUs/MIPS/bsp/examples/crc32.h b/lib/CPUs/MIPS/bsp/examples/crc32.h deleted file mode 100644 index 04687b0..0000000 --- a/lib/CPUs/MIPS/bsp/examples/crc32.h +++ /dev/null @@ -1,13 +0,0 @@ -// CRC32 function -// To create a CRC from a new buffer, use this: -// crc = MakeCRC32(mydata, data_len, 0); -// If you need to continue the CRC (e.g. your data is in multiple buffers), -// continue like this: -// crc = MakeCRC32(moredata, more_len, crc); -// -// Your desired CRC should be the complement of the CRC generated by -// MakeCRC32: -// desired = crc -// desired - crc = 0 - -unsigned long MakeCRC32(char *data, unsigned int len, unsigned long CRC); diff --git a/lib/CPUs/MIPS/bsp/examples/cubic.c b/lib/CPUs/MIPS/bsp/examples/cubic.c deleted file mode 100644 index 7740eb2..0000000 --- a/lib/CPUs/MIPS/bsp/examples/cubic.c +++ /dev/null @@ -1,64 +0,0 @@ -/* +++Date last modified: 05-Jul-1997 */ - -/* -** CUBIC.C - Solve a cubic polynomial -** public domain by Ross Cottrell -*/ - -#include -#include -#include "snipmath.h" - -void SolveCubic(double a, - double b, - double c, - double d, - int *solutions, - double *x) -{ - long double a1 = b/a, a2 = c/a, a3 = d/a; - long double Q = (a1*a1 - 3.0*a2)/9.0; - long double R = (2.0*a1*a1*a1 - 9.0*a1*a2 + 27.0*a3)/54.0; - double R2_Q3 = R*R - Q*Q*Q; - - double theta; - - if (R2_Q3 <= 0) - { - *solutions = 3; - theta = acos(R/sqrt(Q*Q*Q)); - x[0] = -2.0*sqrt(Q)*cos(theta/3.0) - a1/3.0; - x[1] = -2.0*sqrt(Q)*cos((theta+2.0*PI)/3.0) - a1/3.0; - x[2] = -2.0*sqrt(Q)*cos((theta+4.0*PI)/3.0) - a1/3.0; - } - else - { - *solutions = 1; - x[0] = pow(sqrt(R2_Q3)+fabs(R), 1/3.0); - x[0] += Q/x[0]; - x[0] *= (R < 0.0) ? 1 : -1; - x[0] -= a1/3.0; - } -} - -#ifdef TEST - -int main(void) -{ - double a1 = 1.0, b1 = -10.5, c1 = 32.0, d1 = -30.0; - double a2 = 1.0, b2 = -4.5, c2 = 17.0, d2 = -30.0; - double x[3]; - int solutions; - - SolveCubic(a1, b1, c1, d1, &solutions, x); - - /* should get 3 solutions: 2, 6 & 2.5 */ - - SolveCubic(a2, b2, c2, d2, &solutions, x); - - /* should get 1 solution: 2.5 */ - - return 0; -} - -#endif /* TEST */ diff --git a/lib/CPUs/MIPS/bsp/examples/dbg.c b/lib/CPUs/MIPS/bsp/examples/dbg.c deleted file mode 100644 index fc5a429..0000000 --- a/lib/CPUs/MIPS/bsp/examples/dbg.c +++ /dev/null @@ -1,375 +0,0 @@ -#include -#include -#include -#include "irq.h" -#include "libsys.h" -#include "mips_dis.h" - -#define MAX_USER_BP 16 -#define BP_MASK_ID 0x00FFF -#define BP_MASK_TYPE 0xFF000 - -#define BP_GET_ID(bp) ((bp >> 6) & 0xFFF) - -#define BP_USER_BASE 0x10000 -#define BP_USER(id) (((BP_USER_BASE + id) << 6) | 0x0D) - -#define BP_MGMT_BASE_SS 0x20000 -#define BP_MGMT_SS(id) (((BP_MGMT_BASE_SS + id) << 6) | 0x0D) - -#define BP_MGMT_BASE_RU 0x30000 -#define BP_MGMT_RU(id) (((BP_MGMT_BASE_RU + id) << 6) | 0x0D) - -static char g_buf[80]; - -typedef struct _sbp_t -{ - UINT32 *pAddr; - UINT32 instr; -} bp_t; - -static EXCEPTION_CONTEXT xcp_last; -static bp_t user_bp[MAX_USER_BP]; -static bp_t mgmt_bp_ss[2]; -static bp_t mgmt_bp_ru[2]; -static int g_is_ss; -static int g_bp_index; - -int IsBreak(UINT32 instr) -{ - return ((instr & 0xFC00003F) == 0x0000000D); -} - -UINT32 BreakGetType(UINT32 instr) -{ - return (instr >> 6) & BP_MASK_TYPE; -} - -char* reg_changed(UINT32 reg1, UINT32 reg2) -{ - static char chg_str[2] = {0}; - - if (reg1 != reg2) - chg_str[0] = '*'; - else - chg_str[0] = ' '; - - return chg_str; -} - -void dbg_handler(struct xcptcontext * xcp) -{ - - UINT32 bp_addr, bp_index = 0, branch_addr, reg, result, bp_type; - int junk, i, leave_isr, is_branch_shadow, is_user_bp; - UINT32 volatile *pBtn = (UINT32*)SYS_GPIO0; - UINT32 *pInstr, *pAddr_curr, *pAddr_prev, *pAddr_next; - - sputs("\n"); - PRINT_REG_CHG(" Status : ", xcp->sr, reg_changed(xcp->sr, xcp_last.sr)); - PRINT_REG_CHG(" Cause : ", xcp->cr, reg_changed(xcp->cr, xcp_last.cr)); - PRINT_REG_CHG(" EPC : ", xcp->epc, reg_changed(xcp->epc, xcp_last.epc)); - PRINT_REG_CHG("BadAddr : ", xcp->baddr, reg_changed(xcp->baddr, xcp_last.baddr)); - sputs("\n"); - PRINT_REG_CHG(" MDLO : ", xcp->mdlo, reg_changed(xcp->mdlo, xcp_last.mdlo)); - PRINT_REG_CHG(" MDHI : ", xcp->mdhi, reg_changed(xcp->mdhi, xcp_last.mdhi)); - - sputs("\n"); - - sputs("Registers:\n"); - PRINT_REG_CHG(" 0 (ze) : ", xcp->regs[0], reg_changed(xcp->regs[0], xcp_last.regs[0])); - PRINT_REG_CHG(" 1 (at) : ", xcp->regs[1], reg_changed(xcp->regs[1], xcp_last.regs[1])); - PRINT_REG_CHG(" 2 (v0) : ", xcp->regs[2], reg_changed(xcp->regs[2], xcp_last.regs[2])); - PRINT_REG_CHG(" 3 (v1) : ", xcp->regs[3], reg_changed(xcp->regs[3], xcp_last.regs[3])); - sputs("\n"); - PRINT_REG_CHG(" 4 (a0) : ", xcp->regs[4], reg_changed(xcp->regs[4], xcp_last.regs[4])); - PRINT_REG_CHG(" 5 (a1) : ", xcp->regs[5], reg_changed(xcp->regs[5], xcp_last.regs[5])); - PRINT_REG_CHG(" 6 (a2) : ", xcp->regs[6], reg_changed(xcp->regs[6], xcp_last.regs[6])); - PRINT_REG_CHG(" 7 (a3) : ", xcp->regs[7], reg_changed(xcp->regs[7], xcp_last.regs[7])); - sputs("\n"); - PRINT_REG_CHG(" 8 (t0) : ", xcp->regs[8], reg_changed(xcp->regs[8], xcp_last.regs[8])); - PRINT_REG_CHG(" 9 (t1) : ", xcp->regs[9], reg_changed(xcp->regs[9], xcp_last.regs[9])); - PRINT_REG_CHG("10 (t2) : ", xcp->regs[10], reg_changed(xcp->regs[10], xcp_last.regs[10])); - PRINT_REG_CHG("11 (t3) : ", xcp->regs[11], reg_changed(xcp->regs[11], xcp_last.regs[11])); - sputs("\n"); - PRINT_REG_CHG("12 (t4) : ", xcp->regs[12], reg_changed(xcp->regs[12], xcp_last.regs[12])); - PRINT_REG_CHG("13 (t5) : ", xcp->regs[13], reg_changed(xcp->regs[13], xcp_last.regs[13])); - PRINT_REG_CHG("14 (t6) : ", xcp->regs[14], reg_changed(xcp->regs[14], xcp_last.regs[14])); - PRINT_REG_CHG("15 (t7) : ", xcp->regs[15], reg_changed(xcp->regs[15], xcp_last.regs[15])); - sputs("\n"); - PRINT_REG_CHG("16 (s0) : ", xcp->regs[16], reg_changed(xcp->regs[16], xcp_last.regs[16])); - PRINT_REG_CHG("17 (s1) : ", xcp->regs[17], reg_changed(xcp->regs[17], xcp_last.regs[17])); - PRINT_REG_CHG("18 (s2) : ", xcp->regs[18], reg_changed(xcp->regs[18], xcp_last.regs[18])); - PRINT_REG_CHG("19 (s3) : ", xcp->regs[19], reg_changed(xcp->regs[19], xcp_last.regs[19])); - sputs("\n"); - PRINT_REG_CHG("20 (s4) : ", xcp->regs[20], reg_changed(xcp->regs[20], xcp_last.regs[20])); - PRINT_REG_CHG("21 (s5) : ", xcp->regs[21], reg_changed(xcp->regs[21], xcp_last.regs[21])); - PRINT_REG_CHG("22 (s6) : ", xcp->regs[22], reg_changed(xcp->regs[22], xcp_last.regs[22])); - PRINT_REG_CHG("23 (s7) : ", xcp->regs[23], reg_changed(xcp->regs[23], xcp_last.regs[23])); - sputs("\n"); - PRINT_REG_CHG("24 (s8) : ", xcp->regs[24], reg_changed(xcp->regs[24], xcp_last.regs[24])); - PRINT_REG_CHG("25 (s9) : ", xcp->regs[25], reg_changed(xcp->regs[25], xcp_last.regs[25])); - PRINT_REG_CHG("26 (k0) : ", xcp->regs[26], reg_changed(xcp->regs[26], xcp_last.regs[26])); - PRINT_REG_CHG("27 (k1) : ", xcp->regs[27], reg_changed(xcp->regs[27], xcp_last.regs[27])); - sputs("\n"); - PRINT_REG_CHG("28 (gp) : ", xcp->regs[28], reg_changed(xcp->regs[28], xcp_last.regs[28])); - PRINT_REG_CHG("29 (sp) : ", xcp->regs[29], reg_changed(xcp->regs[29], xcp_last.regs[29])); - PRINT_REG_CHG("30 (fp) : ", xcp->regs[30], reg_changed(xcp->regs[30], xcp_last.regs[30])); - PRINT_REG_CHG("31 (ra) : ", xcp->regs[31], reg_changed(xcp->regs[31], xcp_last.regs[31])); - sputs("\n"); - sputs("\n"); - - memcpy(&xcp_last, xcp, sizeof(EXCEPTION_CONTEXT)); - - is_user_bp = 0; - pAddr_curr = (UINT32*)xcp->epc; - is_branch_shadow = ((xcp->cr & 0x80000000) == 0x80000000); - if (is_branch_shadow) - pAddr_curr++; - - pAddr_prev = pAddr_curr - 1; - pAddr_next = pAddr_curr + 1; - - if (IsBreak(*pAddr_curr)) - { - bp_type = BreakGetType(*pAddr_curr); - - switch (bp_type) - { - case BP_MGMT_BASE_SS: - - // Restore original instructions after single-step -// sputs("1. Restore after single-step at ");print_word((long)mgmt_bp_ss[0].pAddr);sputs("\n"); - *(mgmt_bp_ss[0].pAddr) = mgmt_bp_ss[0].instr; - ICACHE_invalidate_at(mgmt_bp_ss[0].pAddr); - if (mgmt_bp_ss[1].pAddr) - { -// sputs("2. Restore after single-step at ");print_word((long)mgmt_bp_ss[1].pAddr);sputs("\n"); - *(mgmt_bp_ss[1].pAddr) = mgmt_bp_ss[1].instr; - ICACHE_invalidate_at(mgmt_bp_ss[1].pAddr); - } - - break; - - case BP_MGMT_BASE_RU: - - bp_index = BP_GET_ID(*pAddr_curr); -// sputs("Restore user break at ");print_word((long)user_bp[bp_index].pAddr);sputs("\n"); - - *(user_bp[bp_index].pAddr) = BP_USER(bp_index); - ICACHE_invalidate_at(user_bp[bp_index].pAddr); - - *(mgmt_bp_ru[0].pAddr) = mgmt_bp_ru[0].instr; - ICACHE_invalidate_at(mgmt_bp_ru[0].pAddr); -// sputs("1. Restore after RU at ");print_word((long)mgmt_bp_ru[0].pAddr);sputs("\n"); - if (mgmt_bp_ru[1].pAddr) - { - *(mgmt_bp_ru[1].pAddr) = mgmt_bp_ru[1].instr; - ICACHE_invalidate_at(mgmt_bp_ru[1].pAddr); -// sputs("2. Restore after RU at ");print_word((long)mgmt_bp_ru[1].pAddr);sputs("\n"); - } - if (!g_is_ss) - return; - - break; - - case BP_USER_BASE: - - is_user_bp = 1; - bp_index = BP_GET_ID(*pAddr_curr); -// sputs("Restore instruction at ");print_word((long)user_bp[bp_index].pAddr);sputs("\n"); - *(user_bp[bp_index].pAddr) = user_bp[bp_index].instr; - ICACHE_invalidate_at(user_bp[bp_index].pAddr); - break; - - default: -// sputs("Found ordinary break at ");print_word((long)pAddr_curr);sputs("\n"); - break; - - } - } - - pInstr = pAddr_prev; - // Disassemble instructions - for (i=0; i < 3; i++) - { - print_word((long)pInstr); - if (IsBreak(*pInstr) && (BreakGetType(*pInstr) == BP_USER_BASE)) - { - tdisasm(g_buf, (long)user_bp[BP_GET_ID(*pInstr)].pAddr, user_bp[BP_GET_ID(*pInstr)].instr, 0, &junk, &junk, &junk); - sputs(": b "); - } - else - { - tdisasm(g_buf, (long)pInstr, *pInstr, 0, &junk, &junk, &junk); - if (pInstr == pAddr_curr) - if (is_user_bp == 1) - sputs(": b-> "); - else - sputs(": -> "); - else - sputs(": "); - } - sputs(g_buf); - sputs("\n"); - pInstr++; - } - - if (is_user_bp) - { - // Save original instruction - mgmt_bp_ru[0].pAddr = pAddr_next; - mgmt_bp_ru[0].instr = *(mgmt_bp_ru[0].pAddr); - // Replace instruction with managment breakpoint - *(mgmt_bp_ru[0].pAddr) = BP_MGMT_RU(bp_index); - ICACHE_invalidate_at(mgmt_bp_ru[0].pAddr); - mgmt_bp_ru[1].pAddr = NULL; - mgmt_bp_ru[1].pAddr = 0; -// sputs("1. Insert RU-break at ");print_word((long)mgmt_bp_ru[0].pAddr);sputs("\n"); - - // We have two possible management breaks, if previous instruction was branch or jump - if (is_branch_shadow) - { - result = tdisasm(g_buf, (long)pAddr_prev, *pAddr_prev, 0, &junk, &branch_addr, ®); - // Is jump target stored in register - if (result == 3) - { - branch_addr = xcp->regs[reg&0x1F]; - } - // Save original instruction - mgmt_bp_ru[1].pAddr = (UINT32*)branch_addr; - mgmt_bp_ru[1].instr = *(mgmt_bp_ru[1].pAddr); - // Replace instruction with managment breakpoint - *(mgmt_bp_ru[1].pAddr) = BP_MGMT_RU(bp_index); - ICACHE_invalidate_at(mgmt_bp_ru[1].pAddr); -// sputs("2. Insert RU-break at ");print_word((long)mgmt_bp_ru[1].pAddr);sputs("\n"); - } - } - - do - { - leave_isr = 0; - switch(_getchar()) - { - case 'g': - leave_isr = 1; - g_is_ss = 0; - if (IsBreak(*pAddr_curr)) - { - if (BreakGetType(*pAddr_curr) != BP_USER_BASE) - { - xcp->epc += 4; // Skip ordinary program breaks - } - } - break; - - case 'b': - printf("Enter breakpoint: "); - scanf("%x", &bp_addr); - printf("Insert breakpoint at %.8X\n", bp_addr); - user_bp[g_bp_index].pAddr = (UINT32*)bp_addr; - user_bp[g_bp_index].instr = *(user_bp[g_bp_index].pAddr); - *(user_bp[g_bp_index].pAddr) = BP_USER(g_bp_index); - - tdisasm(g_buf, (long)user_bp[g_bp_index].pAddr, user_bp[g_bp_index].instr, 0, &junk, &junk, &junk); - print_word((long)user_bp[g_bp_index].pAddr);sputs(": b ");sputs(g_buf);sputs("\n"); - ICACHE_invalidate_at(user_bp[g_bp_index].pAddr); - g_bp_index++; - break; - - case 's': - g_is_ss = 1; - leave_isr = 1; - // Don't overwrite RU breaks -// printf("is_user_bp = %d, IsBreak = %d, pAddr_curr = %08X, *pAddr_curr = %08X\n", is_user_bp, IsBreak(*pAddr_curr), pAddr_curr, *pAddr_curr); - - if (is_user_bp) - break; - - // Don't overwrite user breaks - if (IsBreak(*pAddr_curr)) - { - if (BreakGetType(*pAddr_curr) == BP_USER_BASE) - { - break; - } - else - { - xcp->epc += 4; // Skip ordinary program breaks - } - } - // Save original instruction - mgmt_bp_ss[0].pAddr = pAddr_next; - mgmt_bp_ss[0].instr = *(mgmt_bp_ss[0].pAddr); - // Replace instruction with managment breakpoint - *(mgmt_bp_ss[0].pAddr) = BP_MGMT_SS(1); - ICACHE_invalidate_at(mgmt_bp_ss[0].pAddr); - mgmt_bp_ss[1].pAddr = NULL; - mgmt_bp_ss[1].pAddr = 0; - // We have two possible management breaks, if previous instruction was branch or jump - if (is_branch_shadow) - { - result = tdisasm(g_buf, (long)pAddr_prev, *pAddr_prev, 0, &junk, &branch_addr, ®); - // Is jump target stored in register - if (result == 3) - { - branch_addr = xcp->regs[reg&0x1F]; - } - // Save original instruction - mgmt_bp_ss[1].pAddr = (UINT32*)branch_addr; - mgmt_bp_ss[1].instr = *(mgmt_bp_ss[1].pAddr); - // Replace instruction with managment breakpoint - *(mgmt_bp_ss[1].pAddr) = BP_MGMT_SS(2); - ICACHE_invalidate_at(mgmt_bp_ss[1].pAddr); - } - break; - - case 'P': - g_is_ss = 1; - leave_isr = 1; - // Don't overwrite RU breaks - if (is_user_bp) - break; - // Don't overwrite user breaks - if (IsBreak(*pAddr_curr) && (BreakGetType(*pAddr_curr) == BP_USER_BASE)) - break; - - // Save original instruction - mgmt_bp_ss[0].pAddr = (UINT32*)xcp->regs[0x1F]; - mgmt_bp_ss[0].instr = *(mgmt_bp_ss[0].pAddr); - // Replace instruction with managment breakpoint - *(mgmt_bp_ss[0].pAddr) = BP_MGMT_SS(1); - ICACHE_invalidate_at(mgmt_bp_ss[0].pAddr); - mgmt_bp_ss[1].pAddr = NULL; - mgmt_bp_ss[1].pAddr = 0; - break; - - default: - break; - } - } while (!leave_isr); - -} - -void debug_int(struct xcptcontext * xcp) -{ - dbg_handler(xcp); - -} - -int debug_break(struct xcptcontext * xcp) -{ - dbg_handler(xcp); - return 0; - -} - -void dbg_init(void) -{ - memset(&xcp_last, 0, sizeof(EXCEPTION_CONTEXT)); - interrupt_register(2, debug_int); - interrupt_enable(2); - - xcpt_register(Bp, debug_break); -} - diff --git a/lib/CPUs/MIPS/bsp/examples/delay_mips.c b/lib/CPUs/MIPS/bsp/examples/delay_mips.c deleted file mode 100644 index 133a176..0000000 --- a/lib/CPUs/MIPS/bsp/examples/delay_mips.c +++ /dev/null @@ -1,15 +0,0 @@ -// MIPS delay. - -void __inline__ delay(int loops) -{ - __asm - ( - ".set noreorder\n" - "1:bnez %[loops], 1b\n" - "addiu %[loops], -1\n" - ".set reorder\n" - : - : [loops] "r" (loops) - ); -} - diff --git a/lib/CPUs/MIPS/bsp/examples/demo.c b/lib/CPUs/MIPS/bsp/examples/demo.c deleted file mode 100644 index e3fc38a..0000000 --- a/lib/CPUs/MIPS/bsp/examples/demo.c +++ /dev/null @@ -1,67 +0,0 @@ -/* -* Byte-oriented AES-256 implementation. -* All lookup tables replaced with 'on the fly' calculations. -* -* Copyright (c) 2007 Ilya O. Levin, http://www.literatecode.com -* -* Permission to use, copy, modify, and distribute this software for any -* purpose with or without fee is hereby granted, provided that the above -* copyright notice and this permission notice appear in all copies. -* -* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -*/ -#include -#include -#include -#include -#include -#include "aes256.h" - -#define DUMP(s, i, buf, sz) {printf(s); \ - for (i = 0; i < (sz);i++) \ - printf("%02x ", buf[i]); \ - printf("\n");} - - -int main (int argc, char *argv[]) -{ - aes256_context ctx; - uint8_t key[32]; - uint8_t buf[16], i; - long start, end, j; - - /* put a test vector */ - for (i = 0; i < sizeof(buf);i++) buf[i] = i * 16 + i; - for (i = 0; i < sizeof(key);i++) key[i] = i; - - DUMP("txt: ", i, buf, sizeof(buf)); - DUMP("key: ", i, key, sizeof(key)); - printf("---\n"); - - aes256_init(&ctx, key); - start = clock(); - for (j=0; j < 1000; j++) - { - aes256_encrypt_ecb(&ctx, buf); - } - end = clock(); - - printf("Speed %f blocks/s\n", (float)j/((float)(end-start)/CLOCKS_PER_SEC)); - - DUMP("enc: ", i, buf, sizeof(buf)); - printf("tst: 8e a2 b7 ca 51 67 45 bf ea fc 49 90 4b 49 60 89\n"); - - aes256_init(&ctx, key); - aes256_decrypt_ecb(&ctx, buf); - DUMP("dec: ", i, buf, sizeof(buf)); - - aes256_done(&ctx); - - return 0; -} /* main */ diff --git a/lib/CPUs/MIPS/bsp/examples/dhry.h b/lib/CPUs/MIPS/bsp/examples/dhry.h deleted file mode 100644 index c8d8f0a..0000000 --- a/lib/CPUs/MIPS/bsp/examples/dhry.h +++ /dev/null @@ -1,430 +0,0 @@ -/* - **************************************************************************** - * - * "DHRYSTONE" Benchmark Program - * ----------------------------- - * - * Version: C, Version 2.1 - * - * File: dhry.h (part 1 of 3) - * - * Date: May 25, 1988 - * - * Author: Reinhold P. Weicker - * Siemens AG, E STE 35 - * Postfach 3240 - * 8520 Erlangen - * Germany (West) - * Phone: [xxx-49]-9131-7-20330 - * (8-17 Central European Time) - * Usenet: ..!mcvax!unido!estevax!weicker - * - * Original Version (in Ada) published in - * "Communications of the ACM" vol. 27., no. 10 (Oct. 1984), - * pp. 1013 - 1030, together with the statistics - * on which the distribution of statements etc. is based. - * - * In this C version, the following C library functions are used: - * - strcpy, strcmp (inside the measurement loop) - * - printf, scanf (outside the measurement loop) - * In addition, Berkeley UNIX system calls "times ()" or "time ()" - * are used for execution time measurement. For measurements - * on other systems, these calls have to be changed. - * - * Collection of Results: - * Reinhold Weicker (address see above) and - * - * Rick Richardson - * PC Research. Inc. - * 94 Apple Orchard Drive - * Tinton Falls, NJ 07724 - * Phone: (201) 389-8963 (9-17 EST) - * Usenet: ...!uunet!pcrat!rick - * - * Please send results to Rick Richardson and/or Reinhold Weicker. - * Complete information should be given on hardware and software used. - * Hardware information includes: Machine type, CPU, type and size - * of caches; for microprocessors: clock frequency, memory speed - * (number of wait states). - * Software information includes: Compiler (and runtime library) - * manufacturer and version, compilation switches, OS version. - * The Operating System version may give an indication about the - * compiler; Dhrystone itself performs no OS calls in the measurement loop. - * - * The complete output generated by the program should be mailed - * such that at least some checks for correctness can be made. - * - *************************************************************************** - * - * History: This version C/2.1 has been made for two reasons: - * - * 1) There is an obvious need for a common C version of - * Dhrystone, since C is at present the most popular system - * programming language for the class of processors - * (microcomputers, minicomputers) where Dhrystone is used most. - * There should be, as far as possible, only one C version of - * Dhrystone such that results can be compared without - * restrictions. In the past, the C versions distributed - * by Rick Richardson (Version 1.1) and by Reinhold Weicker - * had small (though not significant) differences. - * - * 2) As far as it is possible without changes to the Dhrystone - * statistics, optimizing compilers should be prevented from - * removing significant statements. - * - * This C version has been developed in cooperation with - * Rick Richardson (Tinton Falls, NJ), it incorporates many - * ideas from the "Version 1.1" distributed previously by - * him over the UNIX network Usenet. - * I also thank Chaim Benedelac (National Semiconductor), - * David Ditzel (SUN), Earl Killian and John Mashey (MIPS), - * Alan Smith and Rafael Saavedra-Barrera (UC at Berkeley) - * for their help with comments on earlier versions of the - * benchmark. - * - * Changes: In the initialization part, this version follows mostly - * Rick Richardson's version distributed via Usenet, not the - * version distributed earlier via floppy disk by Reinhold Weicker. - * As a concession to older compilers, names have been made - * unique within the first 8 characters. - * Inside the measurement loop, this version follows the - * version previously distributed by Reinhold Weicker. - * - * At several places in the benchmark, code has been added, - * but within the measurement loop only in branches that - * are not executed. The intention is that optimizing compilers - * should be prevented from moving code out of the measurement - * loop, or from removing code altogether. Since the statements - * that are executed within the measurement loop have NOT been - * changed, the numbers defining the "Dhrystone distribution" - * (distribution of statements, operand types and locality) - * still hold. Except for sophisticated optimizing compilers, - * execution times for this version should be the same as - * for previous versions. - * - * Since it has proven difficult to subtract the time for the - * measurement loop overhead in a correct way, the loop check - * has been made a part of the benchmark. This does have - * an impact - though a very minor one - on the distribution - * statistics which have been updated for this version. - * - * All changes within the measurement loop are described - * and discussed in the companion paper "Rationale for - * Dhrystone version 2". - * - * Because of the self-imposed limitation that the order and - * distribution of the executed statements should not be - * changed, there are still cases where optimizing compilers - * may not generate code for some statements. To a certain - * degree, this is unavoidable for small synthetic benchmarks. - * Users of the benchmark are advised to check code listings - * whether code is generated for all statements of Dhrystone. - * - * Version 2.1 is identical to version 2.0 distributed via - * the UNIX network Usenet in March 1988 except that it corrects - * some minor deficiencies that were found by users of version 2.0. - * The only change within the measurement loop is that a - * non-executed "else" part was added to the "if" statement in - * Func_3, and a non-executed "else" part removed from Proc_3. - * - *************************************************************************** - * - * Defines: The following "Defines" are possible: - * -DREG=register (default: Not defined) - * As an approximation to what an average C programmer - * might do, the "register" storage class is applied - * (if enabled by -DREG=register) - * - for local variables, if they are used (dynamically) - * five or more times - * - for parameters if they are used (dynamically) - * six or more times - * Note that an optimal "register" strategy is - * compiler-dependent, and that "register" declarations - * do not necessarily lead to faster execution. - * -DNOSTRUCTASSIGN (default: Not defined) - * Define if the C compiler does not support - * assignment of structures. - * -DNOENUMS (default: Not defined) - * Define if the C compiler does not support - * enumeration types. - * -DTIMES (default) - * -DTIME - * The "times" function of UNIX (returning process times) - * or the "time" function (returning wallclock time) - * is used for measurement. - * For single user machines, "time ()" is adequate. For - * multi-user machines where you cannot get single-user - * access, use the "times ()" function. If you have - * neither, use a stopwatch in the dead of night. - * "printf"s are provided marking the points "Start Timer" - * and "Stop Timer". DO NOT use the UNIX "time(1)" - * command, as this will measure the total time to - * run this program, which will (erroneously) include - * the time to allocate storage (malloc) and to perform - * the initialization. - * -DHZ=nnn - * In Berkeley UNIX, the function "times" returns process - * time in 1/HZ seconds, with HZ = 60 for most systems. - * CHECK YOUR SYSTEM DESCRIPTION BEFORE YOU JUST APPLY - * A VALUE. - * - *************************************************************************** - * - * Compilation model and measurement (IMPORTANT): - * - * This C version of Dhrystone consists of three files: - * - dhry.h (this file, containing global definitions and comments) - * - dhry_1.c (containing the code corresponding to Ada package Pack_1) - * - dhry_2.c (containing the code corresponding to Ada package Pack_2) - * - * The following "ground rules" apply for measurements: - * - Separate compilation - * - No procedure merging - * - Otherwise, compiler optimizations are allowed but should be indicated - * - Default results are those without register declarations - * See the companion paper "Rationale for Dhrystone Version 2" for a more - * detailed discussion of these ground rules. - * - * For 16-Bit processors (e.g. 80186, 80286), times for all compilation - * models ("small", "medium", "large" etc.) should be given if possible, - * together with a definition of these models for the compiler system used. - * - ************************************************************************** - * - * Dhrystone (C version) statistics: - * - * [Comment from the first distribution, updated for version 2. - * Note that because of language differences, the numbers are slightly - * different from the Ada version.] - * - * The following program contains statements of a high level programming - * language (here: C) in a distribution considered representative: - * - * assignments 52 (51.0 %) - * control statements 33 (32.4 %) - * procedure, function calls 17 (16.7 %) - * - * 103 statements are dynamically executed. The program is balanced with - * respect to the three aspects: - * - * - statement type - * - operand type - * - operand locality - * operand global, local, parameter, or constant. - * - * The combination of these three aspects is balanced only approximately. - * - * 1. Statement Type: - * ----------------- number - * - * V1 = V2 9 - * (incl. V1 = F(..) - * V = Constant 12 - * Assignment, 7 - * with array element - * Assignment, 6 - * with record component - * -- - * 34 34 - * - * X = Y +|-|"&&"|"|" Z 5 - * X = Y +|-|"==" Constant 6 - * X = X +|- 1 3 - * X = Y *|/ Z 2 - * X = Expression, 1 - * two operators - * X = Expression, 1 - * three operators - * -- - * 18 18 - * - * if .... 14 - * with "else" 7 - * without "else" 7 - * executed 3 - * not executed 4 - * for ... 7 | counted every time - * while ... 4 | the loop condition - * do ... while 1 | is evaluated - * switch ... 1 - * break 1 - * declaration with 1 - * initialization - * -- - * 34 34 - * - * P (...) procedure call 11 - * user procedure 10 - * library procedure 1 - * X = F (...) - * function call 6 - * user function 5 - * library function 1 - * -- - * 17 17 - * --- - * 103 - * - * The average number of parameters in procedure or function calls - * is 1.82 (not counting the function values aX * - * - * 2. Operators - * ------------ - * number approximate - * percentage - * - * Arithmetic 32 50.8 - * - * + 21 33.3 - * - 7 11.1 - * * 3 4.8 - * / (int div) 1 1.6 - * - * Comparison 27 42.8 - * - * == 9 14.3 - * /= 4 6.3 - * > 1 1.6 - * < 3 4.8 - * >= 1 1.6 - * <= 9 14.3 - * - * Logic 4 6.3 - * - * && (AND-THEN) 1 1.6 - * | (OR) 1 1.6 - * ! (NOT) 2 3.2 - * - * -- ----- - * 63 100.1 - * - * - * 3. Operand Type (counted once per operand reference): - * --------------- - * number approximate - * percentage - * - * Integer 175 72.3 % - * Character 45 18.6 % - * Pointer 12 5.0 % - * String30 6 2.5 % - * Array 2 0.8 % - * Record 2 0.8 % - * --- ------- - * 242 100.0 % - * - * When there is an access path leading to the final operand (e.g. a record - * component), only the final data type on the access path is counted. - * - * - * 4. Operand Locality: - * ------------------- - * number approximate - * percentage - * - * local variable 114 47.1 % - * global variable 22 9.1 % - * parameter 45 18.6 % - * value 23 9.5 % - * reference 22 9.1 % - * function result 6 2.5 % - * constant 55 22.7 % - * --- ------- - * 242 100.0 % - * - * - * The program does not compute anything meaningful, but it is syntactically - * and semantically correct. All variables have a value assigned to them - * before they are used as a source operand. - * - * There has been no explicit effort to account for the effects of a - * cache, or to balance the use of long or short displacements for code or - * data. - * - *************************************************************************** - */ - -/* Compiler and system dependent definitions: */ - -#ifndef TIME -#undef TIMES -#define TIMES -#endif - /* Use times(2) time function unless */ - /* explicitly defined otherwise */ -#ifdef MSC_CLOCK -#undef HZ -#undef TIMES -#include -#define HZ CLK_TCK -#endif - /* Use Microsoft C hi-res clock */ - -#ifdef TIMES -#include -#include - /* for "times" */ -#endif - -#define Mic_secs_Per_Second 1000000.0 - /* Berkeley UNIX C returns process times in seconds/HZ */ - -#ifdef NOSTRUCTASSIGN -#define structassign(d, s) memcpy(&(d), &(s), sizeof(d)) -#else -#define structassign(d, s) d = s -#endif - -#ifdef NOENUM -#define Ident_1 0 -#define Ident_2 1 -#define Ident_3 2 -#define Ident_4 3 -#define Ident_5 4 - typedef int Enumeration; -#else - typedef enum {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5} - Enumeration; -#endif - /* for boolean and enumeration types in Ada, Pascal */ - -/* General definitions: */ - -#include - /* for strcpy, strcmp */ - -#define Null 0 - /* Value of a Null pointer */ -#define true 1 -#define false 0 - -typedef int One_Thirty; -typedef int One_Fifty; -typedef char Capital_Letter; -typedef int Boolean; -typedef char Str_30 [31]; -typedef int Arr_1_Dim [50]; -typedef int Arr_2_Dim [50] [50]; - -typedef struct record - { - struct record *Ptr_Comp; - Enumeration Discr; - union { - struct { - Enumeration Enum_Comp; - int Int_Comp; - char Str_Comp [31]; - } var_1; - struct { - Enumeration E_Comp_2; - char Str_2_Comp [31]; - } var_2; - struct { - char Ch_1_Comp; - char Ch_2_Comp; - } var_3; - } variant; - } Rec_Type, *Rec_Pointer; - - diff --git a/lib/CPUs/MIPS/bsp/examples/dhry_1.c b/lib/CPUs/MIPS/bsp/examples/dhry_1.c deleted file mode 100644 index f7b8373..0000000 --- a/lib/CPUs/MIPS/bsp/examples/dhry_1.c +++ /dev/null @@ -1,402 +0,0 @@ -/* - **************************************************************************** - * - * "DHRYSTONE" Benchmark Program - * ----------------------------- - * - * Version: C, Version 2.1 - * - * File: dhry_1.c (part 2 of 3) - * - * Date: May 25, 1988 - * - * Author: Reinhold P. Weicker - * - **************************************************************************** - */ - -#include "dhry.h" - -/* Global Variables: */ - -Rec_Pointer Ptr_Glob, - Next_Ptr_Glob; -int Int_Glob; -Boolean Bool_Glob; -char Ch_1_Glob, - Ch_2_Glob; -int Arr_1_Glob [50]; -int Arr_2_Glob [50] [50]; - -extern char *malloc (); -Enumeration Func_1 (); - /* forward declaration necessary since Enumeration may not simply be int */ - -#ifndef REG - Boolean Reg = false; -#define REG - /* REG becomes defined as empty */ - /* i.e. no register variables */ -#else - Boolean Reg = true; -#endif - -/* variables for time measurement: */ - -#ifdef TIMES -struct tms time_info; - /* see library function "times" */ -#define Too_Small_Time (2*HZ) - /* Measurements should last at least about 2 seconds */ -#endif -#ifdef TIME -extern long time(); - /* see library function "time" */ -#define Too_Small_Time 2 - /* Measurements should last at least 2 seconds */ -#endif -#ifdef MSC_CLOCK -extern clock_t clock(); -#define Too_Small_Time (2*HZ) -#endif - -long Begin_Time, - End_Time, - User_Time; -float Microseconds, - Dhrystones_Per_Second; - -/* end of variables for time measurement */ - - -main () -/*****/ - - /* main program, corresponds to procedures */ - /* Main and Proc_0 in the Ada version */ -{ - One_Fifty Int_1_Loc; - REG One_Fifty Int_2_Loc; - One_Fifty Int_3_Loc; - REG char Ch_Index; - Enumeration Enum_Loc; - Str_30 Str_1_Loc; - Str_30 Str_2_Loc; - REG int Run_Index; - REG int Number_Of_Runs; - - /* Initializations */ - - Next_Ptr_Glob = (Rec_Pointer) malloc (sizeof (Rec_Type)); - Ptr_Glob = (Rec_Pointer) malloc (sizeof (Rec_Type)); - - Ptr_Glob->Ptr_Comp = Next_Ptr_Glob; - Ptr_Glob->Discr = Ident_1; - Ptr_Glob->variant.var_1.Enum_Comp = Ident_3; - Ptr_Glob->variant.var_1.Int_Comp = 40; - strcpy (Ptr_Glob->variant.var_1.Str_Comp, - "DHRYSTONE PROGRAM, SOME STRING"); - strcpy (Str_1_Loc, "DHRYSTONE PROGRAM, 1'ST STRING"); - - Arr_2_Glob [8][7] = 10; - /* Was missing in published program. Without this statement, */ - /* Arr_2_Glob [8][7] would have an undefined value. */ - /* Warning: With 16-Bit processors and Number_Of_Runs > 32000, */ - /* overflow may occur for this array element. */ - - /* - printf ("\n"); - printf ("Dhrystone Benchmark, Version 2.1 (Language: C)\n"); - printf ("\n"); - if (Reg) - { - printf ("Program compiled with 'register' attribute\n"); - printf ("\n"); - } - else - { - printf ("Program compiled without 'register' attribute\n"); - printf ("\n"); - } - printf ("Please give the number of runs through the benchmark: "); - { - int n; - scanf ("%d", &n); - Number_Of_Runs = n; - } - printf ("\n"); - */ -#ifdef NRUNS - Number_Of_Runs = NRUNS; -#else - Number_Of_Runs = 2000000; -#endif - printf ("Execution starts, %d runs through Dhrystone\n", Number_Of_Runs); - - /***************/ - /* Start timer */ - /***************/ - -#ifdef TIMES - times (&time_info); - Begin_Time = (long) time_info.tms_utime; -#endif -#ifdef TIME - Begin_Time = time ( (long *) 0); -#endif -#ifdef MSC_CLOCK - Begin_Time = clock(); -#endif - - for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index) - { - - Proc_5(); - Proc_4(); - /* Ch_1_Glob == 'A', Ch_2_Glob == 'B', Bool_Glob == true */ - Int_1_Loc = 2; - Int_2_Loc = 3; - strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 2'ND STRING"); - Enum_Loc = Ident_2; - Bool_Glob = ! Func_2 (Str_1_Loc, Str_2_Loc); - /* Bool_Glob == 1 */ - while (Int_1_Loc < Int_2_Loc) /* loop body executed once */ - { - Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc; - /* Int_3_Loc == 7 */ - Proc_7 (Int_1_Loc, Int_2_Loc, &Int_3_Loc); - /* Int_3_Loc == 7 */ - Int_1_Loc += 1; - } /* while */ - /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ - Proc_8 (Arr_1_Glob, Arr_2_Glob, Int_1_Loc, Int_3_Loc); - /* Int_Glob == 5 */ - Proc_1 (Ptr_Glob); - for (Ch_Index = 'A'; Ch_Index <= Ch_2_Glob; ++Ch_Index) - /* loop body executed twice */ - { - if (Enum_Loc == Func_1 (Ch_Index, 'C')) - /* then, not executed */ - { - Proc_6 (Ident_1, &Enum_Loc); - strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 3'RD STRING"); - Int_2_Loc = Run_Index; - Int_Glob = Run_Index; - } - } - /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ - Int_2_Loc = Int_2_Loc * Int_1_Loc; - Int_1_Loc = Int_2_Loc / Int_3_Loc; - Int_2_Loc = 7 * (Int_2_Loc - Int_3_Loc) - Int_1_Loc; - /* Int_1_Loc == 1, Int_2_Loc == 13, Int_3_Loc == 7 */ - Proc_2 (&Int_1_Loc); - /* Int_1_Loc == 5 */ - - } /* loop "for Run_Index" */ - - /**************/ - /* Stop timer */ - /**************/ - -#ifdef TIMES - times (&time_info); - End_Time = (long) time_info.tms_utime; -#endif -#ifdef TIME - End_Time = time ( (long *) 0); -#endif -#ifdef MSC_CLOCK - End_Time = clock(); -#endif - /* - printf ("Execution ends\n"); - printf ("\n"); - printf ("Final values of the variables used in the benchmark:\n"); - printf ("\n"); - printf ("Int_Glob: %d\n", Int_Glob); - printf (" should be: %d\n", 5); - printf ("Bool_Glob: %d\n", Bool_Glob); - printf (" should be: %d\n", 1); - printf ("Ch_1_Glob: %c\n", Ch_1_Glob); - printf (" should be: %c\n", 'A'); - printf ("Ch_2_Glob: %c\n", Ch_2_Glob); - printf (" should be: %c\n", 'B'); - printf ("Arr_1_Glob[8]: %d\n", Arr_1_Glob[8]); - printf (" should be: %d\n", 7); - printf ("Arr_2_Glob[8][7]: %d\n", Arr_2_Glob[8][7]); - printf (" should be: Number_Of_Runs + 10\n"); - printf ("Ptr_Glob->\n"); - printf (" Ptr_Comp: %d\n", (int) Ptr_Glob->Ptr_Comp); - printf (" should be: (implementation-dependent)\n"); - printf (" Discr: %d\n", Ptr_Glob->Discr); - printf (" should be: %d\n", 0); - printf (" Enum_Comp: %d\n", Ptr_Glob->variant.var_1.Enum_Comp); - printf (" should be: %d\n", 2); - printf (" Int_Comp: %d\n", Ptr_Glob->variant.var_1.Int_Comp); - printf (" should be: %d\n", 17); - printf (" Str_Comp: %s\n", Ptr_Glob->variant.var_1.Str_Comp); - printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); - printf ("Next_Ptr_Glob->\n"); - printf (" Ptr_Comp: %d\n", (int) Next_Ptr_Glob->Ptr_Comp); - printf (" should be: (implementation-dependent), same as above\n"); - printf (" Discr: %d\n", Next_Ptr_Glob->Discr); - printf (" should be: %d\n", 0); - printf (" Enum_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Enum_Comp); - printf (" should be: %d\n", 1); - printf (" Int_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Int_Comp); - printf (" should be: %d\n", 18); - printf (" Str_Comp: %s\n", - Next_Ptr_Glob->variant.var_1.Str_Comp); - printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); - printf ("Int_1_Loc: %d\n", Int_1_Loc); - printf (" should be: %d\n", 5); - printf ("Int_2_Loc: %d\n", Int_2_Loc); - printf (" should be: %d\n", 13); - printf ("Int_3_Loc: %d\n", Int_3_Loc); - printf (" should be: %d\n", 7); - printf ("Enum_Loc: %d\n", Enum_Loc); - printf (" should be: %d\n", 1); - printf ("Str_1_Loc: %s\n", Str_1_Loc); - printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n"); - printf ("Str_2_Loc: %s\n", Str_2_Loc); - printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n"); - printf ("\n"); - -*/ - User_Time = End_Time - Begin_Time; - - if (User_Time < Too_Small_Time) - { - printf ("Measured time too small to obtain meaningful results\n"); - printf ("Please increase number of runs\n"); - printf ("\n"); - } - else - { -#ifdef TIME - Microseconds = (float) User_Time * Mic_secs_Per_Second - / (float) Number_Of_Runs; - Dhrystones_Per_Second = (float) Number_Of_Runs / (float) User_Time; -#else - Microseconds = (float) User_Time * Mic_secs_Per_Second - / ((float) HZ * ((float) Number_Of_Runs)); - Dhrystones_Per_Second = ((float) HZ * (float) Number_Of_Runs) - / (float) User_Time; -#endif - printf ("Microseconds for one run through Dhrystone: "); - printf ("%6.1f \n", Microseconds); - printf ("Dhrystones per Second: "); - printf ("%6.1f \n", Dhrystones_Per_Second); - printf ("\n"); - printf ("This equals to %6.1f DMIPS\n", Dhrystones_Per_Second/1757); - } - -} - - -Proc_1 (Ptr_Val_Par) -/******************/ - -REG Rec_Pointer Ptr_Val_Par; - /* executed once */ -{ - REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp; - /* == Ptr_Glob_Next */ - /* Local variable, initialized with Ptr_Val_Par->Ptr_Comp, */ - /* corresponds to "rename" in Ada, "with" in Pascal */ - - structassign (*Ptr_Val_Par->Ptr_Comp, *Ptr_Glob); - Ptr_Val_Par->variant.var_1.Int_Comp = 5; - Next_Record->variant.var_1.Int_Comp - = Ptr_Val_Par->variant.var_1.Int_Comp; - Next_Record->Ptr_Comp = Ptr_Val_Par->Ptr_Comp; - Proc_3 (&Next_Record->Ptr_Comp); - /* Ptr_Val_Par->Ptr_Comp->Ptr_Comp - == Ptr_Glob->Ptr_Comp */ - if (Next_Record->Discr == Ident_1) - /* then, executed */ - { - Next_Record->variant.var_1.Int_Comp = 6; - Proc_6 (Ptr_Val_Par->variant.var_1.Enum_Comp, - &Next_Record->variant.var_1.Enum_Comp); - Next_Record->Ptr_Comp = Ptr_Glob->Ptr_Comp; - Proc_7 (Next_Record->variant.var_1.Int_Comp, 10, - &Next_Record->variant.var_1.Int_Comp); - } - else /* not executed */ - structassign (*Ptr_Val_Par, *Ptr_Val_Par->Ptr_Comp); -} /* Proc_1 */ - - -Proc_2 (Int_Par_Ref) -/******************/ - /* executed once */ - /* *Int_Par_Ref == 1, becomes 4 */ - -One_Fifty *Int_Par_Ref; -{ - One_Fifty Int_Loc; - Enumeration Enum_Loc; - - Int_Loc = *Int_Par_Ref + 10; - do /* executed once */ - if (Ch_1_Glob == 'A') - /* then, executed */ - { - Int_Loc -= 1; - *Int_Par_Ref = Int_Loc - Int_Glob; - Enum_Loc = Ident_1; - } /* if */ - while (Enum_Loc != Ident_1); /* true */ -} /* Proc_2 */ - - -Proc_3 (Ptr_Ref_Par) -/******************/ - /* executed once */ - /* Ptr_Ref_Par becomes Ptr_Glob */ - -Rec_Pointer *Ptr_Ref_Par; - -{ - if (Ptr_Glob != Null) - /* then, executed */ - *Ptr_Ref_Par = Ptr_Glob->Ptr_Comp; - Proc_7 (10, Int_Glob, &Ptr_Glob->variant.var_1.Int_Comp); -} /* Proc_3 */ - - -Proc_4 () /* without parameters */ -/*******/ - /* executed once */ -{ - Boolean Bool_Loc; - - Bool_Loc = Ch_1_Glob == 'A'; - Bool_Glob = Bool_Loc | Bool_Glob; - Ch_2_Glob = 'B'; -} /* Proc_4 */ - - -Proc_5 () /* without parameters */ -/*******/ - /* executed once */ -{ - Ch_1_Glob = 'A'; - Bool_Glob = false; -} /* Proc_5 */ - - - /* Procedure for the assignment of structures, */ - /* if the C compiler doesn't support this feature */ -#ifdef NOSTRUCTASSIGN -memcpy (d, s, l) -register char *d; -register char *s; -register int l; -{ - while (l--) *d++ = *s++; -} -#endif - - diff --git a/lib/CPUs/MIPS/bsp/examples/dhry_2.c b/lib/CPUs/MIPS/bsp/examples/dhry_2.c deleted file mode 100644 index 63a3d3e..0000000 --- a/lib/CPUs/MIPS/bsp/examples/dhry_2.c +++ /dev/null @@ -1,192 +0,0 @@ -/* - **************************************************************************** - * - * "DHRYSTONE" Benchmark Program - * ----------------------------- - * - * Version: C, Version 2.1 - * - * File: dhry_2.c (part 3 of 3) - * - * Date: May 25, 1988 - * - * Author: Reinhold P. Weicker - * - **************************************************************************** - */ - -#include "dhry.h" - -#ifndef REG -#define REG - /* REG becomes defined as empty */ - /* i.e. no register variables */ -#endif - -extern int Int_Glob; -extern char Ch_1_Glob; - - -Proc_6 (Enum_Val_Par, Enum_Ref_Par) -/*********************************/ - /* executed once */ - /* Enum_Val_Par == Ident_3, Enum_Ref_Par becomes Ident_2 */ - -Enumeration Enum_Val_Par; -Enumeration *Enum_Ref_Par; -{ - *Enum_Ref_Par = Enum_Val_Par; - if (! Func_3 (Enum_Val_Par)) - /* then, not executed */ - *Enum_Ref_Par = Ident_4; - switch (Enum_Val_Par) - { - case Ident_1: - *Enum_Ref_Par = Ident_1; - break; - case Ident_2: - if (Int_Glob > 100) - /* then */ - *Enum_Ref_Par = Ident_1; - else *Enum_Ref_Par = Ident_4; - break; - case Ident_3: /* executed */ - *Enum_Ref_Par = Ident_2; - break; - case Ident_4: break; - case Ident_5: - *Enum_Ref_Par = Ident_3; - break; - } /* switch */ -} /* Proc_6 */ - - -Proc_7 (Int_1_Par_Val, Int_2_Par_Val, Int_Par_Ref) -/**********************************************/ - /* executed three times */ - /* first call: Int_1_Par_Val == 2, Int_2_Par_Val == 3, */ - /* Int_Par_Ref becomes 7 */ - /* second call: Int_1_Par_Val == 10, Int_2_Par_Val == 5, */ - /* Int_Par_Ref becomes 17 */ - /* third call: Int_1_Par_Val == 6, Int_2_Par_Val == 10, */ - /* Int_Par_Ref becomes 18 */ -One_Fifty Int_1_Par_Val; -One_Fifty Int_2_Par_Val; -One_Fifty *Int_Par_Ref; -{ - One_Fifty Int_Loc; - - Int_Loc = Int_1_Par_Val + 2; - *Int_Par_Ref = Int_2_Par_Val + Int_Loc; -} /* Proc_7 */ - - -Proc_8 (Arr_1_Par_Ref, Arr_2_Par_Ref, Int_1_Par_Val, Int_2_Par_Val) -/*********************************************************************/ - /* executed once */ - /* Int_Par_Val_1 == 3 */ - /* Int_Par_Val_2 == 7 */ -Arr_1_Dim Arr_1_Par_Ref; -Arr_2_Dim Arr_2_Par_Ref; -int Int_1_Par_Val; -int Int_2_Par_Val; -{ - REG One_Fifty Int_Index; - REG One_Fifty Int_Loc; - - Int_Loc = Int_1_Par_Val + 5; - Arr_1_Par_Ref [Int_Loc] = Int_2_Par_Val; - Arr_1_Par_Ref [Int_Loc+1] = Arr_1_Par_Ref [Int_Loc]; - Arr_1_Par_Ref [Int_Loc+30] = Int_Loc; - for (Int_Index = Int_Loc; Int_Index <= Int_Loc+1; ++Int_Index) - Arr_2_Par_Ref [Int_Loc] [Int_Index] = Int_Loc; - Arr_2_Par_Ref [Int_Loc] [Int_Loc-1] += 1; - Arr_2_Par_Ref [Int_Loc+20] [Int_Loc] = Arr_1_Par_Ref [Int_Loc]; - Int_Glob = 5; -} /* Proc_8 */ - - -Enumeration Func_1 (Ch_1_Par_Val, Ch_2_Par_Val) -/*************************************************/ - /* executed three times */ - /* first call: Ch_1_Par_Val == 'H', Ch_2_Par_Val == 'R' */ - /* second call: Ch_1_Par_Val == 'A', Ch_2_Par_Val == 'C' */ - /* third call: Ch_1_Par_Val == 'B', Ch_2_Par_Val == 'C' */ - -Capital_Letter Ch_1_Par_Val; -Capital_Letter Ch_2_Par_Val; -{ - Capital_Letter Ch_1_Loc; - Capital_Letter Ch_2_Loc; - - Ch_1_Loc = Ch_1_Par_Val; - Ch_2_Loc = Ch_1_Loc; - if (Ch_2_Loc != Ch_2_Par_Val) - /* then, executed */ - return (Ident_1); - else /* not executed */ - { - Ch_1_Glob = Ch_1_Loc; - return (Ident_2); - } -} /* Func_1 */ - - -Boolean Func_2 (Str_1_Par_Ref, Str_2_Par_Ref) -/*************************************************/ - /* executed once */ - /* Str_1_Par_Ref == "DHRYSTONE PROGRAM, 1'ST STRING" */ - /* Str_2_Par_Ref == "DHRYSTONE PROGRAM, 2'ND STRING" */ - -Str_30 Str_1_Par_Ref; -Str_30 Str_2_Par_Ref; -{ - REG One_Thirty Int_Loc; - Capital_Letter Ch_Loc; - - Int_Loc = 2; - while (Int_Loc <= 2) /* loop body executed once */ - if (Func_1 (Str_1_Par_Ref[Int_Loc], - Str_2_Par_Ref[Int_Loc+1]) == Ident_1) - /* then, executed */ - { - Ch_Loc = 'A'; - Int_Loc += 1; - } /* if, while */ - if (Ch_Loc >= 'W' && Ch_Loc < 'Z') - /* then, not executed */ - Int_Loc = 7; - if (Ch_Loc == 'R') - /* then, not executed */ - return (true); - else /* executed */ - { - if (strcmp (Str_1_Par_Ref, Str_2_Par_Ref) > 0) - /* then, not executed */ - { - Int_Loc += 7; - Int_Glob = Int_Loc; - return (true); - } - else /* executed */ - return (false); - } /* if Ch_Loc */ -} /* Func_2 */ - - -Boolean Func_3 (Enum_Par_Val) -/***************************/ - /* executed once */ - /* Enum_Par_Val == Ident_3 */ -Enumeration Enum_Par_Val; -{ - Enumeration Enum_Loc; - - Enum_Loc = Enum_Par_Val; - if (Enum_Loc == Ident_3) - /* then, executed */ - return (true); - else /* not executed */ - return (false); -} /* Func_3 */ - diff --git a/lib/CPUs/MIPS/bsp/examples/dttl.c b/lib/CPUs/MIPS/bsp/examples/dttl.c deleted file mode 100644 index 8efffa2..0000000 --- a/lib/CPUs/MIPS/bsp/examples/dttl.c +++ /dev/null @@ -1,261 +0,0 @@ -/* dttl.c -- simulation of Cassini/Huygens symbol synchronizer loop - * - * Author: Lorenzo Simone's (matlab script) - * Modifications by: Jon Hamkins (conversion to C, support routines, - * memory requirement reductions) - * Last Revised: Wed Jan 31 10:47:52 PST 2001 - */ -#define M_PI 3.1415926535897932384626433832795 - -#include -#include -#include "random.h" - -/* global variables */ -int delay, - L; /* samples per symbol */ -double Pt, /* transition density */ - sigma; /* noise standard deviation */ -long seed=-123; - -/* This function simulates a large 1-dimensional array without requiring - * storage for the whole array. This is possible because the array is - * accessed in roughly increasing indices. Thus, we only need to - * store a few symbols worth of samples in the array, and we can reuse - * the array indices as time goes on. */ -int drint(double v) -{ - return (int)(v+0.5); -} - -double -rec(int idx) -{ - static int firsttime = 1, - max, /* maximum index containing data */ - mod, /* length of ring buffer */ - b; /* value of last transmitted bit */ - static double r[2000]; /* need several symbols worth of samples */ - int i,j,k; - - /* First time, store samples for random delay and first few symbols */ - if (firsttime==1) { - firsttime=0; - for (i=0; i0.5) ? 1 : -1; /* first random symbol */ - for (j=0; j<3; j++) { /* 3 binary symbols with transition Pt */ - b = (ran1(&seed)>Pt) ? b : -b; /* next symbol value */ - for (k=0; kmax) /* check if we need to create another sample */ - { - b = (ran1(&seed)>Pt) ? b : -b; /* next symbol value */ - /* generate samples for one symbol and store in ring buffer */ - for (i=1; i<=L; i++) r[(int)(fmod(max+i,mod))] = b+sigma*gaussian(&seed); - max += L; /* maximum index for which samples exist */ - } - /* return appropriate sample from ring buffer */ - return(r[(int)(fmod(idx,mod))]); -} - -main() -{ - double - detout, /* detector output */ - I, old_I, /* in-phase accumulations */ - Q, old_Q, /* quadrature accumulations */ - T, /* transition detection */ - theta, /* baseband NCO output (radians) */ - lambda, /* normalized timing error (symbols) */ - A, alfa, Ampl, Bl, Df, - DR, Es_No, Es_No_lin, Fc1, Fc2, Fvco, Fs, Kd, Kv, - lambda_ss_sim = 0., lambda_ss_th, No, P, P_No, - sigma_lambda_sim = 0., sigma_lambda_th, SNR_sim, SNR_th, tau, Tc1, Tc2, - time, Ts, x1, Y, bit_I, bit_Q, bit; - int i, j, k, N, offset, k1, k2, EOB; - FILE *p1, *p2, *p3, *p4, *p5; - - /* Data settings */ - Fc1 = 48000; /* sample rate at DTTL input (F1/2 = 8.215MHz/2) */ - Tc1 = 1./Fc1; - - DR = 4800; /* data rate (symb/sec) */ - - Fc2 = DR; /* sampling rate pre-detection */ - Tc2 = 1./Fc2; - - L = drint(Tc2/Tc1); /* samples per symbol in the arm filters */ - offset = drint(L/2.); - - Es_No = 600.; /* dB */ - P_No = Es_No+10.*log10(DR); /* data power-over-noise spectral density */ - /* ratio (dBHz) */ - - N = 2500; /* number of symbols to simulate */ - Pt=.5; /* Transition density */ - - Bl=0.01*DR; /* loop bandwidth (Hz) */ - Df=0.001*DR; /* frequency offset */ - Fvco=DR+Df; - - tau=ran1(&seed)-.5; /* set symbol timing offset, -.5 to .5 */ - delay=drint(2.*L+tau*L+1); /* channel delay */ - - P=1.; /* data power */ - Ampl=sqrt(P); - - No=10.*log10(P*Tc2)-Es_No; /* noise spectral density (dBW/Hz) */ - sigma=sqrt(pow(10.,0.1*No)/(2.*Tc1)); - printf("sigma=%f\n",sigma); - - /* DPLL settings */ - Fs=DR; /* loop sampling frequency (Hz) */ - Ts=1./Fs; /* loop sampling time (s) */ - - /* Loop gain */ - Kd=2.*Ampl*Pt; /* phase detector gain (quants/rad) */ - /* @ high Es/No */ - Kv=1.; /* VCO gain (rad/quants) */ - - /* Analog loop filter components */ - alfa=4.*Bl/(Kd*Kv); - - /* Digital loop filter components */ - A=alfa*Ts; - - /* Initial condition */ - theta = 0; - old_I=1; - old_Q=1; - x1=0; - Y=0; - - /* Plot data files */ -// p1 = fopen("plot1.dat","w"); /* theta */ -// p2 = fopen("plot2.dat","w"); /* lambda */ -// p3 = fopen("plot3.dat","w"); /* detout */ -// p4 = fopen("plot4.dat","w"); /* I-Data */ -// p5 = fopen("plot5.dat","w"); /* Q-Data */ - - k1 = drint(0.5*N); - k2 = N; - - printf("Data rate: %.0f symbols/sec\n",DR); - printf("Sample rate at DTTL input: %.0f samples/sec\n",Fc1); - printf("Samples per symbol: %d\n",L); - printf("Random delay set to: %f symbols (%d samples)\n",tau,delay); - printf("Transition density used in random bit generation: %f\n",Pt); - printf("Es/No: %f dB\n",Es_No); - printf("Loop bandwidth: %f Hz\n",Bl); - printf("Doppler: %f Hz\n",Df); - printf("Simulation length: %d symbols (%d samples)\n\n",N,N*L+delay); - - /* Simulation Loop */ - for (i=2; i<=N; i++) - { - /* loop over symbols */ - /* find start of in-phase integration */ - for (j=1; j < L; j++) - { - if (fmod(theta + 2*M_PI * Fvco*(j+1+(i-1)*(Fc1/DR))/Fc1, 2*M_PI) - < fmod(theta + 2*M_PI * Fvco*(j +(i-1)*(Fc1/DR))/Fc1, 2*M_PI)) - break; - /* one could replace loop above with a direct calculation such as: */ - /* j=ceil((1.-modulo(theta/(2*M_PI),1.))/(Fvco*Tc1))-1.; */ - /* j+1 is the first index in the block */ - EOB=j+(i-1)*L; /* End of Block */ - } - /* In-phase integrator */ - bit_I = 0.; - printf("Symbol # %d\n", i); - printf("I[%d:%d] :\n", EOB-L+1, EOB); - for (j=EOB-L+1; j<=EOB; j++) - { - bit = rec(j); - if (bit > 0) - printf("-"); - else - printf("_"); - - bit_I += bit; - } - printf("\n"); - I = bit_I; - - /* Mid-Phase integrator */ - bit_Q = 0.; - printf("Q[%d:%d] :\n", EOB-L+offset+1, EOB+offset); - for (j=EOB-L+offset+1; j<=EOB+offset; j++) - { - bit = rec(j); - if (bit > 0) - printf("-"); - else - printf("_"); - - bit_Q += bit; - } - printf("\n\n"); - Q = bit_Q; - - Q *= 2.*M_PI/(Tc2/Tc1); - - /* Transition Detector */ - I = (I > 0) ? 1. : -1.; /* hard limiter */ - T = 0.5*(I - old_I); - - /* Detector Output */ - detout = fmod(old_Q*T,2*M_PI); - - /* Save accumulations for next time through loop */ - old_I = I; - old_Q = Q; - if (fabs(detout)>M_PI) - detout = -detout+2*M_PI*((detout>0) ? 1. : -1.); - - /* NCO */ - Y += detout*A; /* Loop filter */ - theta=Kv*Y; /* phase */ -// lambda = theta/(2.*M_PI)+(i*Tc2*Df+tau); /* normalized error */ - lambda = theta/(2.*M_PI)+(i*(Fvco/DR -1) + tau); /* normalized error */ - - /* error mean and variance calculation */ - lambda_ss_sim += lambda; /* partial sum */ - sigma_lambda_sim += lambda*lambda; /* partial sum of squares */ - - /* store phase and normalized error to data files */ -// fprintf(p1,"%f %f\n",(double)i,theta); -// fprintf(p2,"%f %f\n",(double)i,lambda); -// fprintf(p3,"%f %f\n",(double)i,detout); -// fprintf(p4,"%f %f\n",(double)i,I); -// fprintf(p5,"%f %f\n",(double)i,Q); - } -// fclose(p1); -// fclose(p2); -// fclose(p3); -// fclose(p4); -// fclose(p5); - - /* Statistics Analysis */ - /* ------------------- */ - /* complete the mean and variance calculation */ - lambda_ss_sim /= N; - sigma_lambda_sim = sigma_lambda_sim/N - lambda_ss_sim*lambda_ss_sim; - Es_No_lin = pow(10.,0.1*Es_No); -// sigma_lambda_th = Bl*Tc2/(4.*Pt*Es_No_lin*pow(erf(sqrt(Es_No_lin)),2.)); - sigma_lambda_th = Bl*Tc2/(4.*Pt*Es_No_lin*Es_No_lin); - SNR_sim = -10*log10(sigma_lambda_sim); - SNR_th = -10*log10(sigma_lambda_th); - /* Steady-State error */ - lambda_ss_th=Df/(4.*Bl); - printf("Simulation: var: %f rad^2 loop SNR: %f dB ss error: %f%%\n", - sigma_lambda_sim, SNR_sim, 100.*lambda_ss_sim); - printf("Theory: var: %f rad^2 loop SNR: %f dB ss error: %f%%\n", - sigma_lambda_th, SNR_th, 100.*lambda_ss_th); -// system("gnuplot < plot1.gp"); -// system("gnuplot < plot2.gp"); - printf("Done.\n"); -} diff --git a/lib/CPUs/MIPS/bsp/examples/gunzip.c b/lib/CPUs/MIPS/bsp/examples/gunzip.c deleted file mode 100644 index 066c88e..0000000 --- a/lib/CPUs/MIPS/bsp/examples/gunzip.c +++ /dev/null @@ -1,198 +0,0 @@ -#include -#include -#include -#include -#include -#include - -#define CPU_FREQ_HZ 100000000 -#include "libsys.h" - -#include "crc32.h" -#include "inflate.h" - -char buffer[1024*1024]; -char * volatile pPtr_r; -char * volatile pPtr_w; -volatile int timeout_cnt; -volatile int file_len; - -void handler3(void) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART0_STAT; - volatile UINT32 *pUART_data = (UINT32*)SYS_UART0_DATA; - - while(0x200 & *pUART_stat) - { -// sputs("w: "); print_word((int)pPtr_w); sputs("\n"); - if (pPtr_w == &buffer[sizeof(buffer)-1]) - pPtr_w = buffer; - *(pPtr_w++) = *pUART_data; - timeout_cnt = 100; - file_len++; - } - -} - -int READBYTE(z_stream *zs) { - if (zs->avail_in <= 0) - return -1; - - zs->avail_in --; - return *(zs->next_in ++); -} - -#define MAX_BUFOUT 16*1024*1024 -int main(int argc, char **argv) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART0_STAT; - unsigned char outData[MAX_BUFOUT]; - FILE *infp; - int i, gpflags, tmp[4]; - unsigned long size, crc; - unsigned char *fileData; - unsigned long bytes, InflatedSize, InflatedCRC, speed_count; - z_stream zs; - time_t start_time, work_time; - - UART0_setbaud(460800); - - printf("Reading gzipped stream..\n"); - - pPtr_r = buffer; - pPtr_w = buffer; - *pUART_stat = (1 << 6); - interrupt_register(3, handler3); - interrupt_enable(3); - - file_len = 0; - timeout_cnt = 1000000; - while(timeout_cnt--) - { - sleep(1); - } - - printf("file_len: %d\n", file_len); - bytes = file_len; - fileData = pPtr_r; - - zs.next_in = fileData; - zs.avail_in = (unsigned int) bytes; - zs.next_out = outData; - zs.avail_out = MAX_BUFOUT; - - tmp[0] = READBYTE(&zs); - if (tmp[0] == -1) - { - // error reading from file - printf("error reading data from file\n"); - return 0; - } - tmp[1] = READBYTE(&zs); - - if (tmp[0] != 0x1f || tmp[1] != 0x8b) { -// fprintf(stderr, "Magic number mismatch 0x%02x%02x\n", -// tmp[0], tmp[1]); - return 20; - } - - tmp[0] = READBYTE(&zs); - if(tmp[0] != 8) { -// fprintf(stderr, "Unknown compression method: 0x%02x\n", tmp[0]); - return 20; - } - - gpflags = READBYTE(&zs); - if ((gpflags & ~0x1f)) { - printf("Unknown flags set!\n"); - } - - /* Skip file modification time (4 bytes) */ - READBYTE(&zs); - READBYTE(&zs); - READBYTE(&zs); - READBYTE(&zs); - /* Skip extra flags and operating system fields (2 bytes) */ - READBYTE(&zs); - READBYTE(&zs); - - if ((gpflags & 4)) { - /* Skip extra field */ - tmp[0] = READBYTE(&zs); - tmp[1] = READBYTE(&zs); - i = tmp[0] + 256*tmp[1]; - while (i--) - { - READBYTE(&zs); - } - } - if((gpflags & 8)) { - while((READBYTE(&zs))) { - } - } - if((gpflags & 16)) { - while((READBYTE(&zs))) { - } - } - if((gpflags & 2)) { - /* Skip CRC16 */ - READBYTE(&zs); - READBYTE(&zs); - } - - printf("Go\n"); - // normal test - start_time = clock(); - if (InflateData(&zs)) - { - printf("Problem during decompression!\n"); - return 0; - } - work_time = clock() - start_time; - - -/* - // speed test - fprintf(stdout, "SPEED TEST!\n"); - speed_count = 0; - while (time(NULL) - start_time < 20) - { - zs_speed.next_in = zs.next_in; - zs_speed.next_out = zs.next_out; - zs_speed.avail_in = zs.avail_in; - zs_speed.avail_out = zs.avail_out; - if (InflateData(&zs_speed)) - { - fprintf(stdout, "Problem during decompression!\n"); - return 0; - } - speed_count ++; - } - fprintf(stdout, "speed count %ld\n", speed_count); - zs.next_in = zs_speed.next_in; - zs.next_out = zs_speed.next_out; - zs.avail_in = zs_speed.avail_in; - zs.avail_out = zs_speed.avail_out; -*/ - - crc = READBYTE(&zs); - crc |= (READBYTE(&zs)<<8); - crc |= (READBYTE(&zs)<<16); - crc |= (READBYTE(&zs)<<24); - - size = READBYTE(&zs); - size |= (READBYTE(&zs)<<8); - size |= (READBYTE(&zs)<<16); - size |= (READBYTE(&zs)<<24); - - InflatedSize = MAX_BUFOUT - zs.avail_out; - InflatedCRC = MakeCRC32(outData, InflatedSize, 0); - -// write(1, outData, InflatedSize); - fprintf(stdout, "CRC: %08lx %08lx %s\n", crc, InflatedCRC, (crc != InflatedCRC)?"**error**":""); - fprintf(stdout, "Size: %08lx %08lx %s\n", size, InflatedSize, (size != InflatedSize)?"**error**":""); - fprintf(stdout, "Time for decompression was %.2f seconds\n", (float)work_time/1000); - fprintf(stdout, "Throughput is %d kByte/s\n", InflatedSize/work_time); - - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/hashtest.c b/lib/CPUs/MIPS/bsp/examples/hashtest.c deleted file mode 100644 index b960966..0000000 --- a/lib/CPUs/MIPS/bsp/examples/hashtest.c +++ /dev/null @@ -1,323 +0,0 @@ -/********************************************************************\ - * - * FILE: hashtest.c - * - * CONTENTS: test file for sample C-implementation of - * RIPEMD-160 and RIPEMD128 - * * command line arguments: - * filename -- compute hash code of file read binary - * -sstring -- print string & hashcode - * -t -- perform time trial - * -x -- execute standard test suite, ASCII input - * * for linkage with rmd128.c: define RMDsize as 128 - * for linkage with rmd160.c: define RMDsize as 160 (default) - * TARGET: any computer with an ANSI C compiler - * - * AUTHOR: Antoon Bosselaers, ESAT-COSIC - * DATE: 18 April 1996 - * VERSION: 1.1 - * HISTORY: bug in RMDonemillion() corrected - * - * Copyright (c) Katholieke Universiteit Leuven - * 1996, All Rights Reserved - * - * Conditions for use of the RIPEMD-160 Software - * - * The RIPEMD-160 software is freely available for use under the terms and - * conditions described hereunder, which shall be deemed to be accepted by - * any user of the software and applicable on any use of the software: - * - * 1. K.U.Leuven Department of Electrical Engineering-ESAT/COSIC shall for - * all purposes be considered the owner of the RIPEMD-160 software and of - * all copyright, trade secret, patent or other intellectual property - * rights therein. - * 2. The RIPEMD-160 software is provided on an "as is" basis without - * warranty of any sort, express or implied. K.U.Leuven makes no - * representation that the use of the software will not infringe any - * patent or proprietary right of third parties. User will indemnify - * K.U.Leuven and hold K.U.Leuven harmless from any claims or liabilities - * which may arise as a result of its use of the software. In no - * circumstances K.U.Leuven R&D will be held liable for any deficiency, - * fault or other mishappening with regard to the use or performance of - * the software. - * 3. User agrees to give due credit to K.U.Leuven in scientific publications - * or communications in relation with the use of the RIPEMD-160 software - * as follows: RIPEMD-160 software written by Antoon Bosselaers, - * available at http://www.esat.kuleuven.be/~cosicart/ps/AB-9601/. - * -\********************************************************************/ -#ifndef RMDsize -#define RMDsize 160 -#endif - -#include -#include -#include -#include -#if RMDsize == 128 -#include "rmd128.h" -#elif RMDsize == 160 -#include "rmd160.h" -#endif - -#define TEST_BLOCK_SIZE 8000 -#define TEST_BLOCKS 1250 -#define TEST_BYTES ((long)TEST_BLOCK_SIZE * (long)TEST_BLOCKS) - -/********************************************************************/ - -byte *RMD(byte *message) -/* - * returns RMD(message) - * message should be a string terminated by '\0' - */ -{ - dword MDbuf[RMDsize/32]; /* contains (A, B, C, D(, E)) */ - static byte hashcode[RMDsize/8]; /* for final hash-value */ - dword X[16]; /* current 16-word chunk */ - unsigned int i; /* counter */ - dword length; /* length in bytes of message */ - dword nbytes; /* # of bytes not yet processed */ - - /* initialize */ - MDinit(MDbuf); - length = (dword)strlen((char *)message); - - /* process message in 16-word chunks */ - for (nbytes=length; nbytes > 63; nbytes-=64) { - for (i=0; i<16; i++) { - X[i] = BYTES_TO_DWORD(message); - message += 4; - } - compress(MDbuf, X); - } /* length mod 64 bytes left */ - - /* finish: */ - MDfinish(MDbuf, message, length, 0); - - for (i=0; i>2]; /* implicit cast to byte */ - hashcode[i+1] = (MDbuf[i>>2] >> 8); /* extracts the 8 least */ - hashcode[i+2] = (MDbuf[i>>2] >> 16); /* significant bits. */ - hashcode[i+3] = (MDbuf[i>>2] >> 24); - } - - return (byte *)hashcode; -} - -/********************************************************************/ - -byte *RMDbinary(char *fname) -/* - * returns RMD(message in file fname) - * fname is read as binary data. - */ -{ - FILE *mf; /* pointer to file */ - byte data[1024]; /* contains current mess. block */ - dword nbytes; /* length of this block */ - dword MDbuf[RMDsize/32]; /* contains (A, B, C, D(, E)) */ - static byte hashcode[RMDsize/8]; /* for final hash-value */ - dword X[16]; /* current 16-word chunk */ - unsigned int i, j; /* counters */ - dword length[2]; /* length in bytes of message */ - dword offset; /* # of unprocessed bytes at */ - /* call of MDfinish */ - - /* initialize */ - if ((mf = fopen(fname, "rb")) == NULL) { - fprintf(stderr, "\nRMDbinary: cannot open file \"%s\".\n", - fname); - exit(1); - } - MDinit(MDbuf); - length[0] = 0; - length[1] = 0; - - while ((nbytes = fread(data, 1, 1024, mf)) != 0) { - /* process all complete blocks */ - for (i=0; i<(nbytes>>6); i++) { - for (j=0; j<16; j++) - X[j] = BYTES_TO_DWORD(data+64*i+4*j); - compress(MDbuf, X); - } - /* update length[] */ - if (length[0] + nbytes < length[0]) - length[1]++; /* overflow to msb of length */ - length[0] += nbytes; - } - - /* finish: */ - offset = length[0] & 0x3C0; /* extract bytes 6 to 10 inclusive */ - MDfinish(MDbuf, data+offset, length[0], length[1]); - - for (i=0; i>2]; - hashcode[i+1] = (MDbuf[i>>2] >> 8); - hashcode[i+2] = (MDbuf[i>>2] >> 16); - hashcode[i+3] = (MDbuf[i>>2] >> 24); - } - - fclose(mf); - - return (byte *)hashcode; -} - -/********************************************************************/ - -void speedtest(void) -/* - * A time trial routine, to measure the speed of ripemd. - * Measures processor time required to process TEST_BLOCKS times - * a message of TEST_BLOCK_SIZE characters. - */ -{ - clock_t t0, t1; - byte *data; - byte hashcode[RMDsize/8]; - dword X[16]; - dword MDbuf[RMDsize/32]; - unsigned int i, j, k; - - srand(time(NULL)); - - /* allocate and initialize test data */ - if ((data = (byte*)malloc(TEST_BLOCK_SIZE)) == NULL) { - fprintf(stderr, "speedtest: allocation error\n"); - exit(1); - } - for (i=0; i> 7); - - /* start timer */ - printf("\n\nRIPEMD-%u time trial. Processing %ld characters...\n", - RMDsize, TEST_BYTES); - t0 = clock(); - - /* process data */ - MDinit(MDbuf); - for (i=0; i %3.2f Mbit/s\n\n", 8*(double)CLOCKS_PER_SEC*TEST_BYTES/((double)t1-t0)/(1024*1024)); - - for (i=0; i>2]; - hashcode[i+1] = (MDbuf[i>>2] >> 8); - hashcode[i+2] = (MDbuf[i>>2] >> 16); - hashcode[i+3] = (MDbuf[i>>2] >> 24); - } - printf("\nhashcode: "); - for (i=0; i0; i--) - compress(MDbuf, X); - MDfinish(MDbuf, NULL, 1000000UL, 0); - for (i=0; i>2]; - hashcode[i+1] = (MDbuf[i>>2] >> 8); - hashcode[i+2] = (MDbuf[i>>2] >> 16); - hashcode[i+3] = (MDbuf[i>>2] >> 24); - } - printf("\n* message: 1 million times \"a\"\n hashcode: "); - for (i=0; i -#define A 0.5 -#define B 0.55 - -_Sat long _Fract sat_add3 (_Sat long _Fract a, _Sat long _Fract b) -{ - return a + b; -} - -long _Fract mul3 (long _Fract a, long _Fract b) -{ - return a * b; -} - -int main() -{ - printf("hello %X + %X = %X\n", (_Sat long _Fract)A, (_Sat long _Fract)B, sat_add3(A, B)); - printf("hello %X * %X = %X\n", (_Sat long _Fract)A, (_Sat long _Fract)B, mul3(A, B)); -} diff --git a/lib/CPUs/MIPS/bsp/examples/hpi.c b/lib/CPUs/MIPS/bsp/examples/hpi.c deleted file mode 100644 index 3a21263..0000000 --- a/lib/CPUs/MIPS/bsp/examples/hpi.c +++ /dev/null @@ -1,949 +0,0 @@ -#include -#include -#include -#include -#include "libsys.h" -#include "hpi.h" - -static volatile UINT32 _g_int_active; -static volatile UINT32 _g_mbx_return; -static volatile UINT32 _g_mbx_in_flag; - -// --------------------------------------------------------- -// Globals -// --------------------------------------------------------- -typedef struct _susb_t -{ - fp_t fptr_ept[USB_MAX_NUM_EPT]; - void *aptr_ept[USB_MAX_NUM_EPT]; - - fp_t fptr_rst; - void *aptr_rst; - - fp_t fptr_sof; - void *aptr_sof; - - fp_t fptr_cfg; - void *aptr_cfg; - - fp_t fptr_sus; - void *aptr_sus; - - fp_t fptr_id; - void *aptr_id; - - fp_t fptr_vbus; - void *aptr_vbus; - -} usb_t; - -static usb_t _g_usb[USB_MAX_NUM_PORTS]; -//static usb_irp_t *_g_usb_irp_ptr[USB_MAX_NUM_PORTS][USB_MAX_NUM_EPT]; - -// --------------------------------------------------------- -// HPI ISR -// --------------------------------------------------------- -void cy67k3_isr(void) -{ - INT32 i; - UINT16 sie_msg, hpi_status; - UINT32 port, siemsg_handled, int_handled; - _g_int_active = 1; -// sputs("--------------------------------------------------------\n"); -// sputs("USB-Interrupt(4)\n"); -// sputs("HPI Status : "); - hpi_status = cy67k3_read_HPI_STATUS(); -// print_word(hpi_status); -// sputs("\n"); - -// sputs("MAILBOX (REG): "); - -// cy67k3_write(HPI_ADDRESS, HPI_REG_MAILBOX); -// print_word(cy67k3_read_HPI_DATA()); -// sputs("\n"); - - int_handled = 0; - if (hpi_status & HPI_STATUS_MBX_IN) - { - int_handled = 1; -// sputs("MAILBOX (HPI): "); - _g_mbx_return = cy67k3_read_HPI_MAILBOX(); - _g_mbx_in_flag = 1; -// print_word(_g_mbx_return); -// sputs("\n"); - } - - if (hpi_status & HPI_STATUS_RESET1) - { - int_handled = 1; - hpi_read_reg(SUSB1_REG_STATUS); - hpi_comm_exec_int(SUSB_INIT_INT, 2, R1, 0, R2, 1); -// sputs("RESET 1\n"); - } - - if (hpi_status & HPI_STATUS_RESET2) - { - int_handled = 1; - hpi_read_reg(SUSB2_REG_STATUS); - hpi_comm_exec_int(SUSB_INIT_INT, 2, R1, 0, R2, 2); -// sputs("RESET 2\n"); - } - - if (hpi_status & HPI_STATUS_DONE1) - { - int_handled = 1; -// sputs("DONE 1\n"); - } - - if (hpi_status & HPI_STATUS_DONE2) - { - int_handled = 1; -// sputs("DONE 2\n"); - } - - if (hpi_status & HPI_STATUS_SOFEOP1) - { - int_handled = 1; - hpi_read_reg(SUSB1_REG_STATUS); -// sputs("SOF/EOP 1\n"); - } - - if (hpi_status & HPI_STATUS_SOFEOP2) - { - int_handled = 1; - hpi_read_reg(SUSB2_REG_STATUS); -// sputs("SOF/EOP 2\n"); - } - - port = 0; - siemsg_handled = 0; - if (hpi_status & HPI_STATUS_SIEMSG1) - { - int_handled = 1; - sie_msg = hpi_read_reg(HPI_REG_SIE1MSG); - - // Reset message register - hpi_write_reg(HPI_REG_SIE1MSG, 0x0000); - - if (sie_msg & SUSB_RST_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_rst) - (_g_usb[port].fptr_rst)(_g_usb[port].aptr_rst); - } - - if (sie_msg & SUSB_SOF_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_sof) - (_g_usb[port].fptr_sof)(_g_usb[port].aptr_sof); - } - - if (sie_msg & SUSB_CFG_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_cfg) - (_g_usb[port].fptr_cfg)(_g_usb[port].aptr_cfg); - } - - if (sie_msg & SUSB_SUS_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_sus) - (_g_usb[port].fptr_sus)(_g_usb[port].aptr_sus); - } - - if (sie_msg & SUSB_ID_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_id) - (_g_usb[port].fptr_id)(_g_usb[port].aptr_id); - } - - if (sie_msg & SUSB_VBUS_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_vbus) - (_g_usb[port].fptr_vbus)(_g_usb[port].aptr_vbus); - } - - for (i=0; i < 8; i++) - { - if (sie_msg & (SUSB_EP0_MSG << i)) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_ept[i]) - (_g_usb[port].fptr_ept[i])(_g_usb[port].aptr_ept[i]); - } - } - if (!siemsg_handled) - { - sputs("Unhandled SIE1 message "); - print_word(sie_msg); - sputs("!\n"); - } - - } - port = 1; - siemsg_handled = 0; - if (hpi_status & HPI_STATUS_SIEMSG2) - { - int_handled = 1; - sie_msg = hpi_read_reg(HPI_REG_SIE2MSG); - - // Reset message register - hpi_write_reg(HPI_REG_SIE2MSG, 0x0000); - - if (sie_msg & SUSB_RST_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_rst) - (_g_usb[port].fptr_rst)(_g_usb[port].aptr_rst); - } - - if (sie_msg & SUSB_SOF_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_sof) - (_g_usb[port].fptr_sof)(_g_usb[port].aptr_sof); - } - - if (sie_msg & SUSB_CFG_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_cfg) - (_g_usb[port].fptr_cfg)(_g_usb[port].aptr_cfg); - } - - if (sie_msg & SUSB_SUS_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_sus) - (_g_usb[port].fptr_sus)(_g_usb[port].aptr_sus); - } - - if (sie_msg & SUSB_ID_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_id) - (_g_usb[port].fptr_id)(_g_usb[port].aptr_id); - } - - if (sie_msg & SUSB_VBUS_MSG) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_vbus) - (_g_usb[port].fptr_vbus)(_g_usb[port].aptr_vbus); - } - - for (i=0; i < 8; i++) - { - if (sie_msg & (SUSB_EP0_MSG << i)) - { - siemsg_handled = 1; - if (_g_usb[port].fptr_ept[i]) - (_g_usb[port].fptr_ept[i])(_g_usb[port].aptr_ept[i]); - } - } - if (!siemsg_handled) - { - sputs("Unhandled SIE2 message "); - print_word(sie_msg); - sputs("!\n"); - } - - } - if (!int_handled) - { - sputs("Unhandled interrupt (status = "); - print_word(hpi_status); - sputs(")!\n"); - } - -// sputs("--------------------------------------------------------\n"); - _g_int_active = 0; -} - -// --------------------------------------------------------- -// CY7C67300 low-level routines -// --------------------------------------------------------- -void cy67k3_reset(void) -{ - int i; - volatile UINT32 *pHpi = (UINT32*)SYS_USB_CTRL; - - *pHpi = 3; - for (i=0; i <160; i++) - { - __asm __volatile - ( - ".set noreorder\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - ".set reorder\n" - ); - } - - *pHpi = 2; - -} - -UINT16 cy67k3_read_HPI_DATA(void) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_DATA; - - return (UINT16)*pHpi; -} - -UINT16 cy67k3_read_HPI_MAILBOX(void) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_MBX; - - return (UINT16)*pHpi; -} - -UINT16 cy67k3_read_HPI_ADDRESS(void) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_ADDR; - - return (UINT16)*pHpi; -} - -UINT16 cy67k3_read_HPI_STATUS(void) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_STATUS; - - return (UINT16)*pHpi; -} - -void cy67k3_write_HPI_DATA(UINT16 data) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_DATA; - - *pHpi = (UINT32)data; -} - -void cy67k3_write_HPI_MAILBOX(UINT16 data) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_MBX; - - *pHpi = (UINT32)data; -} - -void cy67k3_write_HPI_ADDRESS(UINT16 data) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_ADDR; - - *pHpi = (UINT32)data; -} - -void cy67k3_write_HPI_STATUS(UINT16 data) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_STATUS; - - *pHpi = (UINT32)data; -} - -// --------------------------------------------------------- -// HPI API -// --------------------------------------------------------- -UINT32 hpi_init(void) -{ - volatile UINT32 *pHpi = (UINT32*)SYS_USB_CTRL; - int i; - UINT16 reg; - - // ToDo: Enable HPI interrupt - _g_int_active = 0; - - hpi_write_reg(HPI_REG_SIE1MSG, 0x0000); - hpi_write_reg(HPI_REG_SIE2MSG, 0x0000); - hpi_write_reg(SUSB1_REG_STATUS, 0xFFFF); - hpi_write_reg(SUSB2_REG_STATUS, 0xFFFF); - - // Init 1 - for(i=0; i < USB_MAX_NUM_EPT; i++) - { - hpi_write_reg(SUSB1_REG_EP_ADDR0 + 16*i, 0); - hpi_write_reg(SUSB1_REG_EP_CNTRES0 + 16*i, 0); - hpi_write_reg(SUSB1_REG_EP_COUNT0 + 16*i, 0); - hpi_write_reg(SUSB1_REG_EP_CTRL0 + 16*i, 0); - hpi_write_reg(SUSB1_REG_EP_STATUS0 + 16*i, 0); - } - // Init 2 - for(i=0; i < USB_MAX_NUM_EPT; i++) - { - hpi_write_reg(SUSB2_REG_EP_ADDR0 + 16*i, 0); - hpi_write_reg(SUSB2_REG_EP_CNTRES0 + 16*i, 0); - hpi_write_reg(SUSB2_REG_EP_COUNT0 + 16*i, 0); - hpi_write_reg(SUSB2_REG_EP_CTRL0 + 16*i, 0); - hpi_write_reg(SUSB2_REG_EP_STATUS0 + 16*i, 0); - } - - hpi_write_reg(HPI_REG_INTROUTE, 0x0000); - reg = hpi_read_reg(HPI_REG_INTROUTE); -// hpi_write_reg(HPI_REG_INTROUTE, reg | 0x0202); // Route reset {1,2} to HPI only -// hpi_write_reg(HPI_REG_INTROUTE, reg | 0x2800); // Route SOF/EOP {1,2} to HPI only -// hpi_write_reg(HPI_REG_INTROUTE, reg | 0x1400); // Route SOF/EOP {1,2} to CY16 only - hpi_write_reg(HPI_REG_INTROUTE, reg | 0x3C00); // Route SOF/EOP {1,2} to HPI and CY16 - - - interrupt_register(4, cy67k3_isr); - interrupt_enable(4); - *pHpi = 0x02; - - return HPI_NOERROR; -} - -void hpi_mbx_write(UINT16 msgcode) -{ - _g_mbx_in_flag = 0; - cy67k3_write_HPI_MAILBOX(msgcode); -} - -UINT32 hpi_mbx_read(void) -{ - UINT32 err; - UINT16 cy_return; - - if (_g_int_active) - { - while (!(cy67k3_read_HPI_STATUS() & HPI_STATUS_MBX_IN)); - cy_return = cy67k3_read_HPI_MAILBOX(); - } - else - { - while(!_g_mbx_in_flag); - cy_return = _g_mbx_return; - } - - switch (cy_return) - { - case COMM_ACK: - err = cy_return; - break; - - case COMM_NAK: - case COMM_ASYNC: - err = HPI_ERR_PREFIX_MBX | cy_return; - break; - - default: - err = HPI_ERR_PREFIX_MBX | cy_return; - break; - } - return err; -} - -UINT32 hpi_check_addr(UINT16 addr) -{ - if ((addr >= 0x0000) && (addr < 0x4000)) - return 0; - - if ((addr >= 0xC080) && (addr < 0xC0BC)) - return 0; - - if (addr >= 0xE000) - return 0; - - sputs("Invalid address for HPI direct access! Use LCP-command instead!\n"); - return HPI_ERR_INVPARAM; -} - -UINT32 hpi_read_reg(UINT16 addr) -{ - UINT32 result; - - result = hpi_check_addr(addr); - if (IS_ERROR(result)) - return result; - - cy67k3_write_HPI_ADDRESS(addr); - return cy67k3_read_HPI_DATA(); -} - -UINT32 hpi_write_reg(UINT16 addr, UINT16 data) -{ - UINT32 result; - - result = hpi_check_addr(addr); - if (IS_ERROR(result)) - return result; - - cy67k3_write_HPI_ADDRESS(addr); - cy67k3_write_HPI_DATA(data); -} - -UINT32 hpi_write_ram(UINT16 addr, UINT16 *pData, UINT32 len) -{ - int i, num_words; - - if (addr > 0x3FFE) - return HPI_ERR_INVPARAM; - - if (addr & 1) // Not 16bit aligned? - return HPI_ERR_INVPARAM; - - cy67k3_write_HPI_ADDRESS(addr); - - num_words = len/2; - if (len % 2) - num_words++; - - for (i=0; i < num_words; i++) - cy67k3_write_HPI_DATA(pData[i]); - - return len; -} - -UINT32 hpi_read_ram(UINT16 addr, UINT16 *pData, UINT32 len) -{ - int i, num_words; - - if (addr > 0x3FFE) - return HPI_ERR_INVPARAM; - - if (addr & 1) // Not 16bit aligned? - return HPI_ERR_INVPARAM; - - cy67k3_write_HPI_ADDRESS(addr); - - num_words = len/2; - if (len % 2) - num_words++; - - for (i=0; i < num_words; i++) - pData[i] = cy67k3_read_HPI_DATA(); - - return len; -} - -UINT32 hpi_comm_reset(void) -{ - hpi_mbx_write(COMM_RESET); - - return hpi_mbx_read(); -} - -UINT32 hpi_comm_jump2code(UINT16 addr) -{ - cy67k3_write_HPI_ADDRESS(addr); - hpi_mbx_write(COMM_JUMP2CODE); - - return hpi_mbx_read(); -} - -UINT32 hpi_comm_callcode(UINT16 addr) -{ - hpi_write_reg(COMM_CODE_ADDR, addr); - - hpi_mbx_write(COMM_CALL_CODE); - - return hpi_mbx_read(); -} - -UINT32 hpi_comm_write_ctrl_reg(UINT16 addr, UINT16 data, UINT16 logic) -{ - - hpi_write_reg(COMM_CTRL_REG_ADDR, addr); - hpi_write_reg(COMM_CTRL_REG_DATA, data); - hpi_write_reg(COMM_CTRL_REG_LOGIC, logic); - - hpi_mbx_write(COMM_WRITE_CTRL_REG); - - return hpi_mbx_read(); -} - -UINT32 hpi_comm_read_ctrl_reg(UINT16 addr) -{ - UINT32 result; - - hpi_write_reg(COMM_CTRL_REG_ADDR, addr); - - hpi_mbx_write(COMM_READ_CTRL_REG); - - result = hpi_mbx_read(); - if (IS_ERROR(result)) - return result; - - cy67k3_write_HPI_ADDRESS(COMM_CTRL_REG_DATA); - return (UINT32)cy67k3_read_HPI_DATA(); - -} - -UINT32 hpi_comm_write_xmem(UINT16 addr, UINT8 *pData, UINT16 len) -{ - return HPI_ERR_NOTIMPL; - -} - -UINT32 hpi_comm_read_xmem(UINT16 addr, UINT8 *pData, UINT16 len) -{ - return HPI_ERR_NOTIMPL; - -} - -typedef struct _sreg_param_t -{ - UINT32 id; - UINT16 val; - -} reg_param_t; - -UINT32 hpi_comm_exec_int(UINT16 intnum, UINT32 nargs, ...) -{ - int i; - UINT32 result; - va_list args; - reg_param_t reg_param[MAX_NUM_REGS]; - - va_start(args, nargs); - - if (nargs > MAX_NUM_REGS) - { - fprintf(stderr, "hpi_comm_exec_int(): Number (%d), of arguments exceeds %d!\n", nargs, MAX_NUM_REGS); - return HPI_ERR_INVPARAM; - } - - for (i=0; i < nargs; i++) - { - reg_param[i].id = va_arg(args, UINT32); - if (reg_param[i].id > MAX_NUM_REGS) - { - fprintf(stderr, "hpi_comm_exec_int(): Invalid register R%d!\n", reg_param[i].id); - return HPI_ERR_INVPARAM; - } - - reg_param[i].val = (UINT16)va_arg(args, UINT32); - } - va_end(args); - - hpi_write_reg(COMM_INT_NUM, intnum); - - for (i=0; i < nargs; i++) - { - hpi_write_reg(COMM_R0 + 2*reg_param[i].id, reg_param[i].val); - } - - hpi_mbx_write(COMM_EXEC_INT); - - result = hpi_mbx_read(); - if (IS_ERROR(result)) - return result; - - return (UINT32)hpi_read_reg(COMM_R0); -} - -UINT32 usb_init(void) -{ - INT32 i; - - for (i=0; i < USB_MAX_NUM_PORTS; i++) - { - memset(&_g_usb[i], 0, sizeof(usb_t)); - } - return 0; -} - -UINT32 usb_callback_register(UINT32 port, UINT32 type, fp_t pFunc, void *pArg) -{ - UINT32 result; - if (port >= USB_MAX_NUM_PORTS) - return -1; - - result = 0; - switch (type) - { - case SUSB_EP0_MSG: - _g_usb[port].fptr_ept[0] = pFunc; - _g_usb[port].aptr_ept[0] = pArg; - break; - - case SUSB_EP1_MSG: - _g_usb[port].fptr_ept[1] = pFunc; - _g_usb[port].aptr_ept[1] = pArg; - break; - - case SUSB_EP2_MSG: - _g_usb[port].fptr_ept[2] = pFunc; - _g_usb[port].aptr_ept[2] = pArg; - break; - - case SUSB_EP3_MSG: - _g_usb[port].fptr_ept[3] = pFunc; - _g_usb[port].aptr_ept[3] = pArg; - break; - - case SUSB_EP4_MSG: - _g_usb[port].fptr_ept[4] = pFunc; - _g_usb[port].aptr_ept[4] = pArg; - break; - - case SUSB_EP5_MSG: - _g_usb[port].fptr_ept[5] = pFunc; - _g_usb[port].aptr_ept[5] = pArg; - break; - - case SUSB_EP6_MSG: - _g_usb[port].fptr_ept[6] = pFunc; - _g_usb[port].aptr_ept[6] = pArg; - break; - - case SUSB_EP7_MSG: - _g_usb[port].fptr_ept[7] = pFunc; - _g_usb[port].aptr_ept[7] = pArg; - break; - - case SUSB_RST_MSG: - _g_usb[port].fptr_rst = pFunc; - _g_usb[port].aptr_rst = pArg; - break; - - case SUSB_SOF_MSG: - _g_usb[port].fptr_sof = pFunc; - _g_usb[port].aptr_sof = pArg; - break; - - case SUSB_CFG_MSG: - _g_usb[port].fptr_cfg = pFunc; - _g_usb[port].aptr_cfg = pArg; - break; - - case SUSB_SUS_MSG: - _g_usb[port].fptr_sus = pFunc; - _g_usb[port].aptr_sus = pArg; - break; - - case SUSB_ID_MSG: - _g_usb[port].fptr_id = pFunc; - _g_usb[port].aptr_id = pArg; - break; - - case SUSB_VBUS_MSG: - _g_usb[port].fptr_vbus = pFunc; - _g_usb[port].aptr_vbus = pArg; - break; - - default: - result = -1; - break; - } - - return result; -} - -UINT32 usb_irp_register(usb_irp_t *pIRP, UINT32 port, UINT32 ept, UINT32 size, UINT32 is_out) -{ - - if (!pIRP) - return -1; - - if (port >= USB_MAX_NUM_PORTS) - return -1; - - if (ept >= USB_MAX_NUM_EPT) - return -1; - - if (size >= USB_MAX_IMG_SIZE) - return -1; - - memset(pIRP, 0, sizeof(usb_irp_t)); - pIRP->is_out = is_out; - pIRP->is_in = !is_out; - pIRP->tsize = size; - pIRP->port = port; - pIRP->ept = ept; - pIRP->cy_irp_addr = USB_IRP_BASE + port*USB_MAX_NUM_EPT*sizeof(cy_req_t) + ept*sizeof(cy_req_t); - pIRP->cy_req.next = 0; - pIRP->cy_req.addr = USB_IMG_BASE + port*USB_MAX_NUM_EPT*USB_MAX_IMG_SIZE + ept*USB_MAX_IMG_SIZE; - pIRP->cy_req.size = size; - pIRP->cy_req.callback = 0; - fifo_alloc(&pIRP->fifo, 8*USB_MAX_IMG_SIZE); - - return 0; -} - -UINT32 usb_irp_enqueue(usb_irp_t *pIRP) -{ - UINT32 result; - - if (!pIRP) - { -// sputs ("usb_irp_enqueue(): Invalid IRP!\n"); - return -1; - } - -// printf("cy_addr: %4.4X, Next: %4.4X, Addr: %4.4X, Size: %4.4X, CB: %4.4X\n", pIRP->cy_irp_addr, pIRP->cy_req.next, pIRP->cy_req.addr, pIRP->cy_req.size, pIRP->cy_req.callback); - - if (pIRP->is_out) - { - hpi_write_ram(pIRP->cy_irp_addr, (UINT16*)&pIRP->cy_req, sizeof(cy_req_t)); - if (pIRP->port == 0) - result = hpi_comm_exec_int(SUSB1_RECEIVE_INT, 2, R1, pIRP->ept, R8, pIRP->cy_irp_addr); - - if (pIRP->port == 1) - result = hpi_comm_exec_int(SUSB2_RECEIVE_INT, 2, R1, pIRP->ept, R8, pIRP->cy_irp_addr); - } - if (pIRP->is_in) - { - pIRP->tx_in_progress = 1; - hpi_write_ram(pIRP->cy_irp_addr, (UINT16*)&pIRP->cy_req, sizeof(cy_req_t)); - if (pIRP->port == 0) - result = hpi_comm_exec_int(SUSB1_SEND_INT, 2, R1, pIRP->ept, R8, pIRP->cy_irp_addr); - - if (pIRP->port == 1) - result = hpi_comm_exec_int(SUSB2_SEND_INT, 2, R1, pIRP->ept, R8, pIRP->cy_irp_addr); - } - -// if (result) -// printf ("usb_irp_enqueue(): Result = %8.8X\n", result); - - return result; - -} - -UINT32 fifo_alloc(fifo_t *pObj, UINT32 size) -{ - pObj->pBuf = (UINT8*)malloc(size); - if (!pObj->pBuf) - { -// printf ("fifo_alloc(): Error allocating memory!\n"); - return -1; - } -// printf ("fifo_alloc(): pBuf at %8.8X\n", (UINT32)pObj->pBuf); - pObj->size = size; - pObj->pPtr_wr = pObj->pBuf; - pObj->pPtr_rd = pObj->pBuf; - - return 0; -} - -UINT32 fifo_free(fifo_t *pObj) -{ - if (pObj->pBuf) - free(pObj->pBuf); - - return 0; -} - -UINT32 fifo_flush(fifo_t *pObj) -{ - pObj->pPtr_wr = pObj->pBuf; - pObj->pPtr_rd = pObj->pBuf; - - return 0; -} - -UINT32 fifo_is_empty(fifo_t *pObj) -{ - return (pObj->pPtr_wr == pObj->pPtr_rd); -} - -UINT32 fifo_is_full(fifo_t *pObj) -{ - UINT8 *pNext, *pEnd; - - pEnd = pObj->pBuf + pObj->size; - pNext = pObj->pPtr_wr + 1; - if (pNext == pEnd) - pNext = pObj->pBuf; - - return (pNext == pObj->pPtr_rd); -} - -UINT32 fifo_read(fifo_t *pObj, UINT8 *pData, UINT32 size, UINT32 timeout, UINT32 do_block) -{ - UINT32 i; - UINT32 wait_4ever, timeout_cnt, cnt; - UINT8 *pEnd; - - pEnd = pObj->pBuf + pObj->size; - wait_4ever = (timeout == 0); - - cnt = 0; - while(size) - { - timeout_cnt = timeout; - - while(fifo_is_empty(pObj)) - { - if (!do_block) - return cnt; - - if (!wait_4ever) - { - if (timeout_cnt) - { - timeout_cnt--; - sleep(1); - } - else - { - return cnt; - } - } - } - - if (pData) - pData[cnt] = *(pObj->pPtr_rd); - - cnt++; - pObj->pPtr_rd++; - if (pObj->pPtr_rd == pEnd) - pObj->pPtr_rd = pObj->pBuf; - - size--; - } - - return cnt; -} - -UINT32 fifo_write(fifo_t *pObj, UINT8 *pData, UINT32 size, UINT32 timeout, UINT32 do_block) -{ - UINT32 wait_4ever, timeout_cnt, cnt; - UINT8 *pEnd; - - pEnd = pObj->pBuf + pObj->size; - wait_4ever = (timeout == 0); - - cnt = 0; - while(size) - { - timeout_cnt = timeout; - - while(fifo_is_full(pObj)) - { - if (!do_block) - return cnt; - - if (!wait_4ever) - { - if (timeout_cnt) - { - timeout_cnt--; - sleep(1); - } - else - { - return cnt; - } - } - } - - if (pData) - *(pObj->pPtr_wr) = pData[cnt]; - - cnt++; - pObj->pPtr_wr++; - if (pObj->pPtr_wr == pEnd) - pObj->pPtr_wr = pObj->pBuf; - - size--; - } - - return cnt; -} - -// --------------------------------------------------------- diff --git a/lib/CPUs/MIPS/bsp/examples/hpi.h b/lib/CPUs/MIPS/bsp/examples/hpi.h deleted file mode 100644 index 58edabe..0000000 --- a/lib/CPUs/MIPS/bsp/examples/hpi.h +++ /dev/null @@ -1,384 +0,0 @@ -#ifndef HPI_H -#define HPI_H - -// --------------------------------------------------------- -// API related -// --------------------------------------------------------- -//#define IS_ERROR(e) (0 != (e & HPI_ERROR)) -#define HPI_NOERROR 0 -#define HPI_ERROR 0x80000000 -#define HPI_ERR_NOTIMPL (HPI_ERROR + 1) -#define HPI_ERR_INVPARAM (HPI_ERROR + 2) -#define HPI_ERR_TIMEOUT (HPI_ERROR + 3) -#define HPI_ERR_PREFIX_MBX (HPI_ERROR + 0x00010000) - -#define MAX_NUM_REGS 14 -#define R0 0 -#define R1 1 -#define R2 2 -#define R3 3 -#define R4 4 -#define R5 5 -#define R6 6 -#define R7 7 -#define R8 8 -#define R9 9 -#define R10 10 -#define R11 11 -#define R12 12 -#define R13 13 - -#define USB_MAX_NUM_PORTS 2 -#define USB_MAX_NUM_EPT 8 -#define USB_MAX_IMG_SIZE 512 -#define USB_IRP_BASE 0x0F80 -#define USB_IMG_BASE 0x1000 - -typedef void (*fp_t)(void*); - -// Receive buffer on EP -typedef struct _scy_req_t -{ - UINT16 next; - UINT16 addr; - UINT16 size; - UINT16 callback; -} cy_req_t; - -typedef struct _sfifo_t -{ - UINT32 size; - UINT8 *pBuf; - UINT8 * volatile pPtr_wr, * volatile pPtr_rd; - -} fifo_t; - -typedef struct _susb_irp_t -{ - UINT16 tsize; - UINT32 is_in, is_out; - UINT32 port, ept; - UINT16 cy_irp_addr; - fifo_t fifo; - UINT32 tx_in_progress; - cy_req_t cy_req; -} usb_irp_t; - -// --------------------------------------------------------- -// CY7C67300 related -// --------------------------------------------------------- -#define HPI_WAITACK 1 -#define HPI_NOWAIT 0 - -// --------------------------------------------------------- -// HPI status flags -#define HPI_STATUS_MBX_IN 0x0001 -#define HPI_STATUS_RESET1 0x0002 -#define HPI_STATUS_DONE1 0x0004 -#define HPI_STATUS_DONE2 0x0008 -#define HPI_STATUS_SIEMSG1 0x0010 -#define HPI_STATUS_SIEMSG2 0x0020 -#define HPI_STATUS_RESUME1 0x0040 -#define HPI_STATUS_RESUME2 0x0080 -#define HPI_STATUS_MBX_OUT 0x0100 -#define HPI_STATUS_RESET2 0x0200 -#define HPI_STATUS_SOFEOP1 0x0400 -#define HPI_STATUS_SOFEOP2 0x1000 -#define HPI_STATUS_ID 0x4000 -#define HPI_STATUS_VBUS 0x8000 - -// --------------------------------------------------------- -// LCP command codes -#define COMM_RESET 0xFA50 -#define COMM_JUMP2CODE 0xCE00 -#define COMM_EXEC_INT 0xCE01 -#define COMM_READ_CTRL_REG 0xCE02 -#define COMM_WRITE_CTRL_REG 0xCE03 -#define COMM_CALL_CODE 0xCE04 -#define COMM_READ_XMEM 0xCE05 -#define COMM_WRITE_XMEM 0xCE06 -#define C0MM_CONFIG 0xCE07 -#define COMM_READ_MEM 0xCE08 -#define COMM_WRITE_MEM 0xCE09 -// LCP response codes -#define COMM_ACK 0x0FED -#define COMM_NAK 0xDEAD -#define COMM_ASYNC 0xF00D - -// --------------------------------------------------------- -// LCP memory addresses -#define COMM_PORT_CMD 0x01BA // For PORT Command -#define COMM_MEM_ADDR 0x01BC // Address for COMM_RD/WR_MEM -#define COMM_MEM_LEN 0x01BE // Address for COMM_RD/WR_MEM -#define COMM_LAST_DATA 0x01C0 // memory pointer for xmem -#define COMM_CTRL_REG_ADDR 0x01BC // Address for COMM_RD/WR_CTRL_REG -#define COMM_CTRL_REG_DATA 0x01BE // Address for COMM_RD/WR_CTRL_REG -#define COMM_CTRL_REG_LOGIC 0x01C0 // Address used for AND/OR -#define REG_WRITE_FLG 0x0000 // Value for COMM_CTRL_REG_LOGIC -#define REG_AND_FLG 0x0001 // Value for COMM_CTRL_REG_LOGIC -#define REG_OR_FLG 0x0002 // Value for COMM_CTRL_REG_LOGIC -#define COMM_TIMEOUT 0x01BE // Address setting Timeout for sending response to host -#define COMM_CODE_ADDR 0x01BC // Address for COMM_CALL_CODE and COMM_JUMP2CODE -#define COMM_INT_NUM 0x01C2 // Address used for COMM_EXEC_INT -#define COMM_R0 0x01C4 // CY16-R0 register -#define COMM_R1 0x01C6 // CY16-R1 register -#define COMM_R2 0x01C8 // CY16-R2 register -#define COMM_R3 0x01CA // CY16-R3 register -#define COMM_R4 0x01CC // CY16-R4 register -#define COMM_R5 0x01CE // CY16-R5 register -#define COMM_R6 0x01D0 // CY16-R6 register -#define COMM_R7 0x01D2 // CY16-R7 register -#define COMM_R8 0x01D4 // CY16-R8 register -#define COMM_R9 0x01D6 // CY16-R9 register -#define COMM_R10 0x01D8 // CY16-R10 register -#define COMM_R11 0x01DA // CY16-R11 register -#define COMM_R12 0x01DC // CY16-R12 register -#define COMM_R13 0x01DE // CY16-R13 register - -// for COMM_CTRL_REG_LOGIC -#define LOGIC_DIRECT 0 -#define LOGIC_AND 1 -#define LOGIC_OR 2 - -// --------------------------------------------------------- -// Software interrupts -#define SUSB_INIT_INT 113 -// USB 1 -#define SUSB1_DEVICE_DESCRIPTOR_VEC 90 -#define SUSB1_CONFIGURATION_DESCRIPTOR_VEC 91 -#define SUSB1_STRING_DESCRIPTOR_VEC 92 -#define SUSB1_FINISH_INT 89 -#define SUSB1_STALL_INT 82 -#define SUSB1_STANDARD_INT 83 -#define SUSB1_SEND_INT 80 -#define SUSB1_RECEIVE_INT 81 -#define SUSB1_VENDOR_INT 85 -#define SUSB1_CLASS_INT 87 -#define SUSB1_LOADER_INT 94 -#define SUSB1_DELTA_CONFIG_INT 95 - -// USB 2 -#define SUSB2_DEVICE_DESCRIPTOR_VEC 106 -#define SUSB2_CONFIGURATION_DESCRIPTOR_VEC 107 -#define SUSB2_STRING_DESCRIPTOR_VEC 108 -#define SUSB2_FINISH_INT 105 -#define SUSB2_STALL_INT 98 -#define SUSB2_STANDARD_INT 99 -#define SUSB2_SEND_INT 96 -#define SUSB2_RECEIVE_INT 97 -#define SUSB2_VENDOR_INT 101 -#define SUSB2_CLASS_INT 103 -#define SUSB2_LOADER_INT 110 -#define SUSB2_DELTA_CONFIG_INT 111 - -// --------------------------------------------------------- -// General USB Registers -#define USB_REG_FLAGS 0xC000 // CPU Flags -#define USB_REG_BANK 0xC002 // Register Bank -#define USB_REG_REVISON 0xC004 // Hardware Revision -#define USB_REG_SPEED 0xC008 // CPU Speed -#define USB_REG_PWRCTRL 0xC00A // Power Control -#define USB_REG_INTEN 0xC00E // Interrupt Enable -#define USB_REG_BP 0xC014 // Breakpoint -#define USB_REG_USBDIAG 0xC03C // USB Diagnostic -#define USB_REG_MEMDIAG 0xC03E // Memory Diagnostic - -// HPI registers -#define HPI_REG_BP 0x0140 // HPI Breakpoint -#define HPI_REG_INTROUTE 0x0142 // Interrupt Routing -#define HPI_REG_SIE1MSG 0x0144 // SIE1msg -#define HPI_REG_SIE2MSG 0x0148 // SIE2msg -#define HPI_REG_MAILBOX 0xC0C6 // HPI Mailbox - -// --------------------------------------------------------- -// General Device Registers -// Device 1 -#define SUSB1_REG_PORTSEL 0xC084 // Port select -#define SUSB1_REG_USBCTRL 0xC08A // USB control -#define SUSB1_REG_INTEN 0xC08C // Interrupt enable -#define SUSB1_REG_ADDR 0xC08E // Address -#define SUSB1_REG_STATUS 0xC090 // Status -#define SUSB1_REG_FRAMENUM 0xC092 // Frame number -#define SUSB1_REG_SOFEOPCNT 0xC094 // SOF/EOP count - -// Device 2 -#define SUSB2_REG_PORTSEL 0xC0A4 // Port select -#define SUSB2_REG_USBCTRL 0xC0AA // USB control -#define SUSB2_REG_INTEN 0xC0AC // Interrupt enable -#define SUSB2_REG_ADDR 0xC0AE // Address -#define SUSB2_REG_STATUS 0xC0B0 // Status -#define SUSB2_REG_FRAMENUM 0xC0B2 // Frame number -#define SUSB2_REG_SOFEOPCNT 0xC0B4 // SOF/EOP count - -// --------------------------------------------------------- -// Endpoint Registers -// Device 1 Control -#define SUSB1_REG_EP_CTRL0 0x0200 -#define SUSB1_REG_EP_CTRL1 0x0210 -#define SUSB1_REG_EP_CTRL2 0x0220 -#define SUSB1_REG_EP_CTRL3 0x0230 -#define SUSB1_REG_EP_CTRL4 0x0240 -#define SUSB1_REG_EP_CTRL5 0x0250 -#define SUSB1_REG_EP_CTRL6 0x0260 -#define SUSB1_REG_EP_CTRL7 0x0270 -// Device 1 Address -#define SUSB1_REG_EP_ADDR0 0x0202 -#define SUSB1_REG_EP_ADDR1 0x0212 -#define SUSB1_REG_EP_ADDR2 0x0222 -#define SUSB1_REG_EP_ADDR3 0x0232 -#define SUSB1_REG_EP_ADDR4 0x0242 -#define SUSB1_REG_EP_ADDR5 0x0252 -#define SUSB1_REG_EP_ADDR6 0x0262 -#define SUSB1_REG_EP_ADDR7 0x0272 -// Device 1 Count -#define SUSB1_REG_EP_COUNT0 0x0204 -#define SUSB1_REG_EP_COUNT1 0x0214 -#define SUSB1_REG_EP_COUNT2 0x0224 -#define SUSB1_REG_EP_COUNT3 0x0234 -#define SUSB1_REG_EP_COUNT4 0x0244 -#define SUSB1_REG_EP_COUNT5 0x0254 -#define SUSB1_REG_EP_COUNT6 0x0264 -#define SUSB1_REG_EP_COUNT7 0x0274 -// Device 1 Status -#define SUSB1_REG_EP_STATUS0 0x0206 -#define SUSB1_REG_EP_STATUS1 0x0216 -#define SUSB1_REG_EP_STATUS2 0x0226 -#define SUSB1_REG_EP_STATUS3 0x0236 -#define SUSB1_REG_EP_STATUS4 0x0246 -#define SUSB1_REG_EP_STATUS5 0x0256 -#define SUSB1_REG_EP_STATUS6 0x0266 -#define SUSB1_REG_EP_STATUS7 0x0276 -// Device 1 Count result -#define SUSB1_REG_EP_CNTRES0 0x0208 -#define SUSB1_REG_EP_CNTRES1 0x0218 -#define SUSB1_REG_EP_CNTRES2 0x0228 -#define SUSB1_REG_EP_CNTRES3 0x0238 -#define SUSB1_REG_EP_CNTRES4 0x0248 -#define SUSB1_REG_EP_CNTRES5 0x0258 -#define SUSB1_REG_EP_CNTRES6 0x0268 -#define SUSB1_REG_EP_CNTRES7 0x0278 - -// Device 2 Control -#define SUSB2_REG_EP_CTRL0 0x0280 -#define SUSB2_REG_EP_CTRL1 0x0290 -#define SUSB2_REG_EP_CTRL2 0x02A0 -#define SUSB2_REG_EP_CTRL3 0x02B0 -#define SUSB2_REG_EP_CTRL4 0x02C0 -#define SUSB2_REG_EP_CTRL5 0x02D0 -#define SUSB2_REG_EP_CTRL6 0x02E0 -#define SUSB2_REG_EP_CTRL7 0x02F0 -// Device 2 Address -#define SUSB2_REG_EP_ADDR0 0x0282 -#define SUSB2_REG_EP_ADDR1 0x0292 -#define SUSB2_REG_EP_ADDR2 0x02A2 -#define SUSB2_REG_EP_ADDR3 0x02B2 -#define SUSB2_REG_EP_ADDR4 0x02C2 -#define SUSB2_REG_EP_ADDR5 0x02D2 -#define SUSB2_REG_EP_ADDR6 0x02E2 -#define SUSB2_REG_EP_ADDR7 0x02F2 -// Device 2 Count -#define SUSB2_REG_EP_COUNT0 0x0284 -#define SUSB2_REG_EP_COUNT1 0x0294 -#define SUSB2_REG_EP_COUNT2 0x02A4 -#define SUSB2_REG_EP_COUNT3 0x02B4 -#define SUSB2_REG_EP_COUNT4 0x02C4 -#define SUSB2_REG_EP_COUNT5 0x02D4 -#define SUSB2_REG_EP_COUNT6 0x02E4 -#define SUSB2_REG_EP_COUNT7 0x02F4 -// Device 2 Status -#define SUSB2_REG_EP_STATUS0 0x0286 -#define SUSB2_REG_EP_STATUS1 0x0296 -#define SUSB2_REG_EP_STATUS2 0x02A6 -#define SUSB2_REG_EP_STATUS3 0x02B6 -#define SUSB2_REG_EP_STATUS4 0x02C6 -#define SUSB2_REG_EP_STATUS5 0x02D6 -#define SUSB2_REG_EP_STATUS6 0x02E6 -#define SUSB2_REG_EP_STATUS7 0x02F6 -// Device 2 Count result -#define SUSB2_REG_EP_CNTRES0 0x0288 -#define SUSB2_REG_EP_CNTRES1 0x0298 -#define SUSB2_REG_EP_CNTRES2 0x02A8 -#define SUSB2_REG_EP_CNTRES3 0x02B8 -#define SUSB2_REG_EP_CNTRES4 0x02C8 -#define SUSB2_REG_EP_CNTRES5 0x02D8 -#define SUSB2_REG_EP_CNTRES6 0x02E8 -#define SUSB2_REG_EP_CNTRES7 0x02F8 - -// --------------------------------------------------------- -// others -#define HUSB_TDLISTDONE 0x1000 -#define HUSB_SOF 0x2000 -#define HUSB_ARMV 0x0001 -#define HUSB_AINS_FS 0x0002 -#define HUSB_AINS_LS 0x0004 -#define HUSB_AWAKEUP 0x0008 -#define HUSB_BRMV 0x0010 -#define HUSB_BINS_FS 0x0020 -#define HUSB_BINS_LS 0x0040 -#define HUSB_BWAKEUP 0x0080 - -#define SUSB_EP0_MSG 0x0001 -#define SUSB_EP1_MSG 0x0002 -#define SUSB_EP2_MSG 0x0004 -#define SUSB_EP3_MSG 0x0008 -#define SUSB_EP4_MSG 0x0010 -#define SUSB_EP5_MSG 0x0020 -#define SUSB_EP6_MSG 0x0040 -#define SUSB_EP7_MSG 0x0080 -#define SUSB_RST_MSG 0x0100 -#define SUSB_SOF_MSG 0x0200 -#define SUSB_CFG_MSG 0x0400 -#define SUSB_SUS_MSG 0x0800 -#define SUSB_ID_MSG 0x4000 -#define SUSB_VBUS_MSG 0x8000 - -// --------------------------------------------------------- -// Functions -// --------------------------------------------------------- - -// HPI low-level routines -void cy67k3_isr(void); -void cy67k3_reset(void); -UINT16 cy67k3_read_HPI_DATA(void); -UINT16 cy67k3_read_HPI_MAILBOX(void); -UINT16 cy67k3_read_HPI_ADDRESS(void); -UINT16 cy67k3_read_HPI_STATUS(void); -void cy67k3_write_HPI_DATA(UINT16 data); -void cy67k3_write_HPI_MAILBOX(UINT16 data); -void cy67k3_write_HPI_ADDRESS(UINT16 data); -void cy67k3_write_HPI_STATUS(UINT16 data); - -// HPI API -UINT32 hpi_init(void); -void hpi_mbx_write(UINT16 msgcode); -UINT32 hpi_mbx_read(void); -UINT32 hpi_read_reg(UINT16 addr); -UINT32 hpi_write_reg(UINT16 addr, UINT16 data); -UINT32 hpi_write_ram(UINT16 addr, UINT16 *pData, UINT32 num_words); -UINT32 hpi_read_ram(UINT16 addr, UINT16 *pData, UINT32 num_words); -UINT32 hpi_comm_reset(void); -UINT32 hpi_comm_jump2code(UINT16 addr); -UINT32 hpi_comm_callcode(UINT16 addr); -UINT32 hpi_comm_write_ctrl_reg(UINT16 addr, UINT16 data, UINT16 logic); -UINT32 hpi_comm_read_ctrl_reg(UINT16 addr); -UINT32 hpi_comm_write_xmem(UINT16 addr, UINT8 *pData, UINT16 len); -UINT32 hpi_comm_read_xmem(UINT16 addr, UINT8 *pData, UINT16 len); -UINT32 hpi_comm_exec_int(UINT16 intnum, UINT32 nargs, ...); - -// USB API -UINT32 usb_init(void); -UINT32 usb_irp_register(usb_irp_t *pIRP, UINT32 port, UINT32 ept, UINT32 size, UINT32 is_out); -UINT32 usb_irp_enqueue(usb_irp_t *pIRP); -UINT32 usb_callback_register(UINT32 port, UINT32 type, fp_t pFunc, void *pArg); - -#define FIFO_BLOCK 1 -#define FIFO_NONBLOCK 0 -UINT32 fifo_alloc(fifo_t *pObj, UINT32 size); -UINT32 fifo_free(fifo_t *pObj); -UINT32 fifo_flush(fifo_t *pObj); -UINT32 fifo_is_full(fifo_t *pObj); -UINT32 fifo_is_empty(fifo_t *pObj); -UINT32 fifo_read(fifo_t *pObj, UINT8 *pData, UINT32 size, UINT32 timeout, UINT32 do_block); -UINT32 fifo_write(fifo_t *pObj, UINT8 *pData, UINT32 size, UINT32 timeout, UINT32 do_block); - -#endif // HPI_H diff --git a/lib/CPUs/MIPS/bsp/examples/inflate.c b/lib/CPUs/MIPS/bsp/examples/inflate.c deleted file mode 100644 index b50581d..0000000 --- a/lib/CPUs/MIPS/bsp/examples/inflate.c +++ /dev/null @@ -1,504 +0,0 @@ -/* inflate routines for Palm OS (to inflate a deflated stream) - * - * Based heavily upon gunzip.c by Pasi Ojala - * http://www.cs.tut.fi/~albert/Dev/gunzip/ - * Many, many thanks for that code! - * - * Changes: - * 2002-12-30 - Added #defines to use zlib's struct instead of mine, just - * in case you want to compile it that way. - * 2002-12-29 - Found out that this is VERY slow. ZLib is 3x faster. - * Worked on speeding it up. Partially successful. Profiled - * code and marked critical areas. 1932 bytes added to a - * Palm program by linking in the .o file. Schweet! - * 2002-12-21 - Finished surgery. Only one function to inflate dynamic and - * fixed data. Rewrote table generation to be iterative. - * Hacked and slashed my way through unnecessary code. - * The size is now down to 3512 bytes. - * 2002-12-20 - Started major surgery - * 2002-12-19 - Looked at the code a bit more - * 2002-12-17 - Continued work. Down to about 6k for the .o file - * 2002-12-09 - Continued work, added z_stream_fid instead of globals - * 2002-12-08 - Started work so that it decompresses up to 64k (one memory - * chunk on the Palm. - * 2002-12-07 - Removed bit reverse table. Removed unzip code. - */ -#include "libsys.h" -#include "inflate.h" -#ifdef VERBOSE -#include // Just in case you put a printf() function back in -#endif - -void Status(char *, int); - -typedef struct HufNode_struct { - // b0 and b1 are either values in the tree array to jump to (branches) - // or are literal values. - // if (bX & 0x8000) - // value = bX ^ 0x8000; - // else - // link_to_array_element = bX; - unsigned int b0; // Bigger than 1 byte (2 is ideal) - unsigned int b1; // Bigger than 1 byte (2 is ideal) -} HufNode; - - -// Not that rhobust anymore -- If out of data, this will -// return a whole lot of 1 bits. -// -// This function consumes a large percentage of time (#1) -char READBIT(z_stream *zs) -{ - char carry; - - if (zs->reserved == 1) - { - if (zs->avail_in == 0) - return 1; - zs->reserved = *(zs->next_in ++) | 0x0100; - zs->avail_in --; - } - - carry = zs->reserved & 1; - zs->reserved >>= 1; - - return carry; -} - - -// Make sure that [a] is <= 16 -// If there are endian problems, force [a] to be <= 8 -// Might be faster if all (up to [a] bits) of zs->reserved was read into res -// right away. -// -// This function consumes a large percentage of time (#4) -int READBITS(z_stream *zs, int a) -{ - int res = 0, pos = 0; - - while (a --) - { - if (zs->reserved == 1) - { - if (zs->avail_in == 0) - return 1; - zs->reserved = *(zs->next_in ++) | 0x0100; - zs->avail_in --; - } - - res += (zs->reserved & 1) << pos; - zs->reserved >>= 1; - pos ++; - } - - return res; -} - - -// Huffman tree structures, variables and related routines -// -// These routines are one-bit-at-a-time decode routines. They -// are not as fast as multi-bit routines, but maybe a bit easier -// to understand and use a lot less memory. -// -// The tree is created in an array -// -// currentTree = where to put the tree (in an array) -// numval = Number of elements in the lengths array -// lengths = array of lengths -// -// -// This function consumes a large percentage of time (#5) -int CreateTree(HufNode *currentTree, int numval, unsigned char *lengths) { - int i, j, len; // basically scratch values - int BlankNode; // Where is the next blank array index - int this_code, mask, *bitData; // used in tree generation - int bl_count[16] = { 0, }; // Counter of code lengths - int next_code[16] = { 0, }; // Code for a specific length - // 16 = (15 is max length of a code when inflating) + (1 for zero) - - // Step 1: Count the code lengths - for (i = 0; i < numval; i ++) - { - j = lengths[i]; - if (j > 15) - return 1; - bl_count[j] ++; - } - - // Step 2: Find numerical value of the smallest code of each length - // Also note that I've inserted some weak validation code here. I'm - // not 100% sure that it is up to RFC specs, but it seems to work fine - // in my tests - // - // The validation theory is that at the root node, you have 2 branches or - // values possible. If you branch, you get 2 more potentials. If you - // get a value, you lose one potential. So, if the root node has one of - // each, the number of potentials at the next level is still two. If that - // node just has branches, the number of potentials is four. If both of - // the nodes on the following level just have values, the number of - // potentials is 0, leaving us with a complete tree. - // - // If I don't validate and if an invalid tree gets generated, an - // infinite loop is possible - bl_count[0] = 0; - j = 0; - len = 2; - for (i = 1; i < 16; i ++) - { - len -= bl_count[i]; - len *= 2; - j = (j + bl_count[i - 1]) << 1; - next_code[i] = j; - } - if (len) - return 1; - - // Step 3: Assign numerical values to all codes - BlankNode = 1; - currentTree[0].b0 = 0x0000; - currentTree[0].b1 = 0x0000; - for (i = 0; i < numval; i ++) - { - len = lengths[i]; - if (len != 0) - { - this_code = next_code[len]; - next_code[len] ++; - mask = 1 << (len - 1); - j = 0; - while (mask > 1) - { - if (this_code & mask) - bitData = &(currentTree[j].b1); - else - bitData = &(currentTree[j].b0); - - if (*bitData == 0x0000) - { - *bitData = BlankNode; - j = BlankNode; - BlankNode ++; - currentTree[j].b0 = 0x0000; - currentTree[j].b1 = 0x0000; - } - else - j = *bitData; - - mask >>= 1; - } - if (this_code & 0x01) - currentTree[j].b1 = 0x8000 | i; - else - currentTree[j].b0 = 0x8000 | i; - } - } - -#ifdef VERBOSE - fprintf(stderr, "%d table entries used\n", - BlankNode); - if (numval < 20) { - for (i = 0; i < BlankNode; i ++) - { - fprintf(stderr, "0x%03x - ", i); - if (currentTree[i].b0 & 0x8000) - fprintf(stderr, "value: 0x%03x ", currentTree[i].b0 ^ 0x8000); - else - fprintf(stderr, " link: 0x%03x ", currentTree[i].b0); - - if (currentTree[i].b1 & 0x8000) - fprintf(stderr, "value: 0x%03x\n", currentTree[i].b1 ^ 0x8000); - else - fprintf(stderr, " link: 0x%03x\n", currentTree[i].b1); - } - } -#endif - - return 0; -} - - -// Using the tree passed in, read bits from the data stream until we arrive -// at the proper value -// -// This function consumes a large percentage of time (#2) -int DecodeValue(z_stream *zs, HufNode *currentTree) -{ - unsigned int i = 0; - - // decode one symbol of the data per iteration - // Infinite loop detection code could go here. Maximum - // bits to read is 15. - while (i < 0x8000) - { - if (READBIT(zs)) - i = currentTree[i].b1; - else - i = currentTree[i].b0; - } - return i & 0x7FFF; -} - - -int Decompress_Stored(z_stream *zs) -{ - int blockLen, cSum; - -#ifdef VERBOSE - fprintf(stderr, "Stored\n"); -#endif - - zs->reserved = 1;; - if (zs->avail_in < 4) - return -1; - - zs->avail_in -= 4; - blockLen = *(zs->next_in ++); - blockLen |= *(zs->next_in ++) << 8; - - cSum = *(zs->next_in ++); - cSum |= (*(zs->next_in ++) << 8); - - if ((blockLen + cSum) ^ 0xFFFF) - return 1; - if (zs->avail_in < blockLen || zs->avail_out < blockLen) - return -1; - zs->avail_in -= blockLen; - zs->avail_out -= blockLen; - - while (blockLen --) - { - *(zs->next_out) = *(zs->next_in); - zs->next_out ++; - zs->next_in ++; - } - - return 0; -} - - -int MakeTrees(z_stream *zs, char is_fixed, HufNode *literalTree, - HufNode *distanceTree) -{ - // Order of the bit length code lengths - static const unsigned border[] = { - 16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15 }; - unsigned char ll[288+32]; - int i, j, n, l, literalCodes, distCodes; - - if (is_fixed) - { - literalCodes = 288; - - // Set a large range to 8 - for (i = 0; i < 288; i ++) - ll[i] = 8; - // In that range, set some to 9 and others to 7 - // (smaller code, but slightly slower table generation) - for (i = 144; i < 256; i ++) - ll[i] = 9; - for (; i < 280; i ++) - ll[i] = 7; - - distCodes = 32; - - for (i = 288; i < 320; i ++) - ll[i] = 5; - } - else - { - literalCodes = 257 + READBITS(zs, 5); - distCodes = 1 + READBITS(zs, 5); - l = 4 + READBITS(zs, 4); - - for (j = 0; j < 19; j ++) - ll[j] = 0; - - // Get the decode tree code lengths - // The decode tree is Huffman encoded - - for (j = 0; j < l; j++) - { - ll[border[j]] = READBITS(zs, 3); - } - if (CreateTree(distanceTree, 19, ll)) - return 1; - - // read in literal and distance code lengths - n = literalCodes + distCodes; - i = 0; - while (i < n) - { - j = DecodeValue(zs, distanceTree); - if (j < 16) // length of code in bits (0..15) - ll[i++] = j; - else if (j == 16) - { // repeat last length 3 to 6 times - j = 3 + READBITS(zs, 2); - - if (i + j > n) - return 1; - - l = i ? ll[i-1] : 0; - while (j --) - ll[i++] = l; - } - else - { - if (j == 17) // 3 to 10 zero length codes - j = 3 + READBITS(zs, 3); - else // j == 18: 11 to 138 zero length codes - j = 11 + READBITS(zs, 7); - - if (i + j > n) - return 1; - - while (j --) - ll[i++] = 0; - } - } - } - - - // Can overwrite tree decode tree as it is not used anymore - if (CreateTree(literalTree, literalCodes, &ll[0])) - return 1; - - if(CreateTree(distanceTree, distCodes, &ll[literalCodes])) - return 1; - - return 0; -} - - -// This function consumes a large percentage of time (#3) -// Most output produced by gzip/zlib/etc is dynamic. -int Decompress_DynamicOrFixed(z_stream *zs, char is_fixed) -{ - // Copy lengths for literal codes 257..285 - static const unsigned short cplens[] = { - 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31, - 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0 }; - // Extra bits for literal codes 257..285 - static const unsigned short cplext[] = { - 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, - 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 99, 99 }; // 99==invalid - // Copy offsets for distance codes 0..29 - static const unsigned short cpdist[] = { - 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0007, 0x0009, 0x000d, - 0x0011, 0x0019, 0x0021, 0x0031, 0x0041, 0x0061, 0x0081, 0x00c1, - 0x0101, 0x0181, 0x0201, 0x0301, 0x0401, 0x0601, 0x0801, 0x0c01, - 0x1001, 0x1801, 0x2001, 0x3001, 0x4001, 0x6001 }; - // Extra bits for distance codes - static const unsigned short cpdext[] = { - 0, 0, 0, 0, 1, 1, 2, 2, - 3, 3, 4, 4, 5, 5, 6, 6, - 7, 7, 8, 8, 9, 9, 10, 10, - 11, 11, 12, 12, 13, 13 }; - HufNode literalTree[288]; - HufNode distanceTree[32]; - int j, l, dist; - -#ifdef VERBOSE - if (is_fixed) - fprintf(stderr, "Fixed Huffman codes\n"); - else - fprintf(stderr, "Dynamic Huffman codes\n"); -#endif - - if (MakeTrees(zs, is_fixed, literalTree, distanceTree)) - return 1; - - while (1) - { - j = DecodeValue(zs, literalTree); - if (j >= 256) - { - if (j == 256) // EOF - break; - - //printf("%04x ", j); - j -= 256 + 1; // bytes + EOF - - l = READBITS(zs, cplext[j]) + cplens[j]; - //printf("%04x ", l); - - j = DecodeValue(zs, distanceTree); - //printf("%02x ", j); - - dist = READBITS(zs, cpdext[j]) + cpdist[j]; - //printf("%04x ", dist); - - //printf("LZ77 len %d dist %d @%04x\n", l, dist, bIdx); - while(l--) - { - //printf("%02x ", c); - if (! zs->avail_out --) - return -1; - - *(zs->next_out ++) = *(zs->next_out - dist); - } - //printf("\n"); - } - else - { - //printf("%02x\n", j); - if (! zs->avail_out --) - return -1; - *(zs->next_out ++) = (unsigned char) j; - } - } - return 0; -} - - -// Returns 0 if success -int InflateData(z_stream *zs) { - int last, type; - - zs->reserved = 1;; - - do - { - last = READBIT(zs); -#ifdef VERBOSE - if (last) - fprintf(stderr, "Last Block: "); - else - fprintf(stderr, "Not Last Block: "); -#endif - - type = READBITS(zs, 2); - - if (type == 0) - { -#ifdef VERBOSE - fprintf(stderr, "Decompress_Stored.."); -#endif - if (Decompress_Stored(zs)) - return 1; - } - else if (type > 2) - { -#ifdef VERBOSE - if (type == 3) - fprintf(stderr, "Reserved block type!!\n"); - else // the "else" should never happen - fprintf(stderr, "Unexpected value %d!\n", type); -#endif - zs->reserved = 1;; - return 1; - } - else - { -#ifdef VERBOSE - fprintf(stderr, "Decompress_DynamicOrFixed.."); -#endif - if (Decompress_DynamicOrFixed(zs, type & 0x01)) - return 1; - } - } while(!last); - - zs->reserved = 1;; - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/inflate.h b/lib/CPUs/MIPS/bsp/examples/inflate.h deleted file mode 100644 index 1f6fd38..0000000 --- a/lib/CPUs/MIPS/bsp/examples/inflate.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifdef USE_ZLIB_STRUCT -#include "SysZLib.h" // For PalmOS. Change to your liking. -#else -typedef struct z_stream_s -{ - unsigned char *next_in; // Next input byte (CHANGES) - unsigned int avail_in; // number of bytes left at next_in - unsigned char *next_out; // Next output byte goes here (CHANGES) - unsigned int avail_out; // number of bytes left at next_out - unsigned int reserved; // For the readbit() and readbits() functions - // Bigger than 1 byte -} z_stream; -#endif - -int InflateData(z_stream *zs); diff --git a/lib/CPUs/MIPS/bsp/examples/irq.c b/lib/CPUs/MIPS/bsp/examples/irq.c deleted file mode 100644 index 85e1320..0000000 --- a/lib/CPUs/MIPS/bsp/examples/irq.c +++ /dev/null @@ -1,92 +0,0 @@ -#include -#include -#include -#include -#include -#include "libsys.h" -#include "regdef.h" -#include "xcpt.h" -#include "irq.h" - -static fp_irq_t g_irq_handler[MAX_NUM_IRQ] = {NULL}; - -int _irq_dispatch(struct xcptcontext * xcp) -{ - int i, ip, cause; - - cause = xcp->cr & xcp->sr; - ip = (cause >> 8) & 0xFF; - - for (i=0; i < MAX_NUM_IRQ; i++) - { - if (ip & 1) - if (g_irq_handler[i]) - (g_irq_handler[i])(xcp); - - ip >>= 1; - } - - return 0; -} - -void interrupt_register(int irq_num, fp_irq_t fp) -{ - if ((irq_num >= 0) && (irq_num < MAX_NUM_IRQ)) - g_irq_handler[irq_num] = fp; - -} - -void interrupt_enable(int irq_num) -{ - reg_t reg, im; - - if ((irq_num >= 0) && (irq_num < MAX_NUM_IRQ)) - { - im = 1 << irq_num; - reg = CP0_SR_read(); - reg |= (SR_MASK_IM & (im << 8)); - CP0_SR_write(reg); - } - -} - -void interrupt_disable(int irq_num) -{ - reg_t reg, im; - - if ((irq_num >= 0) && (irq_num < MAX_NUM_IRQ)) - { - im = 1 << irq_num; - reg = CP0_SR_read(); - reg &= ~(SR_MASK_IM & (im << 8)); - CP0_SR_write(reg); - } -} - -void interrupt_set(int irq_num) -{ - reg_t reg, ip; - - if ((irq_num >= 0) && (irq_num < MAX_NUM_IRQ)) - { - ip = 1 << irq_num; - reg = CP0_CR_read(); - reg |= (CR_MASK_IP & (ip << 8)); - CP0_CR_write(reg); - } -} - -void interrupt_clr(int irq_num) -{ - reg_t reg, ip; - - if ((irq_num >= 0) && (irq_num < MAX_NUM_IRQ)) - { - ip = 1 << irq_num; - reg = CP0_CR_read(); - reg &= ~(CR_MASK_IP & (ip << 8)); - CP0_CR_write(reg); - } -} - - diff --git a/lib/CPUs/MIPS/bsp/examples/irq.h b/lib/CPUs/MIPS/bsp/examples/irq.h deleted file mode 100644 index d6c343c..0000000 --- a/lib/CPUs/MIPS/bsp/examples/irq.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef IRQ_H -#define IRQ_H - -#include "xcpt.h" - -#define MAX_NUM_IRQ 8 - -typedef void (*fp_irq_t)(struct xcptcontext * xcp); - -int _irq_dispatch(struct xcptcontext * xcp); -void interrupt_register(int irq_num, fp_irq_t fp); -void interrupt_enable(int irq_num); -void interrupt_disable(int irq_num); - -#endif // IRQ_H diff --git a/lib/CPUs/MIPS/bsp/examples/isqrt.c b/lib/CPUs/MIPS/bsp/examples/isqrt.c deleted file mode 100644 index 6022fc1..0000000 --- a/lib/CPUs/MIPS/bsp/examples/isqrt.c +++ /dev/null @@ -1,89 +0,0 @@ -/* +++Date last modified: 05-Jul-1997 */ - -#include -#include "snipmath.h" - -#define BITSPERLONG 32 - -#define TOP2BITS(x) ((x & (3L << (BITSPERLONG-2))) >> (BITSPERLONG-2)) - - -/* usqrt: - ENTRY x: unsigned long - EXIT returns floor(sqrt(x) * pow(2, BITSPERLONG/2)) - - Since the square root never uses more than half the bits - of the input, we use the other half of the bits to contain - extra bits of precision after the binary point. - - EXAMPLE - suppose BITSPERLONG = 32 - then usqrt(144) = 786432 = 12 * 65536 - usqrt(32) = 370727 = 5.66 * 65536 - - NOTES - (1) change BITSPERLONG to BITSPERLONG/2 if you do not want - the answer scaled. Indeed, if you want n bits of - precision after the binary point, use BITSPERLONG/2+n. - The code assumes that BITSPERLONG is even. - (2) This is really better off being written in assembly. - The line marked below is really a "arithmetic shift left" - on the double-long value with r in the upper half - and x in the lower half. This operation is typically - expressible in only one or two assembly instructions. - (3) Unrolling this loop is probably not a bad idea. - - ALGORITHM - The calculations are the base-two analogue of the square - root algorithm we all learned in grammar school. Since we're - in base 2, there is only one nontrivial trial multiplier. - - Notice that absolutely no multiplications or divisions are performed. - This means it'll be fast on a wide range of processors. -*/ - -void usqrt(unsigned long x, struct int_sqrt *q) -{ - unsigned long a = 0L; /* accumulator */ - unsigned long r = 0L; /* remainder */ - unsigned long e = 0L; /* trial product */ - - int i; - - for (i = 0; i < BITSPERLONG; i++) /* NOTE 1 */ - { - r = (r << 2) + TOP2BITS(x); x <<= 2; /* NOTE 2 */ - a <<= 1; - e = (a << 1) + 1; - if (r >= e) - { - r -= e; - a++; - } - } - memcpy(q, &a, sizeof(long)); -} - -#ifdef TEST - -#include -#include - -main(void) -{ - int i; - unsigned long l = 0x3fed0169L; - struct int_sqrt q; - - for (i = 0; i < 101; ++i) - { - usqrt(i, &q); - printf("sqrt(%3d) = %2d, remainder = %2d\n", - i, q.sqrt, q.frac); - } - usqrt(l, &q); - printf("\nsqrt(%lX) = %X, remainder = %X\n", l, q.sqrt, q.frac); - return 0; -} - -#endif /* TEST */ diff --git a/lib/CPUs/MIPS/bsp/examples/kernel.S b/lib/CPUs/MIPS/bsp/examples/kernel.S deleted file mode 100644 index aa0648b..0000000 --- a/lib/CPUs/MIPS/bsp/examples/kernel.S +++ /dev/null @@ -1,184 +0,0 @@ -#include -#include - - .section .exc_vect -_xcpt_vector_tbl: - .fill 16, 4, 0 - - .text - -LEAF(_xcpt_handler) - .set noreorder - .set noat - /* Note: exceptions do not save and restore registers k0 and k1. - * on entry, k1 = exception class. - */ - - /* allocate exception stack frame (on 8-byte boundary) */ - subu k1, sp, XCP_SIZE - srl k1, 3 /* shift right/left -> alligned on boundary */ - sll k1, 3 - - /* save enough registers to get by */ - sw AT, XCP_AT(k1) - sw v0, XCP_V0(k1) - sw v1, XCP_V1(k1) - sw a0, XCP_A0(k1) - sw a1, XCP_A1(k1) - sw a2, XCP_A2(k1) - sw a3, XCP_A3(k1) - sw sp, XCP_SP(k1) - sw ra, XCP_RA(k1) - - /* get coprocessor 0 exception state */ - mfc0 a0, CP0_CR - mfc0 a1, CP0_SR - mfc0 a2, CP0_BADDR - mfc0 a3, CP0_EPC - - /* we can safely use AT now */ - .set at - - /* switch to using sp to point at exception frame */ - move sp, k1 - - /* nothing sensible to store for k0/k1, store zero */ - sw zero, XCP_K0(sp) - sw zero, XCP_K1(sp) - - /* we are now interruptible: dump all remaining state - * into the exception stack frame. - */ - /* coprocessor exception state */ - sw a0, XCP_CR(sp) - sw a1, XCP_SR(sp) - sw a2, XCP_BADDR(sp) - sw a3, XCP_EPC(sp) - - /* mdhi and mdlo */ - mfhi v0 - mflo v1 - sw v0, XCP_MDHI(sp) - sw v1, XCP_MDLO(sp) - - /* Save all the other general registers. - * We save zero, s0-s7 and s8 as well, as instruction emulators (e.g. FP - * operations) and debuggers rely on all registers stored together in - * well-defined structure. - */ - sw zero, XCP_ZERO(sp) - sw t0, XCP_T0(sp) - sw t1, XCP_T1(sp) - sw t2, XCP_T2(sp) - sw t3, XCP_T3(sp) - sw t4, XCP_T4(sp) - sw t5, XCP_T5(sp) - sw t6, XCP_T6(sp) - sw t7, XCP_T7(sp) - sw s0, XCP_S0(sp) - sw s1, XCP_S1(sp) - sw s2, XCP_S2(sp) - sw s3, XCP_S3(sp) - sw s4, XCP_S4(sp) - sw s5, XCP_S5(sp) - sw s6, XCP_S6(sp) - sw s7, XCP_S7(sp) - sw t8, XCP_T8(sp) - sw t9, XCP_T9(sp) - sw gp, XCP_GP(sp) - sw s8, XCP_S8(sp) - - /* I don't know what the following does. [rb] */ - /* load our _gp pointer */ -# la gp, _gp - - /* and call the C exception handler */ - move a0, sp # arg1 = &xcp - subu sp, 16 # (arg save area) - j _xcpt_call - move ra, zero # fake return address - - /* This strange call to _xcpt_call with zero return address is to - * help exception-aware debuggers to trace back over the exception event. - * We are basically interposing a bogus stackframe (with a zero return - * address) between the C exception handler and the actual machine - * exception. - */ -$xcptrest: - .set noat - add AT, sp, 16 - - /* at points to exception frame */ -$xcptrestother: - /* restore all state */ - /* restore most general registers */ - lw t0, XCP_T0(AT) - lw t1, XCP_T1(AT) - lw t2, XCP_T2(AT) - lw t3, XCP_T3(AT) - lw t4, XCP_T4(AT) - lw t5, XCP_T5(AT) - lw t6, XCP_T6(AT) - lw t7, XCP_T7(AT) - lw s0, XCP_S0(AT) - lw s1, XCP_S1(AT) - lw s2, XCP_S2(AT) - lw s3, XCP_S3(AT) - lw s4, XCP_S4(AT) - lw s5, XCP_S5(AT) - lw s6, XCP_S6(AT) - lw s7, XCP_S7(AT) - lw t8, XCP_T8(AT) - lw t9, XCP_T9(AT) - lw gp, XCP_GP(AT) - lw s8, XCP_S8(AT) - - /* mdhi and mdlo */ - lw v0, XCP_MDHI(AT) - lw v1, XCP_MDLO(AT) - mthi v0 - mtlo v1 - - /* remaining general registers */ - lw a0, XCP_A0(AT) - lw a1, XCP_A1(AT) - lw a2, XCP_A2(AT) - lw a3, XCP_A3(AT) - lw ra, XCP_RA(AT) - - /* restore the exception-time status register */ - .set noreorder - lw v0, XCP_SR(AT) - nop - mtc0 v0, CP0_SR - lw v1, XCP_V1(AT) - lw v0, XCP_V0(AT) - lw sp, XCP_SP(AT) - - /* we are not uninterruptible and can use k1 safely */ - lw k1, XCP_EPC(AT) - lw AT, XCP_AT(AT) - mtc0 k1, CP0_EPC - j k1 - rfe - - .set reorder - .set at -END(_xcpt_handler) - - -LEAF(_xcpt_call) - /* on entry: a0 == &xcp */ - subu sp, 24 - sw ra, 16(sp) - - /* punt out to _xcpt_deliver */ - jal _xcpt_deliver - nop - lw ra, 16(sp) - addu sp, 24 - beqz ra, $xcptrest - nop - j ra - nop -END(_xcpt_call) diff --git a/lib/CPUs/MIPS/bsp/examples/libsys.c b/lib/CPUs/MIPS/bsp/examples/libsys.c deleted file mode 100644 index 93721da..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys.c +++ /dev/null @@ -1,1101 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include "libsys.h" - - -// --------------------------------------------------------------------------------- -// Forward declarations -// --------------------------------------------------------------------------------- -void flush(UINT32 port); -UINT32 GetPort(int file); - -// --------------------------------------------------------------------------------- -// Types -// --------------------------------------------------------------------------------- -void libsys_init(void) -{ - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - UINT32 volatile *pITIM_ctrl = (UINT32*)SYS_ITIM_CTRL; - - Screen_clr(); - - // Disable timers - *pITIM_ctrl = 0; - - // Disable all VGA stuff - *pVGA_ctrl = 0; - - // Initialzie syscall support - syscalls_init(); - - // Initalize debugger - dbg_init(); - - // flush stdin - flush(GetPort(0)); - - // Do some initializations here - -} - -UINT32 GetPort(int file) -{ - if (file == 0) - return 0; - - if (file == 1) - return 0; - - if (file == 2) - return 2; -} - -enum -{ - IF_TYPE_INVALID = 0, - IF_TYPE_UART, - IF_TYPE_PS2, - IF_TYPE_VGA -}; - -typedef struct _suart_if_t -{ - volatile UINT32 *pCTRL; - volatile UINT32 *pDATA; - volatile UINT32 *pBAUD; -} uart_if_t; - -typedef struct _sps2_if_t -{ - volatile UINT32 *pCTRL; - volatile UINT32 *pDATA; -} ps2_if_t; - -typedef struct _svga_if_t -{ - volatile UINT32 *pCTRL; - volatile UINT32 *pDATA; - volatile UINT32 *pCSRX; - volatile UINT32 *pCSRY; -} vga_if_t; - -typedef struct _scon_if_in_t -{ - UINT32 type; - void *pIF; -} con_if_in_t; - -typedef struct _scon_if_out_t -{ - UINT32 type; - void *pIF; -} con_if_out_t; - -// --------------------------------------------------------------------------------- -// Globals -// --------------------------------------------------------------------------------- -static uart_if_t uart_if[2] = -{ - {(UINT32*)SYS_UART0_STAT, (UINT32*)SYS_UART0_DATA, (UINT32*)SYS_UART0_BAUD}, - {(UINT32*)SYS_UART1_STAT, (UINT32*)SYS_UART1_DATA, (UINT32*)SYS_UART1_BAUD} -}; - -extern ps2_if_t ps2_if[]; - -static vga_if_t vga_if = -{ - (UINT32*)SYS_VGA_CTRL, (UINT32*)SYS_VGA_ASCII, (UINT32*)SYS_VGA_POSX, (UINT32*)SYS_VGA_POSY -}; - -static con_if_in_t con_if_in[4] = -{ - {IF_TYPE_UART, &uart_if[0]}, - {IF_TYPE_UART, &uart_if[1]}, - {IF_TYPE_PS2, &ps2_if[0]}, - {IF_TYPE_PS2, &ps2_if[1]} -}; - -static con_if_out_t con_if_out[4] = -{ - {IF_TYPE_UART, &uart_if[0]}, - {IF_TYPE_UART, &uart_if[1]}, - {IF_TYPE_VGA, &vga_if}, - {IF_TYPE_INVALID, NULL} -}; - -// --------------------------------------------------------------------------------- -// MIPS specific -// --------------------------------------------------------------------------------- -UINT32 CP0_SR_read(void) -{ - UINT32 result; - - __asm__ - ( - "mfc0 %[val], $12\n" - : [val] "=r" (result) - ); - - return result; -} - -void CP0_SR_write(UINT32 val) -{ - __asm__ - ( - "mtc0 %[val], $12\n" - : /* no output */ - : [val] "r" (val) - ); -} - -UINT32 CP0_CR_read(void) -{ - UINT32 result; - - __asm__ - ( - "mfc0 %[val], $13\n" - : [val] "=r" (result) - ); - - return result; -} - -void CP0_CR_write(UINT32 val) -{ - __asm__ - ( - "mtc0 %[val], $13\n" - : - : [val] "r" (val) - ); -} - -UINT32 CP0_TR_read(void) -{ - UINT32 result; - - __asm__ - ( - "mfc0 %[val], $31\n" - : [val] "=r" (result) - ); - - return result; -} - -void CP0_TR_write(UINT32 val) -{ - __asm__ - ( - "mtc0 %[val], $31\n" - : - : [val] "r" (val) - ); -} - -UINT32 CP0_PRID_read(void) -{ - UINT32 result; - - __asm__ - ( - "mfc0 %[val], $15\n" - : [val] "=r" (result) - ); - - return result; -} - -void CP0_TR_write_ptr(UINT32* pPtr) -{ - __asm__ - ( - "swc0 $31, 0(%[pPtr])\n" - : - : [pPtr] "r" (pPtr) - ); -} - -void CP0_TR_read_ptr(UINT32* pPtr) -{ - __asm__ - ( - "lwc0 $31, 0(%[pPtr])\n" - : - : [pPtr] "r" (pPtr) - ); -} - -void ICACHE_invalidate_all(void) -{ - __asm__ - ( - "cop0 32\n" - ); -} - -void ICACHE_invalidate_at(UINT32* pPtr) -{ - __asm__ - ( - "mtc0 %[pPtr], $31\n" - "cop0 33\n" - : - : [pPtr] "r" (pPtr) - ); -} - -void DCACHE_invalidate_all(void) -{ - __asm__ - ( - "cop0 34\n" - ); -} - -void DCACHE_invalidate_at(UINT32* pPtr) -{ - __asm__ - ( - "mtc0 %[pPtr], $31\n" - "cop0 35\n" - : - : [pPtr] "r" (pPtr) - ); -} - -// ------------------------------------------------------------- -// BEGIN QUICK AND DIRTY -// ------------------------------------------------------------- -//keymap for the AT keyboard SG layout -typedef struct -{ - UINT8 scancode; - UINT8 unshifted; - UINT8 shifted; - UINT8 altered; -} libsys_key_entry_t; - -#define SHIFTED (1<<0) -#define ALTERED (1<<1) -#define CONTROLLED (1<<2) - -static const libsys_key_entry_t __keymap_german[] = -{ - {0x1c, 'a', 'A', 'a'}, - {0x32, 'b', 'B', 'b'}, - {0x21, 'c', 'C', 'c'}, - {0x23, 'd', 'D', 'd'}, - {0x24, 'e', 'E', '€'}, - {0x2b, 'f', 'F', 'f'}, - {0x34, 'g', 'G', 'g'}, - {0x33, 'h', 'H', 'h'}, - {0x43, 'i', 'I', 'i'}, - {0x3b, 'j', 'J', 'j'}, - {0x42, 'k', 'K', 'k'}, - {0x4b, 'l', 'L', 'l'}, - {0x3a, 'm', 'M', 'µ'}, - {0x31, 'n', 'N', 'n'}, - {0x44, 'o', 'O', 'o'}, - {0x4d, 'p', 'P', 'p'}, - {0x15, 'q', 'Q', '@'}, - {0x2d, 'r', 'R', 'r'}, - {0x1b, 's', 'S', 's'}, - {0x2c, 't', 'T', 't'}, - {0x3c, 'u', 'U', 'u'}, - {0x2a, 'v', 'V', 'v'}, - {0x1d, 'w', 'W', 'w'}, - {0x22, 'x', 'X', 'x'}, - {0x1a, 'y', 'Y', 'y'}, - {0x35, 'z', 'Z', 'z'}, - {0x16, '1', '!', '1'}, - {0x1e, '2', '"', '2'}, - {0x26, '3', '§', '3'}, - {0x25, '4', '$', '4'}, - {0x2e, '5', '%', '5'}, - {0x36, '6', '&', '6'}, - {0x3d, '7', '/', '{'}, - {0x3e, '8', '(', '['}, - {0x46, '9', ')', ']'}, - {0x45, '0', '=', '}'}, - {0x4e, 'ß', '?', '\\'}, - {0x29, ' ', ' ', ' '}, - {0x41, ',', ';', ','}, - {0x49, '.', ':', '.'}, - {0x4a, '-', '_', '-'}, - {0x52, 'ä', 'Ä', 'ä'}, - {0x4c, 'ö', 'Ö', 'ö'}, - {0x54, 'ü', 'Ü', 'ü'}, - {0x5a, '\n', '\n', '\n'}, //RETURN - {0x5b, '+', '*', '~'}, - {0x5d, '#', '\'', '#'}, - {0x0e, '^', '°', '^'}, - {0x61, '<', '>', '|'}, - {0x66, '\b', '\b', '\b'}, - {0} //sentinel -}; - -static char __findkey(char scancode, int mode) -{ - const libsys_key_entry_t *p = __keymap_german; - while (p->scancode) - { - if (p->scancode == scancode) - { - switch (mode) - { - case SHIFTED: - return p->shifted; - case ALTERED: - return p->altered; - case ALTERED|SHIFTED: - default: - return p->unshifted; - } - } - p++; - } - return 0; -} - -#define RELEASE 0x8000 -#define SPECIALKEY 0x4000 -#define EXTENDED 0x2000 -#define X_CONTROLLED 0x0400 -#define X_ALTERED 0x0200 -#define X_SHIFTED 0x0100 -#define CAPS (SPECIALKEY|0x58) -#define F1 (SPECIALKEY|0x05) -#define F2 (SPECIALKEY|0x06) -#define F3 (SPECIALKEY|0x04) -#define F4 (SPECIALKEY|0x0c) -#define F5 (SPECIALKEY|0x03) -#define F6 (SPECIALKEY|0x0b) -#define F7 (SPECIALKEY|0x83) -#define F8 (SPECIALKEY|0x0a) -#define F9 (SPECIALKEY|0x01) -#define F10 (SPECIALKEY|0x09) -#define F11 (SPECIALKEY|0x78) -#define F12 (SPECIALKEY|0x07) -#define ARROW_UP (SPECIALKEY|EXTENDED|0x75) -#define ARROW_DOWN (SPECIALKEY|EXTENDED|0x72) -#define ARROW_LEFT (SPECIALKEY|EXTENDED|0x6b) -#define ARROW_RIGHT (SPECIALKEY|EXTENDED|0x74) - -UINT32 PS2_readchar(ps2_if_t *pIF) -{ - if (!pIF) - return -1; - - while (!(SYS_PS2_BIT_RX_AVAIL & *pIF->pCTRL)); - - return (*pIF->pDATA & 0xFF); - -} - -UINT32 con_readchar(ps2_if_t *pIF) -{ - UINT8 c; - static char mode = 0; - static char nextrelease = 0; - static char extended = 0; - int flags = 0; - int char_valid = 0; - UINT8 key; - - key = PS2_readchar(pIF); - - switch (key) - { - case 0xf0: //release key - nextrelease = 1; - break; - case 0x14: //control key - if (nextrelease) - { - mode &= ~CONTROLLED; - } else - { - mode |= CONTROLLED; - } - nextrelease = 0; - break; - case 0x12: //left SHIFT - case 0x59: //right SHIFT - if (nextrelease) - { - mode &= ~SHIFTED; - } else - { - mode |= SHIFTED; - } - nextrelease = 0; - break; - case 0x11: //left and right ALT (right one also with E0) - if (nextrelease) - { - mode &= ~ALTERED; - } else - { - mode |= ALTERED; - } - nextrelease = 0; - break; - case 0xe0: //extended key following - extended = 1; - break; - default: - if (nextrelease) flags |= RELEASE; - if (extended) flags |= EXTENDED; - flags |= mode << 8; - c = __findkey(key, mode); - char_valid = (c && ((flags & RELEASE) != RELEASE)); - nextrelease = 0; - extended = 0; - break; - } - - if (char_valid) - { - // fprintf(stderr, "c = %c (%d), flags = 0x%08X, mode = 0x%08X\n", c, c, flags, mode); - return c; - } - - return -1; -} -// ------------------------------------------------------------- -// END QUICK AND DIRTY -// ------------------------------------------------------------- - -// ------------------------------------ -// Low-level I/O -// ------------------------------------ -int UART_readchar(uart_if_t *pIF) -{ - if (!pIF) - return -1; - - if (SYS_UART_BIT_RX_AVAIL & *pIF->pCTRL) - return (*pIF->pDATA & 0xFF); - - return -1; -} - -void UART_writechar(uart_if_t *pIF, char c) -{ - if (!pIF) - return; - - while((SYS_UART_BIT_TX_HALFFULL & *pIF->pCTRL) != 0); - - *pIF->pDATA = (UINT32)c; -} - -void cg_writechar(vga_if_t *pIF, char c) -{ - UINT32 code; - - if (!pIF) - return; - - // Output translation - switch(c) - { - case 'Ä': - code = 196; - break; - - case 'ä': - code = 228; - break; - - case 'Ö': - code = 214; - break; - - case 'ö': - code = 246; - break; - - case 'Ü': - code = 220; - break; - - case 'ü': - code = 252; - break; - - case '&': - code = 230; - break; - - case '§': - code = 167; - break; - - case 'ß': - code = 223; - break; - - case '°': - code = 176; - break; - - case 'µ': - code = 181; - break; - - default: - code = (UINT32)c; - break; - } - - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pDATA = code; -} - -void cg_set_csr_x(vga_if_t *pIF, UINT32 coord) -{ - if (!pIF) - return; - - // Set cursor - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pCSRX = coord; -} - -void cg_set_csr_y(vga_if_t *pIF, UINT32 coord) -{ - if (!pIF) - return; - - // Set cursor - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pCSRY = coord; -} - -void cg_clr_line(vga_if_t *pIF) -{ - if (!pIF) - return; - - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pCTRL |= SYS_VGA_BIT_CLRLINE; -} - -void cg_clr_screen(vga_if_t *pIF) -{ - - if (!pIF) - return; - - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pCTRL |= SYS_VGA_BIT_CLRSCR; - - // Cursor home - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pCSRX = 0; - - while (!(*pIF->pCTRL & SYS_VGA_BIT_CGRDY)); - *pIF->pCSRY = 0; - -} - -void Screen_clr(void) -{ - cg_clr_screen(&vga_if); -} - -void Screen_line_clr(void) -{ - cg_clr_line(&vga_if); -} - -void Screen_csr_set_x(UINT32 coord) -{ - cg_set_csr_x(&vga_if, coord); -} - -void Screen_csr_set_y(UINT32 coord) -{ - cg_set_csr_y(&vga_if, coord); -} - -UINT32 Screen_get_resx(void) -{ - UINT32 volatile *pVGA_res = (UINT32*)SYS_VGA_RES; - - return (0xFFF & (*pVGA_res >> 0)); -} - -UINT32 Screen_get_resy(void) -{ - UINT32 volatile *pVGA_res = (UINT32*)SYS_VGA_RES; - - return (0xFFF & (*pVGA_res >> 12)); -} - -UINT32 Screen_get_fps(void) -{ - UINT32 volatile *pVGA_res = (UINT32*)SYS_VGA_RES; - - return (0xFF & (*pVGA_res >> 24)); -} - -// --------------------------------------------------------------------------------- -void flush(UINT32 port) -{ - int c; - con_if_in_t *pIF; - - pIF = &con_if_in[port]; - - do - { - switch(pIF->type) - { - case IF_TYPE_UART: - c = UART_readchar((uart_if_t*)pIF->pIF); - break; - - case IF_TYPE_PS2: - c = con_readchar((ps2_if_t*)pIF->pIF); - break; - - default: - break; - } - - } while(c > 0); -} - -char readchar(UINT32 port) -{ - int c; - con_if_in_t *pIF; - - pIF = &con_if_in[port]; - - do - { - switch(pIF->type) - { - case IF_TYPE_UART: - c = UART_readchar((uart_if_t*)pIF->pIF); - break; - - case IF_TYPE_PS2: - c = con_readchar((ps2_if_t*)pIF->pIF); - break; - - default: - break; - } - - } while(c < 0); - - return (char)c; -} - -void writechar(UINT32 port, char c) -{ - con_if_out_t *pIF; - - pIF = &con_if_out[port]; - - switch(pIF->type) - { - case IF_TYPE_UART: - UART_writechar((uart_if_t*)pIF->pIF, c); - break; - - case IF_TYPE_VGA: - cg_writechar((vga_if_t*)pIF->pIF, c); - break; - - default: - break; - } -} - -void _putchar(UINT32 port, char c) -{ - - con_if_out_t *pIF; - - pIF = &con_if_out[port]; - - switch(pIF->type) - { - case IF_TYPE_UART: - if (c == 0x0A) - UART_writechar((uart_if_t*)pIF->pIF, 0x0D); - UART_writechar((uart_if_t*)pIF->pIF, c); - break; - - case IF_TYPE_VGA: - cg_writechar((vga_if_t*)pIF->pIF, c); - if (c == 0x0A) - { - cg_clr_line((vga_if_t*)pIF->pIF); - cg_writechar((vga_if_t*)pIF->pIF, 0x0D); - } - break; - - default: - break; - } -} - -char _getchar(void) -{ - return readchar(GetPort(0)); -} - -void _exit (int exitcode) -{ - fflush(stdout); - fflush(stderr); - while(1); -} - -void sleep(unsigned ms) -{ - unsigned stop; - struct tms t; - - times(&t); - stop = t.tms_utime + ms; - - do - { - times(&t); - } while (t.tms_utime < stop); - -} - - -int getrusage(int who, struct rusage *usage) -{ - volatile long *pReg_usec = (long*)SYS_TIMER_USEC; - volatile long *pReg_sec = (long*)SYS_TIMER_SEC; - - // who: RUSAGE_SELF or RUSAGE_CHILDREN - usage->ru_utime.tv_usec = *pReg_usec; - usage->ru_utime.tv_sec = *pReg_sec; - usage->ru_stime.tv_usec = *pReg_usec; - usage->ru_stime.tv_sec = *pReg_sec; -} - -clock_t times(struct tms *buffer) -{ - volatile long *pReg_usec = (long*)SYS_TIMER_USEC; - volatile long *pReg_sec = (long*)SYS_TIMER_SEC; - long sec; - long usec; - - sec = *pReg_sec; - usec = *pReg_usec; - - if (buffer) - { - buffer->tms_utime = sec*1000 + usec/1000; - buffer->tms_stime = 0; - buffer->tms_cutime = 0; - buffer->tms_cstime = 0; - } - - return (clock_t)sec; -} - -int gettimeofday(struct timeval *tp, void *tzp) -{ - volatile long *pReg_usec = (long*)SYS_TIMER_USEC; - volatile long *pReg_sec = (long*)SYS_TIMER_SEC; - - if (tp) - { - tp->tv_sec = *pReg_sec; - tp->tv_usec = *pReg_usec; - } - - return 0; -} - -int settimeofday(const struct timeval *tp, const struct timezone *tzp) -{ - volatile long *pReg_usec = (long*)SYS_TIMER_USEC; - volatile long *pReg_sec = (long*)SYS_TIMER_SEC; - div_t res; - - res = div(tp->tv_usec, 1E6); - - if (tp) - { - *pReg_usec = res.rem; - *pReg_sec = tp->tv_sec + res.quot; - } - - return 0; -} - -caddr_t sbrk(int incr) -{ - extern char end; - extern char stack_ptr; - static char *heap_end; - char *prev_heap_end; - - if (heap_end == 0) - { - heap_end = &end; - } - - prev_heap_end = heap_end; - if (heap_end + incr > &stack_ptr) - { -// sputs("Heap and stack collision\n"); -// sputs("Stack Ptr = ");print_word(&stack_ptr);sputs("\n"); -// sputs("Heap end = ");print_word(heap_end);sputs("\n"); -// sputs("Increment = ");print_word(incr);sputs("\n"); - exit(1); - } - heap_end += incr; - return (caddr_t) prev_heap_end; -} - -int fstat(int file, struct stat *st) -{ -// sputs("fstat ("); print_word(file); sputs(")\n"); - st->st_mode = S_IFCHR; - st->st_blksize = 0; - return 0; -} - -int lseek(int file, int ptr, int dir) -{ -// sputs("lseek ("); print_word(file); sputs(")\n"); - errno = ESPIPE; - return -1; -} - -int open(const char *name, int flags, int mode) -{ -// sputs("open (\""); sputs(name); sputs("\")\n"); - errno = EIO; - return -1; -} - -int close(int file) -{ -// sputs("close ("); print_word(file); sputs(")\n"); - return 0; -} - -int read(int file, char *ptr, int len) -{ - UINT32 port; - int i; - char c; - -// sputs("read (file="); print_word(file); sputs(", len ="); print_word(len); sputs(")\n"); - i = 0; - port = GetPort(file); - - while (i < len) - { - c = readchar(port); - - if (c == 0x04) - break; - - if ((c == 0x0D) || (c == 0x0A)) - { - writechar(port, 0x0D); - ptr[i++] = 0x0D; - writechar(port, 0x0A); - ptr[i++] = 0x0A; - break; - } - - writechar(port, c); - ptr[i++] = c; - - } - return i; -} - -int write(int file, char *ptr, int len) -{ - UINT32 port; - int i = 0; - -// sputs("write ("); print_word(file); sputs(")\n"); - - port = GetPort(file); - for (i=0; i < len; i++) - _putchar(port, *ptr++); - - return i; -} - -int isatty(int file) -{ -// sputs("isatty ("); print_word(file); sputs(")\n"); - return 1; -} - -int getpid(void) -{ - return 1; -} - -#include -#undef errno -extern int errno; -int kill(int pid, int sig) -{ - errno = EINVAL; - return -1; -} - -#include -#undef errno -extern int errno; -int link(char *old, char *new) -{ - errno = EMLINK; - return -1; -} - -#include -#undef errno -extern int errno; -int unlink(char *name) -{ - errno = ENOENT; - return -1; -} - -int sputs(char *pStr) -{ - char *start; - start = pStr; - - while(*pStr) - _putchar(GetPort(0), *(pStr++)); - - return pStr - start; -} - -void print_byte(char byte) -{ - int i; - unsigned char c, nibble; - - for (i=0; i < 2; i++) - { - nibble = (char)((byte >> 4) & 0xF); - byte <<= 4; - - if (nibble < 10) - c = nibble + '0'; - else - c = nibble + 'A' - 10; - - _putchar(GetPort(0), c); - } -} - -void print_word(int word) -{ - int i; - unsigned char c, nibble; - - for (i=0; i < 4; i++) - { - c = (char) (word >> 24); - print_byte(c); - word <<= 8; - } -} - -// --------------------------------------------------------------------------------- -// PrintBuffer8() -// Prints byte buffer as hex and ascii interpretation -// --------------------------------------------------------------------------------- -// _Parameters : -// pBuf: : IN: Buffer to display -// nbpr : Number of bytes per row to display -// len : Length of input buffer -// _Return: none -// -// --------------------------------------------------------------------------- -void PrintBuffer8(UINT8 *pBuf, int nbpr, int len) -{ - memdump(pBuf, 1, nbpr, len); -} - -void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len) -{ - int i, j, cnt_hex, cnt_asc, base; - unsigned char c; - - i = j = 0; - cnt_hex = len; - cnt_asc = len; - base = 0; - if (!print_offset_only) - base = (int)pBuf; - - do - { - print_word(base + i); - sputs(": "); - for (j=0; j < num_bytes_per_row; j++) - { - if (cnt_hex) - { - print_byte(pBuf[i+j]); - sputs(" "); - cnt_hex--; - } - else - { - sputs(" "); - break; - } - - } - - sputs(" "); - for (j=0; j < num_bytes_per_row; j++) - { - if (cnt_asc) - { - c = pBuf[i+j]; - if((c < 0x20) || (c > 0x7F)) - c = '.'; - - _putchar(GetPort(0), c); - cnt_asc--; - } - else - { - sputs(" "); - break; - } - } - sputs("\n"); - i += num_bytes_per_row; - - } while (cnt_hex); -} - diff --git a/lib/CPUs/MIPS/bsp/examples/libsys.h b/lib/CPUs/MIPS/bsp/examples/libsys.h deleted file mode 100644 index d14d2d9..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys.h +++ /dev/null @@ -1,187 +0,0 @@ -#ifndef LIBSYS_H -#define LIBSYS_H - -// --------------------------------------------------------- -// Types -// --------------------------------------------------------- -#define INT8 signed char -#define INT16 signed short -#define INT32 signed int -#define INT64 signed long long -#define UINT8 unsigned char -#define UINT16 unsigned short -#define UINT32 unsigned int -#define UINT64 unsigned long long -#define INT INT32 -#define UINT UINT32 -#define FLOAT32 float -#define FLOAT64 double - -#define NO_ERROR LSYS_SUCCESS -#define ERROR LSYS_ERR_BASE -#define LSYS_SUCCESS 0 -#define LSYS_ERR_BASE 0x80000000 - -#define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE) - -// GPIO -#define SYS_GPIO0 0xA0000000 -#define SYS_GPIO1 0xA0000004 -#define SYS_LED_PORT SYS_GPIO0 -#define SYS_USB_CTRL SYS_GPIO1 -#define SYS_TIMER_USEC 0xA0000008 -#define SYS_TIMER_SEC 0xA000000C - -// TIMERs -#define SYS_ITIM_CTRL 0xA0000018 -#define SYS_ITIM_STAT 0xA000001C -#define SYS_ITIM0_CNT 0xA0000020 -#define SYS_ITIM1_CNT 0xA0000024 -#define SYS_ITIM2_CNT 0xA0000028 -#define SYS_ITIM3_CNT 0xA000002C -#define SYS_ITIM0_CMP 0xA0000030 -#define SYS_ITIM1_CMP 0xA0000034 -#define SYS_ITIM2_CMP 0xA0000038 -#define SYS_ITIM3_CMP 0xA000003C - -// UARTs -#define SYS_UART_BIT_TX_HALFFULL 0x00000001 -#define SYS_UART_BIT_TX_FULL 0x00000002 -#define SYS_UART_BIT_RX_HALFFULL 0x00000004 -#define SYS_UART_BIT_RX_FULL 0x00000008 -#define SYS_UART_BIT_RX_AVAIL 0x00000010 -#define SYS_UART_BIT_TX_INTEN 0x00000020 -#define SYS_UART_BIT_RX_INTEN 0x00000040 -#define SYS_UART_BIT_TX_IRQ 0x00000100 -#define SYS_UART_BIT_RX_IRQ 0x00000200 -#define SYS_UART_DATA SYS_UART0_DATA -#define SYS_UART_STAT SYS_UART0_STAT -#define SYS_UART_BAUD SYS_UART0_BAUD -#define SYS_UART0_DATA 0xA0010000 -#define SYS_UART0_STAT 0xA0010004 -#define SYS_UART0_BAUD 0xA0010008 -#define SYS_UART1_DATA 0xA0010100 -#define SYS_UART1_STAT 0xA0010104 -#define SYS_UART1_BAUD 0xA0010108 - -// PS2s -#define SYS_PS2_BIT_TX_EMPTY 0x00000001 -#define SYS_PS2_BIT_RX_AVAIL 0x00000004 -#define SYS_PS2_BIT_PIN_CLOCK 0x00000008 -#define SYS_PS2_BIT_PIN_DATA 0x00000010 -#define SYS_PS2_BIT_TX_INTEN 0x00000020 -#define SYS_PS2_BIT_RX_INTEN 0x00000040 -#define SYS_PS2_BIT_TX_IRQ 0x00000100 -#define SYS_PS2_BIT_RX_IRQ 0x00000200 -#define SYS_PS2_BIT_RX_ERR_PAR 0x00000800 -#define SYS_PS2_BIT_RX_ERR_FLAG 0x00008000 -#define SYS_PS2_0_DATA 0xA0010200 -#define SYS_PS2_0_STAT 0xA0010204 -#define SYS_PS2_1_DATA 0xA0010300 -#define SYS_PS2_1_STAT 0xA0010304 - -// USB -#define SYS_USB_DATA 0xA0020000 -#define SYS_USB_MBX 0xA0020004 -#define SYS_USB_ADDR 0xA0020008 -#define SYS_USB_STATUS 0xA002000C - -// VGA -#define SYS_VGA_CTRL 0xA0030000 // R/W -#define SYS_VGA_BIT_CGRDY 0x00000001 // RO -#define SYS_VGA_BIT_MSTEN 0x00000002 // R/W -#define SYS_VGA_BIT_BUFCHG_INTEN 0x00000004 // RO -#define SYS_VGA_BIT_BUFCHG_FLAG 0x00000008 // RO -#define SYS_VGA_BIT_CLRSCR 0x00000010 // WO -#define SYS_VGA_BIT_CLRLINE 0x00000020 // WO -#define SYS_VGA_BIT_BLIT_REQ 0x00000100 // R/W -#define SYS_VGA_BIT_BLIT_BSY 0x00000100 // R/W -#define SYS_VGA_BIT_BLIT_FIN 0x00000200 // R/W -#define SYS_VGA_BIT_BLIT_ACK 0x00000200 // R/W -#define SYS_VGA_BIT_BLIT_FIN_INTEN 0x00000400 // R/W -#define SYS_VGA_ASCII 0xA0030004 // R/W -#define SYS_VGA_POSX 0xA0030008 // R/W -#define SYS_VGA_POSY 0xA003000C // R/W -#define SYS_VGA_CGCOL 0xA0030010 // R/W -#define SYS_VGA_RES 0xA0030014 // RO -#define SYS_VGA_FB_FRONT 0xA0030018 // R/W -#define SYS_VGA_FB_BACK 0xA003001C // R/W -#define SYS_VGA_BLIT_SRC0 SYS_VGA_BLIT_SRC0_FIRST // R/W -#define SYS_VGA_BLIT_SRC0_FIRST 0xA0030020 // R/W -#define SYS_VGA_BLIT_SRC0_LAST 0xA0030024 // R/W -#define SYS_VGA_BLIT_SRC0_DIMX 0xA0030028 // R/W -#define SYS_VGA_BLIT_DST SYS_VGA_BLIT_DST_FIRST // R/W -#define SYS_VGA_BLIT_DST_FIRST 0xA0030050 // R/W -#define SYS_VGA_BLIT_DST_LAST 0xA0030054 // R/W -#define SYS_VGA_BLIT_DST_DIMX 0xA0030058 // R/W -#define SYS_VGA_BLIT_NX 0xA0030060 // R/W -#define SYS_VGA_BLIT_NY 0xA0030064 // R/W - -// AC'97 -#define SYS_AC97_STAT 0xA0040000 -#define SYS_AC97_CTRL 0xA0040000 -#define SYS_AC97_ACSTAT 0xA0040400 -#define SYS_AC97_ACCTRL 0xA0040600 -#define SYS_AC97_PCM 0xA0040800 -#define SYS_AC97_WAVIN SYS_AC97_PCM -#define SYS_AC97_WAVOUT SYS_AC97_PCM - -// Flash -#define SYS_FLASH_IO 0xA4000000 -#define SYS_FLASH_MEM 0x00000000 - -// Sync. SRAM -#define SYS_SSRAM_IO 0xA8000000 - -UINT32 CP0_SR_read(void); -void CP0_SR_write(UINT32 val); -UINT32 CP0_CR_read(void); -void CP0_CR_write(UINT32 val); -UINT32 CP0_PRID_read(void); -UINT32 CP0_TR_read(void); -void CP0_TR_write(UINT32 val); -void CP0_TR_write_ptr(UINT32* pPtr); -void CP0_TR_read_ptr(UINT32* pPtr); -void ICACHE_invalidate_all(void); -void ICACHE_invalidate_at(UINT32* pPtr); -void DCACHE_invalidate_all(void); -void DCACHE_invalidate_at(UINT32* pPtr); - -#define CALC_BAUD(b) \ - ((UINT32)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1); - -#define UART0_setbaud(b) \ - *((UINT32*)SYS_UART0_BAUD) = CALC_BAUD(b); - -#define UART1_setbaud(b) \ - *((UINT32*)SYS_UART1_BAUD) = CALC_BAUD(b); - -#define UART2_setbaud(b) \ - *((UINT32*)SYS_UART2_BAUD) = CALC_BAUD(b); - -char readchar(UINT32 port); -void writechar(UINT32 port, char c); -int write(int file, char *ptr, int len); -int sputs(char *pStr); -void print_byte(char byte); -void print_word(int word); -void _exit (int exitcode); -void sleep(unsigned ms); - -char _getchar(void); - -void PrintBuffer8(UINT8 *pBuf, int nbpr, int len); -void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len); - -void Screen_clr(void); -void Screen_line_clr(void); -void Screen_csr_set_x(UINT32 coord); -void Screen_csr_set_y(UINT32 coord); -UINT32 Screen_get_resx(void); -UINT32 Screen_get_resy(void); -UINT32 Screen_get_fps(void); - - - -#endif // LIBSYS_H - diff --git a/lib/CPUs/MIPS/bsp/examples/libsys/.directory_history b/lib/CPUs/MIPS/bsp/examples/libsys/.directory_history deleted file mode 100644 index f347082..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys/.directory_history +++ /dev/null @@ -1,70 +0,0 @@ -VHDL/lib/CPUs/MIPS/bsp/examples/dbg.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/dbg.c -VHDL/lib/CPUs/MIPS/bsp/examples/irq.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/irq.c -VHDL/lib/CPUs/MIPS/bsp/examples/irq.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/irq.h -VHDL/lib/CPUs/MIPS/bsp/examples/kernel.S -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/kernel.S -VHDL/lib/CPUs/MIPS/bsp/examples/libsys.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/libsys.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/libsys.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/dbg.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/irq.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/irq.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/kernel.S - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/libsys.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/libsys.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_dis.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_dis.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_gfx.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_gfx.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_xcpt.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/regdef.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/startup.S - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/xcpt.c - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/xcpt.h - -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/xcpt_asm.h - -VHDL/lib/CPUs/MIPS/bsp/examples/mips_gfx.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_gfx.c -VHDL/lib/CPUs/MIPS/bsp/examples/mips_gfx.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_gfx.h -VHDL/lib/CPUs/MIPS/bsp/examples/mips_ps2.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c -VHDL/lib/CPUs/MIPS/bsp/examples/mips_ps2.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h -VHDL/lib/CPUs/MIPS/bsp/examples/mipsdis.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_dis.c -VHDL/lib/CPUs/MIPS/bsp/examples/mipsdis.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/mips_dis.h -VHDL/lib/CPUs/MIPS/bsp/examples/regdef.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/regdef.h -VHDL/lib/CPUs/MIPS/bsp/examples/startup.S -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/startup.S -VHDL/lib/CPUs/MIPS/bsp/examples/xcpt.c -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/xcpt.c -VHDL/lib/CPUs/MIPS/bsp/examples/xcpt.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/xcpt.h -VHDL/lib/CPUs/MIPS/bsp/examples/xcpt_asm.h -VHDL/lib/CPUs/MIPS/bsp/examples/libsys/xcpt_asm.h diff --git a/lib/CPUs/MIPS/bsp/examples/libsys/Makefile b/lib/CPUs/MIPS/bsp/examples/libsys/Makefile deleted file mode 100644 index 376b961..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -ENDIAN_FLAGS=-EL -CFLAGS=$(ENDIAN_FLAGS) -msoft-float -O2 -march=r3000 -I. -Wl,-M - -AS=mipsel-elf-as -AR=mipsel-elf-ar -CC=mipsel-elf-gcc -LD=mipsel-elf-ld -OBJDUMP=mipsel-elf-objdump -OBJCOPY=mipsel-elf-objcopy -FLASHGEN=flashgen - -SRCS=libsys.c xcpt.c syscalls.c irq.c dbg.c mips_dis.c mips_gfx.c mips_ps2.c -OBJS=libsys.o xcpt.o syscalls.o irq.o dbg.o mips_dis.o mips_gfx.o mips_ps2.o - -all: libsys.a - $(MAKE) -C eb - -%.o : %.c %.h - $(CC) $(CFLAGS) -G 0 -c $(SRCS) - -libsys.a: $(OBJS) - $(AR) -r libsys.a $(OBJS) - $(CC) $(CFLAGS) -G 0 -c startup.S - $(CC) $(CFLAGS) -G 0 -c kernel.S - -clean: - rm -rf *.a *.o *.map *.dis *.elf > /dev/null - $(MAKE) -C eb clean - diff --git a/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c b/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c deleted file mode 100644 index 960c240..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.c +++ /dev/null @@ -1,268 +0,0 @@ -#include -#include -#include -#include "libsys.h" -#include "mips_ps2.h" - -ps2_if_t ps2_if[2] = -{ - {ps2_type_unknown, (UINT32*)SYS_PS2_0_STAT, (UINT32*)SYS_PS2_0_DATA}, - {ps2_type_unknown, (UINT32*)SYS_PS2_1_STAT, (UINT32*)SYS_PS2_1_DATA} -}; - -UINT32 PS2_get_num_if(void) -{ - return (sizeof(ps2_if)/sizeof(ps2_if_t)); -} - -ps2_if_t *PS2_get_if(UINT32 port) -{ - if (port < PS2_get_num_if()) - return &ps2_if[port]; - - return NULL; -} - -void PS2_byte_write(UINT32 port, UINT8 byte) -{ - ps2_if_t *pIF; - - pIF = &ps2_if[port]; - - while(!(*pIF->pCTRL & SYS_PS2_BIT_TX_EMPTY)); - - *pIF->pDATA = (UINT32)byte; -} - -UINT32 PS2_byte_read(UINT32 port, UINT32 timeout_ms) -{ - ps2_if_t *pIF; - - pIF = &ps2_if[port]; - - while(!(*pIF->pCTRL & SYS_PS2_BIT_RX_AVAIL)) - { - timeout_ms--; - if (!timeout_ms) - return PS2_ERR_TIMEOUT; - - sleep(1); - } - return (UINT32)*pIF->pDATA; -} - -UINT32 PS2_cmd(UINT32 port, UINT8 cmd, UINT32 ack_timeout_ms) -{ - UINT32 result; - - PS2_byte_write(port, cmd); - result = PS2_byte_read(port, ack_timeout_ms); - if (0xFA != result) - { - printf ("PS2_cmd(%d): no ACK received. Result = %08X\n", port, result); - return PS2_ERR_PS2_PREFIX | result; - } - return 0; -} - -void PS2_flush(UINT32 port) -{ - while (!IS_ERROR(PS2_byte_read(port, 10))); -} - -UINT32 PS2_init(UINT32 port) -{ - int i; - ps2_if_t *pIF; - UINT8 id[2]; - - pIF = &ps2_if[port]; - pIF->type = ps2_type_unknown; - - UINT32 result; - - // Disable RX-interrupt - *pIF->pCTRL &= ~SYS_PS2_BIT_RX_INTEN; - - printf ("PS2_init(%d) - Initialize... ", port); - - // Flush buffer - PS2_flush(port); - - // send RESET - result = PS2_cmd(port, 0xFF, 1000); - if (IS_ERROR(result)) - { - printf ("Reset error %08X\n", result); - return result; - } - - // Read BAT - result = PS2_byte_read(port, 1000); - if (0xAA != result) - { - printf ("BAT error %08X\n", result); - return result; - } - - printf ("Success\n"); - - while(1) - { - // Read ID - result = PS2_byte_read(port, 10); - if (IS_ERROR(result)) - { - // No ID => keyboard - printf ("PS2_init(%d) - Keyboard detected\n", port); - - // send Get Device-ID - result = PS2_cmd(port, 0xF2, 1000); - if (IS_ERROR(result)) - { - printf ("Get Device-ID error %08X\n", result); - break; - } - id[0] = PS2_byte_read(port, 1000); - id[1] = PS2_byte_read(port, 1000); - printf ("PS2_init(%d) - Device-ID: %02X%02X\n", port, id[0], id[1]); - - // Get Scan code set (phase 1) - result = PS2_cmd(port, 0xF0, 1000); - if (IS_ERROR(result)) - { - printf ("1. Get Scan code error %08X\n", result); - break; - } - // Get Scan code set (phase 2) - result = PS2_cmd(port, 0x00, 1000); - if (IS_ERROR(result)) - { - printf ("2. Get Scan code error %08X\n", result); - break; - } - result = PS2_byte_read(port, 1000); - printf ("PS2_init(%d) - Current scan code set = %d\n", port, result); - - // if Scan code SET != 2 - if (result != 2) - { - printf ("PS2_init(%d) - Set scan code set = 2\n", port); - // Set Scan code set (phase 1) - result = PS2_cmd(port, 0xF0, 1000); - if (IS_ERROR(result)) - { - printf ("1. Set Scan code error %08X\n", result); - break; - } - // Set Scan code set (phase 2) - result = PS2_cmd(port, 0x02, 1000); - if (IS_ERROR(result)) - { - printf ("2. Set Scan code error %08X\n", result); - break; - } - } - - // Test LEDs - for (i=0; i < 4; i++) - { - result = PS2_cmd(port, 0xED, 1000); - if (IS_ERROR(result)) - { - printf ("1. LED error %08X\n", result); - break; - } - result = PS2_cmd(port, 0x02, 1000); - if (IS_ERROR(result)) - { - printf ("2. LED error %08X\n", result); - break; - } - sleep(100); - result = PS2_cmd(port, 0xED, 1000); - if (IS_ERROR(result)) - { - printf ("1. LED error %08X\n", result); - break; - } - result = PS2_cmd(port, 0x04, 1000); - if (IS_ERROR(result)) - { - printf ("2. LED error %08X\n", result); - break; - } - sleep(100); - result = PS2_cmd(port, 0xED, 1000); - if (IS_ERROR(result)) - { - printf ("1. LED error %08X\n", result); - break; - } - result = PS2_cmd(port, 0x01, 1000); - if (IS_ERROR(result)) - { - printf ("2. LED error %08X\n", result); - break; - } - sleep(100); - } - result = PS2_cmd(port, 0xED, 1000); - if (IS_ERROR(result)) - { - printf ("1. LED error %08X\n", result); - break; - } - result = PS2_cmd(port, 0x00, 1000); - if (IS_ERROR(result)) - { - printf ("2. LED error %08X\n", result); - break; - } - - pIF->type = ps2_type_keyb; - result = pIF->type; - break; - } - - // We got a byte => maybe mouse - if (result == 0) - { - // We got zero => yes, it's a mouse - printf ("PS2_init(%d) - Mouse device detected\n", port); - - // send Get Device-ID - result = PS2_cmd(port, 0xF2, 1000); - if (IS_ERROR(result)) - { - printf ("Get Device-ID error %08X\n", result); - break; - } - id[0] = PS2_byte_read(port, 1000); - printf ("PS2_init(%d) - Device-ID: %02X\n", port, id[0]); - printf ("PS2_init(%d) - Enable stream mode...", port); - result = PS2_cmd(port, 0xF4, 1000); - if (IS_ERROR(result)) - { - printf ("error %08X\n", result); - break; - } - printf ("Success\n"); - pIF->type = ps2_type_mouse; - result = pIF->type; - break; - } - } - - // Flush buffer - PS2_flush(port); - - if (IS_ERROR(result)) - return result; - - // Enable RX-interrupt - *pIF->pCTRL |= SYS_PS2_BIT_RX_INTEN; - - return result; - -} diff --git a/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h b/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h deleted file mode 100644 index 9bfee72..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys/mips_ps2.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef PS2_H -#define PS2_H - -#include "libsys.h" - -// -------------------------------------------------- -// Types -// -------------------------------------------------- -enum -{ - ps2_type_unknown = 0, - ps2_type_keyb, - ps2_type_mouse -}; - -typedef struct _sps2_if_t -{ - UINT32 type; - volatile UINT32 *pCTRL; - volatile UINT32 *pDATA; -} ps2_if_t; - -// -------------------------------------------------- -// Constants -// -------------------------------------------------- -#define PS2_MODULE_PREFIX 0x1000000 -#define PS2_SUCCESS LSYS_SUCCESS -#define PS2_ERROR (LSYS_ERR_BASE | PS2_MODULE_PREFIX) -#define PS2_ERR_TIMEOUT (PS2_ERROR | 0x0000001) -#define PS2_ERR_PS2_PREFIX (PS2_ERROR | 0x0010000) - -// -------------------------------------------------- -// Functions -// -------------------------------------------------- -UINT32 PS2_get_num_if(void); -ps2_if_t *PS2_get_if(UINT32 port); -UINT32 PS2_init(UINT32 port); -void PS2_byte_write(UINT32 port, UINT8 byte); -UINT32 PS2_byte_read(UINT32 port, UINT32 timeout_ms); -UINT32 PS2_cmd(UINT32 port, UINT8 cmd, UINT32 ack_timeout_ms); -void PS2_flush(UINT32 port); - -#endif // PS2_H diff --git a/lib/CPUs/MIPS/bsp/examples/libsys/syscalls.c b/lib/CPUs/MIPS/bsp/examples/libsys/syscalls.c deleted file mode 100644 index 040372b..0000000 --- a/lib/CPUs/MIPS/bsp/examples/libsys/syscalls.c +++ /dev/null @@ -1,86 +0,0 @@ -#include -#include "libsys.h" -#include "xcpt.h" - -/* 10 digits + 1 sign + 1 trailing nul */ -static char itoa_buf[12]; - -char *itoa(int i) -{ - char *pos = itoa_buf + sizeof(itoa_buf) - 1; - unsigned int u; - int negative = 0; - - if (i < 0) - { - negative = 1; - u = ((unsigned int)(-(1+i))) + 1; - } - else - { - u = i; - } - - *pos = 0; - - do - { - *--pos = '0' + (u % 10); - u /= 10; - } while (u); - - if (negative) - { - *--pos = '-'; - } - - return pos; -} - -int syscalls_handler(struct xcptcontext * xcp) -{ - int syscall_code; - char *pStr, buf[33]; - - syscall_code = xcp->regs[2]; - - switch(syscall_code) - { - case 1: // print integer - sputs(itoa(xcp->regs[4])); - break; - - case 4: // print string - pStr = (char*)xcp->regs[4]; - sputs(pStr); - break; - - case 5: // read integer - pStr = fgets(buf, sizeof(buf), stdin); - xcp->regs[2] = atoi(pStr); - break; - - case 8: // read string - pStr = (char*)xcp->regs[4]; - fgets(pStr, xcp->regs[5], stdin); - break; - - case 10: // exit - _exit(0); - break; - - default: - sputs("\nUnknown syscall (");print_word(syscall_code);sputs(") at ");print_word(xcp->epc);sputs("\n"); - break; - } - - xcp->epc += 4; // set return address to instruction after syscall - - return 0; -} - -void syscalls_init(void) -{ - xcpt_register(Syscall, syscalls_handler); -} - diff --git a/lib/CPUs/MIPS/bsp/examples/life.c b/lib/CPUs/MIPS/bsp/examples/life.c deleted file mode 100644 index bba5a0e..0000000 --- a/lib/CPUs/MIPS/bsp/examples/life.c +++ /dev/null @@ -1,251 +0,0 @@ -/* life.c - demonstrator for later Mips+LCD game of life - * - * 23.03.06 - MACRO-based version - * 22.02.06 - new file - */ - -//#include "ks0108.h" - -#include -#include -#include -#include "libsys.h" - - -#define NX 200 // 70 // 128 // 48 // 128 -#define NY 150 // 31 // 64 // 27 // 64 - -#define SCREEN_X 800 -#define SCREEN_Y 600 - -#define SCALE_X (4) -#define SCALE_Y (4) -#define OFFSET_X ((SCREEN_X-(SCALE_X*NX))/2) -#define OFFSET_Y ((SCREEN_Y-(SCALE_Y*NY))/2) - -// OCCUPIED must be uneven, EMPTY even. -#define OCCUPIED 0x77771111 -#define EMPTY 0xeeee0000 - -#define MATRIX( row, col ) (*(matrix + (NX*col) + row )) -#define FUTURE( row, col ) (*(future + (NX*col) + row )) - -UINT32 *g_gx_buff; - -int clock_lfsr32() -{ - return rand(); -} - - -/* return a pseudo-random integer in the range 0..1023 */ -int random1023() { - int tmp; - - tmp = clock_lfsr32(); - return tmp & 0x000003ff; -} - -typedef struct _scolor_t -{ - UINT8 r, g, b, a; -} __attribute__ ((__packed__)) color_t; - - -void DrawPixel(UINT32 x, UINT32 y, color_t *pColor) -{ - int i, j; - for (i=0; i < SCALE_Y; i++) - for (j=0; j < SCALE_X; j++) - g_gx_buff[(OFFSET_X+SCALE_X*x+j) + SCREEN_X*(OFFSET_Y+SCALE_Y*y+i)] = *((UINT32*)pColor); -} - - -/* MSB/LSB in y-Richtung vertauscht */ -void displayBoard1( int* matrix ) -{ - int x, y; - int mask, accu; - UINT32 color; - - for( x=0; x < NX; x++ ) - { - mask = 0x80; - accu = 0x00; - for( y=0; y < NY; y++ ) - { - color = (UINT32)-(MATRIX(x,y) & 0x1); - DrawPixel(x, y, (color_t*)&color); -// if (MATRIX( x, y ) != OCCUPIED) -// { -// accu |= mask; -// } -// mask = mask >> 1; - -// color = 0; -// DrawPixel(x, (y>>3), (color_t*)&color); -// if (mask == 0) -// { -// color = accu; -// DrawPixel(x, (y>>3), (color_t*)&color); -// mask = 0x80; -// accu = 0x00; -// } - } -// color = accu; -// DrawPixel(x, (y>>3), (color_t*)&color); - - } -// *(matrix-15) = 0xdead0000; -// *(matrix-16) = *(matrix-16) + 1; -} - -void initializeBoard( int* matrix ) { - int x, y; - for( x=0; x < NX; x++ ) { - for( y=0; y < NY; y++ ) { - int d = random1023(); - if (d > 920) MATRIX( x, y ) = OCCUPIED; - else MATRIX( x, y ) = EMPTY; - } - } -} - - -int countNeighbors( int* matrix, int i, int j ) { - int im = i-1; - int ip = i+1; - - int jm = j-1; - int jp = j+1; - - int n = 0; - // wrap-around - if (ip >= NX) ip = 0; - if (jp >= NY) jp = 0; - - if (im < 0) im = NX-1; - if (jm < 0) jm = NY-1; - - // check eight neighbors - n += MATRIX(im, jm ) & 0x1; // nw - n += MATRIX(im, j ) & 0x1; // west - n += MATRIX(im, jp ) & 0x1; // sw - - n += MATRIX(i, jm ) & 0x1; // north - // n += MATRIX(i, j ) & 0x1; // center - n += MATRIX(i, jp ) & 0x1; // south - - n += MATRIX(ip, jm ) & 0x1; // ne - n += MATRIX(ip, j ) & 0x1; // east - n += MATRIX(ip, jp ) & 0x1; // se - - return n; -} - - -/** - * the actual game of life algorithm: cell is born when three neighbors, - * survives when exactly two live neighbors, dies otherwise. - */ -void nextGeneration( int* matrix, int* future ) { - int i, j; - int lifes = 0; - - for( i=0; i < NX; i++ ) { - for( j=0; j < NY; j++ ) { - // count neighbors - int n = countNeighbors( matrix, i, j ); - - //if ((n != 0) && (random1023() > 990)) { // some slight random offset - // if (random1023() > 500) FUTURE(i,j) = OCCUPIED; - // else FUTURE(i,j) = EMPTY; - //} - // else if (n == 3) FUTURE(i,j) = OCCUPIED; - - if (n == 3) FUTURE(i,j) = OCCUPIED; - else if ((n == 2) && (MATRIX(i,j) == OCCUPIED)) FUTURE(i,j) = OCCUPIED; - else FUTURE(i,j) = EMPTY; - - if (FUTURE(i,j) == OCCUPIED) lifes++; - } - } - // generation ++; - - // avoid extinction :-) - if (lifes < 10) { - // printf( "CREATING A NEW POPULATION\n\n\n" ); - initializeBoard( matrix ); - } - else { // swap buffers: C PROHIBITS ASSIGNING TO ARRAY TYPES - for( i=0; i < NX; i++ ) { - for( j=0; j < NY; j++ ) { - MATRIX(i,j) = FUTURE(i,j); - } - } - } -} - -void gx_init(void) -{ - volatile UINT32 *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - volatile UINT32 *pVGA_front = (UINT32*)SYS_VGA_FB_FRONT; - volatile UINT32 *pVGA_back = (UINT32*)SYS_VGA_FB_BACK; - - sleep(500); - - g_gx_buff = (UINT32*)malloc(SCREEN_X*SCREEN_Y*sizeof(UINT32)); - memset(g_gx_buff, 0, SCREEN_X*SCREEN_Y*sizeof(UINT32)); - printf("g_gx_buff : %8.8X\n", (UINT32)g_gx_buff); - - *pVGA_ctrl |= SYS_VGA_BIT_MSTEN; - *pVGA_front = (UINT32)g_gx_buff; - *pVGA_back = (UINT32)g_gx_buff; - -} - -int main( int argc, char* argv[] ) { - - int* ptr, cnt = 0; - - int* matrix; - int* future; - volatile UINT32 *pBtn = (UINT32*)SYS_GPIO0; - - // lcdEnableDisplay( 1 ); - // lcdSetColor( 1 ); - // lcdSetPixel( 0, 0 ); - // lcdSetPixel( 3, 5 ); - - // if we have stdlib: - matrix = (void*) malloc( NX*NY*sizeof(int) ); - future = (void*) malloc( NX*NY*sizeof(int) ); - - - gx_init(); - -// matrix = (void *) 0x00004000; -// future = (void *) 0x00014000; - - // init_lfsr32( 0xcafebabe ); - // init_lfsr32( 0x13 ); - - srand(clock()); - initializeBoard( matrix ); - - while( 1 ) - { - - if (*pBtn) - { - srand(clock()); - initializeBoard( matrix ); - cnt = 0; - } - sputs("Generation #"); print_word(cnt++); sputs("\n"); - displayBoard1( matrix ); - nextGeneration( matrix, future ); - } - - // return 0 -} diff --git a/lib/CPUs/MIPS/bsp/examples/link/link.ld b/lib/CPUs/MIPS/bsp/examples/link/link.ld deleted file mode 100644 index bf3b367..0000000 --- a/lib/CPUs/MIPS/bsp/examples/link/link.ld +++ /dev/null @@ -1,225 +0,0 @@ -/* Script for -z combreloc: combine and sort reloc sections */ -OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips", - "elf32-littlemips") -OUTPUT_ARCH(mips) -ENTRY(_start) -SEARCH_DIR("./libsys"); -SEARCH_DIR("/usr/local/mipsel-elf/lib:/usr/local/mipsel-elf/lib/eb"); -SEARCH_DIR("/usr/local/lib/gcc/mipsel-elf/4.3.3:/usr/local/lib/gcc/mipsel-elf/4.3.3/eb"); - -stack_ptr = 0x7FFFEFF0; -baudrate = 0x0D; -sys_led_port = 0xA0000000; -sys_uart_data = 0xA0010000; -sys_uart_stat = 0xA0010004; -sys_uart_baud = 0xA0010008; -sys_timer_usec = 0xA000008; -sys_timer_sec = 0xA000000C; - -STARTUP(startup.o) -INPUT(kernel.o) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - PROVIDE (__executable_start = 0x40000000); . = 0x40000000; - .start __executable_start : - { - start = ALIGN(2); - entry = ALIGN(2); - _entry = ALIGN(2); - __entry = ALIGN(2); - *(.start) - } - /* Kernel text with low-level exception handler */ - .exc_vector __executable_start + 0x080 : - { - _exc_vect_start = .; - *(.exc_vect) - _exc_vect_end = .; - } - .init : - { - KEEP (*(.init)) - } =0 - .plt : { *(.plt) } - .text : - { - _ftext = . ; - *(.text .stub .text.* .gnu.linkonce.t.*) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.mips16.fn.*) *(.mips16.call.*) - } =0 - .fini : - { - KEEP (*(.fini)) - } =0 - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } - .rodata1 : { *(.rodata1) } - .sdata2 : - { - *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) - } - .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) } - .eh_frame_hdr : { *(.eh_frame_hdr) } - .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } - .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } - /* Adjust the address for the data segment. We want to adjust up to - the same address within the page on the next page up. */ - . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); - /* Exception handling */ - .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } - .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } - /* Thread Local Storage sections */ - .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } - .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - } - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } - .jcr : { KEEP (*(.jcr)) } - .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) } - . = DATA_SEGMENT_RELRO_END (0, .); - .data : - { - _fdata = . ; - *(.data .data.* .gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - } - .data1 : { *(.data1) } - .got.plt : { *(.got.plt) } - . = .; - _gp = ALIGN(16) + 0x7ff0; - .got : { *(.got) } - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : - { - *(.sdata .sdata.* .gnu.linkonce.s.*) - } - .lit8 : { *(.lit8) } - .lit4 : { *(.lit4) } - _edata = .; PROVIDE (edata = .); - __bss_start = .; - _fbss = .; - .sbss : - { - *(.dynsbss) - *(.sbss .sbss.* .gnu.linkonce.sb.*) - *(.scommon) - } - .bss : - { - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - /* Align here to ensure that the .bss section occupies space up to - _end. Align after .bss to ensure correct alignment even if the - .bss section disappears because there are no input sections. - FIXME: Why do we need it? When there is no .bss section, we don't - pad the .data section. */ - . = ALIGN(. != 0 ? 32 / 8 : 1); - } - . = ALIGN(32 / 8); - . = ALIGN(32 / 8); - _end = .; PROVIDE (end = .); - . = DATA_SEGMENT_END (.); - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* DWARF 3 */ - .debug_pubtypes 0 : { *(.debug_pubtypes) } - .debug_ranges 0 : { *(.debug_ranges) } - .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } - .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } - .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } - .mdebug.abi32 : { KEEP(*(.mdebug.abi32)) } - .mdebug.abiN32 : { KEEP(*(.mdebug.abiN32)) } - .mdebug.abi64 : { KEEP(*(.mdebug.abi64)) } - .mdebug.abiO64 : { KEEP(*(.mdebug.abiO64)) } - .mdebug.eabi32 : { KEEP(*(.mdebug.eabi32)) } - .mdebug.eabi64 : { KEEP(*(.mdebug.eabi64)) } - .gcc_compiled_long32 : { KEEP(*(.gcc_compiled_long32)) } - .gcc_compiled_long64 : { KEEP(*(.gcc_compiled_long64)) } - /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) } -} diff --git a/lib/CPUs/MIPS/bsp/examples/lua_init.c b/lib/CPUs/MIPS/bsp/examples/lua_init.c deleted file mode 100644 index 0edd3d5..0000000 --- a/lib/CPUs/MIPS/bsp/examples/lua_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "all.c" diff --git a/lib/CPUs/MIPS/bsp/examples/lwl.c b/lib/CPUs/MIPS/bsp/examples/lwl.c deleted file mode 100644 index 3905cf0..0000000 --- a/lib/CPUs/MIPS/bsp/examples/lwl.c +++ /dev/null @@ -1,46 +0,0 @@ -#include "libsys.h" - -int non_aligned_load(UINT32* pMem) -{ - UINT32 result; - __asm__ - ( - "li $t0, 0x01234567\n" - "li $t1, 0x89ABCDEF\n" - "sw $t0, 0(%[pMem])\n" - "sw $t1, 64(%[pMem])\n" - "lw %[val], 0(%[pMem])\n" - "lw %[val], 64(%[pMem])\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "li %[val], 0x55555555\n" - "lw %[val], 0(%[pMem])\n" - "lwl %[val], 65(%[pMem])\n" - : [val] "=r" (result) - : [pMem] "r" (pMem) - ); - return result; -} - -int main() -{ - int buf[256], res, i; - - res = non_aligned_load(buf); - - return res; - -} diff --git a/lib/CPUs/MIPS/bsp/examples/mandelbrot.c b/lib/CPUs/MIPS/bsp/examples/mandelbrot.c deleted file mode 100644 index ce7aa9d..0000000 --- a/lib/CPUs/MIPS/bsp/examples/mandelbrot.c +++ /dev/null @@ -1,54 +0,0 @@ -// by Erik Wrenholt -#include -#include - -#define BAILOUT 16 -#define MAX_ITERATIONS 1000 - -int mandelbrot(double x, double y) -{ - double cr = y - 0.5; - double ci = x; - double zi = 0.0; - double zr = 0.0; - int i = 0; - - while(1) { - i ++; - double temp = zr * zi; - double zr2 = zr * zr; - double zi2 = zi * zi; - zr = zr2 - zi2 + cr; - zi = temp + temp + ci; - if (zi2 + zr2 > BAILOUT) - return i; - if (i > MAX_ITERATIONS) - return 0; - } - -} - -int main (int argc, const char * argv[]) { - struct timeval aTv; - gettimeofday(&aTv, NULL); - long init_time = aTv.tv_sec; - long init_usec = aTv.tv_usec; - - int x,y; - for (y = -39; y < 39; y++) { - printf("\n"); - for (x = -39; x < 39; x++) { - int i = mandelbrot(x/40.0, y/40.0); - if (i==0) - printf("*"); - else - printf(" "); - } - } - printf ("\n"); - - gettimeofday(&aTv,NULL); - double query_time = (aTv.tv_sec - init_time) + (double)(aTv.tv_usec - init_usec)/1000000.0; - printf ("C Elapsed %0.2f\n", query_time); - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/mips_gfx.c b/lib/CPUs/MIPS/bsp/examples/mips_gfx.c deleted file mode 100644 index ee06438..0000000 --- a/lib/CPUs/MIPS/bsp/examples/mips_gfx.c +++ /dev/null @@ -1,566 +0,0 @@ -#include -#include -#include -#include "libsys.h" -#include "mips_gfx.h" - -#define USE_HW_BLITTER - -// ------------------------------------------------------------- -// Functions -// ------------------------------------------------------------- -void __gfx_block_set_8(UINT32* pDst, UINT32 value) -{ - __asm__ volatile - ( - "sw %[value], 0(%[pDst])\n" - "sw %[value], 4(%[pDst])\n" - "sw %[value], 8(%[pDst])\n" - "sw %[value], 12(%[pDst])\n" - "sw %[value], 16(%[pDst])\n" - "sw %[value], 20(%[pDst])\n" - "sw %[value], 24(%[pDst])\n" - "sw %[value], 28(%[pDst])\n" - : - : [pDst] "r" (pDst), [value] "r" (value) - ); -} - -void __gfx_block_copy_8(UINT32* pDst, UINT32* pSrc) -{ - __asm__ volatile - ( - ".set noreorder\n" - ".set nomacro\n" - "lw $s0, 0(%[pSrc])\n" - "lw $s1, 4(%[pSrc])\n" - "sw $s0, 0(%[pDst])\n" - "lw $s0, 8(%[pSrc])\n" - "sw $s1, 4(%[pDst])\n" - "lw $s1, 12(%[pSrc])\n" - "sw $s0, 8(%[pDst])\n" - "lw $s0, 16(%[pSrc])\n" - "sw $s1, 12(%[pDst])\n" - "lw $s1, 20(%[pSrc])\n" - "sw $s0, 16(%[pDst])\n" - "lw $s0, 24(%[pSrc])\n" - "sw $s1, 20(%[pDst])\n" - "lw $s1, 28(%[pSrc])\n" - "sw $s0, 24(%[pDst])\n" - "sw $s1, 28(%[pDst])\n" - ".set macro\n" - ".set reorder\n" - : - : [pDst] "r" (pDst), [pSrc] "r" (pSrc) - : "s0", "s1" - ); -} - -void __gfx_copy_32(UINT32* pDst, UINT32* pSrc, UINT32 nblocks) -{ - while (nblocks) - { - __gfx_block_copy_8(pDst, pSrc); - pDst += 8; - pSrc += 8; - nblocks--; - } - -} - -void GFX_DirtyRectSetClean(buf_t *pBuf) -{ - pBuf->rect.xmin = pBuf->w; - pBuf->rect.xmax = 0; - pBuf->rect.ymin = pBuf->h; - pBuf->rect.ymax = 0; - pBuf->is_dirty = 0; -} - -void GFX_DirtyRectInit(buf_t *pBuf, UINT32 w, UINT32 h) -{ - pBuf->w = w; - pBuf->h = h; - pBuf->regs = (vga_hw_t*)SYS_VGA_CTRL; - GFX_DirtyRectSetClean(pBuf); -} - -void GFX_DirtyRectUpdate(buf_t *pBuf, UINT32 xmin, UINT32 xmax, UINT32 ymin, UINT32 ymax) -{ - - if (xmin < pBuf->rect.xmin) - { - pBuf->is_dirty = 1; - pBuf->rect.xmin = xmin; - } - - if (xmax > pBuf->rect.xmax) - { - pBuf->is_dirty = 1; - pBuf->rect.xmax = xmax; - } - - if (ymin < pBuf->rect.ymin) - { - pBuf->is_dirty = 1; - pBuf->rect.ymin = ymin; - } - - if (ymax > pBuf->rect.ymax) - { - pBuf->is_dirty = 1; - pBuf->rect.ymax = ymax; - } - - if (pBuf->is_dirty && ((pBuf->rect.xmax-pBuf->rect.xmin)%8)) - pBuf->rect.xmax = pBuf->rect.xmin + ((pBuf->rect.xmax-pBuf->rect.xmin)/8 + 1) * 8; // Make len_x multiple of 8 - -} - -void GFX_DirtyRectCopy(buf_t *pBuf) -{ - UINT32 xmin, xmax, ymin, ymax, x, y; - UINT32 *pDst, *pDst_end; - UINT32 *pSrc, *pSrc_end; - - xmin = pBuf->rect.xmin; - xmax = pBuf->rect.xmax; - - ymin = pBuf->rect.ymin; - ymax = pBuf->rect.ymax; - - ymin *= pBuf->w; - ymax *= pBuf->w; - -#ifdef USE_HW_BLITTER - pSrc = (UINT32*)&pBuf->pLast->pFB[xmin + ymin]; - pDst = (UINT32*)&pBuf->pFB[xmin + ymin]; - - while (pBuf->regs->pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - pBuf->regs->pVGA_src0 = (UINT32)pSrc; - pBuf->regs->pVGA_dst = (UINT32)pDst; - pBuf->regs->pVGA_src0_dimx = (UINT32)4*pBuf->w; - pBuf->regs->pVGA_dst_dimx = (UINT32)4*pBuf->w; - pBuf->regs->pVGA_nx = (UINT32)(pBuf->rect.xmax-pBuf->rect.xmin); - pBuf->regs->pVGA_ny = (UINT32)(pBuf->rect.ymax-pBuf->rect.ymin); - pBuf->regs->pVGA_ctrl |= SYS_VGA_BIT_BLIT_REQ; - -#else - - if (!((xmax-xmin)%8)) - { - for (y=ymin; y < ymax; y += pBuf->w) - { - pSrc = &pBuf->pLast->pFB[xmin + y]; - pSrc_end = &pBuf->pLast->pFB[xmax + y]; - pDst = &pBuf->pFB[xmin + y]; - pDst_end = &pBuf->pFB[xmax + y]; - while(pDst < pDst_end) - { - __gfx_block_copy_8(pDst, pSrc); - pDst += 8; - pSrc += 8; - } - } - return; - } - -// fprintf(stderr, "GFX_DirtyRectCopy(): Slow copy!\n"); - for (y=ymin; y < ymax; y += pBuf->w) - { - for (x=xmin; x < xmax; x++) - { - pBuf->pFB[x + y] = pBuf->pLast->pFB[x + y]; - } - } -#endif - -} - -void GFX_init(gfx_t *pObj) -{ - int i; - buf_t *pBuf; - UINT32 w, h, fps; - - pObj->regs = (vga_hw_t*)SYS_VGA_CTRL; - - pObj->regs->pVGA_ctrl &= ~SYS_VGA_BIT_MSTEN; - - w = Screen_get_resx(); - h = Screen_get_resy(); - fps = Screen_get_fps(); - - printf("VGA screen = %d x %d @ %d fps\n", w, h, fps); - - pObj->w = w; - pObj->h = h; - - // Init background buffer - pObj->pBG = (UINT32*)calloc(w * h, sizeof(buf_t)); - - // Init framebuffers - pObj->pBuf = (buf_t*)calloc(1, sizeof(buf_t)); - pBuf = pObj->pBuf; - pBuf->pFB = (UINT32*)calloc((w+8) * h, sizeof(UINT32)); // w+8 because of dirty rectangle 8 byte min. x-size - for (i=1; i < GFX_NUM_FRAME_BUFFERS; i++) - { - - pBuf->pNext = (buf_t*)calloc(1, sizeof(buf_t)); - pBuf->pNext->pLast = pBuf; - pBuf = pBuf->pNext; - pBuf->pFB = (UINT32*)calloc((w+8) * h, sizeof(UINT32)); // w+8 because of dirty rectangle 8 byte min. x-size - } - pObj->pBuf->pLast = pBuf; - pBuf->pNext = pObj->pBuf; - - pBuf = pObj->pBuf; - for (i=0; i < GFX_NUM_FRAME_BUFFERS; i++) - { - GFX_DirtyRectInit(pBuf, w, h); - -// fprintf(stderr, "pBuf = %08X, pLast = %08X, pNext = %08X\n", pBuf, pBuf->pLast, pBuf->pNext); - pBuf = pBuf->pNext; - } - - pObj->regs->pVGA_front = (UINT32)pObj->pBuf->pLast->pFB; - pObj->regs->pVGA_back = (UINT32)pObj->pBuf->pLast->pFB; - pObj->regs->pVGA_ctrl |= SYS_VGA_BIT_MSTEN; - - -} - -void GFX_set_background(gfx_t *pObj, UINT32 *pImage, UINT32 image_nx, UINT32 image_ny, UINT32 image_scale_x, UINT32 image_scale_y) -{ - - UINT32 off_x, off_y; - UINT32 i, j; - UINT32 *pDst, *pSrc; - buf_t *pBuf; - - if (!pImage) - return; - - off_x = (pObj->w-(image_scale_x*image_nx))/2; - off_y = (pObj->h-(image_scale_y*image_ny))/2; - - pDst = ((UINT32*)pObj->pBG) + pObj->w*off_y + off_x; - pSrc = pImage; - - for (i=0; i < image_ny*image_nx; i += 8) - { - __gfx_block_copy_8(pDst, pSrc); - pDst += 8; - pSrc += 8; - } - - pBuf = pObj->pBuf; - - pDst = pBuf->pFB; - pSrc = pObj->pBG; - - for (i=0; i < image_ny*image_nx; i += 8) - { - __gfx_block_copy_8(pDst, pSrc); - pDst += 8; - pSrc += 8; - } - - do - { - GFX_DirtyRectUpdate(pBuf, 0, pObj->w, 0, pObj->h); - pBuf = pBuf->pNext; - - } while(pBuf != pObj->pBuf); - - -} - -void GFX_frame(gfx_t *pObj, UINT32 sync_mode) -{ - - // Wait until back buffer becomes front - if (sync_mode == GFX_FRAME_SYNC) - { - while(pObj->regs->pVGA_front == (UINT32)pObj->pBuf->pFB); - } - - GFX_copy_front2back(pObj); - - // Invalidate D-Cache after blitting has finished - while (pObj->regs->pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - DCACHE_invalidate_all(); - -} - -void GFX_show(gfx_t *pObj) -{ - - pObj->regs->pVGA_back = (UINT32)pObj->pBuf->pFB; - pObj->pBuf = pObj->pBuf->pNext; - -} - -void GFX_copy_front2back(gfx_t *pObj) -{ - buf_t *pBuf; - - pBuf = pObj->pBuf; - - // Lopp over all frame buffers, except front buffer - while(pBuf != pObj->pBuf->pLast) - { - if (pBuf->is_dirty) - { -// fprintf(stderr, "Dirty rect [%08X]: w=%d, h=%d\n", (int)pBuf, pBuf->rect.xmax - pBuf->rect.xmin, pBuf->rect.ymax - pBuf->rect.ymin); - GFX_DirtyRectCopy(pBuf); - GFX_DirtyRectSetClean(pBuf); - } - pBuf = pBuf->pNext; - } -} - -void GFX_get_FB_front(gfx_t *pObj, UINT32 **ppFB) -{ - *ppFB = pObj->pBuf->pLast->pFB; -} - -void box_create(box_t *pObj, UINT32 w, UINT32 h) -{ - pObj->w = w; - pObj->h = h; -} - -void GFX_restore(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy) -{ - UINT32 xmin, xmax, ymin, ymax, x, y; - UINT32 *pDst, *pDst_end; - UINT32 *pSrc, *pSrc_end; - buf_t *pBuf; - - xmin = posx; - xmax = pBox->w + posx; - if (xmax > pObj->w) - xmax = pObj->w; - - ymin = posy; - ymax = pBox->h + posy; - if (ymax > pObj->h) - ymax = pObj->h; - - pBuf = pObj->pBuf->pNext; - - // Lopp over all frame buffers, except current back buffer - while(pBuf != pObj->pBuf) - { - GFX_DirtyRectUpdate(pBuf, xmin, xmax, ymin, ymax); - pBuf = pBuf->pNext; - - } - pBuf = pObj->pBuf; - - x = xmax - xmin + 1; - if (x%2) - x++; - y = ymax - ymin + 1; - if (y%2) - y++; - - ymin *= pObj->w; - ymax *= pObj->w; - -#ifdef USE_HW_BLITTER - pSrc = (UINT32*)&pObj->pBG[xmin + ymin]; - pDst = (UINT32*)&pBuf->pFB[xmin + ymin]; - - while (pObj->regs->pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - pObj->regs->pVGA_src0 = (UINT32)pSrc; - pObj->regs->pVGA_dst = (UINT32)pDst; - pObj->regs->pVGA_src0_dimx = (UINT32)4*pObj->w; - pObj->regs->pVGA_dst_dimx = (UINT32)4*pObj->w; - pObj->regs->pVGA_nx = (UINT32)x - 1; - pObj->regs->pVGA_ny = (UINT32)y - 1; - pObj->regs->pVGA_ctrl |= SYS_VGA_BIT_BLIT_REQ; - -#else - - if (!((xmax-xmin)%8)) - { - for (y=ymin; y < ymax; y += pBuf->w) - { - pSrc = &pObj->pBG[xmin + y]; - pSrc_end = &pObj->pBG[xmax + y]; - pDst = &pBuf->pFB[xmin + y]; - pDst_end = &pBuf->pFB[xmax + y]; - while(pDst < pDst_end) - { - __gfx_block_copy_8(pDst, pSrc); - pDst += 8; - pSrc += 8; - } - } - return; - } - -// fprintf(stderr, "GFX_DirtyRectCopy(): Slow copy!\n"); - for (y=ymin; y < ymax; y += pBuf->w) - { - for (x=xmin; x < xmax; x++) - { - pBuf->pFB[x + y] = pObj->pBG[x + y]; - } - } -#endif - -} - -void GFX_box_draw(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy, UINT32 color) -{ - UINT32 xmin, xmax, ymin, ymax, x, y; - UINT32 *pFB, *pFB_end; - buf_t *pBuf; - - xmin = posx; - xmax = pBox->w + posx; - if (xmax > pObj->w) - xmax = pObj->w; - - ymin = posy; - ymax = pBox->h + posy; - if (ymax > pObj->h) - ymax = pObj->h; - - pBuf = pObj->pBuf->pNext; - - // Lopp over all frame buffers, except current back buffer - while(pBuf != pObj->pBuf) - { - GFX_DirtyRectUpdate(pBuf, xmin, xmax, ymin, ymax); - pBuf = pBuf->pNext; - - } - pBuf = pObj->pBuf; - - ymin *= pObj->w; - ymax *= pObj->w; - - while (pObj->regs->pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - if (!((xmax-xmin)%8)) - { - for (y=ymin; y < ymax; y += pObj->w) - { - pFB = &pBuf->pFB[xmin + y]; - pFB_end = &pBuf->pFB[xmax + y]; - while(pFB < pFB_end) - { - __gfx_block_set_8(pFB, color); - pFB += 8; - } - } - return; - } - -// fprintf(stderr, "GFX_box_draw(): Slow copy!\n"); - for (y=ymin; y < ymax; y += pObj->w) - { - for (x=xmin; x < xmax; x++) - { - pBuf->pFB[x + y] = color; - } - } -} - -void GFX_box_draw_bg(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy, UINT32 color) -{ - UINT32 xmin, xmax, ymin, ymax, x, y; - UINT32 *pFB, *pFB_end; - - xmin = posx; - xmax = pBox->w + posx; - if (xmax > pObj->w) - xmax = pObj->w; - - ymin = posy; - ymax = pBox->h + posy; - if (ymax > pObj->h) - ymax = pObj->h; - - ymin *= pObj->w; - ymax *= pObj->w; - - while (pObj->regs->pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - if (!((xmax-xmin)%8)) - { - for (y=ymin; y < ymax; y += pObj->w) - { - pFB = &pObj->pBG[xmin + y]; - pFB_end = &pObj->pBG[xmax + y]; - while(pFB < pFB_end) - { - __gfx_block_set_8(pFB, color); - pFB += 8; - } - } - return; - } - -// fprintf(stderr, "GFX_box_draw_bg(): Slow copy!\n"); - for (y=ymin; y < ymax; y += pObj->w) - { - for (x=xmin; x < xmax; x++) - { - pObj->pBG[x + y] = color; - } - } -} - -void GFX_box_draw_direct(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy, UINT32 color) -{ - UINT32 xmin, xmax, ymin, ymax, x, y; - UINT32 *pFB, *pFB_end; - buf_t *pBuf; - - pBuf = pObj->pBuf->pLast; - - xmin = posx; - xmax = pBox->w + posx; - if (xmax > pObj->w) - xmax = pObj->w; - - ymin = posy; - ymax = pBox->h + posy; - if (ymax > pObj->h) - ymax = pObj->h; - - ymin *= pObj->w; - ymax *= pObj->w; - - if (!((xmax-xmin)%8)) - { - for (y=ymin; y < ymax; y += pObj->w) - { - pFB = &pBuf->pFB[xmin + y]; - pFB_end = &pBuf->pFB[xmax + y]; - while(pFB < pFB_end) - { - __gfx_block_set_8(pFB, color); - pFB += 8; - } - } - return; - } - -// fprintf(stderr, "GFX_box_draw_direct(): Slow copy!\n"); - for (y=ymin; y < ymax; y += pObj->w) - { - for (x=xmin; x < xmax; x++) - { - pBuf->pFB[x + y] = color; - } - } -} diff --git a/lib/CPUs/MIPS/bsp/examples/mips_gfx.h b/lib/CPUs/MIPS/bsp/examples/mips_gfx.h deleted file mode 100644 index 1363e07..0000000 --- a/lib/CPUs/MIPS/bsp/examples/mips_gfx.h +++ /dev/null @@ -1,91 +0,0 @@ -#ifndef GFX_H -#define GFX_H - -#include "libsys.h" - -#define GFX_NUM_FRAME_BUFFERS 2 -#define GFX_FRAME_NOSYNC 0 -#define GFX_FRAME_SYNC 1 - -// ------------------------------------------------------------- -// Types -// ------------------------------------------------------------- -typedef struct _sbox_t -{ - UINT32 w, h; -} box_t; - -typedef struct _srect_t -{ - UINT32 xmin, xmax; - UINT32 ymin, ymax; -} rect_t; - -typedef struct _svga_hw_t -{ - UINT32 volatile pVGA_ctrl; // 0xA0030000 // R/W - UINT32 volatile pVGA_ascii; // 0xA0030004 // R/W - UINT32 volatile pVGA_posx; // 0xA0030008 // R/W - UINT32 volatile pVGA_posy; // 0xA003000C // R/W - UINT32 volatile pVGA_cgcol; // 0xA0030010 // R/W - UINT32 volatile pVGA_res; // 0xA0030014 // RO - UINT32 volatile pVGA_front; // 0xA0030018 // R/W - UINT32 volatile pVGA_back; // 0xA003001C // R/W - UINT32 volatile pVGA_src0; // 0xA0030020 // R/W - UINT32 volatile pVGA_src0_last; // 0xA0030024 // R/W - UINT32 volatile pVGA_src0_dimx; // 0xA0030028 // R/W - UINT32 volatile pVGA_src0_res; // 0xA003002C // R/W - UINT32 volatile pVGA_src1; // 0xA0030030 // R/W - UINT32 volatile pVGA_src1_last; // 0xA0030034 // R/W - UINT32 volatile pVGA_src1_dimx; // 0xA0030038 // R/W - UINT32 volatile pVGA_src1_res; // 0xA003003C // R/W - UINT32 volatile pVGA_src2; // 0xA0030040 // R/W - UINT32 volatile pVGA_src2_last; // 0xA0030044 // R/W - UINT32 volatile pVGA_src2_dimx; // 0xA0030048 // R/W - UINT32 volatile pVGA_src2_res; // 0xA003004C // R/W - UINT32 volatile pVGA_dst; // 0xA0030050 // R/W - UINT32 volatile pVGA_dst_last; // 0xA0030054 // R/W - UINT32 volatile pVGA_dst_dimx; // 0xA0030058 // R/W - UINT32 volatile pVGA_dst_res; // 0xA003005C // R/W - UINT32 volatile pVGA_nx; // 0xA0030060 // R/W - UINT32 volatile pVGA_ny; // 0xA0030064 // R/W - -} vga_hw_t; - -typedef struct _sbuf_t -{ - UINT32 *pFB; - struct _sbuf_t *pNext; - struct _sbuf_t *pLast; - UINT32 is_dirty; - rect_t rect; - UINT32 w, h; - vga_hw_t *regs; -} buf_t; - -typedef struct _sgfx_t -{ - UINT32 w, h; - buf_t *pBuf; - UINT32 *pBG; - vga_hw_t *regs; - -} gfx_t; - -// ------------------------------------------------------------- -// Functions -// ------------------------------------------------------------- -void __gfx_block_set_8(UINT32* pDst, UINT32 value); -void __gfx_block_copy_8(UINT32* pDst, UINT32* pSrc); -void __gfx_copy_32(UINT32* pDst, UINT32* pSrc, UINT32 nblocks); -void GFX_init(gfx_t *pObj); -void GFX_frame(gfx_t *pObj, UINT32 sync_mode); -void GFX_show(gfx_t *pObj); -void GFX_copy_front2back(gfx_t *pObj); -void GFX_get_FB_front(gfx_t *pObj, UINT32 **ppFB); -void box_create(box_t *pObj, UINT32 w, UINT32 h); -void GFX_restore(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy); -void GFX_box_draw(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy, UINT32 color); -void GFX_box_draw_bg(gfx_t *pObj, box_t *pBox, UINT32 posx, UINT32 posy, UINT32 color); - -#endif // GFX_H diff --git a/lib/CPUs/MIPS/bsp/examples/mipsdis.c b/lib/CPUs/MIPS/bsp/examples/mipsdis.c deleted file mode 100644 index d05e965..0000000 --- a/lib/CPUs/MIPS/bsp/examples/mipsdis.c +++ /dev/null @@ -1,625 +0,0 @@ -/* +----------------------------------------------------------------+ */ -/* | Copyright (c) 1994 Stanford University. | */ -/* | All Rights Reserved. | */ -/* | | */ -/* | This software is distributed with *ABSOLUTELY NO SUPPORT* | */ -/* | and *NO WARRANTY*. Use or reproduction of this code for | */ -/* | commerical gains is strictly prohibited. Otherwise, you | */ -/* | are given permission to use or modify this code as long | */ -/* | as you do not remove this notice. | */ -/* +----------------------------------------------------------------+ */ -/* --------------------------------------------------- */ -/* | Copyright (c) 1986 MIPS Computer Systems, Inc. | */ -/* | All Rights Reserved. | */ -/* --------------------------------------------------- */ - -/* - * Copyright 1985 by MIPS Computer Systems, Inc. - */ - -/* TORCH disassembler */ -/* derived from MIPS instruction dissassembler by PGL October 91 */ - -#include -#include -#include "mips_dis.h" - -#define false 0 -#define true 1 -typedef int boolean; -char *strcat(); - -#define ZERO 0 - -#define COMPILER_NAMES tdis_reg_names[0] -#define HARDWARE_NAMES tdis_reg_names[1] -#define ASSEMBLER_NAMES tdis_reg_names[2] -#define DIS_REG_NAMES(x) tdis_reg_names[x] - -union extension_byte { - unsigned char byte; - struct { /* extension byte bits in little-endian order */ -#if (defined __MIPSEB || defined _MIPSEB || defined MIPSEB) - unsigned reserved:1; - unsigned dyn_nop:1; - unsigned rs_boost:2; - unsigned rt_boost:2; - unsigned rd_boost:2; -#elif (defined __MIPSEL || defined _MIPSEL || defined MIPSEL) - unsigned rd_boost:2; - unsigned rt_boost:2; - unsigned rs_boost:2; - unsigned dyn_nop:1; - unsigned reserved:1; -#endif /*MIPSEB*/ - } e; -}; - -#define blez_op_T blez_op -#define blez_op_N (blez_op | 0x10) -#define bgtz_op_T bgtz_op -#define bgtz_op_N (bgtz_op | 0x10) -#define beq_op_T beq_op -#define beq_op_N (beq_op | 0x10) -#define bne_op_T bne_op -#define bne_op_N (bne_op | 0x10) -#define bc_op_T bc_op -#define bc_op_N (bc_op | 0x02) - -static char *op_name[64] = { -/* 0 */ "special", "regimm","j", "jal", "beq", "bne", "blez", "bgtz", -/* 8 */ "addi", "addiu","slti", "sltiu","andi", "ori", "xori", "lui", -/*16 */ "cop0", "cop1", "cop2", "cop3", "beql","bnel","blezl","bgtzl", -/*24 */ "op60", "op64", "op68", "op6c", "op70", "op74", "op78", "op7c", -/*32 */ "lb", "lh", "lwl", "lw", "lbu", "lhu", "lwr", "ld", -/*40 */ "sb", "sh", "swl", "sw", "opb0", "opb4", "swr", "sd", -/*48 */ "lwc0", "lwc1", "lwc2", "lwc3", "ldc0", "ldc1", "ldc2", "ldc3", -/*56 */ "swc0", "swc1", "swc2", "swc3", "sdc0", "sdc1", "sdc2", "sdc3" -}; - -static char *spec_name[64] = { -/* 0*/ "sll", "spec01","srl", "sra", "sllv", "spec05","srlv","srav", -/* 8*/ "jr", "jalr", "spec12","spec13","syscall","break","vcall","spec17", -/*16*/ "mfhi", "mthi", "mflo", "mtlo", "spec24","spec25","spec26","spec27", -/*24*/ "mult", "multu","div", "divu", "spec34","spec35","spec36","spec37", -/*32*/ "add", "addu", "sub", "subu", "and", "or", "xor", "nor", -/*40*/ "spec50","spec51","slt","sltu", "spec54","spec55","spec56","spec57", -/*48*/ "spec60","spec61","spec62","spec63","spec64","spec65","spec66","spec67", -/*56*/ "spec70","spec71","spec72","spec73","spec74","spec75","spec76","spec77" -}; - -static char *bcond_name[32] = { - "bltz", - "bgez", - "bltzl", - "bgezl", - "bcond04", - "bcond05", - "bcond06", - "bcond07", - "tgei", - "tgeiu", - "tlti", - "tltiu", - "teqi", - "bcond0d", - "tnei", - "bcond0f", - "bltzal", - "bgezal", - "bltzall", - "bgezall", - "bcond14", - "bcond15", - "bcond16", - "bcond17", - "bcond18", - "bcond19", - "bcond1a", - "bcond1b", - "bcond1c", - "bcond1d", - "bcond1e", - "bcond1f" -}; - -static char *cop1_name[64] = { -/* 0 */ "add", "sub", "mul", "div", "sqrt", "abs", "mov", "neg", -/* 8 */ "fop08","fop09","fop0a","fop0b","fop0c","fop0d","fop0e","fop0f", -/*16 */ "fop10","fop11","fop12","fop13","fop14","fop15","fop16","fop17", -/*24 */ "fop18","fop19","fop1a","fop1b","fop1c","fop1d","fop1e","fop1f", -/*32 */ "cvt.s","cvt.d","cvt.e","fop23","cvt.w","fop25","fop26","fop27", -/*40 */ "fop28","fop29","fop2a","fop2b","fop2c","fop2d","fop2e","fop2f", -/*48 */ "c.f", "c.un","c.eq","c.ueq","c.olt","c.ult","c.ole","c.ule", -/*56 */ "c.sf","c.ngle","c.seq","c.ngl","c.lt","c.nge","c.le","c.ngt" -}; - -static char *fmt_name[16] = { - "s", "d", "e", "q", - "w", "fmt5", "fmt6", "fmt7", - "fmt8", "fmt9", "fmta", "fmtb", - "fmtc", "fmtd", "fmte", "fmtf" -}; - -/* public */ -/* Three sets of commonly used register names */ -const char *tdis_reg_names[3][64] = { - { /* compiler names */ - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", - "zero.B","at.B","v0.B", "v1.B", "a0.B", "a1.B", "a2.B", "a3.B", - "t0.B", "t1.B", "t2.B", "t3.B", "t4.B", "t5.B", "t6.B", "t7.B", - "s0.B", "s1.B", "s2.B", "s3.B", "s4.B", "s5.B", "s6.B", "s7.B", - "t8.B", "t9.B", "k0.B", "k1.B", "gp.B", "sp.B", "s8.B", "ra.B" - }, - { /* hardware names */ - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "gp", "sp", "r30", "r31", - "r0.B", "r1.B", "r2.B", "r3.B", "r4.B", "r5.B", "r6.B", "r7.B", - "r8.B", "r9.B", "r10.B","r11.B","r12.B","r13.B","r14.B","r15.B", - "r16.B","r17.B","r18.B","r19.B","r20.B","r21.B","r22.B","r23.B", - "r24.B","r25.B","r26.B","r27.B","gp.B", "sp.B", "r30.B","r31.B" - }, - { /* assembler names */ - "$0", "$at", "$2", "$3", "$4", "$5", "$6", "$7", - "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", - "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", - "$24", "$25", "$26", "$27", "$gp", "$sp", "$30", "$31", - "$0.B", "$at.B","$2.B", "$3.B", "$4.B", "$5.B", "$6.B", "$7.B", - "$8.B", "$9.B", "$10.B","$11.B","$12.B","$13.B","$14.B","$15.B", - "$16.B","$17.B","$18.B","$19.B","$20.B","$21.B","$22.B","$23.B", - "$24.B","$25.B","$26.B","$27.B","$gp.B","$sp.B","$30.B","$31.B" - } -}; - -static char *c0_opname[64] = { - "c0op0","tlbr","tlbwi","c0op3","c0op4","c0op5","tlbwr","c0op7", - "tlbp","c0op9","c0op10","c0op11","c0op12","c0op13","c0op14","c0op15", - "rfe","c0op17","c0op18","c0op19","c0op20","c0op21","c0op22","c0op23", - "c0op24","c0op25","c0op26","c0op27","c0op28","c0op29","c0op30","c0op31", - "c0op32","c0op33","c0op34","c0op35","c0op36","c0op37","c0op38","c0op39", - "c0op40","c0op41","c0op42","c0op43","c0op44","c0op45","c0op46","c0op47", - "c0op48","c0op49","c0op50","c0op51","c0op52","c0op53","c0op54","c0op55", - "c0op56","c0op57","c0op58","c0op59","c0op60","c0op61","c0op62","c0op63" -}; - -static char *c0_reg[32] = { - "index","random","tlblo","c0r3","context","c0r5","c0r6","c0r7", - "badvaddr","c0r9","tlbhi","epcn","sr", "cause","epc", "c0r15", - "c0r16","c0r17","c0r18","c0r19","c0r20","c0r21","c0r22","c0r23", - "c0r24","c0r25","c0r26","c0r27","c0r28","c0r29","c0r30","c0r31" -}; - -/* Remember the options set by dis_init */ -//#define ADDR_DEFAULT "%#010x:\t" -#define ADDR_DEFAULT 0 -//#define VALUE_DEFAULT "%#010x\t" -#define VALUE_DEFAULT 0 -#define NAME_DEFAULT COMPILER_NAMES -static struct { - char *addr_format; - char *value_format; - const char **reg_names; - int print_jal_targets; -} save = { - ADDR_DEFAULT, - VALUE_DEFAULT, - NAME_DEFAULT, - true -}; - -/* Update regmask to reflect the use of this general-purpose (not fp) - register, and return its name */ -static const char * -register_name(ireg, boosted, regmask) -unsigned ireg, *regmask; -int boosted; -{ - if (!boosted) - *regmask |= (1 << ireg); - return save.reg_names[boosted ? ireg + 32 : ireg]; -} - -/* public -- see dissassembler.h */ -int -tdisasm(buffer, address, iword, ext, regmask, symbol_value, ls_register) -char *buffer; -unsigned char ext; /* extension byte */ -unsigned address, iword, *regmask, *symbol_value, *ls_register; -{ - int return_value = 0; - char *bufptr = buffer; - boolean do_b_displacement = false; - boolean do_loadstore = false; - union mips_instruction i; - union extension_byte e; - - *bufptr = 0; - i.word = iword; - e.byte = ext; - *regmask = *symbol_value = *ls_register = 0; - - /* Put out the address and hex value of the instruction, - leaving bufptr set at the end */ - if (save.addr_format) { - sprintf(bufptr, save.addr_format, address); - bufptr += strlen(bufptr); - } - if (save.value_format) { - sprintf(bufptr, save.value_format, iword); - bufptr += strlen(bufptr); - } - - /* check for dynamic NOP */ - if (e.e.dyn_nop) { - strcat(bufptr, "D."); - bufptr += 2; - } - - /* decode the instruction */ - switch (i.j_format.opcode) { - - case spec_op: - - if (i.word == 0x20) { - strcat(bufptr, "nop"); - if (e.e.rd_boost) - strcat(bufptr, ".B"); - bufptr += strlen(bufptr); - break; - } else if (i.r_format.func == addu_op && i.r_format.rt == ZERO) { - sprintf(bufptr, "move%s\t%s,%s", - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - bufptr += strlen(bufptr); - break; - } - strcat(bufptr, spec_name[i.r_format.func]); - if (e.e.rd_boost) - strcat(bufptr, ".B"); - bufptr += strlen(bufptr); - - switch (i.r_format.func) { - case sll_op: - case srl_op: - case sra_op: - sprintf(bufptr, "\t%s,%s,%d", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask), - i.r_format.re); - break; - case sllv_op: - case srlv_op: - case srav_op: - sprintf(bufptr, "\t%s,%s,%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - break; - case mfhi_op: - case mflo_op: - sprintf(bufptr, "\t%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask)); - break; - case jalr_op: - return_value = 3; - sprintf(bufptr, "\t%s,%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - *ls_register = i.r_format.rs; - break; - case jr_op: - return_value = 3; - *ls_register = i.r_format.rs; - /* fall through */ - case mtlo_op: - case mthi_op: - sprintf(bufptr, "\t%s", - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - break; - case mult_op: - case multu_op: - case div_op: - case divu_op: - sprintf(bufptr, "\t%s,%s", - register_name(i.r_format.rs, e.e.rs_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask)); - break; - case syscall_op: - break; - case break_op: - case vcall_op: - { - char *format = "\t%d"; - unsigned op2 = i.r_format.rd * 32 + i.r_format.re; - - if (op2) - format = "\t%d,%d"; - sprintf(bufptr, format, i.r_format.rs*32+i.r_format.rt, - op2); - } - break; - default: - sprintf(bufptr, "\t%s,%s,%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask)); - break; - }; - break; - - case bcond_op: - sprintf(bufptr, "%s%s\t%s,", - bcond_name[i.i_format.rt], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rs, e.e.rs_boost, regmask)); - do_b_displacement = true; - break; - - case blez_op_T: - case bgtz_op_T: - case blez_op_N: - case bgtz_op_N: - sprintf(bufptr, "%s%s\t%s,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rs, e.e.rs_boost, regmask)); - do_b_displacement = true; - break; - case beq_op_T: - case beq_op_N: - if (i.i_format.rs == ZERO && i.i_format.rt == ZERO) { - strcat(bufptr, "b"); - if (i.j_format.opcode == beq_op_T) - strcat(bufptr, ".T"); - else - strcat(bufptr, ".N"); - if (e.e.rd_boost) - strcat(bufptr, ".B\t"); - else - strcat(bufptr, "\t"); - do_b_displacement = true; - break; - } - /* fall through */ - case bne_op_T: - case bne_op_N: - sprintf(bufptr, "%s%s\t%s,%s,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rs, e.e.rs_boost, regmask), - register_name(i.i_format.rt, e.e.rt_boost, regmask)); - do_b_displacement = true; - break; - - case cop0_op: - case cop1_op: - case cop2_op: - case cop3_op: - { - unsigned which_cop = i.j_format.opcode - cop0_op; - char *f_or_r = "rf"; - - switch (i.r_format.rs) { - case bc_op_T: - sprintf(bufptr, "bc%d%c.T%s\t", which_cop, - "ft"[i.r_format.rt], - e.e.rd_boost ? ".B" : ""); - do_b_displacement = true; - break; - case bc_op_N: - sprintf(bufptr, "bc%d%c.N%s\t", which_cop, - "ft"[i.r_format.rt], - e.e.rd_boost ? ".B" : ""); - do_b_displacement = true; - break; - case mtc_op: - if (which_cop == 0) - sprintf(bufptr, "mtc%d%s\t%s,%s", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - c0_reg[i.f_format.rd]); - else - sprintf(bufptr, "mtc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - case mfc_op: - if (which_cop == 0) - sprintf(bufptr, "mfc%d%s\t%s,%s", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - c0_reg[i.f_format.rd]); - else - sprintf(bufptr, "mfc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - case cfc_op: - sprintf(bufptr, "cfc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost, regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - case ctc_op: - sprintf(bufptr, "ctc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost, regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - default: - if (which_cop != 1) - sprintf(bufptr, "c0%s\t%s", e.e.rd_boost ? ".B" : "", - c0_opname[i.f_format.func]); - else - { - sprintf(bufptr, "%s.%s%s\t", - cop1_name[i.f_format.func], - fmt_name[i.f_format.fmt], - e.e.rd_boost ? ".B" : ""); - bufptr += strlen(bufptr); - switch (i.f_format.func) { - case fsqrt_op: - case fabs_op: - case fmov_op: - case fcvts_op: - case fcvtd_op: - case fcvte_op: - case fcvtw_op: - sprintf(bufptr, "f%d,f%d", - i.f_format.re, - i.f_format.rd); - break; - case fcmp_op+0x0: - case fcmp_op+0x1: - case fcmp_op+0x2: - case fcmp_op+0x3: - case fcmp_op+0x4: - case fcmp_op+0x5: - case fcmp_op+0x6: - case fcmp_op+0x7: - case fcmp_op+0x8: - case fcmp_op+0x9: - case fcmp_op+0xa: - case fcmp_op+0xb: - case fcmp_op+0xc: - case fcmp_op+0xd: - case fcmp_op+0xe: - case fcmp_op+0xf: - sprintf(bufptr, "f%d,f%d", - i.f_format.rd, - i.f_format.rt); - break; - default: - sprintf(bufptr, "f%d,f%d,f%d", - i.f_format.re, - i.f_format.rd, - i.f_format.rt); - break; - } /* switch on func */ - } - break; /* End of default */ - } /* switch on rs */ - } - break; /* End of cop0, cop1, cop2, cop3 */ - - case jal_op: - case j_op: - sprintf(bufptr, "%s%s\t", op_name[i.j_format.opcode], - e.e.rd_boost ? ".B" : ""); - *symbol_value = (address & 0xF0000000) | i.j_format.target << 2; - if (save.print_jal_targets) - { - bufptr += strlen(bufptr); - sprintf(bufptr, "%#x", *symbol_value); - } - return_value = 1; - break; - - case swc1_op: - case sdc1_op: - case lwc1_op: - case ldc1_op: - sprintf(bufptr, "%s%s\tf%d,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - i.i_format.rt); - do_loadstore = true; - break; - - case lb_op: - case lh_op: - case lw_op: - case ld_op: - case lbu_op: - case lhu_op: - case sb_op: - case sh_op: - case sw_op: - case sd_op: - case lwl_op: - case lwr_op: - sprintf(bufptr, "%s%s\t%s,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rt, e.e.rt_boost, regmask)); - do_loadstore = true; - break; - - case ori_op: - case xori_op: - if (i.u_format.rs == ZERO) { - sprintf(bufptr, "li%s\t%s,%d", - e.e.rd_boost ? ".B" : "", - register_name(i.u_format.rt, e.e.rt_boost, regmask), - i.u_format.uimmediate); - break; - } - /* fall through */ - case andi_op: - sprintf(bufptr, "%s%s\t%s,%s,%#x", op_name[i.u_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.u_format.rt, e.e.rt_boost, regmask), - register_name(i.u_format.rs, e.e.rs_boost, regmask), - i.u_format.uimmediate); - break; - case lui_op: - sprintf(bufptr, "%s%s\t%s,%#x", op_name[i.u_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.u_format.rt, e.e.rt_boost, regmask), - i.u_format.uimmediate); - break; - case addi_op: - case addiu_op: - if (i.i_format.rs == ZERO) { - short sign_extender = i.i_format.simmediate; - sprintf(bufptr, "li%s\t%s,%d", - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rt, e.e.rt_boost, regmask), - sign_extender); - break; - } - /* fall through */ - default: - { - short sign_extender = i.i_format.simmediate; - sprintf(bufptr, "%s%s\t%s,%s,%d", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rt, e.e.rt_boost, regmask), - register_name(i.i_format.rs, e.e.rs_boost, regmask), - sign_extender); - } - break; - } - - /* Some instructions require more than just registers */ - - if (do_loadstore) - { - short sign_extender = i.i_format.simmediate; - *symbol_value = sign_extender; - *ls_register = i.i_format.rs; - bufptr += strlen(bufptr); - sprintf(bufptr, "%d(%s)", sign_extender, - register_name(i.i_format.rs, e.e.rs_boost, regmask)); - return_value = -1; - } - else if (do_b_displacement) - { - short sign_extender = i.i_format.simmediate; - bufptr += strlen(bufptr); - *symbol_value = 4 + address + ((((long)sign_extender & 0xFFFD0000) | (0x3FFFF & (sign_extender << 2)))); - sprintf(bufptr, "%#x", *symbol_value); - return_value = 2; - } - - return return_value; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/mipsdis.h b/lib/CPUs/MIPS/bsp/examples/mipsdis.h deleted file mode 100644 index 2e9aca4..0000000 --- a/lib/CPUs/MIPS/bsp/examples/mipsdis.h +++ /dev/null @@ -1,450 +0,0 @@ -/* ------------------------------------------------------------------ */ -/* | Copyright Unpublished, MIPS Computer Systems, Inc. All Rights | */ -/* | Reserved. This software contains proprietary and confidential | */ -/* | information of MIPS and its suppliers. Use, disclosure or | */ -/* | reproduction is prohibited without the prior express written | */ -/* | consent of MIPS. | */ -/* ------------------------------------------------------------------ */ -/* inst.h 4.2 */ -/* - * inst.h -- instruction format defines - */ - -/** - ** UPDATE - 19 Sept 89 by Michael Smith - ** - ** Removed signed type to remove obnoxious C++ warning message. - **/ - -#ifdef LANGUAGE_C -#ifdef MIPSEB -union mips_instruction { - unsigned word; - unsigned char byte[4]; - struct { - unsigned opcode : 6; - unsigned target : 26; - } j_format; - struct { - unsigned opcode : 6; - unsigned rs : 5; - unsigned rt : 5; - unsigned simmediate : 16; - } i_format; - struct { - unsigned opcode : 6; - unsigned rs : 5; - unsigned rt : 5; - unsigned uimmediate : 16; - } u_format; - struct { - unsigned opcode : 6; - unsigned rs : 5; - unsigned rt : 5; - unsigned rd : 5; - unsigned re : 5; - unsigned func : 6; - } r_format; - struct { - unsigned opcode : 6; - unsigned : 1; - unsigned fmt : 4; - unsigned rt : 5; - unsigned rd : 5; - unsigned re : 5; - unsigned func : 6; - } f_format; -}; -#endif - -#ifdef MIPSEL -union mips_instruction { - unsigned word; - unsigned char byte[4]; - struct { - unsigned target : 26; - unsigned opcode : 6; - } j_format; - struct { - unsigned simmediate : 16; - unsigned rt : 5; - unsigned rs : 5; - unsigned opcode : 6; - } i_format; - struct { - unsigned uimmediate : 16; - unsigned rt : 5; - unsigned rs : 5; - unsigned opcode : 6; - } u_format; - struct { - unsigned func : 6; - unsigned re : 5; - unsigned rd : 5; - unsigned rt : 5; - unsigned rs : 5; - unsigned opcode : 6; - } r_format; - struct { - unsigned func : 6; - unsigned re : 5; - unsigned rd : 5; - unsigned rt : 5; - unsigned fmt : 4; - unsigned : 1; - unsigned opcode : 6; - } f_format; -}; -#endif - -#define spec_op 0x00 -#define bcond_op 0x01 -#define j_op 0x02 -#define jal_op 0x03 - -#define beq_op 0x04 -#define bne_op 0x05 -#define blez_op 0x06 -#define bgtz_op 0x07 - -#define addi_op 0x08 -#define addiu_op 0x09 -#define slti_op 0x0A -#define sltiu_op 0x0B - -#define andi_op 0x0C -#define ori_op 0x0D -#define xori_op 0x0E -#define lui_op 0x0F - -#define lb_op 0x20 -#define lh_op 0x21 -#define lw_op 0x23 -#define lbu_op 0x24 -#define lhu_op 0x25 -#define ld_op 0x27 -#define sb_op 0x28 -#define sh_op 0x29 -#define sw_op 0x2B -#define sd_op 0x2F -#define lwl_op 0x22 -#define lwr_op 0x26 -#define swl_op 0x2a -#define swr_op 0x2e - -/* Co-processor sub-opcodes */ -#define bc_op 0x08 -#define mfc_op 0x00 -#define cfc_op 0x02 -#define mtc_op 0x04 -#define ctc_op 0x06 - -/* Co-processor 0 opcodes */ -#define cop0_op 0x10 -#define lwc0_op 0x30 -#define ldc0_op 0x34 -#define swc0_op 0x38 -#define sdc0_op 0x3c - -/* Co-processor 0 sub-opcodes */ -#define tlbr_op 0x1 -#define tlbwi_op 0x2 -#define tlbwr_op 0x6 -#define tlbp_op 0x8 -#define rfe_op 0x10 - -/* Co-processor 1 opcodes */ -#define cop1_op 0x11 -#define lwc1_op 0x31 -#define ldc1_op 0x35 -#define swc1_op 0x39 -#define sdc1_op 0x3D - -/* Co-processor 1 sub-opcodes */ -#define fadd_op 0x00 -#define fsub_op 0x01 -#define fmpy_op 0x02 -#define fdiv_op 0x03 -#define fsqrt_op 0x04 -#define fabs_op 0x05 -#define fmov_op 0x06 -#define fneg_op 0x07 -#define fcvts_op 0x20 -#define fcvtd_op 0x21 -#define fcvte_op 0x22 -#define fcvtw_op 0x24 -#define fcmp_op 0x30 -#define s_fmt 0 -#define d_fmt 1 -#define e_fmt 2 -#define w_fmt 4 - -/* Other coprocessor opcodes */ -#define cop2_op 0x12 -#define lwc2_op 0x32 -#define ldc2_op 0x36 -#define swc2_op 0x3a -#define sdc2_op 0x3e - -#define cop3_op 0x13 -#define lwc3_op 0x33 -#define ldc3_op 0x37 -#define swc3_op 0x3b -#define sdc3_op 0x3f - - -/* bcond subopcodes */ -#define bltz_op 0x00 -#define bgez_op 0x01 -#define bltzal_op 0x10 -#define bgezal_op 0x11 - -/* special subopcodes */ -#define sll_op 0x00 -#define srl_op 0x02 -#define sra_op 0x03 -#define sllv_op 0x04 -#define srlv_op 0x06 -#define srav_op 0x07 -#define jr_op 0x08 -#define jalr_op 0x09 -#define syscall_op 0x0C -#define break_op 0x0D -#define vcall_op 0x0E - -#define mfhi_op 0x10 -#define mthi_op 0x11 -#define mflo_op 0x12 -#define mtlo_op 0x13 -#define mult_op 0x18 -#define multu_op 0x19 -#define div_op 0x1A -#define divu_op 0x1B - -#define add_op 0x20 -#define addu_op 0x21 -#define and_op 0x24 -#define or_op 0x25 -#define xor_op 0x26 -#define nor_op 0x27 -#define sub_op 0x22 -#define subu_op 0x23 -#define slt_op 0x2A -#define sltu_op 0x2B - -#endif /* LANGUAGE_C */ - -#ifdef LANGUAGE_PASCAL - -#ifdef MIPSEB -type - mips_instruction = - packed record - case cardinal of - 0: ( - word: cardinal; - ); - 1: ( - byte: packed array[0..3] of 0..255; - ); - 2: ( - opcode: 0..63; - target: 0..67108863; - ); - 3: ( - opcode3: 0..63; - rs: 0..31; - rt: 0..31; - simmediate: -32768..32767; - ); - 4: ( - opcode4: 0..63; - rs4: 0..63; - rt4: 0..63; - uimmediate: 0..65535; - ); - 5: ( - opcode5: 0..63; - rs5: 0..63; - rt5: 0..63; - rd5: 0..63; - re5: 0..63; - func: 0..63; - ); - end {record}; -#endif - -#ifdef MIPSEL -type - mips_instruction = - packed record - case cardinal of - 0: ( - word: cardinal; - ); - 1: ( - byte: packed array[0..3] of 0..255; - ); - 2: ( - target: 0..67108863; - opcode: 0..63; - ); - 3: ( - simmediate: -32768..32767; - rt: 0..31; - rs: 0..31; - opcode3: 0..63; - ); - 4: ( - uimmediate: 0..65535; - rt4: 0..63; - rs4: 0..63; - opcode4: 0..63; - ); - 5: ( - func: 0..63; - re5: 0..63; - rd5: 0..63; - rt5: 0..63; - rs5: 0..63; - opcode5: 0..63; - ); - end {record}; -#endif - -#define spec_op 16#00 -#define bcond_op 16#01 -#define j_op 16#02 -#define jal_op 16#03 - -#define beq_op 16#04 -#define bne_op 16#05 -#define blez_op 16#06 -#define bgtz_op 16#07 - -#define addi_op 16#08 -#define addiu_op 16#09 -#define slti_op 16#0A -#define sltiu_op 16#0B - -#define andi_op 16#0C -#define ori_op 16#0D -#define xori_op 16#0E -#define lui_op 16#0F - -#define lb_op 16#20 -#define lh_op 16#21 -#define lw_op 16#23 -#define lbu_op 16#24 -#define lhu_op 16#25 -#define ld_op 16#27 -#define sb_op 16#28 -#define sh_op 16#29 -#define sw_op 16#2B -#define sd_op 16#2F -#define lwl_op 16#22 -#define lwr_op 16#26 -#define swl_op 16#2a -#define swr_op 16#2e - -/* Co-processor sub-opcodes */ -#define bc_op 16#08 -#define mfc_op 16#00 -#define cfc_op 16#02 -#define mtc_op 16#04 -#define ctc_op 16#06 - -/* Co-processor 0 opcodes */ -#define cop0_op 16#10 -#define lwc0_op 16#30 -#define ldc0_op 16#34 -#define swc0_op 16#38 -#define sdc0_op 16#3c - -/* Co-processor 0 sub-opcodes */ -#define tlbr_op 16#1 -#define tlbwi_op 16#2 -#define tlbwr_op 16#6 -#define tlbp_op 16#8 -#define rfe_op 16#10 - -/* Co-processor 1 opcodes */ -#define cop1_op 16#11 -#define lwc1_op 16#31 -#define ldc1_op 16#35 -#define swc1_op 16#39 -#define sdc1_op 16#3D - -/* Co-processor 1 sub-opcodes */ -#define fadd_op 16#00 -#define fsub_op 16#01 -#define fmpy_op 16#02 -#define fdiv_op 16#03 -#define fsqrt_op 16#04 -#define fabs_op 16#05 -#define fmov_op 16#06 -#define fneg_op 16#07 -#define fcvts_op 16#20 -#define fcvtd_op 16#21 -#define fcvte_op 16#22 -#define fcvtw_op 16#24 -#define fcmp_op 16#30 -#define s_fmt 0 -#define d_fmt 1 -#define e_fmt 2 -#define w_fmt 4 - -/* Other coprocessor opcodes */ -#define cop2_op 16#12 -#define lwc2_op 16#32 -#define ldc2_op 16#36 -#define swc2_op 16#3a -#define sdc2_op 16#3e - -#define cop3_op 16#13 -#define lwc3_op 16#33 -#define ldc3_op 16#37 -#define swc3_op 16#3b -#define sdc3_op 16#3f - - -/* bcond subopcodes */ -#define bltz_op 16#00 -#define bgez_op 16#01 -#define bltzal_op 16#10 -#define bgezal_op 16#11 - -/* special subopcodes */ -#define sll_op 16#00 -#define srl_op 16#02 -#define sra_op 16#03 -#define sllv_op 16#04 -#define srlv_op 16#06 -#define srav_op 16#07 -#define jr_op 16#08 -#define jalr_op 16#09 -#define syscall_op 16#0C -#define break_op 16#0D -#define vcall_op 16#0E - -#define mfhi_op 16#10 -#define mthi_op 16#11 -#define mflo_op 16#12 -#define mtlo_op 16#13 -#define mult_op 16#18 -#define multu_op 16#19 -#define div_op 16#1A -#define divu_op 16#1B - -#define add_op 16#20 -#define addu_op 16#21 -#define and_op 16#24 -#define or_op 16#25 -#define xor_op 16#26 -#define nor_op 16#27 -#define sub_op 16#22 -#define subu_op 16#23 -#define slt_op 16#2A -#define sltu_op 16#2B - -#endif /* LANGUAGE_PASCAL */ diff --git a/lib/CPUs/MIPS/bsp/examples/paranoia.c b/lib/CPUs/MIPS/bsp/examples/paranoia.c deleted file mode 100644 index 38f08e1..0000000 --- a/lib/CPUs/MIPS/bsp/examples/paranoia.c +++ /dev/null @@ -1,2302 +0,0 @@ -/* - * paranoia.c,v 1.4 1995/08/23 19:26:32 joel Exp - * - * A C version of Kahan's Floating Point Test "Paranoia" - * - * Thos Sumner, UCSF, Feb. 1985 - * David Gay, BTL, Jan. 1986 - * - * This is a rewrite from the Pascal version by - * - * B. A. Wichmann, 18 Jan. 1985 - * - * (and does NOT exhibit good C programming style). - * - * Sun May 16 18:21:51 MDT 1993 Jeffrey Wheat (cassidy@cygnus.com) - * Removed KR_headers defines, removed ANSI prototyping - * Cleaned up and reformated code. Added special CYGNUS - * "verbose" mode type messages (-DCYGNUS). - * Note: This code is VERY NASTY. - * - * Adjusted to use Standard C headers 19 Jan. 1992 (dmg); - * compile with -DKR_headers or insert - * #define KR_headers - * at the beginning if you have an old-style C compiler. - * - * (C) Apr 19 1983 in BASIC version by: - * Professor W. M. Kahan, - * 567 Evans Hall - * Electrical Engineering & Computer Science Dept. - * University of California - * Berkeley, California 94720 - * USA - * - * converted to Pascal by: - * B. A. Wichmann - * National Physical Laboratory - * Teddington Middx - * TW11 OLW - * UK - * - * converted to C by: - * - * David M. Gay and Thos Sumner - * AT&T Bell Labs Computer Center, Rm. U-76 - * 600 Mountain Avenue University of California - * Murray Hill, NJ 07974 San Francisco, CA 94143 - * USA USA - * - * with simultaneous corrections to the Pascal source (reflected - * in the Pascal source available over netlib). - * [A couple of bug fixes from dgh = sun!dhough incorporated 31 July 1986.] - * - * Reports of results on various systems from all the versions - * of Paranoia are being collected by Richard Karpinski at the - * same address as Thos Sumner. This includes sample outputs, - * bug reports, and criticisms. - * - * You may copy this program freely if you acknowledge its source. - * Comments on the Pascal version to NPL, please. - * - * - * The C version catches signals from floating-point exceptions. - * If signal(SIGFPE,...) is unavailable in your environment, you may - * #define NOSIGNAL to comment out the invocations of signal. - * - * This source file is too big for some C compilers, but may be split - * into pieces. Comments containing "SPLIT" suggest convenient places - * for this splitting. At the end of these comments is an "ed script" - * (for the UNIX(tm) editor ed) that will do this splitting. - * - * By #defining SINGLE_PRECISION when you compile this source, you may - * obtain a single-precision C version of Paranoia. - * - * The following is from the introductory commentary from Wichmann's work: - * - * The BASIC program of Kahan is written in Microsoft BASIC using many - * facilities which have no exact analogy in Pascal. The Pascal - * version below cannot therefore be exactly the same. Rather than be - * a minimal transcription of the BASIC program, the Pascal coding - * follows the conventional style of block-structured languages. Hence - * the Pascal version could be useful in producing versions in other - * structured languages. - * - * Rather than use identifiers of minimal length (which therefore have - * little mnemonic significance), the Pascal version uses meaningful - * identifiers as follows [Note: A few changes have been made for C]: - * - * - * BASIC C BASIC C BASIC C - * - * A J S StickyBit - * A1 AInverse J0 NoErrors T - * B Radix [Failure] T0 Underflow - * B1 BInverse J1 NoErrors T2 ThirtyTwo - * B2 RadixD2 [SeriousDefect] T5 OneAndHalf - * B9 BMinusU2 J2 NoErrors T7 TwentySeven - * C [Defect] T8 TwoForty - * C1 CInverse J3 NoErrors U OneUlp - * D [Flaw] U0 UnderflowThreshold - * D4 FourD K PageNo U1 - * E0 L Milestone U2 - * E1 M V - * E2 Exp2 N V0 - * E3 N1 V8 - * E5 MinSqEr O Zero V9 - * E6 SqEr O1 One W - * E7 MaxSqEr O2 Two X - * E8 O3 Three X1 - * E9 O4 Four X8 - * F1 MinusOne O5 Five X9 Random1 - * F2 Half O8 Eight Y - * F3 Third O9 Nine Y1 - * F6 P Precision Y2 - * F9 Q Y9 Random2 - * G1 GMult Q8 Z - * G2 GDiv Q9 Z0 PseudoZero - * G3 GAddSub R Z1 - * H R1 RMult Z2 - * H1 HInverse R2 RDiv Z9 - * I R3 RAddSub - * IO NoTrials R4 RSqrt - * I3 IEEE R9 Random9 - * - * SqRWrng - * - * All the variables in BASIC are true variables and in consequence, - * the program is more difficult to follow since the "constants" must - * be determined (the glossary is very helpful). The Pascal version - * uses Real constants, but checks are added to ensure that the values - * are correctly converted by the compiler. - * - * The major textual change to the Pascal version apart from the - * identifiersis that named procedures are used, inserting parameters - * wherehelpful. New procedures are also introduced. The - * correspondence is as follows: - * - * - * BASIC Pascal - * lines - * - * 90- 140 Pause - * 170- 250 Instructions - * 380- 460 Heading - * 480- 670 Characteristics - * 690- 870 History - * 2940-2950 Random - * 3710-3740 NewD - * 4040-4080 DoesYequalX - * 4090-4110 PrintIfNPositive - * 4640-4850 TestPartialUnderflow - * -*/ - -#include -#include - -/* - * To compile this on host using only libm from newlib (and using host libc) - * do: - * gcc -g -DNEED_REENT -DCYGNUS paranoia.c .../newlib-1.6/newlib/libm.a - */ - -#ifdef NEED_REENT -#include -struct _reent libm_reent = _REENT_INIT(libm_reent); -struct _reent *_impure_ptr = &libm_reent; -#endif - -#ifndef NOSIGNAL -#include -#include -#else /* NOSIGNAL */ -#define longjmp(e,v) -#define setjmp(e) 0 -#define jmp_buf int -#endif /* NOSIGNAL */ - -#ifdef SINGLE_PRECISION -#define FLOAT float -#define FABS(x) (float)fabs((double)(x)) -#define FLOOR(x) (float)floor((double)(x)) -#define LOG(x) (float)log((double)(x)) -#define POW(x,y) (float)pow((double)(x),(double)(y)) -#define SQRT(x) (float)sqrt((double)(x)) -#else /* !SINGLE_PRECISION */ -#define FLOAT double -#define FABS(x) fabs(x) -#define FLOOR(x) floor(x) -#define LOG(x) log(x) -#define POW(x,y) pow(x,y) -#define SQRT(x) sqrt(x) -#endif /* SINGLE_PRECISION */ - -jmp_buf ovfl_buf; -extern double fabs (), floor (), log (), pow (), sqrt (); -extern void exit (); -typedef void (*Sig_type) (); -FLOAT Sign (), Random (); -extern void BadCond (); -extern void SqXMinX (); -extern void TstCond (); -extern void notify (); -extern int read (); -extern void Characteristics (); -extern void Heading (); -extern void History (); -extern void Instructions (); -extern void IsYeqX (); -extern void NewD (); -extern void Pause (); -extern void PrintIfNPositive (); -extern void SR3750 (); -extern void SR3980 (); -extern void TstPtUf (); - -Sig_type sigsave; - -#define KEYBOARD 0 - -FLOAT Radix, BInvrse, RadixD2, BMinusU2; - -/*Small floating point constants.*/ -FLOAT Zero = 0.0; -FLOAT Half = 0.5; -FLOAT One = 1.0; -FLOAT Two = 2.0; -FLOAT Three = 3.0; -FLOAT Four = 4.0; -FLOAT Five = 5.0; -FLOAT Eight = 8.0; -FLOAT Nine = 9.0; -FLOAT TwentySeven = 27.0; -FLOAT ThirtyTwo = 32.0; -FLOAT TwoForty = 240.0; -FLOAT MinusOne = -1.0; -FLOAT OneAndHalf = 1.5; - -/*Integer constants*/ -int NoTrials = 20; /*Number of tests for commutativity. */ -#define False 0 -#define True 1 - -/* - * Definitions for declared types - * Guard == (Yes, No); - * Rounding == (Chopped, Rounded, Other); - * Message == packed array [1..40] of char; - * Class == (Flaw, Defect, Serious, Failure); - */ -#define Yes 1 -#define No 0 -#define Chopped 2 -#define Rounded 1 -#define Other 0 -#define Flaw 3 -#define Defect 2 -#define Serious 1 -#define Failure 0 -typedef int Guard, Rounding, Class; -typedef char Message; - -/* Declarations of Variables */ -int Indx; -char ch[8]; -FLOAT AInvrse, A1; -FLOAT C, CInvrse; -FLOAT D, FourD; -FLOAT E0, E1, Exp2, E3, MinSqEr; -FLOAT SqEr, MaxSqEr, E9; -FLOAT Third; -FLOAT F6, F9; -FLOAT H, HInvrse; -int I; -FLOAT StickyBit, J; -FLOAT MyZero; -FLOAT Precision; -FLOAT Q, Q9; -FLOAT R, Random9; -FLOAT T, Underflow, S; -FLOAT OneUlp, UfThold, U1, U2; -FLOAT V, V0, V9; -FLOAT W; -FLOAT X, X1, X2, X8, Random1; -FLOAT Y, Y1, Y2, Random2; -FLOAT Z, PseudoZero, Z1, Z2, Z9; -int ErrCnt[4]; -int fpecount; -int Milestone; -int PageNo; -int M, N, N1; -Guard GMult, GDiv, GAddSub; -Rounding RMult, RDiv, RAddSub, RSqrt; -int Break, Done, NotMonot, Monot, Anomaly, IEEE, SqRWrng, UfNGrad; - -/* Computed constants. - * U1 gap below 1.0, i.e, 1.0 - U1 is next number below 1.0 - * U2 gap above 1.0, i.e, 1.0 + U2 is next number above 1.0 - */ - -int batchmode; /* global batchmode test */ - -/* program name and version variables and macro */ -char *temp; -char *program_name; -char *program_vers; - -#ifndef VERSION -#define VERSION "1.1 [cygnus]" -#endif /* VERSION */ - -#define basename(cp) ((temp=(char *)strrchr((cp), '/')) ? temp+1 : (cp)) - -#ifndef BATCHMODE -# ifdef CYGNUS -# define BATCHMODE -# endif -#endif - -/* floating point exception receiver */ -void -_sigfpe (x) -int x; -{ - fpecount++; - printf ("\n* * * FLOATING-POINT ERROR %d * * *\n", x); - fflush (stdout); - if (sigsave) { -#ifndef NOSIGNAL - signal (SIGFPE, sigsave); -#endif /* NOSIGNAL */ - sigsave = 0; - longjmp (ovfl_buf, 1); - } - exit (1); -} - -#ifdef NOMAIN -#define main paranoia -#endif - -int -main (argc, argv) -int argc; -char **argv; -{ - /* First two assignments use integer right-hand sides. */ - Zero = 0; - One = 1; - Two = One + One; - Three = Two + One; - Four = Three + One; - Five = Four + One; - Eight = Four + Four; - Nine = Three * Three; - TwentySeven = Nine * Three; - ThirtyTwo = Four * Eight; - TwoForty = Four * Five * Three * Four; - MinusOne = -One; - Half = One / Two; - OneAndHalf = One + Half; - ErrCnt[Failure] = 0; - ErrCnt[Serious] = 0; - ErrCnt[Defect] = 0; - ErrCnt[Flaw] = 0; - PageNo = 1; - -#ifdef BATCHMODE - batchmode = 1; /* run test in batchmode? */ -#else /* !BATCHMODE */ - batchmode = 0; /* run test interactively */ -#endif /* BATCHMODE */ - -/* - program_name = basename (argv[0]); -*/ - program_vers = VERSION; - - printf ("%s version %s\n", "Paranoia", program_vers); - - /*=============================================*/ - Milestone = 0; - /*=============================================*/ -#ifndef NOSIGNAL - signal (SIGFPE, _sigfpe); -#endif - - if (!batchmode) { - Instructions (); - Pause (); - Heading (); - Instructions (); - Pause (); - Heading (); - Pause (); - Characteristics (); - Pause (); - History (); - Pause (); - } - - /*=============================================*/ - Milestone = 7; - /*=============================================*/ - printf ("Program is now RUNNING tests on small integers:\n"); - TstCond (Failure, (Zero + Zero == Zero) && (One - One == Zero) - && (One > Zero) && (One + One == Two), - "0+0 != 0, 1-1 != 0, 1 <= 0, or 1+1 != 2"); - Z = -Zero; - if (Z != 0.0) { - ErrCnt[Failure] = ErrCnt[Failure] + 1; - printf ("Comparison alleges that -0.0 is Non-zero!\n"); - U1 = 0.001; - Radix = 1; - TstPtUf (); - } - TstCond (Failure, (Three == Two + One) && (Four == Three + One) - && (Four + Two * (-Two) == Zero) - && (Four - Three - One == Zero), - "3 != 2+1, 4 != 3+1, 4+2*(-2) != 0, or 4-3-1 != 0"); - TstCond (Failure, (MinusOne == (0 - One)) - && (MinusOne + One == Zero) && (One + MinusOne == Zero) - && (MinusOne + FABS (One) == Zero) - && (MinusOne + MinusOne * MinusOne == Zero), - "-1+1 != 0, (-1)+abs(1) != 0, or -1+(-1)*(-1) != 0"); - TstCond (Failure, Half + MinusOne + Half == Zero, - "1/2 + (-1) + 1/2 != 0"); - /*=============================================*/ - Milestone = 10; - /*=============================================*/ - TstCond (Failure, (Nine == Three * Three) - && (TwentySeven == Nine * Three) && (Eight == Four + Four) - && (ThirtyTwo == Eight * Four) - && (ThirtyTwo - TwentySeven - Four - One == Zero), - "9 != 3*3, 27 != 9*3, 32 != 8*4, or 32-27-4-1 != 0"); - TstCond (Failure, (Five == Four + One) && - (TwoForty == Four * Five * Three * Four) - && (TwoForty / Three - Four * Four * Five == Zero) - && (TwoForty / Four - Five * Three * Four == Zero) - && (TwoForty / Five - Four * Three * Four == Zero), - "5 != 4+1, 240/3 != 80, 240/4 != 60, or 240/5 != 48"); - if (ErrCnt[Failure] == 0) { - printf ("-1, 0, 1/2, 1, 2, 3, 4, 5, 9, 27, 32 & 240 are O.K.\n"); - printf ("\n"); - } - printf ("Searching for Radix and Precision.\n"); - W = One; - do { - W = W + W; - Y = W + One; - Z = Y - W; - Y = Z - One; - } - while (MinusOne + FABS (Y) < Zero); - /*.. now W is just big enough that |((W+1)-W)-1| >= 1 ...*/ - Precision = Zero; - Y = One; - do { - Radix = W + Y; - Y = Y + Y; - Radix = Radix - W; - } - while (Radix == Zero); - if (Radix < Two) - Radix = One; - printf ("Radix = %f .\n", Radix); - if (Radix != 1) { - W = One; - do { - Precision = Precision + One; - W = W * Radix; - Y = W + One; - } - while ((Y - W) == One); - } - /*... now W == Radix^Precision is barely too big to satisfy (W+1)-W == 1 - ...*/ - U1 = One / W; - U2 = Radix * U1; - printf ("Closest relative separation found is U1 = %.7e .\n\n", U1); - printf ("Recalculating radix and precision\n "); - - /*save old values*/ - E0 = Radix; - E1 = U1; - E9 = U2; - E3 = Precision; - - X = Four / Three; - Third = X - One; - F6 = Half - Third; - X = F6 + F6; - X = FABS (X - Third); - if (X < U2) - X = U2; - - /*... now X = (unknown no.) ulps of 1+...*/ - do { - U2 = X; - Y = Half * U2 + ThirtyTwo * U2 * U2; - Y = One + Y; - X = Y - One; - } - while (!((U2 <= X) || (X <= Zero))); - - /*... now U2 == 1 ulp of 1 + ... */ - X = Two / Three; - F6 = X - Half; - Third = F6 + F6; - X = Third - Half; - X = FABS (X + F6); - if (X < U1) - X = U1; - - /*... now X == (unknown no.) ulps of 1 -... */ - do { - U1 = X; - Y = Half * U1 + ThirtyTwo * U1 * U1; - Y = Half - Y; - X = Half + Y; - Y = Half - X; - X = Half + Y; - } - while (!((U1 <= X) || (X <= Zero))); - /*... now U1 == 1 ulp of 1 - ... */ - if (U1 == E1) - printf ("confirms closest relative separation U1 .\n"); - else - printf ("gets better closest relative separation U1 = %.7e .\n", U1); - W = One / U1; - F9 = (Half - U1) + Half; - Radix = FLOOR (0.01 + U2 / U1); - if (Radix == E0) - printf ("Radix confirmed.\n"); - else - printf ("MYSTERY: recalculated Radix = %.7e .\n", Radix); - TstCond (Defect, Radix <= Eight + Eight, - "Radix is too big: roundoff problems"); - TstCond (Flaw, (Radix == Two) || (Radix == 10) - || (Radix == One), "Radix is not as good as 2 or 10"); - /*=============================================*/ - Milestone = 20; - /*=============================================*/ - TstCond (Failure, F9 - Half < Half, - "(1-U1)-1/2 < 1/2 is FALSE, prog. fails?"); - X = F9; - I = 1; - Y = X - Half; - Z = Y - Half; - TstCond (Failure, (X != One) - || (Z == Zero), "Comparison is fuzzy,X=1 but X-1/2-1/2 != 0"); - X = One + U2; - I = 0; - /*=============================================*/ - Milestone = 25; - /*=============================================*/ - /*... BMinusU2 = nextafter(Radix, 0) */ - BMinusU2 = Radix - One; - BMinusU2 = (BMinusU2 - U2) + One; - /* Purify Integers */ - if (Radix != One) { - X = -TwoForty * LOG (U1) / LOG (Radix); - Y = FLOOR (Half + X); - if (FABS (X - Y) * Four < One) - X = Y; - Precision = X / TwoForty; - Y = FLOOR (Half + Precision); - if (FABS (Precision - Y) * TwoForty < Half) - Precision = Y; - } - if ((Precision != FLOOR (Precision)) || (Radix == One)) { - printf ("Precision cannot be characterized by an Integer number\n"); - printf ("of significant digits but, by itself, this is a minor flaw.\n"); - } - if (Radix == One) - printf ("logarithmic encoding has precision characterized solely by U1.\n"); - else - printf ("The number of significant digits of the Radix is %f .\n", - Precision); - TstCond (Serious, U2 * Nine * Nine * TwoForty < One, - "Precision worse than 5 decimal figures "); - /*=============================================*/ - Milestone = 30; - /*=============================================*/ - /* Test for extra-precise subepressions */ - X = FABS (((Four / Three - One) - One / Four) * Three - One / Four); - do { - Z2 = X; - X = (One + (Half * Z2 + ThirtyTwo * Z2 * Z2)) - One; - } - while (!((Z2 <= X) || (X <= Zero))); - X = Y = Z = FABS ((Three / Four - Two / Three) * Three - One / Four); - do { - Z1 = Z; - Z = (One / Two - ((One / Two - (Half * Z1 + ThirtyTwo * Z1 * Z1)) - + One / Two)) + One / Two; - } - while (!((Z1 <= Z) || (Z <= Zero))); - do { - do { - Y1 = Y; - Y = (Half - ((Half - (Half * Y1 + ThirtyTwo * Y1 * Y1)) + Half - )) + Half; - } - while (!((Y1 <= Y) || (Y <= Zero))); - X1 = X; - X = ((Half * X1 + ThirtyTwo * X1 * X1) - F9) + F9; - } - while (!((X1 <= X) || (X <= Zero))); - if ((X1 != Y1) || (X1 != Z1)) { - BadCond (Serious, "Disagreements among the values X1, Y1, Z1,\n"); - printf ("respectively %.7e, %.7e, %.7e,\n", X1, Y1, Z1); - printf ("are symptoms of inconsistencies introduced\n"); - printf ("by extra-precise evaluation of arithmetic subexpressions.\n"); - notify ("Possibly some part of this"); - if ((X1 == U1) || (Y1 == U1) || (Z1 == U1)) - printf ( - "That feature is not tested further by this program.\n"); - } else { - if ((Z1 != U1) || (Z2 != U2)) { - if ((Z1 >= U1) || (Z2 >= U2)) { - BadCond (Failure, ""); - notify ("Precision"); - printf ("\tU1 = %.7e, Z1 - U1 = %.7e\n", U1, Z1 - U1); - printf ("\tU2 = %.7e, Z2 - U2 = %.7e\n", U2, Z2 - U2); - } else { - if ((Z1 <= Zero) || (Z2 <= Zero)) { - printf ("Because of unusual Radix = %f", Radix); - printf (", or exact rational arithmetic a result\n"); - printf ("Z1 = %.7e, or Z2 = %.7e ", Z1, Z2); - notify ("of an\nextra-precision"); - } - if (Z1 != Z2 || Z1 > Zero) { - X = Z1 / U1; - Y = Z2 / U2; - if (Y > X) - X = Y; - Q = -LOG (X); - printf ("Some subexpressions appear to be calculated extra\n"); - printf ("precisely with about %g extra B-digits, i.e.\n", - (Q / LOG (Radix))); - printf ("roughly %g extra significant decimals.\n", - Q / LOG (10.)); - } - printf ("That feature is not tested further by this program.\n"); - } - } - } - Pause (); - /*=============================================*/ - Milestone = 35; - /*=============================================*/ - if (Radix >= Two) { - X = W / (Radix * Radix); - Y = X + One; - Z = Y - X; - T = Z + U2; - X = T - Z; - TstCond (Failure, X == U2, - "Subtraction is not normalized X=Y,X+Z != Y+Z!"); - if (X == U2) - printf ( - "Subtraction appears to be normalized, as it should be."); - } - printf ("\nChecking for guard digit in *, /, and -.\n"); - Y = F9 * One; - Z = One * F9; - X = F9 - Half; - Y = (Y - Half) - X; - Z = (Z - Half) - X; - X = One + U2; - T = X * Radix; - R = Radix * X; - X = T - Radix; - X = X - Radix * U2; - T = R - Radix; - T = T - Radix * U2; - X = X * (Radix - One); - T = T * (Radix - One); - if ((X == Zero) && (Y == Zero) && (Z == Zero) && (T == Zero)) - GMult = Yes; - else { - GMult = No; - TstCond (Serious, False, - "* lacks a Guard Digit, so 1*X != X"); - } - Z = Radix * U2; - X = One + Z; - Y = FABS ((X + Z) - X * X) - U2; - X = One - U2; - Z = FABS ((X - U2) - X * X) - U1; - TstCond (Failure, (Y <= Zero) - && (Z <= Zero), "* gets too many final digits wrong.\n"); - Y = One - U2; - X = One + U2; - Z = One / Y; - Y = Z - X; - X = One / Three; - Z = Three / Nine; - X = X - Z; - T = Nine / TwentySeven; - Z = Z - T; - TstCond (Defect, X == Zero && Y == Zero && Z == Zero, - "Division lacks a Guard Digit, so error can exceed 1 ulp\n\ -or 1/3 and 3/9 and 9/27 may disagree"); - Y = F9 / One; - X = F9 - Half; - Y = (Y - Half) - X; - X = One + U2; - T = X / One; - X = T - X; - if ((X == Zero) && (Y == Zero) && (Z == Zero)) - GDiv = Yes; - else { - GDiv = No; - TstCond (Serious, False, - "Division lacks a Guard Digit, so X/1 != X"); - } - X = One / (One + U2); - Y = X - Half - Half; - TstCond (Serious, Y < Zero, - "Computed value of 1/1.000..1 >= 1"); - X = One - U2; - Y = One + Radix * U2; - Z = X * Radix; - T = Y * Radix; - R = Z / Radix; - StickyBit = T / Radix; - X = R - X; - Y = StickyBit - Y; - TstCond (Failure, X == Zero && Y == Zero, - "* and/or / gets too many last digits wrong"); - Y = One - U1; - X = One - F9; - Y = One - Y; - T = Radix - U2; - Z = Radix - BMinusU2; - T = Radix - T; - if ((X == U1) && (Y == U1) && (Z == U2) && (T == U2)) - GAddSub = Yes; - else { - GAddSub = No; - TstCond (Serious, False, - "- lacks Guard Digit, so cancellation is obscured"); - } - if (F9 != One && F9 - One >= Zero) { - BadCond (Serious, "comparison alleges (1-U1) < 1 although\n"); - printf (" subtraction yields (1-U1) - 1 = 0 , thereby vitiating\n"); - printf (" such precautions against division by zero as\n"); - printf (" ... if (X == 1.0) {.....} else {.../(X-1.0)...}\n"); - } - if (GMult == Yes && GDiv == Yes && GAddSub == Yes) - printf ( - " *, /, and - appear to have guard digits, as they should.\n"); - /*=============================================*/ - Milestone = 40; - /*=============================================*/ - Pause (); - printf ("Checking rounding on multiply, divide and add/subtract.\n"); - RMult = Other; - RDiv = Other; - RAddSub = Other; - RadixD2 = Radix / Two; - A1 = Two; - Done = False; - do { - AInvrse = Radix; - do { - X = AInvrse; - AInvrse = AInvrse / A1; - } - while (!(FLOOR (AInvrse) != AInvrse)); - Done = (X == One) || (A1 > Three); - if (!Done) - A1 = Nine + One; - } - while (!(Done)); - if (X == One) - A1 = Radix; - AInvrse = One / A1; - X = A1; - Y = AInvrse; - Done = False; - do { - Z = X * Y - Half; - TstCond (Failure, Z == Half, - "X * (1/X) differs from 1"); - Done = X == Radix; - X = Radix; - Y = One / X; - } - while (!(Done)); - Y2 = One + U2; - Y1 = One - U2; - X = OneAndHalf - U2; - Y = OneAndHalf + U2; - Z = (X - U2) * Y2; - T = Y * Y1; - Z = Z - X; - T = T - X; - X = X * Y2; - Y = (Y + U2) * Y1; - X = X - OneAndHalf; - Y = Y - OneAndHalf; - if ((X == Zero) && (Y == Zero) && (Z == Zero) && (T <= Zero)) { - X = (OneAndHalf + U2) * Y2; - Y = OneAndHalf - U2 - U2; - Z = OneAndHalf + U2 + U2; - T = (OneAndHalf - U2) * Y1; - X = X - (Z + U2); - StickyBit = Y * Y1; - S = Z * Y2; - T = T - Y; - Y = (U2 - Y) + StickyBit; - Z = S - (Z + U2 + U2); - StickyBit = (Y2 + U2) * Y1; - Y1 = Y2 * Y1; - StickyBit = StickyBit - Y2; - Y1 = Y1 - Half; - if ((X == Zero) && (Y == Zero) && (Z == Zero) && (T == Zero) - && (StickyBit == Zero) && (Y1 == Half)) { - RMult = Rounded; - printf ("Multiplication appears to round correctly.\n"); - } else if ((X + U2 == Zero) && (Y < Zero) && (Z + U2 == Zero) - && (T < Zero) && (StickyBit + U2 == Zero) - && (Y1 < Half)) { - RMult = Chopped; - printf ("Multiplication appears to chop.\n"); - } else - printf ("* is neither chopped nor correctly rounded.\n"); - if ((RMult == Rounded) && (GMult == No)) - notify ("Multiplication"); - } else - printf ("* is neither chopped nor correctly rounded.\n"); - /*=============================================*/ - Milestone = 45; - /*=============================================*/ - Y2 = One + U2; - Y1 = One - U2; - Z = OneAndHalf + U2 + U2; - X = Z / Y2; - T = OneAndHalf - U2 - U2; - Y = (T - U2) / Y1; - Z = (Z + U2) / Y2; - X = X - OneAndHalf; - Y = Y - T; - T = T / Y1; - Z = Z - (OneAndHalf + U2); - T = (U2 - OneAndHalf) + T; - if (!((X > Zero) || (Y > Zero) || (Z > Zero) || (T > Zero))) { - X = OneAndHalf / Y2; - Y = OneAndHalf - U2; - Z = OneAndHalf + U2; - X = X - Y; - T = OneAndHalf / Y1; - Y = Y / Y1; - T = T - (Z + U2); - Y = Y - Z; - Z = Z / Y2; - Y1 = (Y2 + U2) / Y2; - Z = Z - OneAndHalf; - Y2 = Y1 - Y2; - Y1 = (F9 - U1) / F9; - if ((X == Zero) && (Y == Zero) && (Z == Zero) && (T == Zero) - && (Y2 == Zero) && (Y2 == Zero) - && (Y1 - Half == F9 - Half)) { - RDiv = Rounded; - printf ("Division appears to round correctly.\n"); - if (GDiv == No) - notify ("Division"); - } else if ((X < Zero) && (Y < Zero) && (Z < Zero) && (T < Zero) - && (Y2 < Zero) && (Y1 - Half < F9 - Half)) { - RDiv = Chopped; - printf ("Division appears to chop.\n"); - } - } - if (RDiv == Other) - printf ("/ is neither chopped nor correctly rounded.\n"); - BInvrse = One / Radix; - TstCond (Failure, (BInvrse * Radix - Half == Half), - "Radix * ( 1 / Radix ) differs from 1"); - /*=============================================*/ - Milestone = 50; - /*=============================================*/ - TstCond (Failure, ((F9 + U1) - Half == Half) - && ((BMinusU2 + U2) - One == Radix - One), - "Incomplete carry-propagation in Addition"); - X = One - U1 * U1; - Y = One + U2 * (One - U2); - Z = F9 - Half; - X = (X - Half) - Z; - Y = Y - One; - if ((X == Zero) && (Y == Zero)) { - RAddSub = Chopped; - printf ("Add/Subtract appears to be chopped.\n"); - } - if (GAddSub == Yes) { - X = (Half + U2) * U2; - Y = (Half - U2) * U2; - X = One + X; - Y = One + Y; - X = (One + U2) - X; - Y = One - Y; - if ((X == Zero) && (Y == Zero)) { - X = (Half + U2) * U1; - Y = (Half - U2) * U1; - X = One - X; - Y = One - Y; - X = F9 - X; - Y = One - Y; - if ((X == Zero) && (Y == Zero)) { - RAddSub = Rounded; - printf ("Addition/Subtraction appears to round correctly.\n"); - if (GAddSub == No) - notify ("Add/Subtract"); - } else - printf ("Addition/Subtraction neither rounds nor chops.\n"); - } else - printf ("Addition/Subtraction neither rounds nor chops.\n"); - } else - printf ("Addition/Subtraction neither rounds nor chops.\n"); - S = One; - X = One + Half * (One + Half); - Y = (One + U2) * Half; - Z = X - Y; - T = Y - X; - StickyBit = Z + T; - if (StickyBit != Zero) { - S = Zero; - BadCond (Flaw, "(X - Y) + (Y - X) is non zero!\n"); - } - StickyBit = Zero; - if ((GMult == Yes) && (GDiv == Yes) && (GAddSub == Yes) - && (RMult == Rounded) && (RDiv == Rounded) - && (RAddSub == Rounded) && (FLOOR (RadixD2) == RadixD2)) { - printf ("Checking for sticky bit.\n"); - X = (Half + U1) * U2; - Y = Half * U2; - Z = One + Y; - T = One + X; - if ((Z - One <= Zero) && (T - One >= U2)) { - Z = T + Y; - Y = Z - X; - if ((Z - T >= U2) && (Y - T == Zero)) { - X = (Half + U1) * U1; - Y = Half * U1; - Z = One - Y; - T = One - X; - if ((Z - One == Zero) && (T - F9 == Zero)) { - Z = (Half - U1) * U1; - T = F9 - Z; - Q = F9 - Y; - if ((T - F9 == Zero) && (F9 - U1 - Q == Zero)) { - Z = (One + U2) * OneAndHalf; - T = (OneAndHalf + U2) - Z + U2; - X = One + Half / Radix; - Y = One + Radix * U2; - Z = X * Y; - if (T == Zero && X + Radix * U2 - Z == Zero) { - if (Radix != Two) { - X = Two + U2; - Y = X / Two; - if ((Y - One == Zero)) - StickyBit = S; - } else - StickyBit = S; - } - } - } - } - } - } - if (StickyBit == One) - printf ("Sticky bit apparently used correctly.\n"); - else - printf ("Sticky bit used incorrectly or not at all.\n"); - TstCond (Flaw, !(GMult == No || GDiv == No || GAddSub == No || - RMult == Other || RDiv == Other || RAddSub == Other), - "lack(s) of guard digits or failure(s) to correctly round or chop\n\ -(noted above) count as one flaw in the final tally below"); - /*=============================================*/ - Milestone = 60; - /*=============================================*/ - printf ("\n"); - printf ("Does Multiplication commute? "); - printf ("Testing on %d random pairs.\n", NoTrials); - Random9 = SQRT (3.0); - Random1 = Third; - I = 1; - do { - X = Random (); - Y = Random (); - Z9 = Y * X; - Z = X * Y; - Z9 = Z - Z9; - I = I + 1; - } - while (!((I > NoTrials) || (Z9 != Zero))); - if (I == NoTrials) { - Random1 = One + Half / Three; - Random2 = (U2 + U1) + One; - Z = Random1 * Random2; - Y = Random2 * Random1; - Z9 = (One + Half / Three) * ((U2 + U1) + One) - (One + Half / - Three) * ((U2 + U1) + One); - } - if (!((I == NoTrials) || (Z9 == Zero))) - BadCond (Defect, "X * Y == Y * X trial fails.\n"); - else - printf (" No failures found in %d integer pairs.\n", NoTrials); - /*=============================================*/ - Milestone = 70; - /*=============================================*/ - printf ("\nRunning test of square root(x).\n"); - TstCond (Failure, (Zero == SQRT (Zero)) - && (-Zero == SQRT (-Zero)) - && (One == SQRT (One)), "Square root of 0.0, -0.0 or 1.0 wrong"); - MinSqEr = Zero; - MaxSqEr = Zero; - J = Zero; - X = Radix; - OneUlp = U2; - SqXMinX (Serious); - X = BInvrse; - OneUlp = BInvrse * U1; - SqXMinX (Serious); - X = U1; - OneUlp = U1 * U1; - SqXMinX (Serious); - if (J != Zero) - Pause (); - printf ("Testing if sqrt(X * X) == X for %d Integers X.\n", NoTrials); - J = Zero; - X = Two; - Y = Radix; - if ((Radix != One)) - do { - X = Y; - Y = Radix * Y; - } - while (!((Y - X >= NoTrials))); - OneUlp = X * U2; - I = 1; - while (I <= NoTrials) { - X = X + One; - SqXMinX (Defect); - if (J > Zero) - break; - I = I + 1; - } - printf ("Test for sqrt monotonicity.\n"); - I = -1; - X = BMinusU2; - Y = Radix; - Z = Radix + Radix * U2; - NotMonot = False; - Monot = False; - while (!(NotMonot || Monot)) { - I = I + 1; - X = SQRT (X); - Q = SQRT (Y); - Z = SQRT (Z); - if ((X > Q) || (Q > Z)) - NotMonot = True; - else { - Q = FLOOR (Q + Half); - if ((I > 0) || (Radix == Q * Q)) - Monot = True; - else if (I > 0) { - if (I > 1) - Monot = True; - else { - Y = Y * BInvrse; - X = Y - U1; - Z = Y + U1; - } - } else { - Y = Q; - X = Y - U2; - Z = Y + U2; - } - } - } - if (Monot) - printf ("sqrt has passed a test for Monotonicity.\n"); - else { - BadCond (Defect, ""); - printf ("sqrt(X) is non-monotonic for X near %.7e .\n", Y); - } - /*=============================================*/ - Milestone = 80; - /*=============================================*/ - MinSqEr = MinSqEr + Half; - MaxSqEr = MaxSqEr - Half; - Y = (SQRT (One + U2) - One) / U2; - SqEr = (Y - One) + U2 / Eight; - if (SqEr > MaxSqEr) - MaxSqEr = SqEr; - SqEr = Y + U2 / Eight; - if (SqEr < MinSqEr) - MinSqEr = SqEr; - Y = ((SQRT (F9) - U2) - (One - U2)) / U1; - SqEr = Y + U1 / Eight; - if (SqEr > MaxSqEr) - MaxSqEr = SqEr; - SqEr = (Y + One) + U1 / Eight; - if (SqEr < MinSqEr) - MinSqEr = SqEr; - OneUlp = U2; - X = OneUlp; - for (Indx = 1; Indx <= 3; ++Indx) { - Y = SQRT ((X + U1 + X) + F9); - Y = ((Y - U2) - ((One - U2) + X)) / OneUlp; - Z = ((U1 - X) + F9) * Half * X * X / OneUlp; - SqEr = (Y + Half) + Z; - if (SqEr < MinSqEr) - MinSqEr = SqEr; - SqEr = (Y - Half) + Z; - if (SqEr > MaxSqEr) - MaxSqEr = SqEr; - if (((Indx == 1) || (Indx == 3))) - X = OneUlp * Sign (X) * FLOOR (Eight / (Nine * SQRT (OneUlp))); - else { - OneUlp = U1; - X = -OneUlp; - } - } - /*=============================================*/ - Milestone = 85; - /*=============================================*/ - SqRWrng = False; - Anomaly = False; - RSqrt = Other; /* ~dgh */ - if (Radix != One) { - printf ("Testing whether sqrt is rounded or chopped.\n"); - D = FLOOR (Half + POW (Radix, One + Precision - FLOOR (Precision))); - /* ... == Radix^(1 + fract) if (Precision == Integer + fract. */ - X = D / Radix; - Y = D / A1; - if ((X != FLOOR (X)) || (Y != FLOOR (Y))) { - Anomaly = True; - } else { - X = Zero; - Z2 = X; - Y = One; - Y2 = Y; - Z1 = Radix - One; - FourD = Four * D; - do { - if (Y2 > Z2) { - Q = Radix; - Y1 = Y; - do { - X1 = FABS (Q + FLOOR (Half - Q / Y1) * Y1); - Q = Y1; - Y1 = X1; - } - while (!(X1 <= Zero)); - if (Q <= One) { - Z2 = Y2; - Z = Y; - } - } - Y = Y + Two; - X = X + Eight; - Y2 = Y2 + X; - if (Y2 >= FourD) - Y2 = Y2 - FourD; - } - while (!(Y >= D)); - X8 = FourD - Z2; - Q = (X8 + Z * Z) / FourD; - X8 = X8 / Eight; - if (Q != FLOOR (Q)) - Anomaly = True; - else { - Break = False; - do { - X = Z1 * Z; - X = X - FLOOR (X / Radix) * Radix; - if (X == One) - Break = True; - else - Z1 = Z1 - One; - } - while (!(Break || (Z1 <= Zero))); - if ((Z1 <= Zero) && (!Break)) - Anomaly = True; - else { - if (Z1 > RadixD2) - Z1 = Z1 - Radix; - do { - NewD (); - } - while (!(U2 * D >= F9)); - if (D * Radix - D != W - D) - Anomaly = True; - else { - Z2 = D; - I = 0; - Y = D + (One + Z) * Half; - X = D + Z + Q; - SR3750 (); - Y = D + (One - Z) * Half + D; - X = D - Z + D; - X = X + Q + X; - SR3750 (); - NewD (); - if (D - Z2 != W - Z2) - Anomaly = True; - else { - Y = (D - Z2) + (Z2 + (One - Z) * Half); - X = (D - Z2) + (Z2 - Z + Q); - SR3750 (); - Y = (One + Z) * Half; - X = Q; - SR3750 (); - if (I == 0) - Anomaly = True; - } - } - } - } - } - if ((I == 0) || Anomaly) { - BadCond (Failure, "Anomalous arithmetic with Integer < "); - printf ("Radix^Precision = %.7e\n", W); - printf (" fails test whether sqrt rounds or chops.\n"); - SqRWrng = True; - } - } - if (!Anomaly) { - if (!((MinSqEr < Zero) || (MaxSqEr > Zero))) { - RSqrt = Rounded; - printf ("Square root appears to be correctly rounded.\n"); - } else { - if ((MaxSqEr + U2 > U2 - Half) || (MinSqEr > Half) - || (MinSqEr + Radix < Half)) - SqRWrng = True; - else { - RSqrt = Chopped; - printf ("Square root appears to be chopped.\n"); - } - } - } - if (SqRWrng) { - printf ("Square root is neither chopped nor correctly rounded.\n"); - printf ("Observed errors run from %.7e ", MinSqEr - Half); - printf ("to %.7e ulps.\n", Half + MaxSqEr); - TstCond (Serious, MaxSqEr - MinSqEr < Radix * Radix, - "sqrt gets too many last digits wrong"); - } - /*=============================================*/ - Milestone = 90; - /*=============================================*/ - Pause (); - printf ("Testing powers Z^i for small Integers Z and i.\n"); - N = 0; - /* ... test powers of zero. */ - I = 0; - Z = -Zero; - M = 3; - Break = False; - do { - X = One; - SR3980 (); - if (I <= 10) { - I = 1023; - SR3980 (); - } - if (Z == MinusOne) - Break = True; - else { - Z = MinusOne; - /* .. if(-1)^N is invalid, replace MinusOne by One. */ - I = -4; - } - } - while (!Break); - PrintIfNPositive (); - N1 = N; - N = 0; - Z = A1; - M = (int) FLOOR (Two * LOG (W) / LOG (A1)); - Break = False; - do { - X = Z; - I = 1; - SR3980 (); - if (Z == AInvrse) - Break = True; - else - Z = AInvrse; - } - while (!(Break)); - /*=============================================*/ - Milestone = 100; - /*=============================================*/ - /* Powers of Radix have been tested, */ - /* next try a few primes */ - M = NoTrials; - Z = Three; - do { - X = Z; - I = 1; - SR3980 (); - do { - Z = Z + Two; - } - while (Three * FLOOR (Z / Three) == Z); - } - while (Z < Eight * Three); - if (N > 0) { - printf ("Errors like this may invalidate financial calculations\n"); - printf ("\tinvolving interest rates.\n"); - } - PrintIfNPositive (); - N += N1; - if (N == 0) - printf ("... no discrepancies found.\n"); - if (N > 0) - Pause (); - else - printf ("\n"); - /*=============================================*/ - Milestone = 110; - /*=============================================*/ - printf ("Seeking Underflow thresholds UfThold and E0.\n"); - D = U1; - if (Precision != FLOOR (Precision)) { - D = BInvrse; - X = Precision; - do { - D = D * BInvrse; - X = X - One; - } - while (X > Zero); - } - Y = One; - Z = D; - /* ... D is power of 1/Radix < 1. */ - do { - C = Y; - Y = Z; - Z = Y * Y; - } - while ((Y > Z) && (Z + Z > Z)); - Y = C; - Z = Y * D; - do { - C = Y; - Y = Z; - Z = Y * D; - } - while ((Y > Z) && (Z + Z > Z)); - if (Radix < Two) - HInvrse = Two; - else - HInvrse = Radix; - H = One / HInvrse; - /* ... 1/HInvrse == H == Min(1/Radix, 1/2) */ - CInvrse = One / C; - E0 = C; - Z = E0 * H; - /* ...1/Radix^(BIG Integer) << 1 << CInvrse == 1/C */ - do { - Y = E0; - E0 = Z; - Z = E0 * H; - } - while ((E0 > Z) && (Z + Z > Z)); - UfThold = E0; - E1 = Zero; - Q = Zero; - E9 = U2; - S = One + E9; - D = C * S; - if (D <= C) { - E9 = Radix * U2; - S = One + E9; - D = C * S; - if (D <= C) { - BadCond (Failure, "multiplication gets too many last digits wrong.\n"); - Underflow = E0; - Y1 = Zero; - PseudoZero = Z; - Pause (); - } - } else { - Underflow = D; - PseudoZero = Underflow * H; - UfThold = Zero; - do { - Y1 = Underflow; - Underflow = PseudoZero; - if (E1 + E1 <= E1) { - Y2 = Underflow * HInvrse; - E1 = FABS (Y1 - Y2); - Q = Y1; - if ((UfThold == Zero) && (Y1 != Y2)) - UfThold = Y1; - } - PseudoZero = PseudoZero * H; - } - while ((Underflow > PseudoZero) - && (PseudoZero + PseudoZero > PseudoZero)); - } - /* Comment line 4530 .. 4560 */ - if (PseudoZero != Zero) { - printf ("\n"); - Z = PseudoZero; - /* ... Test PseudoZero for "phoney- zero" violates */ - /* ... PseudoZero < Underflow or PseudoZero < PseudoZero + PseudoZero - ... */ - if (PseudoZero <= Zero) { - BadCond (Failure, "Positive expressions can underflow to an\n"); - printf ("allegedly negative value\n"); - printf ("PseudoZero that prints out as: %g .\n", PseudoZero); - X = -PseudoZero; - if (X <= Zero) { - printf ("But -PseudoZero, which should be\n"); - printf ("positive, isn't; it prints out as %g .\n", X); - } - } else { - BadCond (Flaw, "Underflow can stick at an allegedly positive\n"); - printf ("value PseudoZero that prints out as %g .\n", PseudoZero); - } - TstPtUf (); - } - /*=============================================*/ - Milestone = 120; - /*=============================================*/ - if (CInvrse * Y > CInvrse * Y1) { - S = H * S; - E0 = Underflow; - } - if (!((E1 == Zero) || (E1 == E0))) { - BadCond (Defect, ""); - if (E1 < E0) { - printf ("Products underflow at a higher"); - printf (" threshold than differences.\n"); - if (PseudoZero == Zero) - E0 = E1; - } else { - printf ("Difference underflows at a higher"); - printf (" threshold than products.\n"); - } - } - printf ("Smallest strictly positive number found is E0 = %g .\n", E0); - Z = E0; - TstPtUf (); - Underflow = E0; - if (N == 1) - Underflow = Y; - I = 4; - if (E1 == Zero) - I = 3; - if (UfThold == Zero) - I = I - 2; - UfNGrad = True; - switch (I) { - case 1: - UfThold = Underflow; - if ((CInvrse * Q) != ((CInvrse * Y) * S)) { - UfThold = Y; - BadCond (Failure, "Either accuracy deteriorates as numbers\n"); - printf ("approach a threshold = %.17e\n", UfThold);; - printf (" coming down from %.17e\n", C); - printf (" or else multiplication gets too many last digits wrong.\n"); - } - Pause (); - break; - - case 2: - BadCond (Failure, "Underflow confuses Comparison, which alleges that\n"); - printf ("Q == Y while denying that |Q - Y| == 0; these values\n"); - printf ("print out as Q = %.17e, Y = %.17e .\n", Q, Y2); - printf ("|Q - Y| = %.17e .\n", FABS (Q - Y2)); - UfThold = Q; - break; - - case 3: - X = X; - break; - - case 4: - if ((Q == UfThold) && (E1 == E0) - && (FABS (UfThold - E1 / E9) <= E1)) { - UfNGrad = False; - printf ("Underflow is gradual; it incurs Absolute Error =\n"); - printf ("(roundoff in UfThold) < E0.\n"); - Y = E0 * CInvrse; - Y = Y * (OneAndHalf + U2); - X = CInvrse * (One + U2); - Y = Y / X; - IEEE = (Y == E0); - } - } - if (UfNGrad) { - printf ("\n"); - sigsave = _sigfpe; - if (setjmp (ovfl_buf)) { - printf ("Underflow / UfThold failed!\n"); - R = H + H; - } else - R = SQRT (Underflow / UfThold); - sigsave = 0; - if (R <= H) { - Z = R * UfThold; - X = Z * (One + R * H * (One + H)); - } else { - Z = UfThold; - X = Z * (One + H * H * (One + H)); - } - if (!((X == Z) || (X - Z != Zero))) { - BadCond (Flaw, ""); - printf ("X = %.17e\n\tis not equal to Z = %.17e .\n", X, Z); - Z9 = X - Z; - printf ("yet X - Z yields %.17e .\n", Z9); - printf (" Should this NOT signal Underflow, "); - printf ("this is a SERIOUS DEFECT\nthat causes "); - printf ("confusion when innocent statements like\n");; - printf (" if (X == Z) ... else"); - printf (" ... (f(X) - f(Z)) / (X - Z) ...\n"); - printf ("encounter Division by Zero although actually\n"); - sigsave = _sigfpe; - if (setjmp (ovfl_buf)) - printf ("X / Z fails!\n"); - else - printf ("X / Z = 1 + %g .\n", (X / Z - Half) - Half); - sigsave = 0; - } - } - printf ("The Underflow threshold is %.17e, %s\n", UfThold, - " below which"); - printf ("calculation may suffer larger Relative error than "); - printf ("merely roundoff.\n"); - Y2 = U1 * U1; - Y = Y2 * Y2; - Y2 = Y * U1; - if (Y2 <= UfThold) { - if (Y > E0) { - BadCond (Defect, ""); - I = 5; - } else { - BadCond (Serious, ""); - I = 4; - } - printf ("Range is too narrow; U1^%d Underflows.\n", I); - } - /*=============================================*/ - Milestone = 130; - /*=============================================*/ - Y = -FLOOR (Half - TwoForty * LOG (UfThold) / LOG (HInvrse)) / TwoForty; - Y2 = Y + Y; - printf ("Since underflow occurs below the threshold\n"); - printf ("UfThold = (%.17e) ^ (%.17e)\nonly underflow ", HInvrse, Y); - printf ("should afflict the expression\n\t(%.17e) ^ (%.17e);\n", - HInvrse, Y2); - printf ("actually calculating yields:"); - if (setjmp (ovfl_buf)) { - sigsave = 0; - BadCond (Serious, "trap on underflow.\n"); - } else { - sigsave = _sigfpe; - V9 = POW (HInvrse, Y2); - sigsave = 0; - printf (" %.17e .\n", V9); - if (!((V9 >= Zero) && (V9 <= (Radix + Radix + E9) * UfThold))) { - BadCond (Serious, "this is not between 0 and underflow\n"); - printf (" threshold = %.17e .\n", UfThold); - } else if (!(V9 > UfThold * (One + E9))) - printf ("This computed value is O.K.\n"); - else { - BadCond (Defect, "this is not between 0 and underflow\n"); - printf (" threshold = %.17e .\n", UfThold); - } - } - /*=============================================*/ - Milestone = 140; - /*=============================================*/ - printf ("\n"); - /* ...calculate Exp2 == exp(2) == 7.389056099... */ - X = Zero; - I = 2; - Y = Two * Three; - Q = Zero; - N = 0; - do { - Z = X; - I = I + 1; - Y = Y / (I + I); - R = Y + Q; - X = Z + R; - Q = (Z - X) + R; - } - while (X > Z); - Z = (OneAndHalf + One / Eight) + X / (OneAndHalf * ThirtyTwo); - X = Z * Z; - Exp2 = X * X; - X = F9; - Y = X - U1; - printf ("Testing X^((X + 1) / (X - 1)) vs. exp(2) = %.17e as X -> 1.\n", - Exp2); - for (I = 1;;) { - Z = X - BInvrse; - Z = (X + One) / (Z - (One - BInvrse)); - Q = POW (X, Z) - Exp2; - if (FABS (Q) > TwoForty * U2) { - N = 1; - V9 = (X - BInvrse) - (One - BInvrse); - BadCond (Defect, "Calculated"); - printf (" %.17e for\n", POW (X, Z)); - printf ("\t(1 + (%.17e) ^ (%.17e);\n", V9, Z); - printf ("\tdiffers from correct value by %.17e .\n", Q); - printf ("\tThis much error may spoil financial\n"); - printf ("\tcalculations involving tiny interest rates.\n"); - break; - } else { - Z = (Y - X) * Two + Y; - X = Y; - Y = Z; - Z = One + (X - F9) * (X - F9); - if (Z > One && I < NoTrials) - I++; - else { - if (X > One) { - if (N == 0) - printf ("Accuracy seems adequate.\n"); - break; - } else { - X = One + U2; - Y = U2 + U2; - Y += X; - I = 1; - } - } - } - } - /*=============================================*/ - Milestone = 150; - /*=============================================*/ - printf ("Testing powers Z^Q at four nearly extreme values.\n"); - N = 0; - Z = A1; - Q = FLOOR (Half - LOG (C) / LOG (A1)); - Break = False; - do { - X = CInvrse; - Y = POW (Z, Q); - IsYeqX (); - Q = -Q; - X = C; - Y = POW (Z, Q); - IsYeqX (); - if (Z < One) - Break = True; - else - Z = AInvrse; - } - while (!(Break)); - PrintIfNPositive (); - if (N == 0) - printf (" ... no discrepancies found.\n"); - printf ("\n"); - - /*=============================================*/ - Milestone = 160; - /*=============================================*/ - Pause (); - printf ("Searching for Overflow threshold:\n"); - printf ("This may generate an error.\n"); - Y = -CInvrse; - V9 = HInvrse * Y; - sigsave = _sigfpe; - if (setjmp (ovfl_buf)) { - I = 0; - V9 = Y; - goto overflow; - } - do { - V = Y; - Y = V9; - V9 = HInvrse * Y; - } - while (V9 < Y); - I = 1; - overflow: - sigsave = 0; - Z = V9; - printf ("Can `Z = -Y' overflow?\n"); - printf ("Trying it on Y = %.17e .\n", Y); - V9 = -Y; - V0 = V9; - if (V - Y == V + V0) - printf ("Seems O.K.\n"); - else { - printf ("finds a "); - BadCond (Flaw, "-(-Y) differs from Y.\n"); - } - if (Z != Y) { - BadCond (Serious, ""); - printf ("overflow past %.17e\n\tshrinks to %.17e .\n", Y, Z); - } - if (I) { - Y = V * (HInvrse * U2 - HInvrse); - Z = Y + ((One - HInvrse) * U2) * V; - if (Z < V0) - Y = Z; - if (Y < V0) - V = Y; - if (V0 - V < V0) - V = V0; - } else { - V = Y * (HInvrse * U2 - HInvrse); - V = V + ((One - HInvrse) * U2) * Y; - } - printf ("Overflow threshold is V = %.17e .\n", V); - if (I) - printf ("Overflow saturates at V0 = %.17e .\n", V0); - else - printf ("There is no saturation value because \ -the system traps on overflow.\n"); - V9 = V * One; - printf ("No Overflow should be signaled for V * 1 = %.17e\n", V9); - V9 = V / One; - printf (" nor for V / 1 = %.17e .\n", V9); - printf ("Any overflow signal separating this * from the one\n"); - printf ("above is a DEFECT.\n"); - /*=============================================*/ - Milestone = 170; - /*=============================================*/ - if (!(-V < V && -V0 < V0 && -UfThold < V && UfThold < V)) { - BadCond (Failure, "Comparisons involving "); - printf ("+-%g, +-%g\nand +-%g are confused by Overflow.", - V, V0, UfThold); - } - /*=============================================*/ - Milestone = 175; - /*=============================================*/ - printf ("\n"); - for (Indx = 1; Indx <= 3; ++Indx) { - switch (Indx) { - case 1: - Z = UfThold; - break; - case 2: - Z = E0; - break; - case 3: - Z = PseudoZero; - break; - } - if (Z != Zero) { - V9 = SQRT (Z); - Y = V9 * V9; - if (Y / (One - Radix * E9) < Z - || Y > (One + Radix * E9) * Z) { /* dgh: + E9 --> * E9 */ - if (V9 > U1) - BadCond (Serious, ""); - else - BadCond (Defect, ""); - printf ("Comparison alleges that what prints as Z = %.17e\n", Z); - printf (" is too far from sqrt(Z) ^ 2 = %.17e .\n", Y); - } - } - } - /*=============================================*/ - Milestone = 180; - /*=============================================*/ - for (Indx = 1; Indx <= 2; ++Indx) { - if (Indx == 1) - Z = V; - else - Z = V0; - V9 = SQRT (Z); - X = (One - Radix * E9) * V9; - V9 = V9 * X; - if (((V9 < (One - Two * Radix * E9) * Z) || (V9 > Z))) { - Y = V9; - if (X < W) - BadCond (Serious, ""); - else - BadCond (Defect, ""); - printf ("Comparison alleges that Z = %17e\n", Z); - printf (" is too far from sqrt(Z) ^ 2 (%.17e) .\n", Y); - } - } - /*=============================================*/ - Milestone = 190; - /*=============================================*/ - Pause (); - X = UfThold * V; - Y = Radix * Radix; - if (X * Y < One || X > Y) { - if (X * Y < U1 || X > Y / U1) - BadCond (Defect, "Badly"); - else - BadCond (Flaw, ""); - - printf (" unbalanced range; UfThold * V = %.17e\n\t%s\n", - X, "is too far from 1.\n"); - } - /*=============================================*/ - Milestone = 200; - /*=============================================*/ - for (Indx = 1; Indx <= 5; ++Indx) { - X = F9; - switch (Indx) { - case 2: - X = One + U2; - break; - case 3: - X = V; - break; - case 4: - X = UfThold; - break; - case 5: - X = Radix; - } - Y = X; - sigsave = _sigfpe; - if (setjmp (ovfl_buf)) - printf (" X / X traps when X = %g\n", X); - else { - V9 = (Y / X - Half) - Half; - if (V9 == Zero) - continue; - if (V9 == -U1 && Indx < 5) - BadCond (Flaw, ""); - else - BadCond (Serious, ""); - printf (" X / X differs from 1 when X = %.17e\n", X); - printf (" instead, X / X - 1/2 - 1/2 = %.17e .\n", V9); - } - sigsave = 0; - } - /*=============================================*/ - Milestone = 210; - /*=============================================*/ - MyZero = Zero; - printf ("\n"); - printf ("What message and/or values does Division by Zero produce?\n"); -#ifndef BATCHMODE - printf ("This can interupt your program. You can "); - printf ("skip this part if you wish.\n"); - printf ("Do you wish to compute 1 / 0? "); - fflush (stdout); - read (KEYBOARD, ch, 8); - if ((ch[0] == 'Y') || (ch[0] == 'y')) { -#endif /* !BATCHMODE */ - sigsave = _sigfpe; - printf (" Trying to compute 1 / 0 produces ..."); - if (!setjmp (ovfl_buf)) - printf (" %.7e .\n", One / MyZero); - sigsave = 0; -#ifndef BATCHMODE - } else - printf ("O.K.\n"); - printf ("\nDo you wish to compute 0 / 0? "); - fflush (stdout); - read (KEYBOARD, ch, 80); - if ((ch[0] == 'Y') || (ch[0] == 'y')) { -#endif /* !BATCHMODE */ - sigsave = _sigfpe; - printf ("\n Trying to compute 0 / 0 produces ..."); - if (!setjmp (ovfl_buf)) - printf (" %.7e .\n", Zero / MyZero); - sigsave = 0; -#ifndef BATCHMODE - } else - printf ("O.K.\n"); -#endif /* !BATCHMODE */ - /*=============================================*/ - Milestone = 220; - /*=============================================*/ - - Pause (); - printf ("\n"); - { - static char *msg[] = - { - "FAILUREs encountered =", - "SERIOUS DEFECTs discovered =", - "DEFECTs discovered =", - "FLAWs discovered ="}; - int i; - for (i = 0; i < 4; i++) - if (ErrCnt[i]) - printf ("The number of %-29s %d.\n", - msg[i], ErrCnt[i]); - } - - printf ("\n"); - if ((ErrCnt[Failure] + ErrCnt[Serious] + ErrCnt[Defect] - + ErrCnt[Flaw]) > 0) { - if ((ErrCnt[Failure] + ErrCnt[Serious] + ErrCnt[ - Defect] == 0) && (ErrCnt[Flaw] > 0)) { - printf ("The arithmetic diagnosed seems "); - printf ("Satisfactory though flawed.\n"); - } - if ((ErrCnt[Failure] + ErrCnt[Serious] == 0) - && (ErrCnt[Defect] > 0)) { - printf ("The arithmetic diagnosed may be Acceptable\n"); - printf ("despite inconvenient Defects.\n"); - } - if ((ErrCnt[Failure] + ErrCnt[Serious]) > 0) { - printf ("The arithmetic diagnosed has "); - printf ("unacceptable Serious Defects.\n"); - } - if (ErrCnt[Failure] > 0) { - printf ("Potentially fatal FAILURE may have spoiled this"); - printf (" program's subsequent diagnoses.\n"); - } - } else { - - printf ("No failures, defects nor flaws have been discovered.\n"); - if (!((RMult == Rounded) && (RDiv == Rounded) - && (RAddSub == Rounded) && (RSqrt == Rounded))) - printf ("The arithmetic diagnosed seems Satisfactory.\n"); - else { - if (StickyBit >= One && - (Radix - Two) * (Radix - Nine - One) == Zero) { - printf ("Rounding appears to conform to "); - printf ("the proposed IEEE standard P"); - if ((Radix == Two) && - ((Precision - Four * Three * Two) * - (Precision - TwentySeven - - TwentySeven + One) == Zero)) - printf ("754"); - else - printf ("854"); - if (IEEE) - printf (".\n"); - else { - printf (",\nexcept for possibly Double Rounding"); - printf (" during Gradual Underflow.\n"); - } - } - printf ("The arithmetic diagnosed appears to be Excellent!\n"); - } - } - - if (fpecount) - printf ("\nA total of %d floating point exceptions were registered.\n", - fpecount); - printf ("END OF TEST.\n"); - return 0; -} - -FLOAT -Sign (X) - FLOAT X; -{ - return X >= 0. ? 1.0 : -1.0; -} - -void -Pause () -{ -#ifndef BATCHMODE - char ch[8]; - - printf ("\nTo continue, press RETURN"); - fflush (stdout); - read (KEYBOARD, ch, 8); -#endif /* !BATCHMODE */ -#ifndef CYGNUS - printf ("\nDiagnosis resumes after milestone Number %d", Milestone); - printf (" Page: %d\n\n", PageNo); - ++Milestone; - ++PageNo; -#endif /* !CYGNUS */ -} - -void -TstCond (K, Valid, T) - int K, Valid; - char *T; -{ -#ifdef CYGNUS - printf ("TEST: %s\n", T); -#endif /* CYGNUS */ - if (!Valid) { - BadCond (K, T); - printf (".\n"); - } -#ifdef CYGNUS - printf ("PASS: %s\n", T); -#endif /* CYGNUS */ -} - -void -BadCond (K, T) - int K; - char *T; -{ - static char *msg[] = - {"FAILURE", "SERIOUS DEFECT", "DEFECT", "FLAW"}; - - ErrCnt[K] = ErrCnt[K] + 1; -#ifndef CYGNUS - printf ("%s: %s", msg[K], T); -#else - printf ("ERROR: Severity: %s: %s", msg[K], T); -#endif /* CYGNUS */ -} - -/* - * Random computes - * X = (Random1 + Random9)^5 - * Random1 = X - FLOOR(X) + 0.000005 * X; - * and returns the new value of Random1 -*/ -FLOAT -Random () -{ - FLOAT X, Y; - - X = Random1 + Random9; - Y = X * X; - Y = Y * Y; - X = X * Y; - Y = X - FLOOR (X); - Random1 = Y + X * 0.000005; - return (Random1); -} - -void -SqXMinX (ErrKind) - int ErrKind; -{ - FLOAT XA, XB; - - XB = X * BInvrse; - XA = X - XB; - SqEr = ((SQRT (X * X) - XB) - XA) / OneUlp; - if (SqEr != Zero) { - if (SqEr < MinSqEr) - MinSqEr = SqEr; - if (SqEr > MaxSqEr) - MaxSqEr = SqEr; - J = J + 1.0; - BadCond (ErrKind, "\n"); - printf ("sqrt( %.17e) - %.17e = %.17e\n", X * X, X, OneUlp * SqEr); - printf ("\tinstead of correct value 0 .\n"); - } -} - -void -NewD () -{ - X = Z1 * Q; - X = FLOOR (Half - X / Radix) * Radix + X; - Q = (Q - X * Z) / Radix + X * X * (D / Radix); - Z = Z - Two * X * D; - if (Z <= Zero) { - Z = -Z; - Z1 = -Z1; - } - D = Radix * D; -} - -void -SR3750 () -{ - if (!((X - Radix < Z2 - Radix) || (X - Z2 > W - Z2))) { - I = I + 1; - X2 = SQRT (X * D); - Y2 = (X2 - Z2) - (Y - Z2); - X2 = X8 / (Y - Half); - X2 = X2 - Half * X2 * X2; - SqEr = (Y2 + Half) + (Half - X2); - if (SqEr < MinSqEr) - MinSqEr = SqEr; - SqEr = Y2 - X2; - if (SqEr > MaxSqEr) - MaxSqEr = SqEr; - } -} - -void -IsYeqX () -{ - if (Y != X) { - if (N <= 0) { - if (Z == Zero && Q <= Zero) - printf ("WARNING: computing\n"); - else - BadCond (Defect, "computing\n"); - printf ("\t(%.17e) ^ (%.17e)\n", Z, Q); - printf ("\tyielded %.17e;\n", Y); - printf ("\twhich compared unequal to correct %.17e ;\n", - X); - printf ("\t\tthey differ by %.17e .\n", Y - X); - } - N = N + 1; /* ... count discrepancies. */ - } -} - -void -SR3980 () -{ - do { - Q = (FLOAT) I; - Y = POW (Z, Q); - IsYeqX (); - if (++I > M) - break; - X = Z * X; - } - while (X < W); -} - -void -PrintIfNPositive () -{ - if (N > 0) - printf ("Similar discrepancies have occurred %d times.\n", N); -} - -void -TstPtUf () -{ - N = 0; - if (Z != Zero) { - printf ("Since comparison denies Z = 0, evaluating "); - printf ("(Z + Z) / Z should be safe.\n"); - sigsave = _sigfpe; - if (setjmp (ovfl_buf)) - goto very_serious; - Q9 = (Z + Z) / Z; - printf ("What the machine gets for (Z + Z) / Z is %.17e .\n", - Q9); - if (FABS (Q9 - Two) < Radix * U2) { - printf ("This is O.K., provided Over/Underflow"); - printf (" has NOT just been signaled.\n"); - } else { - if ((Q9 < One) || (Q9 > Two)) { - very_serious: - N = 1; - ErrCnt[Serious] = ErrCnt[Serious] + 1; - printf ("This is a VERY SERIOUS DEFECT!\n"); - } else { - N = 1; - ErrCnt[Defect] = ErrCnt[Defect] + 1; - printf ("This is a DEFECT!\n"); - } - } - sigsave = 0; - V9 = Z * One; - Random1 = V9; - V9 = One * Z; - Random2 = V9; - V9 = Z / One; - if ((Z == Random1) && (Z == Random2) && (Z == V9)) { - if (N > 0) - Pause (); - } else { - N = 1; - BadCond (Defect, "What prints as Z = "); - printf ("%.17e\n\tcompares different from ", Z); - if (Z != Random1) - printf ("Z * 1 = %.17e ", Random1); - if (!((Z == Random2) - || (Random2 == Random1))) - printf ("1 * Z == %g\n", Random2); - if (!(Z == V9)) - printf ("Z / 1 = %.17e\n", V9); - if (Random2 != Random1) { - ErrCnt[Defect] = ErrCnt[Defect] + 1; - BadCond (Defect, "Multiplication does not commute!\n"); - printf ("\tComparison alleges that 1 * Z = %.17e\n", - Random2); - printf ("\tdiffers from Z * 1 = %.17e\n", Random1); - } - Pause (); - } - } -} - -void -notify (s) - char *s; -{ - printf ("%s test appears to be inconsistent...\n", s); - printf (" PLEASE NOTIFY KARPINKSI!\n"); -} - -void -msglist (s) - char **s; -{ - while (*s) - printf ("%s\n", *s++); -} - -void -Instructions () -{ - static char *instr[] = - { - "Lest this program stop prematurely, i.e. before displaying\n", - " `END OF TEST',\n", - "try to persuade the computer NOT to terminate execution when an", - "error like Over/Underflow or Division by Zero occurs, but rather", - "to persevere with a surrogate value after, perhaps, displaying some", - "warning. If persuasion avails naught, don't despair but run this", - "program anyway to see how many milestones it passes, and then", - "amend it to make further progress.\n", - "Answer questions with Y, y, N or n (unless otherwise indicated).\n", - 0}; - - msglist (instr); -} - -void -Heading () -{ - static char *head[] = - { - "Users are invited to help debug and augment this program so it will", - "cope with unanticipated and newly uncovered arithmetic pathologies.\n", - "Please send suggestions and interesting results to", - "\tRichard Karpinski", - "\tComputer Center U-76", - "\tUniversity of California", - "\tSan Francisco, CA 94143-0704, USA\n", - "In doing so, please include the following information:", -#ifdef SINGLE_PRECISION - "\tPrecision:\tsingle;", -#else /* !SINGLE_PRECISION */ - "\tPrecision:\tdouble;", -#endif /* SINGLE_PRECISION */ - "\tVersion:\t10 February 1989;", - "\tComputer:\n", - "\tCompiler:\n", - "\tOptimization level:\n", - "\tOther relevant compiler options:", - 0}; - - msglist (head); -} - -void -Characteristics () -{ - static char *chars[] = - { - "Running this program should reveal these characteristics:", - " Radix = 1, 2, 4, 8, 10, 16, 100, 256 ...", - " Precision = number of significant digits carried.", - " U2 = Radix/Radix^Precision = One Ulp", - "\t(OneUlpnit in the Last Place) of 1.000xxx .", - " U1 = 1/Radix^Precision = One Ulp of numbers a little less than 1.0 .", - " Adequacy of guard digits for Mult., Div. and Subt.", - " Whether arithmetic is chopped, correctly rounded, or something else", - "\tfor Mult., Div., Add/Subt. and Sqrt.", - " Whether a Sticky Bit used correctly for rounding.", - " UnderflowThreshold = an underflow threshold.", - " E0 and PseudoZero tell whether underflow is abrupt, gradual, or fuzzy.", - " V = an overflow threshold, roughly.", - " V0 tells, roughly, whether Infinity is represented.", - " Comparisions are checked for consistency with subtraction", - "\tand for contamination with pseudo-zeros.", - " Sqrt is tested. Y^X is not tested.", - " Extra-precise subexpressions are revealed but NOT YET tested.", - " Decimal-Binary conversion is NOT YET tested for accuracy.", - 0}; - - msglist (chars); -} - -void -History () -{ /* History */ - /* Converted from Brian Wichmann's Pascal version to C by Thos Sumner, - with further massaging by David M. Gay. */ - - static char *hist[] = - { - "The program attempts to discriminate among", - " FLAWs, like lack of a sticky bit,", - " Serious DEFECTs, like lack of a guard digit, and", - " FAILUREs, like 2+2 == 5 .", - "Failures may confound subsequent diagnoses.\n", - "The diagnostic capabilities of this program go beyond an earlier", - "program called `MACHAR', which can be found at the end of the", - "book `Software Manual for the Elementary Functions' (1980) by", - "W. J. Cody and W. Waite. Although both programs try to discover", - "the Radix, Precision and range (over/underflow thresholds)", - "of the arithmetic, this program tries to cope with a wider variety", - "of pathologies, and to say how well the arithmetic is implemented.", - "\nThe program is based upon a conventional radix representation for", - "floating-point numbers, but also allows logarithmic encoding", - "as used by certain early WANG machines.\n", - "BASIC version of this program (C) 1983 by Prof. W. M. Kahan;", - "see source comments for more history.", - 0}; - - msglist (hist); -} diff --git a/lib/CPUs/MIPS/bsp/examples/phrasen.c b/lib/CPUs/MIPS/bsp/examples/phrasen.c deleted file mode 100644 index 08abf97..0000000 --- a/lib/CPUs/MIPS/bsp/examples/phrasen.c +++ /dev/null @@ -1,298 +0,0 @@ -#include -#include -#include "libsys.h" - -struct substantive -{ - char *subst; - int sex; -}; - -struct verben -{ - char *verb_k; - char *verb_gr; - int art; -}; - -struct adjektive -{ - char *adj; -}; - - char *art[4]={"er","ie","as","en"}; - -char getch(void) -{ - return _getchar(); -} - -void randomize(void) -{ - srand(clock()); -} - -struct substantive namen[]= -{ - {"Gerhard Schröder",1},{"Helmut Kohl",1},{"Rudolf Scharping",1}, - {"Claudia Nolte",2}, {"Johannes Rau",1},{"Wolfgang Schäuble",1}, - {"Joschka Fischer",1},{"Toni Blair",1},{"Kleopatra",2}, - {"Claudia Schiffer",2},{"Hannelore Kohl",2},{"Konrad Adenauer",1}, - {"Michael Jackson",1},{"Karl Marx",1}, {"Helmut Kohl",1},{"Heino",1}, - {"Gerhard Schröder",1},{"Donald Duck",1},{"Madonna",2},{"Jesus",1}, - {"Gott",1},{"Sheryl Crow",2},{"Verona Feldbusch",2},{"Pipi Langstrumpf",2}, - {"Bill Gates",1},{"Bill Clinton",1},{"Cleopatra",2},{"Winnetou",1}, - {"Käpt'n Blaubär",1},{"Rita Süssmuth",2},{"Boris Becker",1}, - {"Lilo Wanders",2},{"Queen Elizabeth",2},{"Lady Di",2},{"Steffi Graf",2}, - {"Frank Zappa",1},{"Dolly Buster",2},{"Mao Tse Tung",1},{"Ghandi",1}, - {"Dalai Lama",1},{"Teufel",1},{"Lenin",1},{"Edmund Stoiber",1}, - {"Ludwig van Beethoven",1},{"Wolfgang Amadeus Mozart",1}, - {"Richard Wagner",1},{"Erich Honecker",1},{"Adam Riese",1}, - {"Bill Clinton",1},{"Josef Stalin",1},{"Willy Brandt",1}, - {"John F. Kennedy",1},{"E.T.",1},{"Donald Duck",1},{"Lothar Matthäus",1}, - {"Hans Dietrich Genscher",1},{"Franz Josef Strauss",1},{"Sting",1}, - {"Hermann Hesse",1},{"Albert Einstein",1},{"Max Planck",1}, - {"Tom Jones",1},{"Heidi Kabel",2},{"Homer Simpson",1},{"Zeus",1}, - {"Helmut Schmidt",1},{"Antje Vollmer",2},{"Politiker",1},{"Papst",1}, - {"Bundeskanzler",1},{"Arzt",1},{"Friseuse",2},{"Teufel",1}, - {"Sandmännchen",3},{"Mutter",2},{"Vater",1},{"Säufer",1},{"Student",1}, - {"Bauer",1},{"Leiche",2},{"Polizist",1},{"Patientin",2},{"Bäcker",1}, - {"Wirt",1}, {"Schlachter",1},{"Baby",3},{"Reporter",1},{"Politiker",1}, - {"Beamtin",2},{"Oma",2},{"Putzfrau",2},{"Blinde",2},{"Wahnsinnige",2}, - {"Mörder",1},{"Psychiater",1},{"Prinz Charles",1},{"Onkel",1},{"Tante",2} -}; - -struct substantive sachen[]= -{ - {"Haus",3},{"Buch",3},{"Fahrrad",3},{"Schule",2},{"Auto",3},{"Nase",2}, - {"Mund",1},{"Kopf",1},{"Kaffee",1},{"Telephon",3},{"Tasse",2},{"Katze",2}, - {"Hund",1},{"Maus",2},{"Stuhl",1},{"Mann",1},{"Frau",2},{"Kind",3}, - {"Idiotin",2},{"Lampe",2},{"Panzer",1},{"Klavier",3},{"Gitarre",2}, - {"Straße",2},{"Wasser",3},{"Luft",2},{"Feuer",3},{"Erde",2},{"Mond",1}, - {"Sonne",2},{"Bild",3},{"Stadt",2},{"Land",3},{"Fluss",1}, - {"Bundeskanzler",1},{"Ball",1},{"Hut",1},{"Hose",2},{"Hemd",3},{"Tod",1}, - {"Geld",3},{"Tisch",1},{"Hand",2},{"Baum",1},{"Bier",3},{"Ratte",2}, - {"Esel",1},{"Musik",2},{"Blech",3},{"Dose",2},{"Zahn",1},{"Humor",1}, - {"Unterhose",2},{"Gift",3},{"Gesicht",3},{"Fuß",1},{"Auge",3},{"Warze",2}, - {"Ohr",3},{"Kanone",2},{"Milch",2},{"Messer",3},{"Papier",3},{"Haar",3}, - {"Welt",2},{"Motor",1},{"Langeweile",2},{"Grab",3},{"Schnaps",1}, - {"Vogel",1},{"Fisch",1},{"Meer",3},{"Banane",2},{"Brot",3}, - {"Sitzung",2},{"Labor",3},{"Kurzschluß",1},{"Lüge",2},{"Axt",2}, - {"Abstimmung",2},{"Toilette",2},{"Zigarette",2},{"Winter",1}, - {"Torte",2},{"Bahnhof",1},{"Sarg",1},{"Imbiss",1},{"Mund",1},{"Seife",2}, - {"Fernseher",1},{"Flasche",2},{"Eimer",1},{"Uhr",2},{"Irrenhaus",3}, - {"Wüste",2},{"Klumpen",1},{"Glück",3},{"Schiff",3},{"Käse",1},{"Quark",1}, - {"Sommer",1},{"Witz",1},{"Idee",2},{"Nacht",2},{"Dreck",1},{"Meer",3}, - {"Blut",3},{"Herz",3},{"Apfel",1},{"Banane",2},{"Mist",1},{"Atom",3}, - {"Note",2},{"Gehirn",3},{"Gefühl",3},{"Bombe",2},{"Vakuum",3}, - {"Zahl",2},{"Wort",3},{"Programm",3},{"Computer",1},{"Orient",1}, - {"Gabelstapler",1} -}; - -struct adjektive ad[]= -{ - {"schön"},{"doof"},{"gut"},{"schlecht"},{"gelb"},{"grün"},{"rot"}, - {"blau"},{"schnell"},{"lang"},{"kurz"},{"hell"},{"düster"},{"sanft"}, - {"hart"},{"langsam"},{"bitter"},{"süß"},{"kaputt"},{"nett"},{"groß"}, - {"klein"},{"leicht"},{"schwer"},{"dick"},{"dünn"},{"rund"},{"eckig"}, - {"heiß"},{"kalt"},{"schlau"},{"elektrisch"},{"nass"},{"trocken"},{"ratlos"}, - {"abartig"},{"genial"},{"bestechlich"},{"irr"},{"steif"},{"angespannt"}, - {"laut"},{"leis"},{"warm"},{"wütend"},{"sauber"},{"schmutzig"},{"arm"}, - {"ätzend"},{"langweilig"},{"interessant"},{"erfahren"},{"abgewählt"}, - {"durchgeknallt"},{"angenehm"},{"widerwärtig"},{"willig"},{"mutig"}, - {"schwach"},{"stark"},{"nervend"},{"spießig"},{"alt"},{"neu"},{"spitz"}, - {"stumpf"},{"teuflisch"},{"scharf"},{"lecker"},{"übelriechend"},{"halb"}, - {"ganz"},{"bleich"},{"peinlich"},{"taktlos"},{"gewieft"},{"windig"}, - {"größenwahnsinnig"},{"verrückt"},{"uralt"},{"aalglatt"},{"korrekt"}, - {"kompetent"},{"einfühlsam"},{"tot"},{"schleimig"},{"gestört"},{"hohl"}, - {"beknackt"},{"nackt"},{"barfüßig"},{"schwitzend"},{"laufend"},{"knackig"}, - {"unverschämt"},{"schläfrig"},{"wohlgeformt"},{"kugelförmig"},{"rauh"}, - {"degeneriert"},{"ekelhaft"},{"brutal"},{"gemein"},{"aggressiv"}, - {"aufdringlich"},{"betroffen"},{"geliebt"},{"gehasst"},{"beharrlich"}, - {"unmenschlich"},{"verblödet"},{"wichtig"},{"gigantisch"},{"winzig"}, - {"witzig"},{"komisch"},{"pervers"},{"fett"},{"stinkend"},{"lausig"}, - {"wendig"},{"breit"},{"locker"},{"einzigartig"},{"sterbend"},{"munter"}, - {"ungepflegt"},{"eisern"},{"echt"},{"besser"},{"wild"},{"ächzend"}, - {"frohlockend"},{"unscheinbar"},{"nebulös"},{"skandalös"},{"obzön"}, - {"beschränkt"},{"genervt"},{"hilflos"},{"unwürdig"},{"geleckt"}, - {"betrunken"},{"unwürdig"},{"bissig"},{"verkalkt"},{"senil"}, - {"jungfräulich"},{"ausgeleiert"},{"beleibt"},{"nachtragend"},{"errötend"}, - {"kahl"},{"würgend"},{"abwesend"},{"ruhig"},{"albern"},{"trostlos"}, - {"salzig"},{"lachend"},{"merkwürdig"},{"behaart"},{"leblos"},{"aufgeblasen"}, - {"frech"},{"kopflos"},{"schmierig"} -}; - -struct verben verb[]= -{ - {"geht","gehen",6},{"steht","stehen",2},{"sitzt","sitzen",2}, - {"spielt","spielen",7},{"singt","singen",2},{"trinkt","trinken",3}, - {"redet","reden",2}, {"liebt","lieben",7},{"schläft","schlafen",2}, - {"ißt","essen",3},{"lacht","lachen",2},{"tötet","töten",7}, - {"lügt","lügen",2},{"fliegt","fliegen",2},{"überfährt","überfahren",7}, - {"sieht","sehen",3},{"hört","hören",3},{"spricht","sprechen",2}, - {"berechnet","rechnen",3},{"schwimmt","schwimmen",2}, - {"zerschneidet","zerschnitten werden",3},{"raucht","rauchen",3}, - {"spaltet","spalten",3},{"verbrennt","verbrennen",2},{"ist","sein",2}, - {"hat","haben",1},{"zerbricht","zerbrechen",3},{"muss","müssen",4}, - {"kann","können",4},{"darf","dürfen",4},{"will","wollen",5}, - {"klaut","klauen",1},{"soll","sollen",4},{"studiert","studieren",3}, - {"reibt","reiben",3},{"liest","lesen",2},{"irrt","irren",2}, - {"spendiert","spendieren",1},{"schlägt","schlagen",3},{"fragt","fragen",7}, - {"zerstört","zerstören",1},{"erschießt","sich erschießen",1}, - {"überlegt","überlegen",2},{"trifft","treffen",7},{"leckt","lecken",1}, - {"wirft","werfen",1},{"vergiftet","vergiftet werden",1}, - {"öffnet","öffnen",1},{"schreit","schreien",2},{"sprengt","explodieren",3}, - {"erwürgt","würgen",7},{"arbeitet","arbeiten",2},{"erlegt","erlegen",1}, - {"putzt","putzen",1},{"stirbt","sterben",2}, {"kauft","kaufen",1}, - {"brüllt","brüllen",2},{"versteht","es verstehen",7}, - {"zertritt","zertreten werden",1},{"verendet","verenden",2}, - {"labert","labern",2},{"kratzt","kratzen",1},{"wird","nichts werden",2}, - {"entkleidet","sich entkleiden",7},{"verbiegt","sich verbiegen",1}, - {"verschenkt","es verschenken",7},{"vergisst","es vergessen",1}, - {"ergreift","greifen",1},{"baut","bauen",1},{"betet","beten",}, - {"rollt","rollen",3},{"bleibt","bleiben",2},{"wäscht","sich waschen",1}, - {"heiratet","heiraten",7},{"hebt","heben",1},{"denkt","nachdenken",2} -}; - -void end_sach_aus(void); -void nam_aus(void); -void end_nam_aus(void); -void adj_aus(void); -int verb_aus_k(void); -int verb_aus_gr(void); -int zufall(int); - -int main() -{ - int vindx; - int rem=0; - char end; - - setbuf(stdout, NULL); - randomize(); - printf("\n\t\t************************"); - printf("\n\t\t* DER ELEKTRISCHE POET *"); - printf("\n\t\t************************\n"); - printf("\n\tCopyright by J. Ahrensfeld & T. Burr"); - printf("\n\n\tFür die Texte ist Ihr Computer verantwortlich :-)\n"); - printf("\n\tZum beenden des Programmes 'x' eingeben!\n"); - printf("\n\tWeiter mit beliebiger Taste!\n"); - end = getch(); - - while(end != 'x') - { - if(rem >= 10) - { - printf("\n\n\tZum beenden des Programmes 'x' eingeben!\n"); - rem = 0; - if(getch() == 'x') - break; - } - printf("\n\n"); - nam_aus(); - - vindx=verb_aus_k(); - - switch (vindx) - { - case 1: end_sach_aus(); break; - - case 2: adj_aus(); break; - - case 3: end_sach_aus(); break; - - case 4: verb_aus_gr(); break; - - case 5: verb_aus_gr(); break; - - case 6: adj_aus(); break; - - case 7: end_nam_aus(); break; - } - - printf("."); - end = getch(); - rem++; - - } - printf("\n\n\tDas ist das Ende!"); - return 0; -} - -int zufall(int max) -{ - - return (rand()%max); -} - -void adj_aus(void) -{ - printf("%s", ad[zufall((sizeof(ad)/sizeof(*ad)))].adj); - return; -} - -void end_sach_aus(void) -{ - int index; - - index = zufall(sizeof(sachen)/sizeof(*sachen)); - if (sachen[index].sex==1) - printf("d%s", art[3]); - else - printf("d%s", art[(sachen[index].sex)-1]); - printf(" "); - adj_aus(); - if (sachen[index].sex==1) - printf("en %s", sachen[index].subst); - else - printf("e %s", sachen[index].subst); - return; -} - -void nam_aus(void) -{ - int index; - - index = zufall(sizeof(namen)/sizeof(*namen)); - printf("D%s", art[(namen[index].sex)-1]); - printf(" "); - adj_aus(); - printf("e %s " ,namen[index].subst); - return; -} - -void end_nam_aus(void) -{ - int index; - - index = zufall(sizeof(namen)/sizeof(*namen)); - if (namen[index].sex==1) - printf("d%s", art[3]); - else - printf("d%s", art[(namen[index].sex)-1]); - printf(" "); - adj_aus(); - if (namen[index].sex==1) - printf("en %s", namen[index].subst); - else - printf("e %s", namen[index].subst); - return; -} - -int verb_aus_k(void) -{ - int index; - - index = zufall(sizeof(verb)/sizeof(*verb)); - printf("%s ", verb[index].verb_k); - return (verb[index].art); -} - -int verb_aus_gr(void) -{ - int index; - - index = zufall(sizeof(verb)/sizeof(*verb)); - printf("%s", verb[index].verb_gr); - return index; -} diff --git a/lib/CPUs/MIPS/bsp/examples/pi.h b/lib/CPUs/MIPS/bsp/examples/pi.h deleted file mode 100644 index 5cfed9b..0000000 --- a/lib/CPUs/MIPS/bsp/examples/pi.h +++ /dev/null @@ -1,13 +0,0 @@ -/* +++Date last modified: 05-Jul-1997 */ - -#ifndef PI__H -#define PI__H - -#ifndef PI - #define PI (4*atan(1)) -#endif - -#define deg2rad(d) ((d)*PI/180) -#define rad2deg(r) ((r)*180/PI) - -#endif /* PI__H */ diff --git a/lib/CPUs/MIPS/bsp/examples/queens.c b/lib/CPUs/MIPS/bsp/examples/queens.c deleted file mode 100644 index f9735e6..0000000 --- a/lib/CPUs/MIPS/bsp/examples/queens.c +++ /dev/null @@ -1,856 +0,0 @@ -/* -** Queens.c -- Find solutions to the Eight-Queens chess problem. -** Roberto Sierra 7/25/93 Version 1.1 -** 3/19/84 Version 1.0 -** -** Description: -** This program finds all the possible ways that N queens can -** be placed on an NxN chessboard so that the queens cannot -** capture one another -- that is, so that no rank, file or -** diagonal is occupied by more than one queen. By default, -** the program prints the first solution it finds. You can -** use the -a option to print all solutions, or the -c option -** just to count them. The program allows the chess board -** to be from 1x1 (trivial case) to 100x100. Warning: the -** larger the chess board, the longer it typically takes to -** find each solution, even though there may be more of them. -** -** This is a terrific example of the utility of recursion. The -** algorithm uses recursion to drastically limit the number -** of board positions that are tested. The program is able -** to find all 8x8 queen solutions in a fraction of a second -** (not counting print time). The code makes no attempt to -** eliminate symmetrical solutions, so the number of solutions -** reported will always be higher than the actual number of -** distinct solutions. -** -** -** Usage: -** Queens [-ac] n -** -** n number of queens (rows and columns). -** An integer from 1 to 100. -** -a Find (and print) all solutions. -** -c Count all solutions, but do not print them. -** -** The output is sent to stdout. All errors messages are -** sent to stderr. If a problem arises, the return code is -1. -** -** -** Examples: -** -** Queens 8 ## Show an 8x8 solution -** 8 queens on a 8x8 board... -** Q - - - - - - - -** - - - - Q - - - -** - - - - - - - Q -** - - - - - Q - - -** - - Q - - - - - -** - - - - - - Q - -** - Q - - - - - - -** - - - Q - - - - -** -** Queens -c 8 ## Count all 8x8 solutions -** 8 queens on a 8x8 board... -** ...there are 92 solutions. -** -** Queens -a 4 ## Show all 4x4 solutions -** 4 queens on a 4x4 board... -** -** Solution #1: -** - Q - - -** - - - Q -** Q - - - -** - - Q - -** -** Solution #2: -** - - Q - -** Q - - - -** - - - Q -** - Q - - -** -** ...there are 2 solutions. -** -** -** Build Instructions: -** You'll need an ANSI C compiler (or the willingness to edit -** the program a bit). If you've got Gnu C, then you can -** compile and load the program as follows: -** -** gcc Queens.c -ansi -o Queens -** -** [If you're using MPW on the Mac, define '-d MPW' on the -** compile line so that background processing will occur.] -** -** -** Algorithm: -** In a 1984 Byte article, I ran across an interesting letter -** from a high school student who was attempting to solve the -** Eight Queens problem using a BASIC interpreter. He had -** developed a program which placed eight queens successively -** on all sixty-four squares, testing for conflicts at each -** iteration. Of course, such a program would require 64^8 -** iterations (about 2.8x10^14 iterations). Even in C on a, -** fast CPU, this could take months or years. Byte's answer was -** to alter the loops so that the queens resided on separate -** ranks, thereby reducing the number of iterations required -** to find all solutions to 8^8 iterations (about 16 million). -** More reasonable, but still requiring a chunk of CPU time. -** -** I puzzled about this problem a bit, and came to realize that -** this was still wasting a lot of CPU cycles. Though I'm sure -** others have come up with good algorithms, I decided to come -** up with my own, with a particular eye on efficiency. The -** resulting algorithm finds all 8x8 solutions in a fraction -** of a second (there are 92 solutions, including rotations). -** On a Sun 4, it'll find all 365,596 solutions on a 14x14 board -** in a bit over 2 minutes (printing them out requires extra -** time, of course). Even Byte's solution would require 14^14 -** iterations (about 10^16) which would take aeons. -** -** My algorithm works as follows: -** (1) Place a queen in the top left corner. -** (2) Place another queen immediately below. -** (3) Test for conflicts. If the second queen conflicts (it -** does at first), then move it one square to the right. -** (4) Loop step 3 until there are no conflicts. Place -** the next queen on the board and recurse. -** (5) If any queen reaches the right edge of the board, -** remove it and 'pop' to the previous recursion level. -** (6) Now repeat these steps recursively until all eight -** queens (or however many) have been placed without -** conflict -- the result is a solution to the problem, -** which is counted and optionally printed. -** -** Because conflicts are tested as the recursion proceeds, -** this has the effect of 'pruning' the recursion so that -** a large number of board positions are not even attempted. -** The result is that the algorithm runs in reasonable time. -** -** I used a few tricks to make the test-for-conflict code -** extremely efficient -- there is no 'inner' loop to search -** along ranks, files, or diagonals. A series of arrays are -** maintained instead which indicate which queen currently -** 'owns' each rank, file or diagonal. This makes the -** algorithm really fly, though the code is a little hard to -** read. Lastly, pointer arithmetic is used to reduce the -** number of implicit multiplications used in array addressing. -** -** -** Contact: -** For queries regarding this program, contact Roberto Sierra -** at any of the following addresses: -** -** Roberto Sierra -** bert@netcom.com (preferred address) -** 73557.2101@compuserve.com -** -** Tempered MicroDesigns -** P.O. Box 170638 -** San Francisco, CA 94117 -** -** -** Fine Print: -** This program is in the public domain and can be used for -** any purpose whatsoever, including commercial application. -** [I'd like to hear what you do with it, though.] -** Absolutely no warranty or liability is implied or extended -** by the author. -** -** -** Modification History: -** PRS 3/19/84 v1.0 -- Original version. -** PRS 7/25/93 v1.1 -- ANSIfied the code. More efficient pointers. -** -*/ - -/***************************************************************/ -/* Timer options. You MUST uncomment one of the options below */ -/* or compile, for example, with the '-DUNIX' option. */ -/***************************************************************/ -/* #define Amiga */ -/* #define UNIX */ -/* #define UNIX_Old */ -/* #define VMS */ -/* #define BORLAND_C */ -/* #define MSC */ -/* #define MAC */ -/* #define IPSC */ -/* #define FORTRAN_SEC */ -/* #define GTODay */ -/* #define CTimer */ -/* #define UXPM */ -/* #define MAC_TMgr */ -/* #define PARIX */ -/* #define POSIX */ -/* #define WIN32 */ -/* #define POSIX1 */ -/***********************/ - -#include /* Need standard I/O functions */ -#include /* Need exit() routine interface */ -#include /* Need strcmp() interface */ -#ifdef MPW /* Macintosh MPW ONLY */ -#include /* Need cursor control interfaces */ -#endif - -#define MAXQUEENS 100 /* Maximum number of queens */ -#define MAXRANKS MAXQUEENS /* Maximum number of ranks (rows) */ -#define MAXFILES MAXQUEENS /* Maximum number of files (columns) */ -#define MAXDIAGS (MAXRANKS+MAXFILES-1) /* Maximum number of diagonals */ -#define EMPTY (MAXQUEENS+1) /* Marks unoccupied file or diagonal */ - -/* GLOBAL VARIABLES */ - -int queens; /* Number of queens to place */ -int ranks; /* Number of ranks (rows) */ -int files; /* Number of files (columns) */ -int printing = 1; /* TRUE if printing positions */ -int findall = 0; /* TRUE if finding all solutions */ - -unsigned long solutions = 0; /* Number of solutions found */ -int queen[MAXRANKS]; /* File on which each queen is located */ -int file[MAXFILES]; /* Which queen 'owns' each file */ -int fordiag[MAXDIAGS]; /* Which queen 'owns' forward diagonals */ -int bakdiag[MAXDIAGS]; /* Which queen 'owns' reverse diagonals */ -char *progname = 0; /* The name of this program */ - - - - - -/***********************/ -/**** ROUTINES ****/ -/***********************/ - -/* Internal prototypes */ -//void main(int argc,char **argv); /* Main program */ -void find(int level); /* Algorithm to find solutions */ -void pboard(void); /* Print a solution */ -void run_queens(int argc,char **argv); - - - - -/*---------------------- main() --------------------------- -** MAIN program. The main purpose of this routine is -** to deal with decoding the command line arguments, -** initializing the various arrays, and starting the -** recursive search routine. -*/ -int main(void) -{ - char *args[] = {"queens", "-c", "12"}; - run_queens(3, args); -} - -void run_queens(int argc,char **argv) -{ - register int i; /* Loop variable */ - register char *p; /* Pointer to argument */ - double starttime, benchtime, dtime(); - -#ifdef MPW /* Macintosh MPW ONLY */ - InitCursorCtl(0); /* Enable cursor control */ -#endif - - progname = argv[0]; /* The name of the program */ - - /**** DECODE COMMAND LINE ARGUMENTS ****/ - - for (i=1; i MAXQUEENS) { /* N can't be too large */ - fprintf(stderr,"%s: can't have more than %d queens\n", - progname, MAXQUEENS); - exit(-1); - } - } /* End of argument test */ - } /* End of argument scan loop */ - if (queens == 0) { - fprintf(stderr,"%s: missing queens argument\n",progname); - fprintf(stderr,"usage: %s [-ac] queens\n",progname); - exit(-1); - } - - - ranks = files = queens; /* NxN board for N queens */ - printf("%d queen%s on a %dx%d board...\n", - queens, queens>1? "s" : "", ranks, files); - fflush(stdout); - - starttime = dtime(); - - /* Initialization */ - solutions = 0; /* No solutions yet */ - for (i=0; i= level && /* No queen on the file? */ - *fdp >= level && *bdp >= level /* No queens on diagonals? */ - ) { - queen[level] = f; /* Note new position of queen */ - *fp = *fdp = *bdp = level; /* Place queen on file & diags */ - find(level+1); /* This level OK, recurse to next */ - *fp = *fdp = *bdp = EMPTY; /* Remove queen from file & diags */ - } /* End of conflict test */ - } /* End of file loop */ - } /* End if (level == queens) */ -} /* End of find() */ - - - - -/*------------------------- pboard() ----------------------- -** This routines prints the board for a particular solution. -** The output is sent to stdout. -*/ - -void pboard(void) -{ - register int i,j; /* Rank/File indices */ - - if (findall) { /* Only if searching for all */ - printf("\nSolution #%lu:\n",solutions); /* Print solution number */ - } - for (i=0; i -#define HZ 50 - -double dtime() -{ - double q; - - struct tt - { - long days; - long minutes; - long ticks; - } tt; - - DateStamp(&tt); - - q = ((double)(tt.ticks + (tt.minutes * 60L * 50L))) / (double)HZ; - - return q; -} -#endif - -/*****************************************************/ -/* UNIX dtime(). This is the preferred UNIX timer. */ -/* Provided by: Markku Kolkka, mk59200@cc.tut.fi */ -/* HP-UX Addition by: Bo Thide', bt@irfu.se */ -/*****************************************************/ -#ifdef UNIX -#include -#include - -#ifdef hpux -#include -#define getrusage(a,b) syscall(SYS_getrusage,a,b) -#endif - -struct rusage rusage; - -double dtime() -{ - double q; - - getrusage(RUSAGE_SELF,&rusage); - - q = (double)(rusage.ru_utime.tv_sec); - q = q + (double)(rusage.ru_utime.tv_usec) * 1.0e-06; - - return q; -} -#endif - -/***************************************************/ -/* UNIX_Old dtime(). This is the old UNIX timer. */ -/* Make sure HZ is properly defined in param.h !! */ -/***************************************************/ -#ifdef UNIX_Old -#include -#include -#include - -#ifndef HZ -#define HZ 60 -#endif - -struct tms tms; - -double dtime() -{ - double q; - - times(&tms); - - q = (double)(tms.tms_utime) / (double)HZ; - - return q; -} -#endif - -/*********************************************************/ -/* VMS dtime() for VMS systems. */ -/* Provided by: RAMO@uvphys.phys.UVic.CA */ -/* Some people have run into problems with this timer. */ -/*********************************************************/ -#ifdef VMS -#include time - -#ifndef HZ -#define HZ 100 -#endif - -struct tbuffer_t - { - int proc_user_time; - int proc_system_time; - int child_user_time; - int child_system_time; - }; - -struct tbuffer_t tms; - -double dtime() -{ - double q; - - times(&tms); - - q = (double)(tms.proc_user_time) / (double)HZ; - - return q; -} -#endif - -/******************************/ -/* BORLAND C dtime() for DOS */ -/******************************/ -#ifdef BORLAND_C -#include -#include -#include - -#define HZ 100 -struct time tnow; - -double dtime() -{ - double q; - - gettime(&tnow); - - q = 60.0 * (double)(tnow.ti_min); - q = q + (double)(tnow.ti_sec); - q = q + (double)(tnow.ti_hund)/(double)HZ; - - return q; -} -#endif - -/**************************************/ -/* Microsoft C (MSC) dtime() for DOS */ -/**************************************/ -#ifdef MSC -#include -#include - -#define HZ CLOCKS_PER_SEC -clock_t tnow; - -double dtime() -{ - double q; - - tnow = clock(); - - q = (double)tnow / (double)HZ; - - return q; -} -#endif - -/*************************************/ -/* Macintosh (MAC) Think C dtime() */ -/*************************************/ -#ifdef MAC -#include - -#define HZ 60 - -double dtime() -{ - double q; - - q = (double)clock() / (double)HZ; - - return q; -} -#endif - -/************************************************************/ -/* iPSC/860 (IPSC) dtime() for i860. */ -/* Provided by: Dan Yergeau, yergeau@gloworm.Stanford.EDU */ -/************************************************************/ -#ifdef IPSC -extern double dclock(); - -double dtime() -{ - double q; - - q = dclock(); - - return q; -} -#endif - -/**************************************************/ -/* FORTRAN dtime() for Cray type systems. */ -/* This is the preferred timer for Cray systems. */ -/**************************************************/ -#ifdef FORTRAN_SEC - -fortran double second(); - -double dtime() -{ - double q; - - second(&q); - - return q; -} -#endif - -/***********************************************************/ -/* UNICOS C dtime() for Cray UNICOS systems. Don't use */ -/* unless absolutely necessary as returned time includes */ -/* 'user+system' time. Provided by: R. Mike Dority, */ -/* dority@craysea.cray.com */ -/***********************************************************/ -#ifdef CTimer -#include - -double dtime() -{ - double q; - clock_t clock(void); - - q = (double)clock() / (double)CLOCKS_PER_SEC; - - return q; -} -#endif - -/********************************************/ -/* Another UNIX timer using gettimeofday(). */ -/* However, getrusage() is preferred. */ -/********************************************/ -#ifdef GTODay -#include - -struct timeval tnow; - -double dtime() -{ - double q; - - gettimeofday(&tnow,NULL); - q = (double)tnow.tv_sec + (double)tnow.tv_usec * 1.0e-6; - - return q; -} -#endif - -/*****************************************************/ -/* Fujitsu UXP/M timer. */ -/* Provided by: Mathew Lim, ANUSF, M.Lim@anu.edu.au */ -/*****************************************************/ -#ifdef UXPM -#include -#include -struct tmsu rusage; - -double dtime() -{ - double q; - - timesu(&rusage); - - q = (double)(rusage.tms_utime) * 1.0e-06; - - return q; -} -#endif - -/**********************************************/ -/* Macintosh (MAC_TMgr) Think C dtime() */ -/* requires Think C Language Extensions or */ -/* #include in the prefix */ -/* provided by Francis H Schiffer 3rd (fhs) */ -/* skipschiffer@genie.geis.com */ -/**********************************************/ -#ifdef MAC_TMgr -#include -#include - -static TMTask mgrTimer; -static Boolean mgrInited = false; -static double mgrClock; - -#define RMV_TIMER RmvTime( (QElemPtr)&mgrTimer ) -#define MAX_TIME 1800000000L -/* MAX_TIME limits time between calls to */ -/* dtime( ) to no more than 30 minutes */ -/* this limitation could be removed by */ -/* creating a completion routine to sum */ -/* 30 minute segments (fhs 1994 feb 9) */ - -static void Remove_timer( ) -{ - RMV_TIMER; - mgrInited = false; -} - -double dtime( ) -{ - if( mgrInited ) { - RMV_TIMER; - mgrClock += (MAX_TIME + mgrTimer.tmCount)*1.0e-6; - } else { - if( _atexit( &Remove_timer ) == 0 ) mgrInited = true; - mgrClock = 0.0; - } - - if ( mgrInited ) - { - mgrTimer.tmAddr = NULL; - mgrTimer.tmCount = 0; - mgrTimer.tmWakeUp = 0; - mgrTimer.tmReserved = 0; - InsTime( (QElemPtr)&mgrTimer ); - PrimeTime( (QElemPtr)&mgrTimer, -MAX_TIME ); - } - return( mgrClock ); -} -#endif - -/***********************************************************/ -/* Parsytec GCel timer. */ -/* Provided by: Georg Wambach, gw@informatik.uni-koeln.de */ -/***********************************************************/ -#ifdef PARIX -#include - -double dtime() -{ - double q; - - q = (double) (TimeNowHigh()) / (double) CLK_TCK_HIGH; - - return q; -} -#endif - -/************************************************/ -/* Sun Solaris POSIX dtime() routine */ -/* Provided by: Case Larsen, CTLarsen.lbl.gov */ -/************************************************/ -#ifdef POSIX -#include -#include -#include - -#ifdef __hpux -#include -#endif - -struct rusage rusage; - -double dtime() -{ - double q; - - getrusage(RUSAGE_SELF,&rusage); - - q = (double)(rusage.ru_utime.tv_sec); - q = q + (double)(rusage.ru_utime.tv_nsec) * 1.0e-09; - - return q; -} -#endif - - -/****************************************************/ -/* Windows NT (32 bit) dtime() routine */ -/* Provided by: Piers Haken, piersh@microsoft.com */ -/****************************************************/ -#ifdef WIN32 -#include - -double dtime(void) -{ - double q; - - q = (double)GetTickCount() * 1.0e-03; - - return q; -} -#endif - -/*****************************************************/ -/* Time according to POSIX.1 - */ -/* Ref: "POSIX Programmer's Guide" O'Reilly & Assoc.*/ -/*****************************************************/ -#ifdef POSIX1 -#define _POSIX_SOURCE 1 -#include -#include -#include - -struct tms tms; - -double dtime() -{ - double q; - times(&tms); - q = (double)tms.tms_utime / (double)CLK_TCK; - return q; -} -#endif - -/*-------- End of queens.c, Say goodnight Linda! --------*/ diff --git a/lib/CPUs/MIPS/bsp/examples/r3.c b/lib/CPUs/MIPS/bsp/examples/r3.c deleted file mode 100644 index adba0bc..0000000 --- a/lib/CPUs/MIPS/bsp/examples/r3.c +++ /dev/null @@ -1,471 +0,0 @@ -/* - * IOCCC Raytracer by Anders Gavare. - * - * The raytracer was one of the winners of the 17th IOCCC. - * - * NOTE: This is the UNOBFUSCATED version of the raytracer I used - * during development, not the actual entry sent to the contest. - * - * - * How to build: - * cc r3.c -o r3 (plus optimization flags) - * - * How to run: - * ./r3 > ray.ppm - * or - * ./r3 | xv - - */ -#include "libsys.h" -UINT32 *pP; - -xsize = 800; -ysize = 600; -An = 1; - -camera_X = 0; -camera_Y = -10; -camera_Z = -7; - -scale = 1296; -RootOfScale = 36; -maxcolor = 255; - -MaxDepth=9; -_=1<<15; - -/* -double sphere_x[44] = { - -15,-15,-15,-15, // I - -8,-8,-10,-6,-10,-6, // O - -1,-1, 1,1, // C - 6, 6, 8,8, // C - 13,13,15,15, // C - -11,-11,-11,-11,-9,-9,-7,-7, // r - 0,0,-2,-2,-2,2,2,2, // a - 7,7,9,9,11,11, // y - }; -double sphere_z[44] = { - 3,0,-3,-6, // I - -6, 3,0,0,-3,-3, // O - 0,-3,-6, 3, // C - 0,-3,-6, 3, // C - 0,-3,-6, 3, // C - -11,-13,-15,-17,-11,-15,-13,-17, // r - -11,-15,-13,-15,-17,-13,-15,-17, // a - -11,-13,-15,-17,-11,-13, // y - }; -*/ - -/* Common return variable: */ -return_var; -return_var2; -return_var3; -return_var4; - - -get_sphere_coordinates(b) -{ - return_var = "1111886:6:??AAFFHHMMOO55557799@@>>>BBBGGIIKK"[b]-64; - return_var3 = "C@=::C@@==@=:C@=:C@=:C531/513/5131/31/531/53"[b]-64; - -/* return_var = sphere_x[b]; */ - return_var2 = b<22? 9 : 0; -/* return_var3 = sphere_z[b]; */ - return_var4 = 2; -} - - -/* sqroot(x) returns the square root of x in return_var */ -sqroot_sub(x, mask, guess) -{ - mask? - ( - guess ^= mask, - guess*guess > x ? - ( guess ^= mask ) - : - 0, - sqroot_sub(x, mask/2, guess) - ) - : - ( return_var = guess ); -} - - -sqroot(x) -{ - sqroot_sub(x, _, 0); -} - - -/* - * hit_sphere(): - * - * returns where on a sphere we hit - * Returns distance in hit_sphere_q. (Negative return - * value if we didn't hit anything.) - */ -hit_sphere_q; -hit_sphere(objnr, x, y, z, - dx, dy, dz, - a, b) -{ - get_sphere_coordinates(objnr); - x -= return_var*scale; - y -= return_var2*scale; - z -= return_var3*scale; - - /* - * Solve the following equation: - * - * q^2 (dx^2+dy^2+dz^2) + q * 2(x*dx+y*dy+z*dz) - * + x^2+y^2+z^2 - r^2 = 0 - * - * We assume that |dx,dy,dz| is 1. - * - * q^2 + a q + b = 0 - * - * The solution is (of course) - * - * q = -a/2 +- sqrt(a^2/4 - b) - */ - - b = x*x/scale+y*y/scale+z*z/scale-return_var4*return_var4*scale; - - /* a = 2*(...), and then divide by -2 */ - a = -x*dx/scale-y*dy/scale-z*dz/scale; - - hit_sphere_q = - ( - (b = a*a/scale - b) >= 0 ? - ( -/* b = scale*sqrt((double)b/(double)scale), */ -/* sqroot(b*scale), */ - -/* sqroot_sub(b, _, 0), - b = return_var * RootOfScale, -*/ - sqroot_sub(b*scale, _, 0), - b = return_var, - - /* - * Return the lowest q (a+b or a-b) which is more - * than 0. Return negative if neither - * a+b or a-b is more than 0. - */ - - a + (a>b? -b : b) - ) - : - -1.0 - ); -} - - -/* - * find_closest(): - * - * find_closest() scans objects and returns an index - * to the object which was closest (has the lowest 'q'). - * x,y,z,dx,dy,dz are scaled. - * find_closest_i is the index number of the found object, - * -1 if none was found. find_closest_q is the distance - * (scaled). - */ -find_closest_i; /* index ("sphere number") */ -find_closest_q; /* distance (scaled) */ -find_closest(objnr, x, y, z, - dx, dy, dz, notindex) -{ - /* Initialize find_closest_i on first call: */ - find_closest_i = - !objnr ? -1 : find_closest_i; - - objnr < 44 ? - ( - hit_sphere(objnr, x,y,z, dx,dy,dz, 0,0), - (hit_sphere_q > 0 && objnr!=notindex && - (hit_sphere_q0 && find_closest_i >= 0? - ( - /* find_closest_i and _q are the object - number and distance of the object we - hit. */ - - orig_x += dir_x*find_closest_q/scale, - orig_y += dir_y*find_closest_q/scale, - orig_z += dir_z*find_closest_q/scale, - - /* - * Calculate color (diffuse light): - * (Note: use nZ as a temp variable while - * calculating nY) - */ - get_sphere_coordinates(find_closest_i), - nX = orig_x - return_var*scale, - nY = orig_y - return_var2*scale, - nZ = orig_z - return_var3*scale, - - tmpcol = (-2*nX -2*nY + nZ) / 3, /* sqrt(9), */ - /* Set return_var to the length of the normal - vector (in this case the sphere radius) */ -/* return_var = sqrt(nX*nX + nY*nY +nZ*nZ), */ - sqroot(nX*nX + nY*nY +nZ*nZ), -// return_var = return_var4*scale, - /* divide by return_var to get the color */ -// tmpcol = return_var!=0? tmpcol*scale/return_var : 0, - tmpcol /= return_var4, - - /* color is now -1..1 */ - tmpcol *= tmpcol, /* square the color 1..-1 => 1..1 */ - tmpcol *= 200, - tmpcol /= (scale*scale), -/* tmpcol += 5, */ - - closest_i_saved = find_closest_i, - - /* Mirror: out = in - 2*(-normal)*cos v - where v is the angle between in and - -normal */ - - /* -normal: (normalized to len=1.0) */ -/* return_var = sqrt(nX*nX + nY*nY + nZ*nZ), */ - return_var!=0? - ( - nX = -nX * scale / return_var, - nY = -nY * scale / return_var, - nZ = -nZ * scale / return_var - ) : 0, - - /* use return_var as a temp variable, - calculate cosinus between the vectors */ - return_var = (dir_x*nX + dir_y*nY + dir_z*nZ)/scale, -/* - dir_x -= 2 * nX * return_var / scale, - dir_y -= 2 * nY * return_var / scale, - dir_z -= 2 * nZ * return_var / scale, -*/ - dir_x -= nX * return_var / (scale/2), - dir_y -= nY * return_var / (scale/2), - dir_z -= nZ * return_var / (scale/2), - - trace_ray(orig_x, orig_y, orig_z, - dir_x, dir_y, dir_z, - depth-1, find_closest_i, 0,0), - - trace_ray_R /= 2, - trace_ray_G /= 2, - trace_ray_B /= 2, -/* - closest_i_saved &= 7, - !closest_i_saved? (closest_i_saved++) : 0, -*/ -/* - closest_i_saved = closest_i_saved<4? closest_i_saved+1 : 7, -*/ -/* - tvinga gråskalor: closest_i_saved = 7, -*/ -closest_i_saved = closest_i_saved<22? 7 : - ( - closest_i_saved<30 ? 1 : - ( - closest_i_saved<38 ? 2 : - ( - closest_i_saved<44 ? 4 : - ( - closest_i_saved == 44 ? 6 : - 3 - ) - ) - ) - ), - - trace_ray_R += closest_i_saved & 1 ? tmpcol : 0, - trace_ray_G += closest_i_saved & 2 ? tmpcol : 0, - trace_ray_B += closest_i_saved & 4 ? tmpcol : 0 - ) - : - ( - /* If we didn't hit anything, set the color anyway: */ - - depth==MaxDepth? /* True if this is a ray originating - from the camera */ - ( - orig_z += 2, - dir_z = orig_z > 0? orig_z / 8 : orig_z / 20 - ) - : 0, - - /* - * Colors according to Horizon_1 in gimp: - * At top of sky: 13,92,146 (light blue) - * At bottom sky: 255,255,255 (white) - * Top of ground: 213,168,111 (light brown) - * Bottom of ground: 103, 55, 26 (brown) - */ - - dir_z > 0? - ( - trace_ray_B = dir_z * dir_z / scale, - trace_ray_R = 255 - 250 * trace_ray_B / scale, - trace_ray_G = 255 - 150 * trace_ray_B / scale, - trace_ray_B = 255 - 100 * trace_ray_B / scale - ) - : - ( - trace_ray_B = dir_z * dir_z / scale, - trace_ray_B < scale/5? - ( - trace_ray_R = 255 - 210 * trace_ray_B / scale, - trace_ray_G = 255 - 435 * trace_ray_B / scale, - trace_ray_B = 255 - 720 * trace_ray_B / scale - ) - : - ( - trace_ray_B -= scale/5, - trace_ray_R = 213 - 110 * trace_ray_B / scale, - trace_ray_G = 168 - 113 * trace_ray_B / scale, - trace_ray_B = 111 - 85 * trace_ray_B / scale - ) - ), - - depth!=MaxDepth? - ( - trace_ray_R /= 2, - trace_ray_G /= 2, - trace_ray_B /= 2 - ) - : 0 - ); - - trace_ray_R = trace_ray_R<0? 0 : trace_ray_R>maxcolor? maxcolor: trace_ray_R; - trace_ray_G = trace_ray_G<0? 0 : trace_ray_G>maxcolor? maxcolor : trace_ray_G; - trace_ray_B = trace_ray_B<0? 0 : trace_ray_B>maxcolor? maxcolor : trace_ray_B; -} - - -/* - * do_pixels_in_line(): - * - * the horizontal "for loop" - */ -R; G; B; -dpil_helper(x,y, a,b) -{ - trace_ray( - scale*camera_X + scale*40*(An*x+a)/xsize/An - scale*20, - scale*camera_Y, - scale*camera_Z - scale*30*(An*y+b)/ysize/An + scale*15, - 0, scale, 0, MaxDepth, -1, 0,0); - - R += trace_ray_R; - G += trace_ray_G; - B += trace_ray_B; - - ++a -#include "snipmath.h" - -#undef rad2deg /* These are macros defined in PI.H */ -#undef deg2rad - -double rad2deg(double rad) -{ - return (180.0 * rad / (PI)); -} - -double deg2rad(double deg) -{ - return (PI * deg / 180.0); -} - -#ifdef TEST - -#include - -main() -{ - double X; - - for (X = 0.0; X <= 360.0; X += 45.0) - printf("%3.0f degrees = %.12f radians\n", X, deg2rad(X)); - puts(""); - for (X = 0.0; X <= (2 * PI + 1e-6); X += (PI / 6)) - printf("%.12f radians = %3.0f degrees\n", X, rad2deg(X)); - return 0; -} - -#endif /* TEST */ diff --git a/lib/CPUs/MIPS/bsp/examples/random.c b/lib/CPUs/MIPS/bsp/examples/random.c deleted file mode 100644 index c5f6615..0000000 --- a/lib/CPUs/MIPS/bsp/examples/random.c +++ /dev/null @@ -1,86 +0,0 @@ -/* random.c - - Author: Numerical recipes (ran1, gaussian), Jon Hamkins (others) - Revised by: Jon Hamkins - Date: 4-16-98 -*/ - -#include - -#define IA 16807 -#define IM 2147483647 -#define AM (1.0/IM) -#define IQ 127773 -#define IR 2836 -#define NTAB 32 -#define NDIV (1+(IM-1)/NTAB) -#define EPS 1.2e-14 -#define RNMX (1.0-EPS) -/* From Numerical Recipes, p. 280, modified from float to double */ -/* returns a uniform deviate in (0,1) */ -double ran1(long *idum) -{ - int j; - long k; - static long iy=0; - static long iv[NTAB]; - double temp; - - if (*idum <=0 || !iy) { - if (-(*idum) < 1) *idum=1; - else *idum = -(*idum); - for (j=NTAB+7; j>=0; j--) { - k=(*idum)/IQ; - *idum=IA*(*idum-k*IQ)-IR*k; - if (*idum < 0) *idum += IM; - if (j < NTAB) iv[j] = *idum; - } - iy = iv[0]; - } - k=(*idum)/IQ; - *idum=IA*(*idum-k*IQ)-IR*k; - if (*idum < 0) *idum += IM; - j=iy/NDIV; - iy=iv[j]; - iv[j] = *idum; - if ((temp=AM*iy) > RNMX) return RNMX; - else return temp; -} -#undef IA -#undef IM -#undef AM -#undef IQ -#undef IR -#undef NTAB -#undef NDIV -#undef EPS -#undef RNMX - -/* Generate a N(0,1) r.v. */ -double gaussian(long *idum) -{ - static int iset=0; - static double gset; - double fac,r,v1,v2; - double ran1(); - if (iset == 0) { - do { - v1=2.0*ran1(idum)-1.0; - v2=2.0*ran1(idum)-1.0; - r=v1*v1+v2*v2; - } while (r >= 1.0 || r == 0.0); - fac=sqrt(-2.0*log(r)/r); - gset=v1*fac; - iset=1; - return v2*fac; - } else { - iset=0; - return gset; - } -} - -/* generate a random bit */ -int random_bit(long *idum) -{ - return((ran1(idum)<0.5) ? 0 : 1); -} diff --git a/lib/CPUs/MIPS/bsp/examples/random.h b/lib/CPUs/MIPS/bsp/examples/random.h deleted file mode 100644 index 673d6af..0000000 --- a/lib/CPUs/MIPS/bsp/examples/random.h +++ /dev/null @@ -1,6 +0,0 @@ -/* random.h */ - -/* functions provided by random.c */ -extern double ran1(long *idum); -extern double gaussian(long *idum); -extern int random_bit(long *idum); diff --git a/lib/CPUs/MIPS/bsp/examples/regdef.h b/lib/CPUs/MIPS/bsp/examples/regdef.h deleted file mode 100644 index 60c6c2a..0000000 --- a/lib/CPUs/MIPS/bsp/examples/regdef.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1985 MIPS Computer Systems, Inc. - * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle - * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. - */ -#ifndef _ASM_REGDEF_H -#define _ASM_REGDEF_H - -/* - * Symbolic register names for 32 bit ABI - */ -#define zero $0 /* wired zero */ -#define AT $1 /* assembler temp - uppercase because of ".set at" */ -#define v0 $2 /* return value */ -#define v1 $3 -#define a0 $4 /* argument registers */ -#define a1 $5 -#define a2 $6 -#define a3 $7 -#define t0 $8 /* caller saved */ -#define t1 $9 -#define t2 $10 -#define t3 $11 -#define t4 $12 -#define t5 $13 -#define t6 $14 -#define t7 $15 -#define s0 $16 /* callee saved */ -#define s1 $17 -#define s2 $18 -#define s3 $19 -#define s4 $20 -#define s5 $21 -#define s6 $22 -#define s7 $23 -#define t8 $24 /* caller saved */ -#define t9 $25 -#define jp $25 /* PIC jump register */ -#define k0 $26 /* kernel scratch */ -#define k1 $27 -#define gp $28 /* global pointer */ -#define sp $29 /* stack pointer */ -#define fp $30 /* frame pointer */ -#define s8 $30 /* same like fp! */ -#define ra $31 /* return address */ - -/* CP0 registers */ -#define CP0_INDEX $0 /* R3000 available */ -#define CP0_RANDOM $1 /* R3000 available */ -#define CP0_ENTRYLO $2 /* R3000 available */ -#define CP0_CONTEXT $4 /* R3000 available */ -#define CP0_BADDR $8 /* R3000 available */ -#define CP0_ENTRYHI $10 /* R3000 available */ -#define CP0_SR $12 /* R3000 available */ -#define CP0_CR $13 /* R3000 available */ -#define CP0_EPC $14 /* R3000 available */ -#define CP0_PRID $15 /* R3000 available */ - -/* Status register masks */ -#define SR_MASK_IEC 0x00000001 -#define SR_MASK_KUC 0x00000002 -#define SR_MASK_IEP 0x00000004 -#define SR_MASK_KUP 0x00000008 -#define SR_MASK_IEO 0x00000010 -#define SR_MASK_KUO 0x00000020 -#define SR_MASK_IM 0x0000FF00 -#define SR_MASK_DS 0x00FF0000 -#define SR_MASK_RE 0x01000000 -#define SR_MASK_CU 0xF0000000 - -/* Cause register masks */ -#define CR_MASK_EXC 0x0000007C -#define CR_MASK_IP 0x0000FF00 -#define CR_MASK_CE 0x40000000 -#define CR_MASK_BD 0x80000000 - -#endif /* _ASM_REGDEF_H */ diff --git a/lib/CPUs/MIPS/bsp/examples/richards_benchmark.c b/lib/CPUs/MIPS/bsp/examples/richards_benchmark.c deleted file mode 100644 index f1fdfd0..0000000 --- a/lib/CPUs/MIPS/bsp/examples/richards_benchmark.c +++ /dev/null @@ -1,408 +0,0 @@ - -/* C version of the systems programming language benchmark -** Author: M. J. Jordan Cambridge Computer Laboratory. -** -** Modified by: M. Richards, Nov 1996 -** to be ANSI C and runnable on 64 bit machines + other minor changes -** Modified by: M. Richards, 20 Oct 1998 -** made minor corrections to improve ANSI compliance (suggested -** by David Levine) -** -** Compile with, say -** -** gcc -o bench bench.c -** -** or -** -** gcc -o bench100 -Dbench100 bench.c (for a version that obeys -** the main loop 100x more often) -*/ - -#include -#include - -#ifdef SMALL_PROBLEM_SIZE -#define Count 1000*1000 -#define Qpktcountval 2326389 -#define Holdcountval 930555 -#else -#define Count 10000*1000 -#define Qpktcountval 23263894 -#define Holdcountval 9305557 -#endif - - -#define TRUE 1 -#define FALSE 0 -#define MAXINT 32767 - -#define BUFSIZE 3 -#define I_IDLE 1 -#define I_WORK 2 -#define I_HANDLERA 3 -#define I_HANDLERB 4 -#define I_DEVA 5 -#define I_DEVB 6 -#define PKTBIT 1 -#define WAITBIT 2 -#define HOLDBIT 4 -#define NOTPKTBIT !1 -#define NOTWAITBIT !2 -#define NOTHOLDBIT 0XFFFB - -#define S_RUN 0 -#define S_RUNPKT 1 -#define S_WAIT 2 -#define S_WAITPKT 3 -#define S_HOLD 4 -#define S_HOLDPKT 5 -#define S_HOLDWAIT 6 -#define S_HOLDWAITPKT 7 - -#define K_DEV 1000 -#define K_WORK 1001 - -struct packet -{ - struct packet *p_link; - int p_id; - int p_kind; - int p_a1; - char p_a2[4]; -}; - -struct task -{ - struct task *t_link; - int t_id; - int t_pri; - struct packet *t_wkq; - int t_state; - struct task *(*t_fn)(struct packet *); - long t_v1; - long t_v2; -}; - -char alphabet[28] = "0ABCDEFGHIJKLMNOPQRSTUVWXYZ"; -struct task *tasktab[11] = {0,0,0,0,0,0,0,0,0,0,0}; -struct task *tasklist = 0; -struct task *tcb; -long taskid; -long v1; -long v2; -int qpktcount = 0; -int holdcount = 0; -int tracing = 1; -int layout = 0; - -void append(struct packet *pkt, struct packet *ptr); - -void createtask(int id, - int pri, - struct packet *wkq, - int state, - struct task *(*fn)(struct packet *), - long v1, - long v2) -{ - struct task *t = (struct task *)malloc(sizeof(struct task)); - - tasktab[id] = t; - t->t_link = tasklist; - t->t_id = id; - t->t_pri = pri; - t->t_wkq = wkq; - t->t_state = state; - t->t_fn = fn; - t->t_v1 = v1; - t->t_v2 = v2; - tasklist = t; -} - -struct packet *pkt(struct packet *link, int id, int kind) -{ - int i; - struct packet *p = (struct packet *)malloc(sizeof(struct packet)); - - for (i=0; i<=BUFSIZE; i++) - p->p_a2[i] = 0; - - p->p_link = link; - p->p_id = id; - p->p_kind = kind; - p->p_a1 = 0; - - return (p); -} - -void trace(char a) -{ - if ( --layout <= 0 ) - { - printf("\n"); - layout = 50; - } - - printf("%c", a); -} - -void schedule() -{ - while ( tcb != 0 ) - { - struct packet *pkt; - struct task *newtcb; - - pkt=0; - - switch ( tcb->t_state ) - { - case S_WAITPKT: - pkt = tcb->t_wkq; - tcb->t_wkq = pkt->p_link; - tcb->t_state = tcb->t_wkq == 0 ? S_RUN : S_RUNPKT; - - case S_RUN: - case S_RUNPKT: - taskid = tcb->t_id; - v1 = tcb->t_v1; - v2 = tcb->t_v2; - if (tracing==TRUE) trace(taskid+'0'); - - newtcb = (*(tcb->t_fn))(pkt); - tcb->t_v1 = v1; - tcb->t_v2 = v2; - tcb = newtcb; - break; - - case S_WAIT: - case S_HOLD: - case S_HOLDPKT: - case S_HOLDWAIT: - case S_HOLDWAITPKT: - tcb = tcb->t_link; - break; - - default: - return; - } - } -} - -struct task *Wait(void) -{ - tcb->t_state |= WAITBIT; - return (tcb); -} - -struct task *holdself(void) -{ - ++holdcount; - tcb->t_state |= HOLDBIT; - return (tcb->t_link) ; -} - -struct task *findtcb(int id) -{ - struct task *t = 0; - - if (1<=id && id<=(long)10) - t = tasktab[id]; - if (t==0) printf("\nBad task id %d\n", id); - return(t); -} - -struct task *release(int id) -{ - struct task *t; - - t = findtcb(id); - if ( t==0 ) return (0); - - t->t_state &= NOTHOLDBIT; - if ( t->t_pri > tcb->t_pri ) return (t); - - return (tcb) ; -} - - -struct task *qpkt(struct packet *pkt) -{ - struct task *t; - - t = findtcb(pkt->p_id); - if (t==0) return (t); - - qpktcount++; - - pkt->p_link = 0; - pkt->p_id = taskid; - - if (t->t_wkq==0) - { - t->t_wkq = pkt; - t->t_state |= PKTBIT; - if (t->t_pri > tcb->t_pri) return (t); - } - else - { - append(pkt, (struct packet *)&(t->t_wkq)); - } - - return (tcb); -} - -struct task *idlefn(struct packet *pkt) -{ - --v2; - if ( v2==0 ) return ( holdself() ); - - if ( (v1&1) == 0 ) - { - v1 = ( v1>>1) & MAXINT; - return ( release(I_DEVA) ); - } - else - { - v1 = ( (v1>>1) & MAXINT) ^ 0XD008; - return ( release(I_DEVB) ); - } -} - -struct task *workfn(struct packet *pkt) -{ - if ( pkt==0 ) return ( Wait() ); - else - { - int i; - - v1 = I_HANDLERA + I_HANDLERB - v1; - pkt->p_id = v1; - - pkt->p_a1 = 0; - for (i=0; i<=BUFSIZE; i++) - { - v2++; - if ( v2 > 26 ) v2 = 1; - (pkt->p_a2)[i] = alphabet[v2]; - } - return ( qpkt(pkt) ); - } -} - -struct task *handlerfn(struct packet *pkt) -{ - if ( pkt!=0) append(pkt, - (struct packet *)(pkt->p_kind==K_WORK ? &v1 : &v2)); - - if ( v1!=0 ) - { - int count; - struct packet *workpkt = (struct packet *)v1; - count = workpkt->p_a1; - - if ( count > BUFSIZE ) - { - v1 = (long)(((struct packet *)v1)->p_link); - return ( qpkt(workpkt) ); - } - - if ( v2!=0 ) - { - struct packet *devpkt; - - devpkt = (struct packet *)v2; - v2 = (long)(((struct packet *)v2)->p_link); - devpkt->p_a1 = workpkt->p_a2[count]; - workpkt->p_a1 = count+1; - return( qpkt(devpkt) ); - } - } - return ( Wait() ); -} - -struct task *devfn(struct packet *pkt) -{ - if ( pkt==0 ) - { - if ( v1==0 ) return ( Wait() ); - pkt = (struct packet *)v1; - v1 = 0; - return ( qpkt(pkt) ); - } - else - { - v1 = (long)pkt; - if (tracing==TRUE) trace(pkt->p_a1); - return ( holdself() ); - } -} - -void append(struct packet *pkt, struct packet *ptr) -{ - pkt->p_link = 0; - - while ( ptr->p_link ) ptr = ptr->p_link; - - ptr->p_link = pkt; -} - -int main() -{ - struct packet *wkq = 0; - int retval; - - printf("Bench mark starting\n"); - - createtask(I_IDLE, 0, wkq, S_RUN, idlefn, 1, Count); - - wkq = pkt(0, 0, K_WORK); - wkq = pkt(wkq, 0, K_WORK); - - createtask(I_WORK, 1000, wkq, S_WAITPKT, workfn, I_HANDLERA, 0); - - wkq = pkt(0, I_DEVA, K_DEV); - wkq = pkt(wkq, I_DEVA, K_DEV); - wkq = pkt(wkq, I_DEVA, K_DEV); - - createtask(I_HANDLERA, 2000, wkq, S_WAITPKT, handlerfn, 0, 0); - - wkq = pkt(0, I_DEVB, K_DEV); - wkq = pkt(wkq, I_DEVB, K_DEV); - wkq = pkt(wkq, I_DEVB, K_DEV); - - createtask(I_HANDLERB, 3000, wkq, S_WAITPKT, handlerfn, 0, 0); - - wkq = 0; - createtask(I_DEVA, 4000, wkq, S_WAIT, devfn, 0, 0); - createtask(I_DEVB, 5000, wkq, S_WAIT, devfn, 0, 0); - - tcb = tasklist; - - qpktcount = holdcount = 0; - - printf("Starting\n"); - - tracing = FALSE; - layout = 0; - - schedule(); - - printf("finished\n"); - - printf("qpkt count = %d holdcount = %d\n", - qpktcount, holdcount); - - printf("These results are "); - if (qpktcount == Qpktcountval && holdcount == Holdcountval) { - printf("correct"); - retval = 0; - } else { - printf("incorrect"); - retval = 1; - } - - printf("\nend of run\n"); - return retval; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/rmd160.c b/lib/CPUs/MIPS/bsp/examples/rmd160.c deleted file mode 100644 index 8b0f2c7..0000000 --- a/lib/CPUs/MIPS/bsp/examples/rmd160.c +++ /dev/null @@ -1,294 +0,0 @@ -/********************************************************************\ - * - * FILE: rmd160.c - * - * CONTENTS: A sample C-implementation of the RIPEMD-160 - * hash-function. - * TARGET: any computer with an ANSI C compiler - * - * AUTHOR: Antoon Bosselaers, ESAT-COSIC - * DATE: 1 March 1996 - * VERSION: 1.0 - * - * Copyright (c) Katholieke Universiteit Leuven - * 1996, All Rights Reserved - * - * Conditions for use of the RIPEMD-160 Software - * - * The RIPEMD-160 software is freely available for use under the terms and - * conditions described hereunder, which shall be deemed to be accepted by - * any user of the software and applicable on any use of the software: - * - * 1. K.U.Leuven Department of Electrical Engineering-ESAT/COSIC shall for - * all purposes be considered the owner of the RIPEMD-160 software and of - * all copyright, trade secret, patent or other intellectual property - * rights therein. - * 2. The RIPEMD-160 software is provided on an "as is" basis without - * warranty of any sort, express or implied. K.U.Leuven makes no - * representation that the use of the software will not infringe any - * patent or proprietary right of third parties. User will indemnify - * K.U.Leuven and hold K.U.Leuven harmless from any claims or liabilities - * which may arise as a result of its use of the software. In no - * circumstances K.U.Leuven R&D will be held liable for any deficiency, - * fault or other mishappening with regard to the use or performance of - * the software. - * 3. User agrees to give due credit to K.U.Leuven in scientific publications - * or communications in relation with the use of the RIPEMD-160 software - * as follows: RIPEMD-160 software written by Antoon Bosselaers, - * available at http://www.esat.kuleuven.be/~cosicart/ps/AB-9601/. - * -\********************************************************************/ - -/* header files */ -#include -#include -#include -#include "rmd160.h" - -/********************************************************************/ - -void MDinit(dword *MDbuf) -{ - MDbuf[0] = 0x67452301UL; - MDbuf[1] = 0xefcdab89UL; - MDbuf[2] = 0x98badcfeUL; - MDbuf[3] = 0x10325476UL; - MDbuf[4] = 0xc3d2e1f0UL; - - return; -} - -/********************************************************************/ - -void compress(dword *MDbuf, dword *X) -{ - dword aa = MDbuf[0], bb = MDbuf[1], cc = MDbuf[2], - dd = MDbuf[3], ee = MDbuf[4]; - dword aaa = MDbuf[0], bbb = MDbuf[1], ccc = MDbuf[2], - ddd = MDbuf[3], eee = MDbuf[4]; - - /* round 1 */ - FF(aa, bb, cc, dd, ee, X[ 0], 11); - FF(ee, aa, bb, cc, dd, X[ 1], 14); - FF(dd, ee, aa, bb, cc, X[ 2], 15); - FF(cc, dd, ee, aa, bb, X[ 3], 12); - FF(bb, cc, dd, ee, aa, X[ 4], 5); - FF(aa, bb, cc, dd, ee, X[ 5], 8); - FF(ee, aa, bb, cc, dd, X[ 6], 7); - FF(dd, ee, aa, bb, cc, X[ 7], 9); - FF(cc, dd, ee, aa, bb, X[ 8], 11); - FF(bb, cc, dd, ee, aa, X[ 9], 13); - FF(aa, bb, cc, dd, ee, X[10], 14); - FF(ee, aa, bb, cc, dd, X[11], 15); - FF(dd, ee, aa, bb, cc, X[12], 6); - FF(cc, dd, ee, aa, bb, X[13], 7); - FF(bb, cc, dd, ee, aa, X[14], 9); - FF(aa, bb, cc, dd, ee, X[15], 8); - - /* round 2 */ - GG(ee, aa, bb, cc, dd, X[ 7], 7); - GG(dd, ee, aa, bb, cc, X[ 4], 6); - GG(cc, dd, ee, aa, bb, X[13], 8); - GG(bb, cc, dd, ee, aa, X[ 1], 13); - GG(aa, bb, cc, dd, ee, X[10], 11); - GG(ee, aa, bb, cc, dd, X[ 6], 9); - GG(dd, ee, aa, bb, cc, X[15], 7); - GG(cc, dd, ee, aa, bb, X[ 3], 15); - GG(bb, cc, dd, ee, aa, X[12], 7); - GG(aa, bb, cc, dd, ee, X[ 0], 12); - GG(ee, aa, bb, cc, dd, X[ 9], 15); - GG(dd, ee, aa, bb, cc, X[ 5], 9); - GG(cc, dd, ee, aa, bb, X[ 2], 11); - GG(bb, cc, dd, ee, aa, X[14], 7); - GG(aa, bb, cc, dd, ee, X[11], 13); - GG(ee, aa, bb, cc, dd, X[ 8], 12); - - /* round 3 */ - HH(dd, ee, aa, bb, cc, X[ 3], 11); - HH(cc, dd, ee, aa, bb, X[10], 13); - HH(bb, cc, dd, ee, aa, X[14], 6); - HH(aa, bb, cc, dd, ee, X[ 4], 7); - HH(ee, aa, bb, cc, dd, X[ 9], 14); - HH(dd, ee, aa, bb, cc, X[15], 9); - HH(cc, dd, ee, aa, bb, X[ 8], 13); - HH(bb, cc, dd, ee, aa, X[ 1], 15); - HH(aa, bb, cc, dd, ee, X[ 2], 14); - HH(ee, aa, bb, cc, dd, X[ 7], 8); - HH(dd, ee, aa, bb, cc, X[ 0], 13); - HH(cc, dd, ee, aa, bb, X[ 6], 6); - HH(bb, cc, dd, ee, aa, X[13], 5); - HH(aa, bb, cc, dd, ee, X[11], 12); - HH(ee, aa, bb, cc, dd, X[ 5], 7); - HH(dd, ee, aa, bb, cc, X[12], 5); - - /* round 4 */ - II(cc, dd, ee, aa, bb, X[ 1], 11); - II(bb, cc, dd, ee, aa, X[ 9], 12); - II(aa, bb, cc, dd, ee, X[11], 14); - II(ee, aa, bb, cc, dd, X[10], 15); - II(dd, ee, aa, bb, cc, X[ 0], 14); - II(cc, dd, ee, aa, bb, X[ 8], 15); - II(bb, cc, dd, ee, aa, X[12], 9); - II(aa, bb, cc, dd, ee, X[ 4], 8); - II(ee, aa, bb, cc, dd, X[13], 9); - II(dd, ee, aa, bb, cc, X[ 3], 14); - II(cc, dd, ee, aa, bb, X[ 7], 5); - II(bb, cc, dd, ee, aa, X[15], 6); - II(aa, bb, cc, dd, ee, X[14], 8); - II(ee, aa, bb, cc, dd, X[ 5], 6); - II(dd, ee, aa, bb, cc, X[ 6], 5); - II(cc, dd, ee, aa, bb, X[ 2], 12); - - /* round 5 */ - JJ(bb, cc, dd, ee, aa, X[ 4], 9); - JJ(aa, bb, cc, dd, ee, X[ 0], 15); - JJ(ee, aa, bb, cc, dd, X[ 5], 5); - JJ(dd, ee, aa, bb, cc, X[ 9], 11); - JJ(cc, dd, ee, aa, bb, X[ 7], 6); - JJ(bb, cc, dd, ee, aa, X[12], 8); - JJ(aa, bb, cc, dd, ee, X[ 2], 13); - JJ(ee, aa, bb, cc, dd, X[10], 12); - JJ(dd, ee, aa, bb, cc, X[14], 5); - JJ(cc, dd, ee, aa, bb, X[ 1], 12); - JJ(bb, cc, dd, ee, aa, X[ 3], 13); - JJ(aa, bb, cc, dd, ee, X[ 8], 14); - JJ(ee, aa, bb, cc, dd, X[11], 11); - JJ(dd, ee, aa, bb, cc, X[ 6], 8); - JJ(cc, dd, ee, aa, bb, X[15], 5); - JJ(bb, cc, dd, ee, aa, X[13], 6); - - /* parallel round 1 */ - JJJ(aaa, bbb, ccc, ddd, eee, X[ 5], 8); - JJJ(eee, aaa, bbb, ccc, ddd, X[14], 9); - JJJ(ddd, eee, aaa, bbb, ccc, X[ 7], 9); - JJJ(ccc, ddd, eee, aaa, bbb, X[ 0], 11); - JJJ(bbb, ccc, ddd, eee, aaa, X[ 9], 13); - JJJ(aaa, bbb, ccc, ddd, eee, X[ 2], 15); - JJJ(eee, aaa, bbb, ccc, ddd, X[11], 15); - JJJ(ddd, eee, aaa, bbb, ccc, X[ 4], 5); - JJJ(ccc, ddd, eee, aaa, bbb, X[13], 7); - JJJ(bbb, ccc, ddd, eee, aaa, X[ 6], 7); - JJJ(aaa, bbb, ccc, ddd, eee, X[15], 8); - JJJ(eee, aaa, bbb, ccc, ddd, X[ 8], 11); - JJJ(ddd, eee, aaa, bbb, ccc, X[ 1], 14); - JJJ(ccc, ddd, eee, aaa, bbb, X[10], 14); - JJJ(bbb, ccc, ddd, eee, aaa, X[ 3], 12); - JJJ(aaa, bbb, ccc, ddd, eee, X[12], 6); - - /* parallel round 2 */ - III(eee, aaa, bbb, ccc, ddd, X[ 6], 9); - III(ddd, eee, aaa, bbb, ccc, X[11], 13); - III(ccc, ddd, eee, aaa, bbb, X[ 3], 15); - III(bbb, ccc, ddd, eee, aaa, X[ 7], 7); - III(aaa, bbb, ccc, ddd, eee, X[ 0], 12); - III(eee, aaa, bbb, ccc, ddd, X[13], 8); - III(ddd, eee, aaa, bbb, ccc, X[ 5], 9); - III(ccc, ddd, eee, aaa, bbb, X[10], 11); - III(bbb, ccc, ddd, eee, aaa, X[14], 7); - III(aaa, bbb, ccc, ddd, eee, X[15], 7); - III(eee, aaa, bbb, ccc, ddd, X[ 8], 12); - III(ddd, eee, aaa, bbb, ccc, X[12], 7); - III(ccc, ddd, eee, aaa, bbb, X[ 4], 6); - III(bbb, ccc, ddd, eee, aaa, X[ 9], 15); - III(aaa, bbb, ccc, ddd, eee, X[ 1], 13); - III(eee, aaa, bbb, ccc, ddd, X[ 2], 11); - - /* parallel round 3 */ - HHH(ddd, eee, aaa, bbb, ccc, X[15], 9); - HHH(ccc, ddd, eee, aaa, bbb, X[ 5], 7); - HHH(bbb, ccc, ddd, eee, aaa, X[ 1], 15); - HHH(aaa, bbb, ccc, ddd, eee, X[ 3], 11); - HHH(eee, aaa, bbb, ccc, ddd, X[ 7], 8); - HHH(ddd, eee, aaa, bbb, ccc, X[14], 6); - HHH(ccc, ddd, eee, aaa, bbb, X[ 6], 6); - HHH(bbb, ccc, ddd, eee, aaa, X[ 9], 14); - HHH(aaa, bbb, ccc, ddd, eee, X[11], 12); - HHH(eee, aaa, bbb, ccc, ddd, X[ 8], 13); - HHH(ddd, eee, aaa, bbb, ccc, X[12], 5); - HHH(ccc, ddd, eee, aaa, bbb, X[ 2], 14); - HHH(bbb, ccc, ddd, eee, aaa, X[10], 13); - HHH(aaa, bbb, ccc, ddd, eee, X[ 0], 13); - HHH(eee, aaa, bbb, ccc, ddd, X[ 4], 7); - HHH(ddd, eee, aaa, bbb, ccc, X[13], 5); - - /* parallel round 4 */ - GGG(ccc, ddd, eee, aaa, bbb, X[ 8], 15); - GGG(bbb, ccc, ddd, eee, aaa, X[ 6], 5); - GGG(aaa, bbb, ccc, ddd, eee, X[ 4], 8); - GGG(eee, aaa, bbb, ccc, ddd, X[ 1], 11); - GGG(ddd, eee, aaa, bbb, ccc, X[ 3], 14); - GGG(ccc, ddd, eee, aaa, bbb, X[11], 14); - GGG(bbb, ccc, ddd, eee, aaa, X[15], 6); - GGG(aaa, bbb, ccc, ddd, eee, X[ 0], 14); - GGG(eee, aaa, bbb, ccc, ddd, X[ 5], 6); - GGG(ddd, eee, aaa, bbb, ccc, X[12], 9); - GGG(ccc, ddd, eee, aaa, bbb, X[ 2], 12); - GGG(bbb, ccc, ddd, eee, aaa, X[13], 9); - GGG(aaa, bbb, ccc, ddd, eee, X[ 9], 12); - GGG(eee, aaa, bbb, ccc, ddd, X[ 7], 5); - GGG(ddd, eee, aaa, bbb, ccc, X[10], 15); - GGG(ccc, ddd, eee, aaa, bbb, X[14], 8); - - /* parallel round 5 */ - FFF(bbb, ccc, ddd, eee, aaa, X[12] , 8); - FFF(aaa, bbb, ccc, ddd, eee, X[15] , 5); - FFF(eee, aaa, bbb, ccc, ddd, X[10] , 12); - FFF(ddd, eee, aaa, bbb, ccc, X[ 4] , 9); - FFF(ccc, ddd, eee, aaa, bbb, X[ 1] , 12); - FFF(bbb, ccc, ddd, eee, aaa, X[ 5] , 5); - FFF(aaa, bbb, ccc, ddd, eee, X[ 8] , 14); - FFF(eee, aaa, bbb, ccc, ddd, X[ 7] , 6); - FFF(ddd, eee, aaa, bbb, ccc, X[ 6] , 8); - FFF(ccc, ddd, eee, aaa, bbb, X[ 2] , 13); - FFF(bbb, ccc, ddd, eee, aaa, X[13] , 6); - FFF(aaa, bbb, ccc, ddd, eee, X[14] , 5); - FFF(eee, aaa, bbb, ccc, ddd, X[ 0] , 15); - FFF(ddd, eee, aaa, bbb, ccc, X[ 3] , 13); - FFF(ccc, ddd, eee, aaa, bbb, X[ 9] , 11); - FFF(bbb, ccc, ddd, eee, aaa, X[11] , 11); - - /* combine results */ - ddd += cc + MDbuf[1]; /* final result for MDbuf[0] */ - MDbuf[1] = MDbuf[2] + dd + eee; - MDbuf[2] = MDbuf[3] + ee + aaa; - MDbuf[3] = MDbuf[4] + aa + bbb; - MDbuf[4] = MDbuf[0] + bb + ccc; - MDbuf[0] = ddd; - - return; -} - -/********************************************************************/ - -void MDfinish(dword *MDbuf, byte *strptr, dword lswlen, dword mswlen) -{ - unsigned int i; /* counter */ - dword X[16]; /* message words */ - - memset(X, 0, 16*sizeof(dword)); - - /* put bytes from strptr into X */ - for (i=0; i<(lswlen&63); i++) { - /* byte i goes into word X[i div 4] at pos. 8*(i mod 4) */ - X[i>>2] ^= (dword) *strptr++ << (8 * (i&3)); - } - - /* append the bit m_n == 1 */ - X[(lswlen>>2)&15] ^= (dword)1 << (8*(lswlen&3) + 7); - - if ((lswlen & 63) > 55) { - /* length goes to next block */ - compress(MDbuf, X); - memset(X, 0, 16*sizeof(dword)); - } - - /* append length in bits*/ - X[14] = lswlen << 3; - X[15] = (lswlen >> 29) | (mswlen << 3); - compress(MDbuf, X); - - return; -} - -/************************ end of file rmd160.c **********************/ - diff --git a/lib/CPUs/MIPS/bsp/examples/rmd160.h b/lib/CPUs/MIPS/bsp/examples/rmd160.h deleted file mode 100644 index 70a33a6..0000000 --- a/lib/CPUs/MIPS/bsp/examples/rmd160.h +++ /dev/null @@ -1,154 +0,0 @@ -/********************************************************************\ - * - * FILE: rmd160.h - * - * CONTENTS: Header file for a sample C-implementation of the - * RIPEMD-160 hash-function. - * TARGET: any computer with an ANSI C compiler - * - * AUTHOR: Antoon Bosselaers, ESAT-COSIC - * DATE: 1 March 1996 - * VERSION: 1.0 - * - * Copyright (c) Katholieke Universiteit Leuven - * 1996, All Rights Reserved - * - * Conditions for use of the RIPEMD-160 Software - * - * The RIPEMD-160 software is freely available for use under the terms and - * conditions described hereunder, which shall be deemed to be accepted by - * any user of the software and applicable on any use of the software: - * - * 1. K.U.Leuven Department of Electrical Engineering-ESAT/COSIC shall for - * all purposes be considered the owner of the RIPEMD-160 software and of - * all copyright, trade secret, patent or other intellectual property - * rights therein. - * 2. The RIPEMD-160 software is provided on an "as is" basis without - * warranty of any sort, express or implied. K.U.Leuven makes no - * representation that the use of the software will not infringe any - * patent or proprietary right of third parties. User will indemnify - * K.U.Leuven and hold K.U.Leuven harmless from any claims or liabilities - * which may arise as a result of its use of the software. In no - * circumstances K.U.Leuven R&D will be held liable for any deficiency, - * fault or other mishappening with regard to the use or performance of - * the software. - * 3. User agrees to give due credit to K.U.Leuven in scientific publications - * or communications in relation with the use of the RIPEMD-160 software - * as follows: RIPEMD-160 software written by Antoon Bosselaers, - * available at http://www.esat.kuleuven.be/~cosicart/ps/AB-9601/. - * -\********************************************************************/ - -#ifndef RMD160H /* make sure this file is read only once */ -#define RMD160H - -/********************************************************************/ - -/* typedef 8 and 32 bit types, resp. */ -/* adapt these, if necessary, - for your operating system and compiler */ -typedef unsigned char byte; -typedef unsigned long dword; - - -/********************************************************************/ - -/* macro definitions */ - -/* collect four bytes into one word: */ -#define BYTES_TO_DWORD(strptr) \ - (((dword) *((strptr)+3) << 24) | \ - ((dword) *((strptr)+2) << 16) | \ - ((dword) *((strptr)+1) << 8) | \ - ((dword) *(strptr))) - -/* ROL(x, n) cyclically rotates x over n bits to the left */ -/* x must be of an unsigned 32 bits type and 0 <= n < 32. */ -#define ROL(x, n) (((x) << (n)) | ((x) >> (32-(n)))) - -/* the five basic functions F(), G() and H() */ -#define F(x, y, z) ((x) ^ (y) ^ (z)) -#define G(x, y, z) (((x) & (y)) | (~(x) & (z))) -#define H(x, y, z) (((x) | ~(y)) ^ (z)) -#define I(x, y, z) (((x) & (z)) | ((y) & ~(z))) -#define J(x, y, z) ((x) ^ ((y) | ~(z))) - -/* the ten basic operations FF() through III() */ -#define FF(a, b, c, d, e, x, s) {\ - (a) += F((b), (c), (d)) + (x);\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define GG(a, b, c, d, e, x, s) {\ - (a) += G((b), (c), (d)) + (x) + 0x5a827999UL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define HH(a, b, c, d, e, x, s) {\ - (a) += H((b), (c), (d)) + (x) + 0x6ed9eba1UL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define II(a, b, c, d, e, x, s) {\ - (a) += I((b), (c), (d)) + (x) + 0x8f1bbcdcUL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define JJ(a, b, c, d, e, x, s) {\ - (a) += J((b), (c), (d)) + (x) + 0xa953fd4eUL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define FFF(a, b, c, d, e, x, s) {\ - (a) += F((b), (c), (d)) + (x);\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define GGG(a, b, c, d, e, x, s) {\ - (a) += G((b), (c), (d)) + (x) + 0x7a6d76e9UL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define HHH(a, b, c, d, e, x, s) {\ - (a) += H((b), (c), (d)) + (x) + 0x6d703ef3UL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define III(a, b, c, d, e, x, s) {\ - (a) += I((b), (c), (d)) + (x) + 0x5c4dd124UL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } -#define JJJ(a, b, c, d, e, x, s) {\ - (a) += J((b), (c), (d)) + (x) + 0x50a28be6UL;\ - (a) = ROL((a), (s)) + (e);\ - (c) = ROL((c), 10);\ - } - -/********************************************************************/ - -/* function prototypes */ - -void MDinit(dword *MDbuf); -/* - * initializes MDbuffer to "magic constants" - */ - -void compress(dword *MDbuf, dword *X); -/* - * the compression function. - * transforms MDbuf using message bytes X[0] through X[15] - */ - -void MDfinish(dword *MDbuf, byte *strptr, dword lswlen, dword mswlen); -/* - * puts bytes from strptr into X and pad out; appends length - * and finally, compresses the last block(s) - * note: length in bits == 8 * (lswlen + 2^32 mswlen). - * note: there are (lswlen mod 64) bytes left in strptr. - */ - -#endif /* RMD160H */ - -/*********************** end of file rmd160.h ***********************/ - diff --git a/lib/CPUs/MIPS/bsp/examples/rmd160_test.c b/lib/CPUs/MIPS/bsp/examples/rmd160_test.c deleted file mode 100644 index d46b86e..0000000 --- a/lib/CPUs/MIPS/bsp/examples/rmd160_test.c +++ /dev/null @@ -1,113 +0,0 @@ -#include -#include -#include -#include "libsys.h" - -#include "rmd160.h" - -#ifndef RMDsize -#define RMDsize 160 -#endif - -byte *RMD(byte *message) -/* - * returns RMD(message) - * message should be a string terminated by '\0' - */ -{ - dword MDbuf[RMDsize/32]; /* contains (A, B, C, D(, E)) */ - static byte hashcode[RMDsize/8]; /* for final hash-value */ - dword X[16]; /* current 16-word chunk */ - unsigned int i; /* counter */ - dword length; /* length in bytes of message */ - dword nbytes; /* # of bytes not yet processed */ - - /* initialize */ - MDinit(MDbuf); - length = (dword)strlen((char *)message); - - /* process message in 16-word chunks */ - for (nbytes=length; nbytes > 63; nbytes-=64) { - for (i=0; i<16; i++) { - X[i] = BYTES_TO_DWORD(message); - message += 4; - } - compress(MDbuf, X); - } /* length mod 64 bytes left */ - - /* finish: */ - MDfinish(MDbuf, message, length, 0); - - for (i=0; i>2]; /* implicit cast to byte */ - hashcode[i+1] = (MDbuf[i>>2] >> 8); /* extracts the 8 least */ - hashcode[i+2] = (MDbuf[i>>2] >> 16); /* significant bits. */ - hashcode[i+3] = (MDbuf[i>>2] >> 24); - } - - return (byte *)hashcode; -} - -#define MSG_SIZE (1*1024*1024) // Bit -#define TIME_STEP 2 - -char msg[MSG_SIZE/8+1]; -byte hashref[] = {0xFC,0x20,0x7B,0x84,0x40,0x1C,0x49,0x0B,0x8D,0x69,0x88,0xD2,0x49,0x20,0x01,0x90,0x41,0x77,0x72,0x59}; - -int main (void) -{ - int result, i, j, cnt; - byte *hashcode; - UINT32 start, stop; - - for (i=0; i < MSG_SIZE/8; i++) - msg[i] = 0x55; - - msg[i] = 0; - - setbuf(stdout, NULL); - - cnt = 0; - while(1) - { - while (start == time(NULL)); - - start = time(NULL); - stop = start + TIME_STEP; - - - while(1) - { - hashcode = RMD((byte *)msg); - cnt++; - - if (memcmp(hashcode, hashref, sizeof(hashref))) - { - printf("Error RipeMD-160!\n"); - printf("Hash expected: "); - for (i=0; i %d Mbit/s\n\n", cnt, MSG_SIZE/(1024*1024), TIME_STEP, cnt*MSG_SIZE/(1024*1024)/TIME_STEP); - cnt = 0; - break; - } - } - } - - return 0; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/round.h b/lib/CPUs/MIPS/bsp/examples/round.h deleted file mode 100644 index 4dcbb58..0000000 --- a/lib/CPUs/MIPS/bsp/examples/round.h +++ /dev/null @@ -1,55 +0,0 @@ -/* +++Date last modified: 05-Jul-1997 */ - -/* -** rounding macros by Dave Knapp, Thad Smith, Jon Strayer, & Bob Stout -*/ - -#ifndef ROUND__H -#define ROUND__H - -#include - -#if defined(__cplusplus) && __cplusplus - -/* -** Safe C++ inline versions -*/ - -/* round to integer */ - -inline int iround(double x) -{ - return (int)floor(x + 0.5); -} - -/* round number n to d decimal points */ - -inline double fround(double n, unsigned d) -{ - return floor(n * pow(10., d) + .5) / pow(10., d); -} - -#else - -/* -** NOTE: These C macro versions are unsafe since arguments are referenced -** more than once. -** -** Avoid using these with expression arguments to be safe. -*/ - -/* -** round to integer -*/ - -#define iround(x) floor((x) + 0.5) - -/* -** round number n to d decimal points -*/ - -#define fround(n,d) (floor((n)*pow(10.,(d))+.5)/pow(10.,(d))) - -#endif - -#endif /* ROUND__H */ diff --git a/lib/CPUs/MIPS/bsp/examples/serdump.c b/lib/CPUs/MIPS/bsp/examples/serdump.c deleted file mode 100644 index 066d0ea..0000000 --- a/lib/CPUs/MIPS/bsp/examples/serdump.c +++ /dev/null @@ -1,83 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include "libsys.h" - -#define BUF_SIZE 1024 -char buffer[BUF_SIZE]; -char rxbuf[BUF_SIZE]; -char * volatile pPtr_r; -char * volatile pPtr_w; -UINT32 volatile timeout_cnt; - -void handler3(void) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT; - volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA; - - while((0x10 & *pUART_stat)) - { -/// sputs("w: "); print_word((int)pPtr_w); sputs("\n"); - if (pPtr_w == &buffer[BUF_SIZE-1]) - pPtr_w = buffer; - *(pPtr_w++) = *pUART_data; - timeout_cnt = 200; - - } - -} - -int main(int argc, char **argv) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT; - unsigned char *fileData; - unsigned long file_len, state; - - pPtr_r = buffer; - pPtr_w = buffer; - interrupt_register(3, handler3); - interrupt_enable(3); - *pUART_stat |= (1 << 6); - setbuf(stderr, NULL); - - state = 0; - while(1) - { - fprintf(stdout,"Reading serial stream..\n"); - file_len = 0; - timeout_cnt = 20000000; - while(timeout_cnt--) - { - sleep(1); - } - while(pPtr_w != pPtr_r) - { -// sputs("r: "); print_word((int)pPtr_r); sputs("\n"); - if (pPtr_r == &buffer[BUF_SIZE-1]) - pPtr_r = buffer; - rxbuf[file_len++] = *(pPtr_r++); - } - if (file_len) - { - PrintBuffer8(rxbuf, 16, file_len); - } - switch(state) - { - case 0: - if (!memcmp(rxbuf, "CLIENT", file_len)) - { - fprintf(stdout,"Send response\n"); - fprintf(stderr,"SERVER"); - state = 1; - } - break; - default: - break; - } - } - - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/snipmath.h b/lib/CPUs/MIPS/bsp/examples/snipmath.h deleted file mode 100644 index 9ef5841..0000000 --- a/lib/CPUs/MIPS/bsp/examples/snipmath.h +++ /dev/null @@ -1,75 +0,0 @@ -/* +++Date last modified: 05-Jul-1997 */ - -/* -** SNIPMATH.H - Header file for SNIPPETS math functions and macros -*/ - -#ifndef SNIPMATH__H -#define SNIPMATH__H - -#include -#include "sniptype.h" -#include "round.h" - -/* -** Callable library functions begin here -*/ - -void SetBCDLen(int n); /* Bcdl.C */ -long BCDtoLong(char *BCDNum); /* Bcdl.C */ -void LongtoBCD(long num, char BCDNum[]); /* Bcdl.C */ -double bcd_to_double(void *buf, size_t len, /* Bcdd.C */ - int digits); -int double_to_bcd(double arg, char *buf, /* Bcdd.C */ - size_t length, size_t digits ); -DWORD ncomb1 (int n, int m); /* Combin.C */ -DWORD ncomb2 (int n, int m); /* Combin.C */ -void SolveCubic(double a, double b, double c, /* Cubic.C */ - double d, int *solutions, - double *x); -DWORD dbl2ulong(double t); /* Dbl2Long.C */ -long dbl2long(double t); /* Dbl2Long.C */ -double dround(double x); /* Dblround.C */ - -/* Use #defines for Permutations and Combinations -- Factoryl.C */ - -#define log10P(n,r) (log10factorial(n)-log10factorial((n)-(r))) -#define log10C(n,r) (log10P((n),(r))-log10factorial(r)) - -double log10factorial(double N); /* Factoryl.C */ - -double fibo(unsigned short term); /* Fibo.C */ -double frandom(int n); /* Frand.C */ -double ipow(double x, int n); /* Ipow.C */ -int ispow2(int x); /* Ispow2.C */ -long double ldfloor(long double a); /* Ldfloor.C */ -int initlogscale(long dmax, long rmax); /* Logscale.C */ -long logscale(long d); /* Logscale.C */ - -float MSBINToIEEE(float f); /* Msb2Ieee.C */ -float IEEEToMSBIN(float f); /* Msb2Ieee.C */ -int perm_index (char pit[], int size); /* Perm_Idx.C */ -int round_div(int n, int d); /* Rnd_Div.C */ -long round_ldiv(long n, long d); /* Rnd_Div.C */ -double rad2deg(double rad); /* Rad2Deg.C */ -double deg2rad(double deg); /* Rad2Deg.C */ - -#include "pi.h" -#ifndef PHI - #define PHI ((1.0+sqrt(5.0))/2.0) /* the golden number */ - #define INV_PHI (1.0/PHI) /* the golden ratio */ -#endif - -/* -** File: ISQRT.C -*/ - -struct int_sqrt { - unsigned sqrt, - frac; -}; - -void usqrt(unsigned long x, struct int_sqrt *q); - - -#endif /* SNIPMATH__H */ diff --git a/lib/CPUs/MIPS/bsp/examples/sniptype.h b/lib/CPUs/MIPS/bsp/examples/sniptype.h deleted file mode 100644 index 399935d..0000000 --- a/lib/CPUs/MIPS/bsp/examples/sniptype.h +++ /dev/null @@ -1,37 +0,0 @@ -/* +++Date last modified: 05-Jul-1997 */ - -/* -** SNIPTYPE.H - Include file for SNIPPETS data types and commonly used macros -*/ - -#ifndef SNIPTYPE__H -#define SNIPTYPE__H - -#include /* For free() */ -#include /* For NULL & strlen() */ - -typedef enum {Error_ = -1, Success_, False_ = 0, True_} Boolean_T; - -/*#if !defined(WIN32) && !defined(_WIN32) && !defined(__NT__) \ - && !defined(_WINDOWS) - #if !defined(OS2)*/ - typedef unsigned char BYTE; - typedef unsigned long DWORD; -/* #endif*/ - typedef unsigned short WORD; -/*#else - #define WIN32_LEAN_AND_MEAN - #define NOGDI - #define NOSERVICE - #undef INC_OLE1 - #undef INC_OLE2 - #include - #define HUGE - #endif*/ - -#define NUL '\0' -#define LAST_CHAR(s) (((char *)s)[strlen(s) - 1]) -#define TOBOOL(x) (!(!(x))) -#define FREE(p) (free(p),(p)=NULL) - -#endif /* SNIPTYPE__H */ diff --git a/lib/CPUs/MIPS/bsp/examples/specs/specs b/lib/CPUs/MIPS/bsp/examples/specs/specs deleted file mode 100644 index 3871b63..0000000 --- a/lib/CPUs/MIPS/bsp/examples/specs/specs +++ /dev/null @@ -1,147 +0,0 @@ -*asm: -%{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} %{mips16} %{mno-mips16:-no-mips16} %{mips3d} %{mno-mips3d:-no-mips3d} %{mdmx} %{mno-mdmx:-no-mdmx} %{mdsp} %{mno-dsp} %{mdspr2} %{mno-dspr2} %{msmartmips} %{mno-smartmips} %{mmt} %{mno-mt} %{mfix-vr4120} %{mfix-vr4130} %(subtarget_asm_optimizing_spec) %(subtarget_asm_debugging_spec) %{mabi=*} %{!mabi*: %(asm_abi_default_spec)} %{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} %{mfp32} %{mfp64} %{mshared} %{mno-shared} %{msym32} %{mno-sym32} %{mtune=*} %{v} %(subtarget_asm_spec) - -*asm_debug: -%{gstabs*:--gstabs}%{!gstabs*:%{g*:--gdwarf2}} %{fdebug-prefix-map=*:--debug-prefix-map %*} - -*asm_final: - - -*asm_options: -%{--target-help:%:print-asm-header()} %a %Y %{c:%W{o*}%{!o*:-o %w%b%O}}%{!c:-o %d%w%u%O} - -*invoke_as: -%{!S:-o %|.s | - as %(asm_options) %m.s %A } - -*cpp: -%(subtarget_cpp_spec) - -*cpp_options: -%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w} %{f*} %{g*:%{!g0:%{!fno-working-directory:-fworking-directory}}} %{O*} %{undef} %{save-temps:-fpch-preprocess} - -*cpp_debug_options: -%{d*} - -*cpp_unique_options: -%{C|CC:%{!E:%eGCC does not support -C or -CC without -E}} %{!Q:-quiet} %{nostdinc*} %{C} %{CC} %{v} %{I*&F*} %{P} %I %{MD:-MD %{!o:%b.d}%{o*:%.d%*}} %{MMD:-MMD %{!o:%b.d}%{o*:%.d%*}} %{M} %{MM} %{MF*} %{MG} %{MP} %{MQ*} %{MT*} %{!E:%{!M:%{!MM:%{!MT:%{!MQ:%{MD|MMD:%{o*:-MQ %*}}}}}}} %{remap} %{g3|ggdb3|gstabs3|gcoff3|gxcoff3|gvms3:-dD} %{H} %C %{D*&U*&A*} %{i*} %Z %i %{fmudflap:-D_MUDFLAP -include mf-runtime.h} %{fmudflapth:-D_MUDFLAP -D_MUDFLAPTH -include mf-runtime.h} %{E|M|MM:%W{o*}} - -*trad_capable_cpp: -cc1 -E %{traditional|ftraditional|traditional-cpp:-traditional-cpp} - -*cc1: -%{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} %{save-temps: } %(subtarget_cc1_spec) - -*cc1_options: -%{pg:%{fomit-frame-pointer:%e-pg and -fomit-frame-pointer are incompatible}} %1 %{!Q:-quiet} -dumpbase %B %{d*} %{m*} %{a*} %{c|S:%{o*:-auxbase-strip %*}%{!o*:-auxbase %b}}%{!c:%{!S:-auxbase %b}} %{g*} %{O*} %{W*&pedantic*} %{w} %{std*&ansi&trigraphs} %{v:-version} %{pg:-p} %{p} %{f*} %{undef} %{Qn:-fno-ident} %{--help:--help} %{--target-help:--target-help} %{--help=*:--help=%(VALUE)} %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %b.s}}} %{fsyntax-only:-o %j} %{-param*} %{fmudflap|fmudflapth:-fno-builtin -fno-merge-constants} %{coverage:-fprofile-arcs -ftest-coverage} - -*cc1plus: - - -*link_gcc_c_sequence: -%G %L %G - -*link_ssp: -%{fstack-protector|fstack-protector-all:-lssp_nonshared -lssp} - -*endfile: -crtend%O%s crtn%O%s - -*link: -%(endian_spec) %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} %{bestGnum} %{shared} %{non_shared} - -*lib: ---start-group %o -lc --end-group - -*mfwrap: - %{static: %{fmudflap|fmudflapth: --wrap=malloc --wrap=free --wrap=calloc --wrap=realloc --wrap=mmap --wrap=munmap --wrap=alloca} %{fmudflapth: --wrap=pthread_create}} %{fmudflap|fmudflapth: --wrap=main} - -*mflib: -%{fmudflap|fmudflapth: -export-dynamic} - -*link_gomp: - - -*libgcc: --lgcc - -*startfile: -crti%O%s crtbegin%O%s - -*switches_need_spaces: - - -*cross_compile: -1 - -*version: -4.3.3 - -*multilib: -. !msoft-float !EL !EB;soft-float msoft-float !EL !EB;el !msoft-float EL !EB;eb !msoft-float !EL EB;soft-float/el msoft-float EL !EB;soft-float/eb msoft-float !EL EB; - -*multilib_defaults: -EL mips1 mabi=32 - -*multilib_extra: - - -*multilib_matches: -mel EL;meb EB;m4650 msingle-float;msoft-float msoft-float;EL EL;EB EB; - -*multilib_exclusions: - - -*multilib_options: -msoft-float EL/EB - -*linker: -collect2 - -*link_libgcc: -%D - -*md_exec_prefix: - - -*md_startfile_prefix: - - -*md_startfile_prefix_1: - - -*startfile_prefix_spec: - -*sysroot_spec: ---sysroot=%R - -*sysroot_suffix_spec: - - -*sysroot_hdrs_suffix_spec: - - -*subtarget_cc1_spec: - - -*subtarget_cpp_spec: - - -*subtarget_asm_optimizing_spec: -%{noasmopt:-O0} %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} - -*subtarget_asm_debugging_spec: -%{g} %{g0} %{g1} %{g2} %{g3} %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} %{gcoff*:-mdebug} %{!gcoff*:-no-mdebug} - -*subtarget_asm_spec: - - -*asm_abi_default_spec: --mabi=32 - -*endian_spec: -%{!EB:%{!meb:-EL}} %{EB|meb:-EB} - -*link_command: -%{!fsyntax-only:%{!c:%{!M:%{!MM:%{!E:%{!S: %(linker) -T link/link.ld %l %{pie:-pie} %X %{o*} %{A} %{d} %{e*} %{m} %{N} %{n} %{r} %{s} %{t} %{u*} %{x} %{z} %{Z} %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:} %{L*} %(mfwrap) %(link_libgcc) %{lib} %{fopenmp|ftree-parallelize-loops=*:%:include(libgomp.spec)%(link_gomp)} %(mflib) %{fprofile-arcs|fprofile-generate|coverage:-lgcov} %{!nostdlib:%{!nodefaultlibs:%(link_ssp) %(link_gcc_c_sequence)}} %{!A:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} }}}}}} - diff --git a/lib/CPUs/MIPS/bsp/examples/stanford.c b/lib/CPUs/MIPS/bsp/examples/stanford.c deleted file mode 100644 index 907477b..0000000 --- a/lib/CPUs/MIPS/bsp/examples/stanford.c +++ /dev/null @@ -1,1117 +0,0 @@ -/* stanford baby benchmark suite from john hennessy -- - -There are copies all around; the MIPS performance brief has up-to-date -numbers for a bunch of machines. BUT, these wouldn't be my first -choice. SPEC, the industry benchmark collection group, will probably -specify a new set of benchmarks shortly and release then right after -that. I imagine they will include espresso, gcc, and other large, but -public domain programs, for real things. - -here's bench.c - John Hennessy -*/ - - -/* This is a suite of benchmarks that are relatively short, both in program - size and execution time. It requires no input, and prints the execution - time for each program, using the system- dependent routine Getclock, - below, to find out the current CPU time. It does a rudimentary check to - make sure each program gets the right output. These programs were - gathered by John Hennessy and modified by Peter Nye. - -4.2 VERSION */ - -#include -#include -#include -#include - -#ifndef HZ -#define HZ 60 -#endif -#define nil 0 -#define false 0 -#define true 1 -#define bubblebase 1.61 -#define dnfbase 3.5 -#define permbase 1.75 -#define queensbase 1.83 -#define towersbase 2.39 -#define quickbase 1.92 -#define intmmbase 1.46 -#define treebase 2.5 -#define mmbase 0.0 -#define fpmmbase 2.92 -#define puzzlebase 0.5 -#define fftbase 0.0 -#define fpfftbase 4.44 - /* Towers */ -#define maxcells 18 - - /* Intmm, Mm */ -#define rowsize 40 - - /* Puzzle */ -#define size 511 -#define classmax 3 -#define typemax 12 -#define d 8 - - /* Bubble, Quick */ -#define sortelements 5000 -#define srtelements 500 - - /* fft */ -#define fftsize 256 -#define fftsize2 129 -/* -type */ - /* Perm */ -#define permrange 10 - - /* tree */ -struct node -{ - struct node *left, *right; - int val; -}; - -/* Towers *//* - discsizrange = 1..maxcells; */ -#define stackrange 3 -/* cellcursor = 0..maxcells; */ -struct element -{ - int discsize; - int next; -}; -/* emsgtype = packed array[1..15] of char; -*/ -/* Intmm, Mm *//* - index = 1 .. rowsize; - intmatrix = array [index,index] of integer; - realmatrix = array [index,index] of real; - */ -/* Puzzle *//* - piececlass = 0..classmax; - piecetype = 0..typemax; - position = 0..size; - */ -/* Bubble, Quick *//* - listsize = 0..sortelements; - sortarray = array [listsize] of integer; - */ - /* FFT */ -struct complex -{ - float rp, ip; -}; -/* - carray = array [1..fftsize] of complex ; - c2array = array [1..fftsize2] of complex ; -*/ - -float value; -float fixed, floated; - - /* global */ -int timer; -int xtimes[11]; -int seed; - - /* Perm */ -int permarray[permrange + 1]; -int pctr; - - /* tree */ -struct node *tree; - - /* Towers */ -int stack[stackrange + 1]; -struct element cellspace[maxcells + 1]; -int freelist, movesdone; - - /* Intmm, Mm */ -int ima[rowsize + 1][rowsize + 1], imb[rowsize + 1][rowsize + 1], - imr[rowsize + 1][rowsize + 1]; -float rma[rowsize + 1][rowsize + 1], rmb[rowsize + 1][rowsize + 1], - rmr[rowsize + 1][rowsize + 1]; - - /* Puzzle */ -int piececount[classmax + 1], - class[typemax + 1], - piecemax[typemax + 1], - puzzl[size + 1], p[typemax + 1][size + 1], n, kount; - - /* Bubble, Quick */ -int sortlist[sortelements + 1], biggest, littlest, top; - - /* FFT */ -struct complex z[fftsize + 1], w[fftsize + 1], e[fftsize2 + 1]; -float zr, zi; - -/* global procedures */ - -int -Getclock () -{ - struct tms rusage; - times (&rusage); - return ((60*rusage.tms_utime/HZ) * 50 / 3); -}; - -Initrand () -{ - seed = 74755; -}; - -int -Rand () -{ - seed = (seed * 1309 + 13849) & 65535; - return (seed); -}; - - - - /* Permutation program, heavily recursive, written by Denny Brown. */ - -Swap (a, b) - int *a, *b; -{ - int t; - t = *a; - *a = *b; - *b = t; -}; - -Initialize () -{ - int i; - for (i = 1; i <= 7; i++) - { - permarray[i] = i - 1; - }; -}; - -Permute (n) - int n; -{ /* permute */ - int k; - pctr = pctr + 1; - if (n != 1) - { - Permute (n - 1); - for (k = n - 1; k >= 1; k--) - { - Swap (&permarray[n], &permarray[k]); - Permute (n - 1); - Swap (&permarray[n], &permarray[k]); - }; - }; -} /* permute */ ; - -Perm () -{ /* Perm */ - int i; - pctr = 0; - for (i = 1; i <= 5; i++) - { - Initialize (); - Permute (7); - }; - if (pctr != 43300) - printf (" Error in Perm.\n"); -} /* Perm */ ; - - - - /* Program to Solve the Towers of Hanoi */ - -Error (emsg) - char *emsg; -{ - printf (" Error in Towers: %s\n", emsg); -}; - -Makenull (s) -{ - stack[s] = 0; -}; - -int -Getelement () -{ - int temp; - if (freelist > 0) - { - temp = freelist; - freelist = cellspace[freelist].next; - } - else - Error ("out of space "); - return (temp); -}; - -Push (i, s) - int i, s; -{ - int errorfound, localel; - errorfound = false; - if (stack[s] > 0) - if (cellspace[stack[s]].discsize <= i) - { - errorfound = true; - Error ("disc size error"); - }; - if (!errorfound) - { - localel = Getelement (); - cellspace[localel].next = stack[s]; - stack[s] = localel; - cellspace[localel].discsize = i; - } -}; - -Init (s, n) - int s, n; -{ - int discctr; - Makenull (s); - for (discctr = n; discctr >= 1; discctr--) - Push (discctr, s); -}; - -int -Pop (s) - int s; -{ - int temp, temp1; - if (stack[s] > 0) - { - temp1 = cellspace[stack[s]].discsize; - temp = cellspace[stack[s]].next; - cellspace[stack[s]].next = freelist; - freelist = stack[s]; - stack[s] = temp; - return (temp1); - } - else - Error ("nothing to pop "); -}; - -Move (s1, s2) - int s1, s2; -{ - Push (Pop (s1), s2); - movesdone = movesdone + 1; -}; - -tower (i, j, k) - int i, j, k; -{ - int other; - if (k == 1) - Move (i, j); - else - { - other = 6 - i - j; - tower (i, other, k - 1); - Move (i, j); - tower (other, j, k - 1); - } -}; - - -Towers () -{ /* Towers */ - int i; - for (i = 1; i <= maxcells; i++) - cellspace[i].next = i - 1; - freelist = maxcells; - Init (1, 14); - Makenull (2); - Makenull (3); - movesdone = 0; - tower (1, 2, 14); - if (movesdone != 16383) - printf (" Error in Towers.\n"); -}; /* Towers */ - - - /* The eight queens problem, solved 50 times. */ -/* - type - doubleboard = 2..16; - doublenorm = -7..7; - boardrange = 1..8; - aarray = array [boardrange] of boolean; - barray = array [doubleboard] of boolean; - carray = array [doublenorm] of boolean; - xarray = array [boardrange] of boardrange; -*/ - -Try (i, q, a, b, c, x) - int i, *q, a[], b[], c[], x[]; -{ - int j; - j = 0; - *q = false; - while ((!*q) && (j != 8)) - { - j = j + 1; - *q = false; - if (b[j] && a[i + j] && c[i - j + 7]) - { - x[i] = j; - b[j] = false; - a[i + j] = false; - c[i - j + 7] = false; - if (i < 8) - { - Try (i + 1, q, a, b, c, x); - if (!*q) - { - b[j] = true; - a[i + j] = true; - c[i - j + 7] = true; - } - } - else - *q = true; - } - } -}; - -Doit () -{ - int i, q; - int a[9], b[17], c[15], x[9]; - i = 0 - 7; - while (i <= 16) - { - if ((i >= 1) && (i <= 8)) - a[i] = true; - if (i >= 2) - b[i] = true; - if (i <= 7) - c[i + 7] = true; - i = i + 1; - }; - - Try (1, &q, b, a, c, x); - if (!q) - printf (" Error in Queens.\n"); -}; - -Queens () -{ - int i; - for (i = 1; i <= 50; i++) - Doit (); -}; - - /* Multiplies two integer matrices. */ - -Initmatrix (m) - int m[rowsize + 1][rowsize + 1]; -{ - int temp, i, j; - for (i = 1; i <= rowsize; i++) - for (j = 1; j <= rowsize; j++) - { - temp = Rand (); - m[i][j] = temp - (temp / 120) * 120 - 60; - } -}; - -Innerproduct (result, a, b, row, column) - int *result, a[rowsize + 1][rowsize + 1], b[rowsize + 1][rowsize + 1], - row, column; - /* computes the inner product of A[row,*] and B[*,column] */ -{ - int i; - *result = 0; - for (i = 1; i <= rowsize; i++) - *result = *result + a[row][i] * b[i][column]; -}; - -Intmm () -{ - int i, j; - Initrand (); - Initmatrix (ima); - Initmatrix (imb); - for (i = 1; i <= rowsize; i++) - for (j = 1; j <= rowsize; j++) - Innerproduct (&imr[i][j], ima, imb, i, j); -}; - - - /* Multiplies two real matrices. */ - -rInitmatrix (m) - float m[rowsize + 1][rowsize + 1]; -{ - int temp, i, j; - for (i = 1; i <= rowsize; i++) - for (j = 1; j <= rowsize; j++) - { - temp = Rand (); - m[i][j] = (temp - (temp / 120) * 120 - 60) / 3; - } -}; - -rInnerproduct (result, a, b, row, column) - float *result, a[rowsize + 1][rowsize + 1], b[rowsize + 1][rowsize + 1]; - int row, column; - /* computes the inner product of A[row,*] and B[*,column] */ -{ - int i; - *result = 0.0; - for (i = 1; i <= rowsize; i++) - *result = *result + a[row][i] * b[i][column]; -}; - -Mm () -{ - int i, j; - Initrand (); - rInitmatrix (rma); - rInitmatrix (rmb); - for (i = 1; i <= rowsize; i++) - for (j = 1; j <= rowsize; j++) - rInnerproduct (&rmr[i][j], rma, rmb, i, j); -}; - - - - - /* A compute-bound program from Forest Baskett. */ - -int -Fit (i, j) - int i, j; -{ - int k; - for (k = 0; k <= piecemax[i]; k++) - if (p[i][k]) - if (puzzl[j + k]) - return (false); - return (true); -}; - -int -Place (i, j) - int i, j; -{ - int k; - for (k = 0; k <= piecemax[i]; k++) - if (p[i][k]) - puzzl[j + k] = true; - piececount[class[i]] = piececount[class[i]] - 1; - for (k = j; k <= size; k++) - if (!puzzl[k]) - { - return (k); - }; - return (0); -}; - -Remove (i, j) - int i, j; -{ - int k; - for (k = 0; k <= piecemax[i]; k++) - if (p[i][k]) - puzzl[j + k] = false; - piececount[class[i]] = piececount[class[i]] + 1; -}; - -int -Trial (j) - int j; -{ - int i, k; - kount = kount + 1; - for (i = 0; i <= typemax; i++) - if (piececount[class[i]] != 0) - if (Fit (i, j)) - { - k = Place (i, j); - if (Trial (k) || (k == 0)) - { - return (true); - } - else - Remove (i, j); - }; - return (false); -}; - -Puzzle () -{ - int i, j, k, m; - for (m = 0; m <= size; m++) - puzzl[m] = true; - for (i = 1; i <= 5; i++) - for (j = 1; j <= 5; j++) - for (k = 1; k <= 5; k++) - puzzl[i + d * (j + d * k)] = false; - for (i = 0; i <= typemax; i++) - for (m = 0; m <= size; m++) - p[i][m] = false; - for (i = 0; i <= 3; i++) - for (j = 0; j <= 1; j++) - for (k = 0; k <= 0; k++) - p[0][i + d * (j + d * k)] = true; - class[0] = 0; - piecemax[0] = 3 + d * 1 + d * d * 0; - for (i = 0; i <= 1; i++) - for (j = 0; j <= 0; j++) - for (k = 0; k <= 3; k++) - p[1][i + d * (j + d * k)] = true; - class[1] = 0; - piecemax[1] = 1 + d * 0 + d * d * 3; - for (i = 0; i <= 0; i++) - for (j = 0; j <= 3; j++) - for (k = 0; k <= 1; k++) - p[2][i + d * (j + d * k)] = true; - class[2] = 0; - piecemax[2] = 0 + d * 3 + d * d * 1; - for (i = 0; i <= 1; i++) - for (j = 0; j <= 3; j++) - for (k = 0; k <= 0; k++) - p[3][i + d * (j + d * k)] = true; - class[3] = 0; - piecemax[3] = 1 + d * 3 + d * d * 0; - for (i = 0; i <= 3; i++) - for (j = 0; j <= 0; j++) - for (k = 0; k <= 1; k++) - p[4][i + d * (j + d * k)] = true; - class[4] = 0; - piecemax[4] = 3 + d * 0 + d * d * 1; - for (i = 0; i <= 0; i++) - for (j = 0; j <= 1; j++) - for (k = 0; k <= 3; k++) - p[5][i + d * (j + d * k)] = true; - class[5] = 0; - piecemax[5] = 0 + d * 1 + d * d * 3; - for (i = 0; i <= 2; i++) - for (j = 0; j <= 0; j++) - for (k = 0; k <= 0; k++) - p[6][i + d * (j + d * k)] = true; - class[6] = 1; - piecemax[6] = 2 + d * 0 + d * d * 0; - for (i = 0; i <= 0; i++) - for (j = 0; j <= 2; j++) - for (k = 0; k <= 0; k++) - p[7][i + d * (j + d * k)] = true; - class[7] = 1; - piecemax[7] = 0 + d * 2 + d * d * 0; - for (i = 0; i <= 0; i++) - for (j = 0; j <= 0; j++) - for (k = 0; k <= 2; k++) - p[8][i + d * (j + d * k)] = true; - class[8] = 1; - piecemax[8] = 0 + d * 0 + d * d * 2; - for (i = 0; i <= 1; i++) - for (j = 0; j <= 1; j++) - for (k = 0; k <= 0; k++) - p[9][i + d * (j + d * k)] = true; - class[9] = 2; - piecemax[9] = 1 + d * 1 + d * d * 0; - for (i = 0; i <= 1; i++) - for (j = 0; j <= 0; j++) - for (k = 0; k <= 1; k++) - p[10][i + d * (j + d * k)] = true; - class[10] = 2; - piecemax[10] = 1 + d * 0 + d * d * 1; - for (i = 0; i <= 0; i++) - for (j = 0; j <= 1; j++) - for (k = 0; k <= 1; k++) - p[11][i + d * (j + d * k)] = true; - class[11] = 2; - piecemax[11] = 0 + d * 1 + d * d * 1; - for (i = 0; i <= 1; i++) - for (j = 0; j <= 1; j++) - for (k = 0; k <= 1; k++) - p[12][i + d * (j + d * k)] = true; - class[12] = 3; - piecemax[12] = 1 + d * 1 + d * d * 1; - piececount[0] = 13; - piececount[1] = 3; - piececount[2] = 1; - piececount[3] = 1; - m = 1 + d * (1 + d * 1); - kount = 0; - if (Fit (0, m)) - n = Place (0, m); - else - printf ("Error1 in Puzzle\n"); - if (!Trial (n)) - printf ("Error2 in Puzzle.\n"); - else if (kount != 2005) - printf ("Error3 in Puzzle.\n"); -}; - - - - /* Sorts an array using quicksort */ - -Initarr () -{ - int i, temp; - Initrand (); - biggest = 0; - littlest = 0; - for (i = 1; i <= sortelements; i++) - { - temp = Rand (); - sortlist[i] = temp - (temp / 100000) * 100000 - 50000; - - if (sortlist[i] > biggest) - biggest = sortlist[i]; - else if (sortlist[i] < littlest) - littlest = sortlist[i]; - }; -}; - -Quicksort (a, l, r) - int a[], l, r; - /* quicksort the array A from start to finish */ -{ - int i, j, x, w; - - i = l; - j = r; - x = a[(l + r) / 2]; - do - { - while (a[i] < x) - i = i + 1; - while (x < a[j]) - j = j - 1; - if (i <= j) - { - w = a[i]; - a[i] = a[j]; - a[j] = w; - i = i + 1; - j = j - 1; - } - } - while (i <= j); - if (l < j) - Quicksort (a, l, j); - if (i < r) - Quicksort (a, i, r); -}; - - -Quick () -{ - Initarr (); - Quicksort (sortlist, 1, sortelements); - if ((sortlist[1] != littlest) || (sortlist[sortelements] != biggest)) - { - printf (" Error in Quick.\n"); - } - -}; - - - /* Sorts an array using treesort */ - -tInitarr () -{ - int i, temp; - Initrand (); - biggest = 0; - littlest = 0; - for (i = 1; i <= sortelements; i++) - { - temp = Rand (); - sortlist[i] = temp - (temp / 100000) * 100000 - 50000; - if (sortlist[i] > biggest) - biggest = sortlist[i]; - else if (sortlist[i] < littlest) - littlest = sortlist[i]; - }; - -}; - -CreateNode (t, n) - struct node **t; - int n; -{ - *t = (struct node *) malloc (sizeof (struct node)); - (*t)->left = nil; - (*t)->right = nil; - (*t)->val = n; -}; - -Insert (n, t) - int n; - struct node *t; - /* insert n into tree */ -{ - if (n > t->val) - if (t->left == nil) - CreateNode (&t->left, n); - else - Insert (n, t->left); - else if (n < t->val) - if (t->right == nil) - CreateNode (&t->right, n); - else - Insert (n, t->right); -}; - -int -Checktree (p) - struct node *p; - /* check by inorder traversal */ -{ - int result; - result = true; - if (p->left != nil) - if (p->left->val <= p->val) - result = false; - else - result = Checktree (p->left) && result; - if (p->right != nil) - if (p->right->val >= p->val) - result = false; - else - result = Checktree (p->right) && result; - return (result); -}; /* checktree */ - -Trees () -{ - int i; - tInitarr (); - tree = (struct node *) malloc (sizeof (struct node)); - tree->left = nil; - tree->right = nil; - tree->val = sortlist[1]; - for (i = 2; i <= sortelements; i++) - Insert (sortlist[i], tree); - if (!Checktree (tree)) - printf (" Error in Tree.\n"); -}; - - - /* Sorts an array using bubblesort */ - -bInitarr () -{ - int i, temp; - Initrand (); - biggest = 0; - littlest = 0; - for (i = 1; i <= srtelements; i++) - { - temp = Rand (); - sortlist[i] = temp - (temp / 100000) * 100000 - 50000; - if (sortlist[i] > biggest) - biggest = sortlist[i]; - else if (sortlist[i] < littlest) - littlest = sortlist[i]; - }; -}; - -Bubble () -{ - int i, j; - bInitarr (); - top = srtelements; - - while (top > 1) - { - - i = 1; - while (i < top) - { - - if (sortlist[i] > sortlist[i + 1]) - { - j = sortlist[i]; - sortlist[i] = sortlist[i + 1]; - sortlist[i + 1] = j; - }; - i = i + 1; - }; - - top = top - 1; - }; - if ((sortlist[1] != littlest) || (sortlist[srtelements] != biggest)) - printf ("Error3 in Bubble.\n"); -}; - - -float -Cos (x) - float x; -/* computes cos of x (x in radians) by an expansion */ -{ - int i, factor; - float result, power; - - result = 1.0; - factor = 1; - power = x; - for (i = 2; i <= 10; i++) - { - factor = factor * i; - power = power * x; - if ((i & 1) == 0) - { - if ((i & 3) == 0) - result = result + power / factor; - else - result = result - power / factor; - }; - }; - return (result); -}; - -int -Min0 (arg1, arg2) - int arg1, arg2; -{ - if (arg1 < arg2) - return (arg1); - else - return (arg2); -}; - -Printcomplex (arg1, arg2, zarray, start, finish, increment) - int arg1, arg2, start, finish, increment; - struct complex zarray[]; -{ - int i; - printf ("\n"); - - i = start; - do - { - printf (" %15.3e%15.3e", zarray[i].rp, zarray[i].ip); - i = i + increment; - printf (" %15.3e%15.3e", zarray[i].rp, zarray[i].ip); - printf ("\n"); - i = i + increment; - } - while (i <= finish); - -}; - -Uniform11 (iy, yfl) - int iy; - float yfl; -{ - iy = (4855 * iy + 1731) & 8191; - yfl = iy / 8192.0; -} /* uniform */ ; - -Exptab (n, e) - int n; - struct complex e[]; - -{ /* exptab */ - float theta, divisor, h[26]; - int i, j, k, l, m; - - theta = 3.1415926536; - divisor = 4.0; - for (i = 1; i <= 25; i++) - { - h[i] = 1 / (2 * Cos (theta / divisor)); - divisor = divisor + divisor; - }; - - m = n / 2; - l = m / 2; - j = 1; - e[1].rp = 1.0; - e[1].ip = 0.0; - e[l + 1].rp = 0.0; - e[l + 1].ip = 1.0; - e[m + 1].rp = -1.0; - e[m + 1].ip = 0.0; - - do - { - i = l / 2; - k = i; - - do - { - e[k + 1].rp = h[j] * (e[k + i + 1].rp + e[k - i + 1].rp); - e[k + 1].ip = h[j] * (e[k + i + 1].ip + e[k - i + 1].ip); - k = k + l; - } - while (k <= m); - - j = Min0 (j + 1, 25); - l = i; - } - while (l > 1); - -} /* exptab */ ; - -Fft (n, z, w, e, sqrinv) - int n; - struct complex z[], w[]; - struct complex e[]; - float sqrinv; -{ - int i, j, k, l, m, index; - m = n / 2; - l = 1; - - do - { - k = 0; - j = l; - i = 1; - - do - { - - do - { - w[i + k].rp = z[i].rp + z[m + i].rp; - w[i + k].ip = z[i].ip + z[m + i].ip; - w[i + j].rp = e[k + 1].rp * (z[i].rp - z[i + m].rp) - - e[k + 1].ip * (z[i].ip - z[i + m].ip); - w[i + j].ip = e[k + 1].rp * (z[i].ip - z[i + m].ip) - + e[k + 1].ip * (z[i].rp - z[i + m].rp); - i = i + 1; - } - while (i <= j); - - k = j; - j = k + l; - } - while (j <= m); - - /*z = w ; */ index = 1; - do - { - z[index] = w[index]; - index = index + 1; - } - while (index <= n); - l = l + l; - } - while (l <= m); - - for (i = 1; i <= n; i++) - { - z[i].rp = sqrinv * z[i].rp; - z[i].ip = -sqrinv * z[i].ip; - }; - -}; - -Oscar () -{ /* oscar */ - int i; - Exptab (fftsize, e); - seed = 5767; - for (i = 1; i <= fftsize; i++) - { - Uniform11 (seed, zr); - Uniform11 (seed, zi); - z[i].rp = 20.0 * zr - 10.0; - z[i].ip = 20.0 * zi - 10.0; - }; - - - for (i = 1; i <= 20; i++) - { - Fft (fftsize, z, w, e, 0.0625); -// Printcomplex( 6, 99, z, 1, 256, 17 ); - }; -} /* oscar */ ; - -main () -{ - int i; - fixed = 0.0; - floated = 0.0; - printf ("Starting \n"); -/* rewrite (output); */ - setbuf(stdout, nil); - printf (" Perm"); - timer = Getclock (); - Perm (); - xtimes[1] = Getclock () - timer; - fixed = fixed + permbase * xtimes[1]; - floated = floated + permbase * xtimes[1]; - printf (" Towers"); - timer = Getclock (); - Towers (); - xtimes[2] = Getclock () - timer; - fixed = fixed + towersbase * xtimes[2]; - floated = floated + towersbase * xtimes[2]; - printf (" Queens"); - timer = Getclock (); - Queens (); - xtimes[3] = Getclock () - timer; - fixed = fixed + queensbase * xtimes[3]; - floated = floated + queensbase * xtimes[3]; - printf (" Intmm"); - timer = Getclock (); - Intmm (); - xtimes[4] = Getclock () - timer; - fixed = fixed + intmmbase * xtimes[4]; - floated = floated + intmmbase * xtimes[4]; - printf (" Mm"); - timer = Getclock (); - Mm (); - xtimes[5] = Getclock () - timer; - fixed = fixed + mmbase * xtimes[5]; - floated = floated + fpmmbase * xtimes[5]; - printf (" Puzzle"); - timer = Getclock (); - Puzzle (); - xtimes[6] = Getclock () - timer; - fixed = fixed + puzzlebase * xtimes[6]; - floated = floated + puzzlebase * xtimes[6]; - printf (" Quick"); - timer = Getclock (); - Quick (); - xtimes[7] = Getclock () - timer; - fixed = fixed + quickbase * xtimes[7]; - floated = floated + quickbase * xtimes[7]; - printf (" Bubble"); - timer = Getclock (); - Bubble (); - xtimes[8] = Getclock () - timer; - fixed = fixed + bubblebase * xtimes[8]; - floated = floated + bubblebase * xtimes[8]; - printf (" Tree"); - timer = Getclock (); - Trees (); - xtimes[9] = Getclock () - timer; - fixed = fixed + treebase * xtimes[9]; - floated = floated + treebase * xtimes[9]; - printf (" FFT"); - timer = Getclock (); - Oscar (); - xtimes[10] = Getclock () - timer; - fixed = fixed + fftbase * xtimes[10]; - floated = floated + fpfftbase * xtimes[10]; - printf ("\n"); - for (i = 1; i <= 10; i++) - printf ("%8d", xtimes[i]); - printf ("\n"); - /* compute composites */ - printf ("\n"); - printf ("Nonfloating point composite is %10.0f\n", fixed / 10.0); - printf ("\n"); - printf ("Floating point composite is %10.0f\n", floated / 10.0); -} diff --git a/lib/CPUs/MIPS/bsp/examples/startup.S b/lib/CPUs/MIPS/bsp/examples/startup.S deleted file mode 100644 index b3eb382..0000000 --- a/lib/CPUs/MIPS/bsp/examples/startup.S +++ /dev/null @@ -1,87 +0,0 @@ - .file "startup.S" - - .section .rodata - .data -argv0: .asciz "\"This-MIPS-program\"" -argv: .word argv0 - - .text - .section .start, "ax" - .extern _init - .extern libsys_init - .extern _exc_vect_start - .extern _xcpt_handler - .align 2 - .globl _start -_start: - .set noreorder - j init - nop - .set reorder - - .text - .set noreorder -init: - # Set stack pointer - la $sp, stack_ptr - # Set global pointer - la $gp, _gp - - # zero bss - la $8, __bss_start - la $9, _end -$zeroise: - sw $0, 0($8) - bne $8, $9, $zeroise - addiu $8, 4 - - # Install exception vector jump code - la $t1, _exc_vect_copy_start - la $t2, _exc_vect_copy_end - la $t0, _exc_vect_start - -$install: lw $v0, 0($t1) - addiu $t1, 4 - sw $v0, 0($t0) - bne $t1, $t2, $install - addiu $t0, 4 - - # Call _init - la $k0, _init - jalr $k0 - nop - - # Call libsys_init - la $k0, libsys_init - jalr $k0 - nop - - # Set user-mode - mfc0 $a0, $12 - li $a1, 3 - or $a0, $a1 - mtc0 $a0, $12 - - # Set environment - li $a0, 1 - la $a1, argv - - # Call main - la $k0, main - jalr $k0 - nop - - # Terminate after main returns -_terminate: - nop - la $t0, exit - jalr $t0 - move $a0, $v0 - -_exc_vect_copy_start: - la $k0, _xcpt_handler - jr $k0 - nop -_exc_vect_copy_end: - - .set reorder diff --git a/lib/CPUs/MIPS/bsp/examples/test_ac97.c b/lib/CPUs/MIPS/bsp/examples/test_ac97.c deleted file mode 100644 index 12dce79..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_ac97.c +++ /dev/null @@ -1,310 +0,0 @@ -#include -#include -#include -#include -#include -#include "libsys.h" - -#define PI 3.1415926535897932384626433832795 -#define SAMPLE_RATE 48000 -#define BUF_SIZE (2*4800) -#define REC_BUF_SIZE (5*60*2*SAMPLE_RATE) - -INT32 *buffer; -INT32 *rec_buffer; -UINT32 buf_size; - -INT32 * volatile pPtr_r; -INT32 * volatile pPtr_w; -UINT32 gcnt, led_cnt; -volatile INT32 sample_left, sample_right; - -#define AC97_REG_RESET 0x00 -#define AC97_REG_VOLO_MST 0x02 -#define AC97_REG_VOLO_HP 0x04 -#define AC97_REG_VOLO_MONO 0x06 -#define AC97_REG_VOLI_BEEP 0x0A -#define AC97_REG_VOLI_PHONE 0x0C -#define AC97_REG_VOLI_MIC 0x0E -#define AC97_REG_VOLI_LINE 0x10 -#define AC97_REG_VOLI_CD 0x12 -#define AC97_REG_VOLI_VIDEO 0x14 -#define AC97_REG_VOLI_AUX 0x16 -#define AC97_REG_VOLI_PCM 0x18 -#define AC97_REG_REC_SRC 0x1A -#define AC97_REG_REC_GAIN 0x1C -#define AC97_REG_EXTCTRL 0x2A -#define AC97_REG_RATE_DAC 0x2C -#define AC97_REG_RATE_ADC 0x32 - -UINT32 ac97_status(UINT32 reg) -{ - UINT32 offset; - volatile UINT32 *pAC_stat = (UINT32*)SYS_AC97_STAT; - volatile UINT32 *pAC_stat_ac = (UINT32*)SYS_AC97_ACSTAT; - - offset = (reg & 0x7E); - - // Wait if previous command is still pending - while(*pAC_stat & 1); - - *(pAC_stat_ac + offset) = 0; - - // Wait for data valid - while(!(*pAC_stat & 2)); - - return *pAC_stat_ac; -} - -void ac97_ctrl(UINT32 reg, UINT16 value) -{ - UINT32 offset; - volatile UINT32 *pAC_stat = (UINT32*)SYS_AC97_STAT; - volatile UINT32 *pAC_ctrl_ac = (UINT32*)SYS_AC97_ACCTRL; - - offset = (reg & 0x7E); - - // Wait if previous command is still pending - while(*pAC_stat & 1); - - *(pAC_ctrl_ac + offset) = value; - -} - -void ac97_isr_rec(void) -{ - int i, size; - volatile UINT32 *pReg = (UINT32*)SYS_LED_PORT; - volatile UINT32 *pAC_stat = (UINT32*)SYS_AC97_STAT; - volatile INT32 *pAC_pcm = (INT32*)SYS_AC97_PCM; - - if (!gcnt) - { - gcnt = SAMPLE_RATE; - *pReg = led_cnt++; - } - gcnt--; - - *pPtr_w++ = pAC_pcm[3]; - if (pPtr_w == &buffer[buf_size]) - pPtr_w = buffer; - - *pPtr_w++ = pAC_pcm[4]; - if (pPtr_w == &buffer[buf_size]) - pPtr_w = buffer; - - CP0_TR_write(pAC_pcm[3]); - CP0_TR_write(pAC_pcm[4]); - -} - -void ac97_isr_play(void) -{ - int i, size; - volatile UINT32 *pReg = (UINT32*)SYS_LED_PORT; - volatile UINT32 *pAC_stat = (UINT32*)SYS_AC97_STAT; - volatile INT32 *pAC_pcm = (INT32*)SYS_AC97_PCM; - - if (!gcnt) - { - gcnt = SAMPLE_RATE; - *pReg = led_cnt++; - } - gcnt--; - - *pAC_pcm = *pPtr_r++; - if (pPtr_r == &buffer[buf_size]) - pPtr_r = buffer; -} - -void ac97_isr_pass(void) -{ - int i, size; - volatile UINT32 *pReg = (UINT32*)SYS_LED_PORT; - volatile UINT32 *pAC_stat = (UINT32*)SYS_AC97_STAT; - volatile INT32 *pAC_pcm = (INT32*)SYS_AC97_PCM; - - if (!gcnt) - { - gcnt = SAMPLE_RATE; - *pReg = led_cnt++; - } - gcnt--; - - if (*pAC_stat & 0x08) - { - -// CP0_TR_write(pAC_pcm[3]); -// CP0_TR_write(pAC_pcm[4]); - - *pPtr_w++ = pAC_pcm[3]; - if (pPtr_w == &buffer[buf_size]) - pPtr_w = buffer; - - *pPtr_w++ = pAC_pcm[4]; - if (pPtr_w == &buffer[buf_size]) - pPtr_w = buffer; - } - - if (pPtr_r != pPtr_w) - { - *pAC_pcm = *pPtr_r++; - if (pPtr_r == &buffer[buf_size]) - pPtr_r = buffer; - } - -} - -int main (void) -{ - int result, i, j; - volatile UINT32 *pReg = (UINT32*)SYS_LED_PORT; - volatile UINT32 *pGPIO1 = (UINT32*)SYS_GPIO1; - volatile UINT32 *pAC_ctrl = (UINT32*)SYS_AC97_CTRL; - volatile UINT32 *pAC_stat = (UINT32*)SYS_AC97_STAT; - volatile UINT32 *pAC_ctrl_ac = (UINT32*)SYS_AC97_ACCTRL; - volatile UINT32 *pAC_stat_ac = (UINT32*)SYS_AC97_ACSTAT; - volatile UINT32 *pAC_pcm = (UINT32*)SYS_AC97_PCM; - double phi, dphi, y, mean; - char sel, cmd; - char buf[1024]; - FILE *pFile = stdout; - -// setbuf(stderr, NULL); -// - fprintf(pFile, "AC-97 Test\n"); - fprintf(pFile, "Status : %8.8X\n", *pAC_ctrl); - - ac97_ctrl(AC97_REG_VOLO_MST, 0); - ac97_ctrl(AC97_REG_VOLO_HP, 0); - ac97_ctrl(AC97_REG_VOLI_LINE, 0x8808); - ac97_ctrl(AC97_REG_VOLI_PCM, 0x0808); - ac97_ctrl(AC97_REG_REC_SRC, 0x0404); - ac97_ctrl(AC97_REG_REC_GAIN, 0); - ac97_ctrl(AC97_REG_EXTCTRL, 1); - - ac97_ctrl(AC97_REG_RATE_DAC, SAMPLE_RATE); - ac97_ctrl(AC97_REG_RATE_ADC, SAMPLE_RATE); - - led_cnt = 0; - gcnt = SAMPLE_RATE; - - fprintf(pFile, "DAC-Rate : %d\n", ac97_status(AC97_REG_RATE_DAC)); - fprintf(pFile, "ADC-Rate : %d\n", ac97_status(AC97_REG_RATE_ADC)); - - *pGPIO1 = 0x04; - - while(1) - { - fprintf(pFile, "Aufnehmen und Abspielen (1)\n"); - fprintf(pFile, "Sinus Ton (2)\n"); - fprintf(pFile, "Pass through (3)\n"); - fprintf(pFile, "Eingabe: "); - - scanf("%c", &sel); -// sel = 0x31; - - if (sel == 0x31) - { - buf_size = REC_BUF_SIZE; - buffer = (INT32*)malloc(REC_BUF_SIZE*sizeof(INT32)); -// memset(buffer, 0, sizeof(REC_BUF_SIZE*sizeof(INT32))); - pPtr_r = buffer; - pPtr_w = buffer; - - ac97_ctrl(AC97_REG_VOLI_LINE, 0x0808); - - cmd = 0; - while(1) - { - switch (cmd) - { - case 'r': - ac97_ctrl(AC97_REG_VOLI_LINE, 0x0808); - pPtr_w = buffer; - fprintf(pFile, "Aufnahme\n"); - interrupt_register(5, ac97_isr_rec); - interrupt_enable(5); - *pAC_ctrl = 0x24; - break; - - case 'p': - ac97_ctrl(AC97_REG_VOLI_LINE, 0x8808); - pPtr_r = buffer; - fprintf(pFile, "Wiedergabe\n"); - interrupt_register(5, ac97_isr_play); - interrupt_enable(5); - *pAC_ctrl = 0x12; - break; - - case ' ': - ac97_ctrl(AC97_REG_VOLI_LINE, 0x0808); - fprintf(pFile, "Stop\n"); - memset(buffer, 0, sizeof(REC_BUF_SIZE*sizeof(INT32))); - *pAC_ctrl = 0x00; - pPtr_r = buffer; - pPtr_w = buffer; - break; - - default: - fprintf(pFile, "Aufnahme (R)\n"); - fprintf(pFile, "Wiedergabe (P)\n"); - fprintf(pFile, "Stop (Space)\n"); - break; - } - cmd = readchar(0); - } - } - if (sel == 0x32) - { - buf_size = BUF_SIZE; - buffer = (INT32*)malloc(REC_BUF_SIZE*sizeof(INT32)); - memset(buffer, 0, sizeof(REC_BUF_SIZE*sizeof(INT32))); - pPtr_r = buffer; - pPtr_w = buffer; - - dphi = 120*2*PI/BUF_SIZE; - phi = 0; - for (i=0; i < BUF_SIZE/2; i++) - { - y = cos(phi); - buffer[2*i+0] = (INT32)(32000*y); - buffer[2*i+1] = (INT32)(32000*y); - phi = fmod((phi + dphi), 2.0*PI); - } - - fprintf(stderr, "Status : %8.8X\n", *pAC_ctrl); - - interrupt_register(5, ac97_isr_play); - interrupt_enable(5); - *pAC_ctrl = 0x12; - - fprintf(stderr, "Status : %8.8X\n", *pAC_ctrl); - - while(1) - { - fprintf(stderr, "Status : %8.8X\n", *pAC_ctrl); - } - } - if (sel == 0x33) - { - - buf_size = BUF_SIZE; - buffer = (INT32*)malloc(BUF_SIZE*sizeof(INT32)); - memset(buffer, 0, sizeof(BUF_SIZE*sizeof(INT32))); - pPtr_r = buffer; - pPtr_w = buffer; - *pAC_ctrl = 0x32; - interrupt_register(5, ac97_isr_pass); - interrupt_enable(5); - - fprintf(stdout, "Status : %8.8X\n", *pAC_ctrl); - - while(1); - } - } - - return 0; - -} - diff --git a/lib/CPUs/MIPS/bsp/examples/test_dcache.c b/lib/CPUs/MIPS/bsp/examples/test_dcache.c deleted file mode 100644 index 74327d1..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_dcache.c +++ /dev/null @@ -1,61 +0,0 @@ -#include -#include -#include "libsys.h" -#include "libsys.h" - -UINT32 tset(UINT32 *pMem) -{ - - __asm__ - ( - ".set noreorder\n" - ".set nomacro\n" - "addiu $t1, $0, 0x5555\n" - "lw $t0, 0(%[pMem])\n" - "sw $t1, 24(%[pMem])\n" - "addiu $t0, 8\n" - "sw $t0, 0(%[pMem])\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "nop\n" - "lw $v0, 24(%[pMem])\n" - ".set macro\n" - ".set reorder\n" - : - : [pMem] "r" (pMem) - : "t0", "t1" - ); -} - -int main(void) -{ - int i; - volatile int *pLED = (int*)SYS_LED_PORT; - UINT64 *pBuf64; - UINT32 *pPtr; - - pBuf64 = (UINT64*)0x4000FC80; //malloc(1024*sizeof(UINT32)); - - pPtr = (UINT32*)pBuf64; - - for(i=0; i < 1024; i++) - *pPtr++ = i; - - pPtr = (UINT32*)pBuf64; - sputs("Ptr: "); print_word((int)pPtr); sputs("\n"); - DCACHE_invalidate_all(); - - - *pLED = tset(pPtr); - - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/test_endianess.c b/lib/CPUs/MIPS/bsp/examples/test_endianess.c deleted file mode 100644 index 8f0d737..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_endianess.c +++ /dev/null @@ -1,64 +0,0 @@ -#include -#include -#include -#include "libsys.h" - -#define TEST_SIZE 32768 -int main (void) -{ - int i; - UINT16 *ram16; - UINT32 sr; - UINT32 volatile *pReg = (UINT32*)SYS_LED_PORT; - - *pReg = 0; - - sr = CP0_SR_read(); - - ram16 = (UINT16*)calloc(TEST_SIZE/2,sizeof(UINT16)); - - CP0_SR_write(sr | (1 << 25)); - - for (i=0; i < TEST_SIZE/2; i++) - ram16[i] = (UINT16)i; - - for (i=TEST_SIZE/2-1; i >= 0; i--) - if (ram16[i] != (UINT16)i) - break; - - i++; - if (i) - *pReg = 0xFFFFFFFF; - else - *pReg = 1; - - - free(ram16); - - ram16 = (UINT16*)calloc(TEST_SIZE/2,sizeof(UINT16)); - - *pReg = 0; - CP0_SR_write(sr & ~(1 << 25)); - - for (i=0; i < TEST_SIZE/2; i++) - ram16[i] = (UINT16)i; - - for (i=TEST_SIZE/2-1; i >= 0; i--) - if (ram16[i] != (UINT16)i) - break; - - i++; - if (i) - *pReg = 0xFFFFFFFF; - else - *pReg = 1; - - - free(ram16); - - -// sputs("Status : ");print_word(sr);sputs("\n"); - - return 0; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/test_exception.c b/lib/CPUs/MIPS/bsp/examples/test_exception.c deleted file mode 100644 index 34a0bca..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_exception.c +++ /dev/null @@ -1,282 +0,0 @@ -#include -#include -#include "libsys.h" - -void _exc_break(void) -{ - __asm - ( - ".set noreorder\n" - "break 0x9\n" - ".set reorder\n" - - ); -} - -void _exc_syscall(UINT32 code, UINT32 arg) -{ - __asm - ( - "move $v0, %[code]\n" - "move $a0, %[arg]\n" - "syscall\n" - : - : [code] "r" (code), [arg] "r" (arg) - : "v0", "a0" - - ); -} - -void _exc_arith(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x7FFFFFFF\n" - " addi $t1, $t0, 2\n" - ".set reorder\n" - - ); -} - -void _exc_store_err(void) -{ - volatile int *pSrc = (int*)SYS_TIMER_SEC; - volatile int *pDst = (int*)0x40000001; - - *pDst = *pSrc; - -} - -void _exc_load_err(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x40000000\n" - " li $t1, 0x40000000\n" - " lw $t1, 0($t1)\n" - " lw $t0, 2($t0)\n" - " lw $t1, 4($t0)\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_kaddr_err(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x80000000\n" - " jr $t0\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_iaddr_daddr_err(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x40000003\n" - " li $t1, 0x40000002\n" - " jr $t0\n" - " lw $t1, 0($t1)\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_daddr_iaddr_err(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x40000003\n" - " li $t1, 0x40000002\n" - " lw $t1, 0($t1)\n" - " jr $t0\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_iaddr_err(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x40000003\n" - " jr $t0\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_ri(void) -{ - __asm - ( - ".set noreorder\n" - " li $t0, 0x40010000\n" - " li $t1, 0x9c563442\n" - " sw $t1, 0($t0)\n" - " jr $t0\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_ibe(void) -{ - __asm - ( - ".set noreorder\n" - " li $t1, 0x10000000\n" - " jr $t1\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void _exc_dbe(void) -{ - __asm - ( - ".set noreorder\n" - " li $t1, 0x10000000\n" - " lw $t0, 0($t1)\n" - "nop\n" - " jr $t0\n" - "nop\n" - ".set reorder\n" - - ); - -} - -void handler0(void) -{ - printf("Interrupt 0\n"); - interrupt_clr(0); -} - -void handler1(void) -{ - printf("Interrupt 1\n"); - interrupt_clr(1); -} - -int main(void) -{ - int buf[256]; - int i, sel; - - interrupt_register(0, handler0); - interrupt_enable(0); - interrupt_register(1, handler1); - interrupt_enable(1); - - while(1) - { - printf("Welche exception möchten Sie testen?\n"); - printf(" 1 : Reserved instruction\n"); - printf(" 2 : Privileged address (BadVAddr = 0x80000000)\n"); - printf(" 3 : Arithmetic overflow\n"); - printf(" 4 : Syscall\n"); - printf(" 5 : Breakpoint\n"); - printf(" 6 : Load error on instruction (BadVAddr = 0x40000003)\n"); - printf(" 7 : Load error on data (BadVAddr = 0x40000002)\n"); - printf(" 8 : Store error on data (BadVAddr = 0x40000001)\n"); - printf(" 9 : Bus error on instruction\n"); - printf("10 : Bus error on data\n"); - printf("11 : SW-interrupt 0\n"); - printf("12 : SW-interrupt 1\n"); - printf("13 : Load error on instruction and Load error on data (BadVAddr = 0x40000003)\n"); - printf("14 : Load error on data and Load error on instruction (BadVAddr = 0x40000002)\n"); - - scanf("%d", &sel); - printf("Jetzt kommt die exception (%d)!\n", sel); - - switch(sel) - { - case 1: - _exc_ri(); - break; - - case 2: - _exc_kaddr_err(); - break; - - case 3: - _exc_arith(); - break; - - case 4: - _exc_syscall(4, (UINT32)((char*)"Hallo Syscall (")); - _exc_syscall(1, 12345678); - _exc_syscall(4, (UINT32)((char*)")\n")); - break; - - case 5: - _exc_break(); - break; - - case 6: - _exc_iaddr_err(); - break; - - case 7: - _exc_load_err(); - break; - - case 8: - _exc_store_err(); - break; - - case 9: - printf("IBE: Exception not implemented in current CPU!\nPush reset to restart!\n"); - _exc_ibe(); - break; - - case 10: - printf("DBE: Exception not implemented in current CPU!\nPush reset to restart!\n"); - _exc_dbe(); - break; - - case 11: - case 12: - interrupt_set(sel-11); - break; - - case 13: - _exc_iaddr_daddr_err(); - break; - - case 14: - _exc_daddr_iaddr_err(); - break; - - default: - break; - } - sel = 0; - } - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/test_flash.c b/lib/CPUs/MIPS/bsp/examples/test_flash.c deleted file mode 100644 index 7d40961..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_flash.c +++ /dev/null @@ -1,94 +0,0 @@ -/************************************************************************/ -/* */ -/* AMD CFI Enabled Flash Memory Drivers */ -/* File name: CFIDRIVE.C */ -/* Revision: 1.0 5/07/98 */ -/* */ -/* Copyright (c) 1998 ADVANCED MICRO DEVICES, INC. All Rights Reserved. */ -/* This software is unpublished and contains the trade secrets and */ -/* confidential proprietary information of AMD. Unless otherwise */ -/* provided in the Software Agreement associated herewith, it is */ -/* licensed in confidence "AS IS" and is not to be reproduced in whole */ -/* or part by any means except for backup. Use, duplication, or */ -/* disclosure by the Government is subject to the restrictions in */ -/* paragraph (b) (3) (B) of the Rights in Technical Data and Computer */ -/* Software clause in DFAR 52.227-7013 (a) (Oct 1988). */ -/* Software owned by */ -/* Advanced Micro Devices, Inc., */ -/* One AMD Place, */ -/* P.O. Box 3453 */ -/* Sunnyvale, CA 94088-3453. */ -/************************************************************************/ -/* This software constitutes a basic shell of source code for */ -/* programming all AMD Flash components. AMD */ -/* will not be responsible for misuse or illegal use of this */ -/* software for devices not supported herein. AMD is providing */ -/* this source code "AS IS" and will not be responsible for */ -/* issues arising from incorrect user implementation of the */ -/* source code herein. It is the user's responsibility to */ -/* properly design-in this source code. */ -/* */ -/************************************************************************/ - -#include -#include -#include "cfiflash.h" -#include "libsys.h" - -#define TEST_SIZE (1024*1024) -#define FLASH_OFFSET 0x700000 -int main(void) -{ - int i; - flash_t flash; - UINT8 *pFlash = (UINT8*)0xA4000000; - UINT32 result; - UINT8 *pBuf; - - setbuf(stdout, NULL); - result = flash_find(&flash, 0xA4000000); - - if (result < 0) - { - printf("flash_find() error!\n"); - return 1; - } - - printf("Found Flash at %8.8X\n", (UINT32)flash.pBase); - - pBuf = (UINT8*)malloc(TEST_SIZE); - - for (i=0; i < TEST_SIZE; i++) - pBuf[i] = i; - - printf("Flash erase from %8.8X to %8.8X...", FLASH_OFFSET, FLASH_OFFSET+TEST_SIZE); - result = flash_erase(&flash, FLASH_OFFSET, TEST_SIZE); - if (result < 0) - { - printf("error!\n"); - return 1; - } - printf("OK\n"); - - printf("Flash program from %8.8X to %8.8X...", FLASH_OFFSET, FLASH_OFFSET+TEST_SIZE); - result = flash_program(&flash, FLASH_OFFSET, pBuf, TEST_SIZE); - if (result < 0) - { - printf("error!\n"); - return 1; - } - printf("OK\n"); - - printf("Flash verify from %8.8X to %8.8X...", FLASH_OFFSET, FLASH_OFFSET+TEST_SIZE); - result = flash_verify(&flash, FLASH_OFFSET, pBuf, TEST_SIZE); - if (result < 0) - { - printf("error!\n"); - return 1; - } - printf("OK\n"); - -// PrintBuffer8((UINT8*)pFlash, 16, TEST_SIZE); - - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/test_hpi.c b/lib/CPUs/MIPS/bsp/examples/test_hpi.c deleted file mode 100644 index 407d070..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_hpi.c +++ /dev/null @@ -1,848 +0,0 @@ -#include -#include -#include -#include -#include "libsys.h" -#include "cfiflash.h" -#include "hpi.h" - -static volatile UINT32 _g_uart_msg; -static volatile UINT32 _g_rst; -static volatile UINT32 _g_sus; -static volatile UINT32 _g_cfg; - -void uart_handler(void) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT; - volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA; - - while((SYS_PS2_BIT_RX_AVAIL & *pUART_stat)) - { - _g_uart_msg = *pUART_data; - } - -} - -void PrintDevRegs(UINT devid) -{ - int i; - UINT32 reg_base1, reg_base2, reg_addr; - - if ((devid < 1) || (devid > 2)) - return; - - printf("********************************************************\n"); - printf("Device %d status\n", devid); - printf("********************************************************\n"); - reg_base1 = 0x0200 + (devid-1)*0x80; - reg_base2 = 0xC080 + (devid-1)*0x20; - reg_addr = reg_base2 + 4; - printf("Port select (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base2 + 10; - printf("USB control (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base2 + 12; - printf("Int. enable (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base2 + 14; - printf("Address (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base2 + 16; - printf("Status (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base2 + 18; - printf("Frame # reg (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base2 + 20; - printf("SOF/EOP cnt (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - for (i=0; i < 8; i++) - { - printf("EP# %d\n", i); - reg_addr = reg_base1 + 16*i + 0; - printf("Control (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base1 + 16*i + 2; - printf("Address (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base1 + 16*i + 4; - printf("Count (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base1 + 16*i + 6; - printf("Status (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - reg_addr = reg_base1 + 16*i + 8; - printf("Count result (%4.4X) : %4.4X\n", reg_addr, hpi_read_reg(reg_addr)); - - } -} - -typedef struct _sdev_descr_t -{ - UINT8 size; // length - UINT8 type; // desc type - UINT16 usb_spec; // USB spec - UINT8 devclass; // device class - UINT8 subclass; // sub class - UINT8 protocol; // protocol - UINT8 max_packet_size; // max packet size for endpoint 0 - UINT16 vendor_id; // Vendor ID - UINT16 product_id; // Product ID - UINT16 device_id; // device release number - UINT8 man_str_index; // index of manufacture string - UINT8 prod_str_index; // index of product string - UINT8 sn_str_index; // index of serial number string - UINT8 nconfs; // number of configurations -} __attribute__ ((__packed__)) dev_descr_t; - -typedef struct _sconf_descr_t -{ - UINT8 size; // length of this config - UINT8 type; // desc type - UINT16 total_size; // Total configuration desc length including this config and following descriptions - UINT8 nifaces; // Number of interface descriptions following this - UINT8 conf_id; // config number - UINT8 conf_str_index; // index of string describing config - UINT8 attr; // attributes (e.g. bus powered) - UINT8 current; // 2mA x (max. 250 => 500mA) -} __attribute__ ((__packed__)) conf_descr_t; - -typedef struct _siface_descr_t -{ - UINT8 size; // length of this config - UINT8 type; // desc type - UINT8 base; // base number - UINT8 alt; // alt - UINT8 neps; // number of endpoint description following this - UINT8 iface_class; // interface class (vendor) - UINT8 subclass; // subclass - UINT8 iface_proto; // interface proto (vendor) - UINT8 iface_str_index; -} __attribute__ ((__packed__)) iface_descr_t; - -typedef struct _sep_descr_t -{ - UINT8 size; // length of this config - UINT8 type; // type (endpoint) - UINT8 type_num; // type/number (Host use WriteFile) - UINT8 bulk; // Bulk - UINT16 pkt_size; // packet size - UINT8 interval; // interval -} __attribute__ ((__packed__)) ep_descr_t; - -typedef struct _sotg_descr_t -{ - UINT8 size; // length of this config - UINT8 type; // type (OTG) - UINT8 hnp_srp; // HNP|SRP support -} __attribute__ ((__packed__)) otg_descr_t; - -typedef struct _sstr_descr_hdr_t -{ - UINT8 size; // length of this config - UINT8 type; // type -} __attribute__ ((__packed__)) str_descr_hdr_t; - -typedef struct _scfg_inst_t -{ - usb_irp_t *pIRP_rx; - usb_irp_t *pIRP_tx; -} cfg_inst_t; - -UINT32 conf_write(UINT8 *pConfDescr, UINT32 neps, ep_descr_t *pEP) -{ - UINT32 pos, size; - conf_descr_t cfg; - iface_descr_t iface; - otg_descr_t otg_descr; - - // Fill config description - cfg.size = sizeof(conf_descr_t); - cfg.type = 2; - cfg.total_size = sizeof(conf_descr_t) + sizeof(iface_descr_t) + neps*sizeof(ep_descr_t) + sizeof(otg_descr_t); - cfg.nifaces = 1; // can handle only one interface per config - cfg.conf_id = 1; - cfg.conf_str_index = 0; - cfg.attr = 0x80; - cfg.current = 50; - - // Copy config description - pos = 0; - size = sizeof(conf_descr_t); - memcpy(&pConfDescr[pos], &cfg, size); - - // Fill interface description - iface.size = sizeof(iface_descr_t); - iface.type = 4; - iface.base = 0; - iface.alt = 0; - iface.neps = neps; - iface.iface_class = 0; - iface.subclass = 0; - iface.iface_proto = 0; - iface.iface_str_index = 0; - - // Copy interface description - pos += size; - size = sizeof(iface_descr_t); - memcpy(&pConfDescr[pos], &iface, size); - - // Copy N end point descriptions - pos += size; - size = neps*sizeof(ep_descr_t); - memcpy(&pConfDescr[pos], pEP, size); - - // Fill OTG description - otg_descr.size = sizeof(otg_descr_t); - otg_descr.type = 9; // OTG - otg_descr.hnp_srp = 3; // HNP|SRP supported - - // Copy OTG description - pos += size; - size = sizeof(ep_descr_t); - memcpy(&pConfDescr[pos], &otg_descr, size); - - pos += size; - - return pos; -} - -UINT32 str_write(UINT8 *pStrDescr, UINT8 *pStr0, UINT8 *pStr1, UINT8 *pStr2) -{ - int i; - UINT32 pos, size, strsize; - str_descr_hdr_t *pStrHdr; - UINT16 *pStr; - - pos = 0; - size = sizeof(str_descr_hdr_t); - strsize = 2; - pStrHdr = (str_descr_hdr_t*)&pStrDescr[pos]; - pStrHdr->size = size + strsize; - pStrHdr->type = 3; - - pos += size; - pStr = (UINT16*)&pStrDescr[pos]; - - *pStr = 0x0409; - - // String 0 - pos += size; - size = sizeof(str_descr_hdr_t); - strsize = strlen(pStr0); - - pStrHdr = (str_descr_hdr_t*)&pStrDescr[pos]; - pStrHdr->size = sizeof(str_descr_hdr_t) + 2*strsize; - pStrHdr->type = 3; - - pos += size; - size = 2*strsize; - pStr = (UINT16*)&pStrDescr[pos]; - - for (i=0; i < strsize; i++) - pStr[i] = (UINT16)pStr0[i]; - - // String 1 - pos += size; - size = sizeof(str_descr_hdr_t); - strsize = strlen(pStr1); - - pStrHdr = (str_descr_hdr_t*)&pStrDescr[pos]; - pStrHdr->size = sizeof(str_descr_hdr_t) + 2*strsize; - pStrHdr->type = 3; - - pos += size; - size = 2*strsize; - pStr = (UINT16*)&pStrDescr[pos]; - - for (i=0; i < strsize; i++) - pStr[i] = (UINT16)pStr1[i]; - - // String 2 - pos += size; - size = sizeof(str_descr_hdr_t); - strsize = strlen(pStr2); - - pStrHdr = (str_descr_hdr_t*)&pStrDescr[pos]; - pStrHdr->size = sizeof(str_descr_hdr_t) + 2*strsize; - pStrHdr->type = 3; - - pos += size; - size = 2*strsize; - pStr = (UINT16*)&pStrDescr[pos]; - - for (i=0; i < strsize; i++) - pStr[i] = (UINT16)pStr2[i]; - - pos += size; - - return pos; -} - -void ep0_func(void *pArg) -{ - UINT32 result; - UINT16 buf[USB_MAX_IMG_SIZE/2], ep_cntres, ep_status, ep_count, tsize; - usb_irp_t *pIRP = (usb_irp_t*)pArg; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - ep_status = hpi_read_reg (SUSB2_REG_EP_STATUS0); - ep_cntres = hpi_read_reg (SUSB2_REG_EP_CNTRES0); - ep_count = hpi_read_reg (SUSB2_REG_EP_COUNT0); - - if (ep_status & 0x10) - { - printf("Setup-flag detected. Status = %4.4X\n", ep_status); - } -} - -void ep1_func(void *pArg) -{ - UINT32 result; - UINT16 buf[USB_MAX_IMG_SIZE/2], ep_cntres, ep_status, ep_count, tsize; - usb_irp_t *pIRP = (usb_irp_t*)pArg; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - ep_status = hpi_read_reg (SUSB2_REG_EP_STATUS1); - ep_cntres = hpi_read_reg (SUSB2_REG_EP_CNTRES1); - ep_count = hpi_read_reg (SUSB2_REG_EP_COUNT1); - - tsize = pIRP->tsize; - if (ep_status & 0x0020) - { - printf("Length exception result %4.4X with count = %d\n", ep_status, (INT16)ep_cntres); - if (ep_status & 0x0400) - tsize = (UINT16)((INT16)tsize - (INT16)ep_cntres); - if (ep_status & 0x0800) - tsize = (UINT16)((INT16)tsize - (INT16)ep_cntres); - - } - result = hpi_read_ram(pIRP->cy_req.addr, buf, tsize); - usb_irp_enqueue(pIRP); - fifo_write(&pIRP->fifo, (UINT8*)buf, result, 0, FIFO_BLOCK); - -// printf("Read %d bytes\n", result); - -} - -void ep2_func(void *pArg) -{ - UINT32 result; - UINT16 buf[USB_MAX_IMG_SIZE/2], ep_cntres, ep_status, ep_count, tsize; - usb_irp_t *pIRP = (usb_irp_t*)pArg; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - ep_status = hpi_read_reg (SUSB2_REG_EP_STATUS2); - ep_cntres = hpi_read_reg (SUSB2_REG_EP_CNTRES2); - ep_count = hpi_read_reg (SUSB2_REG_EP_COUNT2); - - tsize = pIRP->tsize; - if (ep_status & 0x0020) - { - printf("Length exception result %4.4X with count = %d\n", ep_status, (INT16)ep_cntres); - if (ep_status & 0x0400) - tsize = (UINT16)((INT16)tsize - (INT16)ep_cntres); - if (ep_status & 0x0800) - tsize = (UINT16)((INT16)tsize - (INT16)ep_cntres); - } - - pIRP->tx_in_progress = 0; - result = fifo_read(&pIRP->fifo, (UINT8*)buf, pIRP->tsize, 0, FIFO_NONBLOCK); - if (!result) - return; - - pIRP->cy_req.size = result; - hpi_write_ram(pIRP->cy_req.addr, (UINT16*)buf, result); - - usb_irp_enqueue(pIRP); - -// printf("Wrote %d bytes\n", result); - -} - -void rst_func(void *pArg) -{ - volatile int *pLED = (int*)SYS_LED_PORT; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - sputs("SUSB_RST_MSG\n"); -/// hpi_comm_reset(); - - _g_rst = 1; - - *pLED = 0x40000000 + 1; - -} - -void sof_func(void *pArg) -{ - volatile int *pLED = (int*)SYS_LED_PORT; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - sputs("SUSB_SOF_MSG\n"); - - *pLED = 0x40000000 + 2; - -} - -void cfg_func(void *pArg) -{ - volatile int *pLED = (int*)SYS_LED_PORT; - cfg_inst_t *pCFG = (cfg_inst_t*)pArg; - usb_irp_t *pIRP_rx = (usb_irp_t*)pCFG->pIRP_rx; - usb_irp_t *pIRP_tx = (usb_irp_t*)pCFG->pIRP_tx; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - sputs("SUSB_CFG_MSG\n"); - _g_cfg = 1; - usb_irp_enqueue(pIRP_rx); - fifo_flush(&pIRP_rx->fifo); - fifo_flush(&pIRP_tx->fifo); - pIRP_tx->tx_in_progress = 0; - *pLED = 0; - -} - -void sus_func(void *pArg) -{ - volatile int *pLED = (int*)SYS_LED_PORT; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - sputs("SUSB_SUS_MSG\n"); - - *pLED = 0x40000000 + 3; - - _g_sus = 1; - -} - -void id_func(void *pArg) -{ - volatile int *pLED = (int*)SYS_LED_PORT; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - sputs("SUSB_ID_MSG\n"); - - *pLED = 0x40000000 + 4; - -} - -void vbus_func(void *pArg) -{ - volatile int *pLED = (int*)SYS_LED_PORT; - -// printf("Callback with pArg = %8.8X\n", (UINT32)pArg); - sputs("SUSB_VBUS_MSG\n"); - - *pLED = 0x40000000 + 5; - -} - -UINT32 usb_init_descr(void) -{ - UINT32 result; - - UINT16 buffer16[0x100]; - UINT16 addr; - dev_descr_t dev_descr = {sizeof(dev_descr_t), 1, 0x0200, 0xFF, 0, 0, 8, 0x04B4, 0x7200, 0x0099, 1, 2, 3, 1}; - ep_descr_t ep_descr[2] = {{sizeof(ep_descr_t), 5, 1, 2, 64, 0}, {sizeof(ep_descr_t), 5, 0x82, 2, 64, 0}}; - - // Set device descriptor - addr = 0xf516; // default - addr = 0xA00; - hpi_write_ram(addr, (UINT16*)&dev_descr, sizeof(dev_descr_t)); - hpi_write_reg(2*SUSB2_DEVICE_DESCRIPTOR_VEC, addr); - - // Set new configuration descriptor - - // Write config and interface descriptor - result = conf_write((UINT8*)buffer16, sizeof(ep_descr)/sizeof(ep_descr_t), ep_descr); - - addr = 0xf528; // default - addr = 0xB00; - hpi_write_ram(addr, (UINT16*)buffer16, result); - hpi_write_reg(2*SUSB2_CONFIGURATION_DESCRIPTOR_VEC, addr); - - // Set string description - result = str_write((UINT8*)buffer16, "JDI Inc.", "JDI-USB (MIPS)", "311070"); - addr = 0xf528; // default - addr = 0xC00; - hpi_write_ram(addr, (UINT16*)buffer16, result); - hpi_write_reg(2*SUSB2_STRING_DESCRIPTOR_VEC, addr); - - return 0; -} - -UINT32 usb_force_reconnect(UINT32 port) -{ - UINT32 result; - UINT16 addr; - - if (port >= USB_MAX_NUM_PORTS) - return -1; - - if (port == 0) - { - // R1 = 0 : Full speed - // R2 = 1 : SIE1 - addr = hpi_read_reg(SUSB1_REG_USBCTRL); - hpi_write_reg(SUSB1_REG_USBCTRL, addr | 0x0010); - result = hpi_comm_exec_int(SUSB_INIT_INT, 2, R1, 0, R2, 1); - hpi_write_reg(SUSB1_REG_USBCTRL, addr); - } - else - { - // R1 = 0 : Full speed - // R2 = 2 : SIE2 - addr = hpi_read_reg(SUSB2_REG_USBCTRL); - hpi_write_reg(SUSB2_REG_USBCTRL, addr | 0x0010); - result = hpi_comm_exec_int(SUSB_INIT_INT, 2, R1, 0, R2, 2); - hpi_write_reg(SUSB2_REG_USBCTRL, addr); - } - return result; -} - -UINT32 usb_recv(usb_irp_t *pObj, UINT8 *pData, UINT32 len, UINT32 timeout) -{ - UINT32 result; - - result = fifo_read(&pObj->fifo, pData, len, timeout, FIFO_BLOCK); - - return result; -} - -UINT32 usb_send(usb_irp_t *pObj, UINT8 *pData, UINT32 len, UINT32 timeout) -{ - UINT32 result; - UINT8 buf[USB_MAX_IMG_SIZE]; - - // Fill-up FIFO - result = fifo_write(&pObj->fifo, pData, len, 0, FIFO_NONBLOCK); - if (!result) - return 0; - - // Trigger TX - if (!pObj->tx_in_progress) - { - pObj->cy_req.size = fifo_read(&pObj->fifo, (UINT8*)buf, pObj->tsize, 0, FIFO_NONBLOCK); - hpi_write_ram(pObj->cy_req.addr, (UINT16*)buf, pObj->cy_req.size); - usb_irp_enqueue(pObj); - } - - // If necessary, write rest to FIFO - result += fifo_write(&pObj->fifo, &pData[result], len - result, timeout, FIFO_BLOCK); - - return result; - -} - -#define TEST_SIZE (2*1024*1024) -#define TRANSFER_SIZE 64 -#define FLASH_IMAGE_SIZE (2*1024*1024) - -int main(void) -{ - int i; - UINT32 result, sync, cmd, len, buf_count, led_count, remain, tx_cnt, flash_offset; - UINT8 buffer8[2048]; - UINT16 buffer16[0x2000]; - UINT16 addr; - volatile UINT32 *pLED = (UINT32*)SYS_LED_PORT; - volatile UINT32 *pUART0_stat = (UINT32*)SYS_UART0_STAT; - UINT32 start, end; - UINT32 *pFlash32; - UINT8 *pFlash8; - UINT32 buffer32[16], *pBuf; - UINT64 *pBuf64; - usb_irp_t irp_rx, irp_tx; - fifo_t fifo_rx, fifo_tx; - cfg_inst_t cfg_inst; - flash_t flash; - volatile UINT32 *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - volatile UINT32 *pVGA_front = (UINT32*)SYS_VGA_FB_FRONT; - volatile UINT32 *pVGA_back = (UINT32*)SYS_VGA_FB_BACK; - - _g_rst = 0; - _g_sus = 0; - _g_cfg = 0; - - usb_init(); - - // enable EP#0 callback - usb_callback_register(1, SUSB_EP0_MSG, ep0_func, NULL); - - // enable EP#1 callback - usb_irp_register(&irp_rx, 1, 1, TRANSFER_SIZE, 1); - usb_callback_register(1, SUSB_EP1_MSG, ep1_func, &irp_rx); - - // enable EP#2 callback - usb_irp_register(&irp_tx, 1, 2, TRANSFER_SIZE, 0); - usb_callback_register(1, SUSB_EP2_MSG, ep2_func, &irp_tx); - - usb_callback_register(1, SUSB_RST_MSG, rst_func, NULL); - usb_callback_register(1, SUSB_SOF_MSG, sof_func, NULL); - cfg_inst.pIRP_rx = &irp_rx; - cfg_inst.pIRP_tx = &irp_tx; - usb_callback_register(1, SUSB_CFG_MSG, cfg_func, &cfg_inst); - usb_callback_register(1, SUSB_SUS_MSG, sus_func, NULL); - usb_callback_register(1, SUSB_ID_MSG, id_func, NULL); - usb_callback_register(1, SUSB_VBUS_MSG, vbus_func, NULL); - - printf("HPI-Test\n\n"); - - if (IS_ERROR(hpi_init())) - { - sputs("hpi_init(): error\n"); - return 1; - } - - printf("cy67k3_reset\n"); - cy67k3_reset(); - - while(!_g_rst); - - printf("hpi_comm_reset\n"); - hpi_comm_reset(); - - while(!_g_sus); - - printf("usb_init_descr\n"); - usb_init_descr(); - printf("hpi_comm_exec_int\n"); - hpi_comm_exec_int(SUSB_INIT_INT, 2, R1, 0, R2, 2); - printf("usb_force_reconnect\n"); - usb_force_reconnect(1); - - while(!_g_cfg); - - printf("USB-Ready\n"); - - printf("CY-Read.."); - start = clock(); - for (i=0; i < TEST_SIZE; i+=0x2000) - hpi_read_ram(0x2000, buffer16, 0x2000); - - end = clock(); - printf("done (%.2f Mbyte/s)\n", (double)TEST_SIZE/(1000*(end-start))); - - printf("CY-Write.."); - start = clock(); - for (i=0; i < TEST_SIZE; i+=0x2000) - hpi_write_ram(0x2000, buffer16, 0x2000); - - end = clock(); - printf("done (%.2f Mbyte/s)\n", (double)TEST_SIZE/(1000*(end-start))); - - sputs("HPI-Status : "); - print_word(cy67k3_read_HPI_STATUS()); - sputs("\n"); - - sputs("HPI BP : "); - print_word(hpi_read_reg(HPI_REG_BP)); - sputs("\n"); - - sputs("HPI IRR : "); - print_word(hpi_read_reg(HPI_REG_INTROUTE)); - sputs("\n"); - - sputs("CPU Revision : "); - print_word(hpi_comm_read_ctrl_reg(USB_REG_REVISON)); - sputs("\n"); - - hpi_comm_write_ctrl_reg(USB_REG_SPEED, 0x0000, LOGIC_DIRECT); - sputs("CPU Speed : "); - print_word(hpi_comm_read_ctrl_reg(USB_REG_SPEED)); - sputs("\n"); - -// usb_init_descr(); -// usb_force_reconnect(1); - - // enable RX interrupt - *pUART0_stat |= (1 << 6); - interrupt_register(3, uart_handler); - interrupt_enable(3); - - // Enable EP#1 - hpi_write_reg(SUSB2_REG_EP_COUNT1, TRANSFER_SIZE); - hpi_write_reg(SUSB2_REG_EP_CTRL1, 2); - hpi_write_reg(SUSB2_REG_EP_CNTRES1, 0); - hpi_write_reg(SUSB2_REG_EP_STATUS1, 0); - - // Enable EP#2 - hpi_write_reg(SUSB2_REG_EP_COUNT2, TRANSFER_SIZE); - hpi_write_reg(SUSB2_REG_EP_CTRL2, 2); - hpi_write_reg(SUSB2_REG_EP_CNTRES2, 0); - hpi_write_reg(SUSB2_REG_EP_STATUS2, 0); - - led_count = 0; - buf_count = 0; - - pBuf64 = (UINT64*)malloc(FLASH_IMAGE_SIZE); - pBuf = (UINT32*)pBuf64; - - *pVGA_front = (UINT32)pBuf64; - *pVGA_back = (UINT32)pBuf64; - *pVGA_ctrl |= SYS_VGA_BIT_MSTEN; - - if (IS_ERROR(flash_find(&flash, SYS_FLASH_IO))) - { - printf("Cannot find flash device. Exit now!\n"); - return 1; - } - - // Get flash offset by value of DIP-switch - flash_offset = flash_get_offset_by_blocknum(&flash, flash.info.nblocks-FLASH_IMAGE_SIZE/flash.info.blocksize); - printf("flash_offset: %08X\n", flash_offset); - pFlash32 = (UINT32*)(SYS_FLASH_IO + flash_offset); - pFlash8 = (UINT8*)pFlash32; - - while(1) - { - switch (_g_uart_msg) - { - case '1': - _g_uart_msg = 0; - PrintDevRegs(1); - printf("\nSIEmsg1: %4.4X\n", hpi_read_reg(HPI_REG_SIE1MSG)); - break; - - case '2': - _g_uart_msg = 0; - PrintDevRegs(2); - printf("\nSIEmsg2: %4.4X\n", hpi_read_reg(HPI_REG_SIE2MSG)); - break; - - default: - break; - } - result = usb_recv(&irp_rx, (UINT8*)&sync, 4, 100); - if (!result) - continue; - - *pLED = led_count++; - - if (sync == 0xC24755AA) - { - printf("Sync found\n"); - result = usb_recv(&irp_rx, (UINT8*)&cmd, 4, 1000); - if (!result) - continue; - - result = usb_recv(&irp_rx, (UINT8*)&len, 4, 1000); - if (!result) - continue; - - printf("Command %d with len %d found\n",cmd, len); - switch(cmd) - { - case 0x00000001: - result = usb_recv(&irp_rx, NULL, len, 1000); - if (result) - { - printf("Read %d bytes\n", result); - } - break; - - case 0x00000002: - remain = len; - tx_cnt = 0; - while(remain) - { - len = sizeof(buffer8); - if (remain < len) - len = remain; - - for (i=0; i < len; i++) - buffer8[i] = buf_count+i; - - result = usb_send(&irp_tx, buffer8, len, 1000); - if (!result) - break; - tx_cnt += result; - remain -= result; - buf_count++; - } - printf("Wrote %d bytes\n", tx_cnt); - break; - - case 0x00000003: - remain = len; - tx_cnt = 0; - while(remain) - { - len = 256; - if (remain < len) - len = remain; - - result = usb_send(&irp_tx, (UINT8*)&pFlash8[tx_cnt], len, 1000); - if (!result) - break; - tx_cnt += result; - remain -= result; - buf_count++; - } - printf("Wrote %d bytes\n", tx_cnt); - break; - - case 0x00000004: - *pVGA_ctrl &= ~SYS_VGA_BIT_MSTEN; - result = usb_recv(&irp_rx, (UINT8*)pBuf, len, 1000); - if (result) - { - printf("Read %d bytes\n", result); - } - - len = result; - if (len > FLASH_IMAGE_SIZE) - { - printf("Cannot write flash: image to large!\n"); - break; - } - - printf("Flash erase..."); - result = flash_erase(&flash, flash_offset, len); - if (IS_ERROR(result)) - { - printf("failed (%08X)\n", result); - break; - } - printf("done\n"); - - printf("Flash write..."); - result = flash_program(&flash, flash_offset, (UINT8*)pBuf, len); - if (IS_ERROR(result)) - { - printf("failed (%08X)\n", result); - break; - } - printf("done\n"); - - printf("Flash verify..."); - result = flash_verify(&flash, flash_offset, (UINT8*)pBuf, len); - if (IS_ERROR(result)) - { - printf("failed (%08X)\n", result); - break; - } - printf("passed\n"); - *pVGA_ctrl |= SYS_VGA_BIT_MSTEN; - break; - - case 0x000000FF: - usb_force_reconnect(1); - break; - - default: - break; - } - } - } - - return 0; -} - -// pMem = (UINT8*)0x40000000; -// result = fifo_write(&fifo_tx, pMem, 640, 0, FIFO_NONBLOCK); -// pMem += result; -// usb_irp_enqueue(&irp_tx); diff --git a/lib/CPUs/MIPS/bsp/examples/test_irq.c b/lib/CPUs/MIPS/bsp/examples/test_irq.c deleted file mode 100644 index b1a9213..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_irq.c +++ /dev/null @@ -1,335 +0,0 @@ -#include -#include -#include -#include -#include -#include - -#define CPU_FREQ_HZ 100000000 -#include "libsys.h" -#include "irq.h" -#include "mips_gfx.h" -#include "mips_ps2.h" - -char buffer[16384]; -char * volatile pPtr_r; -char * volatile pPtr_w; -static volatile INT32 mouse_x; -static volatile INT32 mouse_y; -static box_t box; -static gfx_t gfx; -static volatile int _g_posx, _g_posy; -static volatile g_btn_l, g_btn_r; -static volatile UINT32 g_color; - -// ------------------------------------------------------------- -void handler0(void) -{ - printf("Interrupt 0\n"); - interrupt_clr(0); -} - -void handler1(void) -{ - printf("Interrupt 1\n"); - interrupt_clr(1); -} - -void handler2(void) -{ - printf("Interrupt 2\n"); -} - -void handler3(void) -{ - volatile UINT32 *pUART0_stat = (UINT32*)SYS_UART0_STAT; - volatile UINT32 *pUART0_data = (UINT32*)SYS_UART0_DATA; - volatile UINT32 *pUART1_stat = (UINT32*)SYS_UART1_STAT; - volatile UINT32 *pUART1_data = (UINT32*)SYS_UART1_DATA; - - while(0x200 & *pUART0_stat) - { -// sputs("w: "); print_word((int)pPtr_w); sputs("\n"); - if (pPtr_w == &buffer[16383]) - pPtr_w = buffer; - *(pPtr_w++) = *pUART0_data; - } - - while(0x200 & *pUART1_stat) - { -// sputs("w: "); print_word((int)pPtr_w); sputs("\n"); - if (pPtr_w == &buffer[16383]) - pPtr_w = buffer; - *(pPtr_w++) = *pUART1_data; - } - -} - -void handler4(void) -{ - printf("Interrupt 4\n"); -} - -void handler5(void) -{ - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - - // Ack - *pVGA_ctrl |= SYS_VGA_BIT_BUFCHG_FLAG; - -} - -void handler6(void) -{ - int p, i; - ps2_if_t *pIF; - UINT8 mouse_rsp[3]; - UINT32 timeout_count, key; - - INT32 dx, dy; - - for (p=0; p < PS2_get_num_if(); p++) - { - pIF = PS2_get_if(p); - if (SYS_PS2_BIT_RX_ERR_FLAG & *pIF->pCTRL) - fprintf(stderr, "PS2[%d]: Status = 0x%08X\n", p, *pIF->pCTRL); - - if (pIF->type == ps2_type_keyb) - { - while(SYS_PS2_BIT_RX_IRQ & *pIF->pCTRL) - { - key = *pIF->pDATA; - printf("Keyboard scan code = 0x%02X\n", key); - } - } - if (pIF->type == ps2_type_mouse) - { - if(!(SYS_PS2_BIT_RX_IRQ & *pIF->pCTRL)) - continue; - - for (i=0; i < 3; i++) - { - timeout_count = 100; - while(!(SYS_PS2_BIT_RX_IRQ & *pIF->pCTRL)) - { - timeout_count--; - if (!timeout_count) - { - break; - } - sleep(1); - } - if (!timeout_count) - { - break; - } - mouse_rsp[i] = (UINT8)*pIF->pDATA; - } - if (!timeout_count) - { - continue; - } - dx = mouse_rsp[1]; - if (mouse_rsp[0] & 0x10) - dx |= 0xFFFFFF00; - dy = mouse_rsp[2]; - if (mouse_rsp[0] & 0x20) - dy |= 0xFFFFFF00; - -// printf("dx = %5d, dy = %5d\n", dx, dy); - - mouse_x += dx; - mouse_y -= dy; - g_btn_l = 0; - if (mouse_rsp[0] & 0x01) - g_btn_l = 1; - - if (mouse_rsp[0] & 0x02) - { - if (g_btn_r == 0) - { - g_color = (UINT32)rand(); - } - g_btn_r = 1; - } - else - g_btn_r = 0; - - - if (mouse_x < 0) - mouse_x = 0; - if (mouse_y < 0) - mouse_y = 0; - if (mouse_x > (gfx.w-1)) - mouse_x = gfx.w-1; - if (mouse_y >= (gfx.h-1)) - mouse_y = gfx.h-1; - -// Screen_csr_set_x(mouse_x); -// Screen_csr_set_y(mouse_y); - -// printf("x = %5d, y = %5d\n", mouse_x, mouse_y); - - } - } -} - -void handler7(void) -{ - printf("Interrupt 7\n"); -} - -int main(void) -{ - - int i; - volatile UINT32 *pUART0_stat = (UINT32*)SYS_UART0_STAT; - volatile UINT32 *pUART1_stat = (UINT32*)SYS_UART1_STAT; - volatile UINT32 *pUART0_baud = (UINT32*)SYS_UART0_BAUD; - volatile UINT32 *pUART1_baud = (UINT32*)SYS_UART1_BAUD; - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - UINT32 volatile *pVGA_moffs_0 = (UINT32*)SYS_VGA_FB_FRONT; - UINT32 volatile *pVGA_moffs_1 = (UINT32*)SYS_VGA_FB_BACK; - UINT32 volatile *pVGA_cgcol = (UINT32*)SYS_VGA_CGCOL; - UINT32 volatile *pFlashPicture = (UINT32*)(SYS_FLASH_MEM + 0x00600000); - UINT32 framecount; - UINT32 start, end; - char string[65]; - - interrupt_register(0, (void*)handler0); - interrupt_register(1, (void*)handler1); -// interrupt_register(2, (void*)handler2); - interrupt_register(3, (void*)handler3); -// interrupt_register(4, (void*)handler4); -// interrupt_register(5, (void*)handler5); - interrupt_register(6, (void*)handler6); - interrupt_register(7, (void*)handler7); - - srand(clock()); - UART1_setbaud(460800); - printf("Hello\n"); - memset(buffer, 0, sizeof(buffer)); - - *pVGA_cgcol = 0x00FFFFFF; - _g_posx = _g_posy = 0; - g_color = 0xFFFFFFFF; - GFX_init(&gfx); - - GFX_set_background(&gfx, pFlashPicture, 800, 600, 1, 1); - box_create(&box, 256, 256); - GFX_box_draw(&gfx, &box, _g_posx, _g_posy, g_color); - GFX_show(&gfx); - printf("VGA status = %08X\n", *pVGA_ctrl); - - pPtr_r = buffer; - pPtr_w = buffer; - - printf("UART0 Status = 0x%8.8X\n", *pUART0_stat); - printf("UART0 Baud = 0x%8.8X\n", *pUART0_baud); - printf("UART1 Status = 0x%8.8X\n", *pUART1_stat); - printf("UART1 Baud = 0x%8.8X\n", *pUART1_baud); - - // UART: enable RX interrupt - *pUART0_stat |= (1 << 6); - *pUART1_stat |= (1 << 6); - printf("UART0 Status = 0x%8.8X\n", *pUART0_stat); - printf("UART1 Status = 0x%8.8X\n", *pUART1_stat); - - PS2_init(0); - PS2_init(1); - - sputs("r: "); print_word((int)pPtr_r); sputs("\n"); - sputs("w: "); print_word((int)pPtr_w); sputs("\n"); - - // Print Status register - sputs("Status : "); - print_word(CP0_SR_read()); - sputs("\n"); - sputs("\n"); - - interrupt_disable(6); - printf("Bitte gebe ein: "); - scanf("%s", string); - printf("Du schriebst: %s\n", string); - - // Flush buffer - PS2_flush(0); - PS2_flush(1); - - printf("Start:\n"); - - interrupt_enable(0); - interrupt_enable(1); -// interrupt_enable(2); - interrupt_enable(3); -// interrupt_enable(4); -// interrupt_enable(5); - interrupt_enable(6); - interrupt_enable(7); - - interrupt_set(0); - interrupt_set(1); - interrupt_set(2); - interrupt_set(3); - interrupt_set(4); - interrupt_set(5); - interrupt_set(6); - interrupt_set(7); - -// while(1) -// { -// printf("PS2-Status : 0x%08X\n", *(ps2_if[0].pCTRL)); -// printf("PS2-Data : 0x%08X\n", *(ps2_if[0].pDATA)); -// sleep(1000); -// } - - interrupt_enable(6); - framecount = Screen_get_fps(); - start = clock(); - - while(1) - { - if (!framecount) - { - end = clock(); - framecount = Screen_get_fps(); - printf("%f FPS\n", (float)framecount/((float)(end-start)/CLOCKS_PER_SEC)); - start = clock(); - } - - GFX_frame(&gfx, GFX_FRAME_SYNC); - framecount--; - - while ((_g_posx != (UINT32)mouse_x) || (_g_posy != (UINT32)mouse_y) || g_btn_r || g_btn_l) - { - - GFX_restore(&gfx, &box, _g_posx, _g_posy); - - _g_posx = (UINT32)mouse_x; - _g_posy = (UINT32)mouse_y; - - if (g_btn_l && !g_btn_r) - { - GFX_box_draw_bg(&gfx, &box, _g_posx, _g_posy, g_color); - } - - if (g_btn_l && g_btn_r) - { - GFX_set_background(&gfx, pFlashPicture, 800, 600, 1, 1); - } - - GFX_box_draw(&gfx, &box, _g_posx, _g_posy, g_color); - break; - } - GFX_show(&gfx); - - if(pPtr_w != pPtr_r) - { -// sputs("r: "); print_word((int)pPtr_r); sputs("\n"); - if (pPtr_r == &buffer[16383]) - pPtr_r = buffer; - writechar(0, *(pPtr_r++)); - } - } - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/test_mipsdis.c b/lib/CPUs/MIPS/bsp/examples/test_mipsdis.c deleted file mode 100644 index eb3a61b..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_mipsdis.c +++ /dev/null @@ -1,651 +0,0 @@ -/* +----------------------------------------------------------------+ */ -/* | Copyright (c) 1994 Stanford University. | */ -/* | All Rights Reserved. | */ -/* | | */ -/* | This software is distributed with *ABSOLUTELY NO SUPPORT* | */ -/* | and *NO WARRANTY*. Use or reproduction of this code for | */ -/* | commerical gains is strictly prohibited. Otherwise, you | */ -/* | are given permission to use or modify this code as long | */ -/* | as you do not remove this notice. | */ -/* +----------------------------------------------------------------+ */ -/* --------------------------------------------------- */ -/* | Copyright (c) 1986 MIPS Computer Systems, Inc. | */ -/* | All Rights Reserved. | */ -/* --------------------------------------------------- */ - -/* - * Copyright 1985 by MIPS Computer Systems, Inc. - */ - -/* TORCH disassembler */ -/* derived from MIPS instruction dissassembler by PGL October 91 */ - -#include -#include -#include "mipsdis.h" - -#define false 0 -#define true 1 -typedef int boolean; -char *strcat(); - -#define ZERO 0 - -#define COMPILER_NAMES tdis_reg_names[0] -#define HARDWARE_NAMES tdis_reg_names[1] -#define ASSEMBLER_NAMES tdis_reg_names[2] -#define DIS_REG_NAMES(x) tdis_reg_names[x] - -union extension_byte { - unsigned char byte; - struct { /* extension byte bits in little-endian order */ -#if (defined __MIPSEB || defined _MIPSEB || defined MIPSEB) - unsigned reserved:1; - unsigned dyn_nop:1; - unsigned rs_boost:2; - unsigned rt_boost:2; - unsigned rd_boost:2; -#elif (defined __MIPSEL || defined _MIPSEL || defined MIPSEL) - unsigned rd_boost:2; - unsigned rt_boost:2; - unsigned rs_boost:2; - unsigned dyn_nop:1; - unsigned reserved:1; -#endif /*MIPSEB*/ - } e; -}; - -#define blez_op_T blez_op -#define blez_op_N (blez_op | 0x10) -#define bgtz_op_T bgtz_op -#define bgtz_op_N (bgtz_op | 0x10) -#define beq_op_T beq_op -#define beq_op_N (beq_op | 0x10) -#define bne_op_T bne_op -#define bne_op_N (bne_op | 0x10) -#define bc_op_T bc_op -#define bc_op_N (bc_op | 0x02) - -static char *op_name[64] = { -/* 0 */ "special", "regimm","j", "jal", "beq", "bne", "blez", "bgtz", -/* 8 */ "addi", "addiu","slti", "sltiu","andi", "ori", "xori", "lui", -/*16 */ "cop0", "cop1", "cop2", "cop3", "beql","bnel","blezl","bgtzl", -/*24 */ "op60", "op64", "op68", "op6c", "op70", "op74", "op78", "op7c", -/*32 */ "lb", "lh", "lwl", "lw", "lbu", "lhu", "lwr", "ld", -/*40 */ "sb", "sh", "swl", "sw", "opb0", "opb4", "swr", "sd", -/*48 */ "lwc0", "lwc1", "lwc2", "lwc3", "ldc0", "ldc1", "ldc2", "ldc3", -/*56 */ "swc0", "swc1", "swc2", "swc3", "sdc0", "sdc1", "sdc2", "sdc3" -}; - -static char *spec_name[64] = { -/* 0*/ "sll", "spec01","srl", "sra", "sllv", "spec05","srlv","srav", -/* 8*/ "jr", "jalr", "spec12","spec13","syscall","break","vcall","spec17", -/*16*/ "mfhi", "mthi", "mflo", "mtlo", "spec24","spec25","spec26","spec27", -/*24*/ "mult", "multu","div", "divu", "spec34","spec35","spec36","spec37", -/*32*/ "add", "addu", "sub", "subu", "and", "or", "xor", "nor", -/*40*/ "spec50","spec51","slt","sltu", "spec54","spec55","spec56","spec57", -/*48*/ "spec60","spec61","spec62","spec63","spec64","spec65","spec66","spec67", -/*56*/ "spec70","spec71","spec72","spec73","spec74","spec75","spec76","spec77" -}; - -static char *bcond_name[32] = { - "bltz", - "bgez", - "bltzl", - "bgezl", - "bcond04", - "bcond05", - "bcond06", - "bcond07", - "tgei", - "tgeiu", - "tlti", - "tltiu", - "teqi", - "bcond0d", - "tnei", - "bcond0f", - "bltzal", - "bgezal", - "bltzall", - "bgezall", - "bcond14", - "bcond15", - "bcond16", - "bcond17", - "bcond18", - "bcond19", - "bcond1a", - "bcond1b", - "bcond1c", - "bcond1d", - "bcond1e", - "bcond1f" -}; - -static char *cop1_name[64] = { -/* 0 */ "add", "sub", "mul", "div", "sqrt", "abs", "mov", "neg", -/* 8 */ "fop08","fop09","fop0a","fop0b","fop0c","fop0d","fop0e","fop0f", -/*16 */ "fop10","fop11","fop12","fop13","fop14","fop15","fop16","fop17", -/*24 */ "fop18","fop19","fop1a","fop1b","fop1c","fop1d","fop1e","fop1f", -/*32 */ "cvt.s","cvt.d","cvt.e","fop23","cvt.w","fop25","fop26","fop27", -/*40 */ "fop28","fop29","fop2a","fop2b","fop2c","fop2d","fop2e","fop2f", -/*48 */ "c.f", "c.un","c.eq","c.ueq","c.olt","c.ult","c.ole","c.ule", -/*56 */ "c.sf","c.ngle","c.seq","c.ngl","c.lt","c.nge","c.le","c.ngt" -}; - -static char *fmt_name[16] = { - "s", "d", "e", "q", - "w", "fmt5", "fmt6", "fmt7", - "fmt8", "fmt9", "fmta", "fmtb", - "fmtc", "fmtd", "fmte", "fmtf" -}; - -/* public */ -/* Three sets of commonly used register names */ -const char *tdis_reg_names[3][64] = { - { /* compiler names */ - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", - "zero.B","at.B","v0.B", "v1.B", "a0.B", "a1.B", "a2.B", "a3.B", - "t0.B", "t1.B", "t2.B", "t3.B", "t4.B", "t5.B", "t6.B", "t7.B", - "s0.B", "s1.B", "s2.B", "s3.B", "s4.B", "s5.B", "s6.B", "s7.B", - "t8.B", "t9.B", "k0.B", "k1.B", "gp.B", "sp.B", "s8.B", "ra.B" - }, - { /* hardware names */ - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "gp", "sp", "r30", "r31", - "r0.B", "r1.B", "r2.B", "r3.B", "r4.B", "r5.B", "r6.B", "r7.B", - "r8.B", "r9.B", "r10.B","r11.B","r12.B","r13.B","r14.B","r15.B", - "r16.B","r17.B","r18.B","r19.B","r20.B","r21.B","r22.B","r23.B", - "r24.B","r25.B","r26.B","r27.B","gp.B", "sp.B", "r30.B","r31.B" - }, - { /* assembler names */ - "$0", "$at", "$2", "$3", "$4", "$5", "$6", "$7", - "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", - "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", - "$24", "$25", "$26", "$27", "$gp", "$sp", "$30", "$31", - "$0.B", "$at.B","$2.B", "$3.B", "$4.B", "$5.B", "$6.B", "$7.B", - "$8.B", "$9.B", "$10.B","$11.B","$12.B","$13.B","$14.B","$15.B", - "$16.B","$17.B","$18.B","$19.B","$20.B","$21.B","$22.B","$23.B", - "$24.B","$25.B","$26.B","$27.B","$gp.B","$sp.B","$30.B","$31.B" - } -}; - -static char *c0_opname[64] = { - "c0op0","tlbr","tlbwi","c0op3","c0op4","c0op5","tlbwr","c0op7", - "tlbp","c0op9","c0op10","c0op11","c0op12","c0op13","c0op14","c0op15", - "rfe","c0op17","c0op18","c0op19","c0op20","c0op21","c0op22","c0op23", - "c0op24","c0op25","c0op26","c0op27","c0op28","c0op29","c0op30","c0op31", - "c0op32","c0op33","c0op34","c0op35","c0op36","c0op37","c0op38","c0op39", - "c0op40","c0op41","c0op42","c0op43","c0op44","c0op45","c0op46","c0op47", - "c0op48","c0op49","c0op50","c0op51","c0op52","c0op53","c0op54","c0op55", - "c0op56","c0op57","c0op58","c0op59","c0op60","c0op61","c0op62","c0op63" -}; - -static char *c0_reg[32] = { - "index","random","tlblo","c0r3","context","c0r5","c0r6","c0r7", - "badvaddr","c0r9","tlbhi","epcn","sr", "cause","epc", "c0r15", - "c0r16","c0r17","c0r18","c0r19","c0r20","c0r21","c0r22","c0r23", - "c0r24","c0r25","c0r26","c0r27","c0r28","c0r29","c0r30","c0r31" -}; - -/* Remember the options set by dis_init */ -#define ADDR_DEFAULT 0 -//#define ADDR_DEFAULT "%#010x:\t" -//#define VALUE_DEFAULT "%#010x\t" -#define VALUE_DEFAULT 0 -#define NAME_DEFAULT COMPILER_NAMES -static struct { - char *addr_format; - char *value_format; - const char **reg_names; - int print_jal_targets; -} save = { - ADDR_DEFAULT, - VALUE_DEFAULT, - NAME_DEFAULT, - true -}; - -/* Update regmask to reflect the use of this general-purpose (not fp) - register, and return its name */ -static const char * -register_name(ireg, boosted, regmask) -unsigned ireg, *regmask; -int boosted; -{ - if (!boosted) - *regmask |= (1 << ireg); - return save.reg_names[boosted ? ireg + 32 : ireg]; -} - -/* public -- see dissassembler.h */ -int -tdisasm(buffer, address, iword, ext, regmask, symbol_value, ls_register) -char *buffer; -unsigned char ext; /* extension byte */ -unsigned address, iword, *regmask, *symbol_value, *ls_register; -{ - int return_value = 0; - char *bufptr = buffer; - boolean do_b_displacement = false; - boolean do_loadstore = false; - union mips_instruction i; - union extension_byte e; - - *bufptr = 0; - i.word = iword; - e.byte = ext; - *regmask = *symbol_value = *ls_register = 0; - - /* Put out the address and hex value of the instruction, - leaving bufptr set at the end */ - if (save.addr_format) { - sprintf(bufptr, save.addr_format, address); - bufptr += strlen(bufptr); - } - if (save.value_format) { - sprintf(bufptr, save.value_format, iword); - bufptr += strlen(bufptr); - } - - /* check for dynamic NOP */ - if (e.e.dyn_nop) { - strcat(bufptr, "D."); - bufptr += 2; - } - - /* decode the instruction */ - switch (i.j_format.opcode) { - - case spec_op: - - if (i.word == 0x20) { - strcat(bufptr, "nop"); - if (e.e.rd_boost) - strcat(bufptr, ".B"); - bufptr += strlen(bufptr); - break; - } else if (i.r_format.func == addu_op && i.r_format.rt == ZERO) { - sprintf(bufptr, "move%s\t%s,%s", - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - bufptr += strlen(bufptr); - break; - } - strcat(bufptr, spec_name[i.r_format.func]); - if (e.e.rd_boost) - strcat(bufptr, ".B"); - bufptr += strlen(bufptr); - - switch (i.r_format.func) { - case sll_op: - case srl_op: - case sra_op: - sprintf(bufptr, "\t%s,%s,%d", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask), - i.r_format.re); - break; - case sllv_op: - case srlv_op: - case srav_op: - sprintf(bufptr, "\t%s,%s,%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - break; - case mfhi_op: - case mflo_op: - sprintf(bufptr, "\t%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask)); - break; - case jalr_op: - return_value = 2; - sprintf(bufptr, "\t%s,%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - break; - case jr_op: - return_value = 2; - /* fall through */ - case mtlo_op: - case mthi_op: - sprintf(bufptr, "\t%s", - register_name(i.r_format.rs, e.e.rs_boost, regmask)); - break; - case mult_op: - case multu_op: - case div_op: - case divu_op: - sprintf(bufptr, "\t%s,%s", - register_name(i.r_format.rs, e.e.rs_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask)); - break; - case syscall_op: - break; - case break_op: - case vcall_op: - { - char *format = "\t%d"; - unsigned op2 = i.r_format.rd * 32 + i.r_format.re; - - if (op2) - format = "\t%d,%d"; - sprintf(bufptr, format, i.r_format.rs*32+i.r_format.rt, - op2); - } - break; - default: - sprintf(bufptr, "\t%s,%s,%s", - register_name(i.r_format.rd, e.e.rd_boost, regmask), - register_name(i.r_format.rs, e.e.rs_boost, regmask), - register_name(i.r_format.rt, e.e.rt_boost, regmask)); - break; - }; - break; - - case bcond_op: - sprintf(bufptr, "%s%s\t%s,", - bcond_name[i.i_format.rt], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rs, e.e.rs_boost, regmask)); - do_b_displacement = true; - break; - - case blez_op_T: - case bgtz_op_T: - case blez_op_N: - case bgtz_op_N: - sprintf(bufptr, "%s%s\t%s,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rs, e.e.rs_boost, regmask)); - do_b_displacement = true; - break; - case beq_op_T: - case beq_op_N: - if (i.i_format.rs == ZERO && i.i_format.rt == ZERO) { - strcat(bufptr, "b"); - if (i.j_format.opcode == beq_op_T) - strcat(bufptr, ".T"); - else - strcat(bufptr, ".N"); - if (e.e.rd_boost) - strcat(bufptr, ".B\t"); - else - strcat(bufptr, "\t"); - do_b_displacement = true; - break; - } - /* fall through */ - case bne_op_T: - case bne_op_N: - sprintf(bufptr, "%s%s\t%s,%s,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rs, e.e.rs_boost, regmask), - register_name(i.i_format.rt, e.e.rt_boost, regmask)); - do_b_displacement = true; - break; - - case cop0_op: - case cop1_op: - case cop2_op: - case cop3_op: - { - unsigned which_cop = i.j_format.opcode - cop0_op; - char *f_or_r = "rf"; - - switch (i.r_format.rs) { - case bc_op_T: - sprintf(bufptr, "bc%d%c.T%s\t", which_cop, - "ft"[i.r_format.rt], - e.e.rd_boost ? ".B" : ""); - do_b_displacement = true; - break; - case bc_op_N: - sprintf(bufptr, "bc%d%c.N%s\t", which_cop, - "ft"[i.r_format.rt], - e.e.rd_boost ? ".B" : ""); - do_b_displacement = true; - break; - case mtc_op: - if (which_cop == 0) - sprintf(bufptr, "mtc%d%s\t%s,%s", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - c0_reg[i.f_format.rd]); - else - sprintf(bufptr, "mtc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - case mfc_op: - if (which_cop == 0) - sprintf(bufptr, "mfc%d%s\t%s,%s", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - c0_reg[i.f_format.rd]); - else - sprintf(bufptr, "mfc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost,regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - case cfc_op: - sprintf(bufptr, "cfc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost, regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - case ctc_op: - sprintf(bufptr, "ctc%d%s\t%s,%c%d", which_cop, - e.e.rd_boost ? ".B" : "", - register_name(i.r_format.rt, e.e.rt_boost, regmask), - f_or_r[(which_cop == 1)], - i.f_format.rd); - break; - default: - if (which_cop != 1) - sprintf(bufptr, "c0%s\t%s", e.e.rd_boost ? ".B" : "", - c0_opname[i.f_format.func]); - else - { - sprintf(bufptr, "%s.%s%s\t", - cop1_name[i.f_format.func], - fmt_name[i.f_format.fmt], - e.e.rd_boost ? ".B" : ""); - bufptr += strlen(bufptr); - switch (i.f_format.func) { - case fsqrt_op: - case fabs_op: - case fmov_op: - case fcvts_op: - case fcvtd_op: - case fcvte_op: - case fcvtw_op: - sprintf(bufptr, "f%d,f%d", - i.f_format.re, - i.f_format.rd); - break; - case fcmp_op+0x0: - case fcmp_op+0x1: - case fcmp_op+0x2: - case fcmp_op+0x3: - case fcmp_op+0x4: - case fcmp_op+0x5: - case fcmp_op+0x6: - case fcmp_op+0x7: - case fcmp_op+0x8: - case fcmp_op+0x9: - case fcmp_op+0xa: - case fcmp_op+0xb: - case fcmp_op+0xc: - case fcmp_op+0xd: - case fcmp_op+0xe: - case fcmp_op+0xf: - sprintf(bufptr, "f%d,f%d", - i.f_format.rd, - i.f_format.rt); - break; - default: - sprintf(bufptr, "f%d,f%d,f%d", - i.f_format.re, - i.f_format.rd, - i.f_format.rt); - break; - } /* switch on func */ - } - break; /* End of default */ - } /* switch on rs */ - } - break; /* End of cop0, cop1, cop2, cop3 */ - - case jal_op: - case j_op: - sprintf(bufptr, "%s%s\t", op_name[i.j_format.opcode], - e.e.rd_boost ? ".B" : ""); - *symbol_value = (address & 0xF0000000) | i.j_format.target << 2; - if (save.print_jal_targets) - { - bufptr += strlen(bufptr); - sprintf(bufptr, "%#x", *symbol_value); - } - return_value = 1; - break; - - case swc1_op: - case sdc1_op: - case lwc1_op: - case ldc1_op: - sprintf(bufptr, "%s%s\tf%d,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - i.i_format.rt); - do_loadstore = true; - break; - - case lb_op: - case lh_op: - case lw_op: - case ld_op: - case lbu_op: - case lhu_op: - case sb_op: - case sh_op: - case sw_op: - case sd_op: - case lwl_op: - case lwr_op: - sprintf(bufptr, "%s%s\t%s,", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rt, e.e.rt_boost, regmask)); - do_loadstore = true; - break; - - case ori_op: - case xori_op: - if (i.u_format.rs == ZERO) { - sprintf(bufptr, "li%s\t%s,%d", - e.e.rd_boost ? ".B" : "", - register_name(i.u_format.rt, e.e.rt_boost, regmask), - i.u_format.uimmediate); - break; - } - /* fall through */ - case andi_op: - sprintf(bufptr, "%s%s\t%s,%s,%#x", op_name[i.u_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.u_format.rt, e.e.rt_boost, regmask), - register_name(i.u_format.rs, e.e.rs_boost, regmask), - i.u_format.uimmediate); - break; - case lui_op: - sprintf(bufptr, "%s%s\t%s,%#x", op_name[i.u_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.u_format.rt, e.e.rt_boost, regmask), - i.u_format.uimmediate); - break; - case addi_op: - case addiu_op: - if (i.i_format.rs == ZERO) { - short sign_extender = i.i_format.simmediate; - sprintf(bufptr, "li%s\t%s,%d", - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rt, e.e.rt_boost, regmask), - sign_extender); - break; - } - /* fall through */ - default: - { - short sign_extender = i.i_format.simmediate; - sprintf(bufptr, "%s%s\t%s,%s,%d", op_name[i.i_format.opcode], - e.e.rd_boost ? ".B" : "", - register_name(i.i_format.rt, e.e.rt_boost, regmask), - register_name(i.i_format.rs, e.e.rs_boost, regmask), - sign_extender); - } - break; - } - - /* Some instructions require more than just registers */ - - if (do_loadstore) - { - short sign_extender = i.i_format.simmediate; - *symbol_value = sign_extender; - *ls_register = i.i_format.rs; - bufptr += strlen(bufptr); - sprintf(bufptr, "%d(%s)", sign_extender, - register_name(i.i_format.rs, e.e.rs_boost, regmask)); - return_value = -1; - } - else if (do_b_displacement) - { - short sign_extender = i.i_format.simmediate; - bufptr += strlen(bufptr); - sprintf(bufptr, "%#x", 4 + address + ((((long)sign_extender & 0xFFFD0000) | (0x3FFFF & (sign_extender << 2))))); -// sprintf(bufptr, "%#x", (long)sign_extender); - return_value = 2; - } - - return return_value; -} - -static long instrs[10]={ - 0x0411000a, - 0x03e0f021, - 0x02feb023, - 0x24010050, - 0x10360044, - 0x24010090, - 0x10360046, - 0x240100b8, - 0x10360048, - 0x240100d0 - }; - -int main(void) -{ - int i; - int junk; - char buf[80]; - long *pInstr = (long*)instrs; - - for (i=0; i < 10; i++) - { - tdisasm(buf, (long)&pInstr[i], pInstr[i], 0, &junk, &junk, &junk); - printf("%s\n", buf); - } - return 0; - -} diff --git a/lib/CPUs/MIPS/bsp/examples/test_timer.c b/lib/CPUs/MIPS/bsp/examples/test_timer.c deleted file mode 100644 index 91b5a78..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_timer.c +++ /dev/null @@ -1,40 +0,0 @@ -#include "libsys.h" - - -int g_cnt; -void handler7(void) -{ - UINT32 *pGPIO0 = (UINT32*)SYS_GPIO0; - UINT32 *pTim_stat = (UINT32*)SYS_ITIM_STAT; - if (*pTim_stat & 1) - { - *pTim_stat = 1; - *pGPIO0 = g_cnt++; - } - -} - -int main (void) -{ - UINT32 *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 *pTim_cnt = (UINT32*)SYS_ITIM_CNT; - UINT32 *pTim_cmp = (UINT32*)SYS_ITIM_CMP; - UINT32 *pGPIO0 = (UINT32*)SYS_GPIO0; - - g_cnt = 1; - *pGPIO0 = 0; - - interrupt_register(7, handler7); - interrupt_enable(7); - - *pTim_cnt = 0; - *pTim_cmp = 2000; - *pTim_stat = 1; - *pTim_ctrl = 3; - - while(1); - - return 0; -} - diff --git a/lib/CPUs/MIPS/bsp/examples/test_vga.c b/lib/CPUs/MIPS/bsp/examples/test_vga.c deleted file mode 100644 index 7919abd..0000000 --- a/lib/CPUs/MIPS/bsp/examples/test_vga.c +++ /dev/null @@ -1,206 +0,0 @@ -#include -#include -#include -#include -#include -#include - -#define CPU_FREQ_HZ 100000000 -#include "libsys.h" -#include "irq.h" -#include "mips_gfx.h" -#include "mips_ps2.h" - -static volatile INT32 mouse_x; -static volatile INT32 mouse_y; -static box_t box; -static gfx_t gfx; -static volatile int _g_posx, _g_posy; -static volatile g_btn_l, g_btn_r; -static volatile UINT32 g_color; - -// ------------------------------------------------------------- -void handler5(void) -{ - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - - // Ack - *pVGA_ctrl |= SYS_VGA_BIT_BUFCHG_FLAG; - -} - -void handler6(void) -{ - int p, i; - ps2_if_t *pIF; - UINT8 mouse_rsp[3]; - UINT32 timeout_count, key; - - INT32 dx, dy; - - for (p=0; p < PS2_get_num_if(); p++) - { - pIF = PS2_get_if(p); - if (SYS_PS2_BIT_RX_ERR_FLAG & *pIF->pCTRL) - fprintf(stderr, "PS2[%d]: Status = 0x%08X\n", p, *pIF->pCTRL); - - if (pIF->type == ps2_type_keyb) - { - while(SYS_PS2_BIT_RX_IRQ & *pIF->pCTRL) - { - key = *pIF->pDATA; - printf("Keyboard scan code = 0x%02X\n", key); - } - } - if (pIF->type == ps2_type_mouse) - { - if(!(SYS_PS2_BIT_RX_IRQ & *pIF->pCTRL)) - continue; - - for (i=0; i < 3; i++) - { - timeout_count = 100; - while(!(SYS_PS2_BIT_RX_IRQ & *pIF->pCTRL)) - { - timeout_count--; - if (!timeout_count) - { - break; - } - sleep(1); - } - if (!timeout_count) - { - break; - } - mouse_rsp[i] = (UINT8)*pIF->pDATA; - } - if (!timeout_count) - { - continue; - } - dx = mouse_rsp[1]; - if (mouse_rsp[0] & 0x10) - dx |= 0xFFFFFF00; - dy = mouse_rsp[2]; - if (mouse_rsp[0] & 0x20) - dy |= 0xFFFFFF00; - -// printf("dx = %5d, dy = %5d\n", dx, dy); - - mouse_x += dx; - mouse_y -= dy; - g_btn_l = 0; - if (mouse_rsp[0] & 0x01) - g_btn_l = 1; - - if (mouse_rsp[0] & 0x02) - { - if (g_btn_r == 0) - { - g_color = (UINT32)rand(); - } - g_btn_r = 1; - } - else - g_btn_r = 0; - - - if (mouse_x < 0) - mouse_x = 0; - if (mouse_y < 0) - mouse_y = 0; - if (mouse_x > (gfx.w-1)) - mouse_x = gfx.w-1; - if (mouse_y >= (gfx.h-1)) - mouse_y = gfx.h-1; - -// Screen_csr_set_x(mouse_x); -// Screen_csr_set_y(mouse_y); - -// printf("x = %5d, y = %5d\n", mouse_x, mouse_y); - - } - } -} - -int main(void) -{ - - int i; - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - UINT32 volatile *pVGA_moffs_0 = (UINT32*)SYS_VGA_FB_FRONT; - UINT32 volatile *pVGA_moffs_1 = (UINT32*)SYS_VGA_FB_BACK; - UINT32 volatile *pVGA_cgcol = (UINT32*)SYS_VGA_CGCOL; - UINT32 volatile *pFlashPicture = (UINT32*)(SYS_FLASH_MEM + 0x00600000); - UINT32 framecount; - UINT32 start, end; - - interrupt_register(5, (void*)handler5); - interrupt_register(6, (void*)handler6); - - srand(clock()); - UART1_setbaud(460800); - - *pVGA_cgcol = 0x00FFFFFF; - _g_posx = _g_posy = 0; - g_color = 0xFFFFFFFF; - GFX_init(&gfx); - - GFX_set_background(&gfx, pFlashPicture, 800, 600, 1, 1); - box_create(&box, 256, 256); - GFX_box_draw(&gfx, &box, _g_posx, _g_posy, g_color); - GFX_show(&gfx); - printf("VGA status = %08X\n", *pVGA_ctrl); - - PS2_init(0); - PS2_init(1); - - // Flush buffer - PS2_flush(0); - PS2_flush(1); - -// interrupt_enable(5); - interrupt_enable(6); - - framecount = Screen_get_fps(); - start = clock(); - - while(1) - { - if (!framecount) - { - end = clock(); - framecount = Screen_get_fps(); - printf("%f FPS\n", (float)framecount/((float)(end-start)/CLOCKS_PER_SEC)); - start = clock(); - } - - GFX_frame(&gfx, GFX_FRAME_SYNC); - framecount--; - - while ((_g_posx != (UINT32)mouse_x) || (_g_posy != (UINT32)mouse_y) || g_btn_r || g_btn_l) - { - - GFX_restore(&gfx, &box, _g_posx, _g_posy); - - _g_posx = (UINT32)mouse_x; - _g_posy = (UINT32)mouse_y; - - if (g_btn_l && !g_btn_r) - { - GFX_box_draw_bg(&gfx, &box, _g_posx, _g_posy, g_color); - } - - if (g_btn_l && g_btn_r) - { - GFX_set_background(&gfx, pFlashPicture, 800, 600, 1, 1); - } - - GFX_box_draw(&gfx, &box, _g_posx, _g_posy, g_color); - break; - } - GFX_show(&gfx); - } - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/testbench.c b/lib/CPUs/MIPS/bsp/examples/testbench.c deleted file mode 100644 index 15d921d..0000000 --- a/lib/CPUs/MIPS/bsp/examples/testbench.c +++ /dev/null @@ -1,1229 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include "libsys.h" -#include "mips_gfx.h" - -#define TEST10_ERROR (ERROR | 0x1000) -#define TEST11_ERROR (ERROR | 0x1100) -#define TEST12_ERROR (ERROR | 0x1200) -#define TEST13_ERROR (ERROR | 0x1300) -#define TEST14_ERROR (ERROR | 0x1400) -#define TEST15_ERROR (ERROR | 0x1500) -#define TEST16_ERROR (ERROR | 0x1600) - -#define PIC_NX 800 -#define PIC_NY 600 - -extern int paranoia(int argc, char **argv); - -UINT32* pf(void) -{ - static UINT32 p; - - return &p; -} - -volatile UINT32 _g_blitter_rdy; -void ISR_blitter_rdy(void) -{ - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - - if (*pVGA_ctrl & SYS_VGA_BIT_BLIT_FIN) - { - putchar('.'); - // Ack - *pVGA_ctrl |= SYS_VGA_BIT_BLIT_ACK; - _g_blitter_rdy = 1; - } -} - -// ------------------------------------------------------------- -void LoadPic(UINT64 *pScreen, UINT32 screen_nx, UINT32 screen_ny, UINT32 *pImage, UINT32 image_nx, UINT32 image_ny, UINT32 image_scale_x, UINT32 image_scale_y) -{ - - UINT32 off_x, off_y; - UINT32 i, j, black; - UINT32 *pScr, *pImg; - - off_x = (screen_nx-(image_scale_x*image_nx))/2; - off_y = (screen_ny-(image_scale_y*image_ny))/2; - - black = 0; - pScr = (UINT32*)pScreen; - for (i=0; i < screen_nx*screen_ny; i += 8) - { - __gfx_block_set_8(pScr, 0); - pScr += 8; - } - - if (!pImage) - return; - - pScr = ((UINT32*)pScreen) + screen_nx*off_y + off_x; - pImg = pImage; - - for (i=0; i < image_ny*image_nx; i += 8) - { - __gfx_block_copy_8(pScr, pImg); - pScr += 8; - pImg += 8; - } - -/* - UINT32 off_x, off_y; - UINT32 i; - UINT32 *pScr; - - off_x = (screen_nx-(image_scale_x*image_nx))/2; - off_y = (screen_ny-(image_scale_y*image_ny))/2; - - memset(pScreen, 0, screen_nx*screen_ny*sizeof(UINT32)); - pScr = ((UINT32*)pScreen) + screen_nx*off_y + off_x; - - for (i=0; i < image_ny; i++) - { - memcpy(pScr, &pImage[i*image_nx], image_nx*sizeof(UINT32)); - pScr += screen_nx; - } -*/ -} - -int IsEndianBig(void) -{ - UINT8 *pBuf; - UINT32 word; - word = 0x12345678; - pBuf = (UINT8*)&word; - if (((*pBuf+0) == 0x12) && (*(pBuf+1) == 0x34) && (*(pBuf+2) == 0x56) && (*(pBuf+3) == 0x78)) - { - return 1; - } - if (((*pBuf+0) == 0x78) && (*(pBuf+1) == 0x56) && (*(pBuf+2) == 0x34) && (*(pBuf+3) == 0x12)) - { - return 0; - } - return -1; -} - -void handler3(void) -{ - volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT; - volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA; - - if((0x10 & *pUART_stat)) - { - _putchar(0, (char)*pUART_data); - } - -} - -int g_cnt; -box_t box; -gfx_t gfx; -int posx, posy; - -void handler7(void) -{ - UINT32 volatile *pGPIO0 = (UINT32*)SYS_GPIO0; - UINT32 volatile *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 volatile *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 volatile *pTim0_cmp = (UINT32*)SYS_ITIM0_CMP; - time_t curr_date; - struct tm *pDate; - - if (*pTim0_cmp < 0x200) - { - *pTim0_cmp = 0x200; - } - if (*pTim_stat & 1) - { - *pTim_stat = 1; - *pGPIO0 = g_cnt++; - GFX_frame(&gfx, GFX_FRAME_NOSYNC); - GFX_restore(&gfx, &box, posx, posy); - GFX_show(&gfx); - - posx = (UINT32)rand()%800; - posy = (UINT32)rand()%600; - GFX_frame(&gfx, GFX_FRAME_NOSYNC); - GFX_box_draw(&gfx, &box, posx, posy, (UINT32)rand()); - GFX_show(&gfx); - } - - if (*pTim_stat & 4) - { - *pTim_stat = 4; - curr_date = time(NULL); - pDate = gmtime(&curr_date); - fprintf(stderr, "%s", asctime(pDate)); - } - -} - -int fibonacci(int f0, int f1, int *pDst, int len) -{ - int i; - - i = 0; - - pDst[i++] = f0; - pDst[i++] = f1; - - for (; i < len; i++) - { - pDst[i] = pDst[i-2] + pDst[i-1]; - } - - return i; -} - -void PrintCPUinfo(void) -{ - int result, rev_id; - int cache_size, cache_line; - int eb; - - char *cpu_type_str[7] = {"invalid", "R2000", "R3000", "R6000", "R4000", "reserved", "R6000A"}; - - // Print Status register - result = CP0_SR_read(); - - printf("--------------------------------------------------\n"); - printf("Status : %8.8X\n", result); - - // Print Revision - result = CP0_PRID_read(); - rev_id = (result >> 8) & 0xFF; - printf("CPU type : MIPS "); - if ((rev_id > 0) && (rev_id < 0x07)) - { - printf(cpu_type_str[rev_id]); - printf(" Rev. "); - rev_id = result & 0xFF; - printf("%d", rev_id); - } - else - printf("Unknown"); - - eb = IsEndianBig(); - if (eb) - printf(" [Big-endian]\n"); - if (!eb) - printf(" [Little-endian]\n"); - if (eb < 0) - printf(" [Unknown endian]\n"); - - cache_size = (result >> 16) & 7; - cache_line = (result >> 19) & 7; - printf("I-Cache : %d kBytes (%d Bytes per line)\n", 4*(int)pow(2.0, (double)(8+cache_size))/1024, 4*(int)pow(2.0, (double)(cache_line))); - cache_size = (result >> 24) & 7; - cache_line = (result >> 27) & 7; - printf("D-Cache : %d kBytes (%d Bytes per line)\n", 4*(int)pow(2.0, (double)(8+cache_size))/1024, 4*(int)pow(2.0, (double)(cache_line))); - printf("--------------------------------------------------\n"); - -} - -UINT32 uncached_cachemiss_bug(void) -{ - UINT32 result; - UINT32 pMem[2]; - - pMem[0] = 0x12345678; - pMem[1] = 0xFFFFFFFF; - - __asm__ - ( - "cop0 34\n" - "lui $s0, 0xA000\n" - "lw $a0, 48($s0)\n" - "or $s1, $a0, $0\n" - "or $a2, $0, $0\n" - "addiu $a2, 0x7F00\n" - "sw $a2, 48($s0)\n" -// "lw $a1, 0(%[pMem])\n" - "lw $a0, 48($s0)\n" - "lw $a2, 4(%[pMem])\n" - "lw $a1, 0(%[pMem])\n" - "nop\n" - "sw $s1, 48($s0)\n" - "or %[val], $a0, $0\n" - : [val] "=r" (result) - : [pMem] "r" (pMem) - : "a0", "a1", "a2", "s0", "s1" - ); - return result; -} - -UINT32 non_aligned_load() -{ - UINT32 result; - UINT32 pMem[3]; - - __asm__ - ( - "li $t0, 0x01234567\n" - "li $t1, 0x89ABCDEF\n" - "sw $t0, 0(%[pMem])\n" - "sw $t1, 4(%[pMem])\n" - "li %[val], 0x55555555\n" - "lw %[val], 0(%[pMem])\n" - "lwl %[val], 5(%[pMem])\n" - : [val] "=r" (result) - : [pMem] "r" (pMem) - : "t0", "t1" - ); - - if (0 == IsEndianBig()) - { - if (0xCDEF4567 != result) - return ERROR; - } - else - { - if (0xABCDEF67 != result) - return ERROR; - } - return 0; - -} - -int Test10_LoadStore() -{ - int *buf, i, result, data, err; - volatile int *pPtr; - - buf = (int*)malloc(32*sizeof(int)); -// sputs("buf = "); -// print_word((int)buf); -// sputs("\n"); - - while(1) - { - err = TEST10_ERROR; - // Basic Load/Store - pPtr = buf; - *pPtr++ = 0x00000000; - *pPtr++ = 0x55555555; - *pPtr++ = 0xAAAAAAAA; - *pPtr++ = 0xFFFFFFFF; - pPtr = buf; - if (*pPtr++ != 0x00000000) - break; - if (*pPtr++ != 0x55555555) - break; - if (*pPtr++ != 0xAAAAAAAA) - break; - if (*pPtr++ != 0xFFFFFFFF) - break; - - // Filling from left - pPtr = buf; - data = 0x00000000; - for (i=0; i < 32; i++) - { - *pPtr++ = data; - data = data >> 1 | 0x80000000; - - } - pPtr = buf; - data = 0x00000000; - for (i=0; i < 32; i++) - { - - if (*pPtr++ != data) - break; - - data = data >> 1 | 0x80000000; - } - if (i != 32) - break; - - // Filling from right - pPtr = buf; - data = 0x00000000; - for (i=0; i < 32; i++) - { - *pPtr++ = data; - data = data << 1 | 1; - - } - pPtr = buf; - data = 0x00000000; - for (i=0; i < 32; i++) - { - - if (*pPtr++ != data) - break; - - data = data << 1 | 1; - } - if (i != 32) - break; - - // Walking ones - pPtr = buf; - data = 0x00000001; - for (i=0; i < 32; i++) - { - *pPtr++ = data; - data = data << 1; - - } - pPtr = buf; - data = 0x00000001; - for (i=0; i < 32; i++) - { - - if (*pPtr++ != data) - break; - - data = data << 1; - } - if (i != 32) - break; - - // Walking zeros - pPtr = buf; - data = 0xFFFFFFFE; - for (i=0; i < 32; i++) - { - *pPtr++ = data; - data = data << 1 | 1; - - } - pPtr = buf; - data = 0xFFFFFFFE; - for (i=0; i < 32; i++) - { - - if (*pPtr++ != data) - break; - - data = data << 1 | 1; - - } - if (i != 32) - break; - - err = NO_ERROR; - break; - } - free(buf); - - if (IS_ERROR(err)) - return err; - - if (IS_ERROR(non_aligned_load())) - return TEST10_ERROR | 1; - - if (IS_ERROR(uncached_cachemiss_bug())) - return TEST10_ERROR | 2; - - return NO_ERROR; - -} - - -#define NUM_ELEMENTS 10000 -#define NUM_RUNS 3 -int Test11_AddSub() -{ - int buf[NUM_ELEMENTS], result, i, j, diff, fill, num_right_elements, num_right_runs; - - fill = 0xAAAAAAAA; - - num_right_runs = 0; - - for (i=0; i < NUM_RUNS; i++) - { - for (j=0; j < NUM_ELEMENTS; j++) - { - buf[j] = fill; - fill = ((fill ^ j) - 1) << 1; - } - num_right_elements = 2; - result = fibonacci(i, i+1, buf, NUM_ELEMENTS); - for (j=2; j < NUM_ELEMENTS; j++) - { - diff = buf[j] - buf[j-1]; - if (diff == buf[j-2]) - num_right_elements++; - } - if (num_right_elements == NUM_ELEMENTS) - num_right_runs++; - - } - - if (num_right_runs != NUM_RUNS) - return TEST11_ERROR; - - return NO_ERROR; -} - -int Test12_MulDiv() -{ - int mix, i, j; - int s1, s2, sp, st; - div_t div_res; - long cl; - - cl = (long)clock(); - srand(cl); - for (i=0; i < 100; i++) - { - for (j=1; j < 100; j++) - { - mix = (int)rand(); - mix = (mix << 8) ^ (mix << 16); - s1 = (int)rand() ^ mix; - mix = (int)rand(); - mix = (mix << 8) ^ (mix << 16); - s2 = (int)rand() ^ mix; - if (!s2) - { - fprintf(stderr, "Test12_MulDiv(): Division by zero!\n"); - fprintf(stderr, "Clock() was 0x%8.8X\n", cl); - continue; - } - - div_res = div(s1, s2); - - sp = s2*div_res.quot; - st = div_res.rem + sp; - if (st != s1) - return TEST12_ERROR; - } - } - return NO_ERROR; -} - -int Test13_COP0_Load_Store(void) -{ - int i,size; - UINT32 *pSrc32, *pDst32; - - size = 0x2000; - pSrc32 = (UINT32*)0xBFC00000; - pDst32 = (UINT32*)calloc(size,sizeof(UINT32)); - for (i=0; i < size/4; i++) - { - CP0_TR_read_ptr(&pSrc32[i]); - CP0_TR_write_ptr(&pDst32[i]); - } - for (i=size/4-1; i >= 0; i--) - if (pDst32[i] != pSrc32[i]) - break; - - free(pDst32); - i++; - if (i) - return TEST13_ERROR; - - return NO_ERROR; -} - -int Test14_DCACHE_invalidate(void) -{ - int i,size; - UINT32 *pSrc32, *pDst32; - - size = 0x2000; - pSrc32 = (UINT32*)0xBFC00000; - pDst32 = (UINT32*)calloc(size,sizeof(UINT32)); - for (i=0; i < size/4; i++) - { - pDst32[i] = pSrc32[i]; - DCACHE_invalidate_at(&pDst32[i]); - } - for (i=size/4-1; i >= 0; i--) - { - DCACHE_invalidate_at(&pDst32[i]); - if (pDst32[i] != pSrc32[i]) - break; - } - - free(pDst32); - i++; - if (i) - return TEST14_ERROR; - - pDst32 = (UINT32*)calloc(size,sizeof(UINT32)); - for (i=0; i < size/4; i++) - { - pDst32[i] = pSrc32[i]; - } - DCACHE_invalidate_all(); - for (i=size/4-1; i >= 0; i--) - if (pDst32[i] != pSrc32[i]) - break; - - free(pDst32); - i++; - if (i) - return TEST14_ERROR; - - return NO_ERROR; -} - -#define PI_SCALE 10000 -#define PI_MAXARR 2800 -#define PI_ARRINIT 2000 - -int Test15_pi_calc() -{ - int i, j, k; - int carry = 0; - int arr[PI_MAXARR+1]; - UINT32 int_part, result; - UINT16 pi_res[200] = {0}; - UINT16 pi_ref[200] = - { - 3141,5926,5358,9793,2384,6264,3383,2795, 288,4197,1693,9937,5105,8209,7494,4592,3078,1640,6286,2089,9862,8034,8253,4211, - 7067,9821,4808,6513,2823, 664,7093,8446, 955, 582,2317,2535,9408,1284,8111,7450,2841, 270,1938,5211, 555,9644,6229,4895, - 4930,3819,6442,8810,9756,6593,3446,1284,7564,8233,7867,8316,5271,2019, 914,5648,5669,2346, 348,6104,5432,6648,2133,9360, - 7260,2491,4127,3724,5870, 660,6315,5881,7488,1520,9209,6282,9254, 917,1536,4367,8925,9036, 11,3305,3054,8820,4665,2138, - 4146,9519,4151,1609,4330,5727, 365,7595,9195,3092,1861,1738,1932,6117,9310,5118,5480,7446,2379,9627,4956,7351,8857,5272, - 4891,2279,3818,3011,9491,2983,3673,3624,4065,6643, 860,2139,4946,3952,2473,7190,7021,7986, 943,7027,7053,9217,1762,9317, - 6752,3846,7481,8467,6694, 513,2000,5681,2714,5263,5608,2778,5771,3427,5778,9609,1736,3717,8721,4684,4090,1224,9534,3014, - 6549,5853,7105, 792,2796,8925,8923,5420,1995,6112,1290,2196, 864, 344,1815,9813,6297,7477,1309,9605,1870,7211,3499,9999, - 8372,9780,4995,1059,7317,3281,6096,3185 - }; - - // setbuf(stdout, NULL); - k = 0; - for (i = 0; i <= PI_MAXARR; ++i) - arr[i] = PI_ARRINIT; - - for (i = PI_MAXARR; i; i -= 14) - { - int sum = 0; - for (j = i; j > 0; --j) - { - sum = sum*j + PI_SCALE*arr[j]; - arr[j] = sum % (j*2-1); - sum /= (j*2-1); - } - result = carry + sum/PI_SCALE; - int_part = PI_SCALE * (result / PI_SCALE); - pi_res[k] = (UINT16)(result - int_part); - carry = sum % PI_SCALE; - k++; - } - - for (k=0; k < sizeof(pi_ref)/sizeof(UINT16); k++) - { - printf("%d", pi_res[k]); - } - printf("\n"); - - if(memcmp(pi_res, pi_ref, sizeof(pi_ref))) - return TEST15_ERROR; - - return NO_ERROR; -} - -#define TEST_SIZE (16*1024*1024) // Bytes -#define SMALL_TEST_SIZE (8192) // Bytes -#define FLASH_SIZE (8*1024*1024) // Bytes - -int Test16_MemTest(void) -{ - int result, i, j, cnt, size; - UINT8 *ram8 = NULL; - UINT16 *ram16 = NULL; - UINT32 *ram32 = NULL; - UINT32 volatile *pFlashIO = (UINT32*)SYS_FLASH_IO; - UINT32 volatile *pFlashMem = (UINT32*)SYS_FLASH_MEM; - UINT32 volatile *pROM = (UINT32*)0xBFC00000; - UINT32 volatile *pVGA_src0 = (UINT32*)SYS_VGA_BLIT_SRC0; - UINT32 volatile *pVGA_dst = (UINT32*)SYS_VGA_BLIT_DST; - UINT32 volatile *pVGA_dimx_src0 = (UINT32*)SYS_VGA_BLIT_SRC0_DIMX; - UINT32 volatile *pVGA_dimx_dst = (UINT32*)SYS_VGA_BLIT_DST_DIMX; - UINT32 volatile *pVGA_nx = (UINT32*)SYS_VGA_BLIT_NX; - UINT32 volatile *pVGA_ny = (UINT32*)SYS_VGA_BLIT_NY; - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - UINT32 volatile *pVGA_moffs_0 = (UINT32*)SYS_VGA_FB_FRONT; - - - UINT32 *pSrc32, *pDst32; - UINT32 start, end; - - // ---------------------------------------------------------- - // Memtest BEGIN -/* printf("SSRAM Memory Test\r\n"); - printf("Small data test\r\n"); - printf("Write (32-Bit access)..."); - start = clock(); - for (j=0; j < TEST_SIZE/SMALL_TEST_SIZE; j++) - for (i=0; i < SMALL_TEST_SIZE/4; i++) - pSSRAM[i] = (UINT32)i; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1000*(end-start))); - - PrintBuffer8((UINT8*)pSSRAM, 16, 256); - - printf("Verify (32-Bit access)..."); - start = clock(); - for (j=0; j < TEST_SIZE/SMALL_TEST_SIZE; j++) - for (i=SMALL_TEST_SIZE/4-1; i >= 0; i--) - if (pSSRAM[i] != (UINT32)i) - break; - - end = clock(); - i++; - if (i) - printf("failed\r\n"); - else - printf("passed (%.2f MByte/s)\n", (double)TEST_SIZE/(1000*(end-start))); -*/ - // ---------------------------------------------------------- - pSrc32 = (UINT32*)calloc(TEST_SIZE/4,sizeof(UINT32)); - pDst32 = (UINT32*)calloc(TEST_SIZE/4,sizeof(UINT32)); - - // Memtest BEGIN - printf("Dump first 16 bytes of flash blocks\n"); - for (i=0; i < FLASH_SIZE; i += 0x40000) - memdump((UINT8*)(pFlashIO+i/4), 0, 16, 16); - - printf("\n"); - - printf("SDRAM Memory Test\n"); - printf("Test size %d kByte\n\n", TEST_SIZE/1024); - - ram8 = (UINT8*)pDst32; - printf("Zeroize SDRAM (memset)..."); - start = clock(); - memset(ram8, 0, TEST_SIZE); - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - printf("Zeroize SDRAM (8-Bit access)..."); - start = clock(); - for (i=0; i < TEST_SIZE; i++) - ram8[i] = (UINT8)0; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - ram16 = (UINT16*)pDst32; - printf("Zeroize SDRAM (16-Bit access)..."); - start = clock(); - for (i=0; i < TEST_SIZE/2; i++) - ram16[i] = (UINT16)0; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - ram32 = (UINT32*)pDst32; - printf("Zeroize SDRAM (32-Bit access)..."); - start = clock(); - for (i=0; i < TEST_SIZE/4; i++) - ram32[i] = (UINT32)0; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - ram8 = (UINT8*)pDst32; - printf("Write SDRAM (8-Bit access)..."); - start = clock(); - for (i=0; i < TEST_SIZE; i++) - ram8[i] = (UINT8)i; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - printf("Verify SDRAM (8-Bit access)..."); - start = clock(); - for (i=TEST_SIZE-1; i >= 0; i--) - if (ram8[i] != (UINT8)i) - break; - - end = clock(); - i++; - if (i) - { - printf("failed\r\n"); - return TEST16_ERROR; - } - else - printf("passed (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - ram16 = (UINT16*)pDst32; - printf("Write SDRAM (16-Bit access)..."); - start = clock(); - for (i=0; i < TEST_SIZE/2; i++) - ram16[i] = (UINT16)i; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - printf("Verify SDRAM (16-Bit access)..."); - start = clock(); - for (i=TEST_SIZE/2-1; i >= 0; i--) - if (ram16[i] != (UINT16)i) - break; - - end = clock(); - i++; - if (i) - { - printf("failed\r\n"); - return TEST16_ERROR; - } - else - printf("passed (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - - ram32 = (UINT32*)pDst32; - printf("Write SDRAM (32-Bit access)..."); - start = clock(); - for (i=0; i < TEST_SIZE/4; i++) - { - ram32[i] = (UINT32)i; - } - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - printf("Verify SDRAM (32-Bit access)..."); - start = clock(); - for (i=TEST_SIZE/4-1; i >= 0; i--) - { - if (ram32[i] != (UINT32)i) - break; - } - - end = clock(); - i++; - if (i) - { - printf("failed\r\n"); - return TEST16_ERROR; - } - else - printf("passed (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - printf("\n"); - printf("Small data test (size = %d kByte)\n", SMALL_TEST_SIZE/1024); - printf("Write SDRAM (32-Bit access)..."); - ram32 = (UINT32*)pDst32; - start = clock(); - for (j=0; j < TEST_SIZE/SMALL_TEST_SIZE; j++) - for (i=0; i < SMALL_TEST_SIZE/4; i++) - ram32[i] = (UINT32)i; - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - // ------------------------------------------------------------------- - // Verify - printf("Verify SDRAM (32-Bit access)..."); - start = clock(); - for (j=0; j < TEST_SIZE/SMALL_TEST_SIZE; j++) - for (i=SMALL_TEST_SIZE/4-1; i >= 0; i--) - if (ram32[i] != (UINT32)i) - break; - - end = clock(); - i++; - if (i) - { - printf("failed\r\n"); - return TEST16_ERROR; - } - else - printf("passed (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - - for (i=1024; i < 4*65536; i *= 2) - { - printf("Memcpy() (%d kByte)...", i/1024); - start = clock(); - for (j=0; j < TEST_SIZE/i; j++) - memcpy(pDst32, pSrc32, i); - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - } - for (i=1024; i < 4*65536; i *= 2) - { - printf("__gfx_copy_32() (%d kByte)...", i/1024); - start = clock(); - for (j=0; j < TEST_SIZE/i; j++) - __gfx_copy_32(pDst32, pSrc32, i/32); - - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - } - // ------------------------------------------------------------------- - printf("\n"); - - printf("Memcpy() Flash(IO) => SDRAM \n"); - printf("Copying %d kBytes...", FLASH_SIZE/(1024)); - start = clock(); - memcpy(pDst32, (UINT32*)pFlashIO, FLASH_SIZE); - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - printf("\n"); - - printf("Memcpy() Flash(MEM) => SDRAM \n"); - printf("Copying %d kBytes...", FLASH_SIZE/(1024)); - start = clock(); - memcpy(pDst32, (UINT32*)pFlashMem, FLASH_SIZE); - end = clock(); - printf("done (%.2f MByte/s)\n", (double)TEST_SIZE/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - printf("\n"); - - interrupt_register(5, (void*)ISR_blitter_rdy); - interrupt_enable(5); - *pVGA_ctrl |= SYS_VGA_BIT_BLIT_FIN_INTEN; - printf("Blitter speed test (scan disabled)..."); - *pVGA_src0 = (UINT32)pSrc32; - *pVGA_dst = (UINT32)pDst32; - *pVGA_dimx_src0 = (UINT32)0; - *pVGA_dimx_dst = (UINT32)0; - *pVGA_nx = (UINT32)TEST_SIZE/4 - 1; - *pVGA_ny = (UINT32)0; - - start = clock(); - for (i=0; i < 10; i++) - { - _g_blitter_rdy = 0; - *pVGA_ctrl |= SYS_VGA_BIT_BLIT_REQ; - while (!_g_blitter_rdy); - } - end = clock(); - printf("done (%.2f MByte/s)\n", (double)(10*TEST_SIZE)/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - printf("\n"); - - printf("Blitter speed test (scan enabled)..."); - *pVGA_ctrl |= SYS_VGA_BIT_MSTEN; - sleep(500); - *pVGA_src0 = (UINT32)pSrc32; - *pVGA_dst = (UINT32)pDst32; - *pVGA_dimx_src0 = (UINT32)0; - *pVGA_dimx_dst = (UINT32)0; - *pVGA_nx = (UINT32)TEST_SIZE/4 - 1; - *pVGA_ny = (UINT32)0; - - start = clock(); - for (i=0; i < 10; i++) - { - _g_blitter_rdy = 0; - *pVGA_ctrl |= SYS_VGA_BIT_BLIT_REQ; - while (!_g_blitter_rdy); - } - end = clock(); - printf("done (%.2f MByte/s)\n", (double)(10*TEST_SIZE)/(1024*1024*(double)(end-start)/CLOCKS_PER_SEC)); - printf("\n"); - *pVGA_ctrl &= ~SYS_VGA_BIT_MSTEN; - *pVGA_ctrl &= ~SYS_VGA_BIT_BLIT_FIN_INTEN; - interrupt_disable(5); - - size = 0x2000; - memcpy(pDst32, (UINT32*)pROM, size); - printf("Verify boot ROM..."); - for (i=size/4-1; i >= 0; i--) - if (pDst32[i] != pROM[i]) - break; - i++; - if (i) - { - printf("failed\r\n"); - return TEST16_ERROR; - } - else - printf("passed\r\n"); - - printf("Verify FLASH(IO) <=> FLASH(MEM)..."); - if (!memcmp((UINT32*)pFlashIO, (UINT32*)pFlashMem, FLASH_SIZE)) - printf("passed\r\n"); - else - { - printf("failed\r\n"); - return TEST16_ERROR; - } - -// memdump((UINT8*)pSrc32, 0, 16, size); -// memdump((UINT8*)0x40000000, 0, 16, 1024); - - // Memtest END - // ---------------------------------------------------------- - free(pSrc32); - free(pDst32); - - sputs("\r\n"); - return 0; -} - -int main (void) -{ - int result, i, j, cnt, size; - UINT32 volatile *pUART_baud = (UINT32*)SYS_UART_BAUD; - UINT32 volatile *pUART_stat = (UINT32*)SYS_UART_STAT; - UINT32 volatile *pReg = (UINT32*)SYS_LED_PORT; - UINT32 volatile *pReg_usec = (UINT32*)SYS_TIMER_USEC; - UINT32 volatile *pReg_sec = (UINT32*)SYS_TIMER_SEC; - UINT32 volatile *pSSRAM = (UINT32*)SYS_SSRAM_IO; - UINT32 volatile *pTim_ctrl = (UINT32*)SYS_ITIM_CTRL; - UINT32 volatile *pTim_stat = (UINT32*)SYS_ITIM_STAT; - UINT32 volatile *pTim0_cnt = (UINT32*)SYS_ITIM0_CNT; - UINT32 volatile *pTim0_cmp = (UINT32*)SYS_ITIM0_CMP; - UINT32 volatile *pTim1_cnt = (UINT32*)SYS_ITIM1_CNT; - UINT32 volatile *pTim1_cmp = (UINT32*)SYS_ITIM1_CMP; - UINT32 volatile *pVGA_cgcol = (UINT32*)SYS_VGA_CGCOL; - UINT32 volatile *pFlashPicture = (UINT32*)(SYS_FLASH_MEM + 0x00600000); - - UINT32 volatile *pVGA_src0 = (UINT32*)SYS_VGA_BLIT_SRC0; - UINT32 volatile *pVGA_dst = (UINT32*)SYS_VGA_BLIT_DST; - UINT32 volatile *pVGA_dimx_src0 = (UINT32*)SYS_VGA_BLIT_SRC0_DIMX; - UINT32 volatile *pVGA_dimx_dst = (UINT32*)SYS_VGA_BLIT_DST_DIMX; - UINT32 volatile *pVGA_nx = (UINT32*)SYS_VGA_BLIT_NX; - UINT32 volatile *pVGA_ny = (UINT32*)SYS_VGA_BLIT_NY; - UINT32 volatile *pVGA_ctrl = (UINT32*)SYS_VGA_CTRL; - UINT32 volatile *pVGA_moffs_0 = (UINT32*)SYS_VGA_FB_FRONT; - - UINT32 screen_res_x, screen_res_y, screen_fps; - UINT64 *pBuf64_0, *pBuf64_1; - time_t curr_date; - struct tm *pDate, date; - UINT32 start, end; - char sel[80]; - struct timeval time_sec; - - - g_cnt = 1; - Screen_clr(); - - *pVGA_cgcol = 0x00FFFFFF; - - *pTim0_cnt = 0; - *pTim1_cnt = 0; - *pTim0_cmp = 0x4000; - *pTim1_cmp = 100000000; - *pTim_stat = (1 << 2) | (1 << 0); - *pTim_ctrl = (3 << 2); - -// *pUART_baud = 1; - - setbuf(stdout, NULL); - PrintCPUinfo(); - - interrupt_register(3, handler3); - fprintf(stderr, "UART interrupt registered.\n"); - - interrupt_register(7, handler7); - fprintf(stderr, "Timer interrupt registered.\n"); - - calibrate_delay(); - - printf("\n"); - - printf("Aktuelles Datum\n"); - curr_date = time(NULL); - pDate = gmtime(&curr_date); - puts(asctime(pDate)); - - if (curr_date < 2) - { - printf("Datum und Uhrzeit setzen? [j/N]: "); - scanf("%s", sel); - if (toupper(sel[0]) == 'J') - { - do - { - printf("Datum\n"); - printf("Jahr : "); - scanf("%d", &date.tm_year); - printf("Monat : "); - scanf("%d", &date.tm_mon); - printf("Tag : "); - scanf("%d", &date.tm_mday); - - printf("Uhrzeit\n"); - printf("Stunde : "); - scanf("%d", &date.tm_hour); - printf("Minute : "); - scanf("%d", &date.tm_min); - printf("Sekunde : "); - scanf("%d", &date.tm_sec); - - date.tm_year -= 1900; - date.tm_mon -= 1; - time_sec.tv_sec = mktime(&date); - time_sec.tv_usec = 0; - settimeofday(&time_sec, NULL); - - printf("Datum\n"); - curr_date = time(NULL); - pDate = gmtime(&curr_date); - puts(asctime(pDate)); - printf("\nOK? [J/n]: "); - scanf("%s", sel); - printf("sel=%d\n", (int)sel[0]); - - - } while(toupper(sel[0]) == 'N'); - } - } - srand(clock()); - *pReg = uncached_cachemiss_bug(); - Test16_MemTest(); - - printf("pf = %08X\n", (UINT32)pf()); - *pf() = 0x1234; - printf("*pf = %08X\n", (UINT32)*pf()); - - box_create(&box, 32, 32); - GFX_init(&gfx); - - start = clock(); - for (i=0; i < 100000; i++) - { - GFX_box_draw_direct(&gfx, &box, (UINT32)rand()%800, (UINT32)rand()%600, (UINT32)rand()); - } - - end = clock(); - printf("Fillrate %f rect/s\n", (float)i/((float)(end-start)/CLOCKS_PER_SEC)); - sleep(2000); - - GFX_frame(&gfx, GFX_FRAME_SYNC); - GFX_set_background(&gfx, pFlashPicture, 800, 600, 1, 1); - posx = posy = 0; - GFX_show(&gfx); - -// while(1) - { - // Blitter test - fprintf(stderr, "Blit start\n"); - *pVGA_src0 = (UINT32)*pFlashPicture; - *pVGA_dst = (UINT32)*pVGA_moffs_0; - *pVGA_dimx_src0 = (UINT32)4*800; - *pVGA_dimx_dst = (UINT32)4*800; - *pVGA_nx = (UINT32)800 - 1; - *pVGA_ny = (UINT32)600 - 1; - *pVGA_ctrl |= SYS_VGA_BIT_BLIT_REQ; - while (*pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - fprintf(stderr, "Blit end\n"); - sleep(250); - - // Blitter test - fprintf(stderr, "Blit start\n"); - *pVGA_src0 = (UINT32)gfx.pBG; - *pVGA_dst = (UINT32)*pVGA_moffs_0; - *pVGA_dimx_src0 = (UINT32)4*800; - *pVGA_dimx_dst = (UINT32)4*800; - *pVGA_nx = (UINT32)800 - 1; - *pVGA_ny = (UINT32)600 - 1; - *pVGA_ctrl |= SYS_VGA_BIT_BLIT_REQ; - while (*pVGA_ctrl & SYS_VGA_BIT_BLIT_BSY); - - fprintf(stderr, "Blit end\n"); - sleep(1000); - } - - - interrupt_enable(7); - interrupt_enable(3); - *pTim_ctrl |= 3; - *pUART_stat |= (1 << 6); - - cnt = 0; - while (1) - { - for (i=0; i < 100000; i++) - { - interrupt_disable(7); - } - for (i=0; i < 100000; i++) - { - interrupt_enable(7); - } - - *pReg = cnt & 0x3FFFFFFF; - - printf("-------------------------------------------\n"); - printf("-- LoadStore ------------------------------\n"); - printf("-------------------------------------------\n"); - result = Test10_LoadStore(); - if (IS_ERROR(result)) - break; - printf("passed\n\n"); - - printf("-------------------------------------------\n"); - printf("-- AddSub ---------------------------------\n"); - printf("-------------------------------------------\n"); - result = Test11_AddSub(); - if (IS_ERROR(result)) - break; - printf("passed\n\n"); - - printf("-------------------------------------------\n"); - printf("-- MulDiv ---------------------------------\n"); - printf("-------------------------------------------\n"); - result = Test12_MulDiv(); - if (IS_ERROR(result)) - break; - printf("passed\n\n"); - - printf("-------------------------------------------\n"); - printf("-- Cop0 LWZ0 and SWC0 ---------------------\n"); - printf("-------------------------------------------\n"); - result = Test13_COP0_Load_Store(); - if (IS_ERROR(result)) - break; - printf("passed\n\n"); - - printf("-------------------------------------------\n"); - printf("-- D-Cache invalidate ---------------------\n"); - printf("-------------------------------------------\n"); - result = Test14_DCACHE_invalidate(); - if (IS_ERROR(result)) - break; - printf("passed\n\n"); - - printf("-------------------------------------------\n"); - printf("-- PI calc --------------------------------\n"); - printf("-------------------------------------------\n"); - result = Test15_pi_calc(); - if (IS_ERROR(result)) - break; - printf("passed\n\n"); - - printf("-------------------------------------------\n"); - printf("-- Paranoia -------------------------------\n"); - printf("-------------------------------------------\n"); - paranoia(1, NULL); - printf("passed\n\n"); - -// printf("-------------------------------------------\n"); -// printf("-- Mem Test -------------------------------\n"); -// printf("-------------------------------------------\n"); -// result = Test16_MemTest(); -// if (IS_ERROR(result)) -// break; -// printf("passed\n\n"); - - printf("Iteration %d: Passed\n", cnt); - curr_date = time(NULL); - pDate = gmtime(&curr_date); - puts(asctime(pDate)); - cnt++; - *pTim0_cmp = 0x4000 + (UINT32)(rand() & 0x00FFFFFF); - *pTim_ctrl |= 1; - -// printf("V=%.17e\n", pow((double)cnt-1, (double)cnt)); - } - *pReg = 0x40000000 | cnt; - fprintf(stderr, "Failed with error %8.8X\n", result); - - return 1; - -} - diff --git a/lib/CPUs/MIPS/bsp/examples/testlibusb.c b/lib/CPUs/MIPS/bsp/examples/testlibusb.c deleted file mode 100644 index 5b48601..0000000 --- a/lib/CPUs/MIPS/bsp/examples/testlibusb.c +++ /dev/null @@ -1,210 +0,0 @@ -/* testlibusb.c */ - -#include -#include -#include -#include -#include -#include -#include "tiffio.h" - - -#define BUFLEN (256*1024) -#define FLASHSIZE (2*1024*1024) -int main(int argc, char *argv[]) -{ - char *pBuf; - int ret, i, xfer_cnt, filesize, size; - char string[256]; - double start, end; - struct timeval t; - FILE *pFile; - TIFF *pTif; - ttag_t config, photometric; - uint16 nSamples, nBits; - uint32 width, height; - uint32* raster; - - typedef struct _scmd_t - { - unsigned sync; - unsigned code; - unsigned len; - } cmd_t; - - cmd_t cmd_read = {0xC24755AA, 2, BUFLEN}; - cmd_t cmd_write = {0xC24755AA, 1, BUFLEN}; - cmd_t cmd_flash_read = {0xC24755AA, 3, FLASHSIZE}; - cmd_t cmd_flash_write = {0xC24755AA, 4, FLASHSIZE}; - - libusb_context *pCtx; - libusb_device_handle *handle; - size_t cnt; - - ret = libusb_init(&pCtx); - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - - libusb_set_debug(pCtx, 3); - - handle = libusb_open_device_with_vid_pid (pCtx, 0x04B4, 0x7200); - if (!handle) - { - printf("Error on opening device\n"); - return 1; - } - - pBuf = (char*)malloc(BUFLEN); - memset(pBuf, 0, BUFLEN); - - // ------------------------------------------------------ - printf("Send command\n"); - // ------------------------------------------------------ - ret = libusb_bulk_transfer (handle, 0x01, (char*)&cmd_write, sizeof(cmd_t), &xfer_cnt, 5000); - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - gettimeofday(&t, NULL); - start = t.tv_sec + 1E-6*t.tv_usec; - ret = libusb_bulk_transfer(handle, 0x01, (char*)pBuf, cmd_write.len, &xfer_cnt, 5000); - size = xfer_cnt; - gettimeofday(&t, NULL); - end = t.tv_sec + 1E-6*t.tv_usec; - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - printf("Sent %d bytes\n", size); - printf("Data rate: %.2f kbyte/s\n", (double)size/(1024*(end-start))); - - // ------------------------------------------------------ - printf("Read command\n"); - // ------------------------------------------------------ - ret = libusb_bulk_transfer(handle, 0x01, (char*)&cmd_read, sizeof(cmd_t), &xfer_cnt, 5000); - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - gettimeofday(&t, NULL); - start = t.tv_sec + 1E-6*t.tv_usec; - ret = libusb_bulk_transfer(handle, 0x82, (char*)pBuf, cmd_read.len, &xfer_cnt, 5000); - size = xfer_cnt; - gettimeofday(&t, NULL); - end = t.tv_sec + 1E-6*t.tv_usec; - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - printf("Received %d bytes\n", size); - printf("Data rate: %.2f kbyte/s\n", (double)size/(1024*(end-start))); - free(pBuf); - - // ------------------------------------------------------ - printf("Read Flash\n"); - // ------------------------------------------------------ - pBuf = (char*)malloc(FLASHSIZE); - memset(pBuf, 0, FLASHSIZE); - ret = libusb_bulk_transfer(handle, 0x01, (char*)&cmd_flash_read, sizeof(cmd_t), &xfer_cnt, 5000); - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - - gettimeofday(&t, NULL); - start = t.tv_sec + 1E-6*t.tv_usec; - ret = libusb_bulk_transfer(handle, 0x82, (char*)pBuf, cmd_flash_read.len, &xfer_cnt, 500000); - size = xfer_cnt; - gettimeofday(&t, NULL); - end = t.tv_sec + 1E-6*t.tv_usec; - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - printf("Received %d bytes\n", size); - printf("Data rate: %.2f kbyte/s\n", (double)size/(1024*(end-start))); - - pFile = fopen("./flash.bin", "wb"); - fwrite(pBuf, 1, size, pFile); - fclose(pFile); - free(pBuf); - - if (argc > 1) - { - // ------------------------------------------------------ - printf("Write Flash (File = %s)\n", argv[1]); - // ------------------------------------------------------ - pTif = TIFFOpen(argv[1],"r"); - if (!pTif) - { - printf("Unable to open TIFF-file!\n"); - return 1; - } - ret = TIFFGetField(pTif, TIFFTAG_IMAGEWIDTH, &width); - ret = TIFFGetField(pTif, TIFFTAG_IMAGELENGTH, &height); - - printf("TIFFTAG_IMAGEWIDTH = %d\n", width); - printf("TIFFTAG_IMAGELENGTH = %d\n", height); - - filesize = width * height * sizeof (uint32); - - raster = (uint32*) _TIFFmalloc(filesize); - if (raster != NULL) - { - ret = TIFFReadRGBAImageOriented(pTif, width, height, raster, ORIENTATION_TOPLEFT, 0); - if (!ret) - { - printf("Unable to reading TIFF-file!\n"); - return 1; - } - } - TIFFClose(pTif); - - printf ("File size = %d\n", filesize); - if (filesize > FLASHSIZE) - { - printf("Cannot write flash: image to large!\n"); - return 1; - } - - cmd_flash_write.len = filesize; - ret = libusb_bulk_transfer(handle, 0x01, (char*)&cmd_flash_write, sizeof(cmd_t), &xfer_cnt, 5000); - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - - gettimeofday(&t, NULL); - start = t.tv_sec + 1E-6*t.tv_usec; - size = 0; - ret = libusb_bulk_transfer(handle, 0x01, (char*)raster, filesize, &xfer_cnt, 500000); - if (ret != LIBUSB_SUCCESS) - { - printf("Error %08X\n", ret); - return 1; - } - size += xfer_cnt; - gettimeofday(&t, NULL); - end = t.tv_sec + 1E-6*t.tv_usec; - printf("Sent %d bytes\n", size); - printf("Data rate: %.2f kbyte/s\n", (double)size/(1024*(end-start))); - - _TIFFfree(raster); - - } - - libusb_close(handle); - libusb_exit(pCtx); - return 0; - -} diff --git a/lib/CPUs/MIPS/bsp/examples/ucb.c b/lib/CPUs/MIPS/bsp/examples/ucb.c deleted file mode 100644 index d3b9a82..0000000 --- a/lib/CPUs/MIPS/bsp/examples/ucb.c +++ /dev/null @@ -1,44 +0,0 @@ -#include "libsys.h" - -int uncached_cachemiss_bug(UINT32* pMem) -{ - UINT32 result; - - pMem[0] = 0x12345678; - pMem[1] = 0xFFFFFFFF; - - DCACHE_invalidate_all(); - - __asm__ - ( - "lui $s0, 0xA000\n" - "lw $a0, 32($s0)\n" - "or $s1, $a0, $0\n" - "or $a2, $0, $0\n" - "addiu $a2, 1\n" - "sw $a2, 32($s0)\n" -// "lw $a1, 0(%[pMem])\n" - "lw $a0, 32($s0)\n" - "lw $a2, 4(%[pMem])\n" - "lw $a1, 0(%[pMem])\n" - "nop\n" - "sw $s1, 8($s0)\n" - "or %[val], $a0, $0\n" - : [val] "=r" (result) - : [pMem] "r" (pMem) - : "a0", "a1", "a2", "s0", "s1" - ); - return result; -} - -int main() -{ - UINT32 volatile *pLed = (UINT32*)SYS_LED_PORT; - int buf[256], res; - - res = uncached_cachemiss_bug(buf); - *pLed = res; - - return res; - -} diff --git a/lib/CPUs/MIPS/bsp/examples/whet.c b/lib/CPUs/MIPS/bsp/examples/whet.c deleted file mode 100644 index d939910..0000000 --- a/lib/CPUs/MIPS/bsp/examples/whet.c +++ /dev/null @@ -1,265 +0,0 @@ -/* - * @(#)whet.c 1.1 - */ - -/* - * Whetstone benchmark in C. This program is a translation of the - * original Algol version in "A Synthetic Benchmark" by H.J. Curnow - * and B.A. Wichman in Computer Journal, Vol 19 #1, February 1976. - * - * Used to test compiler optimization and floating point performance. - */ - -/* - * Compile with -DMEASURE_TIME for time measurement. - * - * Compile with -DPOUT to print intermediate results. - * Running this benchmark without printing the intermediate results is - * contrary to the authors' intentions! But using serial I/O can draw back - * the performance extremely when low baud rate communication is used. - */ -#define MEASURE_TIME 1 -//#define POUT 1 - -#define ITERATIONS 10 /* 10 Million Whetstone instructions */ - -#include -#include - -#ifdef MEASURE_TIME -#include -unsigned long Begin_Time,End_Time,Total_Time; -double whetstones; -#endif - -#define Pout(n, j, k, x1, x2, x3, x4) pout(n, j, k, x1, x2, x3, x4); - -double xx1, xx2, xx3, xx4, x, y, z, t, t1, t2; -double e1[4]; -unsigned int i, j, k, l, n1, n2, n3, n4, n6, n7, n8, n9, n10, n11; - -main() -{ - printf("\nWhetstone Benchmark\n\n"); - - printf( "%d iterations\n", ITERATIONS ); - -#ifdef MEASURE_TIME - Begin_Time = clock(); -#endif - - /* initialize constants */ - - t = 0.499975; - t1 = 0.50025; - t2 = 2.0; - - /* set values of module weights */ - - n1 = 0 * ITERATIONS; - n2 = 12 * ITERATIONS; - n3 = 14 * ITERATIONS; - n4 = 345 * ITERATIONS; - n6 = 210 * ITERATIONS; - n7 = 32 * ITERATIONS; - n8 = 899 * ITERATIONS; - n9 = 616 * ITERATIONS; - n10 = 0 * ITERATIONS; - n11 = 93 * ITERATIONS; - -/* MODULE 1: simple identifiers */ - - xx1 = 1.0; - xx2 = xx3 = xx4 = -1.0; - - for(i = 1; i <= n1; i += 1) { - xx1 = ( xx1 + xx2 + xx3 - xx4 ) * t; - xx2 = ( xx1 + xx2 - xx3 + xx4 ) * t; - xx3 = ( xx1 - xx2 + xx3 + xx4 ) * t; - xx4 = (-xx1 + xx2 + xx3 + xx4 ) * t; - } -#ifdef POUT - Pout(n1, n1, n1, xx1, xx2, xx3, xx4); -#endif - - -/* MODULE 2: array elements */ - - e1[0] = 1.0; - e1[1] = e1[2] = e1[3] = -1.0; - - for (i = 1; i <= n2; i +=1) { - e1[0] = ( e1[0] + e1[1] + e1[2] - e1[3] ) * t; - e1[1] = ( e1[0] + e1[1] - e1[2] + e1[3] ) * t; - e1[2] = ( e1[0] - e1[1] + e1[2] + e1[3] ) * t; - e1[3] = (-e1[0] + e1[1] + e1[2] + e1[3] ) * t; - } -#ifdef POUT - Pout(n2, n3, n2, e1[0], e1[1], e1[2], e1[3]); -#endif - -/* MODULE 3: array as parameter */ - - for (i = 1; i <= n3; i += 1) - pa(e1); -#ifdef POUT - Pout(n3, n2, n2, e1[0], e1[1], e1[2], e1[3]); -#endif - -/* MODULE 4: conditional jumps */ - - j = 1; - for (i = 1; i <= n4; i += 1) { - if (j == 1) - j = 2; - else - j = 3; - - if (j > 2) - j = 0; - else - j = 1; - - if (j < 1 ) - j = 1; - else - j = 0; - } -#ifdef POUT - Pout(n4, j, j, xx1, xx2, xx3, xx4); -#endif - -/* MODULE 5: omitted */ - -/* MODULE 6: integer arithmetic */ - - j = 1; - k = 2; - l = 3; - - for (i = 1; i <= n6; i += 1) { - j = j * (k - j) * (l -k); - k = l * k - (l - j) * k; - l = (l - k) * (k + j); - - e1[l - 2] = j + k + l; /* C arrays are zero based */ - e1[k - 2] = j * k * l; - } -#ifdef POUT - Pout(n6, j, k, e1[0], e1[1], e1[2], e1[3]); -#endif - -/* MODULE 7: trig. functions */ - - x = y = 0.5; - - for(i = 1; i <= n7; i +=1) { - x = t * atan(t2*sin(x)*cos(x)/(cos(x+y)+cos(x-y)-1.0)); - y = t * atan(t2*sin(y)*cos(y)/(cos(x+y)+cos(x-y)-1.0)); - } -#ifdef POUT - Pout(n7, j, k, x, x, y, y); -#endif - -/* MODULE 8: procedure calls */ - - x = y = z = 1.0; - - for (i = 1; i <= n8; i +=1) - p3(x, y, &z); -#ifdef POUT - Pout(n8, j, k, x, y, z, z); -#endif - -/* MODULE9: array references */ - - j = 1; - k = 2; - l = 3; - - e1[0] = 1.0; - e1[1] = 2.0; - e1[2] = 3.0; - - for(i = 1; i <= n9; i += 1) - p0(); -#ifdef POUT - Pout(n9, j, k, e1[0], e1[1], e1[2], e1[3]); -#endif - -/* MODULE10: integer arithmetic */ - - j = 2; - k = 3; - - for(i = 1; i <= n10; i +=1) { - j = j + k; - k = j + k; - j = k - j; - k = k - j - j; - } -#ifdef POUT - Pout(n10, j, k, xx1, xx2, xx3, xx4); -#endif - -/* MODULE11: standard functions */ - - x = 0.75; - for(i = 1; i <= n11; i +=1) - x = sqrt( exp( log(x) / t1)); - -#ifdef POUT - Pout(n11, j, k, x, x, x, x); -#endif - -#ifdef MEASURE_TIME - End_Time = clock(); - - Total_Time = End_Time - Begin_Time; /* in 1/ seconds */ - - whetstones = (1e5 * ITERATIONS * CLOCKS_PER_SEC) / Total_Time; - printf("\nWhetstone runs in %ld clock ticks (%d). %ld Kwhets/second\n", - Total_Time, CLOCKS_PER_SEC, (long) whetstones / 1000 ); -#endif -} - -pa(e) -double e[4]; -{ - register int j; - - j = 0; - lab: - e[0] = ( e[0] + e[1] + e[2] - e[3] ) * t; - e[1] = ( e[0] + e[1] - e[2] + e[3] ) * t; - e[2] = ( e[0] - e[1] + e[2] + e[3] ) * t; - e[3] = ( -e[0] + e[1] + e[2] + e[3] ) / t2; - j += 1; - if (j < 6) - goto lab; -} - -p3(x, y, z) -double x, y, *z; -{ - x = t * (x + y); - y = t * (x + y); - *z = (x + y) /t2; -} - -p0() -{ - e1[j] = e1[k]; - e1[k] = e1[l]; - e1[l] = e1[j]; -} - -#ifdef POUT -pout(n, j, k, x1, x2, x3, x4) -unsigned int n, j, k; -double x1, x2, x3, x4; -{ - printf("%5u %5u %5u %11.3e %11.3e %11.3e %11.3e\n", - n, j, k, x1, x2, x3, x4); -} -#endif diff --git a/lib/CPUs/MIPS/bsp/examples/xcpt.c b/lib/CPUs/MIPS/bsp/examples/xcpt.c deleted file mode 100644 index a6eca43..0000000 --- a/lib/CPUs/MIPS/bsp/examples/xcpt.c +++ /dev/null @@ -1,139 +0,0 @@ -#include -#include -#include -#include -#include -#include "libsys.h" -#include "xcpt.h" -#include "irq.h" - -static fp_xcpt_t g_xcpt_handler[MAX_NUM_XCPT] = {NULL}; - -char *_xcpt_code_str[MAX_NUM_XCPT] = -{ - "Int", "Mod", "TLBL", "TLBS", "AdEL", "AdES", "IBE", "DBE", - "Sys", "Bp", "RI", "CpU", "Ov", "Tr", "NCD/VCEI", "MC/FPE", - "Res(16)", "Res(17)", "Res(18)", "Res(19)", "Res(20)", "Res(21)", "Res(22)", "WATCH", - "Res(24)", "Res(25)", "Res(26)", "Res(27)", "Res(28)", "Res(29)", "Res(30)", "VCED" - }; - -void xcpt_register(int xcpt_num, fp_xcpt_t fp) -{ - if ((xcpt_num >= Mod) && (xcpt_num <= VCED)) - g_xcpt_handler[xcpt_num] = fp; - -} - -int _xcpt_dispatch(struct xcptcontext * xcp) -{ - int xcpt_code, result, i; - - xcpt_code = ((0xFF & xcp->cr) >> 2); - - result = XCPT_ERR_NOTHANDLED; - switch(xcpt_code) - { - case Int: - result = _irq_dispatch(xcp); - break; - - default: - if (g_xcpt_handler[xcpt_code]) - { - result = (g_xcpt_handler[xcpt_code])(xcp); - } - break; - } - return result; -} - -int _xcpt_deliver(struct xcptcontext * _xcp) -{ - - int exc_code; - volatile int *pInstr; - - /* This function gets called by the low-level exception handler. */ - if (_xcpt_dispatch(_xcp) == XCPT_ERR_NOTHANDLED) - { - sputs("\n"); - PRINT_REG(" Status : ", _xcp->sr); - PRINT_REG(" Cause : ", _xcp->cr); - PRINT_REG(" EPC : ", _xcp->epc); - PRINT_REG("BadAddr : ", _xcp->baddr); - sputs("\n"); - PRINT_REG(" MDLO : ", _xcp->mdlo); - PRINT_REG(" MDHI : ", _xcp->mdhi); - - sputs("\n"); - - sputs("Registers:\n"); - PRINT_REG(" 0 (ze) : ", _xcp->regs[0]); - PRINT_REG(" 1 (at) : ", _xcp->regs[1]); - PRINT_REG(" 2 (v0) : ", _xcp->regs[2]); - PRINT_REG(" 3 (v1) : ", _xcp->regs[3]); - sputs("\n"); - PRINT_REG(" 4 (a0) : ", _xcp->regs[4]); - PRINT_REG(" 5 (a1) : ", _xcp->regs[5]); - PRINT_REG(" 6 (a2) : ", _xcp->regs[6]); - PRINT_REG(" 7 (a3) : ", _xcp->regs[7]); - sputs("\n"); - PRINT_REG(" 8 (t0) : ", _xcp->regs[8]); - PRINT_REG(" 9 (t1) : ", _xcp->regs[9]); - PRINT_REG("10 (t2) : ", _xcp->regs[10]); - PRINT_REG("11 (t3) : ", _xcp->regs[11]); - sputs("\n"); - PRINT_REG("12 (t4) : ", _xcp->regs[12]); - PRINT_REG("13 (t5) : ", _xcp->regs[13]); - PRINT_REG("14 (t6) : ", _xcp->regs[14]); - PRINT_REG("15 (t7) : ", _xcp->regs[15]); - sputs("\n"); - PRINT_REG("16 (s0) : ", _xcp->regs[16]); - PRINT_REG("17 (s1) : ", _xcp->regs[17]); - PRINT_REG("18 (s2) : ", _xcp->regs[18]); - PRINT_REG("19 (s3) : ", _xcp->regs[19]); - sputs("\n"); - PRINT_REG("20 (s4) : ", _xcp->regs[20]); - PRINT_REG("21 (s5) : ", _xcp->regs[21]); - PRINT_REG("22 (s6) : ", _xcp->regs[22]); - PRINT_REG("23 (s7) : ", _xcp->regs[23]); - sputs("\n"); - PRINT_REG("24 (t8) : ", _xcp->regs[24]); - PRINT_REG("25 (t9) : ", _xcp->regs[25]); - PRINT_REG("26 (k0) : ", _xcp->regs[26]); - PRINT_REG("27 (k1) : ", _xcp->regs[27]); - sputs("\n"); - PRINT_REG("28 (gp) : ", _xcp->regs[28]); - PRINT_REG("29 (sp) : ", _xcp->regs[29]); - PRINT_REG("30 (fp) : ", _xcp->regs[30]); - PRINT_REG("31 (ra) : ", _xcp->regs[31]); - sputs("\n"); - sputs("\n"); - - exc_code = (_xcp->cr >> 2) & 0x1F; - - sputs("Unhandled exception <"); - sputs(_xcpt_code_str[exc_code]); - sputs("> at PC : "); - - if (_xcp->cr & 0x80000000) - { - pInstr = (int*)(_xcp->epc + 4); - } - else - { - pInstr = (int*)(_xcp->epc); - } - print_word((int)pInstr); - sputs("\n"); - - sputs("Instruction at exception address : "); - print_word(*pInstr); - sputs("\n"); - - sputs("Terminate.\n"); - _exit(exc_code); - } - - return 0; -} diff --git a/lib/CPUs/MIPS/bsp/examples/xcpt.h b/lib/CPUs/MIPS/bsp/examples/xcpt.h deleted file mode 100644 index 7958912..0000000 --- a/lib/CPUs/MIPS/bsp/examples/xcpt.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef XCPT_H -#define XCPT_H - -#define MAX_NUM_XCPT 32 -#define XCPT_ERR_NOTHANDLED 0x80000000 - -typedef enum -{ - Int = 0, Mod = 1, TLBL = 2, TLBS = 3, AdEL = 4, AdES = 5, - IBE = 6, DBE = 7, Syscall = 8, Bp = 9, RI = 10, CpU = 11, - Ov = 12, TRAP = 13, VCEI = 14, FPE = 15, C2E = 16, Watch = 23, VCED = 31 - -} EXCEPTION_CODE; - -typedef unsigned int reg_t; - -typedef struct xcptcontext -{ - /* This is the exception context frame that is passed to the exception - handlers. It gets filled in by the low-level exception handler in - "machine.S". An assembler version of this structure can be found at the - bottom of "machine.H".*/ - reg_t sr; /* Status Register */ - reg_t cr; /* Cause Register */ - reg_t epc; /* PC at time of exception. */ - reg_t baddr; - reg_t regs[32]; /* Copy of all general purpose registers */ - reg_t mdlo; /* HI/LO registers (used for memory management) */ - reg_t mdhi; - reg_t count; /* Timer registers */ - reg_t compare; - struct xcptcontext * prev; /* To link exceptions. (unused for now) */ - unsigned xclass; /* Priority class of this exception. (unused for now). */ - -} EXCEPTION_CONTEXT; - -typedef int (*fp_xcpt_t)(struct xcptcontext * xcp); - -#define PRINT_REG(tag_str, reg) \ - sputs(tag_str); \ - print_word(reg); \ - sputs(" "); - - -#define PRINT_REG_CHG(tag_str, reg, chg_tag) \ - sputs(tag_str); \ - print_word(reg); \ - sputs(chg_tag); \ - sputs(" "); - - -// Public functions -void xcpt_register(int xcpt_num, fp_xcpt_t fp); - -#endif // XCPT_H diff --git a/lib/CPUs/MIPS/bsp/examples/xcpt_asm.h b/lib/CPUs/MIPS/bsp/examples/xcpt_asm.h deleted file mode 100644 index 5735422..0000000 --- a/lib/CPUs/MIPS/bsp/examples/xcpt_asm.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef XCPT_ASM_H -#define XCPT_ASM_H - -/* LEAF - declare leaf routine */ -#define LEAF(symbol) \ - .globl symbol; \ - .align 2; \ - .type symbol, @function; \ - .ent symbol, 0; \ -symbol: .frame sp, 0, ra - -/* END - mark end of function */ -#define END(function) \ - .end function; \ - .size function, .-function - -/* Exception stack size */ -#define XCP_SIZE 32768 - -/* save location for registers */ -#define XCP_SR 0 -#define XCP_CR 4 -#define XCP_EPC 8 -#define XCP_BADDR 12 -#define XCP_ZERO 16 -#define XCP_AT 20 -#define XCP_V0 24 -#define XCP_V1 28 -#define XCP_A0 32 -#define XCP_A1 36 -#define XCP_A2 40 -#define XCP_A3 44 -#define XCP_T0 48 -#define XCP_T1 52 -#define XCP_T2 56 -#define XCP_T3 60 -#define XCP_T4 64 -#define XCP_T5 68 -#define XCP_T6 72 -#define XCP_T7 76 -#define XCP_S0 80 -#define XCP_S1 84 -#define XCP_S2 88 -#define XCP_S3 92 -#define XCP_S4 96 -#define XCP_S5 100 -#define XCP_S6 104 -#define XCP_S7 108 -#define XCP_T8 112 -#define XCP_T9 116 -#define XCP_JP 116 -#define XCP_K0 120 -#define XCP_K1 124 -#define XCP_GP 128 -#define XCP_SP 132 -#define XCP_S8 136 -#define XCP_FP 136 -#define XCP_RA 140 -#define XCP_MDLO 144 -#define XCP_MDHI 148 -#define XCP_COUNT 152 -#define XCP_COMPARE 156 -#define XCP_PREV 160 -#define XCP_CLASS 164 - - -#endif /* XCPT_ASM_H */ diff --git a/lib/CPUs/MIPS/dist/files.dist b/lib/CPUs/MIPS/dist/files.dist deleted file mode 100644 index 8bcf8b9..0000000 --- a/lib/CPUs/MIPS/dist/files.dist +++ /dev/null @@ -1,37 +0,0 @@ -../../../misc/dpram_2w2r.vhd -../../../misc/dpram_1w1r.vhd -../../../FIFO/src/fifo_ctrl_pkg.vhd -../../../FIFO/src/gray_counter.vhd -../../../FIFO/src/fifo_sync_ctrl.vhd -../../../FIFO/src/fifo_sync.vhd -../../../FIFO/src/fifo_async_ctrl.vhd -../../../FIFO/src/fifo_async.vhd - -../../../uart/bbfifo_16x8.vhd -../../../uart/kcuart_rx.vhd -../../../uart/kcuart_tx.vhd -../../../uart/uart_rx.vhd -../../../uart/uart_tx.vhd -../../../uart/uart_wb.vhd - -../../../misc/gpio_wb.vhd -../../../misc/async_types.vhd -../../../misc/async_port_wb.vhd -../src/async_defs.vhd - -../src/bootloader.ROM.vhd -../../../misc/rom_wb.vhd - -../src/core/mips_types.vhd -../src/core/mips_instr.vhd -../src/core/mips_reg.vhd -../src/core/mips_shifter.vhd -../src/core/mips_alu.vhd -../src/core/mips_muldiv.vhd -../src/core/mips_cop.vhd -../src/core/mips_icache.vhd -../src/core/mips_dcache.vhd -../src/core/mips_biu.vhd -../src/core/mips_bcu.vhd -../src/core/mips_pipeline.vhd -../src/core/mips_top.vhd diff --git a/lib/CPUs/MIPS/dist/mdist b/lib/CPUs/MIPS/dist/mdist deleted file mode 100644 index c98ae1a..0000000 --- a/lib/CPUs/MIPS/dist/mdist +++ /dev/null @@ -1,54 +0,0 @@ -#!/bin/sh - -PROJECT="mips_sys" -DIST_FILE="./files.dist" -DIST_DIR="./release/mips.r13" - -# --------------------------------------------------------------- -mkdir -p $DIST_DIR/src -mkdir -p $DIST_DIR/sim -mkdir -p $DIST_DIR/doc -mkdir -p $DIST_DIR/doc/toolchain -mkdir -p $DIST_DIR/tools - -cp -a ../doc/*.pdf $DIST_DIR/doc/ -cp -a ../doc/*.txt $DIST_DIR/doc/ -cp -a ../doc/toolchain/* $DIST_DIR/doc/toolchain/ -cp -a ../tools/* $DIST_DIR/tools/ - -cp -a ./tmpl/notes.txt $DIST_DIR/ -cp -a ./tmpl/gpl-3.0.txt $DIST_DIR/ -cp -a ./tmpl/tb_$PROJECT.wdo $DIST_DIR/sim/ -cp -a ./tmpl/hello.flash.bin $DIST_DIR/sim/ -cp -a ./tmpl/mips_sys.vhd $DIST_DIR/src/ - -for i in $(cat -s $DIST_FILE); do - echo $i; - cp -a $i $DIST_DIR/src/ -done; - -cp -a ./tmpl/tb_$PROJECT.vhd $DIST_DIR/src/ -cp -a ./tmpl/tb_$PROJECT.vhd $DIST_DIR/src/ - -# Delete CVS directories -rm -r $(find release/ -name CVS) - -# --------------------------------------------------------------- -# Generate testbench do-file -echo "vlib work" > $DIST_DIR/sim/tb_$PROJECT.fdo - -for i in $(cat -s $DIST_FILE); do - echo "vcom -explicit -93 \"../src/$(basename $i)\"" >> $DIST_DIR/sim/tb_$PROJECT.fdo -done; - -echo "vcom -explicit -93 \"../src/$PROJECT.vhd\"" >> $DIST_DIR/sim/tb_$PROJECT.fdo -echo "vcom -explicit -93 \"../src/tb_$PROJECT.vhd\"" >> $DIST_DIR/sim/tb_$PROJECT.fdo -echo "vsim -t 1ps -lib work tb_$PROJECT" >> $DIST_DIR/sim/tb_$PROJECT.fdo - -echo "do {tb_$PROJECT.wdo}" >> $DIST_DIR/sim/tb_$PROJECT.fdo -echo "view wave" >> $DIST_DIR/sim/tb_$PROJECT.fdo -echo "view structure" >> $DIST_DIR/sim/tb_$PROJECT.fdo -echo "view signals" >> $DIST_DIR/sim/tb_$PROJECT.fdo -echo "run 3000us" >> $DIST_DIR/sim/tb_$PROJECT.fdo - -# --------------------------------------------------------------- diff --git a/lib/CPUs/MIPS/dist/tmpl/gpl-3.0.txt b/lib/CPUs/MIPS/dist/tmpl/gpl-3.0.txt deleted file mode 100644 index 94a9ed0..0000000 --- a/lib/CPUs/MIPS/dist/tmpl/gpl-3.0.txt +++ /dev/null @@ -1,674 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 3, 29 June 2007 - - Copyright (C) 2007 Free Software Foundation, Inc. - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The GNU General Public License is a free, copyleft license for -software and other kinds of works. - - The licenses for most software and other practical works are designed -to take away your freedom to share and change the works. By contrast, -the GNU General Public License is intended to guarantee your freedom to -share and change all versions of a program--to make sure it remains free -software for all its users. We, the Free Software Foundation, use the -GNU General Public License for most of our software; it applies also to -any other work released this way by its authors. You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -them if you wish), that you receive source code or can get it if you -want it, that you can change the software or use pieces of it in new -free programs, and that you know you can do these things. - - To protect your rights, we need to prevent others from denying you -these rights or asking you to surrender the rights. Therefore, you have -certain responsibilities if you distribute copies of the software, or if -you modify it: responsibilities to respect the freedom of others. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must pass on to the recipients the same -freedoms that you received. You must make sure that they, too, receive -or can get the source code. And you must show them these terms so they -know their rights. - - Developers that use the GNU GPL protect your rights with two steps: -(1) assert copyright on the software, and (2) offer you this License -giving you legal permission to copy, distribute and/or modify it. - - For the developers' and authors' protection, the GPL clearly explains -that there is no warranty for this free software. For both users' and -authors' sake, the GPL requires that modified versions be marked as -changed, so that their problems will not be attributed erroneously to -authors of previous versions. - - Some devices are designed to deny users access to install or run -modified versions of the software inside them, although the manufacturer -can do so. This is fundamentally incompatible with the aim of -protecting users' freedom to change the software. The systematic -pattern of such abuse occurs in the area of products for individuals to -use, which is precisely where it is most unacceptable. Therefore, we -have designed this version of the GPL to prohibit the practice for those -products. If such problems arise substantially in other domains, we -stand ready to extend this provision to those domains in future versions -of the GPL, as needed to protect the freedom of users. - - Finally, every program is threatened constantly by software patents. -States should not allow patents to restrict development and use of -software on general-purpose computers, but in those that do, we wish to -avoid the special danger that patents applied to a free program could -make it effectively proprietary. To prevent this, the GPL assures that -patents cannot be used to render the program non-free. - - The precise terms and conditions for copying, distribution and -modification follow. - - TERMS AND CONDITIONS - - 0. Definitions. - - "This License" refers to version 3 of the GNU General Public License. - - "Copyright" also means copyright-like laws that apply to other kinds of -works, such as semiconductor masks. - - "The Program" refers to any copyrightable work licensed under this -License. Each licensee is addressed as "you". "Licensees" and -"recipients" may be individuals or organizations. - - To "modify" a work means to copy from or adapt all or part of the work -in a fashion requiring copyright permission, other than the making of an -exact copy. The resulting work is called a "modified version" of the -earlier work or a work "based on" the earlier work. - - A "covered work" means either the unmodified Program or a work based -on the Program. - - To "propagate" a work means to do anything with it that, without -permission, would make you directly or secondarily liable for -infringement under applicable copyright law, except executing it on a -computer or modifying a private copy. Propagation includes copying, -distribution (with or without modification), making available to the -public, and in some countries other activities as well. - - To "convey" a work means any kind of propagation that enables other -parties to make or receive copies. Mere interaction with a user through -a computer network, with no transfer of a copy, is not conveying. - - An interactive user interface displays "Appropriate Legal Notices" -to the extent that it includes a convenient and prominently visible -feature that (1) displays an appropriate copyright notice, and (2) -tells the user that there is no warranty for the work (except to the -extent that warranties are provided), that licensees may convey the -work under this License, and how to view a copy of this License. If -the interface presents a list of user commands or options, such as a -menu, a prominent item in the list meets this criterion. - - 1. Source Code. - - The "source code" for a work means the preferred form of the work -for making modifications to it. "Object code" means any non-source -form of a work. - - A "Standard Interface" means an interface that either is an official -standard defined by a recognized standards body, or, in the case of -interfaces specified for a particular programming language, one that -is widely used among developers working in that language. - - The "System Libraries" of an executable work include anything, other -than the work as a whole, that (a) is included in the normal form of -packaging a Major Component, but which is not part of that Major -Component, and (b) serves only to enable use of the work with that -Major Component, or to implement a Standard Interface for which an -implementation is available to the public in source code form. A -"Major Component", in this context, means a major essential component -(kernel, window system, and so on) of the specific operating system -(if any) on which the executable work runs, or a compiler used to -produce the work, or an object code interpreter used to run it. - - The "Corresponding Source" for a work in object code form means all -the source code needed to generate, install, and (for an executable -work) run the object code and to modify the work, including scripts to -control those activities. However, it does not include the work's -System Libraries, or general-purpose tools or generally available free -programs which are used unmodified in performing those activities but -which are not part of the work. For example, Corresponding Source -includes interface definition files associated with source files for -the work, and the source code for shared libraries and dynamically -linked subprograms that the work is specifically designed to require, -such as by intimate data communication or control flow between those -subprograms and other parts of the work. - - The Corresponding Source need not include anything that users -can regenerate automatically from other parts of the Corresponding -Source. - - The Corresponding Source for a work in source code form is that -same work. - - 2. Basic Permissions. - - All rights granted under this License are granted for the term of -copyright on the Program, and are irrevocable provided the stated -conditions are met. This License explicitly affirms your unlimited -permission to run the unmodified Program. The output from running a -covered work is covered by this License only if the output, given its -content, constitutes a covered work. This License acknowledges your -rights of fair use or other equivalent, as provided by copyright law. - - You may make, run and propagate covered works that you do not -convey, without conditions so long as your license otherwise remains -in force. You may convey covered works to others for the sole purpose -of having them make modifications exclusively for you, or provide you -with facilities for running those works, provided that you comply with -the terms of this License in conveying all material for which you do -not control copyright. Those thus making or running the covered works -for you must do so exclusively on your behalf, under your direction -and control, on terms that prohibit them from making any copies of -your copyrighted material outside their relationship with you. - - Conveying under any other circumstances is permitted solely under -the conditions stated below. Sublicensing is not allowed; section 10 -makes it unnecessary. - - 3. Protecting Users' Legal Rights From Anti-Circumvention Law. - - No covered work shall be deemed part of an effective technological -measure under any applicable law fulfilling obligations under article -11 of the WIPO copyright treaty adopted on 20 December 1996, or -similar laws prohibiting or restricting circumvention of such -measures. - - When you convey a covered work, you waive any legal power to forbid -circumvention of technological measures to the extent such circumvention -is effected by exercising rights under this License with respect to -the covered work, and you disclaim any intention to limit operation or -modification of the work as a means of enforcing, against the work's -users, your or third parties' legal rights to forbid circumvention of -technological measures. - - 4. Conveying Verbatim Copies. - - You may convey verbatim copies of the Program's source code as you -receive it, in any medium, provided that you conspicuously and -appropriately publish on each copy an appropriate copyright notice; -keep intact all notices stating that this License and any -non-permissive terms added in accord with section 7 apply to the code; -keep intact all notices of the absence of any warranty; and give all -recipients a copy of this License along with the Program. - - You may charge any price or no price for each copy that you convey, -and you may offer support or warranty protection for a fee. - - 5. Conveying Modified Source Versions. - - You may convey a work based on the Program, or the modifications to -produce it from the Program, in the form of source code under the -terms of section 4, provided that you also meet all of these conditions: - - a) The work must carry prominent notices stating that you modified - it, and giving a relevant date. - - b) The work must carry prominent notices stating that it is - released under this License and any conditions added under section - 7. This requirement modifies the requirement in section 4 to - "keep intact all notices". - - c) You must license the entire work, as a whole, under this - License to anyone who comes into possession of a copy. This - License will therefore apply, along with any applicable section 7 - additional terms, to the whole of the work, and all its parts, - regardless of how they are packaged. This License gives no - permission to license the work in any other way, but it does not - invalidate such permission if you have separately received it. - - d) If the work has interactive user interfaces, each must display - Appropriate Legal Notices; however, if the Program has interactive - interfaces that do not display Appropriate Legal Notices, your - work need not make them do so. - - A compilation of a covered work with other separate and independent -works, which are not by their nature extensions of the covered work, -and which are not combined with it such as to form a larger program, -in or on a volume of a storage or distribution medium, is called an -"aggregate" if the compilation and its resulting copyright are not -used to limit the access or legal rights of the compilation's users -beyond what the individual works permit. Inclusion of a covered work -in an aggregate does not cause this License to apply to the other -parts of the aggregate. - - 6. Conveying Non-Source Forms. - - You may convey a covered work in object code form under the terms -of sections 4 and 5, provided that you also convey the -machine-readable Corresponding Source under the terms of this License, -in one of these ways: - - a) Convey the object code in, or embodied in, a physical product - (including a physical distribution medium), accompanied by the - Corresponding Source fixed on a durable physical medium - customarily used for software interchange. - - b) Convey the object code in, or embodied in, a physical product - (including a physical distribution medium), accompanied by a - written offer, valid for at least three years and valid for as - long as you offer spare parts or customer support for that product - model, to give anyone who possesses the object code either (1) a - copy of the Corresponding Source for all the software in the - product that is covered by this License, on a durable physical - medium customarily used for software interchange, for a price no - more than your reasonable cost of physically performing this - conveying of source, or (2) access to copy the - Corresponding Source from a network server at no charge. - - c) Convey individual copies of the object code with a copy of the - written offer to provide the Corresponding Source. This - alternative is allowed only occasionally and noncommercially, and - only if you received the object code with such an offer, in accord - with subsection 6b. - - d) Convey the object code by offering access from a designated - place (gratis or for a charge), and offer equivalent access to the - Corresponding Source in the same way through the same place at no - further charge. You need not require recipients to copy the - Corresponding Source along with the object code. If the place to - copy the object code is a network server, the Corresponding Source - may be on a different server (operated by you or a third party) - that supports equivalent copying facilities, provided you maintain - clear directions next to the object code saying where to find the - Corresponding Source. Regardless of what server hosts the - Corresponding Source, you remain obligated to ensure that it is - available for as long as needed to satisfy these requirements. - - e) Convey the object code using peer-to-peer transmission, provided - you inform other peers where the object code and Corresponding - Source of the work are being offered to the general public at no - charge under subsection 6d. - - A separable portion of the object code, whose source code is excluded -from the Corresponding Source as a System Library, need not be -included in conveying the object code work. - - A "User Product" is either (1) a "consumer product", which means any -tangible personal property which is normally used for personal, family, -or household purposes, or (2) anything designed or sold for incorporation -into a dwelling. In determining whether a product is a consumer product, -doubtful cases shall be resolved in favor of coverage. For a particular -product received by a particular user, "normally used" refers to a -typical or common use of that class of product, regardless of the status -of the particular user or of the way in which the particular user -actually uses, or expects or is expected to use, the product. A product -is a consumer product regardless of whether the product has substantial -commercial, industrial or non-consumer uses, unless such uses represent -the only significant mode of use of the product. - - "Installation Information" for a User Product means any methods, -procedures, authorization keys, or other information required to install -and execute modified versions of a covered work in that User Product from -a modified version of its Corresponding Source. The information must -suffice to ensure that the continued functioning of the modified object -code is in no case prevented or interfered with solely because -modification has been made. - - If you convey an object code work under this section in, or with, or -specifically for use in, a User Product, and the conveying occurs as -part of a transaction in which the right of possession and use of the -User Product is transferred to the recipient in perpetuity or for a -fixed term (regardless of how the transaction is characterized), the -Corresponding Source conveyed under this section must be accompanied -by the Installation Information. But this requirement does not apply -if neither you nor any third party retains the ability to install -modified object code on the User Product (for example, the work has -been installed in ROM). - - The requirement to provide Installation Information does not include a -requirement to continue to provide support service, warranty, or updates -for a work that has been modified or installed by the recipient, or for -the User Product in which it has been modified or installed. Access to a -network may be denied when the modification itself materially and -adversely affects the operation of the network or violates the rules and -protocols for communication across the network. - - Corresponding Source conveyed, and Installation Information provided, -in accord with this section must be in a format that is publicly -documented (and with an implementation available to the public in -source code form), and must require no special password or key for -unpacking, reading or copying. - - 7. Additional Terms. - - "Additional permissions" are terms that supplement the terms of this -License by making exceptions from one or more of its conditions. -Additional permissions that are applicable to the entire Program shall -be treated as though they were included in this License, to the extent -that they are valid under applicable law. If additional permissions -apply only to part of the Program, that part may be used separately -under those permissions, but the entire Program remains governed by -this License without regard to the additional permissions. - - When you convey a copy of a covered work, you may at your option -remove any additional permissions from that copy, or from any part of -it. (Additional permissions may be written to require their own -removal in certain cases when you modify the work.) You may place -additional permissions on material, added by you to a covered work, -for which you have or can give appropriate copyright permission. - - Notwithstanding any other provision of this License, for material you -add to a covered work, you may (if authorized by the copyright holders of -that material) supplement the terms of this License with terms: - - a) Disclaiming warranty or limiting liability differently from the - terms of sections 15 and 16 of this License; or - - b) Requiring preservation of specified reasonable legal notices or - author attributions in that material or in the Appropriate Legal - Notices displayed by works containing it; or - - c) Prohibiting misrepresentation of the origin of that material, or - requiring that modified versions of such material be marked in - reasonable ways as different from the original version; or - - d) Limiting the use for publicity purposes of names of licensors or - authors of the material; or - - e) Declining to grant rights under trademark law for use of some - trade names, trademarks, or service marks; or - - f) Requiring indemnification of licensors and authors of that - material by anyone who conveys the material (or modified versions of - it) with contractual assumptions of liability to the recipient, for - any liability that these contractual assumptions directly impose on - those licensors and authors. - - All other non-permissive additional terms are considered "further -restrictions" within the meaning of section 10. If the Program as you -received it, or any part of it, contains a notice stating that it is -governed by this License along with a term that is a further -restriction, you may remove that term. If a license document contains -a further restriction but permits relicensing or conveying under this -License, you may add to a covered work material governed by the terms -of that license document, provided that the further restriction does -not survive such relicensing or conveying. - - If you add terms to a covered work in accord with this section, you -must place, in the relevant source files, a statement of the -additional terms that apply to those files, or a notice indicating -where to find the applicable terms. - - Additional terms, permissive or non-permissive, may be stated in the -form of a separately written license, or stated as exceptions; -the above requirements apply either way. - - 8. Termination. - - You may not propagate or modify a covered work except as expressly -provided under this License. Any attempt otherwise to propagate or -modify it is void, and will automatically terminate your rights under -this License (including any patent licenses granted under the third -paragraph of section 11). - - However, if you cease all violation of this License, then your -license from a particular copyright holder is reinstated (a) -provisionally, unless and until the copyright holder explicitly and -finally terminates your license, and (b) permanently, if the copyright -holder fails to notify you of the violation by some reasonable means -prior to 60 days after the cessation. - - Moreover, your license from a particular copyright holder is -reinstated permanently if the copyright holder notifies you of the -violation by some reasonable means, this is the first time you have -received notice of violation of this License (for any work) from that -copyright holder, and you cure the violation prior to 30 days after -your receipt of the notice. - - Termination of your rights under this section does not terminate the -licenses of parties who have received copies or rights from you under -this License. If your rights have been terminated and not permanently -reinstated, you do not qualify to receive new licenses for the same -material under section 10. - - 9. Acceptance Not Required for Having Copies. - - You are not required to accept this License in order to receive or -run a copy of the Program. Ancillary propagation of a covered work -occurring solely as a consequence of using peer-to-peer transmission -to receive a copy likewise does not require acceptance. However, -nothing other than this License grants you permission to propagate or -modify any covered work. These actions infringe copyright if you do -not accept this License. Therefore, by modifying or propagating a -covered work, you indicate your acceptance of this License to do so. - - 10. Automatic Licensing of Downstream Recipients. - - Each time you convey a covered work, the recipient automatically -receives a license from the original licensors, to run, modify and -propagate that work, subject to this License. You are not responsible -for enforcing compliance by third parties with this License. - - An "entity transaction" is a transaction transferring control of an -organization, or substantially all assets of one, or subdividing an -organization, or merging organizations. If propagation of a covered -work results from an entity transaction, each party to that -transaction who receives a copy of the work also receives whatever -licenses to the work the party's predecessor in interest had or could -give under the previous paragraph, plus a right to possession of the -Corresponding Source of the work from the predecessor in interest, if -the predecessor has it or can get it with reasonable efforts. - - You may not impose any further restrictions on the exercise of the -rights granted or affirmed under this License. For example, you may -not impose a license fee, royalty, or other charge for exercise of -rights granted under this License, and you may not initiate litigation -(including a cross-claim or counterclaim in a lawsuit) alleging that -any patent claim is infringed by making, using, selling, offering for -sale, or importing the Program or any portion of it. - - 11. Patents. - - A "contributor" is a copyright holder who authorizes use under this -License of the Program or a work on which the Program is based. The -work thus licensed is called the contributor's "contributor version". - - A contributor's "essential patent claims" are all patent claims -owned or controlled by the contributor, whether already acquired or -hereafter acquired, that would be infringed by some manner, permitted -by this License, of making, using, or selling its contributor version, -but do not include claims that would be infringed only as a -consequence of further modification of the contributor version. For -purposes of this definition, "control" includes the right to grant -patent sublicenses in a manner consistent with the requirements of -this License. - - Each contributor grants you a non-exclusive, worldwide, royalty-free -patent license under the contributor's essential patent claims, to -make, use, sell, offer for sale, import and otherwise run, modify and -propagate the contents of its contributor version. - - In the following three paragraphs, a "patent license" is any express -agreement or commitment, however denominated, not to enforce a patent -(such as an express permission to practice a patent or covenant not to -sue for patent infringement). To "grant" such a patent license to a -party means to make such an agreement or commitment not to enforce a -patent against the party. - - If you convey a covered work, knowingly relying on a patent license, -and the Corresponding Source of the work is not available for anyone -to copy, free of charge and under the terms of this License, through a -publicly available network server or other readily accessible means, -then you must either (1) cause the Corresponding Source to be so -available, or (2) arrange to deprive yourself of the benefit of the -patent license for this particular work, or (3) arrange, in a manner -consistent with the requirements of this License, to extend the patent -license to downstream recipients. "Knowingly relying" means you have -actual knowledge that, but for the patent license, your conveying the -covered work in a country, or your recipient's use of the covered work -in a country, would infringe one or more identifiable patents in that -country that you have reason to believe are valid. - - If, pursuant to or in connection with a single transaction or -arrangement, you convey, or propagate by procuring conveyance of, a -covered work, and grant a patent license to some of the parties -receiving the covered work authorizing them to use, propagate, modify -or convey a specific copy of the covered work, then the patent license -you grant is automatically extended to all recipients of the covered -work and works based on it. - - A patent license is "discriminatory" if it does not include within -the scope of its coverage, prohibits the exercise of, or is -conditioned on the non-exercise of one or more of the rights that are -specifically granted under this License. You may not convey a covered -work if you are a party to an arrangement with a third party that is -in the business of distributing software, under which you make payment -to the third party based on the extent of your activity of conveying -the work, and under which the third party grants, to any of the -parties who would receive the covered work from you, a discriminatory -patent license (a) in connection with copies of the covered work -conveyed by you (or copies made from those copies), or (b) primarily -for and in connection with specific products or compilations that -contain the covered work, unless you entered into that arrangement, -or that patent license was granted, prior to 28 March 2007. - - Nothing in this License shall be construed as excluding or limiting -any implied license or other defenses to infringement that may -otherwise be available to you under applicable patent law. - - 12. No Surrender of Others' Freedom. - - If conditions are imposed on you (whether by court order, agreement or -otherwise) that contradict the conditions of this License, they do not -excuse you from the conditions of this License. If you cannot convey a -covered work so as to satisfy simultaneously your obligations under this -License and any other pertinent obligations, then as a consequence you may -not convey it at all. For example, if you agree to terms that obligate you -to collect a royalty for further conveying from those to whom you convey -the Program, the only way you could satisfy both those terms and this -License would be to refrain entirely from conveying the Program. - - 13. Use with the GNU Affero General Public License. - - Notwithstanding any other provision of this License, you have -permission to link or combine any covered work with a work licensed -under version 3 of the GNU Affero General Public License into a single -combined work, and to convey the resulting work. The terms of this -License will continue to apply to the part which is the covered work, -but the special requirements of the GNU Affero General Public License, -section 13, concerning interaction through a network will apply to the -combination as such. - - 14. Revised Versions of this License. - - The Free Software Foundation may publish revised and/or new versions of -the GNU General Public License from time to time. Such new versions will -be similar in spirit to the present version, but may differ in detail to -address new problems or concerns. - - Each version is given a distinguishing version number. If the -Program specifies that a certain numbered version of the GNU General -Public License "or any later version" applies to it, you have the -option of following the terms and conditions either of that numbered -version or of any later version published by the Free Software -Foundation. If the Program does not specify a version number of the -GNU General Public License, you may choose any version ever published -by the Free Software Foundation. - - If the Program specifies that a proxy can decide which future -versions of the GNU General Public License can be used, that proxy's -public statement of acceptance of a version permanently authorizes you -to choose that version for the Program. - - Later license versions may give you additional or different -permissions. However, no additional obligations are imposed on any -author or copyright holder as a result of your choosing to follow a -later version. - - 15. Disclaimer of Warranty. - - THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY -APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT -HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY -OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, -THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM -IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF -ALL NECESSARY SERVICING, REPAIR OR CORRECTION. - - 16. Limitation of Liability. - - IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS -THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY -GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE -USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF -DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD -PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), -EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF -SUCH DAMAGES. - - 17. Interpretation of Sections 15 and 16. - - If the disclaimer of warranty and limitation of liability provided -above cannot be given local legal effect according to their terms, -reviewing courts shall apply local law that most closely approximates -an absolute waiver of all civil liability in connection with the -Program, unless a warranty or assumption of liability accompanies a -copy of the Program in return for a fee. - - END OF TERMS AND CONDITIONS - - How to Apply These Terms to Your New Programs - - If you develop a new program, and you want it to be of the greatest -possible use to the public, the best way to achieve this is to make it -free software which everyone can redistribute and change under these terms. - - To do so, attach the following notices to the program. It is safest -to attach them to the start of each source file to most effectively -state the exclusion of warranty; and each file should have at least -the "copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . - -Also add information on how to contact you by electronic and paper mail. - - If the program does terminal interaction, make it output a short -notice like this when it starts in an interactive mode: - - Copyright (C) - This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, your program's commands -might be different; for a GUI interface, you would use an "about box". - - You should also get your employer (if you work as a programmer) or school, -if any, to sign a "copyright disclaimer" for the program, if necessary. -For more information on this, and how to apply and follow the GNU GPL, see -. - - The GNU General Public License does not permit incorporating your program -into proprietary programs. If your program is a subroutine library, you -may consider it more useful to permit linking proprietary applications with -the library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. But first, please read -. diff --git a/lib/CPUs/MIPS/dist/tmpl/hello.flash.bin b/lib/CPUs/MIPS/dist/tmpl/hello.flash.bin deleted file mode 100644 index cd652ef12f82962bcc1fd2a1770fa71ef9360112..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7936 zcmeHLZEPIX6+OE;x}}q~Lv7>~3!FBHs9ig|#1SU3 zybE;^RacHnEjo=|DL;_fABz)88k|fhl)5S@76p__Mg0&`)2c!iKiafHCF++fO1nLG zcE_Fsdqi8L{s2qQGw+>y?>qOs`|f?Sx8K&&2Ec%i{~OspXn#g95e@{KgRocNgXaDJ z-`{tBxcS8kAH_Ud9R{or2CW9{w=|@!FfvvI_gbwuU`^mlmWeN07*Y(RDhwEF42-Nb z^oyy$7z)ayOyKtk~jhoC~+-&wCYWAbe+>4mG5A9|O zaWjpr<`A}-!`N<)pu@~zhnYvhoW!l>Fqsgq{F}(&UXb78OG@B7@GF!3PH1SCj zl(9E6HEuLeHpKn}K4Av&akCD(iIHy_L8Jm)lH^75Rq=xLd!X700QRRsIJfy{#f58R zEQp1GgZT=_pv z31U;krie{ZmhTJn@!V!jLG|Q@@Fo~aLf*{{6XdQOJ-~OF>q`7v#1#*GmUz$uf1Y@? z2mVvy(;oP5i62`5zmn&hlyiJqv;T zCy77ofzJ`od*J7ZPk7)Lh);Up7m1rI;7(3Z5I8DleLNJvB4uU#V;GIX@F#K`li_@* z7J6uq*)DAgCV9`v4QgoRd}iCE*m|TC5f4JO=Men{>R<&vj!lF3LzL4s!yknIXbtoF8YUgAPXZ9bJ`B@uSvRHK%4S7I; zy6Nx5+Io?d+^-W|DgOsC-dZ8LoHHMyD~-u;X)Q9dPHkHxFOd@-3Tq7I>-0Q#ly;q3 z5@ap;mA|}pJ|(PZioaN#h)RKRv_ zfdHS_q(Jlne7bdgCEYr~fUc$e7kQDb;(erwH<2snTupB^+v^bE`RJTg0tni3iT&02 z*m2FXxx`0g4VTa5`Bk|u(cdLGH}7l6Tl7}oq>5i9`{Q-*)%Hqu)|Kav(J!%s!W!NO zU*g`3o7H$Fu3%;sc+uV`*zZT|_i7yH_)DhjPY@?&LERwzt45N#x0!k*&z;?Gu18+Y zYin>Z;1BzG2Cu~+*71fnzi|zkLTTo(doj-(SB=7~!WLw! zEjhz=JkR$~MegUoah_+&=L7yL$8HFX;O%0{zJF3@N-f_Z80UT*;d%_(TpYWiSH-g+w&grH z_FiWEh%ZtPB&MA^z1;652kVms+{k#=r|01(zLxL8akV>sE7wQo_g#r+SG)>qxi)La zEy%cU9v9sjJjwIZwn<`D`VPm^`~L72b(F6!&;EtJ>#E^jZLXE{f%CI((jBvl8wJHj+@j;+qN)SS^g)pH;{{<%W+kWTSiwIki>JF2BPX z%el2Nz*ziLT#w4SS08>zUC+G8eC@+4 z#I8U6R`L8&+zGF{$!|OLBu<cDu&D;Oldr7xJG>L%(VA6bMf|g4 zEKgdzZDZ4d!)QZ7pSL!-}#q-5Pt)Z+M}N(2W>vkz~2Mv_}hTW z-w3MtTY+uAP(YaL=V1+jGp#+jEC_Ptt^UVMF3p2ny&qdUWF4u61>psOb z=I;{EO>v!>o1dNHI=}0CKf?HwSd)79YH`qxCFZ2d{3+$DnKLhz_tjaaXJnlxfnVC| zt=Tc)J`3IC_qhs&760T+RFrGHoC!HU#UiQFH@8mT6*||gpySl4^{7bbj7bF({GH|n ztA}$L$tU6{RIpZ_U~WCa^Bp)UwMpt-HHfiJNS$)>h}5dm9s8`cXOGlpmAX&!J;~Z! zvrYK%oSosF`i$gS@qHgTo;oFU?S-jRr=+HpaO&B1m2w@F-%|W2uqJ=SuE{F%t<>HM zXV^ym`4yQ}w(l0Zp+cUO0hyMJfqz`<-TGn&1n z3R+Z)Jd_zd+)}o!wP}%oT+5OzEv7{tjJo>m?6saO!6Mj2fee%1{#V$&z;hF1EYAm_>2~xU+|`KC%aQJV+g0M?T%zb@OLBcX1Th-FfqEeY+@=$wu0?wUnOQ z%g>JTb4TeJi;SlM2zY_Fa6$fHYmbPgZR zW+E+eO!4{5*uh)`ke zW9w(z$ChRrX3MdSu|3R|XPaP~WaE$7#x&b8wgTHpwzF(=Z1ZgA*?!J;fo*~9BHJal zMK)}N5oA-@LTnnFP!TTnlmFgqfYE&&j1z3mnAdZ}vEe23K4ZSJy{p?_eJWmi|L@*> Uy#iOg&vSfe?!y)Mpsm2a0f^t)^#A|> diff --git a/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd b/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd deleted file mode 100644 index 76e3bf5..0000000 --- a/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd +++ /dev/null @@ -1,341 +0,0 @@ -------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: Testbench for JCPU --- also writes 'opc.lst' for JASM-assembler --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.mips_types.all; -use work.mips_instr.all; -use work.async_types.all; -use work.async_defs.all; - -ENTITY mips_sys IS - GENERIC - ( - ICACHE_SIZE : natural := 512; -- words - DCACHE_SIZE : natural := 512; -- words - SRAM_ADDR_WIDTH : integer := 14; - FLASH_ADDR_WIDTH : integer := 14 - ); - PORT - ( - eb : in std_logic; - nmi : in std_logic; - rst : in std_logic; - clk : in std_logic; - flash_cs_n : out std_logic; - flash_oe_n : out std_logic; - flash_we_n : out std_logic; - flash_be_n : out unsigned(3 downto 0); - sram_cs_n : out std_logic; - sram_we_n : out std_logic; - sram_oe_n : out std_logic; - sram_be_n : out unsigned(3 downto 0); - sram_a : out unsigned(SRAM_ADDR_WIDTH-1 downto 0); - sram_d : inout unsigned(31 downto 0); - flash_a : out unsigned(FLASH_ADDR_WIDTH-1 downto 0); - flash_d : inout unsigned(31 downto 0); - - gpo0 : out unsigned(31 downto 0); - gpo1 : out unsigned(31 downto 0); - gpi0 : in unsigned(31 downto 0); - gpi1 : in unsigned(31 downto 0); - - rx : in std_logic; - tx : out std_logic; - - debug : out unsigned(1 downto 0) - ); -END mips_sys; - -ARCHITECTURE behavior OF mips_sys IS - - -- Master - signal ACK_I : STD_LOGIC := '0'; - signal SRDY_I : STD_LOGIC := '0'; - signal ADDR_O : unsigned(31 downto 0); - signal DAT_I : unsigned(31 downto 0) := (others => '0'); - signal DAT_O : unsigned(31 downto 0); - signal WE_O : STD_LOGIC; - signal SEL_O : unsigned(3 downto 0); - signal CYC_O : STD_LOGIC; - signal STB_O : STD_LOGIC; - signal MRDY_O : STD_LOGIC; - signal INT : unsigned (5 downto 0) := (others => '0'); - - -- Slaves - signal CYC_I_rom : std_logic; - signal ACK_O_rom : std_logic; - signal SRDY_O_rom : std_logic; - signal DAT_O_rom : unsigned(31 downto 0); - - signal CYC_I_flash : std_logic; - signal ACK_O_flash : std_logic; - signal SRDY_O_flash : std_logic; - signal DAT_O_flash : unsigned(31 downto 0); - - signal CYC_I_sram : std_logic; - signal ACK_O_sram : std_logic; - signal SRDY_O_sram : std_logic; - signal DAT_O_sram : unsigned(31 downto 0); - - signal CYC_I_gpio : std_logic; - signal ACK_O_gpio : std_logic; - signal SRDY_O_gpio : std_logic; - signal DAT_O_gpio : unsigned(31 downto 0); - - signal CYC_I_uart : std_logic; - signal ACK_O_uart : std_logic; - signal SRDY_O_uart : std_logic; - signal DAT_O_uart : unsigned(31 downto 0); - - signal int_timer : std_logic; - signal int_uart : std_logic; - - type mem_area_t is (mem_dead, mem_flash, mem_sram, mem_rom, mem_gpio, mem_uart); - signal mem_area : mem_area_t; - -BEGIN - ------------------------------------------------------------------- --- Memory mux ------------------------------------------------------------------- -mem_mux: - process(ADDR_O) - begin - mem_area <= mem_dead; - if ADDR_O(31 downto 28) = X"0" then - mem_area <= mem_flash; - elsif ADDR_O(31 downto 28) = X"A" then - if ADDR_O(27 downto 26) = "00" then - if ADDR_O(18 downto 16) = "000" then - mem_area <= mem_gpio; - elsif ADDR_O(18 downto 16) = "001" then - mem_area <= mem_uart; - end if; - elsif ADDR_O(27 downto 26) = "01" then - mem_area <= mem_flash; - end if; - elsif (ADDR_O(31 downto 28) = X"B" and ADDR_O(15) = '0') then - mem_area <= mem_rom; - elsif (ADDR_O(31 downto 28) = X"8" or ADDR_O(30) = '1') then - mem_area <= mem_sram; - end if; - end process; - -signal_mux: - process(mem_area, CYC_O) - begin - - CYC_I_uart <= '0'; - CYC_I_gpio <= '0'; - CYC_I_flash <= '0'; - CYC_I_rom <= '0'; - CYC_I_sram <= '0'; - - case mem_area is - - when mem_gpio => - CYC_I_gpio <= CYC_O; - - when mem_uart => - CYC_I_uart <= CYC_O; - - when mem_flash => - CYC_I_flash <= CYC_O; - - when mem_rom => - CYC_I_rom <= CYC_O; - - when mem_sram => - CYC_I_sram <= CYC_O; - - when others => null; - - end case; - - end process; - - SRDY_I <= SRDY_O_flash or SRDY_O_sram or SRDY_O_rom or SRDY_O_uart or SRDY_O_gpio; - ACK_I <= ACK_O_flash or ACK_O_sram or ACK_O_rom or ACK_O_uart or ACK_O_gpio; - DAT_I <= DAT_O_sram when CYC_I_sram = '1' else - DAT_O_rom when CYC_I_rom = '1' else - DAT_O_flash when CYC_I_flash = '1' else - DAT_O_uart when CYC_I_uart = '1' else - DAT_O_gpio when CYC_I_gpio = '1' else X"DEADBEEF"; - - ------------------------------------------------------------------- -inst_mips_top: entity work.mips_top - GENERIC MAP - ( - icache_size => ICACHE_SIZE, -- words - dcache_size => DCACHE_SIZE -- words - ) - PORT MAP - ( - debug => debug, - nmi => nmi, - eb => eb, - cpu_clk => clk, - RST_I => rst, - CLK_I => clk, - ACK_I => ACK_I, - SRDY_I => SRDY_I, - ADDR_O => ADDR_O, - DAT_I => DAT_I, - DAT_O => DAT_O, - WE_O => WE_O, - SEL_O => SEL_O, - CYC_O => CYC_O, - STB_O => STB_O, - MRDY_O => MRDY_O, - INT => INT - ); - INT(1) <= int_uart; - INT(5) <= int_timer; - -inst_rom : entity work.rom_wb - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_rom, - STB_I => STB_O, - ACK_O => ACK_O_rom, - MRDY_I => MRDY_O, - SRDY_O => SRDY_O_rom, - ADDR_I => ADDR_O, - DAT_O => DAT_O_rom - ); - -inst_gpio : entity work.gpio_wb - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_gpio, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_O_gpio, - SRDY_O => SRDY_O_gpio, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_gpio, - INT_TIM_O => int_timer, - sys_gpo0 => gpo0, - sys_gpo1 => gpo1, - sys_gpi0 => gpi0, - sys_gpi1 => gpi1 - ); - -inst_flash_port : entity work.async_port_wb - GENERIC MAP - ( - addr_width => FLASH_ADDR_WIDTH, - data_width => 32, - byte_sel_width => 4, - async_timespec => ts_flash - ) - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_flash, - STB_I => STB_O, - WE_I => WE_O, - ACK_O => ACK_O_flash, - SRDY_O => SRDY_O_flash, - MRDY_I => MRDY_O, - SEL_I => SEL_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_flash, - page_mode_en => '0', - async_a => flash_a, - async_d => flash_d, - async_cs => flash_cs_n, - async_wr => flash_we_n, - async_rd => flash_oe_n, - async_be => flash_be_n, - async_rst => open - ); - -inst_sram_port : entity work.async_port_wb - GENERIC MAP - ( - addr_width => SRAM_ADDR_WIDTH, - data_width => 32, - byte_sel_width => 4, - async_timespec => ts_sram - ) - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_sram, - STB_I => STB_O, - WE_I => WE_O, - ACK_O => ACK_O_sram, - SRDY_O => SRDY_O_sram, - MRDY_I => MRDY_O, - SEL_I => SEL_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_sram, - page_mode_en => '0', - async_a => sram_a, - async_d => sram_d, - async_cs => sram_cs_n, - async_wr => sram_we_n, - async_rd => sram_oe_n, - async_be => sram_be_n, - async_rst => open - ); - -inst_uart : entity work.uart_wb - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_uart, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_O_uart, - SRDY_O => SRDY_O_uart, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_uart, - INT_O => int_uart, - ser_rx => rx, - ser_tx => tx - ); - -END; diff --git a/lib/CPUs/MIPS/dist/tmpl/notes.txt b/lib/CPUs/MIPS/dist/tmpl/notes.txt deleted file mode 100644 index 78f7c0f..0000000 --- a/lib/CPUs/MIPS/dist/tmpl/notes.txt +++ /dev/null @@ -1,100 +0,0 @@ ------------------------------------------------------------------ -Changes in release 13 ------------------------------------------------------------------ -- mips_biu.vhd: added asynchronous BUS-FIFOs to support different clocks for CPU and BUS -- mips_dcache.vhd: improved instant-RAW stall behavior (faster execution) -- uart_WB.vhd: added simulate_TX generic for plain TX output in simulation log - ------------------------------------------------------------------ -Changes in release 12 ------------------------------------------------------------------ -- reworked GCC-toolchain: Valid mips*-elf-binaries are now compiled and linked - using a single mips*-elf-gcc command. - To use: Copy $THIS_RELEASE/bsp/toolchain/specs to $MIPS_GCC_PREFIX/lib/gcc/mipsel-elf/$GCC_VERSION/, - and see bsp/examples/Makefile gcc usage - GCC-provided crt*-functions are now called without problems. - In summary: The toolchain is now more compliant to the intentional use of GCC. -- mips_biu.vhd: Addresses 0xA0000000..0xBFFFFFFF are now un-dcached for memory-mapped I/O, - which is now compliant to literature. -- gpio_wb.vhd: Timer hard-reset is now removed. This helps to keep current time in case of CPU hard-reset. -- new bsp-example source: gunzip -- updated drawing 'mips_jbus_timing.pdf' -- added drawing 'memory_map.pdf' -- moved COP0 from mips_pipeline.vhd to mips_top.vhd. Created new cop-interface for later COPz connection. -- added I/D-cache info (size and linesize) to upper 16 bits of PrID-Register. - Example of reading cache info is done in bsp/examples/testbench::PrintCPUinfo() -- simplified instruction decoder in mips_instr.vhd. Now there are less warnings during synthesis. - Removed idecode_rom.vhd from project as consequence. -- added cop0 instructions to invalidate I-cache and D-Cache -- added copz instructions lwcz and swcz -- gpio_wb.vhd: added 32 bit timer with interrupt and auto reload -- added debugger in libsys. New files are mipsdis.c/h and dbg.c/h -- exception handlers can now be registered to any exception type -- bugfix mips_pipeline/mips_cop: cop0 registers were not written during exception commit. Cop registers now behave like general registers. -- added pin 'eb' to mips_top.vhd to select CPU-endianess at reset time (eb = 0 : little-endian, eb = 1 : big-endian) -- Status register bit 'RE'= 1 (bit 25) reverses endianess in user-mode -- Status register bit 'TS' (TLB Shutdown, bit 21) is tied high to indicate the absence of an MMU. -- uart_wb.vhd: added interrupt enable -- Interrupt pending flags (IP) are not anymore masked by Interrupt mask flags (IM) in H/W. - Masking has to be done in S/W. H/W masking was removed because it isn't MIPS-compliant. -- added NMI/RST pin (more MIPS compliant). Transition Asserting/Deasserting causes exception. - Exception vector is reset (0xBFC00000). It's a soft-reset, which can help debugging. NMI/RST is not maskable. - Using NMI/RST as reset is dangerous because periphery may not be reseted. Has to be done in S/W. - Drawback of using NMI/RST: Unitialized/unreseted periphery may cause trouble (e.g. firing unwanted interrupts), but I think you know that already. -- Bootloader: Startup.S now invalidates I/D-Caches at boot. -- uart_wb.vhd: fixed crappy tx-empty interrupt, Added Tx-IRQ acknowledge. -- Bugfix in mips_pipeline: register bypass with same target register, used for unaligned loads (LWL, LWR), was incorrect. - Newlib's MIPS-optimized version of memcpy() uses this for unaligned copy which revealed the bug. - Symptom: Consecutive load instructions without nops using same target register (which is legal) like - lw $1, 0(mem) - lwl $1, 1(mem) - or - lwl $1, 0(mem) - lwr $1, 1(mem) - or similar, lead to incorrect result. Now it's fixed. -- Bugfix mips_biu: instructions uncached LW => cached LW (with cache-miss) was buggy. - Symptom: - ... - 1.: lw $a0, 32($s0) # Uncached load from memory mapped I/O - 2.: lw $a2, 4($v0) # Cached load and cache-miss. - # $a0 receives same value as $a2. - # CPU skips writing $a0 due to busy flag of D-Cache, - # which is already active in the previous cycle - ... - ------------------------------------------------------------------ -Changes in release 11 ------------------------------------------------------------------ -- bugfix in mips_pipeline: pc_is_branch is now initialized at reset - (fixes CPU unrecoverable state after reset) -- reverted "optimization" in mips_dcache, which behaved buggy during exceptions -- new example source: test_exception -- minor changes in libsys -- added async_port_timing in doc -- examples/testbench: date set now really works - ------------------------------------------------------------------ -Changes in release 10b ------------------------------------------------------------------ -- bugfix: fixed compiler bug (missing nop after lw) in bootloader, - which caused exception during boot - ------------------------------------------------------------------ -Changes in release 10a ------------------------------------------------------------------ -async_port_wb: -- added byte enable for async_port - -bootloader.c -- bugfix: fixed compiler bug (missing nop after lw) - -mips-core -- bugfix: SEL_O lines are also asserted correctly during reads - -tools/romgen -- TCL-Jtag now compatible with Chipscope 10.1 - -mips_sys.c -- use byte enable for sram and flash - - diff --git a/lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.vhd b/lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.vhd deleted file mode 100644 index 88479ae..0000000 --- a/lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.vhd +++ /dev/null @@ -1,233 +0,0 @@ -------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: Testbench for JCPU --- also writes 'opc.lst' for JASM-assembler --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.mips_types.all; -use work.mips_instr.all; -use work.async_types.all; -use work.async_defs.all; - -ENTITY tb_mips_sys IS -END tb_mips_sys; - -ARCHITECTURE behavior OF tb_mips_sys IS - - constant CLK_PERIOD : time := 10 ns; - constant ICACHE_SIZE : natural := 512; -- words - constant DCACHE_SIZE : natural := 512; -- words - constant SRAM_ADDR_WIDTH : integer := 17; -- bits - constant FLASH_ADDR_WIDTH : integer := 17; -- bits - - signal debug : unsigned(1 downto 0); - - -- Master - signal nmi : STD_LOGIC := '0'; - signal rst : STD_LOGIC := '1'; - signal clk : STD_LOGIC := '0'; - signal eb : STD_LOGIC := '1'; - - signal flash_cs_n : std_logic; - signal flash_we_n : std_logic; - signal flash_oe_n : std_logic; - signal flash_be_n : unsigned(3 downto 0); - signal sram_cs_n : std_logic; - signal sram_be_n : unsigned(3 downto 0); - signal sram_wr_n : std_logic; - signal sram_oe_n : std_logic; - signal sram_a : unsigned(SRAM_ADDR_WIDTH-1 downto 0); - signal sram_d : unsigned(31 downto 0); - signal flash_a : unsigned(FLASH_ADDR_WIDTH-1 downto 0); - signal flash_d : unsigned(31 downto 0); - - signal gpo0 : unsigned(31 downto 0); - signal gpo1 : unsigned(31 downto 0); - signal gpi0 : unsigned(31 downto 0) := (others => '0'); - signal gpi1 : unsigned(31 downto 0) := (others => '0'); - - signal int_timer : std_logic; - signal int_uart : std_logic; - signal rx : std_logic := '1'; - signal tx : std_logic; - - type word_array_t is array (natural range <>) of unsigned(31 downto 0); - signal sram_data : word_array_t(0 to 2**SRAM_ADDR_WIDTH-1); - signal flash_data : word_array_t(0 to 2**FLASH_ADDR_WIDTH-1); - -BEGIN - ------------------------------------------------------------------- -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------- -uut : entity work.mips_sys - GENERIC MAP - ( - ICACHE_SIZE => ICACHE_SIZE, -- words - DCACHE_SIZE => DCACHE_SIZE, -- words - SRAM_ADDR_WIDTH => SRAM_ADDR_WIDTH, - FLASH_ADDR_WIDTH => FLASH_ADDR_WIDTH - ) - PORT MAP - ( - eb => eb, - nmi => nmi, - rst => rst, - clk => clk, - flash_cs_n => flash_cs_n, - flash_oe_n => flash_oe_n, - flash_we_n => flash_we_n, - flash_be_n => flash_be_n, - sram_cs_n => sram_cs_n, - sram_we_n => sram_wr_n, - sram_oe_n => sram_oe_n, - sram_be_n => sram_be_n, - sram_a => sram_a, - sram_d => sram_d, - flash_a => flash_a, - flash_d => flash_d, - - gpo0 => gpo0, - gpo1 => gpo1, - gpi0 => gpi0, - gpi1 => gpi1, - - rx => rx, - tx => tx, - - debug => debug - ); - ------------------------------------------------------------------- -SRAM_READ: - process(sram_a, sram_cs_n, sram_oe_n, sram_be_n) - begin - sram_d <= (others => 'Z') after 10 ns; - if sram_oe_n = '0' then - if sram_cs_n = '0' then - if sram_be_n(0) = '0' then - sram_d(7 downto 0) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(7 downto 0) after 10 ns; - end if; - if sram_be_n(1) = '0' then - sram_d(15 downto 8) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(15 downto 8) after 10 ns; - end if; - if sram_be_n(2) = '0' then - sram_d(23 downto 16) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(23 downto 16) after 10 ns; - end if; - if sram_be_n(3) = '0' then - sram_d(31 downto 24) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(31 downto 24) after 10 ns; - end if; - end if; - end if; - end process; - -SRAM_WRITE: - process(sram_wr_n) - begin - if rising_edge(sram_wr_n) then - if sram_cs_n = '0' then - if sram_be_n(0) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(7 downto 0) <= sram_d(7 downto 0); - end if; - if sram_be_n(1) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(15 downto 8) <= sram_d(15 downto 8); - end if; - if sram_be_n(2) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(23 downto 16) <= sram_d(23 downto 16); - end if; - if sram_be_n(3) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(31 downto 24) <= sram_d(31 downto 24); - end if; - end if; - end if; - end process; - ------------------------------------------------------------------- -FLASH_READ: - process(rst, flash_cs_n, flash_oe_n, flash_a) - type file_t is file of integer; - file load_flash : file_t open read_mode is "hello.flash.bin"; - variable instr : integer; - variable index : natural; - variable temp : signed(31 downto 0); - constant tpd : time := 25 ns; - begin - if rst = '1' then - index := 0; - while not endfile(load_flash) loop - read(load_flash, instr); - temp := to_signed(instr, word_t'length); - flash_data(index) <= unsigned(temp); - index := index + 1; - end loop; - else - flash_d <= (others => 'Z') after tpd; - index := to_integer(flash_a(FLASH_ADDR_WIDTH-1 downto 2)); - if flash_oe_n = '0' then - if flash_cs_n = '0' then - if flash_be_n(0) = '0' then - flash_d(7 downto 0) <= flash_data(index)(7 downto 0) after tpd; - end if; - if flash_be_n(1) = '0' then - flash_d(15 downto 8) <= flash_data(index)(15 downto 8) after tpd; - end if; - if flash_be_n(2) = '0' then - flash_d(23 downto 16) <= flash_data(index)(23 downto 16) after tpd; - end if; - if flash_be_n(3) = '0' then - flash_d(31 downto 24) <= flash_data(index)(31 downto 24) after tpd; - end if; - end if; - end if; - end if; - end process; - ------------------------------------------------------------------- -STIMULUS: process - - begin - - - wait for 3*CLK_PERIOD; - wait until rising_edge(clk); - rst <= '0'; - wait for 778254*CLK_PERIOD; - wait until rising_edge(clk); - nmi <= '0'; - wait for 3000*CLK_PERIOD; - wait until rising_edge(clk); - nmi <= '0'; - - wait; - - end process; - -END; diff --git a/lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.wdo b/lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.wdo deleted file mode 100644 index 4d0670a..0000000 --- a/lib/CPUs/MIPS/dist/tmpl/tb_mips_sys.wdo +++ /dev/null @@ -1,45 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider {MIPS top} -add wave -noupdate -format Literal /tb_mips_sys/debug -add wave -noupdate -format Logic /tb_mips_sys/rst -add wave -noupdate -format Logic /tb_mips_sys/clk -add wave -noupdate -divider Flash -add wave -noupdate -format Logic /tb_mips_sys/clk -add wave -noupdate -format Logic /tb_mips_sys/flash_cs_n -add wave -noupdate -format Logic /tb_mips_sys/flash_oe_n -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/flash_a -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/flash_d -add wave -noupdate -divider SRAM -add wave -noupdate -format Logic /tb_mips_sys/clk -add wave -noupdate -format Logic /tb_mips_sys/sram_cs_n -add wave -noupdate -format Literal /tb_mips_sys/sram_wr_n -add wave -noupdate -format Logic /tb_mips_sys/sram_oe_n -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sram_a -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sram_d -add wave -noupdate -divider GPIO -add wave -noupdate -format Logic /tb_mips_sys/clk -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/gpo0 -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/gpo1 -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/gpi0 -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/gpi1 -add wave -noupdate -divider UART -add wave -noupdate -format Logic /tb_mips_sys/clk -add wave -noupdate -format Logic /tb_mips_sys/rx -add wave -noupdate -format Logic /tb_mips_sys/tx -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {1165707237 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 100 -configure wave -griddelta 40 -configure wave -timeline 1 -update -WaveRestoreZoom {0 ps} {3150 us} diff --git a/lib/CPUs/MIPS/doc/J-MIPS.txt b/lib/CPUs/MIPS/doc/J-MIPS.txt deleted file mode 100644 index 43448cb..0000000 --- a/lib/CPUs/MIPS/doc/J-MIPS.txt +++ /dev/null @@ -1,109 +0,0 @@ ------------------------------------------------------------------ -J-MIPS Features ------------------------------------------------------------------ - -- Synchrones Design -- Portable Beschreibung in VHDL -- Kompatible zur GNU Toolchain (Binutils, GCC, Newlib) -- Befehle kompatibel mit MIPS-1 ISA (z.B. MIPS R3000) -- 5-Stufige Pipeline und Hazardvermeidung durch Forwarding -- 64Bit Multiplier (32Bit Operanden), 12 Cycles Latenz -- 64Bit Divider (32Bit Operanden), 36 Cycles Latenz -- Coprocessor 0 (COP0) für Exceptionhandling -- Direct-mapped Instruction Cache mit variabler Größe, 8-words per Line -- Direct-mapped Data Cache mit variabler Größe, 8-words per Line -- J-Bus kompatible Bus Interface Unit (J-Bus ist im wesentlichen FIFO interface mit 'wichtigen' Signalnamen) -- 1,2 DMIPS/MHz mit 16Kbyte I/D-Cache (Dhrystone 2.1, GCC 4.3) -- Endianness umschaltbar zur Hard-reset Zeit -- Unterschiedliche Frequenzen für CPU und BUS möglich - ------------------------------------------------------------------ -Known Limitations ------------------------------------------------------------------ -- keine MMU -- keine Unterstützung für Bus exceptions IBE und DBE -- kein externes Coprocessor interface (COP1..3) für z.B. FPU -- Befehle für Cop1..3 nicht implementiert: - CFCz, CTCz, COPz, MFCz, MTCz, LWCz, SWCz - Benutzung dieser Befehle führt zur Exception 'RI' (Reserved Instruction) -- nicht alle COP0 Register/Bits vorhanden. - ------------------------------------------------------------------ -Known Bugs ------------------------------------------------------------------ -- es gibt bestimmt noch nicht entdeckte Bugs - ------------------------------------------------------------------ -Known Optimizations ------------------------------------------------------------------ -- Area: Multiplier als technologieabhängiges Primitive instanzieren -- Area: Auf Divider verzichten -- Area: Auf Multiplier verzichten -- Area vs. Speed: Bei Hazards Pipeline-stall statt Forwarding. - Durch Stalling geringerer Befehlsdurchsatz dafür weniger Logik. - Weniger Logik bedeutet vielleicht wieder auch größere Taktfrequenz. - ------------------------------------------------------------------ -Known ToDos ------------------------------------------------------------------ -- Unterstützung für Bus exceptions IBE und DBE -- Externes COP1..3 interface, fehlende COP-Befehle implementieren -- Optimierungen evaluieren und ggf. durchführen - ------------------------------------------------------------------ -Synthesis results ------------------------------------------------------------------ -Virtex-4 XC4VSX35-10 - -Config: 16Kbyte I/D-Cache - -Number of Slices 2387 15360 15% -Number of Slice Flip Flops 1784 30720 5% -Number of 4 input LUTs 3962 30720 12% -Number of FIFO16/RAMB16s 18 192 9% - -Speed: 110MHz nach Synthesis - ------------------------------------------------------------------ -Virtex-1 XCV1000-4 - -Config: 4Kbyte I/D-Cache - -Number of Slices 2045 13824 16% -Number of Slice Flip Flops 1783 27648 7% -Number of 4 input LUTs 3923 27648 15% -Number of FIFO16/RAMB16s 20 32 62% - -Speed: 30MHz nach Synthesis - ------------------------------------------------------------------ -Performance bei 100MHz -- GCC ohne Small-data section -- MIPS Rev. 9 ------------------------------------------------------------------ -I/D-Cache Dhrystone-2.1 RipeMD-160 Whetstone Stanford Queens(12x12) -1k 32 DMIPS 5 Mbit/s 345 kwhets/s 47/767 2,135s -2k 51 DMIPS 5 Mbit/s 534 kwhets/s 38/561 2,134s -4k 72 DMIPS 5 Mbit/s 623 kwhets/s 36/259 2,121s -8k 98 DMIPS 10 Mbit/s 1149 kwhets/s 31/228 1,938s -16k 115 DMIPS 17 Mbit/s 1234 kwhets/s 23/225 1,938s -32k 115 DMIPS 17 Mbit/s 1285 kwhets/s 24/218 1,938s -64k 115 DMIPS 17 Mbit/s 1285 kwhets/s 20/221 1,938s - ------------------------------------------------------------------ -Performance bei 100MHz -- GCC mit Small-data section -- MIPS Rev. 9 ------------------------------------------------------------------ -I/D-Cache Dhrystone-2.1 RipeMD-160 Whetstone Stanford Queens(12x12) -16k 117 DMIPS 17 Mbit/s 1236 kwhets/s 24/230 1,811s - ------------------------------------------------------------------ -Performance bei 100MHz -- GCC mit Small-data section -- MIPS Rev. 10 ------------------------------------------------------------------ -I/D-Cache Dhrystone-2.1 RipeMD-160 Whetstone Stanford Queens(12x12) -16k 120 DMIPS 17 Mbit/s 1242 kwhets/s 25/219 1,803s - - diff --git a/lib/CPUs/MIPS/doc/async_port_timing.pdf b/lib/CPUs/MIPS/doc/async_port_timing.pdf deleted file mode 100644 index d9277a1..0000000 --- a/lib/CPUs/MIPS/doc/async_port_timing.pdf +++ /dev/null @@ -1,2 +0,0 @@ -%PDF-1.3 -%Çì \ No newline at end of file diff --git a/lib/CPUs/MIPS/doc/memory_map.pdf b/lib/CPUs/MIPS/doc/memory_map.pdf deleted file mode 100644 index e69de29..0000000 diff --git a/lib/CPUs/MIPS/doc/memory_map.vsd b/lib/CPUs/MIPS/doc/memory_map.vsd deleted file mode 100644 index a28ec1a022b70b932dc93a097ce38fb73d026709..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 17920 zcmeHu30xD`*7%vp!X{3DfQU%KCb(b%C@N2#5dm=xWf8U3fQpJm23g!~q6p$ftot5R zthL%kMQYX7ATE_w8|uCfhzo)>5mXk1`QIU>wcGFY{l53T_xk^s~kgV4qAfW-Ml zL%>HMK)~_b0)Zt0D+JaEY!I|VV2hwV0s;YA0$_*09)SY_ZXL8i2b6b4&=G+Pf=&or z5p+i2hCqTqilD9jUueqyPoWwGH2TXxya6lOPjjKw>K<=J$W^=?XZ;jnA!JF8+J< zx%V7~$sXpK0*G!Ma|R@|(moW8Jq2NshVV#0^TA=3Vy^nTPhT`XM+zrDe|CH)R5zJZ zo+t=@L-#+1Pv0Nu=f>uOx!1q{%xIhcr1T_O>Kik%t28t%VRll=R9jBmQ4pBtXbFb& zd=yNcu}SRV4lwM;c0Ww6e$I1#Qj3Pn0`^rcTld;zfi*mbW$NnZPJFc!NRjNTStu?p zhDVPcv2gL?MJOyRG{TlGTiihnQ`jj}VC2Y=5U2_a1Q!=hOK^eXBp3L=I-@CtOT%EM z{0?hLR5T5Pjx{C*i$N->#xxmJARUyJl#tvNzQX*34*)!Z1$dJmE)L|`$0W^2WYeXi z5@$=J=(rgPDP2MAhl>Jvtp8v-Gc74G?aKRDS8(^k+Xvz}&cq?gC+|i}v3E?3X;4*N z8ClEng}17oORMU}QZ7g(cEtR^AE`aor4=h5I3~Ws)|h-?Sd9sj#qdFjX2aFG{B=Da zrq!5mgk{YIys8cx#%WSL4ihnGQ2R{Pq+r+9d7{%MjTW_(E7x@xBP7oV;mK*q18~Cx-8~8RG z`0Y0EZBeHE20pQYFWSJj+rZyrzk%;COOhwDh=hdw&@xzx4e`W>c=A3O;>jQ4DH!4@ z9O7wV8X~jKSe#7CZsJ1MaEjpAZ2yx8k2Ua|W?yqP`jvzLVp_->ehFJWOM zUI0(Ad=`3POW_RUu&^Am!5!8P?1MI%0z7FE48#_uGH*maAdl@Ckad>K6RnXHNH$z2mLPKR*<_iz|Iy%UxFCi zu^o@3c+8t@yr1xnA!r0Kfk;IwKeOG?-YXrh@ka#gBUy!7kb0LilH(*tIxU4Un0$M< zAczm=SINbJk<>R7@i}}%T(c&4ZMEBVyU4|KeFqT2lT6X?GxXt7fIQ1g-ULU7Npi(}mDRaP44 zr18^`nsJ&9JHGHLvR5yY&QlsS4H|20iE_va_3A+BI?YGRk0utbD9s%GBWL`2hI_Ruh%4}x#Ghbb44y!R)B9o^l zuoxhHnVw3sbTYt@#FRufEoqW8l1|THqbH>$rDjMYQAtWhVj8k{MnuN=2j5{a=^eJ! zfHEt&pPoN!y}O&Lp9?g+d(9X$J3gs>!#-j80{vPZ(ueG$mzHd?RAkA=7l~NvR&vnR zi&HvOQrI0<0O7o;VD&{1F`1}r=muf|GEtR=F z)xth|^wI;uksgcT*?_dh#50;k@VXHZSo4pX>;T?URTu90VT70cGFD23kL}^K;w(GS zhYDZ)b>(y8oc<@tl>&XZwJJMgXQXcdxkIQy8eBA*I7?JN$3Clm-X8F|7A+Nk6=VsY zVfae);H?+7s4M{&PDG}n-Cc{$V#|qqiM`dt;Uaj3@pqsqf&m@A2C39tI7Z?ww6rWA zh-LC7O0HOT6v0I4Vu?Mr&#oDB7h2mNbKxTp9P7~0-clm26;(jY!Vb?cE3BLKF&CR- z9Y$y*y}eCjgx>()$nR~uDzIZN=>H2xla<3(pL%QHr6W~>@weLti!$-}aO_E~p!%>o z@2H31E2$up7kavD1qhS7NISVXSar5zVJqmdqrezp4e*D;R($Hc+knU5P)OjguXG4T zgYYJ9bsLU6xD6rxooY;HyiDYqKo%><#|O0}-iH)y=(;=jEi9r>uVwz$o#e+q3>4-D zxPV1&fQMIsXqkVv;qqnv0qf9XV=&m{280ZS(!h2-a|4EfZEiqRIiMHgfXEG)*cH{8 zegf=r1Jb}gH(=fgaL5f<4C35?<#&ECE%RRkPPqYF;BJT9fL-968}JEucgzhqT!5M# zkK_6;0oUAsZ^BTI)h9rZ8*m9a=LXz50dBbg_dyaL>i#S@pcb-BkOfUKdDN;w)p^wY zJnB{+6?-X<`X-Mm$)k>=%;7xhlRRoy9<>E!*5pyk^Qgsn)I5|)%cG{}Q4{m1aVQg& zM-9uPLh`6!lnKbAy5&(Gd6Y{Yb=5wPvd*LUIg~ZFEaD6I!Qjy^pyBxlj2AH!E=j+) z=G}(r0%vtEmYVa`1l{!-TZW>lU(Sn*bf8#jM3=RtlLM@dQq-`ds3+vqm_}PNHRdLn zEQ^WD^;E{Hk2p+=EpeC`d)VWc^mxy5jJ)W1E$T*(>UU~n&9Xr0n=+e@B3wO!YT-9L zlV6J}a3G*12d=+@B^~5jI|W!`1Cl-cV*$pfd)-DG^nGL>wk(Lp)RU5Mb^JIPCZupU z)!pMODR#Geq4YKg*2xQ{+1SO2*wnbK^ic02T7b1oRT^n*VV{{FPL-%WrH>3&ZR%)q zAJVXOa=6;EIThPJ6YH6<0+b?b1>888ntw3$?lf1*6_$093*mAwR)M8p-jxmEX>4Mm zweL{B!3pf7X^E4i2`Q7iOGB$Ny5`Dp7iABnX`nLLGvS?aQHA3^9c{7ys?(G))1qgO zoff@JDP7<`AUoGHJiAEAi_5`hikR^YN^9DchQl79J}%`O+%47!}%SYs^N2mI`ukjH{B|gR&_{qT6J}9^w&{?Mm|*4 z&+=8r2zCh;^KEjjz2m$}&^4F;YE-O5lZU+^sR(vY)V`Q*ohT|L2Rk(8&79a$viA|k zr*mSD&CF3}`g#@RdW!stjyMDreX^|dsHRkNdj+Ph*1XB}U1YQN*t_4uIG zk?SMJYTwr`)WUGx58H!2k2N^!<{AbZU2lLfx&Ym`h8c!wx(^KwOsQww3V5?I|IEhx zl^gS~#_avLSK&tvl@0Paynf*uF29iy?gjsbZ@WLfzMy$9tzE_af8sS7d zP`bX8T!O(6NOCi{_RdwQ9II>g%9*}+WD*NW0zEE7?kSOkBZ{hgJ*$$t$c4r5F zSXXzcU#|Q`8BgQusPS3e>GK6~vF;1_j6_h7R&y0%$Q7~H=eqa9$7G5kSHzLwWXZb*Duds@5B03R9b z=M_9`Pjq00&mBlyVDl#u8M++ZCfz4GPyfClEKO%5(+QIk2c%v2m`+Ka`(`F_uuNf0 zF#2fvySsTG=2I$afu1qezfOtt9+eiWrizjsZl*iN9fgdp;~e)!PjalPOm=)#ndu08 z)`|6HgIQQd9I{#K<-woG`mP0;c93=jyPe%lM4VzTvkzYgzMJyB2ljpk(8?l-ZkEYz zb+XmO@VTBObx1aZJV2Zz%82`fRqw8+B6Rsrbgy-``Yj$=r`UM8bGuh0RYczYVb+Pe z;wiCHb0F;Cn3Zw*?<%~*_D1&%t9pVpuKr5uUM0V&tclqZQm=&5dK;M^oyJNG^JS}K zH8Pk%c56RXJzCkDoTof(*r9}lWTRoS@{uwUEp%>c=g(%A-3;8o9Ab_$7npmD)WqOM zv9XJ>uQ4JhvYKpoL$+5)hr4lGC2x^^Z^aPBSjGFJ)@CkIz0$H{C7jUQP%@e`N}g6qHz`Xs>fzcV4Xrhc)3Td#c)e~1eT*)l zuh5U^2HIL>>8k3fBC9P&sp3^>D#-{{RYvgkQF|S?sNjI=r0V@q4SSxbUaM?15)Jrk z?w&lH@8fmsFlYEI)xc)We$95RPTNr{H4M;(8lbConju@O)b=zSG`JY97(~ak-)iq_ zm)-33M%zIr)v3)U)im8a-AdgKT}1v3`4QbY-3{IA5=nvm3x=dVprq?kosm*SyZl5X zoqWqLrc^$4(f2qO^KjPS_Z~u3<&=lx^(lI_evQ6B?=FQ7^iTCIdXWKe zM$GgOPI;8g?lSCS^9*p2tu~x7tYsYu72A(+V=U!N2(vt?&qjIylg(^osC~={<|4x| z&l#RE;+oXd(b(NMz^JG>bTc`KxAo#AW2SMbakH_+5uG8=8m}9l7+)I)=PeM$Ey?l# zKbB{MbdQOQEJ%z|i7*0BMkg6K*#$kg-52eKVx7O|e#OB}Q63kggGQBAxd z+DoL807XgY*-alHbI6{{&{XrVKE2C?PF2CJ<#S4W{={!EnOKHC>)T49HF%iKNr1n|wC?_c)d!dqNm$O+3 z`;}iQ4ax;x$5V5>PA#ristaVDXg`{yx6=|;W>Py?JZ0RP)$}g<2z_q4ef9z^c&pf? z1KMD1nRbvWT9v43nyu<~Id^2@3_49e*KbBbYU;m28&(^d^hXR;WE0s=fgiIP)Ljv-P$&`<>56QHXrp4E;)LR& zBEtUQI^9RQH(%%!HFnmV!HT&ty5~Bce#^4~4}0nu2e0Tk6Ylyjt#mtcTfNJpW@2B;0k%Ssyv~ilz@#HSYwZ=WhqsCGr+%~55 z952f8n&e^2N?3mu2D7p35MnHGn*B!hn0+RL%d9;qBdmxUvT@`Y*$1R(5|K$PB{tg( z9?YC3E)eQ_go(f6smMoH#9>|aM6`KUD664?gX$Fk$H1LR2(d`THSf{dp7lC$Y`WC{rbXg%GPuB6YC zx5%gDW*bONw^#Tnf)o*oaf)Qc2MWv8id~B8TXwC-TSe&svL8}rm!H@wB}(vD4pt^- zzo(>?i12%v0AlRwO>Vjr81~0RCOwWrs|Hpk9s|?`(oTbhj%Z3;3{5= zLIY+2W@~IIiaR|S@kJig)g@LGRTO!B@skDFjpY3!H(_JWoZTN~oiD0(_`awl>sAqz zWmOj4)0i~)mJVyg+WH656$h~wYfAcSN3Dfe?bOxS7|!nC4x=^Olv3OLqXMw*S;oV< zU&7$#(ME%l&a~;)$&t)xoqS)}LdJ&K$<&wHe5_8xoO+f4T3y)d??>3}%Qstl`||Vm zs_=B!vMGiiiewsJKHEUh@S*OsJiFu}LvNanuj9bCO63rD2 z3^%-Iu+~QPoKQZ+E3tN`0Y+)#wbu<#3`3YwrdE4_1r1|jah;gB&h*vYV#gD3j#U$D zbOpN4buIl;GiIsam5$Zf={@zm^+WVy_3!J46%H3G%kkCv%xC!0s+UjS%~qEkcBZIL z*wOp1PA_t!sF6!Ps%ZBLx3Keigj+N#rvu)f zc?xwNq5hF2b|c7dJV*7z!sJ*c3Cw+I?;}}O-c6MOy)Ekw2B`qHg9ny<7$&TF&VyUn zmY3`1zr^>yzzW$t#L@Oei)Wm(lNE##fg@MAimC;?Ri=p3;HWgtG-er7c!f8O+-X`U z4c+}c!AbUh<5xz5ai1E_g&oNlozX}MyX;xk3d=1D`%MmE~F9;6*Z_NG-w!@ z8tN3c9{Xh<$qLH$jwZ7Ml@O+kQzj|rE4!^WrOMaUF9xmhkn*(hs`9b&CS60vP60A! zf_5&wSR1}{hxQn~mWC@x8<)~sw5~c932p|ESm{q*JeL%ekx z4;{hky2}R06tV6(#P1*D_mD(r4f2;bmd_iZJY6 z<*vW&EAo!MbaqQt!#UBr{wqqPmzSRwhWWcQOZ{O*$%xB6uCF^Cb?Ykmm~12=QX8U^ zDLySbeDa!hs$%ZQozBlyJdLBKc!a&Dd?yx3NN*^r6_YgW$I}nJm9Rq-W#9xXrlo87 zv={PP;C7>K+Wy*ojFE}b#nP~mE!Uo46KRI^)#185tlEe8kR48p*QMy55zsNjB7Cs? z7Is8uK=xL(j(VeOub1ir^r8CCT{?C%HuN`+GWO#+w-aWa62$kFANo3Mj&ZqhoADbb zu&lh|*kP%eIx5gNJ#+^N(XsZ4m0V9b&vBMRI?>OBuHt7fN;n4)2-m{-K2X*draFQD|5RJT8{U zT2}UpU8(6W8zqaEL7MDQULDo6q$#RE_POl53~tGu%I=XS@=I+3{Q;Rx!v*a=`W%^0 z()4rsUD{D4<#uJY4(XWv{)M^;3PAI%SfSXi&?!zSE-PYBRCMBY-CX^aFRx55vOwon zGV-wgjQ*OwN)Ju?b_O?t+z?_YQcf{ER$}-Rb>5l0HCqe^3@6VY$e}KsJCI#zuqi)~ z4GgboBXs^gZ;j{fRciw-dFh6tG$?k<_HJAo`$;CleaefbsW6p+sbETU0%HfG>kCC+ zWD+UQy5@#@1V@sQa93iKOi?=YNGs|l+o_Dz!dc~Y<-G5D9LzftSYkzYqJgu84(Mui zv8r+87DFWsCk@ld`-bi+f$C#JH)fqdI*L)MW~$s2-?sM;QIx6Rrm9BOtRgh-nm|pM zM&&B#?01mwe>n6|uzuLteicn)PP%P~5>wO%dX_tkq5Vnhw%~9(ii*!JDz9905S~?pB~`HU&P+3S;rp($*7Mq1{ij3k;(ktR%< zl$f5*N|REgndymX$f!gn1`gzZwM-kxWcaZnK zX7I^9yyI2Q=V~G%!}~{uG9GB(9Tighgmj?P*+ovCH#>V{_2o?NI#pEscF~; za%4jfp|IhD0xQHKvkfg4<%>nrT%9w6PhYcQx<-Ixjd4za@pI#;WeyY-+TL4qr|@q1 zlSg+78yk%u9W#W1P2r8O^Mw^*e`B*`>t!=pI3}x)TthX-Y>v7sJH~#?f)Ck`+(>p* zG@Ppl2bv+li=IJ5&_0UYM0F3757mnWoV5julDQ<2bNsc7=~!*Y zr8BiqLT{t@YKLks(KED0t)=RPi>kXr=R3J0hek%Te(7`5r85#|uyop7DQC=61IwqT z`*$2!5mzz1vTR~SWXk>gJvSFEt?b(Mpu3;G;hO3legDfb-PRA=!$#RrRD`eCn#c|j zQ0(j{k07hT2z!q6ijEhyD>`2|bQz_LQo=sX35~~h=kkNjTs-`-^0*S3HH6k(>!9=2 zHJpQ-UIr-CjxnUr3k0J6 zpf_JXpi4-Wj|;ZJ89e$^BXZlYdQv;NGZ04TfnlA|gBRWz2KBmw_NhlNF{NcAKFRW4 zb7a)e(f0?*7ZAw&Axen{_2|0SQ{?j$tHvJGpGm{`k~cKJs!jxvy?F50H($t!myrn=#IcD?53CYrVi79LbcZ-_=gPZ4C3+Rc7 zDbi$ZQp)@3U?uE=!D|?61>7ZYdXAmtkhBm%FfYcY8-E(Qv72V*9f;7;Tp4m@r=dEH%sRSUnKd|kQ!-N2Jjpoh@-6!49X|{+h z_;*+bv?f@Lbt487u>|+oWd*UF$kh?2xI3S7=;O-c7b44A!bwtN;&&IxB!eW?&+A>l zuEu1K<`o$gQgrug1Ktiv_7=4LgL=HtlqI>6*Wp3Eb$1a@C9;HAAuSTro3InkHdCGa z9TrI*NS=zV;AheLHSU~{@m&$_MN;G>&>t3E;Dpeg@FIc;=1ur3?qYw8(8RLrf^ed$ zuGM`YgSfMes4-oHc0ZsgLKis2Xbt=v(yyS!XspA4$JTyr1yf(W6cP8DeFw9t5yM4u zD=A<7K-Lj=`yd$l7>++?JBMHc1Pe+FH;G@=KdF@`j79T?MBE8UaDUymo5X!1qrGn(9MOfJ*+!iD(|U^KD3 zGGHJcsfJ|ar`7Cw6yl${fxqB709j+|JR7d4;x>s>jhxExdi)}GmJ!<3n52(iEH*;b z8mt7Xe!g5H?g}A#IPiG0c#RQ8pb>p$!-A=s#q)JYFGbXtIvs_+x@2cKtq@(RF$J_7 zg)1{Qi`TnB4fHaa$l35fy!En}=Ol8n`=*a5!!mBG*wab0rp6RH8`E{zD%PvS-}Vu? z>UwMyGftvDHKqah;}=dPV9&XV{WtuF%>dGEt^QC*aUe~?$@zbM@{o4;|0c8`lY`&7 z0ubZh3P|Mxe)ZzjZ9O}Q)^4LBR29 zH3DuEDEKkY%@fBzuFbH-lynsRA;14<9dPBGZ!$WWpo57LolB4{jPk3|V&a6D!^09R zqxguiocRJgJ$eWrh(oyb*+ode#CCBb!v}LTaka|EnqvTpTdF8r6lvJVaIQAj<}fPfFyJI0837kMqINIQyR%%{JY;J*_lU-MP!qvN zUa>=wU+Pd$pt4Zpi<$tlktb>ja&|KZZdlQeX)Z!tw&o9_#1SM`T~MC$wr=a5!=WvB zqXZhh^&RKA&80c+aMJj8pPc75_ijPyCb18SId5*R9v6^9XKUQn7gs(SfgAxhKeG_q z2cQ{FLgL49cR4=AGFZsLT#Mz%5s1sTwMFmMzNk(c9&P2Q=}+Yx9sh2cmLqyNnie41 z%rwol;OGe!t`aWCIhbqFhWmdCO-KOH%mK9F^=m#U(8Azo`T|L!nWiFsu#kf&-g2CS zB7R%jzY0w|5TYDSs}Y!KS|#Lo6fE2+SdMeBO88f!=`i9CM^gbJ$V}5t0Y?wVD~?AT zU4J#2I33E-6pPlNnWiWnx9*Uhz>$7H5XJi|(De6kM6{{f>Tr6jP3LlH^gRK*5WI)x zf#dOQq+2*y;}{nXE|bz@uqTzOmnTpxc%r?>49sCsK?>x(Prbb1d2 z!3e*-2(L*fET%@l#yBFb!>^h$HEFK5vt(M~)@T}Wp>1{gRmbYK)t}dvbf3;3{ z+g4TlNYiQ*n`v5QHH*hV6rzWNRaXBfP29;B9h6!FXH#=&j^{kgvULm_ZbDj9?eN34 zg;r=zpb3?=+38$eKO~%7jAM9fO$_HOakPrz4XSD8l(`=I-4H7E;t77&&NjE;B%KT9 z7Iv`$N_uRDvfC)AFpJB#(3$x!^%fG~h_fHtxtpCmZzCHGDt=fOx z*uS+t|8-;k)=K=>js06|?tgpi-|yeN)_;~J^P2bO;XheeZEL($2++ga&u`bGx!f!p zzb}>M9?bR3Ct5G`yPaQKO25RjZM-&F{71CF+v}bGBi?PY{mcCC({Hw5{`vI&((?Gv zq1S8?{PXGk<(O@}|DWjbU#_j6cbMPqj(>0Lwq31FzWy8k z=gh#*zrX)SfB9~v!2{XaXr=rV{tRWv2yV6b{!HCJQ|G6_QR2_k|7X|vE06#G01To1 AfdBvi diff --git a/lib/CPUs/MIPS/doc/mips_biu.pdf b/lib/CPUs/MIPS/doc/mips_biu.pdf deleted file mode 100644 index 74f2564f18ffe9760f684ece239687a729f5ab90..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7079 zcmahu2{@Ep+wE$QEo*2{cAnXcZIFGJec#7m#0;}oqiipw5UC_fh|0cXi9+@*LPWNT zD6&+ji2oVY_x8Tue_h`**KI!W?WE?-pjp>K(vg9%=2J6k@b~hl%s5XJnmAWBSLHKYt!WsH^;Yq zsuR>#&rCY9lr8>M(!n^|eu2Oh4%J>Rf#(UW(zi)JyDPU|n!hYIFS%N9wMA_j6OaB3 zcxBt}-)yH^6^;1scrrA25c;!JP}T7q!8 z6_^x05%o2KX%%fJGGo|dfysroa++SECS)YF{S&3B5*A0=p#WrbL zf}eWs<6iuv&k?y}cuGK%gGlOtp#ztO_N5Clwj3Fm5aOZN)~-&iwQZzhH8!d$ts8xPBgN!q|CfyE z+z0VV*T@AgKkJ5ATs~P)j}+`ssO{{!cqqd803R~RG2nBKNYdl*=)v!M43dVN72ki1 zdIamGx+g8>YB4?xyLEQpcGp8`kUTv z^#(l_^}~)!8UiMnSB($KUXDbu>z8n}LElHgb%O7lRj-SCHU4C;A!#b3N}A}{X26!F zoqy+Ly#XGE21IHJ>Z7exY2xV=j3nzin#txvX+#F5LMiGph47n?ar%CFi-A1;p z&RI-|yt8rOtHFXdMOsbpML{*oM zS2mYN3X_h$M2$PB7DUC|;M$~K>GI4JLUVGw(!nsUs}w%J=Dx3vCDXpVd+&mTjBMX_ z!t`c=NsYxJyL9wtFUHdxd!$$`TD;P`dARIxSMGF6RRTrEN=lQ87rzxgb!hh2pVo0@ zTQpU1*b^7!H=cLlZiT^y;Q=!pEf-;G#!VR=lUoD>tU!8tf59DrGi3RaOKx-N_9H=w zwnql?F4kJ3G}uGh)t(-&X3}SbTx5QFwR9`nTV#Eci!r8fCG0Yb;KravAw%t#)tD^U z8eiL;@XN1FBi(eI?`-*vsf1A zb`kaVnKtUVxa($ksss+Bkk@pOiJv8MLtLGcLo8a_T9vzzet06Gx3x~lowauT9t67- zfZ2$>mgF_Woq|43(Mma>Vx$mBCwA2B;zGyBo(HLn6YlTqv~%uDIUd#;4P!d~mtz>S z8kYWy#%zt(skc$jHAdz1F6X|gg*6QY!fu}nlJN4(jypJc{&;i%%v;b_IA=_Q%HXc2 zZ}iB%?3#|psS@V*j;&+ng;tRYC7F?$?u!nZHo*Geqj`jA+9{8+@Vm!00}r}ve(b*T z;?la+c!f5a%o7%J@_4+r#00*r*nD7bwK-$J<#tyR(Ff*naq)*{PvvYAT-URbEp@!* zcG0mElzu!e(}pDKwj2qw7a3Z>7pI*v3y~a_n(6QARR~eCnehmTmbGnNmV6JLl642jS~U$6Gxc+=+RX;NFA`*9D-bXxkB>9`rR_8}S?t*obI@o= z6uGPgAt51MAuP$`kWP8&g|~cpNpJY_?AzNF4Vv0zD#xF-H+Q$#we+fs@XPpCnn}?5-hw_$9E_dUbEYg)-ybWX~dd)1IL6IZehhq^-M$ zL{_qt52XpMeC^s=b4zFa^m^$8`hyugj^Os|^aMw=6PI?*(!Ovx6bkYShx+?8HV^W} z0md#KIKU9+hIdgT214y%AX!FU1}cX_I6weXA_Y8~q4F@0jf5jmph()u4dQWRB9(;2 zk-;y;V5UPcfrP)*#LX$K7Tg|S0zo~K%xqnh= z;4h+@3mHfA2w++w09TYwHNkN+b)JCCkN`^<&u?y(70g#;HObwP~QC#1lL~#}HHrWc+_%GpZ|v zmin~J03-W5@o298BWL~kIhOHorH{o$_-; zqAeZp#gXttH-H3?0kW?P76(uON&pd{0#t$1NjM-FMh<(>|@-?o>lseYMk#1WwbYE-LuprxUNKoAK;fD)qXW9ENu$JCe z$a$<#Vf3h(xMVcXx4ac{{@dHzi=pem=N9ay#!$1v3EB8DA=|s1R;feWdUFlNesWUr z^CI!rW?UwS$saWbu3mdnkiTCeRU{g7s$;N-6g3h?tRp3+bBihm=J)ByJLqO+JAKbT zDaFX8qU;&2T-}lN>>2zBTmG3$=|VBquqhTn3oUAu5tqK>Ckvj?V#~Y8gY=!^Db8Ic zM{K;V=;;_-G;Wb(-kLjmEj86Ey|m-BKilVF&mryzwe&j!+!lM)u1`Wezi%Jr4tB^J z%N<_0-1PKZPS&x@wGS8`nhM>6AkAx^U4aT%;rbt3(fTBP?}}QL>V4#W#KB}o;{^mN zDAj1gO-a85d8GD`(&$JMpR2eD5yg#U_+X!W8Y8SF{UPr8wH%cE51topcKse#0puEY z&@=Dt#~!8+s9H_A;vlKeE=aLtH5GZw#eOGncTZqCK7 zA8nR=U(B3W<_eEaZ_Xi;$!kolW+<7IFgrUZ$7rOoufRhI_i{3v~BrOk3BCkRH}Ssr+)ZT?tNi( zf##hL%m=F^*2k<<&&+#Y%X8pvva!jxqW7*oUDjGRap+@JU|LCE+Io|-%dO|Lp&njF z>1Zd_DS@+Ep(|p~w7nlFjIIpA%$^V;cQ3C{oAx6`VclPoE+b?4PBXzv6Muv zB%*oa_w`E}>Z$cac&kJyF|QZ$5Ap{2tR~d;nj5CoAQ~a z9`$i@T$7Bbo~Vw_ex~kOA4L%FVyhuNcVVx8-!kGSaG`G&0sK&`nd{jOr=*!?<(*s5&olyampQ@fNoJ#qo zBSRT2f5=i`&QA9UcYJ*d-`D=ao~we7siuxgi&Zj)f_~zquQC^)qfB-ha-z@~ul2{x zJy@EQziVeI{W(H>Pzk;w{i8;GpP~+bvP%yNBaHY!7t@%VF@V0+J9}PP{H%+<%7pRy z-Z$kcV-`|$TTwG6XO2oELuCCM*W-gWLPH%dev54VF}QNdQpb^tKL-+c33~b2Hr6 z3@x22gX`-1g-%ys0(bdtW&_H3e_CLVS_osHA2 ztit`ffIKSmq_$-%ir&Az$ctUU?w^mu$@MaTgz#>lbd z=DNBWv(%*f1u0i!>1{|SCihPLRh2I_H=?m9X#e9rP`PR87h@s#j^WVV!=`lBA8mUo zQZyx9+J%9=3w19T;I6xE+@Y@p4__HDBe}bx(Ray zdR(x)ks4`~!olhk7CO1Y0omg3Rcc=x4ioRTI+TWMGwo2yzFz*`*(0&H<@3uUCw~M5 zP7a#Dj$#y-_Elu&5^XC56?yJvThOh|(Z>^&9sQ#v8oHMQ{oeYEypgQV5hkkIbyX$8 z*4OYO__Ugs*a_nhmIRAH)X}!+8s-kR^1_eW(i4f*Q}+*wMQrn)i=Bn-ElDv9h}3Ox zJyY0tHK$XEE9UD}7iPxiC7nXnOM(SDPx-?Vs*?D>MSRhziI&Gth6J~x&8yA~_izw^ ziAVf?WXrt10-E=p;a?sy)J|8_FCLmx-iHi|@r$~8SfE4M=oUn>p z@`aJKB>07z8J|7ljHzof(!td&+~~WV`siHJ_}v>)unx`JSO?<~aTaym!(^M;A{E{^ z;YP;vSb2;GY4#}@{|WhiWIK>u<_v+f4ZXvc$U-P;m)W5NxHBpe2R~pQmPYsXy_Tfr^*&GV-I87k&f=q8& zL*#0Z_sAndzKPDnN6h8*UO9H&f`%QgYyqEf)13X`9xQUrKl0xSBzq-i9-m>Z*z&*{ za_I3~LVWJ*HM1%$N3ry(iEWa+NDbR7GsE;69@Sb_xhJ}7j=e}_WF3kQgN1#4<2T0flAH72y(lSc0f&;Qi#rL-H<`$H zrU00w@RFMYmt5K>LjHk>j@S1e+a|3OuZ9+^ziDFDUQ!KX;D0yYhHN3cmpgPuphT#% z;KcqTGo&vP`^{SCVBM?s9~Li+P)5!kIoa^;$Cjg_BDc0^wxvceug|XJ#k{18fcC2$w%Au*pJ}yaah)o*Dtc$dyV~R7 zTR&FET9Vr7l}in(;<>}hA;ax*JpOj4O6?@)_+~9b##}8U-$%G&T$S>Db$xDFtIxOv zCuochwwRC^g z+86(^xDd1P@pW*E(v~uw@M&!Jl6O#t>7oji`bC&m!F&i-%mpn?|10L?&B5ZHf<>p`iRa*<;GC+v2BSSCF=vn-q)Nk z+8Oys-}_Gb0EQ(yo386s>Qt+Re2HQ6{&p96{sA_I<;nYsfopa_+!>jeFv&~m1%21X zXQv(fq=>cb?5zAJWP|iRT=7tvl2sPmx7L#3p0})&bXx5Gn%rVRW7**|8i4~oyqihR z=TnaCZ@|ImRplZ|6>j=OKObLicWx58$T+tGG;N?;1aHPVC+%}>4+pBF%3K>129C`f zjcvaEder45l>xn@bDsYADPzVfn8}(wXoO>)o?ip^o1RO0dA)D_cB)iDf|V!V%U{Ue zrrTJOXr@)6|LorUQ5%6h7B?yuM-tUGHh^k-63LXG4Faf~G#V)emVV%WCKNo8paFJk zL^Tu;Fqk|X23AQ388i|m0fURcU?L!!A<^xBaG2vM-Z)Voyf4|w6;J)GnMe}VBH?hf z1`kRa28T*PJt-7l1ppv>x)KAW-EbhIDwX01^6B9SWU>ErO9Dwacd(|1BO$Q=JW#ZZ z3{nQ_4*i8gz-7V8oAy8nzj0`kEZD*MCk_Fp^?v}`48$bhUhk?s!$;%>9@|rT52sKp=Ii!rLth}a{mYlqr hx|*B@TKRu-IM7;aWQq%kvKtIE_&`pb(mbOD`9DFw`T76= diff --git a/lib/CPUs/MIPS/doc/mips_drawings.vsd b/lib/CPUs/MIPS/doc/mips_drawings.vsd deleted file mode 100644 index 29fe840c3e2100c8d6159ca2bdcda5a9bac8ced4..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 288256 zcmeFa30PBC*EYQOIVTf{31M=I2_Q0v5OJPJL7HT5Tha zwW1ZP*0~08K-3nB19c3}BGm*GQG}d-opTcO>GZbW|Ge+_zt{D1b(q7<}vh z|M>s#9cX~p)`38<+6Yl#%o;OmE&vmPiNNf@?7^CVIe;|<6NAAPK#pKiFefl)Fc&aa zFgLJfV9mi=fVBi`1ttS)4JHRufVqQtfO&$o0rLWD3+4^x1Lh0n2i6YEAFMrC09YWH z608GQ5LidBPGFtEx`1^B>ju^xtOr<6uwG!j!Ggh5U}~^FU?E_A!TN#q2MYxY0~-J~ z5Nr_GV6Y)zL&1iDX~4q4hJ!_bMS?|vjQ|@7HVSMs*ch;}U>|{v0~-%E0W2CU25cf& zELa@aB(Qj}$zW5!rh-ian+`SuY$jL&*etL_uq3eAV98)9V5wkfU~|CI!9E821Z*zY zd@yFM7r_4)f@#4rz#`yZN`#+Oz&oD>|4(Lr0>1G#KU`tQ*tRzTKO=3yd`2jr{mkA< z?h$+re@cdW=3m6UFkFz_mq)@oOaV)TyPpVmAr0PPJo`!-f9x+Gv_b@Cem@1zV*dY^ zPqu!Od4>N<;9e&WR*w0d39u5(dmjkDdosL|WcDkm>?>pL_n&?E!0)%coxl70RqzA1 z?=e5coVVY;?|=4sx>?^p^ShakKYN|O{rVQ}?W2*?Ql=#;e4>W>D*7c)OrJJuiUV`p z;e*HBBOQiw9f2k#)T7=r2{fF0+35MCXH{ggifZ_knTUQ}O}~6+7T`BkXhp`eDpxAQ z6)E8CXV54=KOa4Q{Fp{R{`ez0c<`VJZQ8WS9roU2dh%p6bm&mjQQNU2YSDu663hp) zlFSE%=w`5_sB{dPt-MVO#rNvQpyrikBZhNkS81LEdsxvYdD_I8zUT+sp8pUWNe>=T z*Pd|hNJ^uoCB)Myied5TiipHf2@_}eBG>jr(~g9eAV$HvoU{y)DX1Z;(%dJjpvGrh z?UYz`b*+3!~;- zu)5Xbn!d1unueq4{E=i48ZXcxGL1hHQ?Vn65d?2N#a~Ye*5fT1xRlh`Z4hb@xt^k^ zNa_TkdR${CZ{=EwbvUY(>sE}rv>>{)AiKB;>m2In42*`68_0En4P9Og-cd6Kzd zo>Z78FU*r4<|#0TDN5xJowTjnf=?OnwddlN8XU91Ilm2&-{uE0-#wUUppSd+qS1O{ zJDNb~Xf%}AfqunXXw(TWLub)a8m&Z2!1;d`+!Y{Z2Qh6CL<l`hfW`}gq#vSNTt3RJzs7alU;A0C`*KM6V$5EVfK}ny{gj0hm!+b9!`#G z7h#!BSf-PfDa!<%!U&{uK+Bc4qVR+0@^y)VX_`=@L$;?<(^CHQ(4t{8l0}dE>In0f zX=_9c1iv!@(34(-cnnzkRhk>@Dv~HbbUqr|Bt(G`sdho6Ksky+9>yfks-!j{3Z9n( z;`h-;YUAhb{CIenk9>NzXQ{)|j&nLWpw~%*qevHmbkBP5hV0JoVyDW}Y49)pE`f`te{y&ZuyJc<7 zQpC?yp)~C>?KA;Sb&$uqAYK<@M))8Xl%2IN2OV0GuQ-!+E$ipR<#{!+b-d|8=~1So zz20U8C9mAJ=(N-NUv{3Fcs#b!ytHEnb;- zf9hzP@1^SfyXQvB4L*h*hJxrYQ-(UbGvmLWsCpR+?$> z)+tGei8I0JhbG6zhxe-uMd1`RI=n*<8cmy(8V`YiU`TkBEAqm0DC4`X6KIJ7Je0{? z|ME8drfTXb@L=Gso<6BDYE8B88WxJxegZnH@Ilqby-ukty?BODyCor8!_$3ssD|+= zBz#@vKUw@Sc*AE^P2ZaR`0Ffd5MF0T^x|*Eq@_RKB18l~mb!y3U_mS@CWNs+2#X0( ztO9Mu)T?3eEZ%bgT8pS*tB?`JuR^V{^OIL)JT#!9I#VFELuq#_sueHI2$eA40>?ai zc@}M2{N`WjLVKLPnqE#Vd-En~HEP|OSVi;9ZN=ThgT&?I#IwX1;Cuto4PJ6$ZN6|BFpiTRl*{cBWJ>WTe4d z`_9;~&_L#Q;u%f+&bZdlk4Fz+mxx5yJSxp3tgoe-LS=j;xL1eYnlV~1)rncFqxk7d zI<%Z!ExJMFFBr=G{Z4WD3d2f;egPGFghcH%TUBACArlVN-d zEky*CM#LyyJbhWN;(dd8Y2>Rs(QL$zWmj;IAodqhXrx3&>|;VC!E-^F;tfWW0P*0Z zI1)&@6T>bPpqGfOC3r*wfk~;K#9rbjaRf8FNxUdA{}v)LhNx)^6M8n#mRHddJNvK< z6r<{!NGE-gJZ;KUSOTBEzKRaryLY7(TrAR;PE1ZpOrDrJjZT~upiuOgIg^f8SXWRn zCowrTe(FSeW@`Mb0Az8qB%>H{%G8NT@pQn{nMv-R-IcUbi7eYu5H{*iOZ=q;Le1K5 z@XR+DVsoGQAuf*a@+Tt8OUXK1>qOK_LLb)%+u}IXBpH1Rdy;2qrPz%P$kW5_t(iwi z?AG>FkbaUL3LGqu24dvpA1odl=(zE+-ag7<@roqp{=|7KloDpE-Qy_S|E6tvW4ngAzMR*Or z3`h+4?w)9MQJDbW?~BHT5o%;;l`nud+!UjCs9jIA_o@J^a^ujDO7nnrs9!W%MZ}?= zugx`GD$Nd6a9X8^CV&KzKmZ{YXIOz7qWM4p1wdnHJBXw0fydM~K{Kk%-@v96?*e zDT)a^(D7TWbUjXtY2ihUX~7%gRzwJkskM@C)*zYNW-Qv;!fs3pd&?L%bOaTHXVX(} z&3TyfZ2O+P;yl|e2^Ij4uJi}L$$Gce7E`s=yBTTLyOB%MYjM(YF+n7uWv9dhnM9+d zVuF$<(X?QRpSYKJm>BkYvREfxFaAb+Tzpx4S7i1QwBkFHc09)2iL=1naXzUDd*6)5 z4D-MHqSkyvRrl(Zs{WOs<%F`9v~2h(!?^jvyISeoo2oViC*80~b!M%T92*q#=-wNL zw0&U6A5CAL6twYIL%xV!^5f)#H&m#HN`GT!mlLW+FEygkOObEQsdZHkYgsP^PRa;g zsvCGIHR6`MZ`bxSC93GnE9%Yb#ix&{!Y}rThMurzxSZl~{vt(!r>8p+ z=@Qr~>H!0(85kBEoe&^YNQ}Tg;@6gH(|H6wV;$o(3MJq(&P#Cl8t49Kt^BatKDm18 zx2lnQu1$ZWTJE~Z?UK5quX|-}vmI{g)7CBR92m1o5$@}8CNQv%`wBTqu>T6YN}&W< zvK0;Zb9Z172(2<830{SM*`?TG*`=7u`ITT-2_N;qv%dnz(!Y}zPd$)#&1;j}ua@en z;@W0rPoc+tz^3#|kM7?Nj8Rlssuw+}4HUUw^X!F&1)4pLmfB{TqpgAbJREUyuKR^B z_kGTtk8N!B=wn}xgMq=5JE%)4jHx~J!=C6=F^WrTHvZh;qlH#yR2w;-aSil+*c}i#zP#JON1-%0qhG-pEieJqtYVx|2#s`iM0l1x zc$+wIMo5iL<{cK`pZg*lMor2)BEY4Q6!@Wsc_#$;N?$Yq{E(#`8d5C49h!jG@ql0Q z#}UqZXYz_xvq*VE^)58rp8&kfE;O=%4)~H#nvHWH%n1Qs!iQt_IxOO4-5E@;-|~2 z^H0;44CeJES9)GQQlTnwAyw57&@9NVHE$g9*x>WJir)CjP(HKEmp>XOUr}utQd3oG zpu?EZrj$bKAo}D&8^9$KaD3p)5Y*Hn9pf+HcWPO8uZHz$SE2HwZUph(_T+UC9t(f) z#*=Xmz5>hIM8>nv$FLmpxtNoSW{$f(I5Pv`FDV}59%?X+iChaoS_sNQ@GJ!1&q4?+gb<+mHC8%B5`rLUZz)lQ$Qpvj zdk1QdbhJby87&b@&}fMZJZK5#4(2V{FZrj>V{sVngae_k2zE*0*mr>zUYV}(2JtTm5+nd)B4IpbPRKp=~bw-31 zr4lhb1WJqvmK9I|r;@qpO^Gy-c`-?@Am7!2&s_`-27=iXB4)1eGy+U06q#V7aFOgN zSb8%ltffS?*ysaG&u1dp5qwyB9>UF}L^J75vY8a(T6+m8mhuP}DQ+nZk$6f%B)(vl zKsarTUK6IZ>NS&vZ(PtL^pTr|iD@e=%OIw8V}nqdi9(qmlxCt(CJ1c^TgnEzNuSVM zuS`yNWpw2{Xa&%+wq<*tN5NiHKT=sB0xU zRD$X4XdGUGI^qRi21qFM7|)bA7Bexf7u8BipivOxc2(e>oUVdE1c=;$M4UtDDp?A zQ6gOXiC%cmS5e&~eKK~crg)rG{iNF4;i0OH#unYCKy;g;?vkPg57@-Ixq!RsA><$s z&t$e#krjx-5aBY!XlgYOBPWP`KX4%00HWP)AV)C)#IfGIVQAI>aR@-)0@zx1u(Jd% zs1j4$HbP&XK$HvIY*>;JAjSV8=3yjwYfhhtEj=Z8BI@H9PlPg&M7S%4o6;VggVSvw zaG4<4af3SFYY?@6AQkI2KEhIMJVkyY?Fff`KcG<6>g~LP$pJ^P=#gyn!)FWQw%^e_#7C{=@1M)@2~%R~6-B9fNQ2%o#)^7~;w=l8(`%u3QVts3< zpAIU9HPk=Osu(;LpIfs4jVhyT_#FBkpKYOjW_s;%lqn{JV%pr1re(;LPmATKjc|ck zDZt`Pn(B$0_T??5@o;gRI8D4vj5dn*h<^|li|>hFig|Lk7WKBMKZ_=9Q9pMJ=_12k z_6}B-GPn(}z2qs);PxfMo8H>pdp>D@RW-?lyrnV&Zhy?ccI{)sXiHUcg+W3m0B$p| ztqtA&^VCikRsS_|M={7)E!72di zG`o!qQnNtq$0D^uGY+Wxck<+AFlf08p*{H8d^oI!NdV|}gS894d+2uSB+ra~dh$xG zY}=l^=|;Ua_>9Y1EcxMAw;?-61iD{43~5fay~hn_$3Rb?v4I|sI=i0c0{jS7)4th&f!z~>25~+ldf!=y}C8`q)_L8Y& zI{r0cz6hm}S)_3>iC2&{O)IL)IRGwZ9*z_2G63VWY~p)%m&sYt^6AS( z_%y0zLp=tM7jmK{6Y14(p&oBY=vEEHc2L_V#6B?tX2Ahw3*0K_bX_+Jmi zN*fS+{2quwa|5CbDjO`$T^DMxc(K`)#Nr<^{U{1}aVG(dRAL(ja}Zq4Vz9jxet%Dy z>0<`&zBR&c^d5R)OGb68x54jME@Z6=1-B*)7bXQ6S;?)TI=O;2Br))N@CL2Q=I|H) z4FDcsrOpfhA5*E1jx%ro>_-)?4dMazb`bu@V7JGg!7kztd5xujxz18K!j2$AR9NxYGEPY&aLOp;9Ebs;i z(EzYJjuozEJUq#AD=Mkn3EgQ=h7 zYmpBK^za70u@`_fHAm5_MUH}U1DO3sOg5iovd3tZI-dpAn$k|lD-ah!)bmH63Ut=Q zfNCrWE>Fhs*>o%<7f~Y!*58>}THEmJ4n8MoJYXP|adzPA?lzJSPSN0K?WtO9qqTcj zP~~XtpbtP5F!e)F^_A2&g6jJ+1oH==+Hl1Rstm2A+2jh)TAEF+0IhvzvC&%En#1v- ztvMV8ZO!2%($*YKB5lp##M9Osj)J!4aAvBw91cTkO*T+1p{=0W@tqA+XKsEEsze@> zy5VT;ax17>Y3fCR0XFT&7N<6YIi5z z&qbYh9r+!FETLTp^84>(l9B0n2teug45JlYW91UjIR-4)j6H7M$Xbk!I)+M2GShP_W$v59z_#!N!GYOoDDd;cCfb?LQBkxoqT z0VhY9X|pTetPs(DD3}3I9gY7eUnMR#iwU_0^#|a|-MB>1o7=vwx&g$sfnly`jNnWI zbNx!t^sY1!5>}}oIA_bqcN}vC!P)Y<3KCTkAg(mST=M}w#cZOA)ts;Yh2}i--f?%v}Ps zHOVQB>>vfjnH8Gl7{%Fy=4Y(ZEZENAX^-z3`D<&u4wPmGtI)i+-jfH(EEc;GAKh2s z6RggB2_Y6s-(je~eR>#`yTx=SimK$K&pMFBN?hEBcji5l_XoiZgk(|s;cYzvX9kA) z5Y7E>_y+b2_#Q8BU*fwXF#knB2Q*30r04gP$U}3KX7Wo{d+{vVjVKClM6G66rQ{T4 zYKpRXuN0+=<7%5n{Ch$&w`Yn>Ds@cTKxXNDfzkFt{kjs6VC;xq3?Oeb3XDe zTkya_?>gYKcJoDmyk4XkCUDnCUV6SbgF_Yo}jyT<%%b0 z1qjNFo=h{Ptd9HT=4|R)Et}r#KH>7ESsenL78E*Mn+I(*=#K>N%|X6bAVCnz&? zb`%s$aC9~q5sd{CoT6;yvo|<8J6DJ}KKq`|nj0l$ptF#^*leS-4*yV6p5I7kwSP)y zEj9$6e-}8bRZ|`T+Y2=1{R{$=BYH4G3A4o@C);4)B$G6Pjqi5<7xA4{T*ftx;xf9^ zC@!NDjpFje6OH0Bao_`S8M%HSE{6%WHj-I}%YJPmvkaH5w~|@lvVQ=_rB*n03-p9y zhChJg`ilbG-sFXl*-B%OB|o#l zeBp0oeGh#=U4b+$KW$(#o{yQtFQf!@or%|g!5|zzd2CgV5i#fkAclN=BM?(hK!CI+ zfQP*Y;uyX)v<2a~js@Z*@Y=jtjX+$3b0Gt417aSeg89}2Fd>2qI}2fNA({X-1HT;r z{C1FZ#J}^~B*12r1mK(mnsO3ga}r=Pe8C$YvBvoOloCz;9#H2hdUJM; z|3|-H*nIMC(>?h1{tF(DfAl*PvE8G(xoWUaX`x5ukM6?W{6Q+H#Xd|iGx$F3bB zaIgZX_YPtsnn{LtIz@)pLqKp=9KQOQI6O)m-bx$}diNf**E2lTGrX5)I39U`}tju*j>0y@63BVzK*ogmK)Y35tDJhN5pVI$5vHnnGYo9KaX zHn*{<<~;;N1Y5F+1Ajm0{Etc7;}~h%mTDdZx#st&=An>lZcH`5gMFo?hMfj)*diQK3y~!{qoZJ3=s`+-#a1o{g7?S=Fq5>Wp75I-3 zRbqZ58fhiz^%F#R9AusuL3%Z%S#zP6a zJ!QFyCzUpB7p)#s7ds{CBns>pvK+*Hr-H7<%@8|I{{^> z>g0*MJEJ|QeM{=BCyMGSjLJJL!i%~JA4Z~m!Ci%|3Pku;S89QHtVA4@f`nas1P@ct zf=;`Hd(Vn+%r0ScuX7^2dYAC>6)4x(B}}~_!Ve*bJQsKHfx0+xMRgnWf9sL;{r6|y z|LQj)oYfWHza8`bPu7d@+l|co{~Yeb_EX-%Ht?>$^%fqg>x+(f3m>}L;nS_VitOz0 zC4qRkcrecd_u-niaQ<1*J8bk8Hi0)?@yuKJ)fx2CTiEY{Xa;WZ7G8aT1l>L+|3>*{ zcw_md+Mj@$@c(t?n-JUC$~V)>t!*x)AGEm?vxVSd$O)z!mm(}!>V}r3(^#NOr;^g& zzOTD-!X~zP=#^U0 zmS$`EAiBB>NXVA+-B6uTs{?o{k}2vtrdq&=)u1**eYY2YAy?qd)OWvXEbxYIDrkpFQC!(J{!uX2F(zCPA~)Dglt(5%Zy|k?Fu#h&U)5-bR3%{2LTni=OwE3h)Y3 zxA#?7&L7#~kGlhqMQ{Z9Aw!TavIKd4-dO>@#A0D;-U|V~+?Of48W7wLUNn~VnELnR zXpRFHsVsg1u9oVQ#a2rd?)JWx>dC7Jw%D1|p+V(qtfUg651J+#E2%(*{-0}_NV{r1 zD(62qDqKgHU~&3NsBjaczj?Dd9kmeqi-X1C;#hI2c&Ydcu|;IZc7f5@Rv^XQj>=;O zrY@@95WPpsC1zW@kS|peWRx=x^06C@YzstZDyfT>&Bm%S`cu}UK%&2HdvIn6EzP9` zRq7%Xz-vzy^={gW|8EDtg*gCec2J|rv^UgQ`x`)YG;vilz(HPE`x`(-j(orUjo9eQ z@K+`?lfV`**Mb)F64I^Eg~fI?FpUga9h4qI!saVf%eOW%{4!t6V;dQ;MI+e&M`DB{ zF;)^RP>fVl)NdC~>?7;L-0sQ`T}U+MC=W|QP`%}#kyvjRD7EjUC*wwtLl)H!&c zMQqnW#&y{pc^i|wsCl^BVV|4bG5I1_<3<>{u(7i=6)~ry)OtEz5lWaO@u7TVJsq#$ zbeuH7poS+_`KTUF$M#-uI{I^`Vt!o7jNaN=7l1t;1KGAB+X0~&nV(71Okf)xxirmO z=yJ4`8n$BFifpBZ0Zdzwt<=zmYb&yq8unq^iW*A|YnZkouGG-PG)%H-npA7UB->Tg zn*$S+_OtbXocY}Wv0t4|3E+4%7q=7l7Hh;4#ZObjOT;S>|5KcvwDK)lP1xBn2=cy& zkh?3Rjsb$a4pk;C6)JKL1fEx>CRJ034m%vG34oX9QXDWs*TM*p%nUFucpC!=u1HL%fF<3BGZnqZX)AQsfGT8mGZofVQ1liN9?2aoOn8wPWcecu)*=?9U zos0+<6@SsC)=yvF&u#9z(=}Wk>lSjfbu?s2UiI4RHg2{DP4(tkm^0LSqdO#KxMSo8 zV|SP~zxD6xepA|O1DPuVe8UtBGYG85=;}B-d{za=XaIMNbUA=5P1FqEdX-lwzz*y= z8kbiqz)d4jKR8FH+9CgQ0vr(uV@v*q)LKI`Ey6yBRG~Dpq)fjaZ7tnBHH(ECe}ZWr zc7LDqWKy19jX6&y<=J5CtBIY*wdgTmQ(8Pzmk2yE)NllooC(_WW;3n#Te0-Zftl5POl zNl#kh*)*v(JzdbP$8wPO1SeB^nCa|TdP%nw>^-c&VkjW%ciwm>x~vi@!e*OX6lB7{=}gmUQyA1 zH0ufVLLX*5uQp~qp(%AEH3KhTH3^_|xc&k+@W$T3m z``*_JNh8s0rjdrL5t^Ys9Y!$~LeMs|$C}Rcg(Dh%82M3s(INRuIH8Bh@+)!`HA(PV zF7)y_+M1dE;oQ62al7oK+!7qfoIR)x+JjO*RrLB)K{-nv!VD0uN&C-x5xAP$+e{ol zb4$EKMXU4KbHNk}UGMgJ%s|gwmsGHwgQ*jtf^holq0>J}uzzW=KnJ8d1juPk=$JIS z80ujxbifGG9AeV!=TbD8;i$Gi{Jel^;C2PjSwsb=Q5jOT#qq8AW8{~H$oZK6J%)i9 zi;yLs;wp$@?mz_*gcD_unqENOf%B zVKeDgCpRa)aI?hCX_pKVqdz)*>*ntC;tGs;(L1y5_O1CRJhM4dFMH>6Yk$NZ`Xv9ckzQeZ#eYLJtZ$PorM3LhKm=xb&O_Dm0&-V234r zVGfps1F9V{&~B2-#(TXc!oxHcsP;}0?!j~VqK}w-AxG)mJ z3I@QiV7Z^%J}E%7)DtaJi3j3qNh3weJkioHXhFZ8KrK$1MF|$#Gf0;N2)ATyQ$Zmh z-mWGsFoS{hr z=1lIdsk9@G59b;~o3QOBDb8h3ud|3N*YRcX>?B+B+Ml0*S21XYJtm)UY$xi?6zB-d zhfyza#(uZUZfE7!-6jg2$?IKw44fZ6ErASMDipW&8mOQkL$>#y`A9B8_}>Iw>#Wcf ziUNrL61#R=vCD}mN32V6vbxL4M4P*8Chf-pSR;NVaR6q;FQy#QieF4QB!^#IIpiPu zOBTT1pN|;g8?*>L$p#W_X>9AVHm3N`?g9dLx>-nU~Z(Xt&&oJ0zMEhE}4V0NnZz| zut98BCDfqSv4GY@C&UAv0oP&+U|Q(`-gZQyFc#6q(W`{G5{6HHWm!h8&JyBfLm{}@ z)`(~%I`@8_6GFA5wV@upgXt-+SWKfCV#eHanjNG9I){lF?!@vkSB{ujdD({=U`IYo zHL!^s7NNn`Pbt{&zMqoU+9q-^ylmMA{glYQQRHAWjzJ&vQx;RRWgKjke+4h%d%MNDVBAF+b?rb^-z=oR=E7zcVeexBqC80FMtNjha@d0M-s zN$Ky>1!|V3C4Ikil>Oofyd*(1UN){JiY9T=vc>j-HR1q&3`1CQ?FGj~uK4W=d!Zfw z-{leZp8EWrwl!j0Ya4B2F)rtyVI0NMHj0(nnE_ok+V)>zT!jteFh=`qgA$-#)zXoz zLj@UxM$li$v{yEcNmz?{pQVu-VN3$ofw>Thjyo~p;tX^I8uXaX>N^DCD7Z^h5Z4iU zfy(e(yqkCd)mUU1!Mj7?m3IiTf`Ab_c9L3zecpk_PD(I4c3~yHA;^L`C8F3+2_W5F z0-){}EJvHD`zVd6aY;S(5)=qj7$cftqp1PrTbWlb{doC3Eqp#OtVL+2pHa5 z{&s2u%kW_6Bji9}@{2_1?CdLYhL$vjr7=)f3%r0M1PeG1%0pKu6ZkWZrbR@#nQyT) zje)uvQzO(RGR)u&r0mZVfOO|b{$|NJ68z|SfAQ9z%$wYkie z1G8(xuWwu%Ha}%u8Y|xWAO`ASc{uXMLETOQpzfL# z>O!l8%nDf-h_bE_6N)ek1d|0gF8$VA3tYO8kuE<6p}!I7+-y{uLAvAY0>REWh;jM* z75W{QX1JRlTF0u47aaLm_(w?hYKssbZO}AnbQvRxL8TBv=&4$e4Hc%g5E`$+g z_uo1|krv$=hV}YGhRk?ggwQ9I<|1Z_*^W~%n#}GAjCHOwOY!F?1qK`mgALLHDSz51 z#HB6>t+NDD&d@wLRtB$ceIRvqmMP>QDG#E9yBi5!#wgNcM%a9tX3}7l z=3Vp~`b`Mri=S1E>M^cgGR=@)ap9zpM1g$Z_L;J*$@_2c;_~;6`P`;E*otCf+MW4z- zNi!#=#;>JtF^qr{bd{Q45-{~o>uOf*x>Au!_t4v^`I)CJWJ|@{Qw^2S`*W z_X&LP#t&W3!+xm8K*i4f3THX!+7Sc|gXCy*MT)CHkv5y_X=GOA)6B%1AC&6TTBc5v zuTWd)7msVCIFy+pM6E)MiNMQp58+Jy3rwtrPYvWc7FqeR zCmE_C6|g~CFlj7Ms0>?@p`)h-Ng!y1 z-0j$aecbtW(qk>CV=Z{c+?q@K2<6Vzl6z=@+Y2nhe&_6twXi?tmL>1(WmfeY(7v}% z_|NwD@Ua%~U-D5Gv&iX7Z@`ljWW+#5r9C8R#BRvlS5)&3xRXabc*A~B0Ggcfy@&WS z+rCn?Z0jWQas>6wV8BNpW4?9@BB3{$m;#d;qa5|vG(@20P`t9gW|U@!WTs}JX3JpZ5miypLB;2Ti?$Cfl7830zEty2bLbOg zou)~&dV$hCx?^-XI<6@S63>cWd!eIbS@eYt@%Paze0#jz)0fSeJV@*U<=P9wrAw3- zhI{zJC%@Z0;d2mjE{uqP(x}3SvB<49s%2qBbTZ6s468KH{YaTCnYcI+p0yISD2(u3 zo1*lI^C^tjG!MR1v`q`2bC|j>Nr;kvKSO(s!ySk*gKv2s~5}hrey-9fyY>nKVKbho6rOi^HP|BM#uvhc$6{ zY;+tRml%idj4zD1k0%sHJi~XQ3nQv=tTv8_n^PP~%qff*M9eFUyhUWl_ zwQIlA+Cx)Fs2-GxG3 zQL*k~nQla6jxI#2i^|c(=jpCx8gwfSx;5fhDR0ErWx8F(y8UIkOXAp3LA-E{uB%uF zeQXIt*Eot)#Zi>u^J{!lsz9KVYT_uT+$Xw$wYovHj#sN|l1u9bi*-XZx{tKFDY-ei zsd>62gKl=AE;+YYm!Q>6)99vabu-{QGxK!mdAh|0oi4Xfw?zB-XJxw2jk@)Rjgh=f zPa=8W%2RmX=NfkGGez>gtBvH{(TZbx@b)}O;T?Ep*r7MkoW?uNzjjAe1Wa!uSV z-n~(Ay!+8{ya(5(#PK4s4n0ha<2{;F8^?Prj(x_f5Wv6kEIp1_X~^V{xmkGVS8W{s zd2uBF#o@vfzNsvdZ#G8q6RMs>@~br|{Fma`BO(0P@)Ulp3BLTMHj@9gFp^)Fm2!*! zP7ueh&q?7oT(3>x&)1x_$m96*Ebllz!rfx|II$po8=pul$mNsp@Bp7mEI7{R!NUSR zKe6BLKQkpib4Gq<99%@^XAaKK?3Ob z-;ysY@spK!}az9sJa#LSYsxP^yFDZbFq}zcVywO-LSHgSUlIZrJ@h3(`Vv1q{2qNt z3w?=HUt*^(A)@ppGuKonWIs#DzMqgi;$}j2X+rkJgzN&iIG&JwAR#+9A$uEKY)Z&p zn~=RSA$u`g%uUEnPRO2~kR1ybV-vC?60!#+WQV{-kA&=?glxZrY!A3-k&rD-$hJ$! zCK9qE>qvMz<yB~LfqJ_R(sxP= zX1*^okGLr_m&(i+W#$67I4(0EkePF3=527XNoHOvGq04H7sJI|nK@Zzo-Q-T!o^sb zIYMS0Br}J=MGu)dNM`nvnLXg5h0H9KneAj|LS~Mv!|;C0&-CW|diXthbE)2ZQEx7Q zi{pCp0lhg_Z{7wMoAlUI z8Cnb%b7d%5hNjCL6$8;(T@0}2%t~-bNR)&YdpZpl| zq6jiKao>jvQDPoc8l;R1PyZ2poCkkTMY}|~WI@c*-0#EJ_$oi^uiVgCvGLh8w7sV? z_YTTKT@C0U{8g0`OC|Z1w3v%%GP;CRY0-R}|;a_u1j{ zz#i=f9CeSPqLpZj@{0RTV!V=GDphvJW0d#`ntJ1OU*)geydG3Gtjkf0)aqrotu@^0 z^Mc+Ra?}+tFEAo1-?`z&1s85^tUT%+%#BU+$#Yrm+3l#yo3=l+1Fq)ke%l9mxo_|| z?Xtu3qRTVSM=l3EN{%UxD~jExdGOi=>rh&;qmr5seizO3?2rYdX?eEW&uEv+fXxw6 z7^zPcxE%7ip?y1s9oCxL)^bwuH1R1Tnw`AqwCaya7K!1TWSOS-xx~ zJ>1n}&2i@=T`IK9EZALM>W`unM>-?V^8P(M@ffly)K@Lpf~LE7jojLo-zj`+-`?XF z;cX#tk$p$)={s%g-1bz!3dK#V7oa6O75{SIO_53Ky*|I=g}*~ws_|Sn@YQ~ohL2CO z)Op|bj#Z<{VV}X@@bNeqX1SpHb-elWZl2`SRrk=!mP(HfWXKA|fGp*F)xT6*divyb z*1AG?|J~>&@YgBGPKA8Kdx`4Y->8tCrj;f@qt--dCTZqqmTSd!;(NWYg1JUSg^!4agiFMI8Gq%rCBnBmJ>6frcGAeOe;?^F*yw2af8|}X)riEHP zY*+g$)oO2b_M}!N-PTODQ+H{4Auhi-@m}J~M4lG8X??XlwL`Vh+6@CXIVN~sSh#JK zR-eo(>OW;WKUT{_mXF)0TVD(kw^6G#`gM*=zFc3|PjX@>@;tlKK8yTveaDD}+fd7c z3$_o8Xk~~QzHnRELGL5s%eD_a9=1Pg!u_q`emh6w>hGe@WtC;ga^7XxPu#g#>57>MJiOoS(-zlrp61l$ zpeA{(^OSiZc~NZ^0EGTU8DKqm%h~^j8^;>rhc`iKH z!*kcQ0iNi`>z#(jl-68{zA`Z4wJ~NmiYaw}fS*je;{9xO^ycXO(dcW#QG>;B+h7;F z>?f+&wb-ZMjF*nvuxL_C{-~V6#hr3gyPfVHNTyX^Zn)@#PE0LwJC%5-_#92a^v-=rUv9w8>#tqktK%V0@!_5x>v>3I zXj?U1p&^Em10x=Z;T35JiIZ6{nsjY3$TZG0%Y-saYfZnH4x8*^=UDEV%%+w75(M4z zDgWx(-z7WpN;383Z2ixlFC&+~4)?5TP%V4K z`8mSe!O%t7MOhyb?Dc$mm=`~YgufUgR*2mq!@WvLYI)7`t^Aa>`Vg#$px$`=!0QS= zt{9DSBsQSCDB5NDz6*O2igG}CQhzbrt8cfBh7Id4JxXpk(_DS&c7WretJ8Y)P$3vt zKl&?Wzps?auavEFee(scrTjKZAIDb#&6;?0mo0x;p;}(!;@PDtOn_#09=>diy4ir8 zNf(&ES}}LVFFVcA)jWb;q*h2etJO?V(hn2zz>j%mczxV3y6?ZJY(GLv2$njCdR}@c6Cga|9>ubQ&7AiwYU>e7mMUD)NjPQA*Ao zc@KAp*cPdbM6ZeM(GHFsB7Tb8H>yYE)v-Tym+R2sCHq$&BoRJ8L7pUEEWaTCT5kGo z^suKt%8hd3U6>n41UwOX(`WW~qPAwIz=^S)!cJzq)~|I_tCwrfC0SXnq+Nv35{G$7vs-s~6FeuW=UILmH*?WM{!fYHFCWdQX)&jLew$Qv z@{Im_q-nXC;}l5;GvQA>?78H;O09y#nFuL@`)-)H?{)^vQM+w)9Rp7}QH zb_RZxX%|r!iXtU*RtgvG-`J`X&TXUei|La%Sed(YTF!UNwk+$uCTHL@y(+KkY{yp_ z%8Z(mOVgJv)8AJ;-*|Az(XQPc^6YoR;0ATJI#-?Tug-3!&Zh3i4j8a(c9YO4nSxna zL+W>A)YJ%Drj<#P52)0aa$BZ-BTX(izH|4Pod+Hto-Tg?DIPYE1y;AQ%|q?@k{DL_5jqxPII=E zW=Q?n;Qs5b5ARb}DVC|#C#7lH*Or63GWcui-x_q9^_p)q$2FHV=&r`BA)=k5`w8>* zM^I%2RlLuQPYO%Qd$rDLDLi5fd#P!V)Wd#GSpzCK|69bJ7j%5X@SE9cIr{&Id)vZ_bl7TCbIl4wIifD)Rj55h^8jKJt$k zS{{Km6kFWwsu%Hg7eDsMe{{U~^4WmRL^LxF$uiK<*s2rn^`Q0P!Tmm3WBB=E=>? z>VoX3y_5O7pig13dk6QXbCwS@ga!`mho-&iDSag+T*G5Zk;kXWucY`D6gqfp#mHl~_JsDwPh9S&x^B6zeKq&F$RSIck@>hS%nQ)^S_8#MpUlrwM9f$782Vy^>rz zBmW2T&LdKMI@dlhc3xlnO|iN+t)cy*ZYVlMl?U-A(P$36oZdw5r8kTBi|^O?bU|U7 z-r^aWz^=H8@G`BSUHME8ut16OM<}45I+rDpFa`FI+*eA+OPQ+9Px(xU@ zJn2^8^FTV#zTk24F=^7m?DFf=zaRVU$l83bhi*Zpz;3Q_#y+Y-7)TuN|G**sinH6K zOw~HoE)_bax}*}A3&U@o{V5hw+#2Mh@zQkF_(u1PZq9d|+*yl?G-I^iYZho7qboIi zwdb^30<{&|{?VhN?>IQV5DiuJAFAj#Z5D%a)c)v#2*>?~0>jmlhQ&=z-T;R#Dc`TUmBz#%zbML=kkS;L84^X)a^=#)D0thC36UXH*?> z`sR$tnUeEK&Z-=w&&kUsjH*c44Nr!`zm2++_=MW%D48mW5j@^?VQZdVhZZ{QfxJI5+>$8*m=i{ko6q zqLNU-JAtqp4I?$8CrP#QFp}d;!`7%c)LRnicX2dqAG7a@0~J227KcQ zA^j`kN8-5qj!YLCcKWTUXpw7hFPQDogcyH{S*6U$2|MLerE{c!E_IapNJFGF)DHDU zTNYEdk{{J1(w<6#wKY_3$*aaSv@*3JIo8ySU`OJ$8F#VG6wDn(Mi8_*ThAf8t;%dw z$94UQ*$9~r{fZ)E{J)wlhJNW&G4zYGA*eBD+5pctiL~Xm2_~Gz70k=m5@{gJ)??9W zlif=f7@nl1$+B!=ycGs{$4VNkR3Ej?!aqaaBhS%t5?KNLVB9rglROl{N0EM0ZkOG{ z48I(GRqY0?2)1h24!ymU0l!j(eW#gmunuK=*F&covK_4d!r6>_zuCE->1BCI4IeLiPs$$!AlzYnf`aC0mtpbSaGGrdWAhk5vSxv;cT~wak z=y&L$E3ZX?H5%*r}LE_~=7UbmF7QP0<}Cqf6NZ8{X8gE(yRGg|1B z=jjEm^y329PPO*_uNOCP(%6da3k)*ZYmXHmiJNd&Gn3|F($zC@7FQFej@{ zzE8^gjb&Et7`g*z>8bJqd&ouBK)x3=pqG@P0 zT8x4(%mu8MBnMR*%Z{~Cyz@M;NIW9GNQ#+qU(6OaikFKUhQ;qmJy@Pf>sHt*m#1`B ze;Q@jWf=t@=!av^n(>BD4AfC^&-9w%e(f4Bq=EQ*-$#QS^y_4os1Kn~vI{NM!<0G# zK~H4)awe3g*IzWXpi!qt{&THP`plNE+gsxuE#E=kV(BJ8VH0Zq9SG+Cq zPMFww%TC?=q6BbvE&C`TO^pDa@8ld5h ztZkA1WXFAl*DOQ;kHnm*7l`CfK(A%kdKW_>yzs&G)|Ee7?pBlnZ z0e&$7Y;FL1jUX&JHE&Qg<&umXd24}lK+x2%kWkr7QCK+TF7K4~P>;CFGh6@u+aE(C z2Ob-i$duWKCOy;nUy7Uc=6_+&5G-&}@)B?x1z?6eiWZ$px1mS$hc(3Xsvj5a?emor zFNq$BLI?JhMB+2&_8l8)nE0WY{gyd%vH{W+=Clfw-BgY@u9K?Hvi6nxbg25uzqNa+xS<&3R%P!-5`iWmhPZR^XyUH8!$k4Jj>Ztf&%))mZN~6~c_UHX>N+?nDy%EOgZn@VcQ+KG zY3#$Q5G6tF;YJWfSuR~C<-S^uQ!dck`-V8{N?k>=zDRXe*x_mX0MJ^gKC>IUPHTGX zG@3UyrJ=iWY|3d;RKOW~1l;_ys+APq<`NRb3&sb(nH`QCL{1@UC+{N_2xvq)kzqt# zF-tKYTdB860qs#FD_$kNqrOkTIT14zAYU;p>2%G2u$;9mULPPgVH8AJpUwK|2-srEqJP=Pg`B(ld5KsLpZw{Od5i$tbfyCQ^ zxV%6`5aD)tAg(-+@GKDbERf*c9EfWU{2DvW_Mzt1;AdNewTAZ}n2+Oqq6n5xP~lEo zHdsCAa>54}GU135E)Mpc^NN2v)XOL?h7uP;jf;t2x&XvSura$$CjVLF1{$aj&(^8V znkC_8%&z1bzT(cwW?!uh26MNnZePS%d@nelwbEyQcjaZD{e{Lju;n5@kL#PEYKtds z&78A>wB1*=zw4&Om6nP1hp+`D?%2GZF~8`PUFr2>{@-_{mx(p?!ZWdkB+@Y3J0Q4D zh?)3a9`zghO8fCPp71%IxZRuB@HQU*{P;nyyy7$=RKaOg8>TdF*hs9_wt_g)nafdDPiUh@o7pXC4Y|3(K?D= z8|AC5ECn57D@Y zBsM+^7!MYvt5q!#uNH3=^TbERAYGgzE)my@KZtRXXHsnmWFpC*!+5YtvRU%g*eFT@ z5+r9OHzf}xFD0KPy%Ic}toP^{*CUx?4LierFm&{$r&%N%4`X#6{+Rd+|CRRk8T=mZ zfsM~+3k#3XnrEyYlMw%-vm424ypueO5$)7{kY&S<1BVUavEF=Jl zMnEER4!MOqLS7*VqW5SPpX!mkH9)zB^57}zj?POcdj%;{5wG}g?A2EqoTC6Gih70d z*{uN!(<^lb6hsvK-$qIf8acU;5)&XntHLwjS!@U6_IsRFUEO&bc{_QB zc_N<0HEtQ>2G{sbAgv|vxsxs4q$RM`32)jGD0gzko3#Y~azX;1I1y`{ZsDFgP4OYL zI^kNK2v%|@oZN}<%L(_(i6ZE<7C0ZaWW??ACalK!1_+`L(k{lBT#PZj7~^GjQE*rA zB!*VUH~9jHrV_4Mqo7kTEMPKc#X-9^&O5qmBaPC^b1~}>AiG(bP#O{vtsvrrZJDr3}iwv%wx>+Ox^NUC@{=qHxCGTX}r*q z`@9Msw)2%Y90DqzkOanp;U}J{wYtVxJ^~OT*ef_LxFonIfCX;^9Re^Um@Se^=80B_ zbUt~e28mQ+MP8{UCq-99d7>&&vq;!28Wm}X4aI#QRRE?@o=|HIT^IOOWD z9`S^@>DS!KTHT2%@P7o|K5S>|WyyUBsE{;DMkO$!4$p!W<8v$3A=n#USZNv#AB0cA zVi-JttKk;-3;Y{?J@ps%S8!(kzNN;~!=wkKC#B%3bU5UoQN8qoG|xz-uT~d)=+{Ij zh&AGj_#vUlegyo7TtOsA3v!v%g^VCC7XX#MISRUBYTu6yEJc7KS|LnSoKxIVJW{+; zAc{q4=2j0Ggl%#78VABJ_7Xq2!4QG+`;&IB^})y6P%IFKLE}fC=(|fk{QSeUm=v zE|eNfy>7~9#j&zjh0atcvWZ*?c}D)F5r3f{w8wU9Bh-I1vKR+p29rUCf#v;*3HzC5 zssy@&tMg2=iP^0%nQvI@1Y$8T%@HcWG|z?*%XCVzG5E#)OS^6R$3*o8L*_O(g4(l>`9pR1+em(Jw{tyoNAA#-$VFY^I8b`br z^pHg2r8$j`Ot6jVZgZ;pj;{XCg?i!xkjt@M8$cbm&&UJJ)oCW<+bG|S@RZR3r)kET z?$-9S)J@hDx;5RIifa7>GE8ho9G4zNPoSTr-=sgJzoZMXZ?wgCXu?z{P=g7KHO4M$ z53?s#0>ec*kejuAvJ1nD$$%IueeB#r0&UqLf!6qqOL2tIMK`Q<0&fIq2bJ60yJ6RwP`~t^M+*n#UqAVNd{D9CkR7SV+bnbR>}R>jOxaR)Ri$^&4kuiZr=u% z7-*}Jm=vU&_@7T6QT+|4gA-`2>Tqm`(`!+~mraO|DwuqZGbRRFGpb*<3eu`k0za7CFlBX{6!Pqm_5HpXd|{ z^K{a3roOObH&e!0qZAF31KMVHo$Z0`@SCg4=^>oGoa3BJoO>Jqa}J44i|&hhEh;i6 zOuy!njd_O5g^N{-?>XD67WpvMLl~+>d|Tr*yP&H0WkFJK-TrI-x#}+kP~P1axY zsnyljpY|2hKS!CCI!@SguarmV0*Y8$f}Jw4q$iBq;w(We>n#i07tLytjFC9TTRu-t zhZA9l5n8&AqXFV~tW-S|y`yXon`A>K5p5^U-=!ed)^7)jN6gC9}Qer5_ zD4K!K82a1`lol*(0%ujI(8A?W7;tfF#VYa zBgxa(37DzO!ov&dnID*A*yhLU?HCDwaR5d}W-}n@6V9kUXvR$7saVVUzvnN7l0{KL zSalTq0q*OBtf;RPDmqsOl9h(67?ziYSk6^{?%SVyNV2U*!41@ecHW;__ zr9BnCiIa-jMFS@&nK<0Oy<Bx48Q!Q&XS zimAXYHBEUZoAP{J&#HoNc89%-thF93UbSl%%h~~iw}B$-`KL~DCaG0gRqc{I_WmrN zYh}VdW0U)Uo=@V2id&~8pVe4j7Vxygq+56^WpTH8w|Pg6cvD~MMobH+iy08r&W>K( z^+yg>l(0a(%Xn1_OIe|9DkCIEBp^kSB`K6BwXg5lqPqJCaDf|?~@*K$`0ls2eStB-f zWthYz&7$NfMynLfitaCtz#UkxACeJ4VV}xhp>-0uo|qJT>ObPZqNVyp?-WYD+?@Jj z=m7dpEb25PUw{56Wk~mGU46)~!NA{WVTb;IK0W#ue1`PD*RP`*+FYjEWYU6Yc-u@G zkLHKxPzgaaTo8@GqebF)v}u3!1`W2H;=_0-Jop6wdew=2##XPcjLKhqYYq-M_3^9D*v${J9|Z5gTc3?(Hc zweC9}sCaLy4PMz6jnp%6?Y2+(rGsT4SExA+F41I0G}+KKg{T&<7h%mft@}FlWZEr$5}94k?c;&)uce2M2O@Y+Bdc(mJOf8C7mr&2Zq2eQq10187*WZTNj`RfLZnZpr&unOg*efD=iBpX z8=~;n9Qd@Lr~}wb+=eKEQ&1ExC~6W?SlUZXk2^@|?N)XQI*v)Uv(wnZcc84aw`Mxq zY~ZhUz}ejj+{BDv9$_loqJ>O++XlNg%<7|GR@MmrVizE>j9IoAnZJ{@N_>!YiUq{1 z2drvV3+oHZm@}0#hXd#wM~;tg5P$1>kN61A5e`VnAMlJcJ!CHq$W(5hyEAb z+C_DUMu%LY)rrhrf~dVL&!x1#WI)vulnnT2;!67~_7gU$RSpO=IuAdoe2>}W zmlY8btD`e(YKwjjFTK+Gph09W#>5#J1^ySZiF4nku6F0gK8&uDMHo7alFlrC{4d0t>ay6>v z_&G%5g&PU{^{eo%-o-vHJ{&wK;q1Y=ddq#PHmvjcx@i{^D1pIsW)br#^BwaCbDWt) zTD{DO#b7zDX{#-wjL~EG>!F8AiTp+v9&!xTi0&W#s->FhG^OG^>o%*L^_nGPfqs?> z$ADwOIr;1n_hL;)6hefGKm2?xGlg`a>G;@9Zu(K12V;$@RmNk_atK<-R^dCMeBanQpa$nB%Q}iiG%rAwuZKGcbf292Bp4<8zSD#(ubBBKZAKA1kwF{&=enD{ySr;tCZM20CK6QlyA z0SIf_@Kf>$B-l9L6PJaqFG(|xXu3pI(Kbqi+k9!NB*Q(lntQ|FJs*P(;x@2gxhD}J4 zdpF`%-Obwvf^p0W5acEELt;`mcShtkW>|VEWvx-)}E?}P_sF>4QWdA~c|?)|P)ibZfQH0NCa+~2Y_R=;I4e#=x&RowhY z)#d()s+e{|eIC^ggm<2*kZ9ZeuFrmeonmHwZvC~j4IhowT!)vx@jLS{%kmI;(TKg_0q!$=iYz)UL~})FAcXD z=heT&Y}<(SEGY9{CJ#M|rlW%ayKWEN2f?n7&{rseUN=wnxo4(M`hTPC?6%#@JfFSW z2E>uhka9_-r01k^%4^DE3TR<&q5NigQ0B0*DMu(BOkoI1$~?}(x_hMtVda!*NMA^Y z=-%{FF0?y^m=%?#^1$V+^pPX6Gc0fHp6knNlVZSX{NBKsg%(Y9&&<1Ohox6G2*Moo!irk>d!s)TF|S46|#gdzZpfvhr;8pPa8I3i}?& zwL3E}1Uxh6etodzKzr5J`#;?F9%;{Hgr9C_gjaD!+hcyqpxeJ?^NFL$+QWL9mf>jV zZVlIc*ixv(;2kNBVe|v^ll1%`Uv#n$z;swaxSi4?X8xuYFe+g4rn)znm}QbUc71*# ze&M@sWTvvsal_i29oC?me?I$X++n7Od5u}XtYv}{Rz1ts&Hk9Lcmr#n*qH?`i^Z({ ztUz(6c%4{X(!?6qk_X2E+1>1vWXIg|Wqo6X%QzkrU@orCC!c0u90bLB=jAu~;=l z|4sA(YRKe7pRI)i;fbhtg3nWf8ewpuf1!}49ObjJ5@Ve5^a-2?s^=fzLi2+2t``c$ zq6eZkqHwjQ%snc9^NHv`pXPyto_!3fT)c+*8H{^TfC)n#QVDi~AsF9k1d&P}_zUJ^ zWndPB>lvsa7wI(JTUxWQX;VD`nv%b!CN7WAcjh5MUdUVZs# zuS#{*^B=qPQk7c%7fj4wn#q5IsrhC&&yX{|A+~35%ft&L70mm8`wtWw!!N}fKK%z` z*^#+~6`xQ*=hvr+ zA2)t&36$c0x2D9Oz1cNkIGX2jvnouEzvX(fDn^bEmJ!0_xD#P=LW~?2BcC|v7nHCJ zl+8SYq5IVVm~DGQj!Q%4h5*->o$HNCrBK4kU9=qCo38CJqE_WLqy-}?|{zj3LO6^g!$%)>}3A^$kTSkO9y*P+dZM-HYoUpjOls0<;1> zIVIr^-zn(!DxPhMEpna$I(z(pd#?Z#6JG`no}T^?H#m2!WK zdk`g!Pr1O$%oBvAG-SreT5~rJsBzKJyVP;q9%7A|+x_=$U(1o#h?m)eZ!MTYOUFWS7dipJ24+u64GE zq{LG)=KPmyw5HVPP7sh%s@=XD)k725rL(XeBL5F9Eu6obj-e$hcMq_tS<)>Ty=$Rf zgiJ!=1r^Z$b2XoLR~fjv{P7g$NG~`Dj)jw8Z~?vpKZd1nJ3LU7!S78FK919nUXC%T z$rUcB(0TA;ysK^hKgqUI``uojn*PKk9Uo#RW*0AL;IDA>0$@=(4*mxntkVc!k$6?w zsmjN35$WaeSyj8lpbWb?pT6&0UHsLH*YDQEjau@{g_e8_IwSzi!9Oo`@KcdF2px$< zDtwUHnVm=WBN%D^!2`5=o)z2_j7l!}Bvf)SvZ*1ch}S>Anue_UkM& z5Lt+piq?p>iTENACpsg_6%FT~%dAL%^IwW4K8ti9j9csI`@2u&!_6N980|z5t9`iP zQ!`k!q~lW#zZ$64`gP2&J5>qi`&K_G$f^Q<(lYEuSj~O5{FI zWs;!A?)w%&l2}R7z13M%75_lVwan0}!l8%y=Wp+?yvtP$>>=8HxHm_9eXwA%m^OGYRDiZd| ziF(`qXP7IiL~=319AiB@x7jzXv*K4(k5qj^N`AjwhRZ0K`38QAD1iIhzX}+kpw{DS z-}DH+C}iR2!Qa!-3#jf}rD5(SyXGeQB-lSNha4@_!bwWf|1%ENg=l{fNAhCazF z8!ff^8;ws-ct;we*ct5#wTwW_^e_55@^Q>}M+$D3}T_MUdj55X@#& zB+#7xe@rc?M4QkR!#f;~vjWh2thFe3!@7mZjptZ1Iq|F&oKNVW0>x=+*?B0r^C2g5 z)#VJ54Thsg7;#?dIR)5!^V3|EXg!0m4&%U?5c7fVFLbia#fU?}Yo&3^!9pI3hXHur z(z*8-^H-~Hh

G8Zu7U9}T!d9OkST z-X3~PFpYCt0CsP$6|ClL-83vXFPJ4N7sytM{`t?}Ng*RV#~DPvNmvSk)1TW0Lk%3|2l+|NJU!2R&^al@(%FujJG zV_v-~W1J9`lbwD(7kE|9%c{6;b$xqPrQ|U78uVO$dBg5{|Lt4SN77ePL<(XBp(1@` zZlm|raRH_pfA~IyIEB97gWG^vrL)x2RA%A$r1vUBDD2rpNYUYyV(FKGc?kBl!boMq zOlT?uMeF-V>pNCU8$7FV^^KĐu++r_ox1jky7>~zoCnG}op7AL2ks``d%DXwEA$r)ZIXc_GT;|{6Q)jPE zZOv<|Pcm++U-+p$#4B)QIQzsf!<) zKC3c+w9zqQdU)vW84Rx(JY@qpvGnrfTHRR`H3+KMxpMkI95ZDHlmTwpY7LDOrVrIJ ze~G(zBRpUrvB-QTGjoylFAyko9}pzi3SWo!i@vx`A9f&N)2}y?Mp#EkEYSjv3#pF8 zAT@j^#fvgTH%?7!A9aa#jCslV%<1Lec{3Q^^@`CCil2&2P0G}{3rfSNqv_LBD~O6dP-O8NH8^4pouOTRxmTIn4L^JiW}v|DV^|{|Jy({7)s(gt$`{I}ri-t(19 z(6i`;bc;+-1sTWGd$-ZQ)5qvqOez!TuuNGUd(OkRn5%hP!`hhO0B?-h%7l1Ty!pIt z9)qRl#Jct0)DQmapC$=eX_SO)O7Toz6|sTXLcFP|1DTW_>??{kx!&_kF<@r|Qa4}j z#~f%OFA~IO#W%$d#V^I5#X=6iOY%A9S&#S&vpeFJO4dl;;-EDPye-jv2Og8QVVW3_NB|?8?*L{zhO7o=?UjRPyFqR|M#p>c{&2& zQ8>MnoP3k_2z~`4Fv#(%hVT`FckA$-0`M1-|Bk{A?4?)6)V-$m8cs%xzKv}U9nJ1B zNyZ*tk`m^xk}Vc_infTrZjn&*&oS~$R5yG(v!QXYF~46l)UMI#OAN$DzhEG}`$n=0 zJZXr7x^MIlhpbXfmS%j(iMdX$-DZNft|u7R#iTXnhgQESIFSazq}Ng#^V6%NpMEH~ z@cfk+AmTnTL86cON|s1gXZ^mvI6x9DNxb6$)+_nWmtR;~O|3g{M-3_#8=_iC)$LdY zqY%uPXlkpJ#wxNDpuV?J%{<&z?rXGq6@0mT!2_~7Pv~0SufIn*o>s`_qyF0-&Dwk49 znTms!2A(rYaSC+~WQKudXEw%u@No*6X0kK(N>J(^5SwZmRTga$eIo6l;2QQCbVb+h zT@d}_z)^ZSJ%_%70}gSjIGLQ)S*v#|?a)h@$5u1Jrg095XUyZqXO2C=4`(W=VNa>*jT!bNxlsEr}evX}(@~!|*zIe_KmL71@Yf zMC(PDMF&I`OBO^fKusN?sG$A63Sp|wc)~VV?S6vMuD09tj%W7{i2o~=V zCyOtN?~0#@8^m(4a8P{Y`}@4po%lwY#7=_S3T=*j(WPVb%HnmovSG>5newE== zQyRE$cd(k*S{#XQJlBM4dJzTABXaDfy6O7csZI6os~dy>)`3l72iOBX4M)HeTnlL` zRwIhwr!d&UVUGTUu^7Pet60taJ$~pBz)ba+cs)g>R(;06pwsKOOiX~2g5%Ol(tA=^ z`bOFzJu$0ZmU&UHuRp`X`s^i#xcj(i+U7eXha{D&2!^T_w7z~2Na!7S5fwy|NA~rf zChS%Ne+JHItl=0aEEG!>YZL+!1l2Q(^n$psZW(iT2u|oSQ0`=r;ih{}|3Y-JK6S?cte=Ng zp>Eo$?+lvJ6!n{-8X~cnYZz`Ur)KtgbAmA}!>M*D!veWHs$ZhyeJXub{o}gJa zRNT`Ml6KK_&_Z7^y^mf*!M^7!oV8!ft#D<2p@%b@=%<)!nAG)ewMIANWH;ln@6Yv0 z1}(o!^T<#s-z7Q*gx{0>DQ;graaXB$L@_5_6P0TiCuzRxjory=wr&%a+%v19T&;hz zw>?*URQ&2`o9GfKvFSDT!r5vl^esevYWRSRd%Bw9?d{+j8G#3p}Bl2 z-73;)oj1`2W68b@=#n7IG-oIK*;8IduJc~&qq@$U3VQ`OKIMe_)NjPeBYQc}T#}#K z#i)CJ>}lhYgess_M#R|a8d58%j$X=yrcsQvAFRX5FlECW&WF6?s-aGYjXATU_|Aim zRR0j3Gv=@f+XNh*~r3tlo8qJzeX>hpW(gdfqJH`12cCUynz`9J2P`(AZG4oM!>&d ze^^J_#Oz}J8Cjus*n`D);zTpU!nenS1W#vKdbrs;MV2pHS5xb|YR9=VdCl(5edE%x zK!&YR<3JP4&~KgkNENvTGBi%>xYx-7{?*~d)#GCeb0(DotP-q{up|KzOYmRIK+u^M za8hzrk|(K>G)rU?>ly|JfuCFzo&j6I%i(n}B=wepa=2U}gJp`BunKA+#Y@3+#Tv9& z!AG}9cS}cBT)hA;SKN@6Nnc1mNflBJL>EyvLlz;c8Uw>90mwa~Rw&)m z7ZrCElO||e2Q!g9x`58K7$X92`VrLscO2c6o=YcVwd$)<#{9d4blAhypMGww>)P?* z`G;219T^#Z(KfZq+;EN!{>~;@94IJ=70XIm)ALU2{%7wf>^x4$f-LmDnU;FUZ1tXd zV6bU2x(|P1DOflT(B+tM7IC&vc2iDMdTypN#{OiN{V$EqRIW(|_|ff`thYSVHG(jw zyi9FoL&!wC>i<0Q)W>Wy%CMVlkkw3r`g#a5CZt$H#(NPUTX}-s&+}9{9Gu1=oMqlzNm#Kjh8x)7Raz2< zWs8dAt1fb>A5Y~3-);Eo5Sm1}^#YShRdGty87O7v4XkjMQg#-z6gkul+&|fZsAnEa zL-8;0srV5rSgysUVmYOq_@fuOWf>t}x2AaEOfH3L`xeGJ1U-(0bn9ZlXwa1qPj5k# zUi^`0uD8Aj?DY~vLGje21OS5Gx+FME&6*@)4wO3fOyag2Cl9Ib%d-6lMHp8L+F z-9uCEEb#y#Ija6|5<|FLVsP*i(qo6R#Cd22#_a^zVm-&7LplzbbNbYCTZsl*rLE5$ zz1188a5Vk+3_wmlnGv{0+37e^#@`;*5td~XI=Q9%$zGB5aQ4j9ggZd`R_`-nkUW&6 zR#lSZ5i*>V{Tn3T47>Ly<4xDVai|h2ZtmEGg!{Jz5)+2M3B%9DguyUj7}6PPf|}{r zq4Q;Mp;ub?DL4Jn;GvM9(0~vSi4Ll3@smBk_8d|Psh)H?d;||cvPh+cj{v!xy?UkK z-i7Iu6UF3oaHdG>`jw(lLEobi}q5$1JQ^`mB}~1Qd}-Q zLzhW`6{>=Kq;t{d(lto2l#lfO69{xlop*=qbBtNfB&kKMJc~Ss zPYd3!BCf^)Y2`6Tj>!IvA^5}?f3&|#3G;Q1AElE0&JU5(uMKHkulh{@`NN*xLH(lx zfdgFc-{@X15Y%rwF%igk+O2KwE|PMN9Vek7%lCc+T%joQ?MrwhjEp&!C)XJb1FB? zoFfT8VZ7}nMzB#kX@KOuE4{Q;#F9=R;HN`zF--3@^i09`SiK{%t!`^W8mDY_e}w*KfUT}t*N^#? zI^SLY&6w%k>;qQ%Owd|5`qoTu5G32+;R9560IqT=)E;Is^CDBmbb7*^2w`~}S*ovVL(rmFt?N+iD2(R-L+L`P6=!K? z9~a6VjS7~6Jjs#WS0n1h&GCJ#Sf8}$mdTp zZ9GudeL*37Y&|==o4O|?D25kB1_~X8slq|Nv!ACTFc3_$IMfzo2_R6j^GbnIfQcfU`u7VjuCW)+@^U*U;e9nJ@U_k2CgD`NEOnI zbR#wvMZJ*e*H3sIMR`BbstX%>k#1wj8??)$jSbD#Wnfefb!>2Rr;h%af!X??(8pAN zJ;Br9oAD=nld^sPVPuj(F|-c87!1%4_}g*Iw}+M@^2jp!>IvWk{cnpIo7 z`Q1jcuRtByfg#5Or zl4la|jI^9BqB{AWwV9BRVHynVU=rPr?kRnI?6dhevkeButQy#rMV0=6r(&gKgxTNy`t4Hx@uR_E?b*SX}+{Z+L6Z7NHJF_@8toV>VaEywU$pkEv^mUUM}XFVb01_ zk5P+E3bfL$w9}GlJ8X#^^Ii?Vam=8brGC3jD*g65crZ6H!G8I3za`5fY<~F-L>*-R zjVX-^%vrYA7@HeWW%n8X+#&gs`v>>q*>@a0ZafYXgiXdcx@=dWlP5iP(BJIXQOMI` z`)jdXwAhUAT5Q8vY&GE-?4ZZ;Gz*V;Kb`a3k7-{$P}}#G2O^z()nCu>06F~PUcy84 zQ_h;XU>mi+p)c9!mO(evmPg|Kbq}3mQ9fwc%%{Hiy-P}q2nz-AfKGu6CTbDpN z$I}LP;yluC$KRH(5?|836Bm=t_dQn_f8gR%Y;1)5BbjI=o6+AxnV|e)%2;-ED59_N zNGxj?J?F2mc8c_OrAGw61U)DCfcB;(I-yF_q#ib)XOdmvn`3n7e$2i2_J`(Fb$tEx z@gIV50ZC*mQbu~g2GPF*{lt<3nW~*x`KAv=rV8Abq>9|NtGg<4z*Mn&W<}1vj&DV? z3rKa?Kbn=lsQOyLZTVv9CGD*Iplaa!^iDze^Pr07l#i4eajRJUt9YSgnq=ac#9HDk z$r-PVIw(0M5lcQ-e?6vxrz_`gJYgqy9nNaTb<6J$`u&w?!W38;G6H^ZD7+v34{pQz zHpo;C$@3n-FXJBA$>I!kz9jvaJ#^rCrU}#v|A8GEz{4(YU7ZV-FAvGJ2M%^5=l~t` zlJ+6_ih(&Ji5<>=u86T*hte(DES-gnN?mE!KbIJeC`*pH~JSgk-4ni$v31Avv>XiktsFSQAfUkV=<}= zz;c|bizDggq0-`^Q>sntyABcC?fT5-n7m_~n_$k)KjNu+_m#8hqd_FK*;WI`qGA%T zpRs;lP@{rt0(?wdzObmNxKNX8GWSj(?7g`hTM%`j%I@}6-j&`$w3Z9zn17_3&c*Fl zVV3{KX7=n&jI{6-n%dLN`EUO$s81MTFI@00$(pqM81t^}h3_-i7s`7tc(Act@reSe ziXYzN4{k&2dtEi(cFO*b*{1e~P7`^#PWLXHQG*z{PPgKSWoZts7p`cs<}Qu1+-}-) zJE#$ku{spgh$LGXSsCE-E*pchfw%(d$suF^j8Pi1mh0$7UgA>AeZy(?o4*8Frm~FT z0V?+-2ttto!~406R2P~8JA!*2bu}nPbZXe7cl#oJQ29;q)D{GML4G4s70QT?qryiK zqNvy_r?F#$Jp=z!RKqw(pY_ZGX^dBtJ>0!~~n>i?{GvjN9vj zA7tLb(S&O@G$+I!tIk}E8rndU%{}u?7-nA=iu80%$=ik8_@hA2MoUL(hMU18=BE>Nx!E;L7qYOI?J zsF`I>7eLP97Q3&%`44qx{9WvbMqu&?+%#<_IcAa_FNLi>|Ypd6~%xJ%#-q8bol+ami53uEr6dSL7w?E|_$T8Yq zV&D>=QPlj0bvD*jHylR|V3nei;|7)!Cr-Co?2KzFt@@15MioYMjmCJDT z#3vG65{bS|+SIL0E9q<#+`bL;lW%q{Jk@X%yD}_5^oxzg`E-+uLUFsJZ>z2XY<@d! z$uh-p@g?y(<`(w$RuHk+_v3w=?H?~LD^V1Et78h=?7!!AIA}NZGgVlLF*1$QM8RCw z>kQWf!b)iS0C0yA2y9kT>&|tj8U)w{(y<@P3{iNbzoOl7->@rH;a*iMoyIZpI%vWf zwC7lTwAkRMWarT3MhlhUvE64j=7r`}w57>kJiVdP2u^S=bMA90IE|c6&M-%v2WDaN z#>()GU~TYG9c6~`5)NV?)k+Fsi&gI-lZnU6>Ns$3b|Bz$7NmmDdN}l-{0~jwKag<< zrBA0K@R|M}f|v+C1Rm94myY-z10-91+wAvIGc~dsFL~;Ju(nFd+bkHeo4>ZTRVxp@g0Xk(&H~b$-891~Z-+ zV3VH8wj^Oha#&JgQB=wC>N4`l;?#CgqJbr@$N>(jJmyxOjICazcvF^ItI8dy!4zf~ zpRqQ0uM;t9+GgnAFdCOgMDGl7c(9c{cxFuJHMNb_N(W!*f2_XMj?WEC`pmLk^oIqW zFpW5jt&6O8UGe1%v-WK+HQ=1*jL*e{^$1zb_Xyd^2$}C12aMbs!fmwIu^Dysr$z}v zqGKa4im&I)_;R~ROS9qA#7HM@`FdG~6UT8GL(SK5`*e99a!U$^!*PV>-1)S`tXTyK z*PUpy;fjsMiCJz1<|U`EuXzZ7(JjoA{2o_Ee?e~$2&+Um=8e3&SJ#V{Fjp^gzXJrD z0I|4HB{)SuGw&r@q0b*MTHEdvUBh8&I>s(xovZ+BWyuiK>DP}pm2IgH;a7V#?5~!E zwl@PLYg;Y8I<$70Grx8seShtX3BwrZs7?OoD!jd z@Ev%|7`(*GRx`IUJ1Xm%RT&l5 zm8#he(yt#&*AnCEBI@nC_>r}594vKTJ7Dl*!KHCMSMdL__1-~EZg14+PNS(LbW|jP z0D^^3M6f1w^yo?GSVIx)CN#SyR8i4TRcxUO*g_So385&qPz1%6(4}aof(3GS;CJr# z&7J$l8uQLLjsux@KYKl^!0`i850!aAS%_^oIDQ1E4WDajk{-|ibdA#9Z8*fsa1E8R z9-srxo{RviVO54mV?JWFP414|>tXqsq`>bmGFr^NJ z7;tMx;#e_%;*O7^({~5qoV4yS_zYH*!s1JfjN=90%Gn9IPf{@V^pQxmFI?7q3l*Eb z`&qAzp!LUwjA*bIMK9zm=aA1K+0Znx+bs%pnaDeQhRg#fE|hTHI~jGGw3K&`$1kkh z29rY^&cJuMGohy6nULsA@Jf!Kd6(aeQ&Y5af`l+x9#;kSUVpc){q)a`a90C2HStAR zPjm<$Q*x8pY{j?-)3@Ky(lo*>34%DImvP^$L{6eVdF6kj;rm;GF8pG2=*60q(RG_` zQbkGMD_Aj;&^1lfi=n-ey<8SF-%o3_}WmjISml zitLg&Ev%R;E&qzF{9m8B7KZIWUc45zu)`}}i0wdNJ5UQd5DPm@vqdmDvi{7cnv0)A z-(R}N{}Ig-FM1cRDY>}x>xMJy#AhUKn(bc{;scrpFfs>=TQu*Inf3~6{Y|6jjri>v z@j>_#!^iYb4qea(Cx^1|rTAL>d;An0f!#0(bj_AvSCZUFTS-uMv2^D+J6?Iyc!Ak1 zY_4(>smnNF&v#NAU2W~({BiGY-3elvB=e_RNV*+qwcr$i0jxo+N zZZH_!Dh9~n&T&z|={T7iPBG@GJsxUpOASQm8Y*ZTVFI~OlJLjOK_{i5MJksKJLo|2 z1uIYMadmdoV#S;^M!TopFhgB1VTG9+HWQZGSae^bqT4Ou&h`CN|EHP%oo7G$Sd2wo4sH z%=i4qr-v2C;xFMr0scQqS8jCa31)w`7~X~USVzLLy51YO>e6RYa>k1ch)!sih@Lit zfs1?UKi;Pty}W_Q5bcrSiSq0=yh^_tiuM4to_W6WJYQ|S{{0*4H_Hv~u*sRwMdlT| z^xp#VBXSZaGnEnG zuh*UbLjKD5i=d9i%rtGM@}Lyp?kQvT0*9aI?YfnzJ=RBSKW$>|WHDJFnw7@7#j0ez zWPN7I9QGzzSQ;f~%hxIhN?{Ve;qL|<@6yaUHi}q!@A4(1x;(d3Ub<7vhdiK?bI0V8 zdvdl(X;MzN;bK1g4<=`Olv-6>&GCEmgAO3e#CXr?b$#df=ZRN@Bsz^V9r4hR+llQEI zhoHcv_=n8Jkej=G%J?6j_PgaRhSlh2Eyw7nsr*as>?W;FRx{`})Rqe2gMFt#@7ZS8 zelVLkA&;C;7WMK|to-xeVnqfbYmu`ET-YKS+b=rx+EmS1u1oNRQ_Gx$7n{{(+jYUE zQNqzr+*yiIU2G(_SSfZBZxtU9qmZscmPVBfBuAVjMo`3?)k)KH5(a1VgO&|*&RjCe z#jH$RSR!E_`LTTndVu=iX*!#N)(N|>uz!%?k~;&buW<;~ZHUJU;b+1|jU_rqQM3gI z25^UwOK5)&fhDvVCGVI5Yfv32_s*6{f5UWG!5iGA>1ioWCJ$)?7gb*GiQh|5c!={J z?Pe%B-^*>(I%)j4hVe)^lOOh|*5Z+{@Q(4lhh@eYv0ieq<=ghthQ4S6Xb5w zZi7Le5&jU-8*~y+`izK&h=>Vdt-hsU(R%Rj5I+h5US+_TYri605p&oi&fd16+V^OhtbvOq6svHg^} zDMf9)DaDvbQ}|AKv_{E^ zup=Yf0SRuOa7mcA7;va`OG}?2x}C4TMX!%8W8?ez=VK`6uUWj_tZ;%77wTrjwhMOj zd19-2us+tA>9C{iS^)9DRfZr4b~$?;qfm}fmK~$${y0W~nQbuwSCD+$Z3vUdoy7reK8>-2)674Uuy2Vbl_a!=oDRC13vDgk((d&Up{4rG%eO^J4q zPBDJ=k>5r)Mo#Np%uHWja*GGeuIo!4havAUQA>DX2woWKaTwxp82!%=3nKI<*L%UK z*R4S9=up2_dPtI`L6$~rFC2Rf*j4cUXDW0vvXTYv`)(g;>IogD-lM+5$z{weP``a> z`#%PI+u`V2#taoitv))W6#C5#q|i-&ID!LJ>NYAZ=|ss3C0%)vg|l=(iI+WLL8 z-O%ZBo{HN>=25Gt$!k-`12+#(2W&{4A6CFYeD{xj{vTyG5{O}hec&jR! zVK%58WQyO9ZsVM$WqH73=Rmebo+(i;Z@k$!@7t)MdERtff*SF8Xj;5_Zgwf^QeIP0 zHsX#GAqx2`;(jANikq5heCr!;Sw4lZ7sp@EpfLgi%;U`4(;gid*!)Nc`4f}u5%p~e zslon-VgwfDwzt@OD8_e%0a3W}obuc#9HOWYth{%Bf8FEULP>FM;Y!|z0PnPeN&W|u zHg)eQa3TC=$7t~qJof|~j9?K6K>-JX%r)3qX>?OhSqbOJZ&7)ZiEu#y`~HoVnm_E~ zpL=IR61&z4Vb~Ywkxk0}v*LPScPUZM2*S|3rqkGqHJ6c?%Z)NUb;=AyJv{fNAa2AU z3&xC8quQA-Upz;5wU`pWw{)QpsS27)Iws~Uk?Lsins#=A`^^^Wbg8QvujyRpzTV1a zkklWJ&n-;G=iue~)_Ek#0Deld^{p0ZF=^FOx3W-Vw@Wf2Y>cWv*QGC^ucf0Mc%K(1 z@2BGsQ9IQ@`c9w*3jNldKj>aZZ@9gjKS2k|jD-vV)|S74AH;}coM8~E7D=z9G=rNX9v`@AZR@n9-fC1U3 zgA=A=vzDmWv#q__5QJF^iOi00@)`JW)B3b6cumY*T`DaqY?O9N$EAuguvxZLwr;Fn z-&?j@cI=OG`=jV6<*a%)aQXe!%XhoE6I}4x*m-AfgMv5)vN5`ItaPE&_?bywWn3BX zT9>KfiRgegwoIw>Nyka&i{Y^KY%Nj6dslKZX*Wu-^N`OLl^Y0g5{wJvvIRLP6nJzL zdk&kLitu?ySMmkVmH*Pau@l&>PX+cc?~@;WNA2?E2U^-1K8tk`+dI(v)HJq__$(-4 z6zz?|r)vD(Rg24h;q<>8Kn?bl>-hWl`+sf2dd%$itWdFhDS){sEa?5hLrJk@$Fh?V zyh_?GtYMS<_X}2${vqukF-Wtzx(c&Qb7sjqpJ+JDkr18lznqSYoE6{B&qRnLBNU}9 zN?Kf4&W$)xIJgzJwZkWRAjUg}*)hmD)6VvZ)=8Z>LyuW>)%Reo`$vWTwf%@cCd;iIggbBdgsE9a1YGz zJyZbyweh37Gh#xNT(7w0fU5~2d)D38A2d-whjN;KE6VKEivzbfmp-4qHCzWXh*C3^ z1z;vVm?dTnvrwEWUNcX!ij(`n7=B?lH(@Bnd_TFS;|e2~`Q|4O&Nmi;e2 zlu}LcKl4W0>qO?2!=|(EarDz=r1c~~BL$KoNb#gAq}!w?q<<2QzMyQ09fG0q-Cs7LtkYEbpQABzZ1aa0N3YUv+Wl3qynLbQNHJE-w{7}Wq<+sPFe$F^tN$gu4vn;zLo1F{MTWeV*<>nL?Wi~Tflcpq}g%cv!R|>?DQQ_YrK{s!r0A@SW zktJGj&2)zkl5D0m8&FZzlsno9SapS8J|LT{e4NUrne zmmcL^*EPFq@3DCpLDuJ6@Eu^%a|r(^{~TX%oqwM{Hks0JH}+8nhVp!oDhc%()ZyIK z&zc&Byy~_RA$ulSs6`Cdwbmw1S$?Y?csOb+yKT)$>@zQI>FGJ@wzevF=LA$XAvEO*{$W_A) z))~aBFddqFw(6>3q_wwg4)Mh51_mO#KCH;ik|oU8Qz%2cs%0{QB? z4dkRYU_gKY`WVhR$0ifwh+Sy^_ST2LHvC!paIYx^(RB#9h&FPo)e*4K_c|#}S$bl0ri{c_5rTYEd)~1kL02r)`dM-nk_f zPT;^68zFaPIyM11Pmz;NgK>Hw{z}Mtjr8#6C+tKRm6vx(xR?7(jd60MBntKDT zy5;|PLFWfe`M`~_RNT6J{SGZ2StXKKhM)RA?@59~iomZgajs^kt+o&MO z;^tt>K@P|w^v2NaYthC2!%^ze%vQx>|G>rH;iF2B3CI-*9w){s<62{Ge~C{(+PNzJ zCR^c-hS;)LyRC4h=7;GljOQdIXoRX_Ib&6$$m*>*#(YY0lpNzx5;7wbrD}5LkFaO<>>0&qpm&2I?vYzT+=y?BC z@H%x${82Z6a$w24Rfy*SS^sxJ36MvWuu0YBr;^^5mkP?DgO1@d!7k7v%K@H}|zUA)7*1m4wx1A?brX-$~lpL>a=wKE;PRhM3igtR2ffG}? zzL=@bUE}a)xEI484NM;RVz|aeJY?6?2s~~QPNatp0q-W z-;6sr-7ozsRh=q?=2)43VqZ;Gt*=7AA5sfSTxJJ>c@dN9c;Zy|mE_T1D(wGHq04;i zQtb6xxCUH7?xdkNmZD^lPE@sCg;J}qEuJ*oYdt{(^~inXAo!4O9chcOzP5S} z0ESvfJkA_1-$1gjz_g>{5B{`)YNrs{ z%p|sx_ni*u8Y9Y~U3~}lOfrJpn2eyA+8l(3i>bNQ9p}xCWzL^WDoK==q=hAY-l0TB z@Me1jiA%$%;UP*vZZOOv-Wdy=MYxEsx~zW*W43O(u|?~Wiae_+MSgqkZ6EGlx#4)# zb7|(^(>0S=*+)%%YRr#09Nw|kyMPh=RYRh7`z{mZCsb0sROtrpG~zq)j(>|U z@#TxjkkUI12Krx{;O0y>czk?iZII31?kguNvVT00-wnWjmjiXW5&aYCYC+~<|AO3` zVP(8iftc5Mm>@9yq@m)o&|ja^~Exs9M9djeR z9tl=(g5U!^hI}SJJop@k53=~B{LkbcO5iXAtm_&RCVeu!{uT?Y>aH#=h6o9x*w@s%j?Suf1bWFH#FXkk)S^qc5c9HlQD>A8iOh=?PTQ8zC? z;{lV)A9**qPzLvOS#nvvIbYJi^WZ<>9p(?ogY|C1UEnIHy>6tpU2G<-6I^~5+;orSRHbss zenZ0q9M!2!a=R^JIzbRq7gMKf&3>_LMNBP@l=`}Dv(0Zu)T{Sph~OrG?A+B{k3>ng zM+G;TcdGVQ9%^3EpTL32vK#Cr$gG5sdmKK8$IIf6bByhAiEmf(&AEa__t%SPqCk;e zVdn$;Llp*(DHl_UDXiIyP3-GE$U~#DJW+*6o}2q!BohJolEX&qDjqb$5B)K6MM@&X z@l7=mDevDfp`jev?XDjMc1@JE29GaW0h_9(JA=nN#BQ{w7>g)ZWEUK6QO?ob*zNE^ z-c&_H0qq68(!J6X(hE|qv|Cy&%`|d2G(8}llJ4BhV{GJ2o}z|wvs|0@%{x=gYKQm6 zA7&E95E*J6%^cDMn`lG;!__vfHH{*LhKpS}Eb{ zJ=sGzLZ|S-HTp6>pPs-EoL}@yoNoFf zjy)uB*lZ4xdw^rYl`}Y!ryA3%C&T457Gdw1g9pu#B25vzdJ0RBgdvQAi8{+G{UE~P zG&CLY#nNSzQv#*qf+KK~vcUkJ!E`sIQ;rzQLXKJGNi^2vy@0cfvz|la1aiE%AcWiE<8&*CKgK!3mvHXz!CL6b4dstQ|GAEc$&Kc&&Nw)C z^(2*P4;>PWx$-U(uy0B6YD)6N34_7kqCRyC>xE6DdUNM zXmDEc9Iv!26O3lHOzVvk%Kjo1Iy{l(f061PNTdX%(4mD;=s>A=Ak;f-|7h4OdT3e( z$2fnr)s$?lzB0X`KDF|FFbPIQ^QdHLF>Knh@@ZQ4{Yp!OylAU*j-*`Pv!!CEhA8ka z8?lg9|5>9T`Ns=oG@`JvVN0XJPI0bE_J)bdHMO@}5A1jDmSnU9IPM{=9%Z`7Wq>Jv zG(C&ppk4}PfUCm4s2z|e!GsNK4WqNAr$zyD^g;fCp>#y-s7l2x*tDhkM6LofErUf{ zOx!9FEWKR)^Owwi;>;=otbM(_Xe%l-dlw^Xy>Qb{`h?EB`q&eMf2P`U5y-cB*jI>* z{?mdCdqIXU3CaNXH4LG{n%s2Sy^soq&d8r#iqlemwI!yx_89MzcUsOLFwEHFw&{Rj zdf^`Dhn`v)kG>q3Snb9A6*D%7&gLioK8eou7U%ue?^7>&I1Efnlo1U>pT_;1Y6oSp z);qQBm-%RhTkdz>pbVQN{lH>3@L*aAk%zh^&^t9^Jl|r20l7*(Vhq^nZK8Cr2&!im zL55iKe_rT}iVH@A85K0b@)oBb2Kg`}RXqkI4nnC;sT>^J9Y5QMIT|uo0$0 zp1SqhQ18R4$ku((1TAxb1$lo?s-IosWO$w+h>gDAu~hNN6;Bl<+R1$mUhc z!eJEwW>U7PYIG@;#k{gpi;iAQU$vuhu*Z|GC?n>eqfeg+ogHVMSjc9>TVO~KMVDhZ zm$FoGV@#SUc>MV#{WD#@GE`?6F;+5w8)GYDBKr?hmP<@IOh&8!y|CiC6%4O{Q?(SX z=q$(y(3+$JuK~eZRZ{0jcs1_EQ?pl8#sk|G$=tM)mOEvX=t`^XU&0%pl7T1hg1Nm`P6$-sqS$U1Knb$$Jyoe-K(FyU7EbCgohhxw#iemsgYLBI`B zeo;)=`#DhMQHNO4geSs?Ln3e@0t+J0TTN3mUy6n%g?G8;xyX6<>J&Qr$eX(Fp?HYL zATpGORuaE(15XBc@1}UzCpD+NwK3kY4rW=4i&hqG8d6twPk=ksU;m{RT;<>8KjX6- z`2XU^_?P>#2qtOuR+vLy7DG}$+J7v=MOCkdDT2FSB^Xw)917~d(f0nOZHRmc5cU`k!@E(E&+LxR$UQ;fS+@S|zC(h+8m z`SE!?JoFoYdsIFZL+_-X&%U@*o~oNz%X`lQ&nR>c`mXItgAv|alMg>WPb>0UHvN?V z0}H-E$|-+6S8>AhRLn&F&Uc6>kLdpeqi8Zr7{HFPk#XglIa{m7C*?3hr}&}Dg}tkj z;CubDznW||n3J;*ssxH7*;o#N9w|a5pgV`PYM`K^-fg{8{^)s z@=3wx$S%|9sm8bQnO>(mLYPbT9Yu^BW+kw$vLvi$EYHSM7cIJ36D(!ULJr`QIQE>$ zUG%$SMnXvH-|^wfyGrz}1w-m>lj(kAt-DQj!Cc($C~VV1IJLdzeB}(mp$%wqO}KX4 z%YDX0x4Je9gSqz;7zoOPgHd0;6K-!mP_9LRw8NgFy9deue^+#^H0OM+U1wTtf6$Fu zu+m|(u%miYwQ5+WNH1$M^o%$Ec`bin6J&zTAw>}=A%-zS2_SE^)?Mh4b`xZc)ctqbqo=7>ulDT zv*iEmA=$O!9Pzlre$`jvFJjUT;gAWRgx$#B{zSe5IPYe3o<@j#=4_q#a5pleM9AgO z{7|r8u|rsZ#B1VB@Z0wOB<$Oz@8F47JtRUB-PoANm>nDn-`6I?`kGfm$_GI1i1q_xoBbAkR>aP3AifUFci`ff3yK^|qE%4@CI@D5A zI+R#CwYG{xfh z=_N5kX=^&5Qlw@PR+(&Pk6j)UT?Zx0fkg=dW64$|HcW|>D!Wk0K_mE~WVr%6pDeGp zyukoGhKS+tLc*riC}l6F2IFniqn@*&G6C%`iLL{OHl6h6y>Q9<+ zV`o*xlP)?nPNddM9+$K8%Mt@0Qp&;(SmC8v{5PF0ykGcP83n3&qAV zOD0c3D}n3C#pi2P!j#54f4gzFa=`)aX>JlXn_I@MTgGaP~godFMAjEv;Er<4vL}p zeiUXAj6lJiHs6%5D^`*2U7sRne%N(Q*KFppWqpFL*vH zIC7BzKiNLnN!dkNrmRG!>B`2@YHA7$zsRIA^(Q);8k_#ir##V_8GcZ6wIf}gY0@=% zjD4yVS0PXnCOn4%!*$mAL|*oKGWcv?0Li@#w#7uoYI!Ct_>BF51u%%p2p{j^E8dJx zqvP*9c@c#}#o;gOqhNp1!Yg%p$$r~vbOrs|hX(+Hq(L$!*^)Mpwvi5!SR{~4>J8jV zsi}$fs2~M6bQDjA(Bxzcj6OqZ!eEZ1?~NCoexJ=9663SEzGPM4o^>|OM~85@{2HKEbT^c*?@{2;yX zog}H)S+1O6~QHbn_^qXcOCO#6f_k|9B;WOQhI&(i&pS`4FO#nHaOq*#g7oxIy` zsy=esoq*!2y6KaHN!L5gfGcl7|g3+D$h* z74xKddb!`mKNubNeD~>@I&AH}=F#GP_nA8E%P#zlDGB%j3vpJv{8}QuN4l-sJEj^c=Ko$PK*R$V8+6 z4f|X5Ha!U~{+@g}D&Bc&@RBxbxBNX0zuk16eB`Rq&v&L4J$5N{(Q^F1r6@!}`7NSx zpXV}TuXsz2BL~+T^Xc|u=RS7@Ka*1)JvdsN*B3*Fte!6-owBb{GW2t1nvUBOCzm2q zYig0H-Mu~RtbN_IM^z8qp$LWc2v7bcE95^ed0X|&P0RVQb4SJ7?+;=JM0rXAZb#tFqmX5_)iD)Uk3*J7d0dy(?25iMVLIF z4)NQ>_gHW6jPwYx+KkW>ypbO5uMpQ0gN*}YF+IV^low$;VxEWVrtIVZQu2$ivoU+m zG=_7|eWoAe0v1=5L12V1oEU8>vS$Yvx~CZ$JYybcl#)vs^>e3ch|VzbACeNM$uwBb z1x0g%{+iT(UEekNxakHu(2WgPKpq9=%i7C2!MecWvWi&^Y95>F2OIv+s%dR$4xreBtL*B%eWP#i+yIa(BY#Co0DuQkU({E zL!PV_PjHoa3wg_VWS%<@%*5C7GI%OmmJ1|C-c7*R&%xWoSC`}EcfyBf=)MI|6TO@2 zn!TDC(a**4QSfh!G&jB9**y926raPF?_DUh{P)jJzJ;9;qNIb(S^mzL0qy3n_FwpV ze@y+JsTZEzr8BxE85DNUXk6$cwp%b-JVYFYyra&-^G$4}@hzTeIGiMIlx^QYI(k_gXLb3HoFP z69-nQVYl=}lheqzEF;?5%g%2;W(8mE>z$%s+cv*nxxmt=W7*HjGq`0H{;zFivZnx1 zrK~tFsy<)v6p``k4aCx^Ht+*o3_lnDS~%}JCJ%o4ocC*~48HD7VFR*vW+LuDBF-)m zhyE;S{C2K^C^?m+S^<@rIxt?T6ZbBQK@rs+7`JE%E>Rwr6G^g=QpjKXElJPWnD?8x zP)W^jSm~%1GOL)R1ViG^c7U;aeUYSKOpud{b^aDmFBeH)Q?XbAq|aC>v#e;HY>`xwBSevy%R zFyG#3_cK_S(ZQ(P#86=E-vBQNE}*901thuvuP1UD&@V*2^S${qO9vQgd=_aH6y4F^+MxT1Z^IHUFA=OAr3#g zuPlt|Nq+&>|ACD^q!7|klKc&MlMV!=26{>MYv!Zev1m9btyg@yj53!Uk0a95sl? zVx>X}i>{98c#e|JV!##2w;>Unc+M5hZO#+U+_xMF2Zg+q>G$q!35xssUX}`S7o;P= z^r)VCN4}$_Tm=p~@=a{czU$1p(mc2Jr04Q_1d3{V!}2YRYj{&yVg*xS>fr;Yn(_R7 zY5L29^Pm}G)(x=_x*@jaj^7XC#m4d;fB%rrd&qmmQ)%ww&s1gG82O!6*Y}vOV=8J^ zR^=1;R(x3L<-^~@KhB>y;rU<82<(PIqk@hvd?{c3$@{r=(@$IF5=(u~Qd2jZr!6)j zButi@=(%nM3Sd}6erKd`y{z7{pkwbS*f3Gt$@pCdkHE0x|E;mNYebFCf1T1i1-3=*Jc!6(V4C0?Ka3rA18ez2J{YXOmNs`>O@|$@I z8?GA&%N8sR?2=hIta8@#u#ZvVRIy6l=MNmr6|)o~P1H=Jtr+Ji@>R#0lm&mp^P~VT zwUjzay`}2#ZsCOg?DxUdqTh?*fT7^sr%s2HD0;rxi1dxb^R~dGhV6_UyKGjj)xp0h3(W3`RBQwgRVy%)wia|;Nh#6KXiW-p1u{bdf7v~;0{S9vlU;Y z%L{J7rv`au$^mkWXL=@bIlS!`;cF=U&zfF07{w#qg0y(#DzZFQZi1{#1q-Rmsbs1< z_1oEBw24@QFa$kVK ze1+eRI?QfPX-bV0I`cw?n^OQYhnD|2_3-Up)-OmdEaI?9oJfu*=NIP)=PZZ$0 ztua!!dKknB7c|FKQ%4qxLx$soF3rH?{l)4{A6**KW%;rvyth0h3D1O&=17Pq(|O_w@st>R5`S;H_5&r=k}j66lAgzbf2ID?Fc^E{ zboj!`34L=TL|d7(4qAg|gg7z+Bx__&G9Q`Nu{F3bry#=^88Tgla6GbxRrB}gu|2Hg z$H3I@Aj3&wATc-W7wK_mkRdR#M%x}BE?K=3b|}bOV!$ozAiR=)Z#t(xf<@!C@d~DR zAel|IniK4nz_}GDHeQDnuGYI>aT2 z%Me!}G9a!(T!Xj{aRcHe1biieOo%K9So96GaR3Gq0+0uB3nCw)0HP4$HpCr>yAbyv z?nA(9CMbd^hA4q3g(!n4hj;){0Z|F@5CV>cu#gCVClF5|o z3?YGNhv12hk5P05J&h9pVRs6k-Ts7-9rs6k-fw9O5U$1jHo7 zFNog|e;}shkjZ4z@J|^8K)~Ofi*fg#ILeJhN1f{B1{DAk*zwSyg2$2!NY*505=HCS z5{glThljiX7!l$MqO^Cr)coD;JZ2rG^?_Kt1^oHz;nC~q?wK3*js7^)!vkmpjrwl$ zoWE}~nNF5-g^+*w1j)khO~?LiCy$abR2Lm8Xur!@M{P({N-1Z_Lt0@n!bLxX+r4Ld z!fPJhpvrwp%~T4kT2 zhgtticvZ;L^ojf=L*}1DU5Te;+ed@1F_ajeY%%9xmVLBJYX6zajWM{ZYZ*|VAhzpfDz7!gBpiI#*aqap3@C*X4?F;V^$$#5|>)>>1_LUX3zZcYf^Aen#j7zDuV0A zcdQ=PBuhz!qsKAlApayK)DTN(8~}%jGj_MKOzduDB--V@Bq5MzA2lQrO9Z8crOTSC z_`tD|STb1px?)-B$Rlg6GZ*-B_i|5gtGHb5XKbjbg{#`jbpxG$xvD$@Z+A5d?t0-i z!B{u}p6yDSf9&6bJQgpRm%}UP`9J5i@dkKsQN>3gzX-sQF-(UQ--#b_Wk59!GL{SAqjj_gi=?o_eLk>Ua{9dA4D_o{Y+cl}zT#iCWBe?&V(Iie_0=A%8W zWO=I7$fd5Y0yMirI9@eS4FbmBoHg)qMh|XlxU7-iyr4mcLOJahsuBkq7K(P{eLJU- zOi@KOX<^`Giwuik`!(P7_&a`c6odIdq^M$AJasTN;#Tp^VFgPC!Z)#>DSs%$s1Av7 z+;kg=XZp7`1&G1UtpV~<)0eJsTu<;C51DbMBO~WHyKV3Qd&kBE zTkV%k4$75d81Hk2wYj)1Y`dyViO z+lK{zu=DVEygaeiTXVuhn+kaN)zs<5K2#}e%uJ-3QzNjBgPDNZK)JhQw> zloMw?K3@eGz(Sz^PxZyN=bc7P%5ZW>h+g=cW^YV+#}B~-EdtA$ z>*ucoza7b_QSY0hf4!ZoF~Lclm-xZcdh6M}Kcm9~k%ixWMzaEu41ZL3AmUs&tp5r` zumZhD!ONBw)hfqI6~Pq~jV`>22D7faQ~>2GdF1H6n;9YTc)TAjPXEBaHzY{mDL1Kv6z zIttwi!7G^Lmi+KVpeP*PiOu#;X(~`4ch&>Bv$4@@!);8+oryz-&kYKt{o&wCI9ss| zh87Qpt3)YG4vxW{amLF}D{gnLOjx#OkP0Orw~mBx?jJeCwrRb{8QUO_NnT8IT1>N8 zOw&^tOj5Mu>rY~x?SOl`&r1(xdYxO_vr>RjG8j^cT+5kn$ipB20s*}XDmM0c4W2J+_OUw zgM&i;^zoB}!gR6vIsHo`MJ6$yEfKNn*o(&fOeXGd4o1DYgmbD+JH)2zVji4*c^+NM zc69@NGq>W;HD8uuVN`18l=qdlzjFh1k<@p}TeJROE1wvYi;rX5#D(Okmb;lsUGGX{ z7`fvbvK}^yLj~HChJVS!w}QJsH>@We$#b%vC{OBKRL5-x?@FAjn@h_&Ttu(h-<5<` zSGqs{QhEd)fH%~~kSI7L%gkkp)L&F+AsSBlbN?dshKx7WUuYt9@Bj8h@RI&|`QU(e zkcHs%W(g!UEOjOSO4{d7o9Za2+n6dsgBjAW=+~;GwF+li%$k#0Djt9|{w=<5 zBRlq9=2&Br_5+M6p;Yi+?FxerqWC|=Kw81Cuk;wIM;}M_Vg7if53w@FH|BX9k=s@# zVPNVL!6zndFO(CNq7i^Kqb8zE7XbvK3|ohEwz`2C9lbJcF9gSt7>#2nU!em2P}Omy zr3O&bi9y*eIJztf*6{|9BV3G{bg{=;q9^r z7W=ObT^>o`f1zR1xz;&+@io0dpPbVcs-oYH(&-Exn_ zCpD5fNno6$NS;q#N?u2%S}mlVLT_~p#3b12a|G?^OXGlJcbEK)vLjf%vvk#`wT^+H zEXX0qS6I$CROJ{b2@>oEn}T}wT^0Qo)iCxJw{K??wTr5^{Kr47*6wDW2|KH-cZ9W} z+w;;;9E(SwKQE&-v9q}K2s^R+rg2vk;YG{O$SdKpNOdU+7Z1xQG#Tcd%i>HJ^_35q zr_h4vleB@8a$6Q<`d@o3ad6kqgFUqN+*sz4Fv7~P6)YE)-|<*BV*c)cP;lk_VlL;1 zBUh2Ln|tg=dMLZ;`wcFcTXl`jZRc(~BCm|>meh1h61yc{I~SSAZCPk<+)6*0Bb7Fj zqB6dB-Pl?W`GIA{nqApebxI1pMi)e7FclMSP0!6tJ9o^=QkN#3*-dR9oBk0gAEZ>` zEO``4`PRGb+S`IPL8#x3kU08fdLjKW{S94A2gCF*PAn&vvubxm<|(wemC;*x^ugy-K%@4r+IU83sif&v}dEK`;)^jA=JvO3iio^iRCS$fNd96PG*bj&DSsWG%9kes$MG-oft&O( z|M>sI*?UJdv4w5ldlEY6gkD4w2q+>D2zEWr&;%4sq}Y$4D%K!~6-@+1#S)6B*n%K- z4Mpr4iijv0q^Kx52qIz|iYO{D-yS&UInTS+_x|&)<>D|d409%#+4sJ$>;7HvE^WGc z$>5uEfz@`M&6D&?h88^l#TtEQw%#vM7q5ydQ46o>%jq9>tGO}iq?INBPFzGeXfm|3 zW&-Fau+9s)WDv%^Xn3F`oCn^(0~uF5s?adq-czr@pl7r5Mb>8L0Yt>6-T=I=99jz* z%_`8XY9U`xV+aH1nxQMHFhcK#KuZKV6Nw|l1;Wggf<1CL_UZtK3kPf8D(#UUYAUez znjdOz{vf7GLF2g9u5IJ2nrqZ;4gZW=$p%~5A!HhRYIwGD)71;^1NE$ud`1q%0PoR3TYz8`bD>$)o#4E{aCxW zwGOn0A^5Mb?ibwwlM>!Wtac67D70#BkFYiT1q+Xc+>GyAtd~SHy0=)bh-O?^7{y!? zjVy^~u82l%tcX@!40nZU-E+@JT$u81wIrA~?)%lu2$vJxCF`L3w<@aM%|I8}jZouX z2~FGD9xeH zKCgF!RmfPsD!zAIOGm_q=cx$@4ll`Xqb){=5LO*s&;k6?b%o1)DXcmkZ8z>nV~}+T z;9)|z_kC$P(vYANF=?)X7&dd73l3vZ|I?wF^k(F)b#lwEV=?_VrP&Rx7%a;$^a zU+sfE?Sq4y?Sm~P&YC`_S2;-W1Fpl}zWAR`tT`(_QPB_Fv-j8crsOW^lXFjHI0XNl zK|(aBgI%(jU9y+jqfj65+FNG?37T_d7aA^|W);RUWB0aJXPm`wymy=$_k32)&D4uI z83tSL@0$E`&+8puE~GJ(ZAo!y45BY-gna}*S3d)gW>;-IEUEeR*{_$|G?EOb&$!+$@eDxY*dPspk+F<0*tJACC zV@4BJ-0vgxc>HY|brVa$xb?wS%96mEd!@0~LBu{Qsj@^`6a3;~Y2vH2tEVq|oxca^s;{r;fS*p%RJV;GKRaz+JPWpwH=k95Ua zOLftG@L)XCL^G>vst%X}PQ0^${GO*oBO&c1CXyzk7fj^xBbSiiT~9Q*gFHlLFyTX4 zK|hsSB8!TfI$7l(ml!_y*!*5Q9idt6;D2E4)M`pXWqI|WtjnGgtkrR-CW@ha#&3zd z{pM|mmLB0_+dwfEjC3c4>cgJG1nco!OU8MgD>A{lmV0#+z`3vNMd(^I0Zm8GqBn=K zmW+6fenmsR{_;#TXNzPyWd(MXg^9kl*U1X<^#{bYg-mCkW#42!X1`&R?0-xcmz_)Q z*SSAcEzXJ?lh;-<;JNVTRkckh>y743iXP_Z3|Tnqo#As%5C98l9<8hR`ZEQh5PzVF z)Vc2nsP(X9>=e1e??G-r^1Qbm*A|AYYH%NuTZ?ZSlRJpQxz_+umb%z*jEBWy0a!Vj z=_THS9s5hwQJ$wg+T2GM{PvWp7Es`FS0qy=oS1*^8G8x`>rGhE;&h4Es@I+2KHvuKTpVrvyf_8 z;#{6L^+E$nIS4~Llzb=oytFO4V67}zGyRZl-oYgMd>1{|9~Qd^8*8bxt+J4|$>JP; z)*lWFIb}ebDE*POnqO}iX8)}JXk_JqDF4M+MhW5taT0Jqazz6F_mWHQf600;Xe|Dv z(^65DIiOnn*2vUkdYl* z8&#~x?=D*tcWP5w*O{W@-*23#ezj$5F|_yoT=&+VTEBZmxu!$8&+Ek2+N*zxKE8}B z?^w|ixd-20?DTHxy`i57VrKIE3p0~FXC^z(OtusxYdQtc{P8Q{PI)D7??!c(t&6Qr zt4-+zYquO6uGIo3^ZKq}FXYuzH(qZd9_hqrK<|iF9dLZm*K8fN$#O8dB?eX)Fe&W3 zVj=NFL0q`fIN8STdFLO+4*}9t-fEQ7{D2W;s5Z0E;kA+a@&bqYqqc}zHurhwN@iWx zvHVqNeqPb@&cnbzk;!jK!-Dz13J1s>^L;Ai&t9Gd5;yf|vZ!eP< zlWoVFK5T)(~nB$fg*i2#?jhFhDSub=2_qkgc zi?IB>GV4Uwr4ycV!M@2wXf^sC{efz+XR{sHoQTjbBLdk=*@vD`C)v5|S8c~%{)+h1 z_e$RZZ^lhc#s;fw6vF@EFPQP{d0;AUHZPb*HwX{$&hd&ip4)&wT_^WfuQxTj=e1FN zstDSK}&N|nDtXT1!^J_ zk)3F=$WH`l=`mjP?wm_9d3r%sEwBG4g$zWbo(dAKiu$@S{nEbeh3k$0zpDpwv|oy5?lHvdbLP2=PuF+y_TJl`HSjnN$Rl(-cl_{6 z6n@+3_Fm95i_{X4Yd@W6M@GEZ{LV#il7yL?tF-OArD*DqEAPf@=Aw=MXe~ModZ44* zVDs<7L+Sm8(tQu5fsxY(CKt5J45vJt6-4=Qq6ZMe&0x9Z!HX%AE8v!j2WS7*=CJNW zOMi9-7I)+~YMwUfw`CpNmSybXl&ogIS#6@Ei(I^c>e~h>k$*YkefXx7*I%JOW1{-i zgtfmU8?Cw9)@MipI{?czui4zTOmdKF+hT1?Nr3*o8rI^|kF05Td4Me9z)fea?aJL6 zBj@dxb~~jc=|sOjC4EXyn{X;*uVotD-7-zNnuXjUwOE}mcU8@mTNswiwN624jtiS( z|AWv=JOZ-ir&ZTf4^@M}2`Nv{nkb`~jMvVKPc!`^71uUH{VX3!pd)4_>hl|DZ&PfrA@nzn8zU1 zyC1f!81zx52(ksBP*5(Y7kn1_K zJ{Hp>i3Wa~?_xBgW;h-`HdYISk9GD*Rn3+JOQIz^B!?u<=Oniz^p=y!h)bSX8+|%U z-PBtv8n$yyy%`e&*jwt%ycVV1%URP!Kx>ieOkwruEaQUg?8nt6O0aMH=`6PbtLvAu zy>H!+J(7V2**6)GPnX-k=oH%53(rHV0h7sr;6_1jp8!6?#U>o9>C(SuG2-suq;rI| z6i^^kOj7`%B2=+Xk*N6T>r~Y6eQtFxJ@1X+(EPSA;qu(I6;>WX(cZchA_h4AJW=FW z+}%;>KeswI{tE$5V{Wx+^UoKen&F>TC@B%p7Y_hTl-0_Wp6A*D3Gdi9hCt$KhUTJGV*(_PoRJGedw2XAIXFxA*YiTZcjA5KnYIYv{2x0?)n0mhnwVg2+ zR4JOyX>sk>F~#LGM-mw1E*IqX=*X?(&b)vAvy2q50ef5^}BXs|YT!y|bJ23I@m!zLZ! zC^bGmRDJrqL(e>|A0~Uxl^(1cxx+iC*26F2an0)GOi=P7csoBdJIp04HvY7D-*&(c zRfQ>*O$n=8;V6hx1_=O-?o$d*2zyU~y-Ow62k!fii$=l4^$HQcE zWMMK8E88W@kX@ABm8oR7^T|y3mOaStl7(aIC+=#=NgB_2pK}b8W~!Clz?jWvTC2f> z{6(c@1)unfRh1zR@^_VjW#y`Z{g0l@X~Tt{VuS*OE8G>nt96SCXgT zi5N8-$8%Uby14$7iA%bv2YL-PUFU?3+eCvIo?xMJm6Fbv&r)7h?ynl9cC@fb{kIa| zuxT7O<*|MX9sP7_GPChREx)h{jO@DF{E0t`sthS?^6%n9b*_2-?_8CR)88{rY}x)d6OamT)N2q+O&%0t?cC zoJI=CP;woaNFE{ECr-q`^s&nf)bUe7_CRlsXnoPTQysLu-)KC7Y4Kxf$;*~TCj5(9 z{xXA?hD!}U@$1=@ALxTvctfKkim-tp+m=0n?aRJ(vx74(+}s^ecbu>! z!g0d8FImG5FP&NfvdqnT&E1nc%sf_?>=jgo0CV?i9*4ZGJ?_kaQG&cVJP^i<<=y6G z@Gy)XZN0QrU0rc>2>=PD0N5gn&FIK<%VYaY!$AwUJov8ZK=LBf*SH9{kQ4#yv+6o}jxt_eoS2{Y$_j(Pf$P4gTj9U?e| zwN)}ls<~mige%FBpppuS$AZ1eL1ocex^J_!G;sNI`YE=)uFq6&qTf6}p5HvmpA)(% zDkLVR6fDI*1(xec9wb0q^Ya?beYc1jCqgCSrjpisbq zWJq&BS%6`{5)22_2*3s$UC}0Oh1IiwZ0S>?sP)>jcoPi6V_`ns6 z1u(04JeU9`f=NI!8MZT~g1@@jDIB-~ci;giFEAbW06##5fe5e^nlq>~(3w#Rof3Uz zt=|za1L%Trhf;u9cl$}ux45m-{d`Ood})u+4BuRa@eJG6BoUG3@%984&9QQ(WG_=sSE zM87!v#Xog{r9Lo&zn;kfeaG86CqmU&ol6Z|I1au*GH@wJ(Py#{ECZ2XIiOa6m0%TE z4X8Ch45GkVKt+QXunxomYCYHhHbUblwHa&yQm`H7UPFt_4rq^|5}`L{H}u6&NlM@+K<~@Xqu|)r_7l+YB9cS9%jwqdx-$V=mp;#V zpf9~CItL9i z7ob^&x&)mvSD;IV%7qr0d}xoMu0n6jHRy|>Za`DaEog|L?m#!pJ?MlXil7aqq^(mI z^hsj}uHg>Q=hxOb^nbmX|L2Er2>i%70t`?Opi$-_G|5npphKn-x?^5E1*(7Fy74ab zTQ?299q)c?0~~&&sHtH(NSZzZ-rZ=REK#DjzhhrKP$Dx85U^y5nwlb46M=nXhbd}b zJ~2U^H#jpz?RcN264_#ifD=;~jA?D1W=06`a{w-O4HQ7zI&J0Y8YJHPt9%KvAG( zBIxk^+}_^aOM!OmpF7qR50~&W{6?m+@P6vshwh1B`sa2ekhvFdKDRT-c0Z;)3LQL5 z5b2EsLT}G;#>cMd2Fy|TbP9f|2R_u)^yC3{=Dj{_pSp579c0WC+MUKuYN*deOVAnc z8h`2->I*h&^uGhXNP@;Ugs~5PVWw+P{aS#b0d<@uX8M|;&@P0ioz$584L-C@0f%Fy z;ltLj($LbHhQu=c*|l2cEK?B5VH+SB`hAF%#z7r}^A>97E!5AOnj2_kvW=Qp@4#x) zZ-{n>g-+;s3*Gak61J^vJ2uhL+R;wqF9l(qM2nn-j4D4C4 zjNriONL#0RmKF1?wfbewDD_xo!RU8DWAR9i$tQD`)>j*CTYcybqZG(>XsSvDC)AdK zy^M(0U=0%dGzJQ+J~y~rz5&S5=JNTzz`>Qti+8j@9AvCj(tB ze}g;F1bwFZkl0fEAbD z*&u*F_8T}QxFU|%9=jsE8dt>G)suZ~rYph?a7AofU6IwcVXnx?m9B{07T1-?Xs)My znk(XP%=IPU-jYD7y9r=eRxS9 zeyb19hX?RaRv&(}4^M^PCH3L)efZ`+JQ^OX=)*(%@P&Q2KRlSxhr9RTllyQ!Jh1P> zt^06`KHT6_AFk7ft4(lDMJj52;d>PQxf4ThPcRR5`n`a!K0ZU>ESU+{pV`1>5r?pa z5BiZ3XFEUyz-1_Kp0fx@9Kc-o@R(FMx8m_Exu3Fny(<26{J-qXP7cZ4lqIy>+Oh0%LaD9?+bwwy3E)C8X~ z>i4WLjlg9vV8=610g1NCdZtxBh^6#`V|9Yn-iJ~Qpcy+PI97M|?r^45|10B~nTZ7} zP8OaJE;YdW^?gBLVsJt*Gbu!)Gz3Wvo+t}`8h&|9Bc|RGQfUXihqUqjaI>w>b1ra{ zRwJV~s5|RVh)%)4Inx<22y#%Lu{Zb|0>-c3)IWKd5kgysCNJAI98`qEnG0kEmop_| zBR4Acv|-97=JxfMgY}u`tjc3;V>IqZ*~UECT8xa0?ux0|z>E2{c_6RY8QF=0W4ipG zACOgsEVh7AxOWIn-mEF-rE^|(iyz%2+#RJaK8PfF@EC6{q2F>!JEeH zUBpT1aNeWKciX{r9vO^?Vb;KkFRl?(+&?mWzsEA#MGQ?(YJrjLG{#c#Msbq(xcG_~ z6p5?F@5MAP%VN{W5c`<^p40&li}$;*%{w4HD^@2XZ@wY&#{$Xb?=auYC}`w`S#w^3s%7 zmNM{NL8oyqQBGCvmh}_S%90&QwZqEukkn<*722sA$$>FF>))?rsjO9CtZKSyzG{Uk zPDO7zEjEG3#?kANJ2e&NitLZ$&*Xg2^0}1LB2qBE{gzxx?zCkBSyz4ZNVI)za_1bT zi)Ka_n5WaEctE@)J`v93P;$0X>ptp9&L!0cL0qNHjD`Y)-gZ`zgS$>(M%hzSso7L8 z6-`-ea$*iY1)%iIIOs@77(F7u!*gX`YmtaV%bL`;bH7{+^g}X2HY*%@6mb*i>omd|*_yHY06xhqHD!rYSJ@ z>+5-$K4=z0G$#sX2o?+02&95k!D#`wCU_`#C0M2C7t9!asc3O_DbXQqfO(QtB#@DEoq@DOv18va#&f%1RmdjmEJ* zpqXqsFJy*%@ewP}Ncm>@KKaR1T?v&!^=4BASLyw=yD^}%0X|S;H=VZCL*a}$9A-fW zh^acuIPAbR{DZWmo}O}VK%cT3*)!O67+Aypg)L+c7hGc}vzxI9L6HjEBlyJbWe?>& zEccqvqA}G%-pN$G!S+YLX3hJ7shwfqB9Gn>kKMFCXwduw2Ha2BMjfH>^67b@TQMNR zPGJRD8FpPzA#fGk6N7nzCb5S=Ln4Q*p-S;=N#+f4w4_D=&C;{HUU&fV%S`VEfnzD!A}r!t({McD8|L8QttQmyeOJaN*`I3Wby`oTMqNrCzD}bLuuCgNbs=SCZiW`bYmv`!Popbr9_^r@W zhFYWTgUy@5E=ZDUMmsjD;e*psO?JSig$|0TQ?@GU3CxW;K(}#WxIyQj-B}Fn&LD=^ z2@Q9fC_~}|MX8D@um~a+cfl@64CRQ@i7-0~h=v#ZDx!(_PJ~*sa`ng&q%(Pv%T1AP zX8{2jLdKAf7C0MckQd3jBv6s>$SyKuau-+_{@cKc0@ zCK9l7*w>+R_%$2MSn=9=TJF{6BPu;a!6UtmhjB1fK(-5zu5WvrLCAaDhnzSNDL}J z2p&au2$-V5&(;|6Ut(}p}Gb+S=#i8fS%CrX~2PCci|{d?qp-UJz4N@nDyGOitBE-d;~dV*1V zq{q(Ka{qLSUf^(8CsK5wNY{z%f#Pule&bqGX`e=0`9Q7s=LM`4SC(4&X8!-+>xS39 zfVJZEEGBsk;_LQg+SHoW4pfVC4?=vMSrwE0Ok@5t1Q}IjQx#TA!-Nkh&YiuHR%HDB zHvN#StWMFy0E4`CqF9y9sq#M60va;9kXKr53L)x?O#%Mq@$at(wrU#mMdI-OZ7$_iGNo$q@Mo01HGampH{d3_c*O zIR}3i_MC>39m-Cn+SAEdlb^p+r6|!p$o3MBf53c|=>znQ=`p4om0#?PI}X)9ko;5r zwLN59?PAbzW^BTR@F0Q+u#DJ5>?KYR-^?T0`;7K8sDH}8&2x6t5G{4`UwJd4EyyF1 zL2wW?qQx4f^FGq>&c@C&8#LxOf&C0?!+p#(Onrs8kK2n=jj zq$#ev>cF3@>+z>EC}?!QVy)o1V2El1T)&Pf0o1INXT{CRyUNv2n_3{|7)nf4qg7K> z;pKd~a@-N8I+JQPs2C$L5_RPp#C&k%Z{-4$oj@X@ks>fo1KzNo7uH9C!qbiMnqqS? zeY*+7ZW0h6xhwXTzZ0*NKM~91qa}bT36j5ncflX|-x3)5Ct=M}YTNQ35e>w**ZpVIKlGo0*RVh5 z7RCs8H2X_ieo`s;Sg@vPuWIMJw)|_Qhsrw(z@0~Vq(BfNm?R&gI4n3XfP}dx0zzO> zqNr5}d2MNu!PSOyo&vWidIWElQlwm~Oi-pP!CB=^ybSM2aJM;k>~@15rH;z- z@gWV@2dqOHUX_Q`7poYbE#fM-8vtt<#CyDi%PW9EOtZO8qd<~jpgp0YheBUdRwzZW zW)j6bdMMO#Fn8CfEe#q2o>f^5m+@r4O}27D;z7HF5r9T8(O4-&U?`|bG7JXIJ1nBz1Ob8w!3Mz|!4?tN zFZwCiE*U1uk!Xr4Bw-@(mq-Rz>@5(qH0TKyZcz}T4pH9a5k|opW}#W5*N$MMT7^B@ zt1&gQvfpYatu8@v39>o_XKUazlGqdmVokq~M{NtA=zH*5R6yEIY|i7otp?JG>8GIi z^KMu`x*}{wdOv8DK5iX4VgA|{!^a=KG&*jPz(^k0LESz*dL9hrnZ15@$S%!!GA06i z4-Z$&Ic%HBN%T@&5$%Dd$W*Cks?_;Ys?_qNR5NP_boKaO+To;eF!SQ9>Gy9nSI2Z> zR$$+Z64v z(aBZp-Xyk;yw?(9BL}ymjE_}ThvApfFkwb%Sg0JVJK9-zD(p|;VfpVW`cVR^{S#O(6d|CAqcxtVe+8$oLc4Re3MFJCAdjUQqF|%U9obz zGEJFt*NxMgR1;FJtXEp^unGuP4rK32(-~&)`Y+Cl6$Yl?YhD`+%A0LfAN4P_oC+&! zxf@pA0u*8QS_T>O*{VWSxeB}pQafY&6JtM*fg{X74%B*^mthSNKq|;%4J8Gap#_`#}J^hXGgVx;j z_2k(JON~#30kN?zRS>aKHG%S_7C|c`kWen?Hk!=j4c{tf%RQ(gMpr+R%eL!1-VIYpXsn%@4*T3K>)xc;=D*kiwoN=(uvE;Z%OBaY zv&(O@pRfT8(PlGw12I}W(Z3}1KY|?Ibzaaj^N?pewPv1mi1lxt9yS7-kGW$}??p?o zjabq&7*u)^v&+RwuyeP#y-D15j3MZEI(&VAv}6K5=>rKRGnj_B|H1oh0cp?4bw{5^ zX!SJ{5nBa})}8RAvqU1%T2W5e9?>z;l@Kn-7yVw^ zdhX+@(fPku{SlpzN!el-@iVj;rCl|muQt|4SJ<2r-x3>nx3ayizXMdhv%p=TCy^cM zYtBd?CxKCS3nVKgTO~5dDG5_HL}C&NB43}fck(W|x`JkqO;LbZ z3Xx*1B0-U^7~~S*Zxp)f=EZ*$LzJ9iTN@=9uk=yILy>eSNsFZJVqu_|o|U$+9C>ub zNDGykgUZPJ#*2tK4|4lYp<7j;zcoX3@kwrXsj5!Zs`{k@y2Nn8bPIkg`X8o>iL2c{QfMSi79(ih7~3fA7^_iEc$1srq&Y(YGc)UshU9YI zw+Pmm^TCr5yFA{rcRY&q8Wpq6%N)*wCQhd({TA?6^0xA1JmB$s*Yt&=GTsXw>?-nx zU@T7$I#Y3$+vwR?#`K>r!7jf^O&NZNv8m$Q*b{6@@etjMK0=Ryt-4_P(K7q{pX|K_ z3k1{3hwY~ZIypEVKjO9lob$S;)(rvA<>gTMHES*?JP_n=)6qu2?<2t?-HQ>ubzn{^T(xS1Q{y&^FeFyBOZBuC ziZ}hO$&hePla*xaCY$0+v>UBc0T0}I@poNrc(<2=vFZm1Q8*G9aaa*X+*XWAyrltf zv_rvEs)%<)7h&I}OR5bgT|1n{l9C^p>|gBuhQkBlC|@}sv?q>fEk(}6G0)tX!F%KlE>XUh-+Dc#=-_ib^d(fB z(NT$Sr{{_2*cnf3F2;$(j(JG2RP3~y^Lea&I(WVNt>5s}cE5@2G_i@mPB2u;UN$e< zPq0J~B{+W6i+|xL|0ImwZ8&`Qi5DduxbL-bChkYfJ`(doV0|Gmw&T89^13l1#^Loe zL4yWp02w4`u*M%*zf$%>)F%2P!iR|2;-HubVqfu+wftZ)xUfF`#*sJ;_X~07#j{{V zy^avqr|8|;2$vuYiI$nfUNZO5*ziZ?DT^elC6ll2n0XdP-wfZsabR(~Bl+vh3ke;d zHblmj0UA#hB%6xPMuX84GKCB;met6py7I$6W!$f0E#P*7ZOER*4wb8^=w3&=SeU}D zl)se^=^xMjJ)Whgv{uadndEu8qZ)tTLD57PT^x@Dc1}7q81L}!o-$cBQnwC1KeV4G z^BybSC?4<-kXjOpy6)W(1|HY zOf^R}yQ2?vdg(s!3=?itC8>_99$QSPx0vuq)!U%b9W{94P=+`@g6<1LL@?#hDMR;v zX{SEO)+R^gqf9k0%lu!Rt zPy3*JI;fs*fz9K8)YCR7pZ=?!n$hy3`~JJd{uWmwK86<+i={ZBo8Ps^wOs;Bp$eEN@i8o&ttPdz;W<67=D)%z)J<>yBb-9r^zr`)r?;kDXZRz3b-5zb{{XXbKZ3JmDvvK;j7(TJZz|Pk4bRsNg|4 zo}k1NuHy*`cyJa^kmFF(O_0HZT{twzB`m`eMDSo9o*=*zyzvAKPdGOLpDgqh>i7y7 zzQW(0fP zqAP?eDukgG!iDg_zd|^pLg-#0oD2{66+-(8p>>7O;!}mtphBoqAyk7w@o>)22gq);A; zk3)1WM&4TNB%)&ju(3Ocko1Hm?4Ee~;f>rm=^vMq(lnc}bgS(KakK|gAc0I9Yu#j8 z9yZ9z)s2$GOE`o1?1{35t&FehFJ^&1u?4}K6hfK(f#4%g6v;BMVox939$G0c$?nOj zWKFU@R&$Rp9XlI|Yo@p+4}~y8zTClThj024V*s^V!;6u3!cR)AO1H>YS!tAQsCYu*D52pRy-jU`;W{|h5jS+57(_Wg00)RB}Z(HI2|St?e#`ajOfjZ}H^ai&(e3_cU((Z%q>b2jI21@#kx-)cs$?_kE z*xS(?f9)Lugcc^uYwbSPtUYAUV)kV+gI`T^VW`>GI8IM!Yr^KheEAA_52*^C=>>_% zfnHn+W@bv@|pgO|}EJwdnvymoJma+$ZlmE?~?|bm=n6 zn!eD*Sv2tjggIiXMbgJ2D3G~uwrPpKVEun-RSnt}9Mf_Ywuz-mXgr2N-VvS*aMEn) z^eK{A5|LyrbSkGyz*$MDgbo$n@iRL)<@@8T4s|*hz%hw7m&`NMGig0S6#27T4_ckupH{`fTMZ z<-YP?xt%A)@*Ugd{eNlGy5>XqtK&n#)0R%Tn!-e3reC#u1;=HoTn@-b4+dB`POxL2O>h~M^W)W%3|o1(|m(G!JtvbJ2mjCw(}QBW=$g0fK;)B_Ddm#Ld` zfLWj$e;b;NX6d#aYD|mZP=i9XCeFq4gKd!ao;Q)C@fSS6!ErY{PK?ttaN{?*;;!5B zK{GZ<-;F=i+hzydoYQ+x>&5g#io90lO8o%te)L7%IdYnb3#clT=BX;y#+@bnWq68nP;w9vwXk)ia*(e0O6&K4o#R`({fHiShQao6dD> zRk^n2Ov}^YC1x@npGgdp*5wQhm1UX)=g7=M7Urveq!V=_n4kp$vI%wYHGTet`$oYa zOD{|3{COYZ@}jdpPG*r;6ObtB^_8d0gAZh?109nhT_$2!g1opMpy*P%oSpA38m0Ji zeSbz$@y)%tp~h#8em@th`U)RamK1k0AoBHwISx zPd|z>e-uSd{GkCRqlgb+(Nu^g$%AakU}HkJ=A72A9OJXC*+hUSLgXu3Bm;EkAw`xg zE0pb1hG`pDWtxQl)%0DaABgL0ly65`&!qb#fn_)5~PEwwr{b2I>@CnFban z2bh-AQfD$M(CTknS0EX5#+i)K1RKIVjT6IW881znYg{!co&{dNLk&(F4mCWIn!|n* zf*NF28RnXr89ujg?XaHM^9sNj;&@!&iM!MC;= z7r;o}#J6Xd35L0Vq5Ly)-EjwH+sMSQb05$UaG3);*jG35w--Zj{RKA+l zqOI=RpDsvpy7e(@?>A2JBe%nZiY_k<>6|ISJ!FnsK(PACcZ*naO*YN7NNzUW zFb@IcA?(l*VcRv>p;trrbMA;IhuvF_BtOw_5id7LGDkMfz1L<6Y63ay{|!?S2m*MV ztx@qyHu3iIB$tiGil&QhO>X!exdi$V{Hu&C>6Q{C4lF`%iXMx=8xbjj4!q^RqO8T@ zt1a=#xY%DDF19z-DRJ+9$}HkkT{eWrTrPJJ1@);}sy7XIVkp@7 zfOPor$I_qdZ+w~Ejici})(|FS-A!y#q10}C?Tg%IK-B$6`&d`m+)>vUpHcNu#@au2 zZj*-Gce1ovd3W5qi`$Mg4(>M2asDRm^PwB8a=h?42I$2OQj=$We6C4}UvMeVN_bP| zf>z%RlsR>bQl}OxsY&(F{$(V*ZzN3LXCw@?nLqYbYSheSu?ol%N;Uss?|CONrqJSpMpemfz~s$C1GM z<6?3nnM58Z+n}|f^D5(zfqE`kLeheG5BZ4#y^yrk&rYJOc~_|EylM(I)%17=cs=ZV zo(5`$+UpJ1pF9LsWqv3P`eelGn88&My^2;fJb(Tc1??zmj=cqTA7<(dM(h(@_Byf+faa z!2F?tE=vLvtOqA6V6XFfoRY8+YU7UUG?(L#<~hau3_0)%hOL8t)7FnGrwN3xj|bl0 zhzst#dOEsa>7IJdb9U-WtIC^8O$rR~8_Nv#vT5Xd?@D1%$;}AX#+q-jKhn@WOltkU zlGD+^D<~2o> zvQwlcHd#G%vbNih(Xib&f{B4BLF=#c#>Ch zJR+!^SI_&*1AROcOWVd4`qhpMb%O*E5P@yL_F%MY=_j^dJWK%c#F~OSahTvQ!7=f0 z3Cvh^lhAI3+k$%2fIxTFD*;_=xmL0{BEHB|)W7q%IowS+eFEtXD1iz{2yW# zQ|x)gQ0iA}kvdN7Ee5o`X{(s_TYMI8m!lGpBmX0=kk5k&Lo&F`Z;@AxQ|y(TkW_yi z^3rUc7wf5{QPL@Kt>hR%f9XV-Q>X)6xb_rj1k0jjV2A9AlV70%dZ%d9^G_L=_*Ns= zuXaeuX!#WREV)Py*2?KL0z$q{#Z(+oL2Jq#)l7x0B3`9NtWnt!5`|fcLLn*M=;cS- zQd$%xcD+`bN^|8HrAf_=#T0Gsh8xAkZIMElb%5b--I`Rekt3X2=-W(Tj5+V?Hz==g zCbZn-;w@PPz_%s0z`y05vP#(meVOcV&hIKWHKY^HKSC;x%3H-+pqfeiO^AtppVmm~ zhYIYYgstbO@dT^>CAFFAr81X70{D7jH*vJy@uk@;ipE*G$Hs6d-!?jv!CudjaPHlB@9(|ptcnO`UGTNE?`gyDR@G;i*f2tT%HADRavl1A5?PhR4 zehCbk0GBd~UdwQpNh%rG+u=nMo7$Q#lrJ)>zECbSb(DM3+lXlh)^64BSoBXvfO`K= zM_@{7d&$IYri!qWvK)&7*VAqKUZ>(@mJ*f+b z9^Y|X)PTU@c4|k|9rc4(Nw9)ct#;wHqicB0>VrH75-`zlc~!8L z-80y#Inl6(q}t)@wv@Nv3F*LNIMAw-WC>LPs>Aq>0ndFy=G+Ot+3YPe*smDJ_H}AS z&i-_2?Gl=p#8JV2t%@gwbuN$io4<{tC+iX-J3?tDgj6(G7lOzw#*o9F= z3CH&rMBh%L+FM&XLby#QuU@UQvK(ooI&$d)pp@^VYNvBIHrBlw5HulL#a@_Dlm~$yp4l zV=SG0)S&O;cAcoqR*s7-sWV~ukIq!!?!86r@VS@L(Mop;pA5Ef`CGZi< zN*X>QWxWe$VS?befN)VTU^qENmMwD_AJP@m^zW&83>yTyy_1rOI>Vo;97Gs!7&s{0 z6oHEMiU}IJhO3z}83cDYTZ)m#iu%mumOYs~t6tN?vlGw$7(8RZSg_MSCo0`lXL~?R zJrQOZ;*1}fi4hwk5&o^YEmhnN7Xe1o#~j2jH>KJ;BbLtJFoB|6Q>4{bC)txP4tQx@ z)#Y=oF`a4;3M7Awi@s2AqEFDb=rNbHHtEB?iCAt*_qTrY9Cep zirP-igoG3t-DZsn|9u91*K_<4HDK>`tv&ZjI_lD+#^0*`ST4Ly-mw)f_tS(1Kpg3V z7o67e1p!@ZWLY5mHp2oiN+tV^n}Z9hAd7A2eK*S}bf@O9=IqPh%NiBdcZFQNFS!wZ z9YiqAK*7i3u7={41??07f34le<*S|xQnlfq1_Xx%h32B|8;0peMBx;CP&BYT0=GL7 z4%T-3RjfZW%5y$6uGfB?^}Eg3qSqH)6B0&)mWU1XXm~LV=&)tdsXP!wm;50V$I(;h znEmB3U5u&jD19XBId3}LY7tNwaW|_segkV4>j>+<0ihVw>kx__uo(A9@5TpM#7k9%i$>H6sd{^bquBZS2SS`y*-=KA1GJIzPI+ssPNUY*qWhg{)lku)ZMs ziNTL!jNhl)u<4sA(6_?oDnicvx*nrApfH~{^@^hRu0pNY+A=sBM#Vh8tqYIuY?*O@ zu%m6}{xNP61}ssr3KeWuCMhwThDy1+GJ%lQ+}i{*(3u%n-nH}Z@f6Qfg9yx&gJjjq zu+;r+tAOLBtzp`5o>3$!wFY)jO#aJU1 zeB>R{`Z+EED;)zUnAF2|7X%BQqoYV(BKd}C*Vck>l-q)_B#oeRG+%E==Yz ztDPl3G(b=LSDg>lj-e)Mf$jz}!#K>@wLm*orq<3q_7ZM$E2Ng5r+hBcN~-*v!&2ks zk3o@ScZm#;?6(1D*BP9ku4Zm{r?V>>QQG2CUmx!8m7;X;ag-p8zsBF%^+yBOI(Q1&WWc>ZNd zP*;p1yz^DE{M`Ati%lsPbDVr^XG51XW+1SaY=i!RbrK^8KQ%rB{RCVXDZ(lwusH%KgQ-UaU#ESZbm;#P zE2>|*x^m_@-9>F`T8sQb9?@o3u0x)rTtX5&sCnNqa18uA15m}*Bh}v6=`_L;Ms9%r z85829_Jl1uwUatNyP)h_m}Z6Y%}Qnm=9D@A5IZDIsOqXW(#7;UXyg)UOB zQYWGyUNw_E+l_5L=%j~{I-rDvk{UH$bq9up~+)Ru_^RY}{Ooajy=(yOK?9p4>o(NEGLN)ZlzT;$oX zpz1W5rR7Dk7P5+XGX&>&%LO2tb%XU7W-@$bp{$Wy3$Cl6Y5EXvBw&P@Y=UBSH-8ZR+sH_pwz-INg3IxsgIv!TFoU+8<>hrXwGjL z-{OiCXqVz9G=q07_dZN&X>DI9TPcHOoRaOM&X(Pf`Jk9i?EFLhLQiA*_IvpJ(c!J^ z*t^O(=f<+xi*hsdFSA{K8sLAed^Ki6wLWm^#O9YyYA$PTYo5W*E$GzXwa!+zJ2;jt z$W-mx$m7G!3U!_mh?2Mru|GQ0U1PJ4??H(1+)QKiXUX0GU^Xhf+h%lKg2U+61RSv| z9<(50qh@?Xa~zd=tOdDhJA-q@`dtfOy|QSwAYrcgrOJ(d#EIZ^@XKFM+E zL7JH3pXbm;l3ETMpU%h-=PeALx~0+dnYDxQ=SoXj$=+|%*IVe%=Tq@k9^G*u&tVBC zms!!wWDs6qB9F zr|Jm&A zKxKSdl?Z9fVWaoMA5bli1>*rpMAfHxR@|<`br)LNAHu84! z{wSg?$b(^8><^H!^qQs%a`p`4{+Uo!weZ!}gwmC-&}uWLX!mPG1*&%}-7a3`EID(N^OVXJY!pnIL72`o--Pg#^w(fnCf z-?TUxcK?5z3``lHGt}+8DEca5KNW40Z#@cee3C2ub0$f8oh4q9J?EjrU;P2s4QF8` zhb3nvFxyG;LIT<(y%GZ%w7tvf47%mssbE~$3R$=;e_bz{bRzq7@O^MccA~N9)Z5eJ z%5IjMmRB@`5_NskxU$yriieiv?N3+=;G@8_i`$Ac#T7-6My)7oQp_D1yIxq6|C);> z0sce##x%&{fnr{>yy5i_dK>ew!2vIgvQvpyH{eSvy;DCm!(-1Jb^baBW8Jo-6T0s? zqbO^~;&j?hsqrg+j*W!>p4k1d#V%?;+En_fIlnvkC+KRq+4pyz>7ZtvhTI^sBAwAF zH1oC&J>6d)3lDbX)ymr0cZ5OtZU0=H1@|0ioZp%5wL@u?xxZk6tM+=vdSpY7Sy9(Q4}3X z3W9(9O|*9-7}z9W%QZFGpOA`N#9carpB{N}IN_!q;c&pafiQURpu%WdLj^|r|IYBd zR`%%zi_N}P_Lz0W@wIWm^b!{Hz1YBLPg(kOFo$`5x*g~0bcRvUbhxckkvaA{YNvGS zyN_zJcWRjHFXAObPxhb+{*?eTp+SM!;865!EAPYp1o?CGH|DSCdhPT-w$^OikugO3 zD>I&Q0dvL&?iCiixUQUOU+OWN*Vw@2@g8#%c>P#4FgO(b*8A{VZ~wE#i5LfIPpL)T zh=CkEUwAIr0c(N_z#`A_lEMF~2`-nqdhagPwOu=K0;C%3b+9oPvsbYqSn;fEKNJ&3 z;g}bDR>=OsIk{LEm$Q5|uK7Oe<;b z8(lFiFH$y;THrBcj)r~20P@#-6JRefn)P(6eVJf+A{ z0PL7z0%hSjP!_g^vM|`IT&4Ug3*S^eQJQ{TIkM{rSEwh$fCXioO`IV~c*j39G8HQ) zDF150_n(XYhbDYsBAD56YZUwc)`TyT93Td4qELF<-ae5(aIZ8<^q1C54cpN&84AN!U0Z zAX3k=Y^Y_d(bP6pBy}MbTxHpDPqBQt|Cx6EO2s@SQ+xmQj>7HkzucX7=pb2*!Zr~N z24(!q-O>F2xjVlHxjUF=6va4Fn2&S_Ed|}9O6)2-=pID};XBYhI{z~75XUIM3 z{};Y9=pJ447rry-9<}@rd}q)-`f~`r1Kp!%hTuDc?$P$Y@EzzLb^8x|XV5*`KLp=_ z?os6+dryFnA_{1zt8z4$W|=K)Qmo)!*I>TwJ39GurM z4sIc4APwBaM1rE3$d=$;Ok`;S6IphMS&uAFVInIsILON4^BiQ=6(+(ffOp~FW+EZw zOeFLva~!g|hKYpLGeu=J=hPxc9mc^QH{#$=6p!QJPg-#Br>4LMOk;8g=~I}53=XrNaC#w= zaK?{GI9t4&Nsz5(66Bkhge~WynS{(;Ou~8i3m{}2ViK}bn1l<(863jJ^BlsZEATFt z3z&qQ+f2e0XyGMXeaa+Ut6>tZ!`DJkv@i*|pW$8dx|xLh-yA{#d@Y2+VH`q{5rW?K03rCK2Cvmd6K~-K0D7LJ}m`IkB#u zNnFI)yEub$g}B6TFL(J~?*b+@5m7wD-+#4)N_U4slC^5r_D0 z9EX^o6$d4NYMk^5PFjYO2He6)^KsG~oHP?I(s9ycoHPk1jfab!IB674x)CQ0g^Oi4 zsV`3Ig_F9%#VnlE0VlP^NzLKH6ep$Nqy{)Cf|CaI5fWZTB&Z`29!B^hQlYe3D19Q7 zmI>kW2&MT#X^v2u2^Z-?X|hn7B$UR(#ZI9#N+{hZl!n5^GNII0DD@IbUEyMuQ0gF* z+6txSaA7KxQiM_ip%j6OJ|BLU55L`q57YDl-uUpVefUp&_+@Z$%ZH!u!_V>IXTn9g z4?o$5pX9@j_u*&n^x;RrO*|yjhrbN|yRQ%5%ZKmk!=D8g4ltC@hi~q~H-!s|58uFt zkNEKWE+a8gp}buvZx+hm0N<+@Vpbncol=rg(v%NqX z9~>%qJp-20OR68U7QI+esS{XJ!dgL}`Et93TWyxnrNy=RMuD{hpF1*!F>t0l)u1S)uEn_Lpd(0L$4W0J`l3S&@s?eS^q4w zdrfTWTU;0PB5)BAMa}II^a(OtvjTDzUc!JT8PIpt0DsL|O_+`PJ!~3iay4a8frICf zUd=@9c&(ilVu-&Uh$diIDAd;eRwM2ez89PRvVS?Kv*Xtr)@eU#`?O&;tBJI~DY5He z_w_KEk3#bshOqJdT1LZ)u5pNieMKw4y&_--aQm07om6bRh_sQkn{<=}!fbwyhQVc| zSEM1&FPlbnr@B!Csq3k}UkQh({%5G;2!xghBKm~*nEI!lYX33_tJs&}Mh;NPbaVRl z*N3Ki(wEV}W_m1LO2>x2-q2ss+v#q9=)PZxRF*w!9D&#pabE|0qO+1EVA;RCJv53+ zfdgQyViwr`ni}wy^$oH}C|paf6PNAD4d-s=#&V@x->*6aT>tyraRi-~2whY~P*O%r zwATg0y1DSQ=wn;kf9FmB#(wGCuGM3+HS;P*?4O{|o*8t1bBPyk`|E-=5q^z#*2MZH z2Oe4FwP`%S7vS|}zHU*tVI?DxI`1evVUsHEj4#BkUe68;RxF(r2-eREd=+eYn`aeH zu;5c>>UxCF3bftxP1iz&pH{v7(jJq z2T{6P6yg?zH<0b zv^jC>(@w}%9SBLajz|ni6(7<^Rfy6!cXZ{gbAJ{lHx3W9{_&liJ2aO%g3VSAdB4i| zajYSD9%bG4to}C2I&VIEv+eMgGhfc(wU~*${~!1hM&W0?_ze>uc45F6_#rwo3a1o` z!@Wo9tNiV9VW^8kp3bH`+^pO`Gjd}JDF7h|k=uOQ;S>nXJCaBIEySmmKq{qf=nKEx z{9L`_LjB@A18@)@A{|f>p5$^O22?~Q+o$sVmkS5np2oLd90POqWb%j@{_9A+ayYX) zl(M&GfS|(ZsZH-A5l6+Ilgn6T#*gvy)TU*|A@Ofdlf~ zIFNi}86(1Paq)KryP;#nnOy&Rh)|ivA8#K@#0#aKo$N~rI74xzr$>t=_1xvdQIW5% z&!O?AjDK^59T%D|n*Ut-SyMgYrpR}&(fvIq1PtMd{)?KH7b+hVU8<}qtZXJu400RL z*7{*FgI=TI;m}3<0;%XawyHdy4~(A@1>PGzaD+V>1a$ewwegd5)DlU{Cu}n1GB>#hGBvs0V;;C zbv}L^7XF-P`ktl)j#_tZuy&(%xAv%3uFcn0mX*YVs=^!!@yT8S`!<`St%b9JU*)=! z*=+azHqt4Az`tTNd1m>WNbB;^fAE05=|K(!Ot-jfw6DyGe!4V=5@O*p859_;v&}`l zcVG%(7fK+By-3!iM%pj|b^uI!Ygo2zqaijgS-QXFLewlO%)0fX)l0rgP>Fb?v?V*j zFLOFZH+%kcgrUsW))lAliE?sXF4`vpEp%*-{h3T7+r+?73y8^iL#o1FF(ux1!JIhT z1?(`cZGscL>9jz6X!y2`Rm1lQ_OMF#-}`p1hYaM-Lm}z8f$c0~(Fm?7Z4qMYiYI0G zE(wj60Y9!tG?YqzjT`O#Rz!HgH90^0E0@U|8RQXW9w_z*I}9Iw$%Z*`OE!oPjp)Ea zm!2xF_+b+8mEfs2yset@%q}q^DwDUo*;?;SF6NGJCd>u>Boft(%B0Sx22nRqcTpRU zP|I%~j;Jauj3=^N&_M$v^yUOu)(EXSs*c_8o>a3HAQdVX>r!pJ@l&nD>A|ZIU|njJ zyy&TwZ1erX_@yZY2{03Vne23FVf?<7H7D;T97+dv0_%mY8@{V=(f^^pqg%4r2#X@G zkF{paVx4Lr9TD})M0uhsejS+1&Qrqn=)Irk5-%}u;B9Qf`R*MbmJju$05;S*gflrK zd7OV#{->(2IG@N4hC9HpqGeTbWo>q6@r!Jvg0|J0lWO$5Q|a`;c6r6*GO+0BWVP?{ zVhC(6Du92cY7l>{IDdcnx`#>#Y`-qMmj}GpEeS2kt&I!;{ORy#0>jf~9jUD%w0P%?ajnvqE^3!8CC3!Cvl z&A6cE3s+XSI69=!jL(>-Hsi;fF_$+p@g^C*SDSHTGkkA0&srKZi)f0opoMT|k|4Dwn^&;%W2tIQ;E)J@mrjjXSms>sB`E7Z~kqd)rcZ`n+Zi zZWkDZRBlE1+mIfPl8RQ<8a;iP`cbe+C@4-8u%5RWH^z2&>31$^%^v-G1a7A!)_9B z{1<|19CaF%MfIVsrV1x|fcZwp-WUze2iGpT>VO+wt!dT#(0p4ub~;wtIIusC%J5Bd zKt^ZyW;^(YHm5n@(j4&F4!CTGOOP|tbhR0|+Kj*1jI6!cj5p2j?Q_75%kZ_cKYARkKJQ&qvKYkQ?q!*yhpq@yzf+?LpPzD3+C9(7tjS*QW!WQz#^T>1*a;lJO}SB_IoQ?is8 za6l|n?pLNMuiTs}E-Ca+ChlR^=N}|MkVN#pA&KiYHukN|`6pim=6Dq!P&|j0*L#W>O|#;=!sO$iaq*6I$UZpQBY=I0 zVX-IKh9U>TmYa6172!&;GFh3WELMU?N(@=RF6f93ZI1Iv%j znBg7YWEh)vL7I1rTjlcoX4+VsD|+WR5)th3k7W<%eUBjL zCP$EgcfSWc>PKezF7w3xJ#_d3GcZ?J=v#Cq=hF4g8JO2wfZLOeEShW)62+|7<(tFG zWx$R!6x@(QIzUP%?PTq}N2(;5wm{N^E>&-JE)t$RVv>oPGh?ipGsq3xLWR95DrT{L zNPSKHOzrSUZ)F6f8u}91e1--KaU4F$M9k)4{4BDgol%G-*~8cSw+Aoc2kl(N9^ac8 zU=Q!raYM*?9p=}WoX^uc2Mm2N&g*E%c_pw$`Iy=R)6fQQ&vT}sbQWgDUBePzfo9y3 zRm>$AWv6=hIPjkJlLb3zizc-(x%0U}&_2NZAA~{J(M5i7kv4u%>WKJp!IRqPfr#TD zBi{D~@%}3pN@4;ZrNFtCq?K`!Hz_0H3lfGWbS8sBiQc&p@tOqX{xJ#flXL{YIL_35 ze6mLDd2W2Ny#S6k2SA3!HNhdl8NnV|sh~z+R||0d#LuCG&b8I0NdsGmr0s;Th*4gQ-{Dtz^7FA2{7d4D)rOBL=|e<6|8> zTKE$_L8{zv#Xob6rgcU*Pm$BSOZjQJwlurUUti{3+F$b)%QU(ytbLdgTf6uC{@P>( z$Wjz5unB=-V&}?X-&xH7&Mzv>m5xexrL)>gU04kE*Im%QQa;gED8FfG>OQ5oQ0s)s zwaZX{^;-4zXQYX^?U<|mr24Y@wwnD+tx?Y;4bBt4n>bTL!+giotJ^E>XcML@JQU!v zX47>waj)Xv(F!g2HSr)AZYiZK(ekxe{3bY|J%Fa8h032)Yjhla6be}M2-FKD()ZIl zsaNP(sB@pbe%dM zk_?8xoLi{Bm%L_>{6V9ujG9L+r((V6L63R>-GjG-zKOSnF5#8ZGw2`y+KXHui3CHv zK0>EBQwP1ZvsjB*t5_I`vgo!;53WUT0Mn7=JLiybRm;4x+OQqCIT0}T=rQ#Z*n~Tebi{&`zU;86s|L>bM};weU9B?Q=4SF_;D%IQZ4=wBku7yX!-Pw#}Q_= zNJ|X;Va?-lEQVk0wZ^QDF(t%&&)x)3VsJ=I@}U6hs4xfi^eDYE+k~%#ADEx)Y3&g& z%|Yamu#eO&>{5{AmdQWDw@&L5PfpKF-4g*i4*4E5IOcoM^kn+_BYgLRVuNGu2PX)6 z6YSuZ?GC1Cp%j!h3I^Od=afhZ8tIEVhS?hiLV4$a*hDx->dX}x`yig5DyeG@#;Dxf z*mcgbRID7@6J(lodtgtH_fS2Q(5>|6v?Pgl?}_-p)X?YPz$hE9me7wFr5Hi-qNP-+la^y_LC`tm1NQckqJ>Hrwe! z#x67P-+A^}o5~?-J@VoqG_My$jg?x5K@{mjhW?BGiXjwfnU4X#Uxg=B>CA;FQo~C9 zO3xPmS~uU`xv zw&^>W?18#U+#Ai8+WknxlOz1Ts*%kfU*q?ZwO^`@S0{h9msiVbbbxE4tY+a?q4Wzo zvc>1apLc&)n1a!+jv1)EF5Zkji{$?TZ6;Jet5E{6-YD z?txm#vxME{8vdF!cs*~=An{Ih?_u>>b?(z;Sk;7Uu29#hv2-s(%|z@<>Z-xCGmI&4 zc;wEGlu;lPQM^+9D6doXyr`SxQ%}(Q*q|X9v;lhSX!69bqp5)1l8Ja2or8tGCpEk& z69Lgieq*lScbKMYb8!CqeWCjmMu`p0Ud=7Gw5X0QQgapsN^tK#S~D>)b9ICmkYXRKtym;Ot9epxkjE3*(k-Vzq!V{!XSYqoa_}F}0vL5_kp@4GW@q2melz@nn!y`hcoTfg)$fB` z{Dy5DUpfQAXw}ATxHr@0 z**ZTFy%qJ-;&dim_$rzfTqw;Z+|DGv{k_>S4ua<$8GFHKjakJHn+M+W-F_jHr8N8G zK|XQ1NRDgVMkobYEU|2ka!Ez3-~SZAqeq`Q=z2!2W)B@w{|5E}S#EibOKoPrmyJeSY@{UgfRJC>!IOSsEuelgRw zY2NQ2zvtP4NXqK(+lz_6f5c65+}?4XMo82TCF2tH3rT#Vo%&HD@9orwI|xX7U%fd# zPdcSV025PpKcj4M+5f9N&_zkJ!hE#-X1yIyse?k@r)K{T6w7L_?cAFasrx>|jbNn+ zo9+TBB8;ZHUb9n^u9+5GLH;w_|BE@1jgil;)PL1>SPrxDJL!Eq+H3R_#xP4vv-JKN zK_00KtQ_HGREcF{vj@zftTKt^?6A0+G(9cBWctPUFXmty^Rva>`0cD0abL{OGZSVs z_E=n=)iOJZyw3pYlyp#uJEMEz8%F*IBrOhIDoYD7vOA$omQ`;#H#JX)k z{6`7FnfI$n8Z(XDyMF#2PV0QINV7^)K#$j?YJSC@We?vAvVDiLC;n(Aa>KY36ztX- z3glXb;IP(T@KIX^^XFjjhmJrcz%GGobh9qrj^-5+f<~kJ(35B>xoO%E5xi|Rq{8aL z!!`Myd>uhNS5Dvk(NJXT*G{8gA=l@4#l0Zz$fBV;6Tk5~oXhrD#|DQJ4lj ztOYcsgVIeI2qiSRIj0n^-wFRDgS#u19@3~T1cm!ep%4J2c{ zLNRk(8@$k?g8~=Sw~W|g@6k2*tT)8Imx~F2>RU?O!+AoS)KWuqYPJKUXM86#R@UloJ%Z^FMjjnH1d2 zyz1)|Sn!oJmfUTH1>dKUF2MU!&xy!cHE)a(X37(k&0}D-XF+f{h6pFr5I?>po~lW& zVjPcf0Fmi)2_Gx_*`+NnUO52Aq_J-pxTLXc@PfE#3XBF^YnC}SW^(1M0;7UaYt2;G z$392>El$8MpBS44f?&0GzcKA1Ic+032#Q`AZ2Lo%h@|=;0;AM$I%%YS`+`@M-z$6G z>%iR|R(nI@m)*}8$J=&4(SNJG?o#CvJj?d2;cIZJMlSq3M#J4l8Z;B=kzR`&{8c)KK?`~_^{kC^jxU3rXJ34Ov^gYfveK0;} zG|)|PV`Q)$Z06~zX0sNvu*rl3)^TQ%A$3p-%XF?G&36ZnSl{M+V*Q@e>^QW;-NcZb zo0fP0=6(Yv`8eq!>0$Qkn&FQ~Z%AKAv;lq68Vc2t>SW@WS1k$UAk*`zGeUzYl2Du^ zbRRw=6qgaYm6|v*lY(r_q~Nbpkn0ruti0;Pj!@j}yy`!pCDf;;j+CZR)0?Q>rVxT= zL^ro2GWU_E+tWGpgOeM=(kFq2uo$|(#h(q&&Hil2fww>hyxFlKop;CjQ`qxKpTb5_ zSeEvVHqOi@-&w3ouDFoA%n!wG3l!+ByJIhlvaUr`ID zZ#ydGrc2<4i;=3@xqrALcqTH3RbVzm-e4BD1le)fMOleVZz;`o#)(>dN@Zrl_p~Yb z19x#lQ7^hL*=(!UsmV6vW>?r#9( z<%3o5!kx_YGCT~JEi(=>*E?I~Rkom9r&_h3y#Cn+8aP{tt7&@ZSFZc!!KUZ5gQkNG zCV1U`*Rkqe6CUQSJ$Rqma1nXkjMHeV(3XL*&5w&Clq(|83k|T7G+GB=(pc)*L;JTS zbUVqN1jmmHC-VOnD!oCeRpQh}YAZEuhB|}1=)Psw(nkk4@3%Z~ImBs=Rllp8*OPG{ zudD!jI<7z4gI1PXb}70ox<8bGTy&t+va7!P_RneEO?|c+aANFV$WMhPQ&Xrpu$hEK z5jpp3NZQWR)&oIBLpYsb?pq(S4b4MWf3zG`5vGN~EeEve+W+PfHR_=A9@l}z6$2C~ zxhXNtZH0lUi8E^uGGVy&@oAOxV(EO`49n|}anAJo`v@*#Nu;V&V1E6nfd2gc00o@4 z=r{UMmPH>Z9iXT!6q6y6u-3MG%f*m;a9rocPIKJw_Q`t2h$G3J6ihlxV(%ucU|3DW z00&{{)Vf zYuOjd*0SBF&E>71bgCOf`tF_<&8sX2zR-rsfj_Vdyn#~STjiG*r0@4~SuY*v`Fx9P z4fRX1WI3@sS<6^#IV+YWWkm=ISr1sVUbA{Xv-(+KtN+c<7-158KYH4N`_Wh!Em+MJ za`$tGP|+AEx?}E>H~hsF2<-FxmEBB&|H^K*tC&Il6 zmG5=LMY%cgUO5ovi;rwmR+ba;FBjko;7=(>IZ#T-uPrFLF}$Gu)*lHl%p-?T%4&1R z!;h0?Gi3mqYd9~9lcmU_)i-31WmCYM1}U*AnegGnqs}Ma&k%{12+QOf%9I)us?7aR zd3&Q7-0R#r;!BH-;@ViIqaL%SzNj;HgwT&A+2Ww{%euzZ>aFXxtX(ueC`=A)x`%a}>*!8}e*mJt760E{^COSd*heqT9pLz2%Los&udX7}m&9 zkwa`Oz(%7ceTW5Sy+Nn;%w{kLx}fOR^J8j{5J8%CHpmCSaZ>1X4;wJIK}rB;t3H-` z%mu@VmF+3uDM9x_zoAiW(xB|qK1KY>s#ee173x0v;u*EO@LBQ1B`*WBc-7(!#JlBD z#GN&}h^2~^5R0r#eCYs0rG?=rz+wA_&zRh>r;ndvZ*@%t{33s*9vge47 zYGA?O_7An5PfzVUsm$AMm!Q-`9qfGto&R9E*Kl_nXitH?FWBCaOW^K5cboBk)lLS^ zVk=%e<5uZT1`<2-tYbeu8Sehr=D!WdC|XZFfV7Yi}ckgf^}lfG1mDxNsc8f@ZVWQ+m3g# z4p}dvnA|m?3X^!){fEtjg9^{Jj<}Cc{O4D?UzqhNWgh8M%8xl%;=?Y*5e0ye4~i48 z$M8t==GAU*-NJ#a&_Tt<_i~T_lmqPIP+N%RB_5$4n!9wbCe-VYMzApvr8y%0LNWz2r@)D;?PzcOveK+P&z{lTL$o5V{G^XQOo@ z^cG2~Upu~17tE<7!(Hs<-J)A0> zbK2C!;G6onmZG_(baLCFLeeiX^t!^ z__5@DR4F`Dn*oCdJ@yC5oWWEE<)a$WP$0&z3MHshLT*(_$@>xNp+hkURIgW`+_<~( zVpu}g3H2p4xTXF_{Z5SqNG;N|qY)Y~g0w>8K)R_(*7Tw~Nv){&S<)BHfQJ0lAnky? zy_SqsE$g%g$!>eJ674zdKm{HieXx@c7@ElIE6E!T<8t8f46sp5p*p#7EBRvBF7sp* zWT6<@{tfyM=^Y%IZ-#~}k`61FWXmdqKCcdX6pQ_qeu9PR*M`*e{SG!%@@(p2Dv!Fu zd%lp0@mU7$F#i>{z)k8C>RW1G$>sS7eH48X9l#tw`U?8VjhopQ!=inY=-@9BuYy&_ zVzb`xKp1O)=gl$~TxBJ)KJqpSzzg0{K_jb+Mb?^YF9IxZ3s}a;gqv(ah5L=&B`>)2t+=vmA+LaaU8v_bK5)!(`87qR zXNv1ur+A!KX{KvDo{-^vJWl3+{bFG7hl}EM>~pk)wdEeS*5wLtpZScO&;0Q}`MSSD z3DIP0gt*l%I?DV=h5H2mot)h+W86U`b?f%@BL*iNBNz+ht_LSdU6R<|H}{NB>2*42 zcg*SFpp4Ld&Uf<$w#SB@9>A~{V??Cy8=Mc+(e zC=yG_ocP7aoOt|#6xU^$xFr$-|7e;7JU@B#0PAdy}9y712PkcD)@k^pU5eF8e zFS~4aY}w@l3hz^XS)nKV{j#DmJmaKDq${$`-3I?#ymv8j+|xQUuQ=oh0gPp_L-Km}RX7av$W&}r=D zZBsE}P(Z#m@_vW`e}W2cS*nAqEX7S#*{If6Sn+1?f_NP}exAxr{H}t9w2!q2lTTp6 zz^&$imb@=9m>gnc_x1+VKkoA*)<-;(5B#baETDHXpRxyjsBlobtwkcFV(Hjw`)a+{ zc!tKX+L-K@EOt?qDa&<2E0yJ&8o(N4!^5x_5lW%4z91jgFx%{tZ>yC;qAM|W( z%}yn(*?-#?SIR38+zm}k z(2Mo%!}p5TbKW&*2hgkUM~7GG`@Zin_G^3}QVq(w7UN61w^c789jz+s+JP4@)qUD6 zGPqMeQMxpzt*TPz^Q&*TLGYJ06xupzz2J;uFp%hrSBCbQ_PbI$fZu;F8Jbm>f~NQS z;s1CLP-D~@orNw!!74NY4qK+87tjqsTgfs01EuA+!bKu8h&d9b{IxCapdQe5G zhBRK73p$5tO08z-3tV6#XwsoC3*)53EipT}qvjJKeh;t*ar-^}V*VwC5aWJKHZg1~ z^E|_;`zUK$01nOXvyHR#B!|bH0MGYtog$-HSQGPM zsY}dw;fQ71VDmD;N5p=!jhXvpk?8Dd1~WVg>t3#jIlTsn^3}o7ufzZjb{$c4Yg~acuTt)b-c5n_r{*KfN^>(#!F`lv*lwhQ>(u3+U|IWoIMG zRl2+frAhI`vAjPsc?RokkMR!Q?gK>75CX$8xl6v`gRUdh^JVuoUbqF8m~ zx}(Bfk@R&5vO!MRk|{p7g4=t4R^-kl?=H#VNqTtm4VVY?O?bgQu7)VS$$jD>sC~-; z6CT(hakaf%KjnCy9dDNsC_5Y~?|+}!jHON-;HC3GzPeYPD==LfS0~rb6I5t{EfgUW z1$@DEEdx#0`lBCj3H}kh+v25N@3|%lT{Da3w>czc4NBV_vUN@P>K!O;Lo{tVZS@Y# z>dkBH3|hOQX}m2VJ80|MIvGE@2k>A+_=YXQEq2S$wR7}E4gqtJB8!-;IYi4Q#H?w0 zjC~}T+kur`Y1EzFm?OIWVT-Ubxag7DPZsR!Jmf!runPTt?@|d~`_{xokuXKK@ap>I zk!^}zg@JOs64)u(%CDL*B~`mPU?Y%Oo=T?3lusjv55I9QmP{NLI(#=p=lRHiBgG*5 z0^|=>|NLAOm+|5KD19{!-(zf5mQ0y#am;9T*&Mpqw=|iu&cb7IhS3(=*ivVZ@F<5R zS4*|=Xq}qiS~B912};(?TkOrO3wH4a=Y|Q{?3zWI6U00JSec?j)G{`E22-XsqK#u` zd!)?4m85G7na??K)8BHEra!Ow*j(38Z(|652Y9^i;ic6SSDgRSs#x~2N_+qzq%m$y z>-8;d!B-|Hy8mR;7W~Ne(3|muj?2mGVB~d-zuTeP5K5o}H(>oC%#Q2OKQ|(&uH^;0 z#?=JoDtzOf7U}E zU>Lw!$BLOxBXhA9+7)?{6F+qx`-xDSkRG;V zxi2no3LtJWJdK;vh=w8jn9M-!@c<;T`ITaAW)_q}A>n+VD<7 z!M|FJgYUt8h*`u6@1FSK$*l+RhO&?GU{dMnc$bungxO`TGGBOGyd`Dv$?SyabYlT| zq3s5s95N`MoMencFdO{?7+uv)?~|6t>XBLIEb|6Gp=iHILIUSe%<*Uq>GUG@iT}ga zcSbd}t!vLTiXx$7K@*w+me6fzLQ%jLdb5NoSObWFiX?Q!5(r(z1P~NaLKhSbAlNlD z5fu$hP%NQZ5Xd(d?0wI<xPH=25PoB=dg0y?8G1m_k9N-M`ixTj#YZ z<$X#2xwm}qB}&j*U)k06ta7c!Rd{58?DCx&dV+(=SIdwi<9a!9_cJ}2{IYfa4av=q zGr1(t&-uwQ<1OY*YBUuibd!bgCZ{moS>9y`ug7#L&#SK5(bxL6PKwjU2>6^2elXB{ zCH`{$I{r5P9{y3jCzGFa)~-3HBD@zzDMXQxURO%S{rrAKBz*VM^D3Zm_S29fk^M(5!Zkw5hd5{ZW}K~Qpkt?fzz3Z7iB9Z0yUNku^6$TIrY}O?=_X+nsXCot zM|$=L3Vt}AjYAyI^Bhknb42g+1@*zcAZG#3#&rwr4V3%5u`+Hr{9oZKw)J}{UG|bc zmn(Utt_YTd*QKr3b?z%yeBcUl=t)g|BU?jwT~bVk!nM)66eK=0L)<}cMX>eGW*2*S z5_E0GPq7S~@RUH#iSQM*Ik5Z z*Om4M))aoCa%h)Gw@8x@bXQ%@G+OO_JXm}zgcyd@0*H?h4Lk-Ffyxa zsTTK^{*^vWhtZJg3?s%C#v#T5#wo@H2IsWBTM46q(Gudev)TRRh7tE448V%?N3tg+ zTLNU}?)9bvC29YaLj9Qa7V6>UrdfE7I>#v6-HPMFX$etw-`VVOa)U=SCzTWFPo683 zex+Z-0na%fI0cecl}LlBHg7Et*z%CT=@ecv4=Eos%C`4FsI8U|kDblC;oo653{c}o z`Xja;$x09Txfa5v1D#DEjXzh|Ifp{85Xfl@)(UI|M%lX$3nB&Z@31>mf6vJcdu|G9 z1(E*f5{$xJLUUBj;ZM3kuu-^END~GLV}xnYb5J8Z^IZ5rDEhDmh!jLEA$x{G_4lp> zSdzqEFu$21dg1WB#|2j_J@HRbFOEXF!I%Y?r6^I7Xa$*?3{g}Kz)4z4w>6Vc=QhUJ%r!6+W>5_^FH#yNKD+C*-co>otuZ7!FfRmOd+=JWCVCvXp{4JPE!l2V?EvU-|&_!kaO{T6Cl*yGW<%a7n0_+&IX8Lf!%{MK8k zfhxq`lO4yK1Kkzczb`Gr5mcA%OP$fuTmCF^pA$iEdDOMVmAc@pe5Gz5sc2!b)_s*? zt(QykX^q2Z;{lN(#-$tcENKVY?X%AMo`?3Z?FebYfC0(xguaGZJC1c2VE!;YZY$Ayw@$?YCq4} zGn|59m`hZfqY@}LVkr-;itMnjUAqGvaS?;AU(9DcJY33%Q$!dbudTW9kPYLb@`*KdJWLSrLZs%@32`2)d`Rd ziX1(dKD*sm0rue-%v0ob99#fI9Jmy_u#^1AY#ua+z zUd>wrexMxbesmB9y2?>+=Lv~yIuLS znRCXnyy;Hu>vM(H81+9F^@AC)jC95g#$5(@!I&e^6K%bb4YYUAc#4>UV2QxLi> z{!AHDCjWk)d}X}j3i;!X-sdr3C%@X|S8jCq&%9QL82%S~@GG~t{Nf!@UU7Gtl`Xx5 z1LjKjGN6uib=|V!%beKToKHu*k@C}p)Jmg&>RRxC9i=bM+5yE&75^BcY;Ar&Y~35q zAa0K=?N|LvX8`1YV*GPJA&NOJ-o3DHnNv%vo?H6xBM&jMy+cy`B6hfu>Qof$B-87& zTSgS)g7OJ=vgpm)Z6T_0ZfOne1I=x%4q>7%_ARZsebIyO+Q5w=W%}C|jJmKlx0{0! z_Ri{p77FwPfr4FvTVB6k5s~)3Pe=B4Kl<%6M3^ERlwC1suw~B{ibRYl1?Z8?NV`ab zKM!b*OoWlnlCUiz(I>yw(Ks|x2w^A&NFxMN2yt^5kv{XsP(FttOBAjU2hWf=>2f@m zW%Tt+j=|S2FPHdsE%xmL^O3xyN*rX3W;G3>-xvvnRSI~yex==-KzltN?IG!c50G6P zhepStG5d!UvNe+M*jzkDf;b?7mb@=jf&YQm&^PmqSc8%9*z9XYh$a9})pV^Om2|E5 z_=iT>x~~ne*}9)L`XT4?E5QLH%aV`wa_~CW`CAuU(>&SSy+(5dEtGm77+R8$_K$yg z!6e8Fc2@}H+}`UibHYG{_+r}ZdNEPATw@C#83um+T}IIZ8dkV|yu4SR_r=Y$7?%|W z;7DnR1NCbNjs6MaaKjPp2;gU%#_7R0v^!R~$~eCB0I=;+D-oNl`%5G(ULsyCW*!sU zi@iL%N#Wu|@xbBz!*dSM14anAwbpHw+}}48xs|(C9Rn7&rYrYAM<|nuXc?=h%qLVN zym?{t2Tx)wE*f{A@}&+jw5o?|%tnwU6T@-+59Q?8PAWertn~v?I{l&1)UP0vMgN40 zz8Qm!x$98G;`9JqbVp28f^1Az;xuhR6lVp<*1$6VrP2^4tvlIwRb(Ok9zE;1HSk|| zYxG6XOL>2=pq(F|-Zi6qBNEu6 zzBvDkk7m9#W>x+XO_ThcGZ%>H0BC0^Jusx;P>_qhpnfSAbtxB9kZX@B$elR!N!~aV z92qLx- zhrUs=hF>aK52> z&1h>wIR>J=9XGIPet6H)29e(45igS4G4Bl~w+y)t(jLz8FCbO?pdh#|&Av=}@h3r-+b=K^JQ^R4rfI#KYHPn_uA!wk=qTkNs` zOciv))_Rz=*Cp77Sds9E7wPYlRlKVm>Ox@M1;sU88{7X4HQ!SvZ2V{q4t8HU_=BSc zcnbLtx}ty;6iprz(T1WX*_o#wG_9AXYBd>%DR`YJy@TAKTL6gBVjC}w;VH9q>1 zC(QYq`x^Z>7h})>Bm6P=p$!#p3^wtpcMc+!&UxF74}Kp$ zjO2;--Z903u_{xnfPcH(R+?XGD~%C=+vU#i(OG&-r2NDJyW)|K1s0N#^@lzN9NaLP zA^>x>bf2#@v#WJ6+!b8Y}R@H_6@OB?TZkM5pX0` zk}heEHwYqub3al^k)&$UGg24n2MLgw3gog9m<~$EoQkzLC*L2b8V%>FzkjEf+s%Xx ztIe9|n%j-SpIO#z33pJj7_S9xjDw5_#zh8~QO0OwbTGOc}kTk;@sy5F5B#?J56O#bEuK! z+Zz$lyUJrK_~+WCsnd*TTOcqE4$w}~F3>pk&VdC^r=!cvK99NTo!?P`sr%u3o33jZ>5|Kzz)GOEGj&VGbQa%JesM%2LK( z`T|B1$ADqUpt~@}VX;PpPRSO8q_{H@F7?utBJ*mr9ea0OWM1Qc0s?_5OP95gwUb3- zWw?{L1x_=rWjM;q{jkg8uc_p*8?zBbn0wMM-6!mT*VW{t3dsYDP|5uHe(1pKs6}2+ z%7EmdC;SzDu4Pl@F69*OX+CiEaxK$&DD~L0e9f~P3joT_01Xu77N1HUVrHt04FeV@ zhf@x_-rjId^ANKJddulRecr6V^HyQpR{>!0vZqRT4ZL>V9Bu{F_y}$l9&ONE;N;%B zzZ!&foUAHLxKP1w7CZ2pIrpJuqP}V*=2`FS`!7VgKJL)O(dX7j@fM3*z1(~C#^(J3 z-hKL$_5!b-Q}UMRTZ>P_KSh8v4g3+j5quFm6)zAr5QIU7LMx$*@T}swrjJ*GAXoAD z3S>VyP~d)h;O@F;OvlVx9fbb;k}`lYn{CN}B-ywSVeabmL}sE)HzQEsv|9m3c?0L$ z{J;grI|qWr2$~P6)F;vLU#m;{(-k=P(h2;kFfbhZLP7G-3&IM&-3ma{LlIECQ6yKd z-3qHTWmfnq8tMT@v5)+Lkpmj5h#6i7G$O?yNt`RLfR>L=@j!C4tXLc?k5~T?JSR9g zC^HQjwnXDo@dfy5{4;zPyl{ztFss=j*bvYr`UOsQdo2zwJYEo~G822Ry0`*lTI4Og zL~T-0^?7CSc4;#e==$unKs)ZSq%*;dRJ? zNrJhnq$<)B$@3lQ8|eiN!Fs?kQ~fQt4Te~Xse1CxO}NPLKiG2p28Rd84Gbj{*O`b8 zT$ZDRc$E&zC+bt?T2r5r<9t_L(P#P8kn>(MON`2+ad`|my7@*_!cNnq!q|~Tu zs2v6ph5ISg;4^DI`i=9f&fr7TSY2|9r**|9VCo{S)KYX+S&^G1q)+fxuom$ZS)2HD7O-Vu_;Gv@uaJ*)Lp{E*32(O!aVsHuQ|4Sy;u(Ph z$Cnd&^?2YJ&Lt=~J$m@o^G^&p5Yik^&!kUsY7Z}a-9|Uz0c)N+?-0-CM`zuheqn1i z5Ab+%SgkBAOEBGpy792h7i$0<-Ut73VXe+#X^e8Sw2%z;}cvDy_+_p>y>{B8s zfFD9+4c8KxiV(Kx8uUsLo`~)eDnuU%a^fM;H3D-vDT%O+gmglw3QqoZz#~NfXT_Jr zx5a#McZ+x>c|t6S55Hs$!Ul9<^XzAoAu0^Im8ifJeOOT@5*jlw-Ly7tl}Q}U$d4NQdzMaAd7Nh9WwNh?NRGUIP&gbo)p7+auE2pT9B zg=l|!V+)kA1%_gQ(xF&T<`cY(E$o8A9Zp;L9(0UwIw@#Kvp}5^G<4)xps=oTHM^B& zK(b%DeG@TDJN$JW!Ry4U7glgMdPmtOuK;j5^;(9phOT=bnFvfwF?ZLY!q!txAYi~} ziKDA2^-s0Rf+HX-lMv30l4u>}WQzv$?Drok`LY!8#H9eWQp@+KY4qp=A+u3rgbwZSVYA-D`R<~ zdcgPI3sop$CC_=d^Du@UzXfJ5^i46dbJMbVBGj>j!R8xclczOQu|D@-rrzX z^x=OJ4}JdiEu{rKBCiX*NAEcdy68U+zxKs4R2Vu8BotR}AL9~bslPD}6KO|Tkagl) zb9Au!{e7>J;g&q{_))S-Tham;fT0<;)9O??2t7av=U;4pc+#wb z^TK@lR16bi8DKY0X~tef1-PZ|NM)*X<>l3(esf0>#u0w2l2KrHl3P+nY7c%4uSkf! z{+KzHd`-m0Q6?es@l`N*SO1A@8eFp(P^Asm>_@Vx2=81^3=FF$N=^fvYjZffD#YQn zxhP%U#@r?}P{?n^EXfZ|Dz`U7iP%3A1Tb+jdmO53i9HwcmGbgb@S7zpX>~4 zh%N{a^?d|!k30r!|AF#VPK{0oQ$U?2FzKYIHU6zf)0H{0r0w_5DQW0eXk%REYzin( zS?^g&Fty^`OqGEUseW9`0k)jooFg0tCmD+25I+WZ%X#0DQ_|c1v|%Q5uu7o-3|49u z9G6G8ue~iHbmzSW@PCBnK5cMnd-CvnuCp*N2Rv+ui&RgO#I%9+a866YJid%zQKLCT2%W+oy*$!L=+kJ$nBH07P*TK zeUFsGYv7IXyXMCzLzzv|ZcyxkLlx0v^^HRDh{5_6{sA5|Ew&Qe z2nUxeGmVZ`USjZL3LS zl0C_XR0!>-+_iT4n{Si&q(k2s5#3m3Xz(9(R$ofapVfUiFDtQ&t#CVc;?!hEN)zOs ziLhOwcwgqv&%@4a$3M=hVmaO4NPu^?oP_rNZ{+^WC*^i88t;1JCRZ7mBjkh8FeD!W zV}FLnqwK7(#Mb3@`VMPo6qCuY!~AoK)?`{lzpeu`zU8kP)^>Pkj6 zf$^5%=nlz;s^P|=s^Rlh!%l|>X32+a`Ib`IqE2W=q9Sf2hvt@2v$U_US{b^Houi^F z`!C5|k(Xq~XL~{6lru0IN$t%wD6wN!&;VirS!ni$HlMzf{%bH~JFuqDl_;_3IrPt| zJSO}QRI%r>^^w?B3=1f;7>uR7Jcc=s#qi^OWq>BeO5SarDzAly#N}JEqMgqf`m#b< zXIPh5C3aC8O5(9UyQ6^2c~R@d5498dwflH3K#ua4vZq{5A_jt{(w?WM|5VhdaxkTT zK7FpFupLJ#joT(GwZ%Pu)i%qS>~Cm6pJ>2DcSOfE6rr$P#HilX;>|zZl5E5teEKX78!{!Z2UwhZ$D9)ZJ4|$2Cd7s1x{D>Tj z_b998^}}OPNod5#|UwR!b@5D_kFn* zFQcm$CY2X5BCA4c(X|G8(WJ>s$g4NaE4A@q$<3KR zilX8!k#CV7kR#hMb9(t-B|u0XA!Dd3GhX?vpsuHGr-Hpyq`{}~QnF`FYGyEx3hJqC z)KAo3)GyHg?MD+cz*(9m>p0Dt)j}(xEnu-&;18pmg`=y|b?Jp+G`=fc3W*iDUK-Da zLYXRhJBATEOZuw3rh`HHAG)ILqcj3+97CFm0Fq4nap-K)kN%`wMA{9WGd?gxj2_k) zYcJ~;FNy`0@Q<*_{HLru7LK35AK`%_K0+w1CX>nL97m2HXIEIZHAqNg+vZ^70Ve_R zB{jFpy~mDLq{}?=Q|N=j)88{Ko`ONR%t^&veVmL;a=mG-53hl@O@A_WG%i!9Yl^@; zZPLzjYi%;hd*3vpc7b~)wDlmR6}_k)wXgw&HfwgqP+C!xR?Lo8)Q;BF_wVCT#u?lT zj;&`~F3vg3MoLz4!j|T(zvK8R596A`~rQgv!db<@|0H zq*px_gYQ!?(_pG+eC~$Ziq~?(AC$FLs!Mp9i1b#>Jo1}U$0>owg4xC4sjRlVP*Z5q zx#(O8`=SQ=d?v>;6hh!-RsI?B8SV zdch6JNc+bJ(NTzy_a$fTkY7uo1j}lmD1-ii$0|oY*f`XBkJs*es6G?)f0fAHvchgGe?lbR@6TBG`W*r(UfIL$J*GtwRw`G@28SzJ5K`jE7#5`8HS z^B^{&24Zln+Gn_|s9EW$()G-T|x1yYK39(%xEg++kVzX%6M#ETDBr zfLsWyDbBboZ+MT6%W*_)TfRQoVQD9WHVX=Ds(DElLXd}TEfvbR- zEjT6EJ*@Q+LBGCcCxL%r3c9G3$zl_sz`pxi;STS1W^HRv? z0O}p1em{^O?FY7eHzW8DfQ<4$g;U>y34$0g`kEqCu?}};GQsHJQ2CBNt5{WKKW)@q%no<1* z9;8X7oyVV>vc9G{bXOWQEUY2njy)VE$Kiq=>U>|f&`$<*$|9qEr9oVB4J(#-Xj?eoRO(V`nHs5Q7Q6aSVM7ewzvz(@~h<_G1-cGRNMX z1b?aXgYfF|(d~gt;E&5`U>$86Z4WIMS{d22U{)2)blKs$9k2r~sgFy?_Tsc| zVBI}kb03Him<=%|@u%R{DHtTkMIWp8wBYJ{QkJKvHTygzuS~V@G)bu;@AQjey7;)4 zEl#VA(M*f*LQ__zNBEeeHPGAX5ndA1bm9PgVf6>*@(MTrj_+ws;v@E?8PHA?-Uln| zkw~D8adto<)v4Ex=@IS5I>?Ghype=Lz4ecaTA8t(SDxU{TgicwQ1m4Gw?>%}4>u+O_(EqKY^sep z)^s8zqA7s`;J}Jt`Wz6rx(@Ukw}LSa4$ks$Kj$IgXN3hI;?ZT{OCDcX!|M|&LzE4s z`>YhD38^Am{%-ye{)B7F8sgjTi&bV5y9>&kd;j)UmR0@zq}l>^4JBe-Q>8(tUD_G} zMc^PnEBGWR<22LfmQ25&;1CB%5<;rOm4!bK>J9_6l0Mo}=nNY{P6*ElPm2Ic^hcP1 zUn;tXmlg@}ej-4IeYh(K$@uMrEK!l@{&(EG2{(g}qG1tQtR(KV>q$q7aCV6me4v_8 z63V3(Qt09+af;YI1MJg=DlhTB)gM0(0(BzRO2-g+?dFQf!3n}S!UUd0UPLG-;|Ooa za5&va$R-o0XUUe-G{SWPwuUg_YS=;e3>yn&NS$`;Gc=YDMrDBc*rYFx;~PnmezpEv zkY$0N?*QqXRc`i$in0{rjDS5gXGzY!``Ez6xi*I8d?KY~`HPj)r)8o`vlOBS9SoyU z=rISV`RrsyIT;u4F?F*_h&QpO5Z7%r&Y)ZSQBgO!6n!p5?G;n9wii3A`FzyBM$4gX zZ=gxKX(~z6Ks^HlB~_rpw;#E;KflD3Ip!|#9QBBy*d5sW(r3_J=r!n`^%bo9=78R# zZv!$fF80U-GI}&K+IGJRK2q2Idf{F-Pv(Jr%wtSih{f)-qsOn)(9Mj{hqTwUK?n4p z1Ll&ITk!m7l$a)ebQ{bJ2$LfR3?GFKq$8O_k<8G{qtcl->CDim$%FIH3cco^rL1S6 z!m+W6q1af>Q(1XI>>?UMEY)=Ab?#fp?9>{k=;}z^X5OO6`~%!&P5gR?&m}Gs6pVf+}_-pLQD_uey+L- zHrPZxC^s-qLa`(;52)Q&2{a*Elxy5MnP+qND`V=@Zt;m(X$4;{-?8RlIfh|xlQ{^*jggA>Gqfipq>GjJ^ z!g{HQ1g2;(WUTWP%m(;34hIDO+r}sd+Zc_7l&wNHA;DC8c%|`9G|uan^ft13h19m2uJVI z?8stV)-}`SX>QSec?|5*eom6Zi%2N)I=r^NSPrZ-mM~mPwk7W-A0aacO#~1_{cgHz z`4QOJmQ0=|SCWA{)rfiuKKhf@sTbguJ6XC@w$lcdXw#^pueKT=t{pT-Qs5rLBY$-3 z%PsR=bwSiYV*`ESIakie47FZEKii1l04Ws}7ppDkyPAd)WyA2ScMG;|SQD7NT)a+v zlvCw%ch7^QWJoko^@{CLU73QL0${g?-vFf}T$ncADDDs=(P>ESX!jS={u@-gkZWPy zIEs45U^6<3ZMQSs*|BhwQ@S0*i|x~$@~@e5p0$^G*A$h}-xgFoYX_gbMMalh6Fjnrx)H-S_6$wId;NMtGgE1)kICgeemv{~a$b>U#F$XSN+ppAa zs@J)cn-Rmdi^+`hycu`Z1&owe+1X|?8d*`AkyBULwJ zX)#_=ur?f5Asv3JX{0LZX6$-}#AAsez^gk6{&Z8|(iZVFpe5odZ5En}XCKxWUdqk8 z%LVhx`Az&=O|nX%kQV&{eaD;*d58*aVN znG1@^$}4jtA!qP*V&w&gY^L3>w##;32Y$7U+;K~K=zvkW|BTi}`vJ?G6zE!XCQ_vY zJJB;+hoy}t(YVQv6%r~^KM?;J=8mF@WRdUP=4Njb1^ywT2|>6&x1`yZtcE#APznW; zXpZ6^%$i^>VN1{?`ne(~QpG5?EQYOzUn8C(eNLdBQOe2V{bINg)n(W6NUUh{3%RqE z_ER4;Jk>S6Cfi(OVpH4#J;ep~#BMW>6`DrPdTZ_eMYm}%&lvBG55dRdGx0a^wfI+f zVmF@d*G@d?J7tKITbsNe$eZT*Yc|N62xF4{dVQ9S04K%KqmESN<5PwSmVb@b1cNiw zEkRR;<(4VdILn%Cvb6yii}XRFdb76950oLijY%$~E2NVoLp#mQTv8cn$oxXyYa-_D z@;orF`MEI6fk2FiKX2+BYavGL0Vgy`W(NXl0;u!IOY1{^R&zO7q@1vw$=0xiStR5PxFrbn0C=q z|CqOnd5!0B?LJLFo9S_d$3BdBQU#+lEM0|e{DpDcjJ^vxct9{cmYz<(L4Sofc<96Q zT=eN{iVSUrPWv@ZNq#TSBj29k!{~9{b-fME2wW7;$Yk7P7=KYrYi596#yCTQwUDL9 zGGlqOJXvRgS+Oki>HO=g8kSCbz6PhH;5BKG^lR!jv2MKsA6{8-Mvn_D7Q=1tBtk%t zi)K5;lmRbYp(bx;gOs%~pGx*3A0vY}at67Oe2@H+EF_Dh4sxf&#_Tf4JwWP#j6|XV z)#CJ!oKq+eS%R<+Ha!y{w`!)~I&y4lE|eLuyIz3DO!n1jHW07p+w^r+!tY`Y=6h9) z1z?vMJxngovM?5un8TFRho8xhFPHm013}FQ{jg&B0Mb}Vq8+C>($1;N)fAtkou^&h zdwo`f#EX3Na1OcDNCN+@*FfYN(1GW`hmm3YVM()Qv9WJ2$l=4+^xlb%uBsCqKWb0B zM&ktNS3}w_e0y=*jQNs*X7)Gu?H?S7n5SaUSTpD?lf8HcARU>1cj*KbEC72@#I?o z<+y`YBQu2%ve%&`7ZAH^N0&Byo~pOe!u$Ob_zhMtSb}lk!|A4%}#r zQ6#TPtbyzY8*`sSL_??>h@)T)%v|0BITFG#kq=k`e_yN763-^Kv{^R|G#ZQJZGCAdXbO%5|4NtYhe0wCyM5qVxM{zf%%{X zXWOnt-hiv!5%(VfzAr2%LAVpIwFXyeKrs2G(>X&z+M7O|v;w2Mrm2-1Hx{d9m3T`- z_zzWiOF9`{%f?_$0;8U-4=FYebvyoRnJa~8r|#ml)+u2d3l+!Ik7G`#t!|byXvIQ9 z8BQn9Y0dZOE7{(rKE~VH*6e600zvnk!j*2v7JybeNl=@W$-Q@pzTe9AMGXCb|Co8VxwpJFCnq*H+aVnpZsOUt9U6&kSY)-SrI& z+?oTixA2E3{#*}5a03Q}3lba9BN`32AF4l89W54sHSmkK4{IK;d?#z~9&AU;qOoAxWc$n7Dh?iQU(C z9bD^M1^r@ph(3=u+Rrtj1EdnYmEX_*$(IsHZ}~PntYoF6VDQ9H0ujke?&C@7OS%ZE znhkNs9)fivne~Sh;-4QP6f`L*a1?=}BENx4=%`mxc&=Eax>OOgEJh1+zYv9Uval;c z%1Pli;&p0{uw2;G#rrNEhc%fpI;7bIqTQQ0Ym(|bb(7+W-5F(j)|i*{T1Y7ywVFCf z9oxUbK=-~s{sbPJ!)N26P88pU|AhaAm#_(cL{zf+VTkzC_sNSOAN_EF$!Wfj0XIL0 z>poau46##IU68zq`UTl`ab++t-M*4>u0E(&@%RBBwc~{iVA%WA zF(?sgh+uTo!{2&LE+OoX&+U`rgp$9ly}`A0K#8P7+d$g^@vcCc3O$t;Qb23`P}-MR z3S>SBr+x|b;-EMYhRlgzY45%ba&Nv)OOh#`T0cf&Hi`~KJA4AdIPbpCae;j!agm}S zYVQg2^84%v_G8X-kuD1iCxFS%MKda5)7x8v_Ff)|_bQey^%IZ8M^#Stp16_IdxCP4 z^DHkSt1BlW>swLT>vtn%eZq$<$w7pql!R@R17|cvCL(Lm&w@IAPKd~fGin{dX62zO zfO2bUSpsA^KZryy{ZLU%9OKk*H;5PWIvmT4cqe$^>}YDurIFN{R!-uL3l&!iVlPyD z{9BGReSRgaiW#~evZM#@8x2a7>6MXU`M~-G20tyN)Z3H?oTQRG(MlF{C;EOm2&X5) z#KU5kc-TspTGU#nHs(7CH`==@hSS`I9pu@vrGQV&g|DIF{Vw;kg-NgJb`z1y)?6mA z4LPvukSJ4mvX#^Kr|m*8;EJvVO}0MoD;mV~wG4&uLHxalEG60;Mt+cG!y>v3tA9Mo zVzSs5D%#+n{Ovn!-t6JF_fJiX$VqB}izgbp>0j>@NE2R%<|)KG zCB3kHc+7WZ3XP-8jthUnSIW%`h3cEYbvU(Y?&Q+YZ3+vNZOZ2z2kw^3>Ye(IFLNYh zDo>#k6v1E2h2S%UYe7@!a>W!?oFb@M+{{R=`N1$0BNDGGV#-OeAyHEnS?bsqDqj!h z;I7B_j->{Do5uCsz)m@U^%{3!(!=}jR`n&Hp-b9G z+NpO!ABAd_bWxvLp+=2ev5q=L0#Nk7Gf`c^`aD!DmQWW{_q0=YAuY7iC5_W16X&N( zoN8tVgz=4~=oZ=Uzs)VT)80VHb7!OR#JB&F724Lfm24=LJmnHxn%a|#*dni&uIH}0 ztuGb0h)ce9zZjK=; z0FRQn&V~*9&5W%4T=>2LeDBNIr`a#OF?Y1R(VgBXF29W5$e+!J;cLhUst5uDf$p`c z?Sj1mKyP?)fLZ_IK$76-!%p}V+j-zt(Ve-9)Ss3yS{kjNn3XcUS3NsT7x>1agd1RX zj3+)AAB#`N-@r5P;={-v@ju?GFsIu$vvFcd{2VJh&*Kd9XYOK;gf;y$c8_S2M2DOn27I3@C%*}? z4VGr^^4nB?&8qS!-AI0ACB@9hxbl+Erph}pTPtU_|}= zs;CTerwpZYr)ZT*M0NCDL983{>`mEvZ-=wWo(#pbxFxxR_N!f$a>+)g)&bY zgJhmkz~;)T=in)53<6KPAKyGRUeg#fUK7d-EIYOk{)&ZAsKK4jtT{ZNIWGp99*T%H z+f>g~Pv=Tt_#4kRhv!dHtLi-cX4QLbn$Pv5dfM)pN&Sy_FF7Xro zTuAp;uYZ)qHS0#idlrK)a?HBXlrJ|u`!P;^IyP8bm1p*RVEe_lVPwC}YjkiJ&u--P zU?(NWCJbX4Xj5B)PW>R6FT5jsDts^eE{uu!H+xFvGuXuE4H$~tzB!8gzU}BgB?1>j z98swVmZXRt)*;K&q}e&0?MRD8#AYF48Jr4W@`c+rl*lBPwI4on0n-?H26)}eU=_0N zv0k!-EMyF+Q|7GTlo)OX)yDf3a1_RDp9YLrmSW8IY4pfMOGXE$9!yKkQHZ~sLpYZT zQObk$naOVy;oU`GHOk}3KJlmaY{FN`-ms}gU*yrl9$e(}ZKUmGmGX_v92K7YVCY3A8-*$!RRlE<~cL&8hP|fgD_c`O2 zSf1?HVKwbu7`P7=f2JeOdQB=H1pW_Pgt}JyK)8dXsP7<^oy&4AZJ3VE3h}r zF-ZK*eK2zK!K|#XGFm)~PQqzm>F-DYl^z@UJNYy|C8*?hnz~P98g#bQ@(pt1C)nsZ zgIrW@L)ioyl{mr1pmI^DTo{B~n*8EH+2&jf`$5^ZTul8ARD(+{ssYvDor}^EY%_hz zw`{C~hv2gZhXhKe1+2yglSy@#1-Aub4PaX#wq;vkw_x<43w&}Z1WLluhu-kfyD*+L z`fzih9kyk2VTABv3*UU*18X+8CX^8`6YGmD#4tY#Mogg-ryf{|&OfgDo%6C~ubo2^M#um|Ri;kT zWf-d%o5Rm^A5fYp8O2e~Z-uFz6UL{KQU#y>;|^sD`mb1l4N3JDUq?%}e-&4nzh<{h z0Nt^!2}zBT(Ty11*isEMJTSE{8TH3lOV*4Xndh@RxWw4`=0*GF6t^EJF0G6Pav7@PkcJ}1r= zqrK&94p}8?@PF?sRBrpZyHE-A|E#lY()d07n6wx#L9EgS(hi9l%0_23ccN9uruK;% zz}!fEZHlJ#h9taqA*{uidnNS<$Sc`OMqbIDhn94tb>)!}GVB+H3a zP1``fM%zaR#jLu2nuunLh_Z5Q?t3En0&eerA4zi(LP9Lxp}o5pW*5vMK}A<1C{T$? zVfx1$o0+-P`7b4KtG$mfL69UZBCRBCB27~3yhsqXbubPrAKw%GzZ3GA`!@%9IzlYy z*%EVbIDRHD?0AX_1^!ev8_YJzRQJ4Z5p;ZsWkFnf%Hy*ba3@~ga8LAf%QNm z&*X!J^jdxhMB$=gko!@-j^OhRI?T~IBD*sj3OCJ(pXta)bQwcG=#dEnYt3-&lDYrM zIq!M*Nyd2wxXM7%3ECM0jNgoTEItpk@J4tJ3FzkXalPI{tkW#OI!Ep(h$nYcpC`W- zunO|Q>1q%hfgaP;ooJR@_7Q_nD1YhP z1wZ*BMrsjW>1#r|*0%W!ERZ9_)O(g_AhoFOc+kjHH+ej!XEHZu-G#Db{Pv6e#H~(W z4QKFj1PuZ(hRvu*4qgSpf!aw3rGiGnB`T3LN${lhQg=`#XuyfIpM(IO2sqnFT7IhM z=_k@J64Vfyy*q4*N7B3v$d+W7fU_BB_{|AAtH@8t+b?$60a|RI_as?{x{Rt%wV)c) zz*brbbsM9ddX!N|Wi!-h;3w6M@s44|m|@JJ=iTwNOxjIaEp7a%HF!4u!QqM*mgD&h zD)(%0_;$^|*wt?~7Afki`|tel&3@`B*L2c$_+O5VPPm~ML_X!Io|f09mp0?4*6sNm z6pM|?z05{kW-orv@iHFr)O?Z7?qp-M(%JoN%uD!7huNrC z81E@IOb?$QSc4CNBbxQd38ur@iRa=vj@OG7*J4gF_r}Nv!{pE?Ekj{6mpHASrk5ty zrqJ>%HR;765Ogl~v&IEV{bt{0E>pF+KkFK-M9QK7ppkZ|XgI4PXE>|z`m#6Ia=;Y) zVk(Qs%FXM9Pn}u9S?`5vAX2;PQ$iVO7uP+XkLBXv zo5qTJ2Rort6^|r`MzmkJsdr^X(gQgd8xDg*V}=o<>a(Q<$-~4t#HhObapMTF4z2an zsu44@?%`Z;DE8haoOB>GT;M|*D5{~WDqV(IH}n!3`KaAYXElGO8mYK~AAFfvCfRslnkj#V@o)`L!G(nJn3Bx!A*9A3#iKOs5pPeyv zQQYyp<4;%iE{{s+^;UWV^Wo0)^y=$VI8crPZy=4%puQL5AFET(sc#5GoEBn)r}jpJ ze~9W^{ZN!9ALjj#`)Wevu4j4w^?uS8pVz38Q)m`2VM*Gv~*XfVx zpCmQ9N3q*Ri=Zma@T78*$AM1{FAMR|=&`TwNH+>JEeUH5Y-j2P#y~kSV^)SnnPCp2 zP_g3l(G%WBCgOcUCtAAY-sKG2ZyU88lV}~b9eY0wzH&vLC``{U$1%xyk1k*1&WJ9} z0b|*<`b@bXM3T1fcq;b8o0Y*R0|tyhx#-1yI$#qhYG4#BIG55L5Qmu`SZ{;kBJi_~ z$m44r46KIrbVo%@5nBYEOI4yLqIaTiq8X8#SVL?qCJq`*fgi?N8t%XOmdZzd0t@BH zpNVpbqlt3tX)jWR7@YOAP;MF3f@N!(nuDVyBrr3g1>4r{tym4q*7WdGS-=MGfj^9o z#5dv*%=j>Q4=hMtU=0MX69s)NFu{_%sB<(}z*^xeAyjAzu_AQc z)0PuQKMMZEK)^cTHsK!OVg~c$CdLYe7Xut)#4$1$g^YWQUlimRoYEk8e7%UwG!=kI z*-qF?pcA49DTI8&9Rl$w;XUCyK}?V*p|z4$XvOZxb^m?gP}-572h-fN1mKibLN5Dn z0`ENO5&K|T%P829`zCLD-r#5_Z)RjiE~XsxU3botzKbP~+G>!E$y>=xH}X|-1oEuo57LJ>q10|+X%Py`EVD2km>1QCJ!9k}Q@Z_w};#M-KquI>AgYqr*CXf zfMRKSxm$Hzk5zqsgJr|#9#Ehd>9(qW-%$37($M~Px(xo7$6TlcF!n?pHF$WtQXMt; zQYF)q_wE}Q(Q+TN+R}&78!c)Trp5?~^f{b%dmzb#>~(jchAczQzk@>B8* zIVh6yObTGHNMP)v0*S_$gMT zc9nBZt}Z(>-yGNd!w%U6yFQNu@SOAf0It9BptqLW{`#r9*7}x2O&FhM5=BCqe*5YT zOq|37f{6~y0pd#L<^>1!0v;b>w%9XoFxkvH=GDXSoRh03s?rl3*Aw|Gi}6?BSSY}G zX2pcZi+p7;8;1eH6a44L_Iw}HqQtn=6bY%Jh{mpklOaFM2Ql)VpjWR)qj@)7BMy`i z<-{JfeTs#?>Ij_HsAqe!N#m>_iS3_qIJSY#aNZgbUzys!+{O*LzcHnRfp&K%GWg+s zs-e%lI%C8=n6i^{kOIz8+%vOT?93a!YAcYB(BBH49o4t+Xve;VhTQW^;KUvB@aMi| z-kNiOYX!%l5`8!iHDOO@|FhT{|7EFav9}+|bB0S49MCZln8~42 zsdH@CEOfwsABl9CbF$s(WcyA>ahU3_WIz?5G?qS=tS;IJk>CgSe>DfatQ^^@m|Sq6AIC#;Eo=AY^Z7xng+%}`e*`IVVHjd!J!}Mi+1E4$Z-e4l0=2yOxr;|0 z@BJUx5^a!JP?BI{NzOb{b_nK==1giT78$$_if91-?bN_Y*o}L z@V;$N@9N(j?SetIz`t4yUWp&c?#RbWG0G)!SLykwW*^2PoVt5UGqOe!5L|(@O4=l~ z_0GgOk#FDtA~TR>Drd_U%Oo>5fm;?}yZ&C;37J@yFZ-;TL3ktwGmm5ET2lb zB;O?$v=c)qa^ew6oxEM%_k8@ctN~~<$2L~jz!v0am{1r~9VV3hR%HZKD$pPU-EQBz zy1Ir`po@7$rRIQL(q`fLu&Aa^n#vkcb$0a0z{2lch(G2SAbsybm0eyKI|5Jw3<&c; z`~moT5&hD;kPKgnD*YoQ*1}cOja6`VYRy_GdL)A(Wb^MckK<&jh43i}2@RR<%*%M( zawzoq{0sTkZ98Ex*n=Nw1xNzE6ZwiBhwm{d_z_K@K=HviFiB4%cnN^T1@Qan)~N!1%h%<$U!S52@GxT_N<>uVAX+jLuj z|F(&ph*r0W_Ei&|s}sHWL`%yqrqhfWHr{nQ7Olut6Zn>6)TL!`%=$NU#EOKYZUlQt z-%d9Q4P1zP?ZJIZH^W>p$K4>|qA+fSwygla){102Sy%I?#juv89=HIc$ZZ*rgCv06 z1dbJ=q0L}Ba$2Jax2WxF4@#zIkjQi_z;%-8`T$R+n*fanGTr>Nt_95wXp!l6=oG32 zZ7$Fu(_QX@ab&tD7*D4AX0`we+G-u@0S19g555a@$@I-Yk4%qv$Ap*f0S07xJosct zrXT&;WkE{<#_;jagNbB%I+!$*OwR?A$@BsbcQ zhmZdan33slMqIu#5Z7J?;uigvfw+_D^@xX#YcsOQz!h0+>WVBWX1JmY?OhR1 zvcK1Bd&YL)Pe%jRFwo`28yM)yNCvt(fq`yYlgvQZUSOb0_qyEPjCv=yqJDc_R$oKc zZSh|p>Cef4mjqs8ph1NUH25yV6y5NEfrdO~=uuzNo6(KU40KaF0}U(w&OpO^8R+J} z@cJznKXfa`72O8E9dx^aE6O#6PG`mTuILViD<;C8f!P*0kAd0g%D_Y|VKif+{TP^C zYZ#aq_>Ez9Z((5eM8Zq2CkT7Q`ct9 zX?s^p3d0q9rr4f=Jv)zqJ?F~6{!CrMz@FdhVu!u7eXk20E7`!nrfp#~W78uU*o?gl zY-Vu+1Dlo1z-C`yV7Fb#U|@5uF|bz);U(7|FtFF3GO#y_8yMJ|%?zxx9bS_6oq^5o zWnc^bZfM39VIr|5dtKgQx82oo#ojY;#g>`6uEE~7cf}?+=_Xjm2lUtqzS#=eYz1#^ z1p)Q8f+x0uN?SoGTol*}a%~0awu19;kz^}4YAcAh73_hF2wTBsTS2g`U^QI$+6p{v z1unLNxo|ezN*j5qvwj!_|E}m2bR#pU- zRs|PLr6>B>FVTur^JC1!+JVceQ3Q-2R%@(Zid;=G-~du*KA^r**fj zqHfQnP`Tk$-VSP13-HN3MGat5*CVVDE!Mt4cd&mlD;8J+{>Tby8n6djz;q>u1e90Q zxzI2dFhLGj3a*Z{%;a1C(2gX?FhH%mQ8h}y+w59P?r$`5FIKKj+fY2#!o?%m{8Zd=%L}Jc zA<1CJCipv!v7vnG*9{wAxA-x&7Fkro^6n_>n%UrA!>aQil`Y$*ZmQG{LY)D6p&$|g zUYLz_m83fDq}p)&h5E^LsxiTGH}eYX;xc`tEzhf?;LX5do7RR)k4MS$QgxW(8;scq z`2WcvST;r7r1*&zPck;q-3QhBA4fYBi-EsM%fuGUv{w9zR>Z0$klYgdF~h91?%IqN zW*J!$+xB>RQtMaBUoz_;GDfqy@TPH^@aRe8SJNw`hPvpHz2H@-}0uRCKZRZ)o%Qp z-}k_HB~htXOR7^q(#>yomB%TQKd#gto$P)3*ZvdclFu3`#EnI%jn~c7=xkr9zrp~& zQXkjzf(WK`f1F0^86<{ual4zlEiEFV{~%VBJ$)z-=V}4gnMeO!M>(T%dEj3YTfahA z`&Qq#vH@eQz-OutsxFnlkzhzDB{&g032VpS&-0JNT`0yjuB^zr8)J6A5qsuC70cvV z+q<_V4TT+sKj8bO5t%^m@wHhN&&(&5qxT%g8+Y%dQ(WLStlWC@L(|eODaVabG)%SSGgkWk^V$U=Vb>%)Z>JDUnEQm5t}ZU{s0U2139+luFf zYPz#>`)xhet5>iM!G_iWJzrkiCASSKSmTrf1a0CJ;!Gloh__;wJF!=?H!o@y#JFM7 z;V@TyJcPp#;<^8E4?oy|AON5c7ziu`+)n@=LIXk*LJLA0LI+|T#CV7a5CjNa2xuJw z^dSr&3?Ymlj3FjMOoEsUVFFHo)8lf&&o<5d;wou>m3kA{1gH#3qO^h;WF_5L+O<rQB4#9=sLF|BtfQW?H2@wSm z4Y3O%24XkF9thZ10{bBLL&QSxAp{T|2rxH4;Jl9>Clk`;ODd-2_x znDmnwXa>HkRVbx*W70us#`!DbGRkw$tKyE7sGd>42g(a}ImeLsxW(?WKgWytZS8oC zcLGeyK@CVqf5vUDT&Z`z@p$!wa0jBAOJ${a-Sx1y30U&K&6YPVj{IAs?b_Nn$!je= zP$wS&ahIbH=j>vcDynw$eh}9jSYf3>Dwli4lpM?E9RmX8e*9&g1astY*Q$N3O?D?W zUJEqQ;!@2~qRs6rZ{XD98j}8g{m}_T9Eq+KHGH1 z61gw^)OI2G6X*wwv|kH!ic56_ge1b3+kD?q?|obm0X!nSAy8^uEL8+OBAGag2t0_Z zh+BxKh(cl-v5H1R^p6fIf3)5Uo0c$ARD3qF}S;-W& z&bEdEnki~~3ri-MIg9DRy!6v&+-BHMr5_mgS}^{dAP!f)aaO{WwB8eU1Mz3DLvwg_ z3^jFm<+~BHf%s7_K!>4T%s#&+ge@>!yv5&|?TqeS?&<|?)W!38c=2*Uhj`%J3~zj< zLonf3b})KZ;I(`Q+}h9V>_;z0dk6btB~}IW0;f{~oHc&fx zB(v|ZZ?kLI&20EfoG`-H<(T zbE0c|c^`Q1uh!)u@2|4FJ@;P%r94b$MyC{mEB}LN$^T}I@}}*AgAXjM)t%{$3J%Wm zJA(PZb6N#I@VBq@83-Y7enS!hfx9wZf<{ndBrFq3s>Yu~LEX^rFY;lJTDt+uvqPtZYZ#H%;R zAwo0E$I{Qlg8S&J=KF--jZ4uUC_2<_1HA<6)}`n)gAph?v@mJ8B*B$`$+fKX0^2@) zi~a(WLK2iI$}s`rH7GzNsTGJu!*76oj{Z5SnRJLD&8ix+sll4(1!MV_8#-{9a7C{uCFq`835|Y_nQ9J9rHEbaMVw?Z6X&~w;uC#*JA@|Y!Xrg{fDu8qKYW!vFN(#OE~K|B1s%x8oiwp_Id&Dq`zA{?%qBx z8-beE$`Bo}2a0J9{r{Ztj@bDYW#t8y2A6Q3aNlj#;UPgQz^9;NyRHchc0Cdv<9`

hZ6zr$)w+Y~ByEMsSgX_3B7UE2MJO5+kMCls zMf}UmJ?8R^Lf9{(*`7nwSNHAZ;IQcaIH|WKi&bvvJAdGH=1J1?g%f7D`Tx~0`y>0n z?qZ`HLyi?k;KbQpe^hePyPxkF7hQlG&=lGTtEHR2)g0C_hz*POd?$TUqj}_1}w%8-5kBsv5HhADWKI z!{fGXGuqhJ^sEwNb2M<^WS|Ws%!op;@x)y2dEs$!3zzh^{mo6X*pzQHYz$2iq=TMA zhO7HVBY5qr2VdlPh0@>b9Z)m?MNXcQ3Z!f^oR?HvF&F4Hi#Wwb|c`1+`gk3qe1(p*HIQd0PzzIQ_P&C}|7o zz1?mT9IW!K03~fFdbj$fP;#PjgLZcd8(xgpgeN@0jQx}T;d}Fg z`H$YAzlyzE8dIXLF@D!V2dQ1)d1KVG-@eyoeddP~b%axe;1uz&_gd;n{|zpF!cgHZ zAvhv@M=@uL#ad^sIX+>}5Q9$kWU)RcO3W6&hQg&Pc5N)@s`#$>`6WWC=GIVlP)PXp z@8aQe0rtU25h2??lq97~*K?Ok!>$@WA?->>_UBGs$K*2Om>q90Kl;AsYqRRZ9Dc*f z@d!^n<+6r*Z*t7g21OO~_HOVkbRMHO)VX&k6wjW-wqt|&>}Bl8yc>ZY2W~|~un(}o z8Fmi4lzp9ZpQCkVXrn2NKjJWjPMi(G)12)bTj4dK#7HO?KIXjTJinxus>$O=ZH)}& zM1)M>0uqlAQ7Krz7k8>|?tuTSP9)t|S8_aO=wMGJ*jn4QJ_?)01bQ1uEXhgIo z&LNHt!})PUG>wl!6RD3j1x3V1MEF-5E*{hN{RtcyE*>M&l39r5aM3)*<|60bV|Orn zi@`i|n}Ui$>%z#MN||p3R6+kNe14l&*ju{gVg{v%@(89;3kQY66ategXE5EFyU|mo z>VTJ`chjpI`vWrwaMxtHOUIIA!3n84N%n!XQTkc>N2((OQ%gRS-~EVhQ%{867??JN zZ7w!#+IQRZMmbO4Li9&tg($pj^!_>;&k@psgemv50T&p%ES0^lu$AE3aP5&jpj7!S zAK&(=z4|ku{rk7A7YD|-T|7nVL2RJVY5aiwGh=iYE8QUe4X~AIQ$|#)~p@Q>2`S2COaGnwFoeJ&})ZFRbq}$ybrZ4`b7ph z20rG+#BcfI^ji&TD<&Eld^RzbADB~q3E-S4k4NUo)$`D6a2`s!(9M{Tr>azWEtsm- zfeh7i=QNCE>DcOArDn|Xs*3+w;AF-iq#5k z-q67Vek1=g{}11na*jd}+bjoWjx6>iVF>$(@G$$6P$m>CW7o3hvVXx>iM{y8I^7Aw zYq?Q7gT#^IMDba%Wn*^M`rThvWp znX&apM;vhv!&NTR~iT zU=yByb1{AP9TJ64ROcJ{c)R8LcvF46r>yhVn16aJv{74ldL|`Udj`YttDApMZ*TXs zVG+@CGm*g^a_6qtG$#B&bi=r#uZQryr~+;k7c_DIqZ7LEUHJZdw~hRm{lp{u3;f)j z#9>i2$#OI45&sQ;#U`RIQJwduKg6E^6Mw3}_I2xV~MTjI;%U~19-RlhBilD0}WOZQ1nN@Mn$ zsh{>ob9b6Gmz#f5{Z?V#VPg$Gd>a)iPopAK-qOk{!eehm7-0|LIH7#ZI53&nL8xY8 zP{Gb}t&bP$O^MdZIX~94@rI`7Z8E+yTK#YS{EGsAc@j4=8P@lR|N((AZ?oF3N>&-3Kp9*m;zf!(?^Zh}O8i z>639cgG1GfReN9CY1DEDw0^E;S}(5h-DBbxISfoyOjA%50Hzu!HY#EiM-{$Z1j9XO z%QZ!rLf#CnH@Vz&xlUD&Pf+=AJVa(^|C4D7{`p!W> zKSJP`;c#gaLZ}nrt9LUUe~{mC09hlq6dBZlFrU=m2R4o>tc;#sYtY@wvem63^HTG2UGuIhvQB}FYN z(1z_ys45r}04BYn^Aa4u>UbgZ0zuxujlPHHM!(PiK?U3>OTT-#eT8L5h*MU_gWiNy z2_9{~gv<3-#}kuPhrose%k#19i^`kITkMDIah#TK>o|KJMk(Ew)s}%Dr*_`%l!;{e@_jN#d0wiz+KmgWiVHj* z7r4NG_Na*KVI3=NSa)emMCjJgpvYIDApCiV1G3E;ETIRqR2KOKR@Z4L9%_&HoHh#C zY#o%)^~4(C{m@n1N~SXCYTCwtZPWUP4h4AFP8+cYDJl9M>@FL1_L}B?ipTZKR`+j~ z<-Ob`sic6L{BnLh|0BO2DyY@!E&!#mw}WdF9FDey3)7f|%yHGU=6_fRvlBngH<+wi z0Nxy%>Up${(R-wwsqdg#t_O~`aeA4*liNcF7l}pebT)_;!_-1K3{FkT|Ijb%6vr=` zVY@*Qr8x9%6?!8mVN6$H4E@ALyZ>)8Nwv(ev*h6zF=kkCK4$x&t51ItFm3n#6DM0L zXDbDZm1~sSlu=IJAi*I)AO^&xo3S; zjXFfYu}RsSi}7aAy_6eq%Nm-OmIsJ8WM+rXKxg`|s-GNzYVk1RBarbC?wH9D$mEDHomw-8AVDhKFk*QGhG7^H9Dzx7SXIA0 z0-3d{eoq7v<+w_8$MqH@Lmx5AOs;)uIpZ#?)@)|h&IG&XtOWN0{kVnnb-{;+zlcL~ zLi0SP>+@!U9VXRPU(T&#Rh0XOm_On390+P^4$H4a8^tkQ2T@J0a<45v$ z(&Nha>^{RGB?QAy2k%Y=yPygEl04YtX%*z=bicgIn&G24ofC}D4CNkrSKI5Jzp?yo z2#f!3WKYTKLD%HFPt-){-P<&DdSy>BI!AN1W(BUtC`Oskf1vYxd*Jj7(G8@_A}C&4 zlzA3UyDUP}Q!7tnij!6UGNBi&!!5{zOla3zl}n0Qxrs@f5`Wjr13sFYFfO%Pi;l4R zPiSa})%DH-@eo@qZ%`Y~A8|rd+s}!)dfBJNr5B+!`bELb)9=Mf@xOtEH$9F4ir;2R z5I2&W7#nZx4y z?%>6vym-u>2z29~2#n*Z`g@hg>{a#gk1LUL-ADOPEf=QMn$g^D@MU`_&-n`e!Vn53 z5TOn83BrIwSF1K2yjtZV1f+y}HT1Z9HPJ#+!ejUmcwDnlcKC2n)%k-(RUd?1aX6}v zCgnx}Uc6l@kS0kzI2wNjD4uT^X$Z%yYew|`m}v(_>SFfjCE^S9ka%6b?tQ}n5;o$o zb&CddK+RctH(5NI{AWZR)YW`4VyHEur>)KF1OVyA>XQO^{xJDZ_n1oEIfkAWiT$&T z?kPIV;Gp|ZjY60~bun-#HI@o@oUdO=-s-xXWTF2?)`E z7;8D@+h~6Mw>+?b$R>`tM5`M|cZuLRQ9_$h2ZQF+G_q z(WsBN6E~At%yg(>-fCu+4cQDsn}WG!TH9F8R;*5fiw?_X6WYDuuUZA-&)&$6VIO6K zi|m`DE>qgJ>4B3io*$^^pw;Z##Xy z^{&Jiqhp>+o4Jd)HX_~b?c2EmZpngK>U`5jT<~V=lz{bOl&|}2%qAABf)S_t`9gjg zzmTtIo+$#8EuN*niTQTsXY`a6-~e3$BFyO${S#U;hl3%03knvU08H6M^0V|Eg-$|KAuSX^ix!wEUvQ}WtZzwcht$bqk zqCT-*H}vzXhGXAqIgZT*;4eAU9UYLLzBF4c<9I56|Li9qxcA95 z6q6P9iczN$1u0UIs5q;*3e!+gLDyspRu209^|v$KO})t@*%b0E(2g4a{6uh4T7Z|h zOXfK!U>ID%6q-8_pP1#K90TS=&3sI#$xY?#=7RJ3PnGYLK<$sVRNGWK zz$vZ^o7i)%`($sa+2eD=@A7}m!j5#kODb+2df5G`cFt%EX{1Z!HOfADGaGWdbIog* zITj@(;{x&>rg4_wZ?Bc_SxYd7EU`2&xN2#JDX>&~ZlH6_@XxG{5k4(iP3ml5)Ao1GiR;S3CH7!LDVGLt2^64W z!E^`pU~8BuwjP^oX?5h;r1>>fQeN5$1HMoYRI(h)G-j&pXuX(OaIEY7eCMj*|23rr zx$JvvtA%OH%ekKHk6cGK(Bvn<3giXXn_tS^$$!ZH1yy=W$6pvwX9D$TEO&TxkL2^8 z|DOGFVxk-L-#fMWP*8rC@fGG$p(G00@9j{Jros+NqR`UlVElNs^+0ohNBTv<+%@KZ z_15~#?dIWLp7{0XF7{ggIH9GtjY`eWhMu1h!?(|wkE8$SE+KRo`jeb4;VOeM5@5G%adqv%IgGBSe4lVzsU(W4kRTNs3wt=ivlY1>l z7F2gB6E|HeO9gRhWvQpG6nuM;{Ni+6T1{%p89p~7KQ%5bA3FU=u7T7OfvKxVsrkCt zYvASnu6c0-b8p7uGj9pAhHB46fivZ0{{K_eGz|@^zmNYCoa`N| zYH%&;s%GxDGZ@m(Jatvmd)v|MXCB&pN3RNld+^@oR}XdpjvolyM2izcDor^77``=K{*T;S9xUG}KPU%@3*x%)i9KOKft)+l_`$s^{e_mJViL@!o--@2Qtnc! zIrbeb956^x8>-oG=W;J-D{HS|JNw&kfKH0vah-|R7(ULNm{#)8P;YX-8CqrDe*wXM zXx+@+7djn54kd&{N^Tpg3#Rk@>wGYcJ;0pHuTd>f{#3>D*YW|GP_0Vhe^qTEJceSz zU+g|Rjpc6Rgmfq|AgDD4_RF=5=KC%BgQI!)&v7|8oV;4NK^P^xINATq0Vde8+q-jz zpzo!V8S%pg;0qlo}Aj@K0_P=BLvT}(p@(CqR#0qtO(!8q>a7< zlH;c$e31y>9GI1Nsw@dDOTyG7p&M(GFpJV%9{D1R(_L&Dd|!$?&a;M2I}eE` zh9aVy%$!>1QAuj%m0SKr*|+>pNnd3=TJ<#zJX%!^KWu;>Hmv&1e3c_9_y3w*?hk#8 z^I2~2pi<%zAS;v0<*o8wxl~pm!#2p~y<_&thIegxt$!lEPB6kdqPU>Ap^z!+6ent& z!LrzE@*VsHehU8zAE%h80JaJxf9VH(;Sk>u8po^_vbG9ig(Bfj3452!2(vP<>*>^| zN6_>idV_Etsgf!FGFh_s+lRVXeXJq%ZB6s)kkh$E89$0*d`~C+>bn=|YIar~1^xe3 z2_|H!Rf5aR&j-5p8J{8@&5X?)Qwd(AL6u;v1e2JCzn_MjkQ|kOnoL-ysqN3K|A_v4 zG%HZxSOd{_S(5L}zpVSLEI2%W)GqFZ1h;Zl=8PWjnpW&go>w$tdX~kT+u6i|Ro|{c zct{=P+U+R7?2;WRFf)$st~R?~NGil%%_9|}1!ag?!Rx}3+jfN?N`H?VuqoK%V*t&z zVBL2G)_pr!k-eRJ`cGqToki)$sMKbei@8gGiH9_mx&JvV@BUecnb1aB1Y8HjnjqV>}0+)!`TfAQ!*osa&X#m`OK z8(sU#ETE?!3r2jSq+wk50De?bA^5>sdOI>NHXqO?7$)99#u11|icsE4y|eiX^%L)c zg~Y6)Ms$zCOU(U(y~M_R(1>Om9Gv(8bKS&xTdYr!Z&>VxlbipvejE8>jOwVsR24-P zrSelTNJArPPXP46bN8F7a#g+R8@UI&O3_}8AX-HEFq@>r_SM-mX zpwDUmZ~a-vZ~=9H!2;^kslbrUH0HK1a`Bt$$-YwfiVpU}NOTzoO^39`*n& zjGLZvqJp;5=dQ2ap1(veoDluZ;5&M}JJCCb7~0X`=lS87$A|LxHX{Lo{6 zvt+=^QT==TVV#KFmKS}u4}1k5cyA8D`sG~|*wD(;+HeQQG@B)umP~8w3J%p7J&ejJ{>v6N|ClJET*TM~>@T&F{O+$Vw8nGj;Z8(UwjirNaeo)TQ3Jm^#BcufrWKS~tBt&^!|MmiZ$y z8AopU*;!Ssh3yFV)*msz(dJI!&fEyT^@SAPOL&!D!n6EO(q6unY@%?6Y@Rx;saF~$Q%F-`P-2`gS?Kwoh<5Yf z{2Kd*@d3=rQ$_U$nbqwHh(W~f1e!~PXi*-ek}@El+3=(TP1Wxn$bF!}x^p}C!Eazh zuqMo7E@h5|?W8cv|B>EdD&K4?e~nFnwYzNQXjsySCW}8b94k{OC#ohO%;|=;^;1o2 z6-;OS^pZv}p`o`g9!ArU+D|u}bTLy3vYb=uz1pXLzTDvZty#GUbhsR9djprWJCTkSCggMhK7k&T!IzgrQ-UTk;qV>7xAZ9z}q|0AImNScsS{dLc#$cwKL@5_{ zxPTyiwQ^Z4T%Mp()5s!F;90;q4Cg?x>Aeo4_qe=r@OyMBG-K0xOD5MyYApqG z2}@uK05{i+^wzSpfSt zvq)yjzQq161H&?c{05v!)d|~$LDj=T)+Di+cvQ_S4o_XO2v*NtJ=p1#kOACfF|3}U zMX$Pg?q#wb)NL_W7tq$w#d?>G!-l3K6lE%OGmw()L(9kxp-(CADM|`}>=33U^^-S0 z^GC3HOb_!d%b0SeIt6LLLWhlhd=SLm#b3(4z`x2)U74?`t~Ij1-o95(3`9sjaxygrl8F*59MVc<-RE>0A#?z|^S+7T$ZVoPGNy*t+Wn^jAm)?@B^Hk0y$Z}2GY1|QO zjI^Xz35l-zFQ>qa;X|HRR4li+-VaUmDixD;dPkIJ(d0jCx(_lEpYIJxuu)=gEKE{N zT4I^90(f4}+#Ps~JMmf#Z^Qt-Qv9XIPwkaprp%ao!e`5!jC#vuhR>;jf1snwU;gKtU4E6tC*Jm6t?oYf zbQi9CS5>cX+4T@dmnx0S%b$NXy)}426|BWg`~5U~&mZ1m_rm?Ek}0p40zY%!@10kE zJc;R`TweZri{alA_J*< zzn{dM7AHN9x_8W?j-BYqT(WhR@t$sjYR|^ll!}Kjoc7n4BO=wQ^X{DQA@xkYm$X8o z;pfPc7`_`Ykh(Q?X2$Rz+n!p6f6`%4-F3b(r6S?XM#4FtW}9Ln z`a@sZCw|ULzuARPm=!c45V1x@i=&<91S?5fX7;CmO<+!(*z&|DDf!GNzibPdZwrYm zot62g%{jYdGkUq>OYh5^Pp>v03Dk;ANNe_}0igoDn64{D%cA`o+0p(9y50#U&`879 zM%&+?wzR1Xh(G0g%5+I~JGFF6*Us)`v(7Dz=d|HNm8&jZFq@fB@Tq*n`+wapj_fkV z-aWDl296R(14nP3wLO&6QG&x{wYaD=s-AdXIskMhM@EpMZ4-Cq+X@kXYur>#Bt$TU zC(tmqFrr3#vuj2))Y%qWlKJJ2)IFD*M|i4r>Rq{#$@&^+H-3uYHL4~&4zbnw>@Hf8 zPC>yZ46yduz$1(%Dub!h=9UsX-U|?a?20yfvn$?!utDh9 zsx)ud`v%Du>>&B`SQn?-S`F+lpJ6vA+72AB9Tbp|1GcGPI!N^clXg+p=Lbf6`^-9r zc(>}mRrL@?RAX6Lz$8#dGKsmK5KTNxJWtFfVDA&3AijtGX(8k?u|#7cup!PRV%`0T z8;N6mx{GgNqs{~PH5w~@{CGjizG*T^yN#hCD@6&^28U0-JP-JwT#>F)nyTDpsF*7A zsgfjbW#Ec{p6o-x=&FF8jHY(f|2zv1A01x5s}%SNjvF?=i1>Fw=GuPrW_jddqwg8N-6&3cRX;FhGU){6U=t> zr!|F#Kz!i%GCIQrA+*kLIDcfc!B4h@r`~k+hBJe`4w9$9|H~{f%x$?iZrd$Zmahs1 zQKj@SS#Wat(%C#StM#2zc1GPur_&f2^cQkZDy|SWq}V?EDDD?)N)fyRcOlnL8k#vJ zjVd@0IOLSJG6^?&UUjlyOFLbuNf*?>Z2K)V7DGSQkd5jF`^OlM84p=pJ_S zj1Eg@4x$@66*I0Pm1XtBMCV6a&2FPT9e-TzSrIn*!U1vBJzAMfr_mXIXBaFsDe1L@TIt zp_{N^i9={&t+zI3w4t&+-t(O|Gig*-vo`QjHV7?@6r2}c7v2}v3fqLgga9v|B(@XJ z7cV<&oVVumKb5cvOBij!nhr46+)nkHO*0~`ErL>kY7wXrm!}{x@|oo+D9>9c(wIP% zR$>rv|J+S^^O=7t+aD}=0Q!f5Y>V^=w|Qh=@R^f`eue zXi&NiiiTa88K+2AWGTKYST&00X_1{>3RH6^notppiWy_8dcWiY)0k3C}$zWk$1q4^p-zdGm27q>Qr_bND z<<1jA>nx{jcxx$GxuM;1yAxTlvUGxs&DdD{~hl(uO1XUAl)+pO>;xu*}1$OC|n&=4zW=F6M z*=N`QQqDeT9lHi6+@z{F((yQw|7D{Nb)~NtRPLjFbJZjmof^4w{z_B8Q5X6F>wSxM zvyya!G}bMj9)#`=vTr$Ur--1PBCTRh)9@i~AdWmV_;;t>)1bR9CJyeiagwQnZ~d=j zPa17I6*{R(CYS7I3HBKQXX}Fo9g|J$pb3i=W4R-0VePZrQEgiFmi?9^pu{aoCm#{8%O=omZ7ZHCd1&UX?om?oMt922iT@cSAFUQ`6d-+LM)e3zmfpOT=J z0H5qSo*9GHD>E>S z8>K)!W>8NV$|bkTFFV|=2ldjA(tfF?%tSU$K23hO7+{*rmDgnpmFHlt`!CrGnSiP+ zP)<=cDQ)C)Uz}l-pBoDANsl;&*iDh>DdL%8W2L4lM6AmuoL8O~U%#{-g`z_%0_rrb)H3mZQ#1r) zF&Zs|9)kLoi?W(Y;}2k5oF+LYE}3|D_Cdfg^fa6Awqq)bolFd>^@HKoaTu4AuBhvk zcp>{f{FqegdfsE4Yq_TuW&J=;p9`>}s9y?eDd`jeC5ht6@hYY~rT|XanfnzSzbD%r1>3 zm5_=7b-4jmGs}IqZ{rzePs{vD{%*zrJGNAviut^4MRb2WNC+PgAozrEmN#x&c%(3V z?+#)3SYpf9`mF`tt%2_-ofN>VYX7YKtx^jUn5?`v1ht{JukNb*Q?9r>^7lc@@zy;f z5fxw+a|?4nQ^-{FTdJ9_m@QwKe`h`CJ!G~KI}-G~lF%KKF-ycz`p2C6;swdS5`e@dPJA0Kt|uQqJCaav9<;L) z!V!)E$C5Lfv!AnuL$a5wlErgQbDm8Pdckku5BBV{am4wl^-fIn7~|vr!`^#_HI=n( z!)vEd)r2m#grZ_i=<4VsAkCUkMMn)?P&A>6H55^-v0xX2fQU6z6LZFCY)z@C7j zC~5)-Vu8HZhMD`G$M1Old_TS)-|^<)Bw2eUduQ+L)vj`$@gv=^kiqn6#w7NnQ{DMJ zTu&F2_~(34hzOVcI3Ow#T@lG1h+c^<)}6||@mO9;W}n}(pst(s@ziU>bV_R5sU@Zr z+~wIm^9|(5rUarOY>@}MYT;3~e9eA&DN4NcS6QxmlKhgJyfpV#>K*i?tnfac-&j(y zS`;=eSG|Amhn_>`gaIu&z68yaOj2}Tz-jdVob-q6a`34zGzi42m)^Cn-!AMIc%ZVs zFTg^`t9l-d;A`R?Bj47~8Wvf8$KH@fIK5{Wsn^5v{YhkswXxsM+h}D+uyjwxXFmKv&Z^Sh7 zfBpM`?QVmO519-y$#qAEX_uf-ZBk%iZgPKEJ?IdA>l6=oG~+;fVJ4mHGz6lYl!sqN zywwmtbZ?1323M4NgfB9x&W`Wiqu&~4&N&HYJL34^!?H+GlQ)~F?U(%=ja=X8IQfQ; z$n;mA2;J8-ax|7zs;+LEyzBH-^}EnhccKHrBt5F&9+gMWXPvu(yuoWCR;?Pb*=b`$ zDL0ZJ8z1=>L&fMAtGY;LS+LMJmi;nS#eYpksi#<#pzrdMrDkCqlX;Ovwj3AEZ;6rj z1yKRBqk6(PiJXqH!*PoSG5F^}&S}n7&eW;4kxd-b$szMBc;k4#@#gUocyYX}4Bmd8 z$-Jn`y!*Uo0a4rT3zh}UUe?Xi<9Cb=X7$sJVxJU~`H0Q;U1T!P2rI%J9bN6wg^HMf*)ct%#7uF=*blf>fhg9+)tgs~ zr%qL!%mEHGd{!=Q5q}lyOBj+#k}Q_QS7I_RCQ-6k@+=_6pir^=t%iJ|p|i8ZsJHhd zd59h>D0SMD#2R}kA@laUYY!)FOOOsZ8TF~QchLpD;FyoGzjJkCN;i9phYNFEt^LRc4o>HI7;`k?9!N zaSBYLbGtKJ2!GV+T!_bAtH|2BS+k-!VD<`}E~#T|S@1*(t^kM!$&2M9D^XQfjeMpw zP`XUIM!H>^Bcq5G4d>9E8D-HYT`=-Fh6r^v+QJyCKFcss%Ncz2EcJc{+k%zG_>GmX zu2A3kWccJg=KofW&$vctCu@gt{ImfP+T@=rhfztR%vWA!Dh_ICB{Q*-uDd*E+dXQ0 zwK9q6d+L!G*q1EWFTPgHtwd?Gk(K$LCd6}|RzznV=8!XOhIXEcRqhzU$&YxL?@nO* zVF}KDb8#U^A9~tc+baQMg8lT_FT3;gUUsk3TgtjSgmfD3GY!RRkU%=Yy6CTBZ^ zebSkj6IRRbkE)5aYmD@>V-5KC?aE8pqn~_^SNBB!xld`3@^lUwh_v}{ppB|bINW;u zZnwt;d1Uqi=|FEJJ2Y=tt-HSLAcjVyj!lcQdh@bi@>WoKcE}_M1n5VB8Bpz;N#|!4 zS?-1&+*zkLYgIY#_7cH|A+`^1lST=M{D-&G{FetS z(eg(rp&shxkM=6Zgx{!~5^8*-@-T&cXj$9_u}FM}-&g2w1rt+9Dd+{A?vdbpY)^Sa zVyC>*@BCtrva6eQv|}-$@*3U^qT$dF;@#kYV6>T?&lQ!8ZF2|NK<#zi^gQK-6NCDere4eD~U~=aFte3HbUVragA8pS?|x2n@v3$ zsjUxFn|x}`1}O>6=2W{EdD?QVR;Hsfrba7GxtmRG`EnGnqtu``z>azgS3ds?@PEQv1cd8@AcW`Oo?cBF+x`|7@Txzpd zHp9B(o>fQ<^@;Zkm5B3dCeyLR9q&|&yqcW}m#uX!c;j-BE1SJ9sS@s9RXN847EofFaIi77FTpaZZ)5o>OCS%Zjh@6s6&LyvD^4bu%!wSH`BUP&8ExZpGxWo* zh3kbcOTW(FmJf<8HayfUPVc`p59;+Pqb@7JuN^dLC$=Hb@e6S7c6;iSySh~WLV z6DDO2dlVak5k&_pLn(VN?;Eo3udqrnq=r)VzS&oOaOl1dM_gaUDa<~%pea*Q`r0W$ z!f0XY1z_c#W8|`{Ojsja^)TsftMI!}`H^HE7<}Milp2@snZ%V1@PO3K$g(Y~n#DtZ z@DfCsqW>y8pmtHixBA?cFTJIs#N+wX!{-Jc7+G@k;UsSGfp<$+P}7gHYKA>ZKTPD_ zjv@4xq64>nmi-lWP~H;STUvE1@6HsRTX*jdmTW?=oYre7Xr?4kauhUpW*ghyI3X#M zxNjPnjEfdm(q=re9Gyv+6E)v86S7EN&rj{6!M&xaPmDdhm(cP%Lng(UGf}HlsVP&m ze7VwmhH;JY7XzsnxKd;{E5wEH)=CRuCZ1XWD@OZ(Rmfs!OSHqaih3>LK-~8{inCAb zKq4WSU3>!530OsxS2}q$XDg?Ia-JidWoo7P%N=_>dv&?;w(^Pc`;X4d;nq4JXfQ;% z1?J7>ley}z9DJ?xVW_`}a=01|8RurU_t9*#L;L*AmZ?xcHl+ct*bV07Im`!e|3}hg1fez=~yzVbLh|6x(@5&OTZ}ei=7fEBKxXFc{CoPxW zrah7N&cp2pE8T!XV=~gJR~Nfx}d#PLcgKm z8~ux_Ecq>=Na*JgZo4eYfA;b=c`xwIA}eJWBY?F)8Kb<%$B8byeb5@yqu z7G^>HGRQ=>;y4KHRB;}2-g0_4$bbjjJ3KZIXPVbJ;4A>W&n4-*c)2|0t@z}NRe|O4 z$&VHcUn~;{azk`~USP`7VYGw{eG5=AzM6`Gb20s!ABs=X;XB14!IJdF8AVk_V&oRO zBz^k65eK6(+>hLv9+CdD(|+~d{_LY3o%C39!an{<{w45dKIc)7om@E z{oMVg1{Is!%`&zdbE#L1Gvhn9r)`j^58}2GIf^_*?5}0N<)Z5F z(pb?ZH}XWI#i#%9E{66w4(t$H!MHxq((%1eaS2|ymZhl z6joMLHCXNjg(HBNbXTvZCOn zUsS!`BYu64e@gx33nQ{+Q-BsHjWs4Kb@!c1cRt?T+Gwa&ja%JFU+kp*co)+5GMFA2 z%z9=9bA*Vg>rRRV9lg1v$xd})4^tY3JI%@;Kj*|c2f_OB&(`C7&V7p;2c(jzXr)r9 zgiPe8-&+PWWzZ+3R%xWRfr%(i5WGU2x8c+JUFux5jL#y5JX@fPzi6VKk!9h^7(a&Hbu3WUZ z@naWx?J|YQe#$9IB_;o<^=O1=&i*%XHjYLeppoA2Y2!uOU7F-g;6?|5aC$D8ok#L2 zl#Scte|~F8hF4{7=yS`RT6{2o(Ph3n*ZTc$c6S}8jR_o^TA)Pl1EkJ9{&$^46K$l< z(wE#coi-OQY4GJW%=Ca%ck;D>a}jKOxspTQbQP8>))3NAG=_^VIDL^FsVb~0kYAMF zz3;)su&I}7Z{Bfz$I;#)^6s$ESl-knv%1k#bVyQdoZ-pnbmY=*A6-} zU|0h_w0@~AIc-mkJ_H#|5n@Q~L@|E3r|q3?g!OY#1B%CX8$**ne# zEx+LA&OCpLwVFSq9*9bg0uL2)Z`7Tjz8v@dL?*OUTy zw`-UtveAzxS|(QF>a}+y=&1xKCL|Q8mDHW%DfQio{tOA()EOTyg}|{LQkMgpg>C&# zXp6rpQ1@2DdEMK+GY9SMjNg&bk$|lC?i5Yk(;0s`X89pG zdcwKS`%B)jclZV#PggnNyl)z=aS(EDqTrQh})hwuFh)B_Pi>`6hoHK zSBS!eNy06{!@{$|>q5D(Ntk+icT{<89zkR(8k6z%KygsV?xPQDn4^ERyz|+dIs6Ax zP?>AF+o62VKM9PCV$4yBJWI{pM^uPxMpx)n)#hy~LyG)SRhd%fo3(kxWxFpu%U4~z z;u`xTFW)Ag4&8|BCe+it!<>MpouCQgILJm1-SaIcNxVgD`O-HXZ@8LR(^vb~FRRDW zjFX&fMg$LLEtoi7GF^gjNuqekCQu~8jV%xI=n`3mM`N8zQfN;;VLx*F7L=G(?o8Y%w(;DkiUpG8Do(@CF`I5%EbFX*2Q#~sE z&?H*2iL@JfkndT2I%0&!j3vthw9zF48FIU6Q62eKC!LE& zcLhwQuh>7^jy{iTZONWK7JdBbAmA{%T%UEV?|j{5HuLWOF}o)}m2SziUO~V}5*?uJ%G(sTm$6)^C*^k}(;#&1;R2Md@wx(U-nE+%{X^**O}njp@|nYbDmR9gA&_ zr_W)XFF_^N$&Nv;S8Uc#t5+DQ2i7S2>{;e#@dYsh)s2TgKHG$%&( z)_#q;;lT#BB?_dz7&~UoUs~Z|uCUe}oH|smz;mgHP~qi0NH30&!5EpU^VBPwQE0b} z{iZu{l^;28gdZ^8%w56`4S~t@dQ$f$9gKU-!-4(8;f+Hx>kCU~Ho<|5Z5c~(tMIPp z&G2sLp$d)}f9%ScZhtQDJLxQjwdMK2tK2JkBv+lYec== z1F4Hr$X$fgMO#y+rNM)7?~ZGH#TisL64P}_4#cuQmf{NR$9$jdrsxJ!mkH<3WR7&) z8V`*=HMt^cyPxpyM*p!i)4Oo@=54fNw8wHu_*Qh%v+K5x3F)bi2_A=J%J`2ZdliGh z+smjvgDM4&3!2hpj2@+ddPLLP1MXe7Ki@I??c>}1erm#R2hb|@ zE&@C5VuwHE3HI{R&9|cNaG#XzxWACHLLaSXD$1DzV8g9qnM%e;VkNUBex2L_8}5R6 zS;sZRbA_j}kiiA*>^frU&>b7~>j&tzKIFQ>i2PhLoW0=7UtXv~6WsZuheEm581m>& z{ZyilqTZXb0mIfJWlh#DeS)46H8qB-XU51I^Ys)BkdwGquE~H{_5Q;`kb4Y+rGFL#;7JDrQz53Ft$6 zA|IUiAh53AZmfx^-EropX@;#PKO1UbV{lPuRb8S=e~(pr5EB ze<19i*dO-4t;2l0qKk=#{r_-XQrpEOe4A?NK^#2uU&)NwTu5d-5>S;F#KxT8Ybm57 zzjH92F7dEH-{)hjNLs4*ti8WW;wjfn?}<4xkRgT?W7wD=da&%<{8G!>B;=Hq>L z;<@n0NjoovhyoZWig9i%O1wS>B_3w1wlP_Qwpy92c?d6QYqna^)?DYYm3D&?+s6z_ z1X?)zT}4IMPEyzsRt=|-^PcmAbBU#QkM*22bMekz)~tj4;H5ceoA2!1c+_154`2N5 zpM{Bz>?-422mX{MQKx7y57Bt`yx+uuOP7j$!10KI(>M%Ut|n|8<*)DAc^*lb~Rf52nYrlRlJWwqF$WUg)!w^6rux**&NQzQ-2h9nIr z+z1Eq84cy-uZgLm@VA0x_2!81O{by!e))hIkXvgIa=(~ZTcTrd^91&^xS`k#xM)bU zM%9a@3XTF28XfQHp;H9iuvmq!OfRrnKR)oLK`7O;7s8M3$RCy8Ef`< zNqd5&%cbkD&Bv{P?S5_{+0sJk!u2%^DC=v;GyV~BMz{(4?}U`QG?k#**1Kc<-8oS$ zyKnnOy*VM*D{PN?bEAgXT%D__eVD67owvL@>N>qT4eB0gt!lkHP+#Y(uiQ?O!8~Q9 zLrDbFcN;AA1=HG6<}1+t6(c>h3VCYOSnMhfUqs@isl<->$qL z`XlUqg446Lp4f-kdgg=$lo$$HN4ZH6Q-n;PQ8koC3gr{F?>l7>Z4`|;BB85-wUCBZ z&^G+dwpc@Jq`jw+e$WOph=TUYNO z<2SP2v&^zJyLGhk;z9n+Gwbz7Mjeiw*Gzj^!bnX~$;DCuCMXpZoQ2o26TeWGN`1o1-=M_egN5MRiN zftiv+akWG7jFgeZ#?RN-+E2$$mGr`St zWNem0n7(`Qe!@>C3AvlN848DcI)=_^(I+`1ZM^l(P3SL-6s}%_`c7^a;%g?{@zx>? zxu1G7S5SSoR5uQMZW+Q1f-c0lZw2Sud68ILB1W%8_HvduP#!K`Bi|wp6(g4XrhJ0D zMGm}HVx>6G^Q8Uv1Jljs80Q6Uud65;Rk*#Lk&pdeWPc;~faWJ_2**Pm^qLQ<$zPMN zn#~xx8|>6$AyGA{Rqyqya842jZQ&f|oaJ2S$T>}%ZBjB%bFH#cG5bqXGnw7JR*f4E zX4^pkF%NuwVv9MGcc$2)5gjoTMraFtmzI*c7QJSfp}#tsnqxavub=s?)VBLJHPa7u zrhNVI`uO*;lmiZ7k2=ufVsFY4KA&$RH&dSE>#Frm$)EGz4?cKB`9S$fsd?e+@9wFm z9;W`RW2{+Si(J7VfHO}B)qB*qV+!3-TaMm`Y;CU^Yg*mBNZsT>?jJkX26P*b>+PY< z(IQvsJF_b5tHxe7S4^Jyc{5VmeXknF+xU&GHc1(OQ+p6Ogq^p>38wK-k43;Q&74gk zuvSr0DdR212wC@$UOk5{;!RSrl)g%duEQ#2su}LYuoE{4 z!$l8;TSQNJU)p%RO9o%i!*fEve?Q_YB@cTp0)Buzrt z8m~jAn)Mwh@Rsa8vdW=4jURgQ2x&Jtmqb5Gx}h`Zd-utJ24jrPz7nMECv%4R-vFC4 z%>VRLZ#!f81$rmzmpQ(1FHKeNpX=DOUw+;ST&M;Y(E(BfdOHaW>PWP}ZmTZ-n!Ey_2`DTD8JV zkcR8~Nr#xMykc-}y>9LaVn3~gmMTglgdFKDe3c4=uT3IRr}2+8h(9AewSC-69QtU0 z)?zgzfi3`B->gH4X;rz&gKD1B`Iiv(kNZ&F8SQgyRPOx@yRgav=;#>nxtyI2ml zpvgb#%!<1RlO!~B%SXJhP>y>+eauqQeU<%mFv`QPyichv9=6ZHDRlFk+qxba)lpH8 z*g!Hu^4@hu7hB>di72u>p6zhGgCNd!xYw~cZ~XNR?0N_BUI%usBTo`genOE)P~;I` zlFpPShUHXg#5`%76kWPxNVNo1#r($$+)D7ib+B4cmS|4qwdb}D< zS9>u+KF2Wp89NzbMhSy`i&4*b$JkOFd?zlF_#0KTVWsudh3>1<{(@vT?c6conEgBu z%mjK?k(b1H&|epKig;#A-ypk3!4KZ=sCn_lCX^Xsbp^S-hAFk%I`H3lh zWVY6&KVhU5@)p>JDFPWIoU$y<-+4LxSOxIWf>}+0tw+0IWS#RF zJCT%a=v^Ln@PAANc8ZijS}Z3q4Hg(>kr zabq9Ct$m$BvdBU-PV}27!LNsuyDnfNgl@qk|10?NP6V_2IkSgsnW-sQaGzW6o3JM$ zvi!wDEJ~^hBnW`2{IhRP>5D&dq(1{Eme!U{C_`ppb<&BU6H9x`US4u8Bi?7X_tv-T z5bB972HZU#0uKRYMVJ_57{w37XT;lNRR0SKakF^XhWvrpF7(^EjhQlegd|y#B{?EF zCt=@^C?t3!HBJ&rv;dy;z{$Y;T36k{^& z#Shf)IPSz9$KRZ~378jm1}UR-ohGv*L%Ux~I`#b#EOg$zun*ErrlpQWduc%wu)2?Y z(;jQ_77`u=28=}7WJb|9n8D3p*H_PA@0h_37@piOFP@d=QfpxK#2z)p)T&%+3*y#2 zg()16bk$i`e4=hi)2$sd>O0QHfI68gHNUrK+RtO3#3RNy!feNhUFPm5%zTPcz+ybs z<>;r>6prIde0WCq@O)8uSNTl&QCUl&ss*tN5p!LDojcHV#HKF|yv&X$37)~U2)cpg zWR!=yCteNblr)_r%<)7g918-qes=C}!Ic+h6UaXzZ`b>MP9k!tm&r_=&&2pW-EiQ?}3T3T2LTf9mT=lF#xC5jo zQ8BBE^_caR)x$F2cx`>g%?;c{hgt5J7AVnVj@A9TDPp zCSVEb^j*RiZiM*C1nS|{h6&QOdc49J9be){^N=fV7KBBf=yxX15>@bm?(op5=Unn& z0?CAOya)}zP<4hw_9VVts^>{WUsK~Ln{?YV4-mg+77&U1Q7NT{-#}@l zeBzI0m!~qy(bc`MhM~FB0%%U6wW8$=^w^wuz*^En^OC%wEtjwvXc&VjDTQ&SL4wN{ z9-4H0a96Mgq}f%Bar$ZZ^DirWVgi3RpN>hZ=okym|Mz<$Tov)IEQ!=3lIi%U6!-n# zzvvN3c(PaL!m<$X{mU=&Ge91F!D1|X8*>Zj(pA`y>vBj8w`I5E0gYp^xT`18rFrmG<4l0 z4Rw1U{`_h`WZ$-A!*T=}ZN>-7pOPWc2ed-kF$sF9^p#`kH& zyiYvs;wMvTJltx&y_xE6Dd@M5Jj!okMn7|`b&p=So>j8|U*6+_>u3#sJ3ogn;p05D zC6uqxm$x&?iDl4yK=kbWB^JA>&UxwiAy^mOR`2SZ$j0cFm-{~S&@-Ia;5l)o(sOHk znY*n&DxE2YyYymQnLF2?x!~H&%R!6&nz)<};*R93+sH^{BTA-4GZuqy64?GTG2ZBH>}v;SyxCu8he3wDIRV0XC$FE`|jdH#1k zmmkJYj73V%(<1x|-Q+*ww}3)rh`w;RaFP&rRS^m5R1}?Pk(Zd_d>|`XIX8FR&>(b4 zXz_h$vj_VkyoCdeTtrc<;(=p3=v0!LPZIpN{F+6QjDemuS`+k4FuX{n$O0iIk_K5Svz{)0GEN>I=Z0%#R|S{9D8L$KLHvi>%ZNZk7L;)WE8m+P zbBVG}7r%KFG!F_X#9-a~of{406YqBPgfnHDaArTp16k2g^tn$$l_C%)_L9=S__luD zq7+Iett`glB1pHTZyiT%ihL*iCN-3gyn~9(7;-nczkG*wwS24m=zWwxjZR!^eMx># z{#^b^-bq1IX+-r(WfNnMlFZtm9LGXWm1RmbBaZc)v7d!&Es^Zi74ID8t3%ZB>P_lt zA^S^?sL02gNgHVwTgmf}(O`kNE(~chu9#uz>%u;({xrWb6KP)3;OIr3MF}OI6q_ra zBN;f;EAnSVGQtEa*wKmcep?ww8R$Gi%BW@B0yYzt%N4JuJQU9A<#AY6{Ije~7Vc8Y z#a&8DRy&J0&#=7Jy~UI6<)k_{)eSmg5gv@?;pLLF{T=Qm&h`CW6?%{rAtZKzn>Y*i z7zvY!T}cFypUxOO2y1tjd#b_ns!#iXa;XNy3a86)N6bxH^Vd!tok9P-!>0o?$XNz ztNxHv93#D4!kIz&M~a%&lk$o5d^_#sQ4mTB%el$hRj{5r9#B;nB#GoUp{7IY51tca zA3{cShXm>#C}&2q%X!Cj_ie)*3^4_yp&w#-{M*HNj z&aTv~zt{fDwG|#of&{RfN-*b~o2n5pK$eHC5R7nkr&# z6;@kCEKU88vA?o?*F|FXB}4JZBNaY4t>WD5iu*&cuJQd2dRfN=-RALAbaz6 z_YEr*yFiM!i)YdzbzkM>L}Nc{&E-2nY9gsAnO$Ti{5y}}bT#sqN6JTwwpJ}5dx(NW z(IWa<(GJn^%_GnTdS!3*&9oC&{NqO&SEm~qlZ}kAZAQk#k;d3a?R}4{{wMX%r z-Z&jswl$j+Vo9fCA(qjUQ8p=-OsmusOZHg16l-=Y6k;t8&o9KCNoVQjPUJ?j$(6iA zm&Xy(l^@g~%%-H@SK@Tzph|o0vbB1-E1Foef;sKN3TBAf|Tt zSB#%P*MR6+2Z(hE(gt1IH)9=ZrwiJBV+He~7Ee3-sO?}Coi@A5JA`aJh{FZ5hr7)A z$@kk3DgX;$@>MaoPpw4r-J(!d-F)}Y)F~DIudJtZer|Z?tC_xirqxbn(je)8qvNzd zSJ@x#tO+2dIveFz5hn)qnHLJa2Ha>1==XC3gc<~fv~h_YzB&^^vG3f}uUwZ1DW#Tj ziL5284%a7K#S98kqqt{Mw}q^r{+V``{dFPMxCGJ82euASqFS)oFKx~TfFJfMTX4Di zDq9!biNII2ynaV)bqIEskDi6SCX_^$-ntTL7P8Ii07lvswliGET(C2ow&5uK07~^t z7`^&n_?)#5heyy?3_~nn>jA%p6Z=D&1do3n8koKQj_&8HZ18K8fEorez7$8eCYZ>> zhVPyn;vbcoXn&e8II5iYWW&T0AJ;+VBzFOK#ML*O@~PL*GG70%zIcJofa3{)IgLl* zTk#$FKugY#;k&Qn6WFPHBBJ-^M7IT#2_;eLU{Y0-B<@6Z!^)Fl)WffkW$!nOkKWt4 zZ`r;H@#u@#JuZ4LEnj;uZr|uLtAr@Ua)6+WA+h-mn zET||VqL7MaVoXKpt@w(qVZ(~|g!tHrvqKw8$*_{tkTkF(CsJE1xeBY5rh_nS@033CmWTiN7OZw!|L6P8poGq5zcVooMOf7y+vYi?lo zAe{njYbhe`Yk>}^g7}m*RyNF|z*g%O^xto3d9)#~kpG zHqg9p>MeTRLq_@t1gmeM>5E39!@*jFRF@IDhqUhKjkXu9F#;`~VQm@~@X$Xrj z#ZXsZo5q8Nre`3mrE4tmY}53$Py9Amh)pxY(DaehiBhMG!C10`4;tS$ok*fmu+qiY zSCp}JF{zl0IV&MS_)N+RI8-m`n??ueB0Z#qkr{c#M@DM79$tvcPe|1IhsVbV66suN ze9WrE$oSSyOiMyK$B+lnU#m{VAPNE<(Hc7GMIa1O_$Zh_7z_W@8gJz0^g=s_^0o`( z>3t)F>%Hpb`ppVzc4MxmoTOZ$+@rktI`n;q4R!2C>;v|;OJIQ>Q+~qkEvSg=L`3iG zvPgeWUc(GgxnYMBMn;B6t4Bl8w6(MywBxj5S{3av?JW)U&)Xl8t2=&)2nS>svLSiHzjNz}+A{QnzLJ)(r+|Xr_{xNGKN4R1~?ENB_iR@v$J^hCdoEaCC@fK(! zW0aBfxo~sFM8Y00gv~~J-tq3_X~Y1-@uX-ihUNtZPqw$$LJ~IU=q1PWCJ<2M?4*?fq;+Is z$SX7=vU1e~L5+{E#($hs`T@)Uj80j6p0*you$U+3Pvsy1N zy5nSfN5=0BL#`k^(KD&Bz|JdDhRgxh;7#S5y0P$&4h5ocwy+O z@W^0vv6uFlV!IF(T8^8~k7ymln8sjQ-L|yxj*qz-5z$En1J-7OyD*j?z5;$2Gy3<9 z6BgE+xFtufN_rTXWrJpKu*o005Isjx8*FCsO%Xp67 zXL|=Nq3?;#6u4dNF~s1;2qGt-$O!xO1lxLQE7A2eA$zDpgncXNp;NZYRMdvnlBT#W z1oG}yqP;Wd?dDK_S~1sS4j_wR@ARrc&yk55Yn|+!lN{SzT)&Nj15~^IaB-whbF@b$ zBzS`>q?%%8Qys4T=B{#eK$Bgpr`kV4j+176M(#1QolwsFnAy(gk4bEjiF2PW5${6j zT>cYF^p5#zstYQgGX-@WiJ9%HOPI@F?Zb~*7H!|jM3Y}mHFRQj&b8Mi^mqrcUozjc zxwWz#b{Kt`f_ zA0E9SMu8HO;v-S!B99<;CU@p0t5$onMNTGvYk0dq z_P@Db3$V|2b>r%MeoJy-I!+9o?VhAe!2A0Yt6@5mV48)9@4V2g5WB$ji$iCGhDV34 zT6O}h=I9Wv1~{PTHBqY_QNo%iCnSWI&S>YFC>L~OQb@er0>`qjR&OU%xF*CScG)o_ ztTE;@+8i}yV(2KlASXxkY*NURXd~v`x64N|-!6Ay#bVFy#cIw865 znyJp{xsLA|dk8&m^)?Fe6+DSm zws+rTBUaMRsUXxzN=j|@nUa`hw_qgm{5E~6d(JkOg!ILmhOu95aeANC;^MZ(ex4v_ zn*-9mI=^j-Bhr66Yl>4C^Vk&T9{N@zCbIQC7CAMJ>ganEjGyjnj%`kZW@^7XJA$#- zcFmNb_Ul{I?1HA)uLzkO`JPFCx%;uhapsGIg9Xc$huQhDBBK(~6a9v;R`wXfJk;vD zPxs{H$-8NJuT*e_^$b3*nS!vPp1F%R8KefCO0f?<$&5q6CtI^7LNOvO_#|?pW*JUJ zo~P|c?hZV4o_hZj`jSOvzMVCW9eC;{yYCco8K(%nzMUiRWh`P^o6?b$Mf9@*&&{g~v3e8=`ueyq#brm;2p{}d=c31J0uHp+& zINVjdxvMy?t9S_%W_1-icNN=q6%YO1RczQ*{L{b@Y0mh{-uTKIePwriWtX9F&R3S} zE6etkWkF%RuT0=83-guvLBY*eHpy2u%2!4?;wvNg%D(CoWI3`IXL4i@a%5L?Wao2a zhoO*}Ba6$C@p5DwD6n#5lXGOW92xa{j*OHe>(O&WZD(G}p1+j+`BHZErR+2m_P>;6 zyp$!rltn_p_oZycOWA~%vf)Qw$_!r0zU#h{St^ugEESI|6?ZHZS1lD1DCAoz4p=I- zSSr>*VU?v~silHzsbE8aX{i`xsi0UYNQIV)FFFRYNJU+wqUubf;$ox%{vVH2?1iVy zNX6<%#fnHp2o!=M72c7G-y#(ZC|E}-%p(R6^~Tc&C) z6qaVH+%r{UGF1kJnW`QvNLHcxt3q|-Ooi$~h3a^PYFC9S4GIYrsudNgpbC{c6znTh z))lH@6)MV&3Y8W)qRuYW>oZ-d`YzSgE>%gFDh~>KyHs1cRB>IZFeuFHQn9*JAb=jRM*!;RHm7 z=@v$#^gN-cNUwSap-|+bMNH(0oRFy&nZsPw1P#?9eAY-tc3LzJjX`74c+F^I6=ep^ z!^9Xw?UkiyB}(hkOhejb2u!&M$YeMu1dX<&>b~yjB6n#9TNoQ4Bh*E`g@#CA`bk8m z2@{Opd>!1WAssZHr$sB!HelM`0ZDl18rqGnYf%omfj}aM1!>X;(7_3iH{18o)Ces_ z5oo;@Z9qwA6%uOE3B*SNl&VEQP=Pj~%pYj+R;mS>j%GwZqD^72Z4J#B$niL(r=HRV zm(T#_)&5!(fOsefW^^bREku8yC7R0diHxU=9TN;7U06E;W>b?83u!%&H=2cJBiA3ia~ec z(OMf;7R%ek1$Bk*r?R(G=c3<`(hL2L3YSrK6lj^=2bVc4c8Duk5 zdYtziw<-3Vw_RoEq8433JJDryaY?r0Wzt>--D zXq?3;7ikmGYLtTVkai8qM@2}6v{mQ~I*o23Z8SQME+7f=E=DDHI1_nJ0j65nT8##M z=jme97=oGc{Yywm0`+vJkeW;Q3i{%!p@HjSN1v@oHTe_mqqb?je-Kk$+cY!YeX)-v zAS2`dUfTb!USV(`0swvn=+@xp1Ly$2kPn>(=)VID0RQNx!|m~ZAOAnP0)1ekAobq? z@FV~0f!`B^`iJ$$CJ(3XJE(^yO#F7i1GbTW*)|m3_!w>?{C>gjB{l#asXp*;2!IQq z02TxAeMSQY0TKa&0p$RE`y06VOyF4;o=3qmzAyaozr7wr9k^fddi>b_kuiyptNL$a z{1(PHD3}1gk{;UWp>;i}Yy8(Ludjb0Z*?|3k z0|20(K!*T_0Y?Bw0mlG2fa3r$AQx}~kO#;I6aY>F3IV48MS#kM+y&eN z+z0##cmQ|^_zNHhC;+v9I=~|U-VW*k4S+_#695pZp=W^SfER$5fL8z|Km}+5Gy`4( z-T+zvZvpQBU<*R;0UrQufRBJrfX@ImKm%w8bO2xoMqdD3fNlUxbx{xC8{j+O2jC~5 z7tjX)Ls);q!=UjI07L)@KnCalbOCw*eSiVL5HJWZ7%&6?a{)vJfZhw3jG*lTOaW#9 zbASZ^?;9)u!vMnpBLE`-qX0Aj9bg5p2G{^>0iyw90Am4mfN_BFfC+$!fJuPK00!Wn zF$sVEzmNZSSKxo^|MA;Hl_~D{#)+n$-2?sq*s`Zg*me$XSbSc9*W-OWK4;(p@Lnhc zfOo#J0DL}?0>Jy`O#t}0V37g$3jnO||LODbjvD_ANY^I7)BoDv|8L^}zI`NMWsD$! z7w^bqGI@d+0p6SQ9GJ{0Oh=}DD865Bz(;6s_*KHcn;z0@r551l0W%!pN)7%k%&GW0 z@&99VD9D<=V4l}Z{5ZuC|rWa(9@P$!G^yd zdack(;3#y@d0zNl@Xt(v4j%so_^60qDg3b%hQ8?G(38OHaRZ0!-;V!NI}#Dt>tXRU z3;6>$u+0O-qfl6G#K4Md+28NPzgzza{9VRpZg^P^W5mrd(6Zn)-s{7!mkM8@|26)r z-~-~nKWF)O9n8^T*$J%}@XuF*iwC9u?hD`k&wk-oOtphDevDtY!{O10zqi9v|J{N= zc3y_)C4kFZETw)PsrOe|(;5_&@j0 zhVsAnzx0>-UBA?y`=$QHFZJJlsUHs)>EHYJf%3o4FXfl|1HaVY{-yrSFZHJIqyBsU z4p9F0{=eyQ*KrG5nbM*rUbTqyth_{)E(Kk`fc-gDmfIp;ZF&+|U-nRmmkXJQ)E?_UC}-~als>$itpe=6+yfw1eJhF!N{VCnb2 z0$6{3UD)+)Vb`AxyM8R}`nj;{i!h(*_rD5QfBqd|*SCjV?+LqpJnXvNI{f}if%W^} z6n1@c*!Abbt{)D&4wJ+%{=LBZ{a1%wZw$NM9(MgFVb@QFT~D_UzyESzz5T8YyS^pt z`jcVT-wC_^N!axTj^X!T0erbOzv6}Qu;nhF$LryZ&C-^}(>~i}Q!yzXn);{-&_&JHoEN z8Fu|d*mWnE*ZIF3K)?UZVb|{tyZ%Dh^|!*VCu1=NNv)?oVEz8rgk9edcKwH8*Y|~8 zKNWU86I(R>{?)+x^RExP-WqoOsj%z4Vb?zmyIzQGp??1>fc58Z47_RuE0?WQG4f{e#bML9|5huGZoala)`S=&UUnO05Nzr%-r%RqW z$d9E>?P;$=x)9+9sMLSNn)D9#bq$DFerH;}aX72qkg{XdTk=e0FOEkJ{mH$^>$M1r z5Pk~2R)R157;Mre#86K_TWMSXe?QIIgs@WanWD7=?;-aiZ?jcC3$Wk%Bi5w1u@6ed zT0!~vO@od@=0S(lFIMuY11}cv*AM=x5nI3?*hG5JQDr*qSZeyvvDh@=@SFM_Uc^pd z19S_n8>SSe)0FM>noLf=$>Lm$cqwod=qxXF8%w5=XS(`c4=VEk>Nbejg}Slt^_V|! z45ICO%q}O>!oyg6#-i_W{47B@i*fT+4EzS@IsY1aHSmeCRAsBrVQ98o$YQ9njaCnR zE@2y&pe)q0VLI_t+CF?v)5mP2_9T6>?aBMf8eqoys_Wpyx(-gP>)^z?4o)^z?4o)^z?4o)^z?4o)^z? z4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z?4o)^z? z4o;`u^yquesQ~#y%B#L$jsNV1ULj^sm`c1UmQ7+{em(daQl+ zWcRwf7q--DB`*NM6V>-3?j(*Wwj&}?D-2F(Mru1^0F ztP|}W0XfwheFnq8P<;l?A=}4nkrQn=loLasPJO5k|J9@SG4zdUCyD32_ja&8{~qr& z0(Dwt?K2oSq8L_Li_l+Z(|Gy<>OvX4q3YC)`Y^1rvOa_6?wHhRbYB6^5Sp*RDXgV< z??09KH)vaF|ggt9y9ZN%%*T9?m(_aETB)L(=Dd$2!(Tu`4D zPrbp=<{mUNw0J~Tlv}*+HOAwSyh|RvJ(&*gb9S@~$6=t)^%?AUQZ`n7u8y*SZM+M7 z`N7`+Vni4dT}Gz)fHBY9V_YyDG6qe3h>rpP4)lKVZsa5O0T-E%8Gf$c=0m_epdY~X zu2I+X@%m{ho-KdUHhQ~8qo2xsQzG;`(j|}n>~NWKt>8SuwK5>nZtEd!eT5BFyrb0PU~%!T$Zv64?6I{4^gZu~Jd-k6kr ztM~0hk?Gr5phTuJkM`wIrXk&7ESZL{iL+&{;X78=y9}`n>nZ0NKjve<$*k7UvFa^- zVk+;#Mw^qVhu0zS9V^!lzGId3!*3ce7MuEwrKaB*RaiHw!EY7Tk)@^{&<}w3F2jr1 z32cCF!F2=qoXGD*IhGf`6R|II4|+G|rmx!ZJ_RvlI$&uvH`-gxQtw#Flya?g6TjVpD z@ksf~pOn}4yu2Pwy>JWsRj3!<4u2K!iTX4<>kWoh_^mKBJB1Iu9^^ylT*pLTB(Jk| ztkEXQKKE6~Rr*}LVfHk-dceA7^^k94*h=geb@N=s`2(^Qa644C5jHgd7d)mn0o;+=M}%HGq2GddzlXH zyTI2Y;EQAKAmX8Ym-~^tHt^TrK8Wy$>U)VOAKI#ESE2p=Yw!i9e5!0s-YVO~^!C}h z79^w2+Ar`V-)tf_d@HDJlH9!5w_Xnl?S@?Ww? z$_Fyamicn5wP3dPOQ|;wVoUlE^$(24f$VoKySRF@y!=VKP1k<&6(4+&FyFT?NJ{!F zCuQ-M5%n_bn#YeT#{8-(q6jx0qP>Ehg4| zi-~pLVq)F5m{|8MCf0q6iFMy%V%@ixSobX^)_seKb>CuQ-M5%n_bn#YeT#{8-(q6j zx0qP>Ehg4|i-~pLVq)F5m{|8MCf0q6iFMy%V%@ixSobX^)_seKb>CuQ-M5%n_bn#Y zeT#{8-(q6jx0qP>EheUK@q~N@eirZ*xE$jHQ$!NW>VC+?x*syJ?uSgQ`ymtSe#peS zA2PA-hfJ*dArtF<$i%uIGO_N5OsxAM6YGA+#JV3cvF?XVtotDo>wd_@x*syJ?uSgQ z`ymtSe#peSA2PA-hfJ*dArtF<$i%uIGO_N5OsxAM6YGA+#JV3cvF?XVtotDo>wd_@ zx*syJ?uSgQ`ymtSe#peSA2PA-hfJ*dArtF<$i%uIGO_N5OsxAM6YGA+#JV3cvF?XV ztotDo>wd_@x*syJ?uSgQ`ymtSe#peSA2PA-hfJ*dArtF<$i%uIGO_N5OsxAM6YGA+ z#JV3cvF?XVtotDo>wd_@x*syJ?uSgQ`ymtSe#peSA2PA-hfJ*dArtF<$i%uIGO_N5 zOsxAM6YGA+#JV3cvF?XVtotDo>wd_@x*syJ?uSgQ`ymtSe#peSA2PA-hfJ*dArtF< z$i%uIGO_N5OsxAM6YGA+#JV3cvF?XVtotDo>wd_@x*sy}O5gCk)J?$p`tfks_2wd_*pYDfDtotDo>wd_@x*syJ?uSeq&wj}I9#(9()CF|9q;-9OY4M}^Ti8lzyLl9w zV6ok_cslbQ^v8$o=3ekc+YQeE65Gwa{zvj&1%LPY4e3R9|*w3f>4rMgHCOdxK z!dVCOBlx~AWY6v`=rbPjP0W8nc$kXbi>4U*lY4P|UyDE+(^enWH1OAj_!GpmeQx#b zGrGXvR^KNG`x4s5^ndyO5%rz}yQlapo%eKG&wFAopE}5*AN+N|{$~b%eT+dn@9D7q z-qUIQ(DS18q~~R8KlnZAISBj<(0j?dHO1R&&GP=jYVsbmn!VkKUj}{=^iEvwNN7Ja zu35BabIgfMThK-i`6g!1mT@wjV~&1;9CP9)xYf7Y+6Df$`i>zawx1w<9iG7fe)Nt1 zI~W2ur*_ynGdgVTCTaUL%=wb097>P}rqCqLT{<00%Mg8{^F7P!e{wIG6YFrX4ScnO zziz~@A?BFtu)UVC*Vdh}-}X-#UAC7py1{Rk?P=g2f&N4Cp0Nw@S%H9p21-=%QO@m-3Hxg6`Uq3>*Rth=pDPeeYF zXDV|;EbP!5mkhT<6YF+pV%-i+tlOc9bvrb%Zign;?a;)!9hz9TLlf(EXky(CO|09Y ziFG?Pv2KSZ*6q;5x*eKWw?h-_c4%VV4o$4vp^0@nG_h`nCf4oH#JU}tShqtH>vm{j z-40Ex+o6edJ2bIwhbGqT(8RhOnpn3(6YF+pV%-i+tlOc9bvrb%Zign;?a;)!9hz9T zLlf(EXky(CO|09YiFG?Pv2KSZ*3Y;g)@{qgx^0$YWL-L_1u+m?xS+cL3kTPD_R%fz~EnOL_i6YI8RV%@e(tlO4} zb=xwrZd)eSZOg>EZJAiNEfeduWn$g7Osw0MiFMmDv2I%?)@{qgx^0$YWL-L_1u+m?xS+cL3kTPD_R%fz~EnOL_i z6YI8RV%@e(tlO4}b=xwrZd)eSZOg>EZJAiNEfeduWn$g7Osw0MiFMmDv2I%?)@{qg zx^0$YWL-L_1u+m?xS+cL3k zTPD_R%fz~EnOL_i6YI8RV%@e(tlO4}b=xwrZd)eSZOg>EZJAiNEfeduWn$g7Osw0M ziFMmDv2I%?)@{qgx^0pfV%@e(tlO4} zb=xv=JlmFOKLU$M*|6*7!oT=yg;<~Q5jb?4B-6rPS5qN_#bH{=(Cdv*$O4_bN&<`J~V?-pP`gP3((eo3q2Hw#+Txqz|KZE5d&7ksS;Una=y3BlL56titu~smNzSz5>q#dhqtw8R9P?rYz@_du_|W-< zXUD3y^!usUFr@x+FZL;Ur@(I*t^{B7r@j+0`(=asN>>~BYjEF*aHZmt<1mtKZ??*Z zbH=T(*B_`1`BT4ANq_1lue8@#@|msm-iP|qwi{mWS1Lniog`wte~XQf)SEVKjz`w{ z#FE6W_tV7z-+;pvA>V*K#hrOStB4QZfY-nmeFM%S7Ts@HqKawc_R^_Dexy7ogKgD?8P6l3udADE9*4_k`U1}q<^rW#BO z4~e)R;vSv9S8&{pwK4d61vq`s@xDEDrvF&`0%@D+lFw1_#WVda2y&+XQTqoDi(}An z)b4UJEj&y{KHLY$pOn{iOwJo0}nI`}|XorxW@-<;nI4$g|33 z_PA{|Xp?xCC)ZETw_HDEzJ1m2H|;5AsD_U`Luj5!ba`_9UJb9=M*+>*rOd;IGggJ&4&Jl;>*H z|DKfJWF64jAzt@GpTS4}{FdOqA(nH$tLAsus^;V5@A+P9$NY6jhit;}EKkwF&cJrc zHRRNi&>C{K!f!gUgrOR?REE&p8P9bpLVrTH;y4?19FZ=0BJJ7#4DG-*d=)zN|3oZ%JpS%q-%x0_@b~|Sr5;42{Z zmT>=SU3ZLBAJV1Hkz{`-+UzLy$NPhAN7;W1ZPlLhp7keMo5ic_xqo2b{(%8?hQ8L~ z3H)or8FT#ir*THS>>qAMJ8=KN_6Y1BT0CaYEuI>*iu8wgl_&kKz7N|a{fy}QNqJfv z%}$F0C&t3M+Uh7r`cLO6i;JMMnL*BAy+1 z9=!3)Wk;-M9Xg9xuZO;#}a?Lg?>gn)1P&OJk5=6%YzLndZFI-SH+Pf|zqzA)m+}$+-nsL=upw00 z=Fa~TLSp;(^4;$xSd+Q8m2>g2o3+EML+vHTlFw}ImtRGFIj@J;yV*Ihd40Clo8L_^ zT!V2b-%ixzw>tPw_7aIGZ<&X}>&?07V(QIxM*gI{zQ^Nrm@uN^ck(arbFPKW^Ord1 z=8NdF*k>j6dskU|3mEE+elJ64y~B02Hzps#U!v@p{|fE!g*3(bm(JgO|^PuS>xfzon~3jPV5i>W$AATxzT-s4!{^E;H66z5|$a;YXKS zqU@h}P7L*%oxYHM)8et1f8dL~enVMp1z*%}x)4*pp{%;V+g4w>`2nBL{2EyQSkL`>Y|AEA|BF3?cX-Ffxia(UW9MQ ztuA^k`qdHyep5tWO}ogRASCwLdX&!(;Ezl_CM2JonUs;V{aE{X$uk|}rw;R79r$Vm zf31k0LyRRhsoD8l<|b!H=4R*LXSO(>%xrb;MEnTweV~6AytigHBEA{89`rg~uSdR{ zk-rh;SYG%}(e}EDvS*?nKle=ZOPThAKmN|E1-$XMl_}Ff zhu@syEHY<1eP)w0-)wPO5N86<1O0+&&@pH_?YLn2&@sixR-%@I&g01*Y&b9_Ty9J^D_9Od_Gq4dD(Rm{Jr4(7~y5*i#eI`!+A*lM84By$2tMtHzFK> z?Qt~%_(Xkb^1JdGn$go3YVw5-y&j3E`|w<3+MszZviMR2&P5LS8^m;-2Y(~aMIQg$ zU<(rxPfRie)$JVS}= z7tc_VcX(GXDzc}SPwX9@jK}HNTXOB<8A_Spk7p>YK+L_xobpV_sK`F2d<8=0sIp3w zIYH#ZGnA;Ob1l1iQL~dWlC~dfo{z=5#%sYN#~OXp`Tm~1>Fiq^YiBEp>?f8mRN2l} zFof!n$YZSpbszFgM?26ro$Wz?)@5i5_@>+UAdXjg3SW`rL%QVA_kT=Zhfs*{G{!IA z5%4S;IfG|Ud57(16`}7f#_Gp%|LK}%coxmW;E!j~yos3e%xe`7qkrOL_=-0X9v;=M zo+$GS&kB;W+8SUJ4a_t3_>MpHj&Usc#B!dw6&;MekpBxY^)K|tB%W{CKNKtuo^weo zeF)bR_8m9pnXPDtJJ1e?g6+Y1W*h4NY~eRu2eo#Xj6B&NTGwo%BRHXlO{4n@kCBJoYAeQ;Y$f`FG)EOva^-t-8)3F}ZK{kVU-%x{juo(Q^ zhL|=@Bdf;9%35vA%UWY3W!+#5X2L@wYaQ^dpf`c{+l+j~mjD-mUX1z_A>Sp)pO11Z zFMR8LHc{4)??GUc>7V1Qn+C+36RI=na~?>Gy-cY~tOb87!Pj=gn-I?fZF}0LoVDO@ zd)i8bO{(uDqI_CVZ=OHKcSGM}jQS5c?#a40?H=_FGqR|?9LE;dlWc_WJ~|z~Pn6FF z@J0DNi5L-Nc2Cy!v<+DgrQMnJ0MZYoeINMAEYcHsEXi4M4s=A3m65`;;zIQvOIESm zkDW-x`I_iFH-kZb$BHUIj(r$s2hvZawq%@2wIV$`&bk_{k8#}SbV=*`A*Mz5;rkmI zck-Q1;GJyz%2Mi-qRj!5t@i?~p=yl}t_NJ-{h1S64`R`Wqfzg(Xf(?EBa8zXyB9Ea zPo*Zdyg6sl--qWsia$y5yguVhYV7?8;NBaBloJaBZ`8ai-QJmI?Gaf%dNNj%} zkq^%wrR|&Jner)~7qWLxW=&yv`IB*@&w;#-VSiCN;e>nzY689j+@J7SqHA?w?b!nx z&hyxZeiw5uhGWu!^j1e_21AGKKsrO{n+04~`yAd!>Jq;HnXU8DQM3bX{M5C?#&2X5 z+26~Un9Wgdk7)1vI4(QEA8q`{5sQugc*Y8QC-^&_k%_QE*+z9)h3`pct9*uZVa!Y6 z@}WK~Z9kcDiD^##N%?4vOBri&UtJ#h*dbl==+9do;;dnL~}lXv(0g8jXW_;`0e+BpalIp<)!a}uOK=zS)93`-u)z0)<<@Eior zHF6HZ@r-h;3l_)mj5C;P%GI}QWAQm#=Nj5*{tE^%``$MYbIkfpw`D(&c3ZZz{aAC2 zkLRLbPlcFvQNO7z&uiM5=QKT@XP9>9S-`Jh+6%lN^e*szAa60^rNC97SL1pW z@-0RF#VE(}Qny5uDgAnK5ZWJjxo0!yxa@EPU8%SR}n7) zf9PLGn?3jX7kRe%3p@`Zz0E%t__UjJ;U^Jg#rcunL~t+mIAY4m$l96tK-y0A-9W6y z-y-nB`EfJ&;{5m$;=ug)Qs!Flw>@n$!b^(JM3oPJo1XG{0dYV+of!|LL0drkV98+r zReMj4nUWwqe6KMb`wPnF5%5L%97G(D&%unf;BR}{BM1i-pOcXf>nVRyPkmp_>ldqQ zv&~rkT7)GCcbDR~cdp^+eGodA3+3_~Y4P>kxAtY;afR;x`I% z8{F#TK-eNI#%JX%;^mUDN$rDLF-1EyhBO)K3GlJh~Q1zb795Y+`CEssV#JLu@hJ?(fd_d~~vxdV=Ux&7dOz;O`xEzo;${g=qsi~Mh)+`(Ly7rxmyxXy4- z72cO6&vev{x&hA{cp7!$_w2t$%rRHydOEibZC~d4HNw*q;xiUwPWCH9XIx-?qaWv= z!@hv_M189BaK=SWuWL8L|3Q7KN3|E|W0Y;I%OMtZ5_#)=Lg$fm$rEWFp*@KEx6h(I z=u5%!ep6r0GFQldB9`Nc_MmR?MSIXG#2io6;IGPbIA^Kpr#XvFujTkn-8o*wPGAFc z3$7ccUjrWp{UolRLcWv8e;nn0ox}3dE_&O|NIpd1Y)!^(tSBN8zQH| z^}C!UNLRRi3cN3e^oj5si+(6$i@!HReSp6=Bj=01>TmJvDQ0McZHFOruD0IxdcRGC zvBkN8zc<74#rbjgMSe6pFA?XbKSMike&Y9HGCwUtTWnl%i)RmF8G~bu(^$w; z_=+SS(j`x%`DsI0;CrOo5q}wbcFK2SS-r8b?0WTncC32K{ikDossk@y0bl$+U<+dT zK44?nZN?pCO~zeiw;JCmTW4$mzuzgl0eB7QtHFDXaSP&`fNMej3a-~8-%ZGW3(B#) z@Xa>j8WjsY;yTo64ch#Bh+7d;kN95M8pp=6R>yUSnVtxrv$gO24u&P#d;bb{aQWu8 zzp&YPUFpQ^z0x+*(f6q5T?4*u0DoH$-;bE`xu*06=N9mHP3ipzH^l9ED>B#f-1W;d z0{$<2kAwc6w8~lyFO2GpUGV(cYwgS+mbS!oH6G$^u9rH|r-wez)Lr@Rkae;+{F%Kj ze`cd=XXYly&P?LjP^a;Dq&y@~q&b}9=qd~XewX=mY!WFqj3Y~b;p%iL8_PNT2>7Z4 zU*{3ugP6K&e_@^FH-&30?-t%{=`CDuIRbur3pWA(E$A)a{T|E5h|d6@1N}U%pF_Sg z$p10QvAoocZ4_w^pRIFa7WQagfzS-Z@*Q^`zLCzWSeqvGj-^b`E{4q+zP}5>UpHdP zG_Rt~mR8Yjn^W<)?fl|hwzG>n5bp)v4|*4P@3uJ*dw~~J?6oaKeHK*g0)8Cyc3f{u z=x@LGRbp?I3V$BNBGXqYJ8Z91-kur{GJOVoQKs)87MZ?M*=BpGvfcK4<>R(JmAh=u zfZsipdx7_Z-UZ&fZ9Ry84*WLg@8J5|$oF&P??E}1m%1h5IHg~$%)M(c2M6Zf)$p#J z*xWl?=O>;qA@dWzKV!W)H+9%1Hb2eQdh;wW8N+vAEVJGmzune}jp5l|Z=V00hkYdL z%{q5mv((-(R_hV>>OB8>9{A$<&((~^5O68a9-!{?VLqBaDHob+@9L%IHT$vtNE=CyflHYdhpkd_`8U?-)?n$ zH}!r;YwDwpyHj^K{%dMG_}$^y0Q@(g|2258PrVEAH-K*gy$RQEL%wey|6M4@@)MD% zFRs5@3HUEz9)U}e&eDy4zMS6Vx;DKT{5H8(0Nak8&(O5t&M!>FRqt&Pya7NgwUmWi<=W$HPR{#x9Ujg|h`BZ9~{bJ8Zn2G)&eV)H< z$9letm}@rr1%5lO*;!lAX74R{AE6xS&^s*l8|mA6KT8z3zlC-f`n^h@_Is7SR!46^ z=Cq*|=8f^7$I% z^tw;v)8(U#q<&+`XSUWmyENc)V@3Q~_D#ssRJyFdR64P9NThA1qhBruFTY1e8-}X(sf25+IL~;4Zv$aUu~F5Ym9WnbAZp6++dt5sYkpH_*T%HaD8Ha zLbJ6W?)O2?n0Gk#UWyaDtk@ZRit6Y*i-BcS)<`Vr(ijQnq+9Lo#evFfi}n|Gm3gP8k& zg?MRj?%(BG>g>XK%fCX*^hEfKMc&o9#9Flh;)|)=w_d?#`_1;)^|Agc%ePTMsCf7pxLG#-$`awU6n0nB4WskZxmeskw zhnQ*MArZ%;4~qxi0hJ&YeW0+U*;!b!Ozo}5>X*_s(;=Ta$RZDX@g2}|#C!+DeOO^h ztMk&57H4J2X6NN4o1DwR@8u4 zqi$RmGEgV#I-f%9>XrKHc;_v$c`;r|c zy#+f;9`Z>W#AwM{bh;+#lY2Qd29p4|(2Bh2Qn!K?;Gq(=1s0Cj<%b*pp{N{3#x8Kp|9dI;wKXlZ4 zPdjR1ud4T^I2*j#&PK1v+2pl2??k*Acnj#QxV{DXHY5L?D97^BE_&M~%KlPh`q!wW zoP$hx))q}nrm^VDGJpQxg?N{N1@3E@JotM#kWbS2g|G`PY&AC(9zw`RI%KEQ<)`<3 zj!6vZSwDYnMtl4b?ePo5$#_Y@I&N7wX#Qseh#~Q!m;%@`~7!{V^>gq47H=ZgA%{Q?eYmb4imEi9P z;!TJ-)*dTbX&eE6j}>h~SUI8ZYQy{7jj8Z|NzF_8arSkqR{mR#%#hzlCep3hL!=>J z0c2HwU_;HXlYM{6{=>fu7cLCNaxcAKr9|j&q)YyY`x?lSzeD#wkWs$LYr;2dM~a%& zcWYzGGQ5puOTGUJ_2oCG`r6NRzqTm!n|p~^?|%n@aqK>dSjO(v{(9p<1nDbd)m!p# z-!R#}92hY}-FR4ECY}2l>KU|ua_rLnDP#9u|4QRk@OQ6&6T-!f-PEBc2L6*e=wpK8 zX(Ij%(>)%gUvh5c??Uo(s$X*EAp)T(rmvHG&K&2-K+>%kZ2 znkNtk=9=~9BjE3`q9+j6D?U>aR6g5Hfjx>YpW32!leGO<@|mr34f`eQO~0eRL(G0@ zDs49t>Ngnz`vkj#=X6DXGAJSQ~hBhx4DM{JMUH+cS zF>aIom`ohdFPOI+lN;mYImtt1<|JExc5dh`^f{CcXd!`obAnXPhWraqlZWDu=FCwz z@RX2eyp#?+WzNu3tjYe&1G(hHNWM0hvL-hx+LMabrD&fhnkh@lt_Y^A$zM^l`xNaN zMLVi!e^j)x?7&^D$$t?{8OdK)v_}=~bw&HFqFHmKY-KQIB(GJpyA-Wc(SELIgNo+P zm3q_!Q`Y2L6m5s1y`*R-6fHGR%3dB!S(Cq{Xm=~xj}+}KMf*t6d?u;Kp9fP$@&-lQ zs%ZNZ?OjF7G)vi%V9H3oUeRt>w5Js9fTDe>Xcmjqru4hie|S;*`>jhk$jV)ZC14B745L1CE28`H<&V#S1VehqO~j9 zPZaH>qNUrV4VDK}*5qpyZHuBksc7#g+9!&(0H+jlL|Kzp1XD)xR~79(Mcc1vM-?p_ zCm09HmIYHr@{Nl2bw%5)Xs;{UX+^W*oZ-Nj{(LZHOL4=P%xqP?eRgNn8or`HE~ z;W_q!`)yLR9g6m*qMcAQCr-f+l)XHdGLmmrw7V7U1x0&H(US2i0D-c;V9H3oM$tAX z+7A_NpQ4>ov`qYlK!E4!V9J_&y`r@$+Ea?wt7xApTA^2XxgwY{k~b>aHbr|y(T*uv zZh@3t6igY(Uskj`6z#`~)}v^DP&B(w>ajAIvL@f8Xb&se^NRMqq9t7-WtRj~*5uWS z_Dw}=SF~r5l68Y?3;zP^#@t{Wz+7h}pJ@2Q*O&2Dv3Y8pV!4mz49Dfcbu2mfoT9nO zNjuZ(jl=jQ#z_1G=wq#-L)8gBcg~PyuyF3Yq@QN3G%n!2Kh4^Nurhf6@bxrl#_Q`h z4LS~)2OZI>FL$MdbImvvdeBj2I_+3$`p~i1G~n=?`W;@xPGAFc3$7cc6sOaa?ev;V zPW&RGb1~wjz*V5Le1NBsZFI3R=rMob7(`ur%q}O>k?ud$KF6I};oOv@3t3gR`W%L4 z%Y`h4D%)Omfiu*F5J*jA2iuQ@3nX)9`ieQTS zGNIk4XwN9xQAPWsqLpRKbN?ck;=W91k1E>hiuPMYv*t*?%3zB7GNIk2Xq}4ob443e zG&grxfjgqJ64p7E7Rnk$gok#eJF3wkg`PigrxV z&MDd=L!Nt8FvWeD(6%dDkD?t{G`m&uEe)o)FB95kMSEV+4l7!cP4anzDelXJ)~IOh ziuMylJE>^t_CN_Ed3i9!eVNdX_Ku=`qG$^o^4t}{6!&F9yHC;fE80;-%XUh> zvS5n)GNFB4(RM4^>xy<-(X6gO2_yOQ!4&spLVHlrIu-3bMH^JK#rg8wnqbOE-lS+d z6zxq#JE3UK`BL`sV2b-Pq1~-$FDTkuik9q_e7<0c`!by+zrV zN!jZatu>gkCO@TUy^8j!q7{0j>=nTj_hmxcrf9Dy+A&4TEs%VRf+_CHgm#Cb{aDd@ z6zva+X7>e37|APxDelXJ_OPNouW0WpTGAzwZ%Hu4eVNd{sc7wr_AF9?^(6ZHFj*4^ z&CQlRg8?h?(7$HO@HK4Yni#G1c+fn6=Q1=~$OrMvJ-goMGZ+Sjo;zrkJ*Mn$rnBCC zcrO3dqtzMu!uFrj`RrBJK7)Z0XIN#Oxi;^{a~W1y`P@Ns_Y6L}%GPHvbPqju&^-R$ zFM9pF1J7lsvhlft=8kdqol|}G=rRrT?a}ls3&!3dHU37EV3I{y3y(4H-?bUk~I9Tp!;$Ixi_SpS5`E4Td)NpqZg1IEPN(xE@|78M|Y(b)UiZ z4wRdETZ@ioF?SiT3mWsxJ;nvoA!E?ghxi!q??CV8GmU)2KHwtrF~g7XUt~T6+ynXn zT<;2-hepb0ru2Rb=7vLRewcb2(OHOke~)?h(D?5$AG0z&Tz0XnFZ+bdhf}X_s85V9 z^YQvjytGkY4%97qJuA03E;Rh4>io??CUz^?|q<#{-sDbECc09IZBzaok{EZ*IeV8|+UYtPkE_ z=J?o+W7d~D%1HH{={`DO>97r0itO>i568;e8`^^ON7ynb+u!UK^?T*!@Ue8}8fSK8Wy0PzI65-%Rz1 zDqEAc$`*NFHPd6V3bS#lHF|r0Y5yE+Dm3~5OOEw0LTcQs|Ew=UcBC;GgZ9sU=d$tn zndhdv+Z*K^+(O7F=bl){CE0%XnffV003GK;X%9`AzXrCyWDNFLL z2&VY1Noe;e+B1rFRMGyZXl2>*+`kB>_^wH4k1E>hiuPMYv*t*?%3zA`nuKrt}u4s0vYboy{>4d70v1jl;FE2DZ5tD9#phWMSD-t1{G~_zLc#ArueQ&Xgd_` zO+`DQXil7K#976fe0ea%cTGaOThU%nw6_#3*)92e!4%&$32lR-{ZP^NDcUJT%fv4T z%ey8id%dEy22*_3B>8$3?Ndc7^h(()f+@ah652LJdqvTXDOzrU@m-V9?ohNJ zD_W1D{Xx;}zCa1SYm%}zDcZw|_PnCKuV_h^NZBR96yG%o?VF0$u4vC96)$Uai>EX1 zL4Wl3sQ3CG$$J&|z1M#bA%6C#I~ELB{&`{a_k?dOJZw3S`@XR-)nGbabdcVHKI0)@ zWINvY`yfm(_zUC<`E+gd?K8S?->tq+5cb8*9vEM`Sotf^k;d0#>nnOGz6i4Z-qUIQ z(DS18q~~R8Kb~{aa}f9!p!f2b))a5AHOu=8tI2!NYW8*`ei`^h&^vLxBW~>9E#Unj zUt~RPvTY=K(N^DXYZvaj)prabe(e1nwod%YQM)PHeWJtmTE<>mcgB9(KV@{;Udrgk zbGmF#1OEv0AM%+QyAVGP+zxshuD2uK z110!PhLrufqCKi;uPfSb70sF>Wh;Xz>SIE?OVK(N?dOU%sA%q7d2UTGMSVz$jTZ;CPqWMgL64b|}>;^^Ks%ZNZ?OjF7G)vi%V2b*f z&~8_>rxfjgqJ64p7K=RhieQTRn9#N<+OvvwOwrCM+9E@qdsQ$+eN1TE6|G0njw_no zD*2WMQ`E5mSmHB-e8LQn9v#(tzFT6qG%@-E!`d{L48chUaM$Z6zxex zdq>eeQM3gPDZ3(=qCO_H`xI@zq8(MVY^UTa3#O=#3GM5Owp-C&SG3cLW_1NhP#=@B zYZdK5Me9_w_Y`eV(H7@R*_vRA`k2smDB7Efc0$pd^CjQq!4&l|q1~-$FDTkuik9q_ ze7<0c`k2r*DB2GdZJ(l@QnXA@poEcJ9Zd0?4576u+Ea?wt7xApTA^2-dqprseN1TE z6zvs7JEmy41(I)3FhzY#Xm=>uj}@&)(f*)lc3+?b^)V@XlcGJWXwNI!`-+xyiIiOu zOi>>b+BX%gUD2LJD$?Fysy0*cl`$>sbu|?-SRAH>485-5Yhmo)VJ*L;)$yAJtx@|P zLiUC4E?AHHwmRNj@C3s8Y5VqI^!5zwtw!_1x_VKSExlZ9#Up(j#@~~St{crMhkXq9 zom2iL1aFxCS?u0NvA$O?65q>_^_^;8pKSYg<=43y-F3lnFp{5(ZT|-Mm9942x50fU z!j)m;EOzbxN+sWqHF*Q|8d=|&Zh!K_Uq6o@emZO?mc$P~dx|^repV5E+t_OrkK~=j zeP63Mh!8)vv3D-(%sa6pa(!pIfAZZSd5V|*Sv>Eatm1i*ZHF`6KIG+0YGi&ccK-Z0 z^{}NlZNTzzYO29>;6AapQNVlO@xEQYjT||DUTl4j+COku9D|Odc9)as@#;I(_tn)I zeL4P2hJozr42Hg(;m?fzUQqU-uloCpJ;e+ImRJ1@Vk;H-M*rEP*KOp!j3*5i&7F&1 z?C8V$%6~LAg3mzNk+PoZSd;c>bNfv#9)@c8)G+vicEb2+k6!R(_N1F?z~}V0M=QMe z8QM*4ZU*ruji>f#h42HrJTZ@Nbm9@>yAo@Z)wMP}c7JC|WF1hvP2c)bHNV4FH6LH3&G%Y6=C4Cq z^qc8x4_VvJR`^XPmM~O9-(ZmOFn!M+UDko;={6YYo6Er8#wF>dJ&32fZ}L2fzM;@; z;kgvVqw_oSe&o^~-vUqVIqzA2qIjFWzS-t(@dW<0!N;8c;^+H4X^&p;WcJ+RsR5_c z-9IdjW~ar0FI}Kzv^vU>j=%2=a8?Ysvqa5CEB+1DxNnsy6KB@U#hEo1?0(aEyBDz& z*Z|#v>xRjNGi-b~%cc-#+W3*L5cz#5=W?+8@UaxKvjym5`PzZ`#>_u9>Es|%(PB&s5c}5f3!`$e$MBMjYY+E6Su^I# zIRPW*{)?6G-1(K(D%^MO{B;PG5&bZxI+i9Y-1agb+XP zV49sp_IUb6ko+_|Bag3{?+>jG{tNV@k^LbS{IHLX$In!4g8klA*4_e!dZXXVAag+c ztUa{_t8!}#mPfS7O?GbLuPhYKO~bGL)f=BLxYSrvP+`;-TxP6Cd=&id__b%LXtFPSrfX`=s5a|be^MKFb8zy;{$Uk;Rk0kuWJ{=CsyL&{Y&;EGq3;2eus1MWvSO|*|{^5bq>^Pjj+BI?p`d zz$rf9W5AJb{?OqwpLP_1Cx6_WeNlw>phfn`_S}o@M@4pvv)qoeXzkg~<#wD!i{~u2 z<1AbIhmLal0G^4nY!N$v4baWFZXlln`MoH|^6}G;PC8$9Mz0^qT>66Z5bk=?`GPaW z#dN&Xm;K>oXY~3+sJ<_|PU5~VI6p>sd0c<0sqTeOI&1Q~@)?@Z$_zF6!`nFa>vZ5d zBe8i!Z;qPCcSPfThcvvcVz+N>@zl9~vmpBZeeW)~(q&p$=X!U+oe0zC-zWRVW#w)5 zW#!%0J>{9UJ>~xa>9#OiWbFIn)r*Sk>E)5n9t!k{$=hJ(lxL#8MfN%6D-bfn>K(hj zb@ifVC+i%j*U0fVRXc&m{%l2&{lpT6D%;r#26?9JlVT@(c}KDg{NWv%eGlU4YLDS_ ziqtvK2KswF(PQ?Mci4VbA@4dz%I9MH<7*WULk9SAuHsFEhr{%@SoX(y_*99#Vq|@z z)gSo{LH|&&IQT6A@#wOdc^y{z<2La0Y~eRu2NiFT+heMGg&H6BrSp0TU%pyQsbd(-X-`sGZ$PlzpZE$+EJZ9~>WX?JElfb>IY-v@p& zi}ZMrwUI&}ZsBKS-J>;6uTATN><^@$N^QwFm1;$L`h9$dxAFLEbimFseQhyWemGD0 zGb4|~smf-u{9Hg^Ih7he?NdCj&p4ABJ=>woQy-`9Gm6vt;OqYhLj2fDS>NJ$qH9GS zt5e-W97u0-e&)0+W38Orud~Lr`|tgf3iL8rOdUs@AkCK2rtFWdrBj#Gvk4@&fpnN z(X8*mjJ3G$_OwS34vu?9)KvFBTT1I(U%8Z_)v=|NL2ULioC0(zGaSerKE7ht7GhuP1y5$rQ@J(ZGr(Kq_Lyql z;4c$*;Fp6t=J(~)ToKdZcGXt1rCjZ}IFYW@y7cltI4HlKvgL zz94JmIqNarOtsi81>y~vDx!>h3wl$@)Nk<#McMu3ukf9 z*D4ly-mEC_{0!+gE9L^9c9TAw$I!ep({<wSUyr8o-9wYc7CsHjbme3tK&MvOh>x^ zRQu%c`;I?9^cOZeuPcqL>s)MouPMF3xdr#Vru2S<8>Y=~QO4jZYc;HP)fu~BVcu)) z%pe}UEuyDa%CjvFe`c@CpV{cznYqcaGn06_pFR5hBd-IHv!%aqb$X!O)YkzSYyE|F zmfsYvwY*z+v!%Ciz2yj=(_6R+_-{dP!87l%e2n-E@Hx=W?Z4Sg<-~|uqu4d&D#RUa7o2HQH_TN@bhvrOI~O^OcX=_Ehe&J%i`$soV>^AM`Ff zv)k5#_~*cHgZ>V#zm0r9NB$m^WBGXLM;vEu_Q+#xrssI}=?+`uem&Ftu>W*hBln@1 z=7+p=TeG5WTg3_V8QoZi@C8%`)A7$qc6BrM?`CZT9Hb z_aE%@GTQ9b8FwLOI$rAA>bO0%)o~_j{aM!fR>yZ!?{~DOKI*tTb%*1>rncibI~*H; z{|5BG#xv_v??U_y;M+iN!u8vb?;FT}7s|1Gq&5oBC$5LezWNErNARZbXRb%gbfo*w z^qkV{T$|SHjJ^z-owuiLayF-Jc78Rj#d%9wE1uKhyb<^>LH{D2xjL;8@y)>Xpx5Dg zJ@Va*{EaBb@{!u;Vr6i@^P`Mrr$6%s#7sxJ|4hrE&b2zd&J}$b)VbECuXEL>Z*YA% zy~%ZLdNZEW50`$+~nbqmnBVGf%3iKLWUxj>YkpFs=WBEvJbg?qH)AdnC9dwW@ z5i=d>{!^8K=sc%VEskHNF%;QPr80vB^7#`pP#9BisMt>-&MD7WXYJa5+m0#y{iu zV*C2!>)YjHode}Y)_11o0#oU-0#j*Zzr)G4zu4wYrL_gWFDWfZE?tcKFDdXMzO=Ly z>Dq$fZ5Fb%O!ir_Cp4AbW;jcm3~%YJ#=_EdMj`66u=EDtHK4CHOrYK1hwpmVvv^L2ZyoRk z(3|kgX4jjD4+9?oy%*PyAm3r+e-q_cK3Z~&o9#EbTK=7Bk&G~6b!{xGbA1mn)5GN!yZ%sE((EiO zSr%NwMz;TC>nm$mVM(j=(vlWuWyxmeA8Fac%bFSc@v&v$p!uH>qCGy| zSoneYJns9(LKl92{DZhTql)$2ve1b5opH2ef263}dZfr=zS{qH2%kY(&d-Y<+4mRL z8&4HUpN!tz_*l_O;|T8iSkWegl@WbprrOrS=Mx!ABlqpH7Bs=9;7Cz((2rnbeP@~< z&OxlD)xWMU@!u ztE`U|twV^PbFKReJ8T^Dk>oqm{r|j&{6z0O9@(pyy&X1_cb6^8`?xK|+ipAWX|w&_ z({B6F^SJG#XP2!X&pqkc3%nonE?n@HcpYW#ntJ2^9GM zS%$U1wMqXesR`lMq%S0GNV*yE#-#O0^^h%T8;0c_4J<(0U(o(W%M(t^0>K?loC4M! NkKQozf3x}d{||F^oyY(H diff --git a/lib/CPUs/MIPS/doc/mips_jbus_timing.pdf b/lib/CPUs/MIPS/doc/mips_jbus_timing.pdf deleted file mode 100644 index ce0b05d555116fda82d50ada283272461293f6ea..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 22419 zcmeIa2Ut^U@;`pPc2K!kK&2#Btc2c4L{LOT6i}o_ga}9py(Ywtq7W4km1YN}1T1tC z5iwFDq6DRc5FkQ;5JCt^Nb)-Y+r9hUUA?>efByUI)#rpcbLQljb+?dDkzNao~9=U|$EFIq|;| z7K_GvoDk{s{+2^Gn`W=SG?1DWdF%kf*nyK`F*KQiZF3r+g$XfC(Bx#9jCeprKqT_A)r|LR%{g-4p)LACvDS< zod-jPY1RI*q-gRr)_W@Th#spWw)VA~FlM4OoWskmqE#oTsLCrOiw&Fy!vJ1JpM5Ox zf|9kfYGEO*hg(Ii;MRWOgsmjjFk^Ai8FbNmDr-h@%!M**0d>Zwg2q@PBXnY-9hX9Z zeh^S;!60N_Hm$R$PKi0v5i5%t&*;RoxH90_VDu%v5t(Wd1w$F_La)rEH{d9rsv3~7 zBu?9@(IQ4Fcyi5X^0JUWsn3I4o`iABPe>$ZNxaioW-K6>>><@iiDENyPpq-35KgOQ2bLQ z#@0+f@mL0wiG0SX&lFGSx3ziOq4^+Eu$afjXNUwO(MVOYFsSz;k7elsW%sVe1eUyJ z8Z%kQP6&6hON9wS(T)h(9{RKpA>_(erSQQ_(goolJDJ_q$}Pa~h0L^vosEJ*RnkUA z?p}PYHGXA30i74sW}jPCEvlje1t_AyDiAvbgWmEWMh>Ymb_o4U6qREwnCui#T4b== z>DN_BvlL?Xx65RZjug@7gOoE?K?p^gocT?k5|~-Q`*-SR$nx96X|pv>D0_fMMmLkcpur?bRUwg9%Teo z&8uZEqhFv))7y+FuXs9*x+FRcm0We3)4YO_+0QwQraZ&T z_ClaMJQClH>gB!Qbpr*9BB5jI)&sPlU)gEzh`ld?rVVdn>uyhdQpXJFDe1@{{5Yxs zXntX%t`R&CKMFM84HVZQ6$L`M1y8UY=)pnvaFC&(wS(9Q4f}CcFH}x&XxO~~`;)|a z!S!MH$Jl=8PZD0-rop=%=1;I;pa$qiw3gsU80xLW0MIG)0`5-|<|Wu8pk8Pk`l?{V z`2OL$tv|%b#};G%&LzV~eWWKsGsb!MNSSD8KifOQ`d?;6Hq-qwbkUvTe-Z!FlMtgn zNar64MWHK&BO}7d)a8d@D2%eodh%Tkol6hYdn%d~87;~rt5aA4w%!R|0wsfZz9zJR z%Lmxn6h;PI@>HKPhDu~Vqx&?H(~$vqDld+mMBm&fPm%`|4L+Xjm&zRBpCnS>@cS=v zn#ZE@@k~d`+!nF}!zZYNZPlo23=f`CHfQMyskmunLq)Mr3V@yi@t-rKl~vRz7HCCR z_=w&+l*-r%vV6PsEtztBSKvvu6-ieg9zCV#=Fk<=anp*9g`%QT=xur#g4PejVQAQR zK^Zm;Jvi*{2`c+>RuJd{dJDIpmH3lHB6<&3{R1%s^pnI>f!BD`@ZAsQW!R&jA?Qu? zk1&=Gx))! z6N^iW{kTcN#xcWySCaWsaL|otf4HOYVr1te-n^bRg08z>)esumE+|bfG)g}gAa+_t z;^1EKWMN4(6k0E@rQFD-{obc%!6XohRJfh&1Lx}U>txz`4NKGIJ4r|fdmUIfY-I+a zzDQV(<@DFl%hMnP>Z?o`CT%j79E%Y+i^~{y!*2U$K!rjMx3VAQn8|SGiKt>BDyGb6 z2+0n}B;ZjYJa$1sIIo&9fc0?|os1^D;Z2s3aIU(O0{Q?%3sC2-AjLUin7BSo+|8jf zY(e7|)gyk~*k1457qMJ|Vk^Sdq!_F8S`E*awZmiJ`DIC8ltsz@f9X#bEL@ zVcaBi;@$c=aPb@} zpYzg97{#XXbM0KjffJ6HcB)eboUKHR%q0vnNf^Oh`ZHGs{}lf{pUvlTsyLW2z-J5*C-dB!H3N9tW{v@+XW)AU z##{mpq1l*7;9R(12)Jccm80`Dfg z$AD!Jlw)y3y3i~b-OPW1ilyTKKkM)7LMRMMqT>WqDo}+)pBQHlI%Tve(={gW7Lnl0 zf2^B8f^&k_R$?DiXS|>U8;|xKc6SG*{16LnjPd(Kn*heJq=91vXhVP`&L0az2}y$U z3mF46V0c8T#3TF%dXdQBz?iW^q4nW5ARJk2wCMdb=O*(sGyx}$OuhaM{ZjbmR7!tF zzd%0?I(?5;9Rby$w~QCG6MvFuM(-I{?;v`Bev&N{+}cm7_T&R>%Xppe_AL02{rmxk)Pdo{`8E+NWTB`8|lzLy|e6 z-2b2xvJLsHW-wH`rfvNbL6ic_ANzqe>_#yzJQwYU2s1PqHV!jl;h(*A6UN4<*uPQZi(mpXAC#Cb5|j(KR&2rP!g44@dz(3Q>Y11#4p9lu;%S3kMdreo;`emo z^JGrsN{XS_PZ%HsJ$d#K#bE4ojvOXVrugd#+EIh#qk6#&BmBAM>`Z2nSiQvPf@{nI z3g%;e5yNM5UEBCc8ZYQ|n;VDLKOkBTm4Q&+NjuBv5++xCh{YHN!;IRU?THo0WW!FX zF||sF85_=iM)u>)9mGco#@lrcM+={Yw*?LfM~I6e1pOs%#!Fxn5E@EID-4B-&l-O4 z=5{mo2FV{P=LV!q22NPUtRltsg|Y?IU?HB-izDbmKU5S}xrQW@pf*JGU|wu&JVP~o zlo|*!Of7!UMid@E#>Pg&Fh%rZ)y@w$kYlJ@s$kpsvxBiM$Lj%;mp;g9{}>F?UMxcB ztmJ*gB_(c11b}Eh#F97rQe@f~*O~XAuDE=(;-hJfHf26q5$-1VC*y|xIXv>SfnN>1 zCO9QIPhhHjiCms{y*Ee{#`T61N4Y{TQIN<((;Q%QKBftLb7g7Mu?Ei zCIiux38TGQWZhgyeK<-~n(>d!TQ-dyB`Q@?27CfQL)~O@COJUZ0|&SSZqZ6?B?%BYvP0)NJ+m$(8y8B_jj;s2yj zFYy3Q{ilukf2ZH@7f$gPO!FN~BX$|gCx4(kDyZsYqVw?n7rFg(T*Ih{%cw#QUE?D1 ziXx+iS8-F|tC;r1!xl-UjYSn{Bu2@q_XcpfV_Pq*h?rnUV<+EO%iy12F|7 z6hb^vUI)R4vZ}UXIHY=3M`(CSsOu6+NmZs;n}V&wZW?zkXTBM44`#(ow41T;;x;$y zY6grx(MsoeF=8erJ!i@<#Z^(=Wu9}F0BC+%a`ph5J#wu(CaNNuxvsjdij;ZtnLoj) z)3%~RVzYM&qSyxUk;OdWNQrCoII|2e+J)JM?cy>VQ|unLe2_7YAsctM2sEn&_>&}K zhKR;~r#miR&U6j$2ph^@*FH2-^03W5f^Z1=n_- z%pU@ByHdHrY)%zSuM`Ix9*Gx-yK=3#ksZgFCAaCl-b0>Z2206cSSk{I&b;`1&(LX| z%aiGxwwSM2sR{`4P~BY74e%oPU;6 zrCNbqa%TFE1ULfxgYW|UKimm{G^ew?gt9|0VC&ST_{cMexBH@pjtKR9aqf5;Q1O!g zB0wd%< zP3_n~h85N27BhB$22_JJZ3y2E0v`Rf5&kT?_18xD|AQz%aJlptO#(SL{kg!#f3a)w zuXmkrft;1VuoT8TPuT{CA2t{{+gKz|Q3|VxR>ZrOh8wb?lEl+s%E+cZA^@gP57c9) zPwpN*z6O1U_*(JjWGNtI`6aCrz+-xWWGzX& zu^O33764fl{a&NQKhy5QPM?aJsmQc-_lVfQC%QQ z>`OkWBpo$VB4qrkv8c!xd?a(gU67Q}+xiLNSvcFr~_( z3uINV(2sOt9SF`ARXdBHafo#p2L%H8U>M7h&@oBIQNmh);}5xjd5e!J7Z06uq0{Iv zydr1%EQ39R#yi}eCuT4)aExMS3zBk59hS%74zcw8V`*wM;mhZI>PqaAL`G9oSdOO` z+Rz=H;z~rdIk5da>x86P(Z%{!M4@*Wl^rJQztT3y>H)om8SjiiP%Bpq=*~#wYTNQ?CO}tBeKe zOEO~v^;2ExfKh4%Wa56st~YmR(4#L`}Z!Be{(kMRAw!bUp~ZsKx%{jMf^`sLUeS+;r_Wui)IFY z_a%m986%cy5ggrI6;tNSVa;!0G_*7(XT$N03~AFmd+}Woo#C`7kJS%z#>Jo)I->cI zWb4S%NjRF{&%TSr^};465z&V4V^}@3w8g{{s8GayAP(SVsS>vMBb&l2dV6Kaf#uIB z1ZX*-jGDvgFQc!;1rwrN`*G)4>lzkfe^FHmPnkieiSEnAb(TFI2&xN3>%Zj?{IT5x zLQDouA+NsA5FDdl;YWWFZ7pKZqu1d(53|PAnDQ75zqgmz59EJd>7;nGP_>zuazbQ9qN^%MLVr*b16ppEK z8Ae4fd*6Gv4*rtE8a3&lAjd?_8BK7^d9H3T3O}P4g69=pC5GoKwzc)jPx2}FZ zFnAq-H#1+DfCo|dt`rqqFi1JEs%pZ3S4xGIUxTZ#D)8iBG!Vvyb(c(f!3SE&oRP7d zHPP|dBC%|mwIYa`+LQdvR6dcnpsU5%+SUcoBO$A(#uyNM75(5NKY-A_@{! zCKwWKx26yA?Q3a8&xL9<)?X&{>xKLi=uZU#Y<`dQyomx>F6T zh4{QAn^&FrT0f5v(^qKR8NjlJ3dtn6D&gk9sLHEMj3BClszeX)p}Z(z zn5c=lEQ)8$EfinZm98M9^rP^H$HrZ=W5p(~v7*l2(ZqwonfP$bBvm});%qHVguln< zvzY)TInOCM#VPr#uBEG~C-s@B_3f~yU1R_Pvd_&E0kJ}Oc)M*!Mu45vfXCYU+F(5` z4Hqeh4Kf5c`UzG8q=FFsAz)3(xln+O2u6kmxg&ys6QlcrknXmK5GM$5rW6dZLqvoC z<#t4bnA=VjRo9p^5kLn&;{=cTCCRlP!^CZ-ijFh&v4*2^Ecn1K^w3LMU zT}@JIU>zOZsY_Qw11z~D_Y!FdEs@n$o0gH3)thQhS65GJTI!3uj=E%-)WG^$k|q68 z!`C)}R=)NKsO<~=jnV+xl1NMbO4^V}s7;MTZEB2?K1}rm;7e#pyFh6*HOc$w4;*Ip z_V)y)%HPC4*!%0fZRn8@$+to>&%m;Oc`2tB@Q*8IZL@vfZp&{gwskww*W-`NHZ@3_ zsrsfK{oQp_*Zc?THa#oTpVKS$Z62n^Jv9^GOHI+h98Qn=Z=QUS2PFQ9%#_4*YhOOU z)b?G=fE2Kve`01Oul47N{rYZyd+VpBY_FRi;{X17YzI`9(^gCf%P@?!Ma-N zE|T-=p21*EEh&geu)9QU0bD@ixCQJ&czb$%zLhj0c_t|;1+f71gSWehzo##t?W7>K zAqc;NV0AU13M=p6VBk%e`c6sSCn?CG&(&ya>I1a`UqC?pZGf0SwnI!IW{@3_T@VY% zZipph55x*$4cP~=f!IRqAodUkh#TYx#2w;}^hNqZJRk_jQSUGW#1rBL@rn%aLij_x zA-)hlh(E;N+aCcz0#^VeK%#hk5l2I&sUXP!AOVOVZ=?q#2oekl4sdfvKtdoPUO@=p zZ#WVX3JLZ1Km-N5BZCl-Fi1Eg5)y?7LT;RzOW;U9LKCb$r9{7by(RabS7G|l|MzG9 zf$8}ETVeX;M*=i;v~{7-uRjNnb};ggt^G#=`BKW})d!E5?MTcnUj1uaF>c<;<#HzZ zT`Mh)@6t)kcPMDNe-QibVbZZ&?c;a67|^U8`vS5JHoPtUP3!m;9aYVbO*gm?RG{p% zuH@C0dAWT4P1x|RWA4@?L@wL6w>#Ls>%KC`W2g0t#bDV2A;n? z8W~)C`H8mFeVbfb-^vt>ffdekMX4r;caN;rKkj?CUbQ3Z&5Z-Q8*}LIO6{z!y}h4aZr#kN zPp!;Sp*sd`H>>WqI%@l9zn@yLnY(jqyQ)IN3aKZSI18%;ee_D6%|q*kph&jhhQsZa z8+uPRkq6&Cv8mqpe*LMPm(9l(@1JwGwE6UwM8{-NY#637Yq$OKq?JhzZS$m)V3RZv z(dSI%tr|voHgj?yTzKq>#eECubNhYlkKQPrHM?Xzz577F!^$%(Yl!&VTQS6c>5ll6 zTxqLx_j%H~H|sAuupi$ITFSPsW!v0MdemAxb}=IK#rF8H{m(~l70^za7T4JBOjv2U z-!$t`ZSu|S3-8PAtIDF<{rc?E?t44;TU-S_JGasbz3YsP=$+!R1xee_?4Mz$r=2Wy z=atRncSf78$K82lyUI>$nW@#CsQpi}IwV%79 ztz~I_k8mHu(0SMv=P#JuG5hwfiCx8AkGkZGZu?(oPoIB(`>BAG{PYzsUuxc8?fBHp zuAX0z-5NFS$4wnR(?JMk4l56&cjX1)0x<8~cVgMfN3eM16yrGKl~LmZ`U?`G41T>l zTh56GmTq8dgG3(ZywF|H+51MSVD2eyd9#$bQtPe?%$-aCBOGtKO zJwje@T9Ba|d4YhVUs&6C=jaCc^FCtqeNoNOs9niYaprltS?+%OvzFB+&HEpRd2eW2 zALRY4a*;yLvqn)zV^d2=Bb@HOo(%j#=g|(yNT)wV7kd?V#h2 zf;ZU_?TCql`Q}^lJO(EcX0>d;_i6E_wh*-tCRybaZ%4Zbw^$4}B>C#taKi>+WhE-N+o?h%<)9L$W5KWMEozEFCW+#PV?LNm1qey@>G_QNWg zYlHpyEhm;Uwx|(n1r8O*oWXEkjvOJU(!fIVss?@WW~KuHoRX*JZXY zj>&J(Up~qMr#$IOyH?bidi$b^(W)&q&rru$rIv~#a+G30`s%qmK2?fpH4*m(GBJUE zhHa}C&t2Ao{D|*Vk6CsXKJ zC6u0^b*NiO4#BwIWREom#8yQ>md!h_v**^niCLEI0eE)6H4=iLJ|jHC3VBc9Vta>#y%W zUD$GD<3ydCcZHYGlTnC1-8yD1WnKFVEO7q`59{28s)x#N4$dG&gv(=j(zAYRKN9XW zGa&8B+;^7`&nj<*o{~FjmgKd&AmY7FWx@joneu8JZxD}aTI;;7d+`e*$u_lQUGI*> z)HOS3K1*Vf;*eUmYE6^EKkSoLe|+ISE`2_@=62G>RjbcGCmEZf8a>%C;y@zf{(^UDh!_^8HHpbk~aY3k#^VadHl4#3n?r>jiH7^qet9jm@3Rix-JOQXyBosqjM`-C`Xj#L?H z!LeI)PHxtT$HjRzkKGt@V;hfzf`+yxRW7`2d`HUiXzi1$D{K;}ONLr@_-a03BQtAr z&Y}0^Szkk(-?wx8W28cX;A8pL8;m0tZ?4;Ll0#4u;M(4=(<#p3X4jj& zax$^==D$TcyK7}@Z-(tQ@x40W#pz9qZR5WF7=|gMjikdCmtQW1N#n0>lNsF{QYw90 z;Z!zHE$if?#vm>zbKh%ei~L|xoV29dO~4t48Gc9xxW0GZ%MI8kotIRccjAxi<^}vS{KH4_bVwbIMEp|bIba+ z@9IQY;F;A63QkCap3m)aaYs91{1INOEJg(`*Nwes;f3=jF5+)>nS45}6DwzFrblyu zq&(#)-4vsza&{q{F1moEui&4;oO8Ot@OAmC-sG=FnI=c z(XKjN{5%|W*_DKB+xcF`@_QC8x)`}2y(^N&vX%Ghn{zJb6l&)%r=~t>AM5Ol zJr!DU=M z*R+IfUhT2@W2xU}Rv^ZH9SlL|UU^HQTvn;vWHf7TmvgFg&wOvc_}E8zbt{>6$A2@C zk%PX{SboahLZz&-7+x^<8ZCcSkL>Z8XbYcWnNQguLD;#B%wPX@cs3`kOw9y;I?>$)T2=yys`_GDB4sM8E(j1}@n&a!V)N#Cb)cB(ayv0ppk?*Ds zevm>$Px|$+`mjF1g{+??%oA1?LQUcQ&0 zaQ+6464l|KZnpkPS(o|qn>|~O9eKHRQEuDIRSgTyOV8)|Y<5A?y%z@=5}Y0{M44+- zy=OJD)~L{8Xqy(hE=Q;#S&#>#T1zRQjZbQ>=hiutLKj(?o)>7=E~KDQC_&^~c%k{Q zgX=ZNWlgDzetj1g^Vlvm%Lx5cu4B8>{33JZ7wpY~*`U`(7xVJDKAXjheEqJ7!yc;0 ztbJmpvl72Pw2QI`G~f5BK6CF`D<*1iPo_*>dA5(-ahOSDw_$GGpa8S7ctIYaXkr56 zshYA2MW^;Egz93mSKpsVW1R7crkxH-_ofQRacE@h{2T_-q0-f74CO@rt#L$u*O8TqV-6`=qevHH&5_hOM>iyM4&TvG%Rk z6WEK+Eu9ndE>waheNX%Izzuvv4dtHqfxy`Lm6>J6xaILQ*4z8;J7;g<8Ll<4sbajj~;%GceQIF0;y1ghSvAmlXsYzmhbv%dd`2!id~5E! zwfDe%#&+#CuJO=;l}FK&I}fiICd>YU9=201o;>BNke;R%r5Cqz^Ikf+;7u%iT|vji zd5WMVN*b&B`RoLc52(&yX=qybj36PpmH5t8>|5-G}Xz=q<-NYnSXijMPuq z97!>_gI$~~hS9|HrV(v>e7;wm3x^n(tc`epC-+*!!$GZmIw2hWFlobb9(e!8Hv zXe?h;U3C|cY;GOLht2SupCo}?eh*_#K`1|h5&V5XW(p`!n}!K=)ieQAME@&Hpz#eR z(2zLv-(UjC?GM2O+W!zH(E2@0U;{t^2#C+Le?RTW2Yzwmzc}%~bJnL2((j!0?|!cD z$DMU`4K1zjopl?(JxlGErn!CiAZx$jZPU)f+!GsX$p?4XHZ7kmf5}68){%FMovw9! z=xF+o7V0VI9G7)y-RK*~nY(L=2mSJo$8GR)B-|-jr``G}-rLs6D$&u>Nqc>6=PK*O z#%*_pD57X)dNiqon{H`apuW_qdH&{zg0uFsk~NF=E$)c&O1QZvd!zcXM>7(iAF94i zxxQQ9z&tZcPV-E|9N&Z?3-uVi1L$j6otFCu81IwbGD`QcOp<9eo}F1nyi)mU8%FD zS#mEP|2Bf(M>1K}$yiXb!&RC7zG(CabPV?}t@76L6}Y5VPtqCEarGCJ+cs6gm9FhS zW4k#R+|emEb3HUB-g9@uv7pNJ@^E~UPPnV`ove^YsgG@|?UZ|OEzWvqx0s``!}jQq zLDr#TE8bfe-`o5tMg75Y%lgOH7n#OYN}*Zq%8F;!?mC^fp~uWSRJXpn@ruLFe07hE zuxJli(?w9W!m4EbxsJuki}h_9Cl{T16|rm=Sn7=0{FpNqWBa$|FT7-umYd!qm!h)( z$8b5}ps_XOW#Z)h*lUZ*-INXqo~fP0QQ06Rg`+j|x4Ad04?4cDUDtE>Tg}auadDe) z#!(^T{DnT{QTu1CF`Bgo?Mxp$8{Hljv5qNc(V{2c^FVg)M&-2mY&U)d=!8$vl@)vL z?UKrSl~Zx72Pf_4X(-55sz57cvgpMst!|#7uT(BUrRH0Eab{*w9T#<@BVhQaG*s0s zZsnxgcAt7&@1;XFyQN|*PdQ&7?c&p*n+w!J4-CI?9DJc*=o77Qrz~L*|9p5wuOl*J zdFe^(E>UULJ6C~ggR6{TL8IwMgSu6hMKd0EX?d);wFugGcttSh(}M$stnt1%KJ254 zm2CkvWmJEVv~<++`xPv7J7tza%17T!Bv)o3t!(1L#|!uq3yI|LoR@>mJ)SYIkGzX4 zSQ-4Ve@XlMcLyj3C@Ww5I_{S|FhJ?FDa)2(*mi$9wEwDdOW~ZPfLL44#rNK?-k{+k zTCDfh>-3og4s*jRXB^mhh4|7Gbap|M88T$1N5I+(9$q%IJz81=M)3o3!~Jp%d7(PC z6Py>D7GoV!EJ(-Aw0~WImb&6rF>IS1qbz?TuhO&$MmTjEK1Y=bJG84oc*En0gLGeF zPFjR{osM+9UVXa(@5Ae)%1weRmv;62cIwP^wsAuE>yU%FZm))Pv*$k7Tc$j7b>c5p z)}@PLiYwEqavRLU(!D?BzVc~JLROSKdS@8%q-ML#b-6200~y!qEglqt^fkjy%L~>H zi81_RS@h;?O|UA{=}KvqnIrA-F8tZugNKV=XxY|vbq)(%hS0(e)9V%OkgFfEE2MLs zIQL&}j(wlF|Ip%Gqxx;miubI}79V`F;_b(J+YJNArcspN-|in0*#GnP0R*c&LfsKT z8_f6Z0h@avgF~j{D_}iU9nFn^@&|s}G{hU}Zw5rYHkcV`sHy3zt7!ljy0)&G&So`r z6*V;#K+Fp1@lPb|yhD5u8~nTjg5k%Gga*Syy!`+W`AZAPpba|#xKN-+tU;lx1w6!(0!AHT< zJaug~U0}qLe_;R5JPmbStv~VrIW++G{hge;mYyUS^E)1JqYmsizvBUN8bA=~_dIQN z4InV^2cCxJ-?XcvCfU&cAg81A$2K(7)c=n@tLyx2S#|xt;pu1rqyK#y8fsdS@Z*ooy$P4h7y$KtY7!X0>Rww*TtZM{HxX&`G{@86m8XmU1ktS zdjvWaO4g_y^0Yzu`v)XklqL)3Q}2z2b^!8%Y=5T@B0A(AtrF8-?o; zW+8ZlNJ|_R&d~S1^OuOomx#8jAkrn!SXi@(ck?FOy*|{v{>)_v?4_j9Du`nVAl4CB{k+{zSU~6>r!!NSaX6; zvw9?-b;0@|UMd?mXA5NJFz+gTBIwp-2Wg4H!a2`dWo?iv{pw_(9tq{up#@um$$dlh zkJJk~7{cv$2B#6(qU@+6Zgb^l8>-yAOuHmzcYxesxLhuv)CXRD2!QjO*Q; zz;1)8HgAl^yhu&OSGl(wQ2u!n1kygwb)bo zY&0YWk$YtRN^Ea4GO50ur{Vgu+3g<3D8F5dOfz@=2P(>=Q)f>pc$ON&@m8XNh%msOQ5iwcxKaKq2l6w$D1x4I^ST zHC&zy=KRWn6V`r@d&iYXmw&Hy*kIFTRGcCb*ki21d`F*YLo>RTr;ke(CWYG%J78(# z-?me?U33lkL?psScm{D^6>&KhfOle^(hRxCG(mygS=m3Ms<+gPxW z@jV`QV-~BU(DvrZ7PXm-ZN+TrHHurzH6EFslV=z#>8Rom4FmgLUfP9k$o|MDzBZYZyUEmTkoaNCmq1Yjab z@#X`Rs`RItaE65dsvp;D+7?tbD>PwWK-V+pB0OytFQCC`;R)eMfHAzY@V(F|WfBX) z$}m()djR%Q1Pj4ZEA)e2*%qP*5^vEbx26B?DeCW@yp8`s9elJS1opuWLZ3%F9<_}> zdC>Mq1#Hr&G2#54{)9XG0XK&2y)~?%BJ|o7U>jZoW?>8@ARm2#9&~IES(jxdSXvNn z5u887fCAxpwLXp&<)M%7h=*MX$cLMcV-s!=NVRyh;Gfi^e^AXH zsql}o!YAZ_Yty!v3HJiBpZ@I-5~!4(0PF`>wj@Km11pxhVYEL1CL>&E{K`+#+ZGGN z?l0oGvTVn03U08FISx}Odd)pI<+}Q1=SOdromG+@<}!aEZ}3jGrsyTccDD6H!?%yo z9pef`Z@6bZvANv=oVuZN6&x)psFn&5>}K^6n9!*OaE;2sayUwnvbM=4E+SFf1&&eY z%S3F;Zj|Y$Wm0GukhnS69#KhH4+m*j4=xl>7eSPd%FACB&7ts;=PmAopKx<_La>YM z9d#iT`(gvIacBsE1>5^3EH+k1awm*G>+(xRm4@@3sl!+K2by2{ltQGmdzLrt3c3t7 zE{iwpGBg!98cFpP`bohui^)X&{GTIp$eRcn%Y~?purpvz5-L7*HsMH0TT`RZsm{}# zRom+QD%y0+Mbw$Vu2(_<(JUd>dMu=TKq=^sx0uxIcOCdxy%WEC zI^QS$*|E51jr_g8ma>Br^DA~XvK+N|Gz569@mbcsd@8^gJ&X7KG&n|_JW$p3qDd5F$!o{EEv!*s_^ASx{ECjm7d}zjM zDs(Db!ye3%NLsCue&g=-K|iK~7eiD&44JgWJeBkf_!T(-5rsaM=iY`P-nZkSp!1-b7)?l&w25BK&rNECg9D&3~1ax=sb<4$#_fHK1^Q5 zr=9)lWY;Wl`KI1oV*rk2r0E-+%)ByVc&AF7;ccYK`c?aFa|FXBmh+kw65U$f3{gIj zNveIz6JAa#)6^%8y2}^VsTsZ~SgaE-Lq<(016fGwMlW`A4O4>1T(y*WV9u`w;%d&W zkZ*459mbsSc^C2rowVVkR7lAf)w_3P`4a95ZNvsr<|)UL91tAxOQJmsl!uSHgGnx| zS)NeL2_O}ScC!(Uhg=Nz_nr=5(~(`JB5r82lG*g66KVT8FB1SJ^u81>cTL=s9EoiX z#NI4K=qvsXFlU^!bJJc%9ufPZ#!9-ytj77cuQsdj<8&Vpq3o!C!zyDeZm{V?2J_ zA`~4;ysD&qLCHye3Tg49Kk;Q=t-r`NNwQ~M;egSmUcr}n&mO3NN-;gvKg%?3G} z_|MG{dlHPZO$!lVAAqlbVG(ebt2PKL(2phTL%Gxq{m?V_LkZ1|_t+9eY0{#@Qw{@)_w2>G2vtRhi3>04!f2yzQ1`asUOOgDENE!BwuGZpoDR* zdK^l`V_Ez-AQ0i>P+nacTwopoIQzFkX0Mkr!!>~K{sh`Tje%LpwfJq!2L2L>rE{4# z_L^)PCBlWpD3Me~Ii8%mY4n@k@c3&#-hot|x1g{6dhka zzhcugtWyXMHf%$_NFCvNe1D&6mbL7#Er6@>uoH-Vh4l?fb8M@9m#M>BlFr+?TV7{H z%+VH{0Nc0r%_cZ+KRf_xBj5!KNTI0y0f*ef&puB-O>lmxF+6sdXWW1(U1t;W{S&%C znVC#nIVWyb1qn8@RV`8!&5oL{au)PSoN89olQ^26N_sKJ<@@2`l--_I!E)t{=ordQ zl_oQlS8bi(b(r2_P52!|mp zY$M*RahqF0zI@Ya(95RO=O`p9DGJszGY0FrX@n(g1~GN*N%AVI8Sbd$x%sy8yx!$w zO6-za-^I7hxHpipi4cr)5rO-#Kfg9;954suv5(}S2CdqGceOmWO-vnb1fCa-1B*86 zz3MhqQYIZR;|+2{9=0~yFxtQ*1NfibmW~NGnB5C)n`vegbwQV0_ zRTlYj^*tWYlPwCIGiwVGFo-9QJTCwq*ap?52*5J5M-9L}2C$6hFY0)W*t~zpnDC!p z84re>!5!kTax499$e-UBLfbI=T2HyhkYu3`%Z{*L{MU|%KdgKT^zmBThcBkin;hlA zO715QV;IDGwBR39?0-;;|DZxW$})Ssc3`0c9?r0pvjp(5Bb!mwrndc>@b{AXI0ie% z0q-n^mqN1y3-~VIrunRyx=umu!vFPgZejGR$RmxR`Lq=d0&Wu2-Q~R#Lk2Zb14z!` zov_m?di~MrlFAI5we2h9J$UTB&1cguOu_q#+c{g_&<*x1ThpLdo3MzBf?e$4 z`yERzujZavO7|akkKi}!yx^9SKAtDt%oq25$;MYO3R0L0;)Rmcw!=1%5UdV~@7kt& zWr{=)gn7uA)*GK4%K5NJ<8gEIHVOvy&V9Vs*eeehP@lelu1-3M#u++{$5~24h8A4L zgpv6c-hfSjW_5?U^x251Z=d|qxF&=hjM1M|uE(Snf@Z;q3WcK8+WTb~z>1nu@}F*s zj!8vyDDP*bL-*rh=B4i_kxFew#+j-gDaKB|4Ld5d?RS}8` zgQz@cPAqzH*c%^nba7&kHPJ6{Szm6L|NY(G+@86V^;+)HOe6C;@;$Ti=j+m}T1_OtZ<5CgTt0~|ErxRbtWh(}QQ1El1VF<#H zMc>8B*(P4u*8G^Qj=rCPe0=cRjUOmEJ?KoVXd1J6+#qXjF6^6{huqRG;s{Qp7hT24 zG=I*5n&z3BCUMA^GCf{nJ&!C{#h)xW(08&V zgOl6k39v_$@VMNSb8b7lX0hT2X`Fwp3;5tbk2F5HlyQkSSp$8x>*Nsj)SL$|uZYA? z(~G?N>p-+C5gg2|@Ak#AW$hV$HL)_B2w$L630cOsYYyLNXaUa3Jr1jPjP*k8elHL_ z&U3j966R<^%5F*uPAnyYdTx^~?O}DIxvw&7egsJ$ z&UMt!Yc(wtGKD>%!8vvHWDHZ^ zE01d|e&5iCIueU({62nsNu%`t3;LGN$?@wA2QQ zMPJ(Ucr;j=&%FUbxiLxfI!2%ORK3Mr|srB`W1W&@K3WoXwpFDEI-){3IAzKiyB{z*;C_=c&Sx1g+Ux;;yKIXsr^vJxW`n`pk=Vlu5C%D-H} z!O31~?i>>P;SCG5SC@dEgNhkb;YwG*oBSrdDiV$-1ItV*ZE+531?Y^E`)X*?Py7wu z12UoFcbeE=jlg6SNe)U1>sANtMbnnnYJ<~;(4cf)<31q((Ugi^wwU?P!dBL{r`lR^Y}}mh;&>@ZZ4qxIGp945P*4mf*X8KoVDbGix_M_XjXg?L z!Bj`{$#wNR2?GrST8Ny+IetE7Uy5WLk5l!RYA&)B+mKIJ7hCy3x$TsUPm0?pky4j2 zQi^nr&?y>n8Dr|-^bG}KVmgQ=xu~}tnvq5-$8XQ=w=Nb|O|~zqFd#7~{V+rd_s^bG z+0DRAnxsu?uG1&4J4}F?Do)oY-;~fyO|OML%a(&MA^2-tHa^1ww zM|P?3H8%=)a>LXK?GJ+JeB#kHJa*r_c)`JWKaqKU&AnEW7UHE-_w&S*X>o)zoo2!y9ga+Ld5xkK-Lo zNB45Dgpo|0TZT-T9~S&&&>+Ha&8YRj8AZ2<+x2B%?=KJ9ZJZlYGW-~~2_H|FtU3aC z!inP28{>xKJZBj_zoL|xhO}VANQ)FVr?NNQIgI1Av9FYCbi#@QhcX8Z3%dHab^S4O z6*W3YwLbOrtbb`~==W5;2|6z7n30mJ!ElHS=Y-#=d-}(glUxh4TGqvvFmM}1aWw8} zEQYA;m#G1r_V%xS_T~w|Tef;z5P~gwW-)=Gd}c=+I%)8s!CQ@J@vaV!+O3)@in)@m zAWt2eNa2?(j*)-Lv{BPQ9b$@xGK#p>t{|l?FT`azXzwt;YF4YYl}K6h{A1JZn@@q9SaB!(4kO^bzMDO&L!-OfYnMwoFTK?d5QnfL zDNz}<=2c;16vDhIjzm;0W0pMqjnMpipUnK=AXodw<&e#VwRmf&QM#Xr_&CS|_=V zTeqAt5Sur?6cLmzNmGzumIg>MV%2-}Ay6r(@sJAu=HKXy*X3x@Vo! zn;{b{lH$`C-|QSJaZVh2f4ZoWrxB|90RHW$~K zkix&h$jwt84vF&0==p2?)KjK$ELoyW6CBJXzn=x?PVyYZivxK-5cA+o1K&M4X77Au ze%pm&hoiwG>_v;>*q2UgIxkgMI*d0bs4hCfZY#c1J?W%nS**~+fv(cslUALGpxH2k zN2$g}tTvZ%!fD}SIggj8;GL01_{pQmWs3GvJ8bYMFpf}ckq*g|b{Cg)V(LwaY@g)| zUfrqj8Gul3-v z@xs-r>D~wWPrTR&t~IkF35HR^WQoJVGG;=ZNHvgxo;9=AMMALdPXC<4zUr6es>l+U{c9a2VUcOE znX~cfk;pryl*Cda%7&u+eY59|{j$T*68jZO1{GzEjf@!;bv>^8^HUOs!_*IrkUm)J>6fZcnydT&SfLkB^lTa=v~d zOR#*;ajj3blOhYTCk?g1a%(rYQg2vhS*2YlVV&le^H)+jXqNYbO>qgqJZK)u@1Lae zzo|lUcq_7!SVJgS1AE3+s{ibmO!>vPZ=32LQKrnM z?Q~R>^%{09m}!l3ou3mRZ7rct_ivB9ovKl-S)sBs!r&N82Vp_TbgDeKBnoGwY%MCk z4O;Tt+?hp1MqDVUeoWazVJiG4Kcc!hJD&B5tG%Vx1O0RT__=F_aj}tE7~@g-PjF5C z*Hy~JPomgcmjZ_2&q&UO;;yfrw=DG<{ehj?Yj41VY#f6LpBhJoL z`k7DG)XC*FsZzXO3}(C%QCd!$>|kLYppoKWOUN--Ceu;Dl&Pb#DqMFtQP1@NEuU4y zX0nY9%g(cZMWHpdpSq1cPNRYyg}!Mqhd))}J_-;2PDnxHRCE9yE4sLjM7N`?JFnD{ z6^w!{$5;dZ{9L__3EB(gjE+_0I|_*T=J&Nkad0e@*>L|2`;{p8Eq1YHn-f`Iad9an@CLs#qe2_qa-l{kg7^+VT@TB5N*dcDTX;)9y2)?oE2k5}q)m zq3Ys__JEmZMsk8r*r+na)~2)bzKVbumqZl1@Tp&Hz}K?JvD{viS8RQ?dCD?1wEXe{ z;t`M#t@h1^HSzchIi%YRccK!Plkw-*Ljuh=@_}p5?CPvNFXHLsLpbWc%3L{;(cgZ3 zDYwvLuK&EtC&nJ9`Eyht_YKDVI@Q7bcb1_*byH?bOv8BTb=`4g@Vmb6a_5_@ z$BgmEJhkZ3o^H@*Tej3eU!Bx$uO%7-hht8``DG$m_g0C|`-T~$wL001gB(WlMuhbN zbuN7t%|Bpy$6a30WA5S051!N>8JXT+QN~ z_>9mwS@uj#4Qq_ZCi54iLTWy9pBC^jh1DJ!npH~F&b|EBNG4pUM}4CtbE5R)2yNZh zCQyobF1V9iX*rr?xA*WMF}LW=PPxjNZ}B#m;UW(OLGp|gp}%}vGI{>ctuSeWj}sr} z06AA>0AkXjn!+lEe_nPf9pSEYKZmfxdC%0}ILBtJwvH~J=&1u~ie}?*u%-KzdZ)G;zPoWFi62Hvf@ZhEop59xN=40I1l}Cz z5Z-%|jOa)D4cmsiJ|G-JnKLmYf=8;mK=;^=Mk!8drl3Ck&2m=qPUt8Lb@`q$C*n=e zPTXeal~}-mt(K&maT;sk4EGrw-n87A?OTri!>_>@Mg1Dea24-93S@^O<&U}hjMrBv>1S1?8X;4KFS7i8^ zCItKQWMS?)eZxC!=w)%5l8S!Uuu7*C=XY8r>7iP0bCR`>eqbV|JL8%iqX<^h3+B)6 zy=$(>V68Q|!->pDtTuZ?sI8xE)9Y3_Te~S-B~l%QCAlJ>m^4#_Fbf>ynS+&v>qGJOJB-7UxuFOL#lNl`A#!6G@U32oGoluZ5{nc?EW6_ z$25CERK#+2v+G=0>u7mZb=+v!fpuxLlGk5|WhmV@LlXMyX%QC~Ibj_HqN5|4G+kUoW(vvmSSEAXRjjoZ zo44!&6!V(0rTDI0h{==ZoANeVvAo!gJau#pjz+4Jk^LG0R}0;sD%hYmDEjTI+G)Qo z6t=t=6KU%$ZeznQfpTScQM6aBi^baF?Qk*@e2^Z@csx6uziZB905Iqhp6pVG9v?Dt~J zeePyCY%*%f*f*nORkD*jX=)KRadva6N%3rQVn+|J?3}BS&+P1%F)OF=_$P*AcPrZ_ zJ1_~!QVh>lHG3D7Wz^}rgmgg#E1*#1MFCdW36oX`;slNVq{FyYA>UT635LSx53i?+ z!&5eAmcr8Mbnca|S4hEE7($A|`AXjCTuG~N)cle5=$ z2qH?_8V)JsC%6fXGDaCd)KZ8~@>bVZqO_pKKK6_6Fa*fQk+ZWlPypL& zfPjo0Vvr)(*&YxScD5H)c$8&e{6j><8W3mrLmo)c0SN;4fJO-MLu!va0?_o^zz3E; zQhfkzfQ7`5CPIiolBR|bVhx0c0mvh05d#_=9#sCr%D}fl{RkjgIcZ`BUf$n~kHh($i6qa4@E|Auk8b}q9wg6>!2Uo5$urO+Fg*D6 zAB+!_-&zFpAm9h*fRu$qL?pzh#lRMhV0%*oJz4>43q#NYNeB!vursx>x3(kZcvSiL zHnh*n0v$k|HGuP0`jv=t&9QFtoW@UrhnZlIOy9y z%*BUc0j~aYCOkUrzg|*Nl9ZK^{o70bbN&l0F7#JD;4=!Q?hVpO$i-G-N z!adX<2KwME78X|G|6Twe(E3ODN9`|{0`7Qp7vQo#o%nG72mMdyJ;?mwJ~p6-Kj;tK z|E~RZ7yaM$2i|ZiK9nkck zjh_Dh$D@0groW%uUvu^ES^W55Wb`b-|A#p*0KgG|Mzjpf#2icybB{yoA5C7?_(N1$(fiG5|z? zl(Z=X0!+uph4T1hK@aN)z%mLDKS%&11QG^`fW$%4AQg}*2x6fJF#$nr^bEk1kM;wp zhhQdRz`TDg?8p1xBmW~g@t?VgK==Qg>VkhJGjg!e^YZ?cwU{igVS=H8!y7gKO0aCY zrZcR=1Y%JrK2h_n;;q%NKC5jZ>RVj-OxUg6f$9FpS_US(&@nch9=ROdqt=+r^Vfa? zY$&+uv=|K-lKQl{CA87Jm=b6j{Fj5ytRqa*x-*l!FCYUK9>0Fw#lHDwg8rE__s$_r z7A*p6j6h9tQozL9LEJ(CeHQ;nmS^D=&an~m^)iv=?ljJ^0U96Hox8$my+c8YZgX|{ z%#29dMMm(czkRdQ%3);F-t0{vt=r7EOmURvxNbumPuya9XTO>X!xhUFdSUxs)}XD- zBX*LhMA8~D2j4ETvhg_17`@a!VTWkii9m>Z2LFSVKP?*3*@T#+fDT=3@GGo=|?0T3Z!zk;yPGr zC1W+cj@}#k`Lc(OMKXW?Zi?jX_^|y79dM3XHbZo;GMQ(&Gum4^QMR4Sccz(!Jqn*2 z395J2#MDb?pWFBPG>&=KoJr!R9vE&UdcJ;6#LnoA=86m+I@yG+Ksx)1A(5VJLi<@x zssR~8*lkGsH1;&XP;4V3&%Qag*i?3uzVG{oG#wvgu@+Ix&0?`#txa+5Wgf;1%=;#1 zw_7FuR1HSMsc)LF(9KUilJXVYJ}l%TK5wRKzM32uRNBbH zw!UJ!72b1Qmw>=)+-|RAYT(^jCt089G->g;dR8y?c_|Zjpo`-u?ko0xWD7PbN<^XJ zM)UWO=t@sDiXdVa3pcL6YQj`l7ZAvM-oEoGc#Km|*(d1Ns|L#|nImv)p80SZA_hNd!v!37w-N~iRPv|Y zcYkiB`{-5u(wG?T?kxD)D(76_EKLrCu=`OiS&NZ4^SfRa!^D9g8d4~!EKAUm)dy8? z49UQZf%T}8Z@eHxtj`wOMT3G=^p|6}O-Hh^6|F>_sM@Xav@SB#Aft{Fx zk%O3xnc+`VWCEb>Pe^12Hbwt{#E09zAQ2G#pD>XgQ1QQFqUvvCWqE+ie*vW6BSeaW zqyUJN1<8TrK?)!xkn$s3>Vfn@1|UNa81#tCAR~|wuww)ngG@jsE;c4$E08J33}gYa z1X+QsOs&8mYmhZi+JI~xHkuY-Bl|yUb`PiyvH{zfS{s6FEF2&pI}ii}F?IeYAcO2d z_9k{gh|qRhU4W0~WTz3PngAI}I*6C@gqfdGSDM0V(yus%7&0?&ik*xO*<1>mmixwBa^* z5$bKXE&Ti`%*L}!P8CzROe%b*rdv5^z5;AM&A1PhzY+|oQIWFO+)~efzNN#kLwk*# zJ)(DqH*b-DJ$rq&deAgk-p$IN`&Hnuhl#{$dFp7jaoq@vy{Y&r9&Y-3OUt|IW0>js zS874>#XUnkB2oNB^2yPK@6C`F%A7OhjeaQhj3}99(y)@K5^|`lbBGp-Nh+9v^*9;v z63aCUC8E2PawQ72Ih12kGNW?ctPFG2W|*V-qcg|dde=9>2=Tlc@pC8c8 zYJ?!IGNme+@jZcX?acnm(Yjcv>^`~8kueF6izZ~n`%u~Q*c{C1>22TrO0{|GJ3Srn z5cT-h!ii$SPYzeL249+}-jy$}IL!R_y$J8)Gk@tUPy{D%i{9wjOw8?ml1pCrgdU&& zLx&C|7AB+6nbBor*qOVcLYjllg4n3w?oNJv1uqpNjdY676{{Mea&(iLWnnZN~(t;v~}6<_OlE2HD9&=Ol>Ir+P@Ps1VF8k@2uGzEkM7u0a3KcU1J&K<~(&-4f&4|9RiBCap z!e=vc`DK&EZKTV{dQn3wLR``8^QhfIqeAAw()J)upCWzDIC{9!CsVMy994zYX&3to zPHxTio`Y&T?%%IMPaHPLJz#D~FLE8?S3YlzY}++k%P;18{MzH3b|}q94zHbY|AdAW z@2r#VJt=_Y1aJItVaPdK`b`@hGu_rmkY}a_iR4o+CR=ArB)UVfwVp|mH$+ae$s^pCbu~C%kPf@ZYL3 zLwrjXcsziQ0UcEGsk8L*X}AyiYnn8@H*gKT`!q0&+Am^t(V9qM0vrpN+Z~w-80+WD z+jw@k^Xo778hv!LtkX_zWE52tUxB_#{`joEq176Em1WSiV~xV^;9?xTNF71$K@hB} zDX4LTgsjZ}6apP>%^v4PaX^hEA#9pIPV{r@xDpTRbL{Iw1LP_}LI@mz7UbPv@FF4o zu68`bQ?O?pW7ntj$pW=tRo@TaqA$!a6)Oa_>QRx8G4Tmk*4b*_G2i1If}{0Mg1rGf_f4y7nN_B|*@q zX=w@SMS@im%?xyK8>@ebU!-4%ww`clOIGbFIxwjpw2 z?=4iu=dOCWinp9kI|`*jj1Cx92I849dTMowq}uOnQ(Z>g?=}_#J%k3{pizS zLQGM;(o z&F4__G+Ar~dCm3k>VI#VRkoh0GctiuZ?b!jN*(SoP;;EGMy3@UBK5!aABE((*9iL z10ib@Yi80hJ4JF6=+=A>T9M;&F4v%+jj95%N?da}ZW)WONbN93`WaVHM3nBBA~zN3 zEqQ&YOu-N{ZrE%S`)gCZ35)xTO@r@71++z9U_ATSFYQBQS?gG;TF&elFaDF8UxmRM2;}_L-!!dm~8jN&3lX~`%6^ZSeiIB2kb3kw?eY}ojO zQN%cLsNUEAc_RZXaXM|zqJdS0vPJMKhl-8lT*g89Gjkw+d~N>gNrMd~*hFPdM%irb z&^EQ=tT->$@#qPi825N*F`bC>w9l46l94mBAB4i(=W6MN__r z(bhLlduI6Ejczf?b@D%R-?EuS>e6EiLU$Ra$HrbYvB2QT)}yC^c4`nB6X#m7`GjYL z3wvg1^G!=t7J%is+Sa5bmF!00&tzM~UtR>nM=j`g&!LnXjAqCUw3sxcmYGf8}!EECp>Vo8&s9;W`{m(JkkrNf; zwAR$L@mYkb^78n`opUQrZ{+mjWcViD3hP0i;(Wczeup8VFWe%RH7~Uxi37z~bj951 zBHDyfVjOMoT+6!nVwZs=wB&EKGfdE=I#W^vMijPOdNPVVdxep+ zobEm-T^0GH9fq4Au*v{B^s@HcX7!cnlqDSYF+$Pmh&_z@;??M#$2t#`icRD7Qf@^( zselmE(+Y%3{YyW=3qG#uZNKfKQ$&Mq$8_>faYn1tvZ5_GHm2rqu6!T6QLEVBz`RY% z1gmAAgj=zz+xyH<^zCgnxZjcJ_fNKyTk>lJSAD{{I8*GQqHgY@T7#cOU@!Rorj%`< z>*`(6C#zbg8sM;DA*`HOU?|XEwiJVG3G?$i^1~aXdR-3WSK@RFQ(Yg#)Se18kYHPz zUK}ldoE5ZwPO~<)|JoFZezYrWQE~4QA9F8i&hWUpcv?MZDqd3FNb*jgU1K+7_OfG- zM;&h5Xv!3eyRt1xh9uX0lAYo!=o^!pEIyxy-J+WP2mj?!^&^VsMF%6Qrk*+IyM99J z;`3=+qv+UI;`R9u#M1*KK^LyE3IrFOl{Oj?+r9SVXE1Y1ALBZh$fE;NBtEBz)n2}T zVkW?c&oTSmh>5~*zD(0H+*PeLQ0${(M}YP5MZqt#RR%}K#?f*XtZNeVI@`mW?Wm1& zW|GaWP%c;-xZf};S7(6_-Rdzcm&S`6>tgN9WFcM zhkh<=(Zd!_rX9qE7qLR+;_s4w;6b3@#v9D_-P}eldAlJrYRY1+d+xNi*+nKNfNFRiS*&#EaOehVOV@+rb$_$?wgw!&(yRNpVBI8 zzx$#8(+MKH#88DaNNfY=47bAXX}qelnSolniS6OQ8H^V?VkaI|*soDWhSmS>`3+-! zdGp=rEOke6#nyj@5#$cN)FrmpIOp=@uTn1XriFv-z`tbOUgDUe*>NPox<7hXY$8Y7EQ*1z50gQ@MDEiE5V9=p;EIQt}QmB{v_i_-VIy3)#+pBP)Xpa%lz9l zkd{`}>INO}{bJ`pUy${jWzCHHUJavwZ#_N=ezgkq$ZLY?Tbp&YHviIZ!E;lFAFtEW zXz)w*7v(C}(lhPOSy!)%KM}%PT%6X(vov!NL@k$fHe{@qH4dHqB% zu8FF-#*NIp6j^I7a?UPl8=A&T?2q~tTiudrNZQZp%bo8$Xy8CN#$?92EMj(^YPTrj zu9mxKcH6#5DX9dq_Qu_xpBpq{H~R^Rao^m!43eO=ScRZEp3Jh}u!hi@@}_tCHYho( zl2AKsvYTz>i^IOyMLkZfhMX^)4iGgLTJZhK^BgKZ+ptDM(3)VQ$iq-VZ2tHT{r&fz z3Y=s+>7JO{0{{Elx!9lel9IA_HaW;7_)l?40Vy z!(tu%9N5EKM0Hmjhod!wlPf8s?yyL&Lv`HuF9tI*%s*1gEY_F3Zg^WB6|}Tzyhoq$ zrrgo4R`E7xYsjgR4+(nGwE9qPmx20O#3D`UkcO-!Xx5>{dBtAsiN3UPY@ZC(P=*K1 zc(IaoFr9vVdZ6vaQ=3#M8zLh+=PX#Grbf2UIwDlP1a3(`5`7Ra*bCD6;V0b`;ffN7 z!!wpS6w$<3UrJ!YaP5#~$)O@BQLRzxxj;XIJiE9uQm$;E+E18SGZE#|@xg$TuF$vL z^xgHB*iw#z9Ceu6BPC1RP$j)RX8P!+h`sX@8=ZxgzV0gbXV18!DD45m)t=>0;v5xM z8t2!b+epV)ck9!2t7N)-8%0As?~nGFcXuC3=*wtUH!@!y9gL318+-^@@&S?izAyxF zdDq9favb^z&3#mx>X_$F(}2KC#pBDgJPdZ+-BNX>3{q$Mwax z)lOYX!m(wfCst!$SZ;}F+aN1l5hBAT(;vtCX7?e*rcru|1TVhruG(K3QJQPh>ne^ z4cGz*bNs2^+Kxg52v|HEnK9GRGZ51fo7mgiaDqS(6MbuEI>QG>eg}IKfKLK!1)==w z{K?r4Yy`yn8GxYwUq25KaV8dGBjVp}9E@y0{QcpF*y?v118}AXxZq!H^c;*2CoKPI zqi6oFEWp431W5kN2ZW#g+s4EQoNN4tkD2Med<^sqZ2zl1HXz9VZ&?Ng=7*!J|L9|4 z{ok~4{I`vPo|zGd%>PT4fq|XZXZJK#?W5Q7vnWknGFKZ}@vv;Y7A diff --git a/lib/CPUs/MIPS/doc/mips_pipeline_stages.pdf b/lib/CPUs/MIPS/doc/mips_pipeline_stages.pdf deleted file mode 100644 index b05de04c9a1193ec42312562184288df8547bd1c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 9884 zcmbVy2|U!_*MHf{6v|fiQP#u^#@NXovSh7niNRO~Gh=70(PoX5eJe_6u}0QPDikuw zHd0Mlrzo=i???6h_WORH|MNVr$Gm*z-gD16_nh}VpL6d$h??u_OUug0!$do0l8ayp za3tLKj3-P@4RH*Eb0>Ph(STxs(8qccF?cva-`kmp(Z#sM*R`IZa6s@A3bM_n0NPgD0S>zsGyxr=`~Zf5K6eq*dJElpZK z#yPE5X6f40=g`teL;1QIzBvNf0O3w7uw_KF3YZ?*Tb?b^>Qw6>pe)bh_Zy`@Y0N;ZJEYGDeCm|?8{}X z4GcZ>^{DrvTC+y5$5K4EY>gzw)xs&9Q?@&&Y(2}Iu;wj&I_pLWD;ayIY?%hC{K}m6 zmN})GYZ{qrJ}V@p7m}>B*UuG@bU~w#G@!j+rnO#{uyQ#<5p6Stb0CV zXzE=Tso^K=%|lEvrB>#ZZk8On zee<@k!ts%bu_|+Y&Ec1Zdfwkp}>Z|rNK^qMU6l-O2ZKicGO(nze( zu4O|Ol3bI}^-HAt9Y{YdO)ur7-lU`^k$FW`bLO0fLfuJmIV#JqIoA$F=QFX>uC!Hs zqmUWaLRm-=QR5PAz9<@>OWcN>UApwt{vRs}Zx_h!UhVT%s?DWYG}W58r8n$j{$93u zUhS%;l71$^ol=aBJi*h^OS_wlDaCYDb|p4SUy5D({0O^XaQxKCc6x+)%XHvUP66o( zt(9+}7myQH9O}xc^i%H4Z1xa2&oTy3vZ*`}UZDxvwX5Q0pAmpV zl8nH&;OnhY^uFq}yyzh2a4U*E9d)}sFWz`L*RGwu*IXSy#yAx;I+w?>g?8);ScG|K z5x#{VSwB1xy$g`X2u2WPK}`pu{A4@}7U3e51wy-Ni!2Yx*F!SuP8@l1jXb1?TG6#6 z>50@`VU=L*q&@)%p%_q@i1um^>uEFN81pv?eh>KuK!w}~);2KwTnWIUTFIOo9tA<> z&<2bR1E?z(=ZiLhm3#Vl6^fNn=vfMb6nJe1aujI@VLTJmd>EY{zn!K9z-G&VR`uXM z2v3;~AOdM>D9EqjhfK+Q4=hf-4{+aMDgdpOEuAKd2t_&;(zLzBG1f_lqG&|pV*z98 zb>C*x)z3DfFP6INH>f;&dx*cLW~9uc*l)lFU;0*zzq>YtFE65Mhm525cXibB+7wj; z^^V-m|l+H*}*iuSNKMPo5;TLP-*?i&q3!GE zcz?d;P9G>_x#b$cwX7(osnCCAWk`tSx_-DBic?+tisk-s{_CY(x-E&J1rVnJl}w5o>L1d^tS)#|rKB z=VYp}W3}z;{`ua0dE)B_0wQXb@GGv(Dw%l6@Rh~zYv~`)51U1*I_Xc|t?s8%Ypcbi zD()k?$uh-Pnyi!~LYiNuJ(+PVP40DR7Hf};{4q3Pu_EW3?4xbkDt{smVC zM@sk|LyiTy6|Ks}B(-xPgYq=N9)oODgeGGC6ID3byDyF;05a83Nl2Yg!pcwy^E#Tw z^zFXk0!}kA1X(~rW6x;D0eVQ4&_}RUm}_RE?&fQ)d-pYwdr!@Dg7@XJ*mtS2e3PuD zmDES1L*^}YE8QyC!4T(#YAv_c+r71hgibW}z`pPH;wF?+TAcxX43(E}OsZh%$cFs{ zR+0)Y0?%znJ`UQK@XSenXD>N=lDU-{OdvNiPqufCx0c ze+L>2jt`dZ8*(UFLrlTaKvax&rPU0K?gr}V=0T|Mj$)(J%r%K3fO$+)b}fGnr?Za- zLj8nnl={BK`&TCGStVMHzXE>`xX%Nh{H7?S^e~zcr8JtM2}A4O&e-rfengiOnSkC< z-1LxT7%a$#+pKrckWdOJo?Z>df$=pNBR6ZA4Sf1W?wVvheS8t1I>L>o0#oYFjx?BN zwfYDP2(|TYkq)?Tc?Mo701WQ;t21449%NJiSSaRQJrKAa0&rKa1Lo?3h5*@+LpcmI zqBG|p_f5IhhyVoORS9#GD5USlHV96TrNNv+4A7GbL2&@&3;-j@?3Zs)12G>!(lE(N zng&uLkk9zCXxbUixI_EdAVjcsbWWq7=`Rbo2FmWXC)QKjHggK8P|dtGz}@@ z(#ykNY~ah8e#jDb~L)o-5h4)n&O zMyAX)`TFL3Fy||d7La^>UI!fY!qz9#lii0?YF+sHQb01-;f3~3m6Gjb;ckC{zNqPx zk6;58=;J2~vna>rvtqZ>xiCvTD;AtW`u}1A{ii#YKc_I++xk(_B_TMSEU<^7OO$~| z{1?#J4l+708*HM0sfinivIHAbO2H@-P#^WzF6uZ)57sBt8QMk>v(e9KKz2*p&wbP@ zj3OEWyhs6AU6=*hNC73I)r_7w_&KGN{QVz0sW8jxbIbO+5VslT77aVFhra!y{yJ{_ zrf5?q*x&6MzuJS1$_Uz!93^SbTJ6}H+$j!pLR?Cjts&bo<44#@RB+gkw}K8U(O_3> zq%wR1yUEzr8AcU4ny3qH9ZdlCaZ5SufHJDqyG7YzbSxy1XWxbV+IgWf%x*|t2IA<| zTt3re=`gkGa7pOfe70>?mro-?vo~I%MqoTVXn8|1u+4whW>IgMn^Owr3XX#ui3wpB zy7$SUSyH+>(p1mbY{5NGW@Tu=`&mW4W6rAFLP$=tYBJ{g&=s?)o{Del@&&W!+_J~# zbgVw8eENJ2SC}AR;(KvSzH1@!$Jndz7=wP-oMz>^^gLx=hp2Crcc$qEzIosZc2sp= ziq?DE|7z`fPJg@Av(IMPKb(3O9!$mmSdpa9J6ZQKwwsDQ0$)#DDJ zoX#8=HK=>Gv1Ul5R}VGzJNY$~{bBHGcu0-kB=v6y8Rz%kq!1EZ!-;{NN1&-@x{Evq@ld ze$G2Fpf=3SOD$F~JW%19!}&4l%*xmBn-P+P{aIcLkuQf0Eb+o`_N=}d(N0#$DypOV zB#o=S%I7j*#+@eEQ_CfgnfJ)g!qNY^5eNuVIpJNY-5}Y zMZT$wo}XOv96iFO`d}#So8rU8{+^|zlml~vBX<;V1qMHQ8a!T^2|PdX z^o;4ReTkiF;qTcTAuVFBZ|7d@GxRmjy_`Zy(HIZ;_;$_G)X6(JNp)i> z{O&;d>Srfv(+iFo;?moo;bI}h2a%&@z2UiG(^X~*QrFYcEr)`~1f^GPZ>$Dy&Mm$; zI3ySm5r1*Eg@0p5Mv0pS2Iu3x)u0vF3PR z7fTG$4gv1DaD){mm*6e}?d$D|fQEE21Q$HkkLZhsD{raXS~+M0 z2I>ZQ0#V1q84pJ(BaS)$YAY!rY_YCH4}u+BK>@w>3t8}Aeqaz)Q4U%s=!r%v!qKu2 zfJnHUB4jA^QIdyTLvHc@q(Dz)6bj;p790mE7Fe7+m=>pnBVhmPTLzpVLU9I}3}F1d z%3FZ^69H?BW7-DRe_yLR`TK=ZoFz|6UnOXV-@1n) zamKt%?2BL7odVTP;FhnSMHJB>pwRiNI1jC8$3-`c`K-E`jX19KJUA@Ie26g zx!#Z`qiG?z7;nz0v1j8GKk2&%xz=ZNl~{cGP_YYo?tJH@l69*W!xD!v&ubcY^HumQ z-1~EGowPl|Zv+o2m6tKFv5GUX&UNI5Su0;Yj>4EZj(T;t@9g~t=U+eD zVLE+E|1Ouq{WHN;XEEM9A{9>$iHY|;q8(90pSxyx_+r)FGZV)x2ffqUYLmF6D?ZBS zsVBP!bU%r|NywXw%j6x99yZFp;OsJ|^d|rI%qzjmKD}fMr6-|Rq~t?Y<^vW|hVB)e zd?P0A-7Bu=r+;_1wTz#W<1=K&Yw7pWdVCH+^H0QhGP*Ar-G2RG%xZA8V{_^hdUws8 ztn#W`f-6$BdIR1wchZbMNUMn~RBxZjor^p$ZLqk>$|7t|(09=;F>!Mmq`SNSoKTi5oZq zm2%;*@Lg_n7rM3NX&U?0neAZ>GaSOgT03%>UYK4?N!P{=MkDzr%=p_`>V#qL&hq66 z-Q9^xIK?)$zT}<^dBXLEzJ?HL*8TJb-c6C0M>Az|8`P2Tui4ue2i|c!e|FvPh-cH%?96guhpXDFHrCtMEOxcG%PBU&j*sIxUKmjb z%^~ys)8yv7hRLW;QBDsD@1N`#;^@P4rHBmK9fLR4`pkY zc4URotQqFCua2Hos)+Ubk(M!uwM)UW4elK(e?x1>J9VPK@#c@z33Y#`PDu3smpzd{#lN%XiC-C50ZOiarBW@B zOm()>sUhMRNT=oq3xp-Y8l+WcgbTtIfkC(aXM{9WXKpPl88r<|n#HVzKaXdt z=lgV?M`D8;J{Een_o>^1OB%YG%w0$AI8{jDCvqO2IxYWckyY4pW$|Wj z0e3o6&7e0q9yY|CeR^hf&j9!RClus~7vKGylN`*M1IulE%y}4nnooIsgS9i154y>{ znSFnF|4dBJ4LQ|n-ZtmGyWMJJZ6^cF=I%?oC7iA~d2U2k<$WEzugDpjUDy0;@Z>lDE+nD zCl+Bc4mrI+6BK(>t&(BlGVnHRHuU(9gPId9_iRp9Jc)61FrF_TU+3cwtdLbz8#;X| z!)srkwXTU|2{xcXKVvphX0xns(^m09k$#VC=aZ9@)VJJa=~E(!XzNll`4ad2`_3BZ zn{eJph%+rHJ8lKzI+l2Y8w9aS8PSuU%h;sg-AzAF8HMBvMeJpaR;Y}lCPg>Q4F^z% zqIi!oTF70v5pS_xwvn!>aG`qt2jlL7!I%6#H(I`ZrgD66`4VErE^ri+{!xCwt@dXk^n6k<@g^lG5P{BCbg(sh>FYNoDc5B8vi z(Z=C|tPF<@YQv4y#MhqJ`8Uh0Ip2JLL~wb3@9F+@%qi~Y0e2j$WR_nto~>*h#?{Z7 z2JYx0HK^~jf1yBhBfpx`G01U$6*5p*xl8j=*P|!5V!tWI7d>d=o!vg$cDtopkG~Q# zvJ7K8o6?%6modHcF_Ri`M%%MQQm#3}{kdY5ldhmBWmPSFXUGh5b>ysjpy~JL?n$%C z4+@WNnwnM~B;!ss^80V(c_$c$&lH(8i01hpc-M`TEMhd%F7&t}dk~|QBeQ>EW9O=X zV1)F>Nc(&R+uj#CW`Yq+JR`w3l%^eY3Ww6uT+a!!IwfsmWf#6qe`0?~VPWe%r@Oti z9n0k1NvGqxP0xAl?W|!K3_GscFDMdbpWGeJmoDEa?>TF`cSnaxbo{kFnmplmw1vZX zll$-}!x0~w@5@|FgAzZ4n)9M}yxZO-f1r5ZSoF4?%TuNaF(py<@AUSKe&$YS6wQsL zY@;_yiQ)fxTH!mRvZ)1y{!*j+euQJ3?aBQSUi_v{o(&ZSR~J?B+u57HFKQfN4`!MB z^6seZ(oqTagASwFVaJO4Ukf~6?ufAX9!_2DY4s9`h7T!{^T^?di@3R4>NY2vz2*&^ zeBRC7z4x?RZ(6ZJ;7YX3hr{P5TyL_Sj4abO?X?$Qe{aC-8hUIkPOv|Dcl2X_hfCf! z%7+W9tq+hKpH~gjwucJ&f2<2im!j|us&Aq`x=RrhLK{X`DzP00DieoRW>cSWKN`JV z>ne#qS>ohSU$B1(ad;U{HS0o8TA=cGc^&&vbGP#LM$B6A3w)UR+w(?>^TW?3WRdv> zSKcY06WZ#hW*?t39z+d_4ur<+pbFt%sg>PZX^A45IstgyDMSA?wBCqTUx_n}D z#)G>f>+`L^^H=H3ez5i2UO!M}VOxItl4y+(PjrO;;iS*(r#W{wMQ}L2y>ay!r-{SO z3kLR&rWGgjcHZ(0c}WbnoLhf=g>X-Y(cO8)0e>8x zd{c*kX<(F+tC~<3N#PQA7-My3c6=<-iVbEft}?EoB|WB{zxqV}%Shm{j;Hfx^Nr!! zvhz$A$>$C=Pp=*8Q$`%l;Sop;-?!Gbncc|7>3F$2#g9u&q5mCvnIn0wDd-lhY+~cZ z{lZ5hSD8ghZNHSW>9?Ptc|C-^z@=Sw8MAPpd#3w*=|mEB)~O|O@+5A-nlwGREA#Ch z>H}2dSEg#`NhUp^2CK$`M|zrmI#d_t&s`VQIFZy>=W`9%1T|~RnH(lgKf2_mb}DH) z>=;g;|Kl#vl&-)*>1)dJgf3mZ`4LoGt0P5fxUlx*0sXYv?Cx7K&Bw1DIm6F>R(b8& z`+E&eZjworN=r8Mp1R^vp1jIZ7vGU9?0tF^Dh~(KV^f{8C;Qg~9_KeXJvMPR($2CJ z-d0l}6~<;Iq*_zFS8JQN*gYl9^Ygc|6Ju$umxf-YRw>5rrt7UC9@@|eb);pVVx}5q z?fkBO!=^phv3a=8*P+m|*}WUh_w3_JaFxyw?Q715Br^ANXU*x{C2cOeRt?BRvMUlkXyW3T#;E+#NdF@FPRJ zE>nzyr8CXPH{RWAdRT5et}9jFC4~~kN8U+A=5MgSd4o=T`Bh=RL2K6F!^Vu%(S@tw zrAeMHM;&%fsQVOVj~tl2at`OO+OjuB$L`BvI%-ME=V02StVIJfh9kure@>TPAKu<9wf2XPPj z_;kKckUe)8%y->9Lapb^^opdL!@Io^3qepr-VEW zmtMcZz4BZ}X+$&{X2#vJ?fTXG`w+(XIAQ)r6Yo?{FgYW8^mt2lzHiVxyl#^hp;8l5 z?RsgxBkPM23&IX9j0*p3mco2ZflcUpz#f)iRgpUmBQJt{=V-3du8CKBq#kvU{fq`z z3mk5XT~>N%d;o`~Hm=HwIz^D`*I!&-Y11Uj{6@53^InFKWkPy>6lQj>Qvfo8c8^BQF`t~oX(BPV-inNb#xC-&~7<$M^|&# zzd0uKIp$!pNC5Ke`1uCAg{TAcUq(|~oK*a~hmxWUkOh=0Q)wT=Ei!@{S@;yWrD&8& zzu?bCvw88CFC+$=t}M$+FjuIZB4)&9K2i)JKmM`za@u7vv#uuEo$2Z4L0qn0!S`|& zzcsR-For2`?~wFA(0+WUSyLQG{vHXws~$TYci-Q0OnZ;RE?EKOg|JE{{~%G^ZEF6J zm!d~?_nbXl#LnKSy=O_KKRVXSus6**v3TF)RgaN!rsLmBGylFDK((}AR|8NUbq#RA;3W*qkHHN* zd&kw|gCX5#Dm zKX6!KiQX6qAFLn2$q(y?@djsfCjt>vcL~2|@x@E%<1rYhPK%O3%EG1L9z>#_3Iaj! zIO7{EVcv7s1%DI8SU zeL)=?gp36oVTg0{h5ss<8|uRC)D-pgbWzH>`baIb9vX#4D(EU}Dd{WdYU%4D6=YHR c8viqg15{lHp@1iDEu=Dl2PP`2XQmJPe*%M9uK)l5 diff --git a/lib/CPUs/MIPS/doc/mips_sys.vsd b/lib/CPUs/MIPS/doc/mips_sys.vsd deleted file mode 100644 index 6c62de1cc6e753bb037a772f9defe822a63850af..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 30720 zcmeHw2|!av^Z2}%lgor#@klsSpke}eUx}!IiVbpzTH62$f+9h{TN^}FJSr+4t<}b( zwjTYAXRTI^xAjvSk6K%`jkh9dB8Vsg?>`%S7Wt&V`m4Qu-+$YAyKl2^cXnrHcXnoI zPa7SttlHvn73!pJz=3MU2Kcq=DJ&DPCNY2;7RY-w!!R|K09gG0=^wNLRfuaRBpwHW zi@-x5G#4NU5o{1_5$q7`5gZU2Aczo<1;7!(3Beh`1;G`8@B<5t@ZAHUF+vlBrU=at zBnVOjPXsRnZv-EN<_IkiS|a!&_#yZsyoJyTApoH@f(${95Qq?j5RA|Up)Eo?g!Tv> z5IQ2Txcr02@~5F11seP(8)?xC(lO733AkdvJ-H#ru*lN*nUe>30_?XwA+#o|dFCv1 z74%pAn{p?wHO*iEq(T;g26`e4g)uM+lB}52{<8jZ6QC(FKH*)G*WdD&U&zos34>wc zL9}(uQIKGrdv6>&88OL3JQ8p{2xjRuO<(!+#qr4=NaW|Yj^7a5e$}IfI6UL>c4|gEqjtMa%Ym`T!Tt~sMQI$ZW zV1_*Z?*6d54>=8sN^r<&z&tKtN}pK-)RTuWE9dS*H*Ss_a#SP8VPOCM{c!8nEe1}V zItAOdZ8O8NWy?Gv2a=iOWa!tg9|UWIgTcdt>=GmqN|M9{rXemVoK?YS`DI2Zx>})v zM#UBr6@yz+v1J%&LE1etH6hIp_EG`-8@Q2l;?WfWv`a9@DJFGP5|br;J87IWN)tCK zA>9u=1Ly|9w3ephaF)Yn0w)XF#uQt+-zhzmxUsfNxOPjp_Di@9_|jkrSG0sHUcz-;!d>gMgzG$3 zGEXdsgoKSy-9t)+dDCIuoDE^#+%Rumm^VMnTVM&3o|W8i);4PaRZRG2-norcRQytx z{XX=5pS_&@p55pwW_Qca8CXKEf%oV<2Kv#T!aZsw18u08a2RGVFdL@heqY$FJ)SC` z(y3FS8#N`vR4Hx=^4Qiv(~c=I^B_f+1M^Z^qwdK*?f$B z@3wQDzvo5-tyeIr9A3sx3bSIcWP9V8Fp!e32<5fo!Z#ntU4kQ(OBHj~Un@2bxWG9? zL%SY}!yJHi1ZtE@`!)p~`JJdwRGU=?Ro|&@^&2s0I%jxfABFOwda|T?(ELg}O;Zhu zN>Gzy4x`V-f1x<5xslx3^+s~cTT#^`=;{%i>ftj5ZNg~CbAWvLr5NhE`pROBAXOD= za+vQeS2dR0**^8{k(oBPdgRfTkH;*qsiOI9X&3_IjsuUJ&;G@hD%+wAE*|21=w}}y zrGTS!1&%--#|1A_hWEn^pAadpxdZUKYooPE6W5OKALc6=G2i>F!;IjuZ5-fnM&B5Y zE6wpNxc-FGk>9=5boc1FONGT2+dxVnmpZi_!~ej^H|WN&J#7QW1xoFftfE}GBLkL8YprvSXCfRny7#=+L_u^0hR3_Npb~VJ9=bfA6J-Put^8o zXYH3BDmY(oMw72EORV6H2pSh-p3&uLK~U!G)l&~RFZp5ZzJ%S0#g-Ytfy&Oh0XnsA zv~HU2T$E=^J#^If)xWFP=x6JX?)%DThm&&i`iW|Z!Pn5qa8Mm)&QZ<}KCJ(K!_K7Z z8=tQ0!^?qThOvfx!!pAchGT})hHD1+N}p)VHqJ1DL1b)b^fz+D4X0zhb;d2mL&o#Q z+eV;Gh5EI6nP~#QkLjy~9RSxiDz9Xl3QQlGHkkI9P7b1cE}8C|7?Y#f+uY4;XM(1t zk>)Ap0`n^KHuJaU3ua-F`I*@`pt(Ea$8=`;F`#B9GSisFOsTLrMOX+{|@+4y}G;2oBVR)7n zq7I@yqANp0>7pFbLeX;0T;Mz#_r#{bynO0Ofq?aNI%-@}dX_U}VP{o|MI{j}3Xcy9Vu}pAhqPXL;^xk4iauqfim$3l4NUIi%9B)T zk%1{`_2IIVCf5~@UAT$|O*sZj`7=}1`v%VbHawG=-Q*2?X zOSo`>4}z-|)Kd!uQ&OA>t-hk}lro`Ltkhzv6s-jPYQ}%62(=9+*cqhT#I#+L5Jf1l!n@v9jppt)n{ceLgAu|e~6gcHHkFKIAj+4LGPV6ssM6kGv zn{!3{OF-vDD4A+pC#H(2exw%L+J)snyrPGO$(WFtIy?nQ;M>Db8rZR8dq!HLh4f%F znHieQgzQvClipe??Vgs#BuSrBP&!tVnV6K4z@%j-rMHG^_v%cD7iFa+WF#@IQ_?a# zy*tVoxg4t3KoDihgT~ay)u@$~ucOkQP_cNKm>lBji0CIkb*XqURqjlei$iaf30qJ@ z!9ElIg*?ftZX#Vz8Nl1i_Nj$Oi)|NnmU8^XoupJZfs>4a=B>Jk2FqG`4)YYYd|&3{ zw|)6r4Fq;MM~Z9r1lRI&)Eo9%B9=OrTOL3AqG75n!v1T;5+q_j?M%r z<3kDgueyZHXJ)@`cUZn7}=8C16LCiT{3OQ0_zDk>`RdETHGX>bEa z&BX?^0O0Aw%MAIF2hAAN)|U%8)cz`)d!@&*uSX_rC3M1ue3Tjm>ZyCyFc3TPEpRWk z^bCf}s5H#&%pPRM@y0^$a&&8 z{5sfFNPK12pZLS~ddeR<^_H&fC3TUYG95)Tu4I=v*AyQ1EVfuIl?-4{40dJhNsC>P zo~oG#x5}DAC^;Uua{$i_j@c5y@fU#^d#TZN%i#;ubwiQpj1M7t=%7}N+Z;mm(D~Zu zC&*kL^ZW$yb^cWG2|pRc14Kt~J>De;2+$J*)mNc6HI4s(qUYj+vzX7+93cR^8#)S_ zx(E}w5+|FbiDGy_aX-N(yrW&+K`Iptlz8%m!YkdVF`Puncfv+uNR;MEoT&AVRg@>+ z)@hdq7lF6Sy^)hp;!+~M3NcgMA5b=wzwIs$yIt-P1(LSSEsF4fuD+3H?0l|LyFBpU zuUsuQ&L6idwi&3>FT@9p__u_|Lfg#n7-#M8o>yVUz~=KhidrVEc_r5E9t9*mBs%qNogJ zs4Mi4cGXGOAf2)qc$vOPg|}}rD{z}MKgf?e92Nxg@`Idu$!7&F^#DPBkk_Z;S%LmH z`eH@UB7AfLy9fC}Az+^$)CU|g^Mj(Uz^uT*Aj%KgmFR~JMu1~}Q0CaOZR-R2( zCUuWJn5^8LtlXNc+>oq{U7f64maJTutelN6xyj0j$;!-R&2dB*Vf$bC*of5d}{d)f{Un-RRK%^jNO z9Eg`Uv}YbGl#!pGE6Qd%xhs`l;mORLxLKl5o;H`OQOz+cX2o1v5Gyb#`j3*08<6ik zHFmr6y4kS@oeN{DPc;yqmhvAD2MQGz6t}!$nCd9!UW3(;_K9~O9wYhR2?xt43TDN1 z*DQ$Z9pAo1s^-H+adTkcviP3M;^oWY-)-Wf6u_+E!1sz@>pQ+p>mPYnEBd*@Fjde~ z#qK#V5j-YY&KrHX=gJPvmk+p6&WrCQ_puw!i>GW-)uT*$`1swc=FrjEX}z=~vp$0C z4S5;yc^MIT86EO6xT`;t=U;)Q@fvWw{-g&J8QZ|OU+>6hT|l58q<$t(r`o)K&JOTK z6%>0hv-gpV_$!p)$FZgT7uhD*fnUCy?lL%w>Zew}Tehb|^SlXBZc1f@eQxYeNy@v6 zVt*RCI&$DN*r=ZD*>!rpcj)x(&Oap`bY3)Yda1g}X{pdQ@!MREpIv$8#azlYb(5E- zjRr!8s%ALp2Fx6t+DTWSS*6*$ZB!Qb-z0pgT7CUV&z@1X(LJM>?)_|gXwtJYC7QIf zq|CiqqxPycw{#+>%iyz8#{%zy4$W`8Hy@f6G*;%s?U@rxU0D7#Ox?Co zf-N8FHs~TK&H)_^{?cyJv0cqaAKT@3YEb9g9KN30)%BFfl%dbncZ7Dz8|4GS zx^L9))k}@~tNMy8yZCMcxk7`7!8Uki?u00QSHpsVgTGv>R*r4ycXOuUqrJuIgR=y- ziTvHyI1c5RN3Z>Cuo$9@;9}%eOwmlz#2HhKlZ+K-gbR#oj1d%fxACOWC3ANXG#|aY zs7Y1arRZ_4qmLFfAHDKu(Yso%XryV1$sw>q?9A>_G3!lVn@*WZC-Uenk+d>u(SmJ9 ziYR_D%eVmIN-f~ZCi5^Do6!nA>vE zg5kjqEvl6v0}4xiRCu`myeLZ2$Q_0Uw{0=;dSlo8>*38eOiOR!>DE+U<+Q}R(wSc< zt#r;^9zaz&9rRw^lJEVEKPX@Y_)^njER7TN9Qc{Ka&yrqJZj&Ua@6yvYO$Q^n*eTs zbYpo>hWbLDvqF5(t@8B5>yzEQCGERf7M&FL?K~$`Jo`Om+Cxr=TYPw8{~ttmMU}Sl zMT;Jci+fNuvANh;shl2PSW+Y|zu%^dRN>Z85zsT{ndj5=j3@~VlZ=(*OO{E#knEG3 zmRyrq9=Q$ePkA2;;i19Dw22seT>Tv!hI|SemApiUEg}4}?oY-HYV0JIDU!RJio_o_RpiZH)hjorZSmSjj~ zahG>0&ZPE_$&GslVhYB^p2^Igb~YO-{&p2x7t<7M)xQ07VF$raSREWdBVerP;!6`T@XX(~7mhxuiq z*r#}CZD=9x*+MLDA#Sp1zo5_7gZxe4+Z*m5XnppP$HU@&?Y*8V+;}GrojlOe7Dg|- za{s_eS65&D!m_)t*oIvHZHgUCdF@ZPbTFTFgeGSs<<1{%glw@iUM!6eOFPUKOS#LX z`C)jsd17&`{^6T;ZTf}S_Ux&R3W)074^o#)OYR?N)5WIpDmk$hCVL&JgfL2w)Iv)w za zLpPdseHP-wv}3}Vc}yDf{=>*itqYm8%txc_zp1eQp5fkMD$1wcPI3@QM1i6n0_n5Z zSkZ921P9N3U$QsM;A87QsZ&WlB5EL9_+dDm5k(8O7Ff^&R>>XLoD4Ev(qP#%1 zO14c_K6o>nliie+%WM>l6#)u`qQ3%$D#j>gDn3%2{p@03(K-FX{6mWKirejTD`N*{ zfiedwW9=hWCS-JXTkYG|O&=Z#C;Mk~k61mXI6^;Xhkjws8rW30>DpBNk*oTJU#yw? z`B#Oob;Cu~>|q~gZJfwgH&pwpp^G|K9k0$*_cbh0uT$?jz-#bLMT1jnle(h3;wV=G zZW>=r4?#q6lxCP_tY!g4iMS;*4=&ZL*C-9AG$su^)Nr(}+Lqc7k7HZN-as#z+8|3i zUAxk0=J73#Gmqzdg*(G#?Ew=MI2Cjo-MBjZM@@QawkFfo)IlyE->$=zpf=*31p^9F z3bg*B{DNf#Ulf34}a!NUTM&Q;e^*HH(3b?@plx~aNC-G=sgS9Z3Meo?YdcUpJ5 z{o^m+e%AK!mtY?;`gF$-XWF-~vnV|D*cQm>-kW}}Z*S52y}l@!!r52~3s=7{TEFUx zlJ%Tff*qxLTR5+uet5~b&n{91XG3#Cdqd6?!#jpihH%LO!y3cx{^EnXcZCmhNxh?PpXb+*`cZIj7P!_7Jam^U?;*M;r4KoVd5? zJTI!yxYpQB!fm-n2KFt@$8X3SOcGPzPlp|QnYeML!mHwRlY5Jmw=V`1p9S|;7tR!( z$@5!-@E~BNVnfwWt>`Na-RC*!?(}5FB&6AfMfO%jb~i_xlgtxmJMP}?ctq0Xg5+V` z`@Iq$E1pRlWH}O9$CMqtddddKQe?Tqo#8ee8b!E^qc|eFAS;r=Gns=zqG)q*M)wd! zjH2)=V|L(z(tYUMOS;TlU5X|&q z;+Rxs67vDGdRbV;m92|3xnDD zf$ypT2fO%j;OLAAv?jMjVfwU%t6S>UuL4bORAJE4@zVw_3wkFfpqjF)q_~YeoF&aA z?Ilwr%6BBA9GASGD_JC2zt=fj3xl<3T7AR^TAg-__K^0x7H(^wYV8V|7RU;^7ep7V zE{Far^^YcOeZOFS!RnbiLU+u79ihkOx^D@hu57(N=Zb-|1gd*CTs~o|{LuJq1$3bC zGYTeb9dfA4vD|Hm|DL1^9rTe7HtP23j5=3+sg9?=Z}ii_Y zH?6OBWFOacQTk!}v0n%$kGc8Ld7sD+*N$$c;C{8f>5(;tlY01BZ_(2R7efm}2SXnN zTD^wlKeS}#HF6@h_0=;!{Qk3J)0HXL~9?_+|6DXt4Sqg`7aY~=K%GcrBKrNT zJjb@}MZHB||7)aZiUz zmos^L%)+EIGY55;ZzguzIr2O(*{*K$ctg9$+`O;l`!fHXDgH)#QG0JS%z@ZSFXdq`-%Y?ovgNqNf6WK0SR$t7-FgXcSWwjlv2K?C|*H0PS{=!~LYgYS^IIqxcpr zrF_*GqnpZCB|Z3Hz!sG%K{c^|qw%4Fc0RLJjt9W)xYK^h?f42+q3)pWqrO(@k*0oMJ%7k9c?;h3FY#uODRvH1 zD&xO?Z}9cA>Zg-V!yR>n+FsL4BiDpz1iEAmbkvF6?5;F%2`*W!*{+Fje=_|`wcGSB zW1lPj<6Xb~dY)V34^Z(Rumu(W9i^<|uP@>3V2+hQ!06zTyQM*;A(_R@AS~~9<2)|! zQrg5;yvO;ZKh+);|7DXs=#ARFTKJbvr!Uoh1cM(0>)$Fk6ws@2@7;~#45@}mJ3Y6? zQjfA93Ds4ZmS{Y!IGklAU|qiSjZ+8{-PmK;sDGWaB*JO5;|eRMFep z@jK%!qsP_8RYs8sma8V2lFoXax!x!UVT9>4rI>fAy!W~b_ATy2#d!Ak#&pqi&-C8l zCidoLW{{h;d!~Om*qmm5-#p*E+MKi9eAN7d`L4Or+<=iXbj}(1l3`CnLYNrl=AX&A~yOhd*y{e|Zr#z!4`N~zVyO77-~$1}j9@8^OCGjcBTd)ZR;_Vp(enorRJdkDVEs)AxWjMT8W02~LVC(O02hD*|N zs}-9Vv6&l^YG{q$mJu_yghD@xir*6L)r=G$ulD;HYW#i}f`G9w{N<3xiLNqZgq95~ zvupEAIIJm#Y_+1O^rraaG==VME;Ebzif)xrY9T#T_;XdHB&zp-Yx2pWwYZ9Hj*D)T zV|0hOym3ymfvpakzx>K5o9w@OEBHM7lH{Wd8(^_)#v3$YjQ(Cz)Fh-OjnJAen z`9!i=a!~S}1a3*5NNi1E{eAm zRY)mwbibHBQsoq=H(c9RH628cw9f7k?h`o0PBObo^uI!Uh4W57`M6#3AZK^gxp zlt<1CN-vbpz&J1_Dk)2oHpc2bf?&CPSO${{kqN_-qEi(UlOQ4~+lD$ESRR!$d{-d! zPS0S*WJjlIvZ03{AuH?Kz(@tB@3R>CR#{{M1#wJLswqhtk($n=CP7pZg-DT56Y0dH zbS679H7OIntD0cT(U+#Mt?BQ;^;v zX%vi2t;(Vysn3{E8NdX~DF{V9Xjl4M=-q$_O+_hGegO6yX$NUWcI!uuLILrB5D(_< zp(D{VahTUS2nwO!Q_E?7@ILBWVVf@9IH&o6a%lSjfcv;0Xz$?B20A);nA<^MMzu|Q z2>!WiqaZnS?B@{#Q^J3;32Fz?DL>m($?Z@;`b7k^VQO~c?4%u|iY?I-pnK+O_n4~G zO|HRkkP3#_eS5{b_lm#VE8eRP2 z+Fo#!s_I!(f+qM^%WF9WbeV;Vi!~0tqopXC_O~BxvZw5zbz^Ag03FavlyduBZ$A;l-B#WD45L6eKdXhNLoJ2mNb|O<{=wlMgG>~t>sI1AMD6iJ= zsBF>Y<)UKCDX_nfONTy*{U~g|q^$3#TV-ZEd^k+WF&h~ExJ)eixyttmbIHZKV$pS_ zukm=VhRP0fn+B7Q|5#c2q^LxmFbL^m-6+xFb|S74Iuu(llFI$|qw{kyR$-cOQ31Ch zXwO1gMI|i9=o1XqXn~k7FNve6>SBv$vBl$aFlC>tL_N)t$3@v-ARcZMJV-+^XtEQ2 zi1skR8Z0Y{Eln%NL6=Fe2AzDN8;UJHw;vTTU|(#JhTMKs#=t`AAUc$)Bra8cJ7I1i zhvM0xU-K5mYK?=m5ph+Jd=SEmEsb}AIx?&=Y&r<>W=mBNCFY*yQVqPZ?KHDRF%I(1 zV%sx(v834YZ%V9=`3T)(eDT_1%Z{Go;L#+puDOfziG4ePE9OuJowz+lpmn|d=&?@h zL_%!-u?aglGQ zgg@%kNs)mrV?8Rcc%A?#5isS1%o9;aBoI89O>D72`szY)n2S)nxd730W8n6%b9rM6zD|N*dtzWL#?_ zJO$Z9aFjLLy(Z=ak6g&dHn zRIdTOd&Nc9w6)fg>WJQN_YLVD-Rt=`wdda*>&V_%I0$D4vE@TbHBM{o;A&|A6k3crd zPoKY&ITJ#WZ~9l52ak_`4dv%z6`7p^G4F|;O~BvS zB#gqW`Cy!{F1I6K7jEe7#dT(z~ zVO>v*MNfcnsQjj5{A*1j!&)cs{GF@-dEbnM?I>0)uuT5ig6*EovC8@v7C5~1H}aPo zq)g^Yq_K9N9_=z|#^3KxZpFpSC$UtOH_fY8AIn74CyT>6A z#h;D*N8W$$oNB9lY+r;&-=sXT{noecq@Hb4du&pUL-0XJLl}beC3{r{=0v{6Lb9-v zO|p>v7TMrMKmU`=k-dyf?Dw_DCjI~3eT40oS4;kD?+c`!ZBu*f+Vft9FUxUaD>3i! zeBLW4rEmqMdqMkOn>X7(S&!GHDZ!(5V*4WXWRGlxFdtvKV&@w%PsSXN6D)T{{E~(9 zF(+mAJ6^4IAbqg)1h?AdKMGGGM+DE+m=iqbQ>z6ls0o6Nn3FP#!>{34cklkE@KFau zl<-kE%vnC_%uxzEbN(KD6o7aUJ_^U2<)d&;SHv$_7=Sq`{}%eNZ3s{O5qw1OBz#2h zWcet7vs%y@_vLWRNtwmr{~{k{;h9AEXaeReAC2WJg=6`D4?apkya*pn!<^-#Y5cB; zU$QU-b5i~-^kLilQG7)3Bz#2hWcetCzgjSsKS3}Jb5dq;_`k?UVq93lM{bz2eB>-t z3Y~?24?f}{UWAXN2rM5-gtNyak%i~fORUP}Q11@|zIKr)ZT z1AqTt-Lr7Zev#O|-t?T?z1QguaG=cvf*&uo>kqx59va->c6Tt7x`FqF)(GQ7i5dDyqjc|@X;upmaz?_tS z3(v7_{wUcXcoKdhc(Sq)z?sKGeVZ4KIVrO^V6(raY$W0)NMwW9eOTE@#53ctkbr`l zh-U|Rf7Lu{-^0lo`=X4q`)6Hw$0d4^*uKbq__}-RubqW#zqQx8Hjbp8ZBu(}QfAK$ zqEivsAUYK*8_vQ2zO(S}Asa+jA+kYq6;?K+LVv_BiqFHGl-W6w`TFAASemf)`00yv zAm!Jk0a>rwiS3uvv*#PZlkgM4la&pga2^kJKb{nGQf9xyX7%D(myc?X&3;enUUv?^ z#z(B}+G;;UTbb2nA6VP60i}pi=C>yjNB22Jl@u)qI+I&aW*cZQL>F`(1=^o+{ zg>$mn+U3`kmD)0g-M;9T)U)z#JqvLl>sg37 z!4uCvtL+KTLbN~4d$FFi<)kj2b!Fq9!bil$oR9NfiMjkaAFZGQY*tWz4?ZF`X2M6r zc1z@+&}Sp%hxkR=%*ULRSswW{`mk*XPyG>mMDQfG0)pqf=X^AunrF3zZ^WFGSsZ>1 z&$@hs-MvWc_oVK1=kQz34Wd(#HMaWFp6{{fJF`V!8bXu}`qB{od-hnXPKC6z>Qv8V z1NAAi0|mU`xxaFcwdyK}pH)|R&U2`rSnX7(tDvpwKY7j?{J7ed_N|0BJyt46Q9ewROn}edZG;vb5dsU!Ku8YpRn}=&%aWR4kKbj zj;wz6=W>L8bzAhaBShJtpB>@9M~`2DdB{}lb}Jgx`vgkGNX?TYv%3r}E9%D;u@*f!YJAEJK|JPAJ$JXv4J3GQma56DZmFehae2jscG<+)*% z4U}uEY&<_VP!?=aHV~q0P&N?$d(I6a8{}?6WP`n%{J;&c`GNcQxSJ53Bl|JoIreUH zi|dE@McJIdoRohH&#`U(NZBB=OYmgxCMUS_tTKEHb5dq;_%+!eQN}I^B#{_PQpPTU zLkX?>xSjQqfjxjdz13lx4GswvSjXOBNZSB>AvsOa)^8}9L}sGkLM67W@f6my!~e7_ z*7|UGuZ+8_`QqiCX=~3G{O=moj7%`8>67h|B4FbuZJJ^dA}@vFTcMEKQ@xDK74BGYw&xuwA9Rq#gk~HKKNhzsvCh<^E-Y&ZU1#6$m;9=&t6Y9va1H4 zH@BX3BeLq7@Bel^>qb)5*Z-fro@|8En_kblkxBK<_kX*dbt8)E>z`fEm(S$iy1#R4 zovHsB{qype?B4p+7Fg&)+K>ukyCOJZAlJ`Df9R^?=sk_2y)wuIKXQ zdH;UdsOv?num3ki%U5~)ULNzWrzPu!d(*V6>pgpU-oKxgb-iBo_5Y@5`6>_9%VYla zv}C~My*)3_`}fnbu9v31{@)-i|HGs5@|b@ITGn_u-aIW|_D;M!?>9lqm%R%0 z_0OJFtWEa!=D+;^7hm`Pd{{HG7sgMb@8L!IE%*=*1o_L5Ho!Wx6a&e z)o((>ko>}YyWc)d7yFW@o~)fl*@XwJEuse7u}4lPcs`iKA@=h%3=Ll|iSD)8=YME7 zVC1Z1?}uKtZ4>1iO-FgUjJM*7EGqABj2C2wU!EWj>4mMoqhC)RlVCLG3-~%aGA)P@3ceU}P+yeiHlKdf4>9&k zylw6GWs`|eo{@qgZskW}8iaJDw$#KAPWy;hT=S&oO5=&+_=hWU|& z+)r;z4w-$dSACM%#R(>mcW9JJ-Uw)en^+niM&Axx(Yw zF=#KpK4s|*jU*f_m|P<$CX z7hUXK$1D&2#??y4OnsAZs^?_I8)B%xO2&D{nHs3ksF(6#Ov)|w=mme+p_5-SUx|;< z+hlF=4cEY@&ad=h4@$E>;#Ze@6*NDr^<3er9-Ud4+KiZ0M+;YSN`8VtiZ}hE6~*jW zjN*Ja@mKng;Gqi!!(II%4T0Hjf;^XuH#(;mQ$ms&dgC_FIb}^RGLd%PV)HQ14%&C9 z1~{#Djva|&S$I*`V3Z82uRODKvih)-J@)aA5NFJB-yY^|!`Jea^xoq1N}C-PqZQnI zBduof0YEC@Yi;hwGkKr$Uo+iIi&@uE-Ip*pTMljeSWd4z*aL0*T0yUTs|p-f`qmw^ zUucE4eY0deEALl#u*hnYOT{ODV=2pq?NKHWO!h2d;#J(b6=osqrL!`iEMJ@R$cGbM!LQ)Ajmc z=ZDVcn~VvG5pv}3YYn~>7+JG@lh`A6?hE2fz1ErndaVI_O-5?|wp*?>@rfXzOhTrw zlRexuQYOjs{R3f09>?+L_g}#ce|2;4g>@mBn*`IVo<+!ZoS%~Lw8TayN%1lWIt_9o zxfue?rFG)(y>kpz_QD>2AW@(gTfBkBm~r;CK3_)(JLxq~Juaz~wvuzlzKuI{MR8O` zVAAq9bv(A!Z|-CCx_snnv=cT|`yt0W^+G)V{*DN?-Cp7QedNsGiekxR0bIov+ll( zin9F5{GfVEan)uM(ts2JnikEZR9od;jFih7%oJ`RZ_3U-(va_ z3Mo<+kr^hY^q+GN&!Bs;RF_jU>EAS2I~o{OszZJCjGi~FYg#hbXFJCSvBvfdm<=61 zL$t)cwKRNyw4T4^=v$MXIOHXG4o1GSF)<+XsS{h*u0Srl0uyjCS zAQu@=q(YIjx&o5%6p|;|9!~))jscluZ-l2>0$@#o0>*eBDk!J!L)A3e6NS?hf+89u zP#g~58-PU!PzA@JMhcWxybK{A>9>D06MqylP#fqVbk9Qy6woF(P@t9&n*W9nYbdC} zlcw@-C;!$#GxNJ3{-Ht@N5#34oc`4H$1?urNBuAV-|j;IeFI%6Tv742b9<}#t=SL- zp~)Hkt!8g|f6k&I=>MIi4S!Fn;3#-nKmc8J11+qwxE9{k3r{83ZcNnL<@{#*v{&1fYZa-G?LKfEmGo>P)eOAW$?z|9m5nNGPrSLHpf< z$jHb-|J}f?{}=TidLS^UtSoA;p%4fttfzkLwE6#Sp9+{qU>Zpx;AkjH z77Ua$+?sX;bD}_z(hxwIVo%E?kP0RN&Rq*naB}`Vq-{KHjwT8Lu;7s;*eesAT)_l{ z07g{2n<FA30!JU^4rndvgWz;Zo-Ku;~lM z_X1*Xn^hZ4C6$9?ZUdJr-LBM-`T|!+v0tui{n{#M`81tM=^Axf92;#IdmA!rPYRqlv(YlOy?E~G)4|80@0K&$ zqOx2H(#^B`l7lyxDw0r~c^g+FO*^yk8shiue0CErWnIYXUS85DO*Snx&u^dPNRqD@ zeatex%&c*FXsc=F_Zwa_?C4C|@lZ%;`gLZM54e zN4jP^N!lS9_4xr{a;uizOgdmLF_yb743+=-jg-=z549KU#rnivhuPTW4di&(q`!RJ z&AI(m;WjFdF-9ZS)QvpkiJ$6PUvE$=kdW$&tLfq%w)r(-V=tRqvC&v2UELxmq^OF$ zE4ohgR1PyGY%ARf$XMBJj?Bopm$>Py>ZS9vJH}QDYZxbK8Z(oX^FDWj@HHs{qn)idg^tr1$>F`TQpS~Zpdk<-{tFSOr2He^52n5Q{r7C--0r} zDTAb+xb!YK(EkSWCmXKXk=$eU`iB-5y2An-E;T}LHCSS5Q}*kBVf8-}*(UIKOuXD@ z% z@n$@(C5_}{@8pAnyk)$KJ^gOMFIvmfmbdi!O!_ZLrHQwt_H$WvUbs2*O5dthiB2Z2 zFTcUyQQOX0mXc?I9^>bDB|_EO>8aHD#!}U+)3XMAh6V5HEnOsfiymq#UU)g?QA~e9 z(CJ-?34_klmDT;rg&9HoIp2R}uv5aYRWAH?Sm|j~{+!stg^*S~Hs0fT7;t#qXZq@0=%#lo5Sm zOV{*^_2<)*AKCqVf1+Bt*j{GFkDb1uIJ=|wCXQovf;?8%J(_eA z_yeQI4t=sPhb!!hit%ssrkg^%mb>H4sQgjWFLTQK_R$OPg0C^#@F|opj`!s!53qzu zQ6BUYF=igF3la` zYpj;v8}D*s#uv{Piq!~zHm^+{#A$CuFevtzHT5Vr?O@kaLb`6>(K5X5t1YA@-=%hM>b-}(Kea32a&US9)mnIt$a&$m*Wa*S3yYVxsZx8n{$#-Kj zBepDJa6=@Jx%%Pe?0jp-oqh+)GL}TCj5_DF>Eut;oEXgCOva_X7}UjF_uO?G`FVb5{!4$)qfvp z{+_;rsgBj-2zA%C6o&7I)~(7F>-_yZR#;Sc*Zdo=*>YBXR9BgR8bF{6hiZ&MF-N54 zPTsC~8)&CvXvcXYu$IWWE8`R@H*p{^fH{o9UT6p5LEe3~?%~Y!Wa&6>e;C1ME143S z{I+d!QTsbWx!uz`QRTj@?a!F+_bj4bFxC>~{lvV>pl4-O)x;&|Zp8BXtxtTM5|$a$ zea?FRO(eIrT~eTv{52kpU?+bhYzwP1y}m&oCc-HB6pAXs-AP1XRDRs_K-Yx9+G{Hs8y`n`Pe> zx>-WU zl_TC95YWDo_%o^2<43qd`S-==HJ_%$C< z-kiIffZm3yHt}Pwroy2gwX~a&kd0g z&fK{BVHa(xZB4k7!Vzm6eH;Nlcfxd?4lffg3_tXjUbJeOJiwZ+w^ET+Up?`8Nr=km zi68!{6tSC)bN4anW}_z7jlKVVuvphZIoaXzfqRB=1J3IS(xW6jC6>N{YD)o}Thyaq zkFwzWcSY<8qh2Ogq6$x)fJgDE@D{S|zG02tPW@tjKf$S(ji-eeN$rrJhN^zi6mWq$ zRaa>ruru-)dow)3z=)^UjQfzL{j^vi;i>(ujjFAXPN-s+ZH&%A|+*Cn?(}Yl~|b05-punI{KS5Ak_x@8D}iy?$+I>2G^Cm0%xx*Vj=q zH>QtxW-zTiJ7HCX$}_YTTI`)fu8Cq=S}=sS}L}`q~{&Fe0=04)pO5u?Gbsrbrq)K+%RZ}s1)e$DoYBTiG@2+?` z#A~hRJeXa0?b@(up*yn?&&jasv$U-c^h2gs5MNO0wU8a=%zHt?FpK*`J{i?o>@}TP zW*N1R_f&rML%POG#oAOw1^ae+^+0(Csh^LYiFh!xta6k$9NYM1N>U!>7@NxL@owyx zcW{vnvq^dVkX2S#+~Li3nNom=a8qjinE=v7&!&+k&X7?}h1n2(>zgw|ys_Hnh^IHV zhx=7uT=}6e7pkcf)nqT*HuvU1)rtwa-tEmd_fAnR~CW z4rny1-oFtFi)`+lgUx#mx#KRD(kXq><7ChtSK$ebWa64I1p=Cw#UCHzN>!D_w#yw@ zK-gwi*+SIQ(G`Z#JT}~cuu%71{p@~GmtK-fn0wIJop@+y<0P*+H!9nw@KXH|$IClA z9MxfZxr%zWM@sI_$Z_`uH5on-)_fwZRAJN5{najaG;!mV-lYNUeT#jXhYb&DP8^*q z2{>`NQPEyc~L+Xd?dQCn^U1nD|538&{ z$#+v7YeGLJ5rYj#ecGXYhdYSj7mUScJmAZLLdnHTpRtK6^o}^;wQ*PCRYSdnH;I_+ zMQKz@JrKVW(d9c(6V$)Y5>lC?_1auNi#wTxiK88*|7` zn|Wk2#oZX~bvn3W?43=c3)}ni$3o3sy>MxLZ6!Kabv|7EV!Qd4=StO1XK$H(&CI^= z&7(Kg_T8od0{;uC{o^4OM7|t6?eSz0O#>aMrZb5`{R6jwqNQY!qTq8l_&*DkKq9Jv z5SoaZ90CTzz+ngw0g-_tkm4}7FbpOPvgwi>{tpgg0@W2S;zn?%*id{aHg2xcFvOqw zNn{ZX@Hv|XzDY~L;801ZGnMKt2LKdjJCcu-10G~l_M|$4d>8OUis)ZZmJb>42tp@t zBn0-?3o0ukgOq_fLVwfXXaoqi(OyvEpEOw+1PCSlFAa{OK`#HI$zc9NgTde+-1l!j z)PMNkXcQRdfAL{Z|FMgZ20i-^AN)UjaE$bSXb99l^-;+<5R@Q;f1yDEBZ40uj0+S* zKS?0KNJA;00G8-Tg6<&}ATpx{wUkGKFcb`pM4)8VWK~o&)RF24w3?cXtOiO}U0oI? eqxgSwSkqun3Kd7D?rnxF3Ly;<6jayOfc!t1uQ?z9 diff --git a/lib/CPUs/MIPS/doc/toolchain/howto_build.txt b/lib/CPUs/MIPS/doc/toolchain/howto_build.txt deleted file mode 100644 index 270be3b..0000000 --- a/lib/CPUs/MIPS/doc/toolchain/howto_build.txt +++ /dev/null @@ -1,46 +0,0 @@ -# --------------------------------------------------------------- -# 1. Binutils bauen und installieren -# --------------------------------------------------------------- -> tar -xzf binutils-2.19.tar.gz -> mkdir binutils-2.19_build -> cd binutils-2.19_build - -> ../binutils-2.19/configure --target=mipsel-elf --prefix=/usr/local -> make -> make install - -# --------------------------------------------------------------- -# 2. GCC bootstrapping -# --------------------------------------------------------------- -> tar -xzf gcc-4.3.2.tar.gz -> mkdir gcc-4.3.2_build -> cd gcc-4.3.2_build -> ../gcc-4.3.2/configure --target=mipsel-elf --prefix=/usr/local --enable-languages="c,c++" --without-headers --with-newlib --with-float=soft --disable-multilib -> CFLAGS_FOR_TARGET="-mno-gpopt" make all-gcc -> make info-gcc -> make install-gcc - -# --------------------------------------------------------------- -# 3. Newlib bauen und installieren -# --------------------------------------------------------------- -> tar -xzf newlib-1.16.0.tar.gz -! Bug in newlib-1.16.0/newlib/libc/machine/mips/strlen.c. - Newlib von Hand patchen (32-bit MIPS targets): - "lbu $3,0($4)\n" - "nop\n" <= nop einfügen - "bnez $3,1b\n" - -> mkdir newlib-1.16.0_build -> cd newlib-1.16.0_build -> ../newlib-1.16.0/configure --target=mipsel-elf --prefix=/usr/local --with-float=soft --disable-multilib -> TARGET_CFLAGS="-mno-gpopt" make all -> make install - -# --------------------------------------------------------------- -# 4. GCC bauen und installieren -# --------------------------------------------------------------- -> cd gcc-4.3.2_build -> ../gcc-4.3.2/configure --target=mipsel-elf --prefix=/usr/local --enable-languages="c,c++" --disable-shared --with-newlib --with-float=soft --disable-multilib -> CFLAGS_FOR_TARGET="-mno-gpopt" make all -> make info -> make install diff --git a/lib/CPUs/MIPS/doc/toolchain/make.sh b/lib/CPUs/MIPS/doc/toolchain/make.sh deleted file mode 100644 index 1568da9..0000000 --- a/lib/CPUs/MIPS/doc/toolchain/make.sh +++ /dev/null @@ -1,151 +0,0 @@ -#!/bin/sh -TARGET=mipsel-elf -PREFIX=/usr/local - -SRC_BINUTILS=binutils-2.19 -SRC_GCC=gcc-4.3.3 -SRC_NEWLIB=newlib-1.16.0 -SRC_GMP=gmp-4.2.4 -SRC_MPFR=mpfr-2.4.0 - -# --------------------------------------------------------------- -# 1. Binutils bauen und installieren -# --------------------------------------------------------------- -if [ ! -e $SRC_BINUTILS.tar.bz2 ]; then - echo Downloading $SRC_BINUTILS - wget ftp://ftp-stud.fht-esslingen.de/pub/Mirrors/ftp.gnu.org/binutils/$SRC_BINUTILS.tar.bz2 || exit 1 -else - echo Skipped downloading $SRC_BINUTILS -fi - -if [ ! -e ./$SRC_BINUTILS ]; then - echo Unpacking $SRC_BINUTILS - tar -xjf $SRC_BINUTILS.tar.bz2 || exit 1 -else - echo Skipped unpacking $SRC_BINUTILS -fi - -if [ ! -e ./$SRC_BINUTILS-build ]; then - echo Building $SRC_BINUTILS - mkdir -p $SRC_BINUTILS-build - cd $SRC_BINUTILS-build - ../$SRC_BINUTILS/configure --target=$TARGET --prefix=$PREFIX || exit 1 - make || exit 1 - make install || exit 1 - cd .. -else - echo $SRC_BINUTILS is already built. -fi - -# --------------------------------------------------------------- -# 2. GMP bauen und installieren -# --------------------------------------------------------------- -if [ ! -e $SRC_GMP.tar.bz2 ]; then - echo Downloading $SRC_GMP - wget http://ftp.sunet.se/pub/gnu/gmp/$SRC_GMP.tar.bz2 || exit 1 -else - echo Skipped downloading $SRC_GMP -fi - -if [ ! -e ./$SRC_GMP ]; then - echo Unpacking $SRC_GMP - tar -xjf $SRC_GMP.tar.bz2 || exit 1 -else - echo Skipped unpacking $SRC_GMP -fi - -if [ ! -e ./$SRC_GMP-build ]; then - echo Building $SRC_GMP - mkdir -p $SRC_GMP-build - cd $SRC_GMP-build - ../$SRC_GMP/configure --prefix=$PREFIX || exit 1 - make || exit 1 - make check || exit 1 - make install || exit 1 - cd .. -else - echo $SRC_GMP is already built. -fi - -# --------------------------------------------------------------- -# 3. MPFR bauen und installieren -# --------------------------------------------------------------- -if [ ! -e $SRC_MPFR.tar.bz2 ]; then - echo Downloading $SRC_MPFR - wget http://www.mpfr.org/mpfr-current/$SRC_MPFR.tar.bz2 || exit 1 -else - echo Skipped downloading $SRC_MPFR -fi - -if [ ! -e ./$SRC_MPFR ]; then - echo Unpacking $SRC_MPFR - tar -xjf $SRC_MPFR.tar.bz2 || exit 1 -else - echo Skipped unpacking $SRC_MPFR -fi - -if [ ! -e ./$SRC_MPFR-build ]; then - echo Building $SRC_MPFR - mkdir -p $SRC_MPFR-build - cd $SRC_MPFR-build - ../$SRC_MPFR/configure --prefix=$PREFIX || exit 1 - make || exit 1 - make check || exit 1 - make install || exit 1 - cd .. -else - echo $SRC_MPFR is already built. -fi - -# --------------------------------------------------------------- -# 4. GCC & newlib bauen und installieren -# --------------------------------------------------------------- -if [ ! -e $SRC_NEWLIB.tar.gz ]; then - echo Downloading $SRC_NEWLIB - wget ftp://sources.redhat.com/pub/newlib/$SRC_NEWLIB.tar.gz || exit 1 -else - echo Skipped downloading $SRC_NEWLIB -fi - -if [ ! -e ./$SRC_NEWLIB ]; then - echo Unpacking $SRC_NEWLIB - tar -xzf $SRC_NEWLIB.tar.gz || exit 1 - if [ -e $SRC_NEWLIB-jens.patch ]; then - echo Patching $SRC_NEWLIB - patch -p0 < $SRC_NEWLIB-jens.patch || exit 1 - fi -else - echo Skipped unpacking $SRC_NEWLIB -fi - -if [ ! -e $SRC_GCC.tar.bz2 ]; then - echo Downloading $SRC_GCC - wget ftp://ftp-stud.fht-esslingen.de/pub/Mirrors/ftp.gnu.org/gcc/$SRC_GCC/$SRC_GCC.tar.bz2 || exit 1 -else - echo Skipped downloading $SRC_GCC -fi - -if [ ! -e ./$SRC_GCC ]; then - echo Unpacking $SRC_GCC - tar -xjf $SRC_GCC.tar.bz2 || exit 1 - cd ./$SRC_GCC - ln -sf ../$SRC_NEWLIB/newlib/ . - cd .. -else - echo Skipped unpacking $SRC_GCC -fi - -if [ ! -e ./$SRC_GCC-build ]; then - echo Building $SRC_GCC - mkdir -p $SRC_GCC-build - cd $SRC_GCC-build - ../$SRC_GCC/configure --target=$TARGET --prefix=$PREFIX --with-float=soft --with-newlib --verbose --enable-languages="c,c++" || exit 1 - LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$PREFIX/lib make all || exit 1 - make info || exit 1 - make install || exit 1 - cd .. - echo $PREFIX/lib >/etc/ld.so.conf.d/local.conf - ldconfig -else - echo $SRC_GCC is already built. -fi diff --git a/lib/CPUs/MIPS/doc/toolchain/newlib-1.16.0-jens.patch b/lib/CPUs/MIPS/doc/toolchain/newlib-1.16.0-jens.patch deleted file mode 100644 index bf61a14..0000000 --- a/lib/CPUs/MIPS/doc/toolchain/newlib-1.16.0-jens.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -Naur newlib-1.16.0/newlib/libc/machine/mips/strlen.c newlib-1.16.0-fixed/newlib/libc/machine/mips/strlen.c ---- newlib-1.16.0/newlib/libc/machine/mips/strlen.c 2002-03-14 03:41:43.000000000 +0100 -+++ newlib-1.16.0-fixed/newlib/libc/machine/mips/strlen.c 2009-02-14 15:52:58.000000000 +0100 -@@ -60,6 +60,7 @@ - " addiu $2,$4,1\n" - "\n" - "1: lbu $3,0($4)\n" -+ " nop\n" - " bnez $3,1b\n" - " addiu $4,$4,1\n" - "\n" diff --git a/lib/CPUs/MIPS/doc/toolchain/newlib-1.17.0-jens.patch b/lib/CPUs/MIPS/doc/toolchain/newlib-1.17.0-jens.patch deleted file mode 100644 index bc28abc..0000000 --- a/lib/CPUs/MIPS/doc/toolchain/newlib-1.17.0-jens.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -Naur newlib-1.17.0/newlib/libc/machine/mips/strlen.c newlib-1.17.0-fixed/newlib/libc/machine/mips/strlen.c ---- newlib-1.17.0/newlib/libc/machine/mips/strlen.c 2002-03-14 03:41:43.000000000 +0100 -+++ newlib-1.17.0-fixed/newlib/libc/machine/mips/strlen.c 2009-02-14 15:45:19.000000000 +0100 -@@ -60,6 +60,7 @@ - " addiu $2,$4,1\n" - "\n" - "1: lbu $3,0($4)\n" -+ " nop\n" - " bnez $3,1b\n" - " addiu $4,$4,1\n" - "\n" diff --git a/lib/CPUs/MIPS/sim/ModelSim SE .lnk b/lib/CPUs/MIPS/sim/ModelSim SE .lnk deleted file mode 100644 index d30cd7a6a45d686675fed466219cf9a237c53233..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1455 zcmds1T}YE*6h3n+6bdFTP;s@Ql@!c5f7+%&OJ|P!+;GOc7@4`HpSVr7Dmr zACm$jFuQPFdE>yFQiwu>Kq9IOrI4sJ(SD?hDC&8?Z+`vI&rMgIao%&@^YfhZp6`8E zM??xu23Dd;aiyAz*y^CGPt8Pix2F^}*Y77A%cd1{PbIvax~rh`8^lP36fdtfg@(4c zo;hc9i&kDe{3Mfh8;w`7m4m)1`>9ymcq}g}vdPupJkVh4foT^hNkuESZko>y zdMx!L8brA$Od)E++Cl;R{IKOxeHvlH{E=4^=d8BZHTD!6OjT5x#+WcK^B&8!B*Wl< z;6r97MX|P0J2g`|8OQ{kC?C4i&xH9i&|-YB#6;UO#q$)v>jN{%M$2R=m=WtR7pw%I z-Z_?3Lwfk2FBFRqrt1oa+QKb?fZxlp2BQAf_U3YfsnsihyZ$F+JL!?}`xBz+|A6$Ej+3g% zj&JYAoH*R0T39$({(Sy^A)b>(d#PWrre9lEkll%YONG*F{w3&IJyw7Al~!5#;eucT zf8WnI>@0b96>>rHF~btTY4n@>?C;w?ja zdb*dq36oMK-e>kl;(~o23rdrj%ruF)FyERkyw)n?Cs$($@W7&0Ifk64n=3^9B_vB_ zH8!R(h_Wb&n24!gI0w#LpGAdqN%lU6&sNkcIKb0}UZHR%CB8QnvxdQHw9lpJA?i&I z_6jb. --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.async_types.all; - -package async_defs is - - constant ts_flash : async_timespec_t := - ( - T_leadin => 00.0, - T_pulse_rd => 120.0, - T_pulse_wr => 70.0, - T_leadout => 00.0, - T_release => 40.0, - T_pulse_rst => 80.0, - T_pulse_page_rd => 30.0, - can_page_rd => true, - nbits_page_rd => 4, - pol_cs => '0', - pol_oe => '0', - pol_we => '0', - pol_be => '0', - pol_rst => '0' - ); - - constant ts_sram : async_timespec_t := - ( - T_leadin => 00.0, - T_pulse_rd => 10.0, - T_pulse_wr => 10.0, - T_leadout => 00.0, - T_release => 00.0, - T_pulse_rst => 80.0, - T_pulse_page_rd => 20.0, - can_page_rd => false, - nbits_page_rd => 5, - pol_cs => '0', - pol_oe => '0', - pol_we => '0', - pol_be => '0', - pol_rst => '0' - ); - -end async_defs; diff --git a/lib/CPUs/MIPS/src/bootloader.ROM.vhd b/lib/CPUs/MIPS/src/bootloader.ROM.vhd deleted file mode 100644 index 1b0920c..0000000 --- a/lib/CPUs/MIPS/src/bootloader.ROM.vhd +++ /dev/null @@ -1,2082 +0,0 @@ -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -ENTITY rom IS - Port - ( - clk : in STD_LOGIC; - ce : in STD_LOGIC; - addr : in unsigned(31 downto 0); - dout : out unsigned(31 downto 0) - ); -END rom; - -ARCHITECTURE data OF rom IS - - subtype word_t is unsigned(31 downto 0); - type word_array_t is array (0 to 2047) of word_t; - constant word_array : word_array_t := - ( - - X"3C1D8000", -- 00000000 - X"27BDEFF0", -- 00000004 - X"3C1A1040", -- 00000008 - X"375A000C", -- 0000000C - X"409A6000", -- 00000010 - X"241A0000", -- 00000014 - X"409A6800", -- 00000018 - X"401A7800", -- 0000001C - X"00000000", -- 00000020 - X"409AF800", -- 00000024 - X"42000020", -- 00000028 - X"42000022", -- 0000002C - X"3C1ABFC0", -- 00000030 - X"275A005C", -- 00000034 - X"0340F809", -- 00000038 - X"00000000", -- 0000003C - X"3C1ABFC0", -- 00000040 - X"275A114C", -- 00000044 - X"0340F809", -- 00000048 - X"00000000", -- 0000004C - X"00000000", -- 00000050 - X"0BF00014", -- 00000054 - X"00000000", -- 00000058 - X"3C1AA001", -- 0000005C - X"275A0008", -- 00000060 - X"241B000D", -- 00000064 - X"AF5B0000", -- 00000068 - X"03E00008", -- 0000006C - X"00000000", -- 00000070 - X"00000000", -- 00000074 - X"00000000", -- 00000078 - X"00000000", -- 0000007C - X"00000000", -- 00000080 - X"00000000", -- 00000084 - X"00000000", -- 00000088 - X"00000000", -- 0000008C - X"00000000", -- 00000090 - X"00000000", -- 00000094 - X"00000000", -- 00000098 - X"00000000", -- 0000009C - X"00000000", -- 000000A0 - X"00000000", -- 000000A4 - X"00000000", -- 000000A8 - X"00000000", -- 000000AC - X"00000000", -- 000000B0 - X"00000000", -- 000000B4 - X"00000000", -- 000000B8 - X"00000000", -- 000000BC - X"00000000", -- 000000C0 - X"00000000", -- 000000C4 - X"00000000", -- 000000C8 - X"00000000", -- 000000CC - X"00000000", -- 000000D0 - X"00000000", -- 000000D4 - X"00000000", -- 000000D8 - X"00000000", -- 000000DC - X"00000000", -- 000000E0 - X"00000000", -- 000000E4 - X"00000000", -- 000000E8 - X"00000000", -- 000000EC - X"00000000", -- 000000F0 - X"00000000", -- 000000F4 - X"00000000", -- 000000F8 - X"00000000", -- 000000FC - X"00000000", -- 00000100 - X"00000000", -- 00000104 - X"00000000", -- 00000108 - X"00000000", -- 0000010C - X"00000000", -- 00000110 - X"00000000", -- 00000114 - X"00000000", -- 00000118 - X"00000000", -- 0000011C - X"00000000", -- 00000120 - X"00000000", -- 00000124 - X"00000000", -- 00000128 - X"00000000", -- 0000012C - X"00000000", -- 00000130 - X"00000000", -- 00000134 - X"00000000", -- 00000138 - X"00000000", -- 0000013C - X"00000000", -- 00000140 - X"00000000", -- 00000144 - X"00000000", -- 00000148 - X"00000000", -- 0000014C - X"00000000", -- 00000150 - X"00000000", -- 00000154 - X"00000000", -- 00000158 - X"00000000", -- 0000015C - X"00000000", -- 00000160 - X"00000000", -- 00000164 - X"00000000", -- 00000168 - X"00000000", -- 0000016C - X"00000000", -- 00000170 - X"00000000", -- 00000174 - X"00000000", -- 00000178 - X"00000000", -- 0000017C - X"401A6800", -- 00000180 - X"3C1BC000", -- 00000184 - X"001AD082", -- 00000188 - X"335A000F", -- 0000018C - X"035BD025", -- 00000190 - X"3C1BA000", -- 00000194 - X"277B0000", -- 00000198 - X"AF7A0000", -- 0000019C - X"401A6800", -- 000001A0 - X"00000000", -- 000001A4 - X"001AD202", -- 000001A8 - X"335A00FF", -- 000001AC - X"1740FFFB", -- 000001B0 - X"00000000", -- 000001B4 - X"401A7000", -- 000001B8 - X"00000000", -- 000001BC - X"03400008", -- 000001C0 - X"42000010", -- 000001C4 - X"40026000", -- 000001C8 - X"03E00008", -- 000001CC - X"00000000", -- 000001D0 - X"40846000", -- 000001D4 - X"03E00008", -- 000001D8 - X"00000000", -- 000001DC - X"40026800", -- 000001E0 - X"03E00008", -- 000001E4 - X"00000000", -- 000001E8 - X"40846800", -- 000001EC - X"03E00008", -- 000001F0 - X"00000000", -- 000001F4 - X"40027800", -- 000001F8 - X"03E00008", -- 000001FC - X"00000000", -- 00000200 - X"3C02A001", -- 00000204 - X"34430004", -- 00000208 - X"8C620000", -- 0000020C - X"00000000", -- 00000210 - X"30420010", -- 00000214 - X"1040FFFC", -- 00000218 - X"3C02A001", -- 0000021C - X"8C420000", -- 00000220 - X"00000000", -- 00000224 - X"00021600", -- 00000228 - X"03E00008", -- 0000022C - X"00021603", -- 00000230 - X"00042600", -- 00000234 - X"3C02A001", -- 00000238 - X"00042603", -- 0000023C - X"34430004", -- 00000240 - X"8C620000", -- 00000244 - X"00000000", -- 00000248 - X"30420002", -- 0000024C - X"1440FFFC", -- 00000250 - X"3C02A001", -- 00000254 - X"AC440000", -- 00000258 - X"03E00008", -- 0000025C - X"00000000", -- 00000260 - X"00042600", -- 00000264 - X"00042603", -- 00000268 - X"2402000A", -- 0000026C - X"1482000A", -- 00000270 - X"3C02A001", -- 00000274 - X"34430004", -- 00000278 - X"8C620000", -- 0000027C - X"00000000", -- 00000280 - X"30420002", -- 00000284 - X"1440FFFC", -- 00000288 - X"3C02A001", -- 0000028C - X"2403000D", -- 00000290 - X"AC430000", -- 00000294 - X"3C02A001", -- 00000298 - X"34430004", -- 0000029C - X"8C620000", -- 000002A0 - X"00000000", -- 000002A4 - X"30420002", -- 000002A8 - X"1440FFFC", -- 000002AC - X"3C02A001", -- 000002B0 - X"AC440000", -- 000002B4 - X"03E00008", -- 000002B8 - X"00000000", -- 000002BC - X"3C02A001", -- 000002C0 - X"34470004", -- 000002C4 - X"00802821", -- 000002C8 - X"2409000A", -- 000002CC - X"3C06A001", -- 000002D0 - X"0BF000C6", -- 000002D4 - X"2408000D", -- 000002D8 - X"14690007", -- 000002DC - X"00000000", -- 000002E0 - X"8CE20000", -- 000002E4 - X"00000000", -- 000002E8 - X"30420002", -- 000002EC - X"1440FFFC", -- 000002F0 - X"00000000", -- 000002F4 - X"ACC80000", -- 000002F8 - X"8CE20000", -- 000002FC - X"00000000", -- 00000300 - X"30420002", -- 00000304 - X"1440FFFC", -- 00000308 - X"00000000", -- 0000030C - X"ACC30000", -- 00000310 - X"24A50001", -- 00000314 - X"80A30000", -- 00000318 - X"00000000", -- 0000031C - X"1460FFEE", -- 00000320 - X"00A41023", -- 00000324 - X"03E00008", -- 00000328 - X"00000000", -- 0000032C - X"00042600", -- 00000330 - X"3C02A001", -- 00000334 - X"00042603", -- 00000338 - X"344A0004", -- 0000033C - X"00003821", -- 00000340 - X"3C09A001", -- 00000344 - X"24080002", -- 00000348 - X"308200FF", -- 0000034C - X"00022902", -- 00000350 - X"00041100", -- 00000354 - X"00022600", -- 00000358 - X"2CA3000A", -- 0000035C - X"00042603", -- 00000360 - X"14600002", -- 00000364 - X"24A60030", -- 00000368 - X"24A60037", -- 0000036C - X"8D420000", -- 00000370 - X"00000000", -- 00000374 - X"30420002", -- 00000378 - X"1440FFFC", -- 0000037C - X"00061600", -- 00000380 - X"00021603", -- 00000384 - X"24E70001", -- 00000388 - X"AD220000", -- 0000038C - X"14E8FFEF", -- 00000390 - X"308200FF", -- 00000394 - X"03E00008", -- 00000398 - X"00000000", -- 0000039C - X"27BDFFE0", -- 000003A0 - X"AFB20018", -- 000003A4 - X"AFB10014", -- 000003A8 - X"AFB00010", -- 000003AC - X"AFBF001C", -- 000003B0 - X"00808821", -- 000003B4 - X"00008021", -- 000003B8 - X"24120004", -- 000003BC - X"00112603", -- 000003C0 - X"0FF000CC", -- 000003C4 - X"26100001", -- 000003C8 - X"1612FFFC", -- 000003CC - X"00118A00", -- 000003D0 - X"8FBF001C", -- 000003D4 - X"8FB20018", -- 000003D8 - X"8FB10014", -- 000003DC - X"8FB00010", -- 000003E0 - X"03E00008", -- 000003E4 - X"27BD0020", -- 000003E8 - X"27BDFFC8", -- 000003EC - X"AFB60028", -- 000003F0 - X"AFBF0034", -- 000003F4 - X"AFBE0030", -- 000003F8 - X"AFB7002C", -- 000003FC - X"AFB50024", -- 00000400 - X"AFB40020", -- 00000404 - X"AFB3001C", -- 00000408 - X"AFB20018", -- 0000040C - X"AFB10014", -- 00000410 - X"AFB00010", -- 00000414 - X"00801021", -- 00000418 - X"10A00002", -- 0000041C - X"00C0B021", -- 00000420 - X"00002021", -- 00000424 - X"00409821", -- 00000428 - X"3C02A001", -- 0000042C - X"00E09021", -- 00000430 - X"0080A821", -- 00000434 - X"345E0004", -- 00000438 - X"00E0A021", -- 0000043C - X"3C17A001", -- 00000440 - X"0FF000E8", -- 00000444 - X"02A02021", -- 00000448 - X"3C04BFC0", -- 0000044C - X"0FF000B0", -- 00000450 - X"2484169C", -- 00000454 - X"02608821", -- 00000458 - X"0BF00128", -- 0000045C - X"00008021", -- 00000460 - X"12400009", -- 00000464 - X"00000000", -- 00000468 - X"82240000", -- 0000046C - X"0FF000CC", -- 00000470 - X"2652FFFF", -- 00000474 - X"3C04BFC0", -- 00000478 - X"0FF000B0", -- 0000047C - X"24841774", -- 00000480 - X"0BF00128", -- 00000484 - X"26310001", -- 00000488 - X"3C04BFC0", -- 0000048C - X"0FF000B0", -- 00000490 - X"248416A0", -- 00000494 - X"0BF0012C", -- 00000498 - X"3C04BFC0", -- 0000049C - X"0216102A", -- 000004A0 - X"1440FFEF", -- 000004A4 - X"26100001", -- 000004A8 - X"3C04BFC0", -- 000004AC - X"0FF000B0", -- 000004B0 - X"248416A0", -- 000004B4 - X"02602821", -- 000004B8 - X"0BF00155", -- 000004BC - X"00002021", -- 000004C0 - X"1280001E", -- 000004C4 - X"00000000", -- 000004C8 - X"90A30000", -- 000004CC - X"00000000", -- 000004D0 - X"2462FFE0", -- 000004D4 - X"304200FF", -- 000004D8 - X"2C420060", -- 000004DC - X"14400003", -- 000004E0 - X"00031E00", -- 000004E4 - X"2403002E", -- 000004E8 - X"00031E00", -- 000004EC - X"00031E03", -- 000004F0 - X"2402000A", -- 000004F4 - X"14620007", -- 000004F8 - X"00000000", -- 000004FC - X"8FC20000", -- 00000500 - X"00000000", -- 00000504 - X"30420002", -- 00000508 - X"1440FFFC", -- 0000050C - X"2402000D", -- 00000510 - X"AEE20000", -- 00000514 - X"8FC20000", -- 00000518 - X"00000000", -- 0000051C - X"30420002", -- 00000520 - X"1440FFFC", -- 00000524 - X"00000000", -- 00000528 - X"AEE30000", -- 0000052C - X"2694FFFF", -- 00000530 - X"24840001", -- 00000534 - X"0BF00155", -- 00000538 - X"24A50001", -- 0000053C - X"3C04BFC0", -- 00000540 - X"0FF000B0", -- 00000544 - X"24841774", -- 00000548 - X"0BF00159", -- 0000054C - X"3C04BFC0", -- 00000550 - X"0096102A", -- 00000554 - X"1440FFDA", -- 00000558 - X"00000000", -- 0000055C - X"3C04BFC0", -- 00000560 - X"0FF000B0", -- 00000564 - X"248416C8", -- 00000568 - X"02B6A821", -- 0000056C - X"1640FFB4", -- 00000570 - X"02769821", -- 00000574 - X"8FBF0034", -- 00000578 - X"8FBE0030", -- 0000057C - X"8FB7002C", -- 00000580 - X"8FB60028", -- 00000584 - X"8FB50024", -- 00000588 - X"8FB40020", -- 0000058C - X"8FB3001C", -- 00000590 - X"8FB20018", -- 00000594 - X"8FB10014", -- 00000598 - X"8FB00010", -- 0000059C - X"03E00008", -- 000005A0 - X"27BD0038", -- 000005A4 - X"00C03821", -- 000005A8 - X"00A03021", -- 000005AC - X"0BF000FB", -- 000005B0 - X"24050001", -- 000005B4 - X"8C840000", -- 000005B8 - X"3C020070", -- 000005BC - X"34420070", -- 000005C0 - X"3C0300FF", -- 000005C4 - X"AC820000", -- 000005C8 - X"346300FF", -- 000005CC - X"8C820000", -- 000005D0 - X"AC830000", -- 000005D4 - X"03E00008", -- 000005D8 - X"00000000", -- 000005DC - X"27BDFFF8", -- 000005E0 - X"AC850000", -- 000005E4 - X"24820008", -- 000005E8 - X"0BF0017F", -- 000005EC - X"24830020", -- 000005F0 - X"A0400000", -- 000005F4 - X"24420001", -- 000005F8 - X"1443FFFD", -- 000005FC - X"00000000", -- 00000600 - X"24020001", -- 00000604 - X"AC820004", -- 00000608 - X"03E00008", -- 0000060C - X"27BD0008", -- 00000610 - X"8C870000", -- 00000614 - X"3C020098", -- 00000618 - X"34420098", -- 0000061C - X"ACE20000", -- 00000620 - X"3C0200FF", -- 00000624 - X"344200FF", -- 00000628 - X"ACE20000", -- 0000062C - X"3C020090", -- 00000630 - X"34420090", -- 00000634 - X"ACE20000", -- 00000638 - X"00804021", -- 0000063C - X"94E4009C", -- 00000640 - X"24030002", -- 00000644 - X"24020020", -- 00000648 - X"AD030008", -- 0000064C - X"AD03001C", -- 00000650 - X"AD020018", -- 00000654 - X"3084FFFF", -- 00000658 - X"0BF0019D", -- 0000065C - X"00001821", -- 00000660 - X"8D020008", -- 00000664 - X"00000000", -- 00000668 - X"00021040", -- 0000066C - X"AD020008", -- 00000670 - X"0064102B", -- 00000674 - X"1440FFFA", -- 00000678 - X"24630001", -- 0000067C - X"94E200AC", -- 00000680 - X"94E300A8", -- 00000684 - X"3042FFFF", -- 00000688 - X"8D04001C", -- 0000068C - X"3063FFFF", -- 00000690 - X"00021200", -- 00000694 - X"00432825", -- 00000698 - X"AD040014", -- 0000069C - X"0BF001AE", -- 000006A0 - X"00001821", -- 000006A4 - X"8D020014", -- 000006A8 - X"00000000", -- 000006AC - X"00021040", -- 000006B0 - X"AD020014", -- 000006B4 - X"0065102B", -- 000006B8 - X"1440FFFA", -- 000006BC - X"24630001", -- 000006C0 - X"94E300B8", -- 000006C4 - X"94E600B4", -- 000006C8 - X"94E200C0", -- 000006CC - X"94E400BC", -- 000006D0 - X"8D05001C", -- 000006D4 - X"3042FFFF", -- 000006D8 - X"3084FFFF", -- 000006DC - X"00021200", -- 000006E0 - X"00441025", -- 000006E4 - X"00052A00", -- 000006E8 - X"00A20018", -- 000006EC - X"3063FFFF", -- 000006F0 - X"30C6FFFF", -- 000006F4 - X"00031A00", -- 000006F8 - X"00661825", -- 000006FC - X"24630001", -- 00000700 - X"AD030010", -- 00000704 - X"3C0300FF", -- 00000708 - X"346300FF", -- 0000070C - X"00001021", -- 00000710 - X"00002812", -- 00000714 - X"AD05000C", -- 00000718 - X"ACE30000", -- 0000071C - X"03E00008", -- 00000720 - X"00000000", -- 00000724 - X"8C820008", -- 00000728 - X"8C860000", -- 0000072C - X"00021082", -- 00000730 - X"00A2102B", -- 00000734 - X"14400004", -- 00000738 - X"3C030090", -- 0000073C - X"3C028010", -- 00000740 - X"03E00008", -- 00000744 - X"34420002", -- 00000748 - X"8C820010", -- 0000074C - X"00000000", -- 00000750 - X"2442FFFF", -- 00000754 - X"00021400", -- 00000758 - X"00A21024", -- 0000075C - X"24420002", -- 00000760 - X"34630090", -- 00000764 - X"00021080", -- 00000768 - X"ACC30000", -- 0000076C - X"00C21021", -- 00000770 - X"8C430000", -- 00000774 - X"3C020001", -- 00000778 - X"34420001", -- 0000077C - X"00621824", -- 00000780 - X"3C0200FF", -- 00000784 - X"344200FF", -- 00000788 - X"ACC20000", -- 0000078C - X"03E00008", -- 00000790 - X"0003102B", -- 00000794 - X"8C820008", -- 00000798 - X"00A01821", -- 0000079C - X"00021082", -- 000007A0 - X"00A2102B", -- 000007A4 - X"8C850000", -- 000007A8 - X"14400003", -- 000007AC - X"3C028010", -- 000007B0 - X"0BF0020C", -- 000007B4 - X"34430002", -- 000007B8 - X"8C820010", -- 000007BC - X"00000000", -- 000007C0 - X"2442FFFF", -- 000007C4 - X"00021400", -- 000007C8 - X"00621024", -- 000007CC - X"00021080", -- 000007D0 - X"00A22021", -- 000007D4 - X"3C020020", -- 000007D8 - X"34420020", -- 000007DC - X"AC820000", -- 000007E0 - X"3C0200D0", -- 000007E4 - X"344200D0", -- 000007E8 - X"AC820000", -- 000007EC - X"3C020080", -- 000007F0 - X"34430080", -- 000007F4 - X"8C860000", -- 000007F8 - X"00000000", -- 000007FC - X"00C31024", -- 00000800 - X"1443FFFC", -- 00000804 - X"3C02002A", -- 00000808 - X"3442002A", -- 0000080C - X"00C21024", -- 00000810 - X"10400003", -- 00000814 - X"00001821", -- 00000818 - X"3C029010", -- 0000081C - X"00C21825", -- 00000820 - X"3C0200FF", -- 00000824 - X"344200FF", -- 00000828 - X"AC820000", -- 0000082C - X"03E00008", -- 00000830 - X"00601021", -- 00000834 - X"8C820008", -- 00000838 - X"00A01821", -- 0000083C - X"00021082", -- 00000840 - X"00A2102B", -- 00000844 - X"8C850000", -- 00000848 - X"14400003", -- 0000084C - X"3C028010", -- 00000850 - X"0BF00234", -- 00000854 - X"34430002", -- 00000858 - X"8C820010", -- 0000085C - X"00000000", -- 00000860 - X"2442FFFF", -- 00000864 - X"00021400", -- 00000868 - X"00621024", -- 0000086C - X"00021080", -- 00000870 - X"00A22021", -- 00000874 - X"3C020060", -- 00000878 - X"34420060", -- 0000087C - X"AC820000", -- 00000880 - X"3C020001", -- 00000884 - X"34420001", -- 00000888 - X"AC820000", -- 0000088C - X"3C020080", -- 00000890 - X"34430080", -- 00000894 - X"8C860000", -- 00000898 - X"00000000", -- 0000089C - X"00C31024", -- 000008A0 - X"1443FFFC", -- 000008A4 - X"3C020038", -- 000008A8 - X"34420038", -- 000008AC - X"00C21024", -- 000008B0 - X"10400003", -- 000008B4 - X"00001821", -- 000008B8 - X"3C029010", -- 000008BC - X"00C21825", -- 000008C0 - X"3C0200FF", -- 000008C4 - X"344200FF", -- 000008C8 - X"AC820000", -- 000008CC - X"03E00008", -- 000008D0 - X"00601021", -- 000008D4 - X"8C820008", -- 000008D8 - X"00A01821", -- 000008DC - X"00021082", -- 000008E0 - X"00A2102B", -- 000008E4 - X"8C850000", -- 000008E8 - X"14400003", -- 000008EC - X"3C028010", -- 000008F0 - X"0BF0025C", -- 000008F4 - X"34430002", -- 000008F8 - X"8C820010", -- 000008FC - X"00000000", -- 00000900 - X"2442FFFF", -- 00000904 - X"00021400", -- 00000908 - X"00621024", -- 0000090C - X"00021080", -- 00000910 - X"00A22021", -- 00000914 - X"3C020060", -- 00000918 - X"34420060", -- 0000091C - X"AC820000", -- 00000920 - X"3C0200D0", -- 00000924 - X"344200D0", -- 00000928 - X"AC820000", -- 0000092C - X"3C020080", -- 00000930 - X"34430080", -- 00000934 - X"8C860000", -- 00000938 - X"00000000", -- 0000093C - X"00C31024", -- 00000940 - X"1443FFFC", -- 00000944 - X"3C020038", -- 00000948 - X"34420038", -- 0000094C - X"00C21024", -- 00000950 - X"10400003", -- 00000954 - X"00001821", -- 00000958 - X"3C029010", -- 0000095C - X"00C21825", -- 00000960 - X"3C0200FF", -- 00000964 - X"344200FF", -- 00000968 - X"AC820000", -- 0000096C - X"03E00008", -- 00000970 - X"00601021", -- 00000974 - X"8C820008", -- 00000978 - X"8C840000", -- 0000097C - X"00021082", -- 00000980 - X"00A2102B", -- 00000984 - X"14400003", -- 00000988 - X"3C028010", -- 0000098C - X"0BF0027C", -- 00000990 - X"34430002", -- 00000994 - X"00051080", -- 00000998 - X"00822021", -- 0000099C - X"3C020040", -- 000009A0 - X"34420040", -- 000009A4 - X"AC820000", -- 000009A8 - X"3C020080", -- 000009AC - X"AC860000", -- 000009B0 - X"34430080", -- 000009B4 - X"8C860000", -- 000009B8 - X"00000000", -- 000009BC - X"00C31024", -- 000009C0 - X"1443FFFC", -- 000009C4 - X"3C02001A", -- 000009C8 - X"3442001A", -- 000009CC - X"00C21024", -- 000009D0 - X"10400003", -- 000009D4 - X"00001821", -- 000009D8 - X"3C029010", -- 000009DC - X"00C21825", -- 000009E0 - X"3C0200FF", -- 000009E4 - X"344200FF", -- 000009E8 - X"AC820000", -- 000009EC - X"03E00008", -- 000009F0 - X"00601021", -- 000009F4 - X"8C820008", -- 000009F8 - X"27BDFFE8", -- 000009FC - X"00021082", -- 00000A00 - X"00A2102B", -- 00000A04 - X"AFB40014", -- 00000A08 - X"AFB30010", -- 00000A0C - X"AFB2000C", -- 00000A10 - X"AFB10008", -- 00000A14 - X"AFB00004", -- 00000A18 - X"0080C021", -- 00000A1C - X"8C8E0000", -- 00000A20 - X"14400004", -- 00000A24 - X"00C0A021", -- 00000A28 - X"3C028010", -- 00000A2C - X"0BF002E3", -- 00000A30 - X"34440002", -- 00000A34 - X"8C820010", -- 00000A38 - X"00006821", -- 00000A3C - X"2442FFFF", -- 00000A40 - X"0002CC00", -- 00000A44 - X"3C0200E8", -- 00000A48 - X"345300E8", -- 00000A4C - X"3C020080", -- 00000A50 - X"344F0080", -- 00000A54 - X"3C02001A", -- 00000A58 - X"3446001A", -- 00000A5C - X"3C0200D0", -- 00000A60 - X"345200D0", -- 00000A64 - X"3C0200FF", -- 00000A68 - X"345100FF", -- 00000A6C - X"0BF002E1", -- 00000A70 - X"3C100001", -- 00000A74 - X"01851023", -- 00000A78 - X"00505021", -- 00000A7C - X"00EA102B", -- 00000A80 - X"10400002", -- 00000A84 - X"000C1080", -- 00000A88 - X"00E05021", -- 00000A8C - X"0BF002D7", -- 00000A90 - X"01C25821", -- 00000A94 - X"AD730000", -- 00000A98 - X"8D630000", -- 00000A9C - X"00000000", -- 00000AA0 - X"006F1024", -- 00000AA4 - X"144FFFFC", -- 00000AA8 - X"00661024", -- 00000AAC - X"14400026", -- 00000AB0 - X"3C029010", -- 00000AB4 - X"8F020014", -- 00000AB8 - X"00000000", -- 00000ABC - X"00021882", -- 00000AC0 - X"006A102B", -- 00000AC4 - X"10400002", -- 00000AC8 - X"01404021", -- 00000ACC - X"00604021", -- 00000AD0 - X"2503FFFF", -- 00000AD4 - X"00031400", -- 00000AD8 - X"00431025", -- 00000ADC - X"00052080", -- 00000AE0 - X"000D1880", -- 00000AE4 - X"02834821", -- 00000AE8 - X"AD620000", -- 00000AEC - X"01C42021", -- 00000AF0 - X"0BF002C3", -- 00000AF4 - X"00001821", -- 00000AF8 - X"8D220000", -- 00000AFC - X"25290004", -- 00000B00 - X"AC820000", -- 00000B04 - X"24840004", -- 00000B08 - X"0068102B", -- 00000B0C - X"1440FFFA", -- 00000B10 - X"24630001", -- 00000B14 - X"01A86821", -- 00000B18 - X"00A82821", -- 00000B1C - X"00E83823", -- 00000B20 - X"AD720000", -- 00000B24 - X"8D630000", -- 00000B28 - X"00000000", -- 00000B2C - X"006F1024", -- 00000B30 - X"144FFFFC", -- 00000B34 - X"00661024", -- 00000B38 - X"10400005", -- 00000B3C - X"01485023", -- 00000B40 - X"01485021", -- 00000B44 - X"3C029010", -- 00000B48 - X"0BF002D9", -- 00000B4C - X"00622025", -- 00000B50 - X"AD710000", -- 00000B54 - X"00002021", -- 00000B58 - X"1540FFCE", -- 00000B5C - X"00000000", -- 00000B60 - X"04810007", -- 00000B64 - X"000C1880", -- 00000B68 - X"3C0200FF", -- 00000B6C - X"01C31821", -- 00000B70 - X"344200FF", -- 00000B74 - X"AC620000", -- 00000B78 - X"0BF002E4", -- 00000B7C - X"00801021", -- 00000B80 - X"14E0FFBC", -- 00000B84 - X"00B96024", -- 00000B88 - X"00801021", -- 00000B8C - X"8FB40014", -- 00000B90 - X"8FB30010", -- 00000B94 - X"8FB2000C", -- 00000B98 - X"8FB10008", -- 00000B9C - X"8FB00004", -- 00000BA0 - X"03E00008", -- 00000BA4 - X"27BD0018", -- 00000BA8 - X"27BDFFE0", -- 00000BAC - X"AFBF001C", -- 00000BB0 - X"AC850000", -- 00000BB4 - X"24820008", -- 00000BB8 - X"0BF002F3", -- 00000BBC - X"24830020", -- 00000BC0 - X"A0400000", -- 00000BC4 - X"24420001", -- 00000BC8 - X"1443FFFD", -- 00000BCC - X"00000000", -- 00000BD0 - X"3C021234", -- 00000BD4 - X"34425678", -- 00000BD8 - X"00021E02", -- 00000BDC - X"AFA20010", -- 00000BE0 - X"24020012", -- 00000BE4 - X"14620003", -- 00000BE8 - X"AC800004", -- 00000BEC - X"24020001", -- 00000BF0 - X"AC820004", -- 00000BF4 - X"0FF00185", -- 00000BF8 - X"00000000", -- 00000BFC - X"8FBF001C", -- 00000C00 - X"00000000", -- 00000C04 - X"03E00008", -- 00000C08 - X"27BD0020", -- 00000C0C - X"27BDFFD8", -- 00000C10 - X"30C20003", -- 00000C14 - X"AFB2001C", -- 00000C18 - X"AFBF0024", -- 00000C1C - X"AFB30020", -- 00000C20 - X"AFB10018", -- 00000C24 - X"AFB00014", -- 00000C28 - X"10400004", -- 00000C2C - X"00809021", -- 00000C30 - X"00061082", -- 00000C34 - X"24420001", -- 00000C38 - X"00023080", -- 00000C3C - X"00C59821", -- 00000C40 - X"0BF00324", -- 00000C44 - X"00A08821", -- 00000C48 - X"0FF001CA", -- 00000C4C - X"00000000", -- 00000C50 - X"02402021", -- 00000C54 - X"10400005", -- 00000C58 - X"02002821", -- 00000C5C - X"0FF00236", -- 00000C60 - X"00000000", -- 00000C64 - X"04400011", -- 00000C68 - X"00401821", -- 00000C6C - X"02002821", -- 00000C70 - X"0FF001E6", -- 00000C74 - X"02402021", -- 00000C78 - X"0440000C", -- 00000C7C - X"00401821", -- 00000C80 - X"8E42000C", -- 00000C84 - X"00000000", -- 00000C88 - X"02228821", -- 00000C8C - X"001117C3", -- 00000C90 - X"00021782", -- 00000C94 - X"00511021", -- 00000C98 - X"00028083", -- 00000C9C - X"0233102B", -- 00000CA0 - X"02402021", -- 00000CA4 - X"1440FFE8", -- 00000CA8 - X"02002821", -- 00000CAC - X"8FBF0024", -- 00000CB0 - X"00601021", -- 00000CB4 - X"8FB30020", -- 00000CB8 - X"8FB2001C", -- 00000CBC - X"8FB10018", -- 00000CC0 - X"8FB00014", -- 00000CC4 - X"03E00008", -- 00000CC8 - X"27BD0028", -- 00000CCC - X"30E20003", -- 00000CD0 - X"10400003", -- 00000CD4 - X"00071082", -- 00000CD8 - X"24420001", -- 00000CDC - X"00023880", -- 00000CE0 - X"00052882", -- 00000CE4 - X"0BF0027E", -- 00000CE8 - X"00073882", -- 00000CEC - X"8C820000", -- 00000CF0 - X"00002021", -- 00000CF4 - X"0BF00347", -- 00000CF8 - X"00454021", -- 00000CFC - X"90630000", -- 00000D00 - X"90A20000", -- 00000D04 - X"00000000", -- 00000D08 - X"10620003", -- 00000D0C - X"3C028010", -- 00000D10 - X"03E00008", -- 00000D14 - X"34420003", -- 00000D18 - X"0087102B", -- 00000D1C - X"01041821", -- 00000D20 - X"00C42821", -- 00000D24 - X"1440FFF5", -- 00000D28 - X"24840001", -- 00000D2C - X"03E00008", -- 00000D30 - X"00000000", -- 00000D34 - X"8C82000C", -- 00000D38 - X"00000000", -- 00000D3C - X"14400002", -- 00000D40 - X"00A2001B", -- 00000D44 - X"0007000D", -- 00000D48 - X"00001010", -- 00000D4C - X"0002102B", -- 00000D50 - X"00002812", -- 00000D54 - X"03E00008", -- 00000D58 - X"00A21021", -- 00000D5C - X"8C830010", -- 00000D60 - X"00000000", -- 00000D64 - X"00A3102B", -- 00000D68 - X"14400002", -- 00000D6C - X"00000000", -- 00000D70 - X"2465FFFF", -- 00000D74 - X"8C82000C", -- 00000D78 - X"00000000", -- 00000D7C - X"00A20018", -- 00000D80 - X"00001012", -- 00000D84 - X"03E00008", -- 00000D88 - X"00000000", -- 00000D8C - X"27BDFFE8", -- 00000D90 - X"AFBF0014", -- 00000D94 - X"AFB00010", -- 00000D98 - X"0FF0034E", -- 00000D9C - X"00808021", -- 00000DA0 - X"8E03000C", -- 00000DA4 - X"8FBF0014", -- 00000DA8 - X"00430018", -- 00000DAC - X"8FB00010", -- 00000DB0 - X"00001012", -- 00000DB4 - X"03E00008", -- 00000DB8 - X"27BD0018", -- 00000DBC - X"90830000", -- 00000DC0 - X"00000000", -- 00000DC4 - X"2C620041", -- 00000DC8 - X"14400002", -- 00000DCC - X"2462FFD0", -- 00000DD0 - X"2462FFC9", -- 00000DD4 - X"90840001", -- 00000DD8 - X"304200FF", -- 00000DDC - X"304300FF", -- 00000DE0 - X"2C820041", -- 00000DE4 - X"14400003", -- 00000DE8 - X"00000000", -- 00000DEC - X"0BF0037F", -- 00000DF0 - X"2482FFC9", -- 00000DF4 - X"2482FFD0", -- 00000DF8 - X"304400FF", -- 00000DFC - X"00031100", -- 00000E00 - X"00821025", -- 00000E04 - X"03E00008", -- 00000E08 - X"304200FF", -- 00000E0C - X"10C00094", -- 00000E10 - X"00805021", -- 00000E14 - X"24020003", -- 00000E18 - X"AC820008", -- 00000E1C - X"90A40001", -- 00000E20 - X"00000000", -- 00000E24 - X"2482FFCF", -- 00000E28 - X"304200FF", -- 00000E2C - X"2C420003", -- 00000E30 - X"10400005", -- 00000E34 - X"2482FFC9", -- 00000E38 - X"24020002", -- 00000E3C - X"AD420008", -- 00000E40 - X"0BF003A1", -- 00000E44 - X"2489FFD1", -- 00000E48 - X"304200FF", -- 00000E4C - X"2C420003", -- 00000E50 - X"10400006", -- 00000E54 - X"24020030", -- 00000E58 - X"2402003B", -- 00000E5C - X"00444823", -- 00000E60 - X"24020004", -- 00000E64 - X"0BF003A1", -- 00000E68 - X"AD420008", -- 00000E6C - X"14820004", -- 00000E70 - X"00004821", -- 00000E74 - X"24020001", -- 00000E78 - X"AD420008", -- 00000E7C - X"24090002", -- 00000E80 - X"90A30002", -- 00000E84 - X"00000000", -- 00000E88 - X"2C620041", -- 00000E8C - X"10400003", -- 00000E90 - X"24A40002", -- 00000E94 - X"0BF003A9", -- 00000E98 - X"2462FFD0", -- 00000E9C - X"2462FFC9", -- 00000EA0 - X"90830001", -- 00000EA4 - X"304200FF", -- 00000EA8 - X"304400FF", -- 00000EAC - X"2C620041", -- 00000EB0 - X"10400002", -- 00000EB4 - X"2462FFC9", -- 00000EB8 - X"2462FFD0", -- 00000EBC - X"304300FF", -- 00000EC0 - X"00041100", -- 00000EC4 - X"00621025", -- 00000EC8 - X"304200FF", -- 00000ECC - X"AD420004", -- 00000ED0 - X"AD400000", -- 00000ED4 - X"00405821", -- 00000ED8 - X"00A03021", -- 00000EDC - X"0BF003D5", -- 00000EE0 - X"00003821", -- 00000EE4 - X"90C20004", -- 00000EE8 - X"00000000", -- 00000EEC - X"2443FFC9", -- 00000EF0 - X"2444FFD0", -- 00000EF4 - X"2C420041", -- 00000EF8 - X"10400002", -- 00000EFC - X"306300FF", -- 00000F00 - X"308300FF", -- 00000F04 - X"90C20005", -- 00000F08 - X"306800FF", -- 00000F0C - X"2444FFC9", -- 00000F10 - X"2443FFD0", -- 00000F14 - X"2C420041", -- 00000F18 - X"10400002", -- 00000F1C - X"308400FF", -- 00000F20 - X"306400FF", -- 00000F24 - X"8D430000", -- 00000F28 - X"00081100", -- 00000F2C - X"00821025", -- 00000F30 - X"304200FF", -- 00000F34 - X"00031A00", -- 00000F38 - X"004B2021", -- 00000F3C - X"00431025", -- 00000F40 - X"AD420000", -- 00000F44 - X"308B00FF", -- 00000F48 - X"24E70001", -- 00000F4C - X"24C60002", -- 00000F50 - X"00E9102A", -- 00000F54 - X"1440FFE3", -- 00000F58 - X"25220002", -- 00000F5C - X"8D440004", -- 00000F60 - X"00021040", -- 00000F64 - X"00091827", -- 00000F68 - X"00832021", -- 00000F6C - X"00A21021", -- 00000F70 - X"AD440004", -- 00000F74 - X"AD42000C", -- 00000F78 - X"0BF003F9", -- 00000F7C - X"00003021", -- 00000F80 - X"90E20000", -- 00000F84 - X"00000000", -- 00000F88 - X"2444FFC9", -- 00000F8C - X"2445FFD0", -- 00000F90 - X"2C420041", -- 00000F94 - X"10400002", -- 00000F98 - X"308400FF", -- 00000F9C - X"30A400FF", -- 00000FA0 - X"90E20001", -- 00000FA4 - X"308700FF", -- 00000FA8 - X"2445FFC9", -- 00000FAC - X"2444FFD0", -- 00000FB0 - X"2C420041", -- 00000FB4 - X"14400002", -- 00000FB8 - X"308400FF", -- 00000FBC - X"30A400FF", -- 00000FC0 - X"00071100", -- 00000FC4 - X"00821025", -- 00000FC8 - X"304200FF", -- 00000FCC - X"00661821", -- 00000FD0 - X"004B2021", -- 00000FD4 - X"A0620000", -- 00000FD8 - X"308B00FF", -- 00000FDC - X"24C60001", -- 00000FE0 - X"8D420004", -- 00000FE4 - X"8D43000C", -- 00000FE8 - X"00062040", -- 00000FEC - X"00C2102A", -- 00000FF0 - X"1440FFE3", -- 00000FF4 - X"00643821", -- 00000FF8 - X"90E40000", -- 00000FFC - X"00000000", -- 00001000 - X"2C820041", -- 00001004 - X"10400003", -- 00001008 - X"00E01821", -- 0000100C - X"0BF00407", -- 00001010 - X"2482FFD0", -- 00001014 - X"2482FFC9", -- 00001018 - X"90630001", -- 0000101C - X"304200FF", -- 00001020 - X"304400FF", -- 00001024 - X"2C620041", -- 00001028 - X"10400002", -- 0000102C - X"2462FFC9", -- 00001030 - X"2462FFD0", -- 00001034 - X"304200FF", -- 00001038 - X"00041900", -- 0000103C - X"00431825", -- 00001040 - X"000B1027", -- 00001044 - X"304200FF", -- 00001048 - X"306300FF", -- 0000104C - X"14430004", -- 00001050 - X"00000000", -- 00001054 - X"8D420008", -- 00001058 - X"03E00008", -- 0000105C - X"00000000", -- 00001060 - X"03E00008", -- 00001064 - X"00001021", -- 00001068 - X"00800008", -- 0000106C - X"00000000", -- 00001070 - X"03E00008", -- 00001074 - X"00000000", -- 00001078 - X"3C1A1000", -- 0000107C - X"409A6000", -- 00001080 - X"00800008", -- 00001084 - X"42000010", -- 00001088 - X"03E00008", -- 0000108C - X"00000000", -- 00001090 - X"401A6000", -- 00001094 - X"3C1BFFBF", -- 00001098 - X"377BFFFF", -- 0000109C - X"035BD024", -- 000010A0 - X"3C1B0200", -- 000010A4 - X"035BD025", -- 000010A8 - X"409A6000", -- 000010AC - X"00800008", -- 000010B0 - X"42000010", -- 000010B4 - X"03E00008", -- 000010B8 - X"00000000", -- 000010BC - X"27BDFFD8", -- 000010C0 - X"AFB30020", -- 000010C4 - X"AFB10018", -- 000010C8 - X"AFB00014", -- 000010CC - X"AFBF0024", -- 000010D0 - X"AFB2001C", -- 000010D4 - X"00809821", -- 000010D8 - X"24110073", -- 000010DC - X"24100053", -- 000010E0 - X"0FF00081", -- 000010E4 - X"00000000", -- 000010E8 - X"14510005", -- 000010EC - X"00000000", -- 000010F0 - X"00008021", -- 000010F4 - X"2412000A", -- 000010F8 - X"0BF00449", -- 000010FC - X"2411000D", -- 00001100 - X"1450FFF7", -- 00001104 - X"00000000", -- 00001108 - X"0BF0043E", -- 0000110C - X"00008021", -- 00001110 - X"0FF00081", -- 00001114 - X"A0620000", -- 00001118 - X"10510003", -- 0000111C - X"26100001", -- 00001120 - X"1452FFFB", -- 00001124 - X"02701821", -- 00001128 - X"8FBF0024", -- 0000112C - X"02001021", -- 00001130 - X"8FB30020", -- 00001134 - X"8FB2001C", -- 00001138 - X"8FB10018", -- 0000113C - X"8FB00014", -- 00001140 - X"03E00008", -- 00001144 - X"27BD0028", -- 00001148 - X"27BDFD98", -- 0000114C - X"27A40140", -- 00001150 - X"00002821", -- 00001154 - X"24060100", -- 00001158 - X"AFB20248", -- 0000115C - X"AFB10244", -- 00001160 - X"AFB00240", -- 00001164 - X"3C11A000", -- 00001168 - X"AFBF0264", -- 0000116C - X"AFBE0260", -- 00001170 - X"AFB7025C", -- 00001174 - X"AFB60258", -- 00001178 - X"AFB50254", -- 0000117C - X"AFB40250", -- 00001180 - X"0FF0056B", -- 00001184 - X"AFB3024C", -- 00001188 - X"3C036000", -- 0000118C - X"36220004", -- 00001190 - X"3463B1FF", -- 00001194 - X"AC430000", -- 00001198 - X"3C022000", -- 0000119C - X"27B20020", -- 000011A0 - X"34421000", -- 000011A4 - X"AE220000", -- 000011A8 - X"02402021", -- 000011AC - X"3C05A400", -- 000011B0 - X"8E300000", -- 000011B4 - X"0FF002EB", -- 000011B8 - X"00000000", -- 000011BC - X"04410004", -- 000011C0 - X"00102C02", -- 000011C4 - X"3C04BFC0", -- 000011C8 - X"0BF00494", -- 000011CC - X"248416A4", -- 000011D0 - X"02402021", -- 000011D4 - X"0FF00358", -- 000011D8 - X"30A5007F", -- 000011DC - X"00409021", -- 000011E0 - X"8E220000", -- 000011E4 - X"00000000", -- 000011E8 - X"00021602", -- 000011EC - X"30420008", -- 000011F0 - X"14400044", -- 000011F4 - X"3C11BFC0", -- 000011F8 - X"0FF000B0", -- 000011FC - X"26241758", -- 00001200 - X"3C02A400", -- 00001204 - X"02428021", -- 00001208 - X"8E030000", -- 0000120C - X"3C023149", -- 00001210 - X"3442464A", -- 00001214 - X"10620011", -- 00001218 - X"3C024A46", -- 0000121C - X"34424931", -- 00001220 - X"1062000E", -- 00001224 - X"00000000", -- 00001228 - X"0FF000B0", -- 0000122C - X"26241758", -- 00001230 - X"3C04BFC0", -- 00001234 - X"0FF000B0", -- 00001238 - X"248416CC", -- 0000123C - X"0FF000E8", -- 00001240 - X"02402021", -- 00001244 - X"3C04BFC0", -- 00001248 - X"248416E4", -- 0000124C - X"0FF000B0", -- 00001250 - X"00000000", -- 00001254 - X"0BF0055F", -- 00001258 - X"24020001", -- 0000125C - X"3C04BFC0", -- 00001260 - X"0FF000B0", -- 00001264 - X"248416F0", -- 00001268 - X"0FF000E8", -- 0000126C - X"02402021", -- 00001270 - X"3C04BFC0", -- 00001274 - X"0FF000B0", -- 00001278 - X"24841714", -- 0000127C - X"8E02000C", -- 00001280 - X"8E110004", -- 00001284 - X"00024082", -- 00001288 - X"8E070008", -- 0000128C - X"00002021", -- 00001290 - X"0BF004AA", -- 00001294 - X"00001821", -- 00001298 - X"8CC20000", -- 0000129C - X"00000000", -- 000012A0 - X"ACA20000", -- 000012A4 - X"0088102B", -- 000012A8 - X"00673021", -- 000012AC - X"00712821", -- 000012B0 - X"24840001", -- 000012B4 - X"1440FFF8", -- 000012B8 - X"24630004", -- 000012BC - X"3C04BFC0", -- 000012C0 - X"0FF000B0", -- 000012C4 - X"2484171C", -- 000012C8 - X"3C04BFC0", -- 000012CC - X"0FF000B0", -- 000012D0 - X"24841724", -- 000012D4 - X"8E040004", -- 000012D8 - X"0FF000E8", -- 000012DC - X"00000000", -- 000012E0 - X"3C04BFC0", -- 000012E4 - X"0FF000B0", -- 000012E8 - X"24841758", -- 000012EC - X"3C1A1000", -- 000012F0 - X"409A6000", -- 000012F4 - X"02200008", -- 000012F8 - X"42000010", -- 000012FC - X"0BF0055F", -- 00001300 - X"00001021", -- 00001304 - X"0FF000B0", -- 00001308 - X"26241758", -- 0000130C - X"3C04BFC0", -- 00001310 - X"0FF000B0", -- 00001314 - X"24841730", -- 00001318 - X"3C024000", -- 0000131C - X"3C034010", -- 00001320 - X"AC400000", -- 00001324 - X"24420004", -- 00001328 - X"1443FFFD", -- 0000132C - X"00009821", -- 00001330 - X"3C02BFC0", -- 00001334 - X"245516C8", -- 00001338 - X"3C02BFC0", -- 0000133C - X"2456171C", -- 00001340 - X"3C02BFC0", -- 00001344 - X"245E17D0", -- 00001348 - X"3C02BFC0", -- 0000134C - X"245717F0", -- 00001350 - X"3C04BFC0", -- 00001354 - X"0FF000B0", -- 00001358 - X"24841750", -- 0000135C - X"3C14BFC0", -- 00001360 - X"27B00040", -- 00001364 - X"0FF00430", -- 00001368 - X"02002021", -- 0000136C - X"00403021", -- 00001370 - X"02002821", -- 00001374 - X"27A40010", -- 00001378 - X"0FF00384", -- 0000137C - X"00408821", -- 00001380 - X"00401821", -- 00001384 - X"24020002", -- 00001388 - X"10620005", -- 0000138C - X"24020004", -- 00001390 - X"1462FFEF", -- 00001394 - X"00000000", -- 00001398 - X"0BF004FE", -- 0000139C - X"3C04BFC0", -- 000013A0 - X"8FA50010", -- 000013A4 - X"8FA60014", -- 000013A8 - X"0BF004F3", -- 000013AC - X"00001821", -- 000013B0 - X"8FA2001C", -- 000013B4 - X"00000000", -- 000013B8 - X"00431021", -- 000013BC - X"90420000", -- 000013C0 - X"24630001", -- 000013C4 - X"A0820000", -- 000013C8 - X"8FA20014", -- 000013CC - X"00000000", -- 000013D0 - X"0062102B", -- 000013D4 - X"1440FFF6", -- 000013D8 - X"00652021", -- 000013DC - X"00C51821", -- 000013E0 - X"0263102B", -- 000013E4 - X"10400060", -- 000013E8 - X"02208021", -- 000013EC - X"0BF0055B", -- 000013F0 - X"00609821", -- 000013F4 - X"0FF000B0", -- 000013F8 - X"24841754", -- 000013FC - X"8FA60010", -- 00001400 - X"26470100", -- 00001404 - X"02661823", -- 00001408 - X"27B10020", -- 0000140C - X"3C024A46", -- 00001410 - X"00E32821", -- 00001414 - X"02202021", -- 00001418 - X"34424931", -- 0000141C - X"AFA60144", -- 00001420 - X"AFA3014C", -- 00001424 - X"AFA70148", -- 00001428 - X"0FF00364", -- 0000142C - X"AFA20140", -- 00001430 - X"3C04BFC0", -- 00001434 - X"2484175C", -- 00001438 - X"0FF000B0", -- 0000143C - X"AFA20150", -- 00001440 - X"8FA4014C", -- 00001444 - X"0FF000E8", -- 00001448 - X"00000000", -- 0000144C - X"0FF000B0", -- 00001450 - X"02A02021", -- 00001454 - X"3C04BFC0", -- 00001458 - X"0FF000B0", -- 0000145C - X"24841778", -- 00001460 - X"0FF000E8", -- 00001464 - X"02402021", -- 00001468 - X"0FF000B0", -- 0000146C - X"02A02021", -- 00001470 - X"3C04BFC0", -- 00001474 - X"0FF000B0", -- 00001478 - X"24841794", -- 0000147C - X"8FA40150", -- 00001480 - X"0FF000E8", -- 00001484 - X"00000000", -- 00001488 - X"0FF000B0", -- 0000148C - X"02A02021", -- 00001490 - X"3C04BFC0", -- 00001494 - X"0FF000B0", -- 00001498 - X"248417B0", -- 0000149C - X"8FA6014C", -- 000014A0 - X"02202021", -- 000014A4 - X"24C60100", -- 000014A8 - X"0FF00304", -- 000014AC - X"02402821", -- 000014B0 - X"0440001F", -- 000014B4 - X"00408021", -- 000014B8 - X"0FF000B0", -- 000014BC - X"02C02021", -- 000014C0 - X"0FF000B0", -- 000014C4 - X"03C02021", -- 000014C8 - X"02202021", -- 000014CC - X"02402821", -- 000014D0 - X"27A60140", -- 000014D4 - X"0FF00334", -- 000014D8 - X"24070100", -- 000014DC - X"04400014", -- 000014E0 - X"00408021", -- 000014E4 - X"8FA50148", -- 000014E8 - X"8FA60144", -- 000014EC - X"8FA7014C", -- 000014F0 - X"0FF00334", -- 000014F4 - X"02202021", -- 000014F8 - X"0440000D", -- 000014FC - X"00408021", -- 00001500 - X"0FF000B0", -- 00001504 - X"02C02021", -- 00001508 - X"3C04BFC0", -- 0000150C - X"0FF000B0", -- 00001510 - X"248417E0", -- 00001514 - X"8FA50148", -- 00001518 - X"8FA60144", -- 0000151C - X"8FA7014C", -- 00001520 - X"0FF0033C", -- 00001524 - X"02202021", -- 00001528 - X"0441000A", -- 0000152C - X"00408021", -- 00001530 - X"0FF000B0", -- 00001534 - X"268417C0", -- 00001538 - X"0FF000E8", -- 0000153C - X"02002021", -- 00001540 - X"3C04BFC0", -- 00001544 - X"0FF000B0", -- 00001548 - X"248417CC", -- 0000154C - X"0BF0055B", -- 00001550 - X"00000000", -- 00001554 - X"0FF000B0", -- 00001558 - X"02E02021", -- 0000155C - X"3C02BFC0", -- 00001560 - X"00400008", -- 00001564 - X"00000000", -- 00001568 - X"0601FF7E", -- 0000156C - X"27B00040", -- 00001570 - X"0BF004D6", -- 00001574 - X"3C04BFC0", -- 00001578 - X"8FBF0264", -- 0000157C - X"8FBE0260", -- 00001580 - X"8FB7025C", -- 00001584 - X"8FB60258", -- 00001588 - X"8FB50254", -- 0000158C - X"8FB40250", -- 00001590 - X"8FB3024C", -- 00001594 - X"8FB20248", -- 00001598 - X"8FB10244", -- 0000159C - X"8FB00240", -- 000015A0 - X"03E00008", -- 000015A4 - X"27BD0268", -- 000015A8 - X"2CC20010", -- 000015AC - X"00804821", -- 000015B0 - X"1440002D", -- 000015B4 - X"00804021", -- 000015B8 - X"30870003", -- 000015BC - X"10E0000E", -- 000015C0 - X"24820004", -- 000015C4 - X"00052600", -- 000015C8 - X"00471023", -- 000015CC - X"00042603", -- 000015D0 - X"01201821", -- 000015D4 - X"A0640000", -- 000015D8 - X"24630001", -- 000015DC - X"1462FFFD", -- 000015E0 - X"00000000", -- 000015E4 - X"00071027", -- 000015E8 - X"24C3FFFB", -- 000015EC - X"24440005", -- 000015F0 - X"00623023", -- 000015F4 - X"01244021", -- 000015F8 - X"30A500FF", -- 000015FC - X"01003821", -- 00001600 - X"10A00005", -- 00001604 - X"00A01821", -- 00001608 - X"00051200", -- 0000160C - X"00451025", -- 00001610 - X"00021C00", -- 00001614 - X"00621825", -- 00001618 - X"000610C2", -- 0000161C - X"1040001C", -- 00001620 - X"30C60007", -- 00001624 - X"01002021", -- 00001628 - X"00403821", -- 0000162C - X"24E7FFFF", -- 00001630 - X"AC830000", -- 00001634 - X"AC830004", -- 00001638 - X"14E0FFFC", -- 0000163C - X"24840008", -- 00001640 - X"000210C0", -- 00001644 - X"01023821", -- 00001648 - X"00E02021", -- 0000164C - X"2CC20004", -- 00001650 - X"14400005", -- 00001654 - X"00804021", -- 00001658 - X"ACE30000", -- 0000165C - X"24E40004", -- 00001660 - X"24C6FFFC", -- 00001664 - X"00804021", -- 00001668 - X"10C00007", -- 0000166C - X"00000000", -- 00001670 - X"00051600", -- 00001674 - X"00021603", -- 00001678 - X"24C6FFFF", -- 0000167C - X"A1020000", -- 00001680 - X"14C0FFFD", -- 00001684 - X"25080001", -- 00001688 - X"03E00008", -- 0000168C - X"01201021", -- 00001690 - X"0BF00594", -- 00001694 - X"01002021", -- 00001698 - X"3A200000", -- 0000169C - X"20202000", -- 000016A0 - X"43616E6E", -- 000016A4 - X"6F742066", -- 000016A8 - X"696E6420", -- 000016AC - X"666C6173", -- 000016B0 - X"68206465", -- 000016B4 - X"76696365", -- 000016B8 - X"2E204578", -- 000016BC - X"6974206E", -- 000016C0 - X"6F77210A", -- 000016C4 - X"0A000000", -- 000016C8 - X"496E7661", -- 000016CC - X"6C696420", -- 000016D0 - X"696D6167", -- 000016D4 - X"6520666F", -- 000016D8 - X"756E6420", -- 000016DC - X"61742000", -- 000016E0 - X"2E204162", -- 000016E4 - X"6F72742E", -- 000016E8 - X"0A000000", -- 000016EC - X"426F6F74", -- 000016F0 - X"696E6720", -- 000016F4 - X"6170706C", -- 000016F8 - X"69636174", -- 000016FC - X"696F6E20", -- 00001700 - X"66726F6D", -- 00001704 - X"20666C61", -- 00001708 - X"73682028", -- 0000170C - X"00000000", -- 00001710 - X"292E2E2E", -- 00001714 - X"00000000", -- 00001718 - X"646F6E65", -- 0000171C - X"0A000000", -- 00001720 - X"45786563", -- 00001724 - X"75746520", -- 00001728 - X"61742000", -- 0000172C - X"52656164", -- 00001730 - X"696E6720", -- 00001734 - X"4845582D", -- 00001738 - X"5265636F", -- 0000173C - X"72642066", -- 00001740 - X"726F6D20", -- 00001744 - X"55415254", -- 00001748 - X"2E2E0000", -- 0000174C - X"2E000000", -- 00001750 - X"646F6E65", -- 00001754 - X"0A0A0000", -- 00001758 - X"53697A65", -- 0000175C - X"206F6620", -- 00001760 - X"6170706C", -- 00001764 - X"69636174", -- 00001768 - X"696F6E20", -- 0000176C - X"2020203A", -- 00001770 - X"20000000", -- 00001774 - X"50726F67", -- 00001778 - X"72616D6D", -- 0000177C - X"696E6720", -- 00001780 - X"666C6173", -- 00001784 - X"68206174", -- 00001788 - X"2020203A", -- 0000178C - X"20000000", -- 00001790 - X"4E657874", -- 00001794 - X"20667265", -- 00001798 - X"6520666C", -- 0000179C - X"61736820", -- 000017A0 - X"6F666673", -- 000017A4 - X"6574203A", -- 000017A8 - X"20000000", -- 000017AC - X"466C6173", -- 000017B0 - X"68206572", -- 000017B4 - X"6173652E", -- 000017B8 - X"2E2E0000", -- 000017BC - X"6661696C", -- 000017C0 - X"65642028", -- 000017C4 - X"00000000", -- 000017C8 - X"290A0000", -- 000017CC - X"466C6173", -- 000017D0 - X"68207772", -- 000017D4 - X"6974652E", -- 000017D8 - X"2E2E0000", -- 000017DC - X"466C6173", -- 000017E0 - X"68207665", -- 000017E4 - X"72696679", -- 000017E8 - X"2E2E2E00", -- 000017EC - X"70617373", -- 000017F0 - X"65640A00", -- 000017F4 - X"00000000", -- 000017F8 - X"00000000", -- 000017FC - X"00000000", -- 00001800 - X"00000000", -- 00001804 - X"00000000", -- 00001808 - X"00000000", -- 0000180C - X"00000000", -- 00001810 - X"00000000", -- 00001814 - X"00000000", -- 00001818 - X"00000000", -- 0000181C - X"00000000", -- 00001820 - X"00000000", -- 00001824 - X"00000000", -- 00001828 - X"00000000", -- 0000182C - X"00000000", -- 00001830 - X"00000000", -- 00001834 - X"00000000", -- 00001838 - X"00000000", -- 0000183C - X"00000000", -- 00001840 - X"00000000", -- 00001844 - X"00000000", -- 00001848 - X"00000000", -- 0000184C - X"00000000", -- 00001850 - X"00000000", -- 00001854 - X"00000000", -- 00001858 - X"00000000", -- 0000185C - X"00000000", -- 00001860 - X"00000000", -- 00001864 - X"00000000", -- 00001868 - X"00000000", -- 0000186C - X"00000000", -- 00001870 - X"00000000", -- 00001874 - X"00000000", -- 00001878 - X"00000000", -- 0000187C - X"00000000", -- 00001880 - X"00000000", -- 00001884 - X"00000000", -- 00001888 - X"00000000", -- 0000188C - X"00000000", -- 00001890 - X"00000000", -- 00001894 - X"00000000", -- 00001898 - X"00000000", -- 0000189C - X"00000000", -- 000018A0 - X"00000000", -- 000018A4 - X"00000000", -- 000018A8 - X"00000000", -- 000018AC - X"00000000", -- 000018B0 - X"00000000", -- 000018B4 - X"00000000", -- 000018B8 - X"00000000", -- 000018BC - X"00000000", -- 000018C0 - X"00000000", -- 000018C4 - X"00000000", -- 000018C8 - X"00000000", -- 000018CC - X"00000000", -- 000018D0 - X"00000000", -- 000018D4 - X"00000000", -- 000018D8 - X"00000000", -- 000018DC - X"00000000", -- 000018E0 - X"00000000", -- 000018E4 - X"00000000", -- 000018E8 - X"00000000", -- 000018EC - X"00000000", -- 000018F0 - X"00000000", -- 000018F4 - X"00000000", -- 000018F8 - X"00000000", -- 000018FC - X"00000000", -- 00001900 - X"00000000", -- 00001904 - X"00000000", -- 00001908 - X"00000000", -- 0000190C - X"00000000", -- 00001910 - X"00000000", -- 00001914 - X"00000000", -- 00001918 - X"00000000", -- 0000191C - X"00000000", -- 00001920 - X"00000000", -- 00001924 - X"00000000", -- 00001928 - X"00000000", -- 0000192C - X"00000000", -- 00001930 - X"00000000", -- 00001934 - X"00000000", -- 00001938 - X"00000000", -- 0000193C - X"00000000", -- 00001940 - X"00000000", -- 00001944 - X"00000000", -- 00001948 - X"00000000", -- 0000194C - X"00000000", -- 00001950 - X"00000000", -- 00001954 - X"00000000", -- 00001958 - X"00000000", -- 0000195C - X"00000000", -- 00001960 - X"00000000", -- 00001964 - X"00000000", -- 00001968 - X"00000000", -- 0000196C - X"00000000", -- 00001970 - X"00000000", -- 00001974 - X"00000000", -- 00001978 - X"00000000", -- 0000197C - X"00000000", -- 00001980 - X"00000000", -- 00001984 - X"00000000", -- 00001988 - X"00000000", -- 0000198C - X"00000000", -- 00001990 - X"00000000", -- 00001994 - X"00000000", -- 00001998 - X"00000000", -- 0000199C - X"00000000", -- 000019A0 - X"00000000", -- 000019A4 - X"00000000", -- 000019A8 - X"00000000", -- 000019AC - X"00000000", -- 000019B0 - X"00000000", -- 000019B4 - X"00000000", -- 000019B8 - X"00000000", -- 000019BC - X"00000000", -- 000019C0 - X"00000000", -- 000019C4 - X"00000000", -- 000019C8 - X"00000000", -- 000019CC - X"00000000", -- 000019D0 - X"00000000", -- 000019D4 - X"00000000", -- 000019D8 - X"00000000", -- 000019DC - X"00000000", -- 000019E0 - X"00000000", -- 000019E4 - X"00000000", -- 000019E8 - X"00000000", -- 000019EC - X"00000000", -- 000019F0 - X"00000000", -- 000019F4 - X"00000000", -- 000019F8 - X"00000000", -- 000019FC - X"00000000", -- 00001A00 - X"00000000", -- 00001A04 - X"00000000", -- 00001A08 - X"00000000", -- 00001A0C - X"00000000", -- 00001A10 - X"00000000", -- 00001A14 - X"00000000", -- 00001A18 - X"00000000", -- 00001A1C - X"00000000", -- 00001A20 - X"00000000", -- 00001A24 - X"00000000", -- 00001A28 - X"00000000", -- 00001A2C - X"00000000", -- 00001A30 - X"00000000", -- 00001A34 - X"00000000", -- 00001A38 - X"00000000", -- 00001A3C - X"00000000", -- 00001A40 - X"00000000", -- 00001A44 - X"00000000", -- 00001A48 - X"00000000", -- 00001A4C - X"00000000", -- 00001A50 - X"00000000", -- 00001A54 - X"00000000", -- 00001A58 - X"00000000", -- 00001A5C - X"00000000", -- 00001A60 - X"00000000", -- 00001A64 - X"00000000", -- 00001A68 - X"00000000", -- 00001A6C - X"00000000", -- 00001A70 - X"00000000", -- 00001A74 - X"00000000", -- 00001A78 - X"00000000", -- 00001A7C - X"00000000", -- 00001A80 - X"00000000", -- 00001A84 - X"00000000", -- 00001A88 - X"00000000", -- 00001A8C - X"00000000", -- 00001A90 - X"00000000", -- 00001A94 - X"00000000", -- 00001A98 - X"00000000", -- 00001A9C - X"00000000", -- 00001AA0 - X"00000000", -- 00001AA4 - X"00000000", -- 00001AA8 - X"00000000", -- 00001AAC - X"00000000", -- 00001AB0 - X"00000000", -- 00001AB4 - X"00000000", -- 00001AB8 - X"00000000", -- 00001ABC - X"00000000", -- 00001AC0 - X"00000000", -- 00001AC4 - X"00000000", -- 00001AC8 - X"00000000", -- 00001ACC - X"00000000", -- 00001AD0 - X"00000000", -- 00001AD4 - X"00000000", -- 00001AD8 - X"00000000", -- 00001ADC - X"00000000", -- 00001AE0 - X"00000000", -- 00001AE4 - X"00000000", -- 00001AE8 - X"00000000", -- 00001AEC - X"00000000", -- 00001AF0 - X"00000000", -- 00001AF4 - X"00000000", -- 00001AF8 - X"00000000", -- 00001AFC - X"00000000", -- 00001B00 - X"00000000", -- 00001B04 - X"00000000", -- 00001B08 - X"00000000", -- 00001B0C - X"00000000", -- 00001B10 - X"00000000", -- 00001B14 - X"00000000", -- 00001B18 - X"00000000", -- 00001B1C - X"00000000", -- 00001B20 - X"00000000", -- 00001B24 - X"00000000", -- 00001B28 - X"00000000", -- 00001B2C - X"00000000", -- 00001B30 - X"00000000", -- 00001B34 - X"00000000", -- 00001B38 - X"00000000", -- 00001B3C - X"00000000", -- 00001B40 - X"00000000", -- 00001B44 - X"00000000", -- 00001B48 - X"00000000", -- 00001B4C - X"00000000", -- 00001B50 - X"00000000", -- 00001B54 - X"00000000", -- 00001B58 - X"00000000", -- 00001B5C - X"00000000", -- 00001B60 - X"00000000", -- 00001B64 - X"00000000", -- 00001B68 - X"00000000", -- 00001B6C - X"00000000", -- 00001B70 - X"00000000", -- 00001B74 - X"00000000", -- 00001B78 - X"00000000", -- 00001B7C - X"00000000", -- 00001B80 - X"00000000", -- 00001B84 - X"00000000", -- 00001B88 - X"00000000", -- 00001B8C - X"00000000", -- 00001B90 - X"00000000", -- 00001B94 - X"00000000", -- 00001B98 - X"00000000", -- 00001B9C - X"00000000", -- 00001BA0 - X"00000000", -- 00001BA4 - X"00000000", -- 00001BA8 - X"00000000", -- 00001BAC - X"00000000", -- 00001BB0 - X"00000000", -- 00001BB4 - X"00000000", -- 00001BB8 - X"00000000", -- 00001BBC - X"00000000", -- 00001BC0 - X"00000000", -- 00001BC4 - X"00000000", -- 00001BC8 - X"00000000", -- 00001BCC - X"00000000", -- 00001BD0 - X"00000000", -- 00001BD4 - X"00000000", -- 00001BD8 - X"00000000", -- 00001BDC - X"00000000", -- 00001BE0 - X"00000000", -- 00001BE4 - X"00000000", -- 00001BE8 - X"00000000", -- 00001BEC - X"00000000", -- 00001BF0 - X"00000000", -- 00001BF4 - X"00000000", -- 00001BF8 - X"00000000", -- 00001BFC - X"00000000", -- 00001C00 - X"00000000", -- 00001C04 - X"00000000", -- 00001C08 - X"00000000", -- 00001C0C - X"00000000", -- 00001C10 - X"00000000", -- 00001C14 - X"00000000", -- 00001C18 - X"00000000", -- 00001C1C - X"00000000", -- 00001C20 - X"00000000", -- 00001C24 - X"00000000", -- 00001C28 - X"00000000", -- 00001C2C - X"00000000", -- 00001C30 - X"00000000", -- 00001C34 - X"00000000", -- 00001C38 - X"00000000", -- 00001C3C - X"00000000", -- 00001C40 - X"00000000", -- 00001C44 - X"00000000", -- 00001C48 - X"00000000", -- 00001C4C - X"00000000", -- 00001C50 - X"00000000", -- 00001C54 - X"00000000", -- 00001C58 - X"00000000", -- 00001C5C - X"00000000", -- 00001C60 - X"00000000", -- 00001C64 - X"00000000", -- 00001C68 - X"00000000", -- 00001C6C - X"00000000", -- 00001C70 - X"00000000", -- 00001C74 - X"00000000", -- 00001C78 - X"00000000", -- 00001C7C - X"00000000", -- 00001C80 - X"00000000", -- 00001C84 - X"00000000", -- 00001C88 - X"00000000", -- 00001C8C - X"00000000", -- 00001C90 - X"00000000", -- 00001C94 - X"00000000", -- 00001C98 - X"00000000", -- 00001C9C - X"00000000", -- 00001CA0 - X"00000000", -- 00001CA4 - X"00000000", -- 00001CA8 - X"00000000", -- 00001CAC - X"00000000", -- 00001CB0 - X"00000000", -- 00001CB4 - X"00000000", -- 00001CB8 - X"00000000", -- 00001CBC - X"00000000", -- 00001CC0 - X"00000000", -- 00001CC4 - X"00000000", -- 00001CC8 - X"00000000", -- 00001CCC - X"00000000", -- 00001CD0 - X"00000000", -- 00001CD4 - X"00000000", -- 00001CD8 - X"00000000", -- 00001CDC - X"00000000", -- 00001CE0 - X"00000000", -- 00001CE4 - X"00000000", -- 00001CE8 - X"00000000", -- 00001CEC - X"00000000", -- 00001CF0 - X"00000000", -- 00001CF4 - X"00000000", -- 00001CF8 - X"00000000", -- 00001CFC - X"00000000", -- 00001D00 - X"00000000", -- 00001D04 - X"00000000", -- 00001D08 - X"00000000", -- 00001D0C - X"00000000", -- 00001D10 - X"00000000", -- 00001D14 - X"00000000", -- 00001D18 - X"00000000", -- 00001D1C - X"00000000", -- 00001D20 - X"00000000", -- 00001D24 - X"00000000", -- 00001D28 - X"00000000", -- 00001D2C - X"00000000", -- 00001D30 - X"00000000", -- 00001D34 - X"00000000", -- 00001D38 - X"00000000", -- 00001D3C - X"00000000", -- 00001D40 - X"00000000", -- 00001D44 - X"00000000", -- 00001D48 - X"00000000", -- 00001D4C - X"00000000", -- 00001D50 - X"00000000", -- 00001D54 - X"00000000", -- 00001D58 - X"00000000", -- 00001D5C - X"00000000", -- 00001D60 - X"00000000", -- 00001D64 - X"00000000", -- 00001D68 - X"00000000", -- 00001D6C - X"00000000", -- 00001D70 - X"00000000", -- 00001D74 - X"00000000", -- 00001D78 - X"00000000", -- 00001D7C - X"00000000", -- 00001D80 - X"00000000", -- 00001D84 - X"00000000", -- 00001D88 - X"00000000", -- 00001D8C - X"00000000", -- 00001D90 - X"00000000", -- 00001D94 - X"00000000", -- 00001D98 - X"00000000", -- 00001D9C - X"00000000", -- 00001DA0 - X"00000000", -- 00001DA4 - X"00000000", -- 00001DA8 - X"00000000", -- 00001DAC - X"00000000", -- 00001DB0 - X"00000000", -- 00001DB4 - X"00000000", -- 00001DB8 - X"00000000", -- 00001DBC - X"00000000", -- 00001DC0 - X"00000000", -- 00001DC4 - X"00000000", -- 00001DC8 - X"00000000", -- 00001DCC - X"00000000", -- 00001DD0 - X"00000000", -- 00001DD4 - X"00000000", -- 00001DD8 - X"00000000", -- 00001DDC - X"00000000", -- 00001DE0 - X"00000000", -- 00001DE4 - X"00000000", -- 00001DE8 - X"00000000", -- 00001DEC - X"00000000", -- 00001DF0 - X"00000000", -- 00001DF4 - X"00000000", -- 00001DF8 - X"00000000", -- 00001DFC - X"00000000", -- 00001E00 - X"00000000", -- 00001E04 - X"00000000", -- 00001E08 - X"00000000", -- 00001E0C - X"00000000", -- 00001E10 - X"00000000", -- 00001E14 - X"00000000", -- 00001E18 - X"00000000", -- 00001E1C - X"00000000", -- 00001E20 - X"00000000", -- 00001E24 - X"00000000", -- 00001E28 - X"00000000", -- 00001E2C - X"00000000", -- 00001E30 - X"00000000", -- 00001E34 - X"00000000", -- 00001E38 - X"00000000", -- 00001E3C - X"00000000", -- 00001E40 - X"00000000", -- 00001E44 - X"00000000", -- 00001E48 - X"00000000", -- 00001E4C - X"00000000", -- 00001E50 - X"00000000", -- 00001E54 - X"00000000", -- 00001E58 - X"00000000", -- 00001E5C - X"00000000", -- 00001E60 - X"00000000", -- 00001E64 - X"00000000", -- 00001E68 - X"00000000", -- 00001E6C - X"00000000", -- 00001E70 - X"00000000", -- 00001E74 - X"00000000", -- 00001E78 - X"00000000", -- 00001E7C - X"00000000", -- 00001E80 - X"00000000", -- 00001E84 - X"00000000", -- 00001E88 - X"00000000", -- 00001E8C - X"00000000", -- 00001E90 - X"00000000", -- 00001E94 - X"00000000", -- 00001E98 - X"00000000", -- 00001E9C - X"00000000", -- 00001EA0 - X"00000000", -- 00001EA4 - X"00000000", -- 00001EA8 - X"00000000", -- 00001EAC - X"00000000", -- 00001EB0 - X"00000000", -- 00001EB4 - X"00000000", -- 00001EB8 - X"00000000", -- 00001EBC - X"00000000", -- 00001EC0 - X"00000000", -- 00001EC4 - X"00000000", -- 00001EC8 - X"00000000", -- 00001ECC - X"00000000", -- 00001ED0 - X"00000000", -- 00001ED4 - X"00000000", -- 00001ED8 - X"00000000", -- 00001EDC - X"00000000", -- 00001EE0 - X"00000000", -- 00001EE4 - X"00000000", -- 00001EE8 - X"00000000", -- 00001EEC - X"00000000", -- 00001EF0 - X"00000000", -- 00001EF4 - X"00000000", -- 00001EF8 - X"00000000", -- 00001EFC - X"00000000", -- 00001F00 - X"00000000", -- 00001F04 - X"00000000", -- 00001F08 - X"00000000", -- 00001F0C - X"00000000", -- 00001F10 - X"00000000", -- 00001F14 - X"00000000", -- 00001F18 - X"00000000", -- 00001F1C - X"00000000", -- 00001F20 - X"00000000", -- 00001F24 - X"00000000", -- 00001F28 - X"00000000", -- 00001F2C - X"00000000", -- 00001F30 - X"00000000", -- 00001F34 - X"00000000", -- 00001F38 - X"00000000", -- 00001F3C - X"00000000", -- 00001F40 - X"00000000", -- 00001F44 - X"00000000", -- 00001F48 - X"00000000", -- 00001F4C - X"00000000", -- 00001F50 - X"00000000", -- 00001F54 - X"00000000", -- 00001F58 - X"00000000", -- 00001F5C - X"00000000", -- 00001F60 - X"00000000", -- 00001F64 - X"00000000", -- 00001F68 - X"00000000", -- 00001F6C - X"00000000", -- 00001F70 - X"00000000", -- 00001F74 - X"00000000", -- 00001F78 - X"00000000", -- 00001F7C - X"00000000", -- 00001F80 - X"00000000", -- 00001F84 - X"00000000", -- 00001F88 - X"00000000", -- 00001F8C - X"00000000", -- 00001F90 - X"00000000", -- 00001F94 - X"00000000", -- 00001F98 - X"00000000", -- 00001F9C - X"00000000", -- 00001FA0 - X"00000000", -- 00001FA4 - X"00000000", -- 00001FA8 - X"00000000", -- 00001FAC - X"00000000", -- 00001FB0 - X"00000000", -- 00001FB4 - X"00000000", -- 00001FB8 - X"00000000", -- 00001FBC - X"00000000", -- 00001FC0 - X"00000000", -- 00001FC4 - X"00000000", -- 00001FC8 - X"00000000", -- 00001FCC - X"00000000", -- 00001FD0 - X"00000000", -- 00001FD4 - X"00000000", -- 00001FD8 - X"00000000", -- 00001FDC - X"00000000", -- 00001FE0 - X"00000000", -- 00001FE4 - X"00000000", -- 00001FE8 - X"00000000", -- 00001FEC - X"00000000", -- 00001FF0 - X"00000000", -- 00001FF4 - X"00000000", -- 00001FF8 - X"00000000" -- 00001FFC - ); - -begin - -PROM_READ: - process(clk) - begin - if rising_edge(clk) and ce = '1' then - dout <= word_array(to_integer(addr(12 downto 2))); - end if; - end process; - -end data; diff --git a/lib/CPUs/MIPS/src/core/.directory_history b/lib/CPUs/MIPS/src/core/.directory_history deleted file mode 100644 index 1dd52df..0000000 --- a/lib/CPUs/MIPS/src/core/.directory_history +++ /dev/null @@ -1,12 +0,0 @@ -VHDL/lib/CPUs/MIPS/src/core/dcache.vhd -VHDL/lib/CPUs/MIPS/src/core/mips_dcache.vhd -VHDL/lib/CPUs/MIPS/src/core/icache.vhd -VHDL/lib/CPUs/MIPS/src/core/mips_icache.vhd -VHDL/lib/CPUs/MIPS/src/core/mips_biu.vhd - -VHDL/lib/CPUs/MIPS/src/core/mips_bui.vhd -VHDL/lib/CPUs/MIPS/src/core/mips_biu.vhd -VHDL/lib/CPUs/MIPS/src/core/mips_dcache.vhd - -VHDL/lib/CPUs/MIPS/src/core/mips_icache.vhd - diff --git a/lib/CPUs/MIPS/src/core/dcache.vhd b/lib/CPUs/MIPS/src/core/dcache.vhd deleted file mode 100644 index e2c335d..0000000 --- a/lib/CPUs/MIPS/src/core/dcache.vhd +++ /dev/null @@ -1,531 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: JIPS top file --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -library work; -use work.mips_types.all; - -ENTITY dcache IS - Generic - ( - cache_size : natural := 2048; -- words - line_size : natural := 8 -- words - ); - Port - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - MRDY_O : out STD_LOGIC; - ADDR_O : out word_t; - DAT_I : in word_t; - STB_O : out STD_LOGIC; - CYC_O : out STD_LOGIC; - ctrl : in cache_ctrl_t; - cpu_en : in STD_LOGIC; - cpu_we : in STD_LOGIC; - cpu_be : in unsigned(3 downto 0); - cpu_addr : in word_t; - cpu_din : in word_t; - cpu_dout : out word_t; - cpu_busy : out STD_LOGIC - ); -END dcache; - -ARCHITECTURE behavior OF dcache IS - -COMPONENT dpram_1w1r - GENERIC - ( - addr_width : integer := 3; - data_width : integer := 8 - ); - PORT ( - clka : in STD_LOGIC; - clkb : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -END COMPONENT; - -COMPONENT dpram_2w2r is - GENERIC - ( - addr_width : integer := 3; - data_width : integer := 8 - ); - PORT - ( - clk_a : in STD_LOGIC; - clk_b : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - we_b : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - din_b : in unsigned (data_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -END COMPONENT; - - constant addr_width : natural := 32; - constant word_index_width : natural := lg2(line_size); - constant cache_index_width : natural := lg2(cache_size) - word_index_width; - constant tag_width : natural := addr_width - word_index_width - cache_index_width - 2; - constant tag_parity_width : natural := 3; - constant tag_ram_data_width : natural := 1 + tag_parity_width + tag_width; - constant tag_ram_addr_width : natural := cache_index_width; - - subtype tag_ram_data_t is unsigned (tag_ram_data_width-1 downto 0); - - type dcache_entry_t is record - valid : std_logic; - tv_p : unsigned(tag_parity_width-1 downto 0); - tag : unsigned(tag_width-1 downto 0); - end record; - - function to_dcache_entry(x : tag_ram_data_t) return dcache_entry_t is - variable result : dcache_entry_t; - begin - result.valid := x(0); - result.tv_p := x(3 downto 1); - result.tag := x(tag_width+3 downto 4); - - return result; - end to_dcache_entry; - - function to_tag_ram_data(x : dcache_entry_t) return tag_ram_data_t is - variable result : tag_ram_data_t; - begin - result(0) := x.valid; - result(3 downto 1) := x.tv_p; - result(tag_width+3 downto 4) := x.tag; - - return result; - end to_tag_ram_data; - - type cache_state_t is (init, ready, invalidate, flush, mem_request, mem_access, mem_data, rd_cache); - signal s, sn : cache_state_t; - - signal cache_req : std_logic; - signal cache_ack : std_logic; - signal cache_busy : std_logic; - signal cache_hit : std_logic; - signal tag_match : std_logic; - signal cache_hit_inv : std_logic; - signal tag_match_inv : std_logic; - - signal request_addr : unsigned(addr_width-1 downto 0); - signal fill_addr : unsigned(addr_width-1 downto 0); - - signal cache_index_inv : unsigned(cache_index_width-1 downto 0); - signal tag_inv : unsigned(tag_width-1 downto 0); - signal tag_reg_inv : unsigned(tag_width-1 downto 0); - - signal cache_entry_in : dcache_entry_t; - signal cache_entry_out : dcache_entry_t; - signal cache_entry_out_inv : dcache_entry_t; - signal cpu_data_ram_addr : unsigned(lg2(cache_size)-1 downto 0); - signal cpu_data_ram_dout : word_t; - signal cpu_data_reg : word_t; - signal cpu_be_reg : unsigned(3 downto 0); - signal cpu_we_reg : std_logic; - signal ctrl_data_ram_addr : unsigned(lg2(cache_size)-1 downto 0); - signal ctrl_data_ram_we : unsigned(3 downto 0); - signal cpu_data_ram_we : unsigned(3 downto 0); - signal cpu_we2 : std_logic; - - signal tag_ram_addr_rd : unsigned(cache_index_width-1 downto 0); - signal tag_ram_dout : tag_ram_data_t; - signal tag_ram_dout_inv : tag_ram_data_t; - signal tag_ram_addr_wr : unsigned(cache_index_width-1 downto 0); - signal tag_ram_din : tag_ram_data_t; - signal tag_ram_we : std_logic; - - signal fill_count : natural range 0 to 2**word_index_width-1; - signal fill_count_en : std_logic; - signal fill_count_rdy : std_logic; - signal flush_count : natural range 0 to 2**cache_index_width-1; - signal flush_count_rst : std_logic; - signal flush_count_en : std_logic; - signal flush_count_rdy : std_logic; - signal request_count : natural range 0 to 2**word_index_width-1; - signal request_count_en : std_logic; - signal request_count_rdy : std_logic; - signal was_miss : std_logic; - signal invalidate_all : std_logic; - signal invalidate_ack : std_logic; - signal invalidate_en : std_logic; - signal invalidate_req : std_logic; - signal cpu_hit_we : std_logic; - signal instant_raw : std_logic; - signal hit_cache_index : unsigned(cache_index_width-1 downto 0); - - alias cpu_word_index is cpu_addr(word_index_width+1 downto 2); - alias cpu_cache_index is cpu_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - alias cpu_tag is cpu_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - - alias fill_word_index is fill_addr(word_index_width+1 downto 2); - alias fill_cache_index is fill_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - alias fill_tag is fill_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - - alias req_word_index is request_addr(word_index_width+1 downto 2); - alias req_cache_index is request_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - alias req_tag is request_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - -begin - - cache_index_inv <= ctrl.inv_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - tag_inv <= ctrl.inv_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - - cpu_hit_we <= cpu_we2 and cache_hit; - -fill_address_register: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if fill_count_en = '1' then - if ACK_I = '1' then - fill_word_index <= fill_word_index + 1; - end if; - elsif cache_busy = '0' then - fill_addr <= cpu_addr(addr_width-1 downto 2) & "00"; - end if; - end if; - end process; - -request_address_register: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_count_en = '1'then - if SRDY_I = '1' then - req_word_index <= req_word_index + 1; - end if; - elsif cache_busy = '0' then - request_addr <= cpu_addr(addr_width-1 downto 2) & "00"; - end if; - end if; - end process; - -cpu_request_register: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - cpu_we_reg <= '0'; - cache_req <= '0'; - elsif cpu_en = '1' then - if cache_busy = '0' then - cpu_we2 <= cpu_we; - cache_req <= '1'; - cpu_data_reg <= cpu_din; - cpu_be_reg <= cpu_be; - cpu_we_reg <= cpu_we; - if cpu_we = '1' then - hit_cache_index <= cpu_cache_index; - end if; - end if; - elsif cache_ack = '1' then - cache_req <= '0'; - cpu_we2 <= '0'; - end if; - end if; - end process; - -instant_raw_logic: - process(CLK_I) - begin - if rising_edge(CLK_I) then - instant_raw <= '0'; - if cpu_word_index = fill_word_index and cpu_cache_index = hit_cache_index then - instant_raw <= cpu_hit_we and cpu_en and not cpu_we; - end if; - end if; - end process; - -inst_tag_ram : dpram_2w2r - GENERIC MAP - ( - addr_width => tag_ram_addr_width, - data_width => tag_ram_data_width - ) - PORT MAP - ( - clk_a => CLK_I, - clk_b => CLK_I, - en_a => '1', - en_b => '1', - we_a => tag_ram_we, - we_b => '0', - addr_a => tag_ram_addr_wr, - addr_b => tag_ram_addr_rd, - din_a => tag_ram_din, - din_b => tag_ram_din, - dout_a => tag_ram_dout_inv, - dout_b => tag_ram_dout - ); - -gen_data_ram: - for i in 0 to 3 generate - begin - - inst_data_ram : dpram_2w2r - GENERIC MAP - ( - addr_width => lg2(cache_size), - data_width => word_t'length/4 - ) - PORT MAP - ( - clk_a => CLK_I, - clk_b => CLK_I, - en_a => '1', - en_b => '1', - we_a => cpu_data_ram_we(i), - we_b => ctrl_data_ram_we(i), - addr_a => ctrl_data_ram_addr, - addr_b => cpu_data_ram_addr, - din_a => cpu_data_reg(8*(i+1)-1 downto 8*i), - din_b => DAT_I(8*(i+1)-1 downto 8*i), - dout_a => open, - dout_b => cpu_data_ram_dout(8*(i+1)-1 downto 8*i) - ); - end generate; - - - -cache_invalidate_request: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' or ctrl.inv_all = '1' or ctrl.inv_at = '1' then - invalidate_req <= '1'; - invalidate_all <= ctrl.inv_all or RST_I; - tag_reg_inv <= tag_inv; - elsif invalidate_ack = '1' then - invalidate_req <= '0'; - invalidate_all <= '0'; - end if; - end if; - end process; - -cache_state_next: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - s <= init; - else - s <= sn; - end if; - end if; - end process; - - MRDY_O <= fill_count_en; - ADDR_O <= request_addr; - - cpu_busy <= cache_busy; - cpu_dout <= cpu_data_ram_dout; - - tag_match <= '1' when fill_tag = cache_entry_out.tag else '0'; - cache_hit <= tag_match and cache_entry_out.valid; - tag_match_inv <= '1' when tag_reg_inv = cache_entry_out_inv.tag else '0'; - cache_hit_inv <= tag_match_inv and cache_entry_out_inv.valid; - tag_ram_din <= to_tag_ram_data(cache_entry_in); - tag_ram_addr_wr <= to_unsigned(flush_count, cache_index_width) when invalidate_en = '1' else fill_cache_index; - tag_ram_addr_rd <= cpu_cache_index when (was_miss = '0' and instant_raw = '0') else fill_cache_index; - - cache_entry_out <= to_dcache_entry(tag_ram_dout); - cache_entry_out_inv <= to_dcache_entry(tag_ram_dout_inv); - - cpu_data_ram_addr <= (cpu_cache_index & cpu_word_index) when (was_miss = '0' and instant_raw = '0' and fill_count_en = '0') else (fill_cache_index & fill_word_index); - ctrl_data_ram_addr <= fill_cache_index & fill_word_index; - ctrl_data_ram_we <= (others => fill_count_en and ACK_I); - cpu_data_ram_we <= cpu_be_reg when (cpu_hit_we = '1') else (others => '0'); - -cache_state: - process(s, cache_req, instant_raw, cache_hit, cache_hit_inv, flush_count_rdy, fill_count_rdy, request_count_rdy, fill_tag, SRDY_I, cpu_we_reg, invalidate_req, invalidate_all) - begin - cache_busy <= cache_req; - cache_ack <= '0'; - tag_ram_we <= '0'; - flush_count_en <= '0'; - flush_count_rst <= '0'; - invalidate_en <= '0'; - request_count_en <= '0'; - fill_count_en <= '0'; - CYC_O <= '0'; - STB_O <= '0'; - was_miss <= '0'; - invalidate_ack <= '0'; - - cache_entry_in.tv_p <= (others => '0'); - cache_entry_in.tag <= fill_tag; - cache_entry_in.valid <= '0'; - sn <= s; - - case s is - when init => - sn <= ready; - when ready => - if invalidate_req = '1' then - sn <= invalidate; - invalidate_en <= '1'; - else - if cache_req = '1' then - if cache_hit = '0' and cpu_we_reg = '0' then - sn <= mem_request; - CYC_O <= '1'; - else - cache_busy <= instant_raw; - cache_ack <= not instant_raw; - end if; - end if; - end if; - when invalidate => - sn <= rd_cache; - invalidate_en <= '1'; - invalidate_ack <= '1'; - if invalidate_all = '1' then - sn <= flush; - flush_count_rst <= '1'; - elsif cache_hit_inv = '1' then - tag_ram_we <= '1'; - cache_entry_in.valid <= '0'; - cache_entry_in.tag <= (others => '0'); - sn <= rd_cache; - end if; - - when flush => - flush_count_en <= '1'; - invalidate_en <= '1'; - tag_ram_we <= '1'; - cache_entry_in.valid <= '0'; - cache_entry_in.tag <= (others => '0'); - if flush_count_rdy = '1' then - tag_ram_we <= '0'; - sn <= rd_cache; - end if; - when mem_request => - CYC_O <= '1'; - if SRDY_I = '1' then - sn <= mem_access; - end if; - when mem_access => - fill_count_en <= '1'; - request_count_en <= '1'; - CYC_O <= '1'; - STB_O <= '1'; - if request_count_rdy = '1' then - STB_O <= '0'; - sn <= mem_data; - end if; - when mem_data => - CYC_O <= '1'; - fill_count_en <= '1'; - if fill_count_rdy = '1' then - tag_ram_we <= '1'; - cache_entry_in.valid <= '1'; - sn <= rd_cache; - end if; - when rd_cache => - was_miss <= '1'; - sn <= ready; - - when others => - sn <= ready; - end case; - - end process; - -flush_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if ctrl.inv_at = '1' then - flush_count <= to_integer(cache_index_inv); - elsif flush_count_rst = '1' then - flush_count_rdy <= '0'; - flush_count <= 2**cache_index_width-1; - elsif flush_count_en = '1' then - if flush_count /= 0 then - flush_count <= flush_count - 1; - else - flush_count_rdy <= '1'; - end if; - end if; - end if; - end process; - -request_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_count_en = '0' then - request_count_rdy <= '0'; - request_count <= 2**word_index_width-1; - else - if SRDY_I = '1' then - if request_count /= 0 then - request_count <= request_count - 1; - else - request_count_rdy <= '1'; - end if; - end if; - end if; - end if; - end process; - -fill_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if fill_count_en = '0' then - fill_count_rdy <= '0'; - fill_count <= 2**word_index_width-1; - else - if ACK_I = '1' then - if fill_count /= 0 then - fill_count <= fill_count - 1; - else - fill_count_rdy <= '1'; - end if; - end if; - end if; - end if; - end process; - -end behavior; diff --git a/lib/CPUs/MIPS/src/core/icache.vhd b/lib/CPUs/MIPS/src/core/icache.vhd deleted file mode 100644 index 0c3b9aa..0000000 --- a/lib/CPUs/MIPS/src/core/icache.vhd +++ /dev/null @@ -1,488 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: JIPS top file --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -library work; -use work.mips_types.all; - -ENTITY icache IS - Generic - ( - cache_size : natural := 2048; -- words - line_size : natural := 8 -- words - ); - Port - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - MRDY_O : out STD_LOGIC; - ADDR_O : out word_t; - DAT_I : in word_t; - STB_O : out STD_LOGIC; - CYC_O : out STD_LOGIC; - ctrl : in cache_ctrl_t; - cpu_en : in STD_LOGIC; - cpu_addr : in word_t; - cpu_dout : out word_t; - cpu_busy : out STD_LOGIC - ); -END icache; - -ARCHITECTURE behavior OF icache IS - -COMPONENT dpram_1w1r - GENERIC - ( - addr_width : integer := 3; - data_width : integer := 8 - ); - PORT ( - clka : in STD_LOGIC; - clkb : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -END COMPONENT; - -COMPONENT dpram_2w2r is - GENERIC - ( - addr_width : integer := 3; - data_width : integer := 8 - ); - PORT - ( - clk_a : in STD_LOGIC; - clk_b : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - we_b : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - din_b : in unsigned (data_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -END COMPONENT; - - constant addr_width : natural := 32; - constant word_index_width : natural := lg2(line_size); - constant cache_index_width : natural := lg2(cache_size) - word_index_width; - constant tag_width : natural := addr_width - word_index_width - cache_index_width - 2; - constant tag_parity_width : natural := 3; - constant tag_ram_data_width : natural := 1 + tag_parity_width + tag_width; - constant tag_ram_addr_width : natural := cache_index_width; - - subtype tag_ram_data_t is unsigned (tag_ram_data_width-1 downto 0); - - type icache_entry_t is record - valid : std_logic; - tv_p : unsigned(tag_parity_width-1 downto 0); - tag : unsigned(tag_width-1 downto 0); - end record; - - function to_icache_entry(x : tag_ram_data_t) return icache_entry_t is - variable result : icache_entry_t; - begin - result.valid := x(0); - result.tv_p := x(3 downto 1); - result.tag := x(tag_width+3 downto 4); - - return result; - end to_icache_entry; - - function to_tag_ram_data(x : icache_entry_t) return tag_ram_data_t is - variable result : tag_ram_data_t; - begin - result(0) := x.valid; - result(3 downto 1) := x.tv_p; - result(tag_width+3 downto 4) := x.tag; - - return result; - end to_tag_ram_data; - - type cache_state_t is (init, ready, invalidate, flush, mem_request, mem_access, mem_data, rd_cache, upd_cache); - signal s, sn : cache_state_t; - - signal cache_req : std_logic; - signal cache_ack : std_logic; - signal cache_busy : std_logic; - signal cache_miss : std_logic; - signal tag_match : std_logic; - signal cache_miss_inv : std_logic; - signal tag_match_inv : std_logic; - signal request_addr : unsigned(addr_width-1 downto 0); - signal fill_addr : unsigned(addr_width-1 downto 0); - - signal cache_index_inv : unsigned(cache_index_width-1 downto 0); - signal tag_inv : unsigned(tag_width-1 downto 0); - signal tag_reg_inv : unsigned(tag_width-1 downto 0); - - signal cache_entry_in : icache_entry_t; - signal cache_entry_out : icache_entry_t; - signal cache_entry_out_inv : icache_entry_t; - signal data_ram_addr_rd : unsigned(lg2(cache_size)-1 downto 0); - signal data_ram_data_rd : word_t; - signal data_ram_addr_wr : unsigned(lg2(cache_size)-1 downto 0); - signal data_ram_data_wr : word_t; - signal data_ram_we : std_logic; - - signal tag_ram_addr_rd : unsigned(cache_index_width-1 downto 0); - signal tag_ram_data_rd : tag_ram_data_t; - signal tag_ram_data_rd_inv : tag_ram_data_t; - signal tag_ram_addr_wr : unsigned(cache_index_width-1 downto 0); - signal tag_ram_data_wr : tag_ram_data_t; - signal tag_ram_we : std_logic; - - signal fill_count : natural range 0 to 2**word_index_width-1; - signal fill_count_en : std_logic; - signal fill_count_rdy : std_logic; - signal flush_count : natural range 0 to 2**cache_index_width-1; - signal flush_count_rst : std_logic; - signal flush_count_en : std_logic; - signal flush_count_rdy : std_logic; - signal request_count : natural range 0 to 2**word_index_width-1; - signal request_count_en : std_logic; - signal request_count_rdy : std_logic; - signal ram_read_en : std_logic; - signal was_miss : std_logic; - signal invalidate_all : std_logic; - signal invalidate_ack : std_logic; - signal invalidate_en : std_logic; - signal invalidate_req : std_logic; - - alias cpu_word_index is cpu_addr(word_index_width+1 downto 2); - alias cpu_cache_index is cpu_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - alias cpu_tag is cpu_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - - alias fill_word_index is fill_addr(word_index_width+1 downto 2); - alias fill_cache_index is fill_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - alias fill_tag is fill_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - - alias req_word_index is request_addr(word_index_width+1 downto 2); - alias req_cache_index is request_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - alias req_tag is request_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - -begin - - ram_read_en <= cpu_en or was_miss; - cache_index_inv <= ctrl.inv_addr(cache_index_width+word_index_width+1 downto word_index_width+2); - tag_inv <= ctrl.inv_addr(tag_width+cache_index_width+word_index_width+1 downto cache_index_width+word_index_width+2); - - -fill_address_register: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if fill_count_en = '1' then - if ACK_I = '1' then - fill_word_index <= fill_word_index + 1; - end if; - elsif cache_busy = '0' then - fill_addr <= cpu_addr(addr_width-1 downto 2) & "00"; - end if; - end if; - end process; - -request_address_register: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_count_en = '1'then - if SRDY_I = '1' then - req_word_index <= req_word_index + 1; - end if; - elsif cache_busy = '0' then - request_addr <= cpu_addr(addr_width-1 downto 2) & "00"; - end if; - end if; - end process; - -cpu_request_register: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - cache_req <= '0'; - elsif cpu_en = '1' then - if cache_busy = '0' then - cache_req <= '1'; - end if; - elsif cache_ack = '1' then - cache_req <= '0'; - end if; - end if; - end process; - -cache_invalidate_request: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' or ctrl.inv_all = '1' or ctrl.inv_at = '1' then - invalidate_req <= '1'; - invalidate_all <= ctrl.inv_all or RST_I; - tag_reg_inv <= tag_inv; - elsif invalidate_ack = '1' then - invalidate_req <= '0'; - invalidate_all <= '0'; - end if; - end if; - end process; - -inst_tag_ram : dpram_2w2r - GENERIC MAP - ( - addr_width => tag_ram_addr_width, - data_width => tag_ram_data_width - ) - PORT MAP - ( - clk_a => CLK_I, - clk_b => CLK_I, - en_a => '1', - en_b => ram_read_en, - we_a => tag_ram_we, - we_b => '0', - addr_a => tag_ram_addr_wr, - addr_b => tag_ram_addr_rd, - din_a => tag_ram_data_wr, - din_b => tag_ram_data_wr, - dout_a => tag_ram_data_rd_inv, - dout_b => tag_ram_data_rd - ); - -inst_data_ram : dpram_1w1r - GENERIC MAP - ( - addr_width => lg2(cache_size), - data_width => word_t'length - ) - PORT MAP - ( - clka => CLK_I, - clkb => CLK_I, - en_a => '1', - en_b => ram_read_en, - we_a => data_ram_we, - addr_a => data_ram_addr_wr, - addr_b => data_ram_addr_rd, - din_a => data_ram_data_wr, - dout_b => data_ram_data_rd - ); - -cache_state_next: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - s <= init; - else - s <= sn; - end if; - end if; - end process; - - MRDY_O <= fill_count_en; - ADDR_O <= fill_tag & fill_cache_index & req_word_index & "00"; - - cpu_busy <= cache_busy; - cpu_dout <= data_ram_data_rd; - - cache_entry_out <= to_icache_entry(tag_ram_data_rd); - tag_match <= '1' when fill_tag = cache_entry_out.tag else '0'; - cache_miss <= not (tag_match and cache_entry_out.valid); - - cache_entry_out_inv <= to_icache_entry(tag_ram_data_rd_inv); - tag_match_inv <= '1' when tag_reg_inv = cache_entry_out_inv.tag else '0'; - cache_miss_inv <= not (tag_match_inv and cache_entry_out_inv.valid); - - tag_ram_data_wr <= to_tag_ram_data(cache_entry_in); - tag_ram_addr_wr <= to_unsigned(flush_count, cache_index_width) when invalidate_en = '1' else fill_cache_index; - tag_ram_addr_rd <= cpu_cache_index when was_miss = '0' else fill_cache_index; - data_ram_addr_rd <= (cpu_cache_index & cpu_word_index) when was_miss = '0' else (fill_cache_index & fill_word_index); - data_ram_addr_wr <= fill_cache_index & fill_word_index; - data_ram_data_wr <= DAT_I; - data_ram_we <= fill_count_en and ACK_I; - -cache_state: - process(s, cache_req, cache_miss, cache_miss_inv, flush_count_rdy, fill_count_rdy, request_count_rdy, fill_tag, SRDY_I, invalidate_req, invalidate_all) - begin - cache_busy <= cache_req; - cache_ack <= '0'; - tag_ram_we <= '0'; - flush_count_en <= '0'; - flush_count_rst <= '0'; - invalidate_en <= '0'; - request_count_en <= '0'; - fill_count_en <= '0'; - CYC_O <= '0'; - STB_O <= '0'; - was_miss <= '0'; - invalidate_ack <= '0'; - - cache_entry_in.tv_p <= (others => '0'); - cache_entry_in.tag <= fill_tag; - cache_entry_in.valid <= '0'; - sn <= s; - - case s is - when init => - sn <= ready; - when ready => - if invalidate_req = '1' then - sn <= invalidate; - invalidate_en <= '1'; - elsif cache_req = '1' then - if cache_miss = '1' then - sn <= mem_request; - CYC_O <= '1'; - else - cache_busy <= '0'; - cache_ack <= '1'; - end if; - end if; - when invalidate => - sn <= rd_cache; - invalidate_en <= '1'; - invalidate_ack <= '1'; - if invalidate_all = '1' then - sn <= flush; - flush_count_rst <= '1'; - elsif cache_miss_inv = '0' then - tag_ram_we <= '1'; - cache_entry_in.valid <= '0'; - cache_entry_in.tag <= (others => '0'); - sn <= rd_cache; - end if; - - when flush => - flush_count_en <= '1'; - invalidate_en <= '1'; - tag_ram_we <= '1'; - cache_entry_in.valid <= '0'; - cache_entry_in.tag <= (others => '0'); - if flush_count_rdy = '1' then - tag_ram_we <= '0'; - sn <= rd_cache; - end if; - when mem_request => - CYC_O <= '1'; - if SRDY_I = '1' then - sn <= mem_access; - end if; - when mem_access => - request_count_en <= '1'; - fill_count_en <= '1'; - CYC_O <= '1'; - STB_O <= '1'; - if request_count_rdy = '1' then - STB_O <= '0'; - sn <= mem_data; - end if; - when mem_data => - CYC_O <= '1'; - fill_count_en <= '1'; - if fill_count_rdy = '1' then - tag_ram_we <= '1'; - cache_entry_in.valid <= '1'; - sn <= rd_cache; - end if; - when rd_cache => - was_miss <= '1'; - sn <= ready; - when others => - sn <= ready; - end case; - - end process; - -flush_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if ctrl.inv_at = '1' then - flush_count <= to_integer(cache_index_inv); - elsif flush_count_rst = '1' then - flush_count_rdy <= '0'; - flush_count <= 2**cache_index_width-1; - elsif flush_count_en = '1' then - if flush_count /= 0 then - flush_count <= flush_count - 1; - else - flush_count_rdy <= '1'; - end if; - end if; - end if; - end process; - -request_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_count_en = '0' then - request_count_rdy <= '0'; - request_count <= 2**word_index_width-1; - else - if SRDY_I = '1' then - if request_count /= 0 then - request_count <= request_count - 1; - else - request_count_rdy <= '1'; - end if; - end if; - end if; - end if; - end process; - -fill_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if fill_count_en = '0' then - fill_count_rdy <= '0'; - fill_count <= 2**word_index_width-1; - else - if ACK_I = '1' then - if fill_count /= 0 then - fill_count <= fill_count - 1; - else - fill_count_rdy <= '1'; - end if; - end if; - end if; - end if; - end process; - -end behavior; diff --git a/lib/CPUs/MIPS/src/core/mips_alu.vhd b/lib/CPUs/MIPS/src/core/mips_alu.vhd deleted file mode 100644 index a64b5a4..0000000 --- a/lib/CPUs/MIPS/src/core/mips_alu.vhd +++ /dev/null @@ -1,184 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: The arithmetic logic unit --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.mips_types.all; - -entity alu is - Generic - ( - data_width : integer := 8 - ); - Port - ( - op1_in : in unsigned (data_width-1 downto 0); - op2_in : in unsigned (data_width-1 downto 0); - op2_shifted : in unsigned (data_width-1 downto 0); - ctrl : in alu_ctrl_t; - result : out unsigned (data_width-1 downto 0); - flags : out alu_flags_t - ); -end alu; - -architecture Behavioral of alu is - - signal sum_res : unsigned (data_width-1 downto 0); - signal and_res : unsigned (data_width-1 downto 0); - signal xor_res : unsigned (data_width-1 downto 0); - signal nor_res : unsigned (data_width-1 downto 0); - signal or_res : unsigned (data_width-1 downto 0); - signal eq, sa, sb, sr, c, z : STD_LOGIC; - signal lts, ltu : STD_LOGIC; - --------------------------------------------------------------------------- -begin - - eq <= '1' when op1_in = op2_in else '0' after 3 ns; - sa <= op1_in(op1_in'left); - sb <= op2_in(op2_in'left); - sr <= sum_res(sum_res'left); - z <= '1' when op1_in = (data_width-1 downto 0 => '0') else '0' after 2 ns; - - flags.uvf <= (not ctrl.add) and ((sa and (not sb) and (not sr)) or ((not sa) and sb and sr)); - flags.ovf <= ctrl.add and ((sa and sb and (not sr)) or ((not sa) and (not sb) and sr)); --- lts <= (not eq) and (((not c) and sa and sb) or (((not sr) and sa) or (sa and (not sb)) or (sr and (not sb)))); - lts <= not eq and ((not c and sa) or (not sb and sa) or (not sb and sr)); - - ltu <= (not eq) and (not c); - flags.lts <= lts; - flags.ltu <= ltu; - flags.c <= c; - --------------------------------------------------------------------------- -proc_op_and: - process(op1_in, op2_in) - variable x1, x2 : unsigned (data_width-1 downto 0); - begin - x1 := op1_in; - x2 := op2_in; - - and_res <= (x1 and x2) after 1 ns; - - end process; - --------------------------------------------------------------------------- -proc_proc_xor: - process(op1_in, op2_in) - variable x1, x2 : unsigned (data_width-1 downto 0); - begin - x1 := op1_in; - x2 := op2_in; - - xor_res <= (x1 xor x2) after 2 ns; - - end process; - --------------------------------------------------------------------------- -proc_proc_nor: - process(op1_in, op2_in) - variable x1, x2 : unsigned (data_width-1 downto 0); - begin - x1 := op1_in; - x2 := op2_in; - - nor_res <= (x1 nor x2) after 1 ns; - - end process; - --------------------------------------------------------------------------- -proc_proc_or: - process(op1_in, op2_in) - variable x1, x2 : unsigned (data_width-1 downto 0); - begin - x1 := op1_in; - x2 := op2_in; - - or_res <= (x1 or x2) after 1 ns; - - end process; - --------------------------------------------------------------------------- -proc_alu_out: - process(ctrl, sum_res, and_res, xor_res, nor_res, or_res, op2_shifted, lts, ltu) - begin - - result <= sum_res; - - case ctrl.outsel is - - when alu_adder => - result <= sum_res; - - when alu_and => - result <= and_res; - - when alu_xor => - result <= xor_res; - - when alu_nor => - result <= nor_res; - - when alu_or => - result <= or_res; - - when alu_shift2 => - result <= op2_shifted; - - when alu_ltu => - result <= (data_width-1 downto 1 => '0') & ltu; - - when alu_lts => - result <= (data_width-1 downto 1 => '0') & lts; - - when others => null; - - end case; - - end process; - --------------------------------------------------------------------------- -alu_addsub: - process(op1_in, op2_in, ctrl) - variable sum : unsigned(data_width+1 downto 0); - variable op1, op2 : unsigned(data_width+1 downto 0); - begin - - op1 := '0' & op1_in & not ctrl.add; - if (ctrl.add = '1') then - op2 := '0' & op2_in & '0'; - else - op2 := '0' & not op2_in & '1'; - end if; - sum := op1 + op2; - - -- Form sum + carry - sum_res <= unsigned(sum(data_width downto 1)) after 4 ns; - c <= sum(sum'left) after 4 ns; - - end process; - --------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/CPUs/MIPS/src/core/mips_bcu.vhd b/lib/CPUs/MIPS/src/core/mips_bcu.vhd deleted file mode 100644 index 51b5ed7..0000000 --- a/lib/CPUs/MIPS/src/core/mips_bcu.vhd +++ /dev/null @@ -1,52 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: The arithmetic logic unit --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.mips_types.all; - -entity bcu is - Generic - ( - data_width : integer := 8 - ); - Port - ( - op1_in : in unsigned (data_width-1 downto 0); - op2_in : in unsigned (data_width-1 downto 0); - flags : out bcu_flags_t - ); -end bcu; - -architecture Behavioral of bcu is - --------------------------------------------------------------------------- -begin - - flags.eq <= '1' when op1_in = op2_in else '0' after 3 ns; - flags.ltz <= op1_in(op1_in'left) after 1 ns; - --------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/CPUs/MIPS/src/core/mips_bui.vhd b/lib/CPUs/MIPS/src/core/mips_bui.vhd deleted file mode 100644 index e2aae9f..0000000 --- a/lib/CPUs/MIPS/src/core/mips_bui.vhd +++ /dev/null @@ -1,552 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: JIPS top file --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -library work; -use work.mips_types.all; - -entity biu is - Generic - ( - icache_size : natural := 2048; -- words - icache_line : natural := 8; -- words - dcache_size : natural := 2048; -- words - dcache_line : natural := 8 -- words - ); - Port - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - ADDR_O : out unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - WE_O : out STD_LOGIC; - SEL_O : out unsigned(3 downto 0); - CYC_O : out STD_LOGIC; - STB_O : out STD_LOGIC; - MRDY_O : out STD_LOGIC; - cop0_ctrl_in : in cop0_ctrl_out_t; - cpu_clk : in STD_LOGIC; - cpu_imem_err : out STD_LOGIC; - cpu_imem_rdy : out STD_LOGIC; - cpu_imem_en : in STD_LOGIC; - cpu_imem_addr : in word_t; - cpu_imem_din : out word_t; - cpu_dmem_err : out STD_LOGIC; - cpu_dmem_rdy : out STD_LOGIC; - cpu_dmem_en : in STD_LOGIC; - cpu_dmem_we : in STD_LOGIC; - cpu_dmem_be : in unsigned(3 downto 0); - cpu_dmem_dout : in word_t; - cpu_dmem_din : out word_t; - cpu_dmem_addr : in word_t - ); -end biu; - -architecture behavior of biu is - - COMPONENT icache - GENERIC - ( - cache_size : natural; -- words - line_size : natural -- words - ); - PORT - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - MRDY_O : out STD_LOGIC; - ADDR_O : out word_t; - DAT_I : in word_t; - STB_O : out STD_LOGIC; - CYC_O : out STD_LOGIC; - ctrl : in cache_ctrl_t; - cpu_en : in STD_LOGIC; - cpu_addr : in word_t; - cpu_dout : out word_t; - cpu_busy : out STD_LOGIC - ); - END COMPONENT; - - COMPONENT dcache - GENERIC - ( - cache_size : natural; -- words - line_size : natural -- words - ); - PORT - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - MRDY_O : out STD_LOGIC; - ADDR_O : out word_t; - DAT_I : in word_t; - STB_O : out STD_LOGIC; - CYC_O : out STD_LOGIC; - ctrl : in cache_ctrl_t; - cpu_en : in STD_LOGIC; - cpu_we : in STD_LOGIC; - cpu_be : in unsigned(3 downto 0); - cpu_addr : in word_t; - cpu_din : in word_t; - cpu_dout : out word_t; - cpu_busy : out STD_LOGIC - ); - END COMPONENT; - - type bus_state_t is (init, ready, icache_bus_access, dcache_bus_access, write_bus, read_bus, read_finish); - - signal s, sn : bus_state_t; - signal bus_idle : std_logic; - signal busy : std_logic; - signal dmem_be : unsigned(3 downto 0); - signal dcache_dout : word_t; - signal dcache_mem_gnt : std_logic; - signal icache_mem_gnt : std_logic; - signal dmem_mem_wr_gnt : std_logic; - signal dmem_mem_rd_gnt : std_logic; - signal dcache_busy : std_logic; - signal icache_busy : std_logic; - signal CYC_O_icache : std_logic; - signal CYC_O_dcache : std_logic; - signal CYC_O_dmem_rd : std_logic; - signal CYC_O_dmem_wr : std_logic; - signal SRDY_I_icache : std_logic; - signal SRDY_I_dcache : std_logic; - signal MRDY_O_icache : std_logic; - signal MRDY_O_dcache : std_logic; - signal ADDR_O_icache : word_t; - signal ADDR_O_dcache : word_t; - signal ADDR_O_dmem_rd : word_t; - signal ADDR_O_dmem_wr : word_t; - signal STB_O_icache : std_logic; - signal STB_O_dcache : std_logic; - signal STB_O_dmem_rd : std_logic; - signal STB_O_dmem_wr : std_logic; - signal DAT_I_dmem_rd : word_t; - signal DAT_O_dmem_wr : word_t; - signal SEL_O_dmem_wr : unsigned(3 downto 0); - signal SEL_O_dmem_rd : unsigned(3 downto 0); - signal dcached : std_logic; - signal dcache_en2 : std_logic; - signal dcache_en : std_logic; - signal uncached_access : std_logic; - signal ACK : std_logic; - signal DAT : unsigned(31 downto 0); - - type timeout_cnt_t is range 0 to 1E5-1; - signal bus_timeout_cnt : timeout_cnt_t; - signal bus_timeout : std_logic; - - signal bout_fifo_din : unsigned(68 downto 0); - signal bout_fifo_dout : unsigned(68 downto 0); - signal bout_fifo_re : std_logic; - signal bout_fifo_we : std_logic; - signal bout_fifo_full : std_logic; - signal bout_fifo_empty : std_logic; - signal bout_rdy : std_logic; - - signal bin_fifo_din : unsigned(31 downto 0); - signal bin_fifo_dout : unsigned(31 downto 0); - signal bin_fifo_re : std_logic; - signal bin_fifo_we : std_logic; - signal bin_fifo_full : std_logic; - signal bin_fifo_empty : std_logic; - - alias bout_fifo_addr_in is bout_fifo_din(31 downto 0); - alias bout_fifo_data_in is bout_fifo_din(63 downto 32); - alias bout_fifo_sel_in is bout_fifo_din(67 downto 64); - alias bout_fifo_we_in is bout_fifo_din(68); - alias bout_fifo_addr_out is bout_fifo_dout(31 downto 0); - alias bout_fifo_data_out is bout_fifo_dout(63 downto 32); - alias bout_fifo_sel_out is bout_fifo_dout(67 downto 64); - alias bout_fifo_we_out is bout_fifo_dout(68); - - signal write_fifo_din : unsigned(67 downto 0); - signal write_fifo_dout : unsigned(67 downto 0); - signal write_fifo_re : std_logic; - signal write_fifo_we : std_logic; - signal write_fifo_full : std_logic; - signal write_fifo_empty : std_logic; - - alias write_fifo_addr_in is write_fifo_din(31 downto 0); - alias write_fifo_data_in is write_fifo_din(63 downto 32); - alias write_fifo_sel_in is write_fifo_din(67 downto 64); - alias write_fifo_addr_out is write_fifo_dout(31 downto 0); - alias write_fifo_data_out is write_fifo_dout(63 downto 32); - alias write_fifo_sel_out is write_fifo_dout(67 downto 64); - - signal read_cycle : std_logic; - -begin - -read_cyc_register: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - if RST_I = '1' then - read_cycle <= '0'; - else - read_cycle <= (dmem_mem_rd_gnt and CYC_O_dmem_rd) - or (dcache_mem_gnt and CYC_O_dcache) - or (icache_mem_gnt and CYC_O_icache); - end if; - end if; - end process; - - MRDY_O <= not bin_fifo_full; - CYC_O <= not bout_fifo_empty or read_cycle; - STB_O <= not bout_fifo_empty; - ADDR_O <= bout_fifo_addr_out; - DAT_O <= bout_fifo_data_out; - SEL_O <= bout_fifo_sel_out; - WE_O <= bout_fifo_we_out; - - cpu_imem_rdy <= not icache_busy after 4.5 ns; - busy <= CYC_O_dmem_rd or dcache_busy or (write_fifo_full); - cpu_dmem_rdy <= not busy after 4.5 ns; - -inst_icache : icache - GENERIC MAP - ( - cache_size => icache_size, -- words - line_size => icache_line -- words - ) - PORT MAP - ( - CLK_I => cpu_clk, - RST_I => RST_I, - STB_O => STB_O_icache, - CYC_O => CYC_O_icache, - ADDR_O => ADDR_O_icache, - MRDY_O => MRDY_O_icache, - DAT_I => DAT, - ACK_I => ACK, - SRDY_I => SRDY_I_icache, - ctrl => cop0_ctrl_in.icache, - cpu_en => cpu_imem_en, - cpu_addr => cpu_imem_addr, - cpu_dout => cpu_imem_din, - cpu_busy => icache_busy - ); - - SRDY_I_icache <= bout_rdy and icache_mem_gnt; - -inst_dcache : dcache - GENERIC MAP - ( - cache_size => dcache_size, -- words - line_size => dcache_line -- words - ) - PORT MAP - ( - CLK_I => cpu_clk, - RST_I => RST_I, - CYC_O => CYC_O_dcache, - STB_O => STB_O_dcache, - ADDR_O => ADDR_O_dcache, - MRDY_O => MRDY_O_dcache, - DAT_I => DAT, - ACK_I => ACK, - SRDY_I => SRDY_I_dcache, - ctrl => cop0_ctrl_in.dcache, - cpu_en => dcache_en, - cpu_we => cpu_dmem_we, - cpu_be => cpu_dmem_be, - cpu_addr => cpu_dmem_addr, - cpu_din => cpu_dmem_dout, - cpu_dout => dcache_dout, - cpu_busy => dcache_busy - ); - - SRDY_I_dcache <= bout_rdy and dcache_mem_gnt; - - dcached <= '1' when cpu_dmem_addr(31 downto 29) /= "101" else '0'; - cpu_dmem_din <= dcache_dout when uncached_access = '0' else DAT_I_dmem_rd; - dcache_en <= dcached and cpu_dmem_en and dcache_en2; -- or write_fifo_full); - --- Instantiate synchronous FIFO -inst_bin_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => 4, - data_width => 32, - do_last_read_update => true - ) - PORT MAP - ( - rst => RST_I, - clk_w => CLK_I, - clk_r => cpu_clk, - we => bin_fifo_we, - re => bin_fifo_re, - fifo_full => bin_fifo_full, - fifo_empty => bin_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => bin_fifo_din, - data_r => bin_fifo_dout - ); - - bin_fifo_din <= DAT_I; - DAT <= bin_fifo_dout; - ACK <= not bin_fifo_empty; - bin_fifo_we <= ACK_I; - bin_fifo_re <= dmem_mem_rd_gnt or MRDY_O_icache or MRDY_O_dcache; - --- Instantiate synchronous FIFO -inst_bout_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => 4, - data_width => 69, - do_last_read_update => false - ) - PORT MAP - ( - rst => RST_I, - clk_w => cpu_clk, - clk_r => CLK_I, - we => bout_fifo_we, - re => bout_fifo_re, - fifo_full => bout_fifo_full, - fifo_empty => bout_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => bout_fifo_din, - data_r => bout_fifo_dout - ); - bout_rdy <= not bout_fifo_full; - bout_fifo_re <= SRDY_I and not bin_fifo_full; - - bout_fifo_we <= STB_O_dmem_wr or STB_O_dmem_rd or STB_O_dcache or STB_O_icache; - - bout_fifo_data_in <= DAT_O_dmem_wr when dmem_mem_wr_gnt = '1' else (others => '-'); - - bout_fifo_addr_in <= ADDR_O_dmem_wr when dmem_mem_wr_gnt = '1' else - ADDR_O_dmem_rd when dmem_mem_rd_gnt = '1' else - ADDR_O_dcache when dcache_mem_gnt = '1' else - ADDR_O_icache when icache_mem_gnt = '1' else (others => '-'); - - bout_fifo_sel_in <= SEL_O_dmem_wr when dmem_mem_wr_gnt = '1' else - SEL_O_dmem_rd when dmem_mem_rd_gnt = '1' else (others => '1'); - - bout_fifo_we_in <= '1' when dmem_mem_wr_gnt = '1' else '0'; - --- Instantiate synchronous FIFO -inst_write_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => 4, - data_width => 68, - do_last_read_update => true - ) - PORT MAP - ( - rst => RST_I, - clk => cpu_clk, - we => write_fifo_we, - re => write_fifo_re, - fifo_full => write_fifo_full, - fifo_empty => write_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => write_fifo_din, - data_r => write_fifo_dout - ); - - CYC_O_dmem_wr <= not write_fifo_empty; - DAT_O_dmem_wr <= write_fifo_data_out; - ADDR_O_dmem_wr <= write_fifo_addr_out; - SEL_O_dmem_wr <= write_fifo_sel_out; - - write_fifo_data_in <= cpu_dmem_dout; - write_fifo_addr_in <= cpu_dmem_addr; - write_fifo_sel_in <= cpu_dmem_be; - write_fifo_re <= STB_O_dmem_wr; - write_fifo_we <= cpu_dmem_en and not busy and cpu_dmem_we; - -dmem_rd_flags: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - uncached_access <= '0'; - if RST_I = '1' then - CYC_O_dmem_rd <= '0'; - dcache_en2 <= '1'; - else - if ACK = '1' and dmem_mem_rd_gnt = '1' then - uncached_access <= '1'; - CYC_O_dmem_rd <= '0'; - dcache_en2 <= '1'; - end if; - if cpu_dmem_en = '1' and busy = '0' and cpu_dmem_we = '0' then - if dcached = '0' then - CYC_O_dmem_rd <= '1'; - dcache_en2 <= '0'; - end if; - end if; - end if; - end if; - end process; - -dmem_rd_data: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - if RST_I = '1' then - DAT_I_dmem_rd <= (others => '0'); - elsif ACK = '1' and CYC_O_dmem_rd = '1' then - DAT_I_dmem_rd <= DAT; - end if; - end if; - end process; - -dmem_rd_regs: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - if cpu_dmem_en = '1' and busy = '0' then - ADDR_O_dmem_rd <= cpu_dmem_addr; - SEL_O_dmem_rd <= cpu_dmem_be; - end if; - end if; - end process; - -bus_state_next: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - if RST_I = '1' then - s <= init; - else - s <= sn; - end if; - end if; - end process; - -bus_state: - process(s, CYC_O_icache, CYC_O_dcache, CYC_O_dmem_wr, CYC_O_dmem_rd, bout_rdy, ACK) - begin - - icache_mem_gnt <= '0'; - dcache_mem_gnt <= '0'; - dmem_mem_rd_gnt <= '0'; - dmem_mem_wr_gnt <= '0'; - STB_O_dmem_rd <= '0'; - STB_O_dmem_wr <= '0'; - bus_idle <= '0'; - sn <= s; - case s is - when init => - sn <= ready; - when ready => - bus_idle <= '1'; - if CYC_O_dmem_wr = '1' then - sn <= write_bus; - elsif CYC_O_dmem_rd = '1' then - sn <= read_bus; - elsif CYC_O_icache = '1' then - sn <= icache_bus_access; - elsif CYC_O_dcache = '1' then - sn <= dcache_bus_access; - end if; - when icache_bus_access => - icache_mem_gnt <= '1'; - if CYC_O_icache = '0' then - sn <= ready; - end if; - when dcache_bus_access => - dcache_mem_gnt <= '1'; - if CYC_O_dcache = '0' then - sn <= ready; - end if; - when write_bus => - dmem_mem_wr_gnt <= '1'; - if CYC_O_dmem_wr = '1' then - if bout_rdy = '1' then - STB_O_dmem_wr <= '1'; - end if; - else - sn <= ready; - end if; - when read_bus => - dmem_mem_rd_gnt <= '1'; - if bout_rdy = '1' then - STB_O_dmem_rd <= '1'; - sn <= read_finish; - end if; - when read_finish => - dmem_mem_rd_gnt <= '1'; - if ACK = '1' then - sn <= ready; - end if; - when others => - sn <= ready; - end case; - - end process; - -bus_timeout_counter: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - if bus_idle = '0' then - if bus_timeout_cnt /= 0 then - bus_timeout_cnt <= bus_timeout_cnt - 1; - else - bus_timeout <= '1'; - end if; - else - bus_timeout_cnt <= timeout_cnt_t'high; - bus_timeout <= '0'; - end if; - end if; - end process; - -bus_err: - process(cpu_clk) - begin - if rising_edge(cpu_clk) then - if RST_I = '1' then - cpu_imem_err <= '0'; - cpu_dmem_err <= '0'; - elsif bus_timeout = '1' then - cpu_imem_err <= icache_mem_gnt; - cpu_dmem_err <= dcache_mem_gnt or dmem_mem_wr_gnt or dmem_mem_rd_gnt; - end if; - end if; - end process; - -------------------------------------------------------------------- - -end behavior; diff --git a/lib/CPUs/MIPS/src/core/mips_cop.vhd b/lib/CPUs/MIPS/src/core/mips_cop.vhd deleted file mode 100644 index af898eb..0000000 --- a/lib/CPUs/MIPS/src/core/mips_cop.vhd +++ /dev/null @@ -1,546 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: The arithmetic logic unit --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.mips_types.all; -use work.mips_instr.all; - -entity cop is - Generic - ( - icache_size : natural := 2048; -- words - icache_line : natural := 8; -- words - dcache_size : natural := 2048; -- words - dcache_line : natural := 8 -- words - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - eb : in STD_LOGIC; - int : in unsigned(5 downto 0); - nmi : in STD_LOGIC; - ir_en : in STD_LOGIC; - ir : in word_t; - ctrl_in : in cop0_ctrl_in_t; - ctrl_out : out cop0_ctrl_out_t; - din : in word_t; - dout : out word_t - ); -end cop; - -architecture Behavioral of cop is - - signal epc : word_t; - signal cause : word_t; - signal status : word_t; - signal imem_addr : word_t; - signal imem_addr_we : STD_LOGIC; - signal BadVAddr : word_t; - signal exc_code : unsigned(4 downto 0); - signal test_reg : word_t; - signal test_reg_we : STD_LOGIC; - signal stat_reg_we : STD_LOGIC; - signal eflags_reg_we : STD_LOGIC; - signal epc_reg_we : STD_LOGIC; - signal code_reg_we : STD_LOGIC; - signal ip_reg_we : STD_LOGIC; - signal bd : STD_LOGIC; - signal sw_int : unsigned(1 downto 0); - signal ip : unsigned(7 downto 0); - signal im : unsigned(7 downto 0); - signal status_save : STD_LOGIC; - signal status_rest : STD_LOGIC; - signal eflags : exc_flags_t; - signal EB_reg : STD_LOGIC; - signal icache_info : unsigned(7 downto 0); - signal dcache_info : unsigned(7 downto 0); - signal reg_rptr : reg_ptr_t; - signal reg_wptr : reg_ptr_t; - signal inject_exc : STD_LOGIC; - signal latch_vect_en : STD_LOGIC; - signal int_nmi : STD_LOGIC; - signal nmi_asserted : std_logic; - - type cop_pipe_t is record - opc : opcode_t; - RFE : std_logic; - CO : std_logic; - reg_ptr : reg_ptr_t; - rs : reg_ptr_t; - rd : reg_ptr_t; - rt : reg_ptr_t; - func : func_t; - we : std_logic; - re : std_logic; - cs : std_logic; - end record; - - signal cop_pipe_ID : cop_pipe_t; - signal cop_pipe_EX : cop_pipe_t; - - function eval_int(ip : unsigned) return STD_LOGIC is - variable result : STD_LOGIC; - begin - result := '0'; - for i in ip'range loop - result := result or ip(i); - end loop; - - return result; - end eval_int; - - type exc_state_t is (exc_idle, exc_pipe_flush, exc_commit, exc_inject, exc_enter, exc_leave, exc_left); - signal exc_state, exc_staten : exc_state_t; - --------------------------------------------------------------------------- -begin - - icache_info <= "00" & to_unsigned(lg2(icache_line), 3) & to_unsigned(lg2(icache_size)-8, 3); - dcache_info <= "00" & to_unsigned(lg2(dcache_line), 3) & to_unsigned(lg2(dcache_size)-8, 3); - cop_pipe_ID.cs <= ir_en; - cop_pipe_ID.opc <= extract_opc(ir); - cop_pipe_ID.rs <= extract_rs(ir); - cop_pipe_ID.rd <= extract_rd(ir); - cop_pipe_ID.rt <= extract_rt(ir); - cop_pipe_ID.func <= extract_func(ir); - cop_pipe_ID.CO <= ir(25); - cop_pipe_ID.re <= cop_pipe_ID.cs when (cop_pipe_ID.opc = "111000" or (cop_pipe_ID.opc = "010000" and cop_pipe_ID.rs = "00000")) else '0'; - cop_pipe_ID.we <= cop_pipe_ID.cs when (cop_pipe_ID.opc = "110000" or (cop_pipe_ID.opc = "010000" and cop_pipe_ID.rs = "00100")) else '0'; - cop_pipe_ID.RFE <= cop_pipe_ID.cs when (cop_pipe_ID.CO = '1' and cop_pipe_ID.func = "010000") else '0'; - ctrl_out.EB <= EB_reg xor (status(25) and status(1)); - ctrl_out.user_mode <= status(1); - ctrl_out.exc_inject <= inject_exc or rst; - cop_pipe_ID.reg_ptr <= cop_pipe_ID.rd when cop_pipe_ID.opc = "010000" else cop_pipe_ID.rt; - - im <= status(15 downto 8); - cause <= bd & (30 downto 16 => '0') & ip & '0' & exc_code & "00"; - - eflags.Ov <= ctrl_in.events.alu_ovf or ctrl_in.events.alu_uvf; - eflags.DAdEL <= ctrl_in.events.data_load_err; - eflags.DAdES <= ctrl_in.events.data_store_err; - eflags.IAdEL <= ctrl_in.events.inst_load_err; - eflags.IAdEK <= ctrl_in.events.inst_priv_addr and status(1); - eflags.Sys <= ctrl_in.events.syscall; - eflags.Bp <= ctrl_in.events.break; - eflags.RI <= ctrl_in.events.illegal; - eflags.Int <= ctrl_in.events.int; - --- NMI/RST transition detector -proc_nmi_transition: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - int_nmi <= '0'; - nmi_asserted <= '0'; - elsif latch_vect_en = '1' then - int_nmi <= '0'; - elsif nmi_asserted = '1' then - if nmi = '0' then - nmi_asserted <= '0'; - int_nmi <= '1'; - end if; - elsif nmi = '1' then - nmi_asserted <= '1'; - end if; - end if; - end process; - - --- Main exception FSM -proc_exc_state: - process(exc_state, ctrl_in, cop_pipe_ID) - begin - - ctrl_out.exc_commit <= '0'; - ctrl_out.exc_pending <= '0'; - ctrl_out.exc_exit <= '0'; - epc_reg_we <= '0'; - code_reg_we <= '0'; - status_save <= '0'; - status_rest <= '0'; - inject_exc <= '0'; - imem_addr_we <= '0'; - latch_vect_en <= '0'; - - exc_staten <= exc_state; - - case exc_state is - - when exc_idle => - if cop_pipe_ID.RFE = '1' then - exc_staten <= exc_leave; - ctrl_out.exc_exit <= '1'; - ctrl_out.exc_commit <= '1'; - elsif ctrl_in.exc_req = '1' then - exc_staten <= exc_pipe_flush; - imem_addr_we <= '1'; - end if; - - when exc_pipe_flush => - ctrl_out.exc_pending <= '1'; - ctrl_out.exc_commit <= '1'; - if ctrl_in.exc_ack = '1' then - exc_staten <= exc_commit; - end if; - - when exc_commit => - latch_vect_en <= '1'; - ctrl_out.exc_pending <= '1'; - ctrl_out.exc_commit <= '1'; - if ctrl_in.sdu.ID_stall = '0' then - exc_staten <= exc_inject; - end if; - - when exc_inject => - ctrl_out.exc_pending <= '1'; - ctrl_out.exc_commit <= '1'; - code_reg_we <= '1'; - status_save <= '1'; - epc_reg_we <= '1'; - inject_exc <= '1'; - exc_staten <= exc_enter; - - when exc_enter => - ctrl_out.exc_pending <= '1'; - exc_staten <= exc_idle; - - when exc_leave => - exc_staten <= exc_left; - status_rest <= '1'; - ctrl_out.exc_exit <= '1'; - ctrl_out.exc_commit <= '1'; - - when exc_left => - exc_staten <= exc_idle; - - when others => - exc_staten <= exc_idle; - - end case; - end process; - -proc_exc_state_next: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - exc_state <= exc_idle; - else - exc_state <= exc_staten; - end if; - end if; - end process; - --- Endian switch sampled at hard reset -sample_endian: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - EB_reg <= eb; - end if; - end if; - end process; - --- Sample imem_addr for later use -exception_last_imem_addr: - process(clk) - begin - if rising_edge(clk) then - if imem_addr_we = '1' then - imem_addr <= ctrl_in.imem_addr; - end if; - end if; - end process; - --- EPC reg and BD-bit write -cop_exception_epc_write: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - bd <= '0'; - epc <= (others => '0'); - elsif epc_reg_we = '1' then - bd <= '0'; - epc <= ctrl_in.epc_mem; - if ctrl_in.bd_wb = '1' then - bd <= '1'; - epc <= ctrl_in.epc_wb; - end if; - end if; - end if; - end process; - --- BadVaddr and exception code write -cop_exception_map: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - exc_code <= (others => '0'); - BadVAddr <= (others => '0'); - elsif code_reg_we = '1' then - if eflags.Ov = '1' then - exc_code <= "01100"; - elsif eflags.Sys = '1' then - exc_code <= "01000"; - elsif eflags.Bp = '1' then - exc_code <= "01001"; - elsif eflags.RI = '1' then - exc_code <= "01010"; - elsif eflags.IAdEL = '1' then - exc_code <= "00100"; - BadVAddr <= imem_addr; - elsif eflags.IAdEK = '1' then - exc_code <= "00100"; - BadVAddr <= imem_addr; - elsif eflags.DAdEL = '1' then - exc_code <= "00100"; - BadVAddr <= ctrl_in.dmem_addr; - elsif eflags.DAdES = '1' then - exc_code <= "00101"; - BadVAddr <= ctrl_in.dmem_addr; - elsif eflags.Int = '1' then - exc_code <= "00000"; - end if; - end if; - end if; - end process; - - ctrl_out.icache.inv_addr <= test_reg; - ctrl_out.dcache.inv_addr <= test_reg; - --- Custom I/D-Cache operations: invalidate all/line -cop_cache_op: - process(clk) - begin - if rising_edge(clk) then - ctrl_out.icache.inv_at <= '0'; - ctrl_out.icache.inv_all <= '0'; - ctrl_out.dcache.inv_at <= '0'; - ctrl_out.dcache.inv_all <= '0'; - if cop_pipe_ID.cs = '1' and cop_pipe_ID.CO = '1' then - case cop_pipe_ID.func is - when "100000" => - ctrl_out.icache.inv_all <= '1'; - when "100001" => - ctrl_out.icache.inv_at <= '1'; - when "100010" => - ctrl_out.dcache.inv_all <= '1'; - when "100011" => - ctrl_out.dcache.inv_at <= '1'; - - when others => null; - end case; - end if; - end if; - end process; - --- IP register write and signalling Int to pipeline -cop_ip_reg_write: - process(clk) - variable ip_v : unsigned(7 downto 0); - variable ipm_v : unsigned(7 downto 0); - begin - if rising_edge(clk) then - if rst = '1' then - sw_int <= (others => '0'); - elsif ctrl_in.sdu.WB_nop = '0' then - if ip_reg_we = '1' then - sw_int <= din(9 downto 8); - end if; - end if; - ip_v := (int & sw_int); - ipm_v := ip_v and im; - ip <= ip_v; - ctrl_out.int <= (eval_int(ipm_v) and status(0)); - ctrl_out.NMI <= int_nmi; - end if; - end process; - --- Exception vector dispatch -cop_exc_vector: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - ctrl_out.exc_vec <= X"BFC00000"; - elsif latch_vect_en = '1' then - if ctrl_in.events.nmi = '1' then - ctrl_out.exc_vec <= X"BFC00000"; - else - ctrl_out.exc_vec <= X"80000080"; - if status(22) = '1' then - ctrl_out.exc_vec <= X"BFC00180"; - end if; - end if; - end if; - end if; - end process; - --- Cop pipeline -cop_pipe: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - cop_pipe_EX.cs <= '0'; - cop_pipe_EX.we <= '0'; - cop_pipe_EX.re <= '0'; - elsif ctrl_in.sdu.stall_all = '0' then - cop_pipe_EX <= cop_pipe_ID; - if cop_pipe_ID.we = '1' then - reg_wptr <= cop_pipe_ID.reg_ptr; - end if; - if cop_pipe_ID.re = '1' then - reg_rptr <= cop_pipe_ID.reg_ptr; - end if; - end if; - end if; - end process; - --- COP Register read -cop_register_read: - process(reg_rptr, BadVAddr, status, cause, epc, dcache_info, icache_info, test_reg) - variable reg : word_t; - begin - - case reg_rptr is - when "01000" => -- BadVAddr - reg := BadVAddr; - - when "01100" => -- Status - reg := status; - - when "01101" => -- Cause - reg := cause; - - when "01110" => -- EPC (Exception Program Counter) - reg := epc; - - when "01111" => -- PRId (Processor Revision Register) - reg := dcache_info & icache_info & X"02" & to_unsigned(REVISION ,8); - - when "11111" => -- test_reg - reg := test_reg; - - when others => - reg := (others => '-'); - - end case; - - dout <= reg after 2 ns; - - end process; - --- COP Register write strobe generation -cop_we_gen: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - test_reg_we <= '0'; - stat_reg_we <= '0'; - ip_reg_we <= '0'; - elsif ctrl_in.sdu.stall_all = '0' then - test_reg_we <= '0'; - stat_reg_we <= '0'; - ip_reg_we <= '0'; - if cop_pipe_EX.we = '1' then - - case reg_wptr is - - when "01100" => - stat_reg_we <= '1'; -- not status(1) or status(28); - when "01101" => - ip_reg_we <= '1'; -- not status(1) or status(28); - when "11111" => - test_reg_we <= '1'; -- not status(1) or status(28); - when others => null; - - end case; - - end if; - end if; - end if; - end process; - --- COP Test Register -cop_test_reg_write: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - test_reg <= (others => '0'); - elsif ctrl_in.sdu.WB_nop = '0' then - if test_reg_we = '1' then - test_reg <= din; - end if; - end if; - end if; - end process; - --- COP Status Register -cop_status_reg_write: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - status <= X"00600000"; - elsif status_save = '1' then - if ctrl_in.events.nmi = '0' then - status(5 downto 4) <= status(3 downto 2); - status(3 downto 2) <= status(1 downto 0); - else - status(22) <= '1'; - end if; - status(1 downto 0) <= "00"; - elsif status_rest = '1' then - status(1 downto 0) <= status(3 downto 2); - status(3 downto 2) <= status(5 downto 4); - elsif ctrl_in.sdu.WB_nop = '0' then - if stat_reg_we = '1' then - if status(1) = '0' then - status(0) <= din(0); -- IEc - status(1) <= din(1); -- KUc - status(2) <= din(2); -- IEp - status(3) <= din(3); -- KUp - status(4) <= din(4); -- IEo - status(5) <= din(5); -- KUo - end if; - status(15 downto 8) <= din(15 downto 8); -- IM - status(22) <= din(22); -- BEV - status(25) <= din(25); -- RE - end if; - end if; - end if; - end process; - --------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/CPUs/MIPS/src/core/mips_instr.vhd b/lib/CPUs/MIPS/src/core/mips_instr.vhd deleted file mode 100644 index b187444..0000000 --- a/lib/CPUs/MIPS/src/core/mips_instr.vhd +++ /dev/null @@ -1,1062 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: Types, constants and functions for JCPU --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -library work; -use work.mips_types.all; - --------------------------------------------------------------------------- -package mips_instr is - - function extract_opc(instr : word_t) return opcode_t; - function extract_rs(instr : word_t) return reg_ptr_t; - function extract_rt(instr : word_t) return reg_ptr_t; - function extract_rd(instr : word_t) return reg_ptr_t; - function extract_shamt(instr : word_t) return shamt_t; - function extract_func(instr : word_t) return func_t; - function extract_simm32(instr : word_t) return word_t; - function extract_uimm16(instr : word_t) return word_t; - function extract_jimm32(instr, pc : word_t) return word_t; - function extract_bimm18(instr, pc : word_t) return word_t; - function decode_op(instr : word_t) return op_t; - function ctrl_lines_default return ctrl_lines_t; - function opcode_ctrl_lines(instr : word_t) return ctrl_lines_t; - -end mips_instr; - --------------------------------------------------------------------------- -library work; -use work.mips_types.all; - -package body mips_instr is - - function extract_opc(instr : word_t) return opcode_t is - variable result : opcode_t; - begin - result := instr(31 downto 26); - - return result; - - end extract_opc; - - function extract_rs(instr : word_t) return reg_ptr_t is - variable result : reg_ptr_t; - begin - result := instr(25 downto 21); - - return result; - - end extract_rs; - - function extract_rt(instr : word_t) return reg_ptr_t is - variable result : reg_ptr_t; - begin - result := instr(20 downto 16); - - return result; - - end extract_rt; - - function extract_rd(instr : word_t) return reg_ptr_t is - variable result : reg_ptr_t; - begin - result := instr(15 downto 11); - - return result; - - end extract_rd; - - function extract_shamt(instr : word_t) return shamt_t is - variable result : shamt_t; - begin - result := instr(10 downto 6); - - return result; - - end extract_shamt; - - function extract_func(instr : word_t) return func_t is - variable result : func_t; - begin - result := instr(5 downto 0); - - return result; - - end extract_func; - - function extract_simm32(instr : word_t) return word_t is - variable result : word_t; - begin - result := (31 downto 16 => instr(15)) & instr(15 downto 0); - - return result; - - end extract_simm32; - - function extract_uimm16(instr : word_t) return word_t is - variable result : word_t; - begin - result := (31 downto 16 => '0') & instr(15 downto 0); - - return result; - - end extract_uimm16; - - function extract_jimm32(instr, pc : word_t) return word_t is - variable result : word_t; - begin - result := pc(31 downto 28) & instr(25 downto 0) & "00"; - - return result; - - end extract_jimm32; - - function extract_bimm18(instr, pc : word_t) return word_t is - variable result : word_t; - begin - result := (31 downto 18 => instr(15)) & instr(15 downto 0) & "00"; - - return result; - - end extract_bimm18; - - function decode_op(instr : word_t) return op_t is - variable result : op_t; - variable opc : natural range 0 to 63; - variable func : natural range 0 to 63; - variable rt : natural range 0 to 31; - variable rs : natural range 0 to 31; - - begin - - opc := to_integer(extract_opc(instr)); - func := to_integer(extract_func(instr)); - rt := to_integer(extract_rt(instr)); - rs := to_integer(extract_rs(instr)); - - result := reserved; - - case opc is - - when 0 => - case func is - - when 0 => - result := op_sll; - - when 2 => - result := op_srl; - - when 3 => - result := op_sra; - - when 4 => - result := op_sllv; - - when 6 => - result := op_srlv; - - when 7 => - result := op_srav; - - when 8 => - result := op_jr; - - when 9 => - result := op_jalr; - - when 12 => - result := op_syscall; - - when 13 => - result := op_break; - - when 16 => - result := op_mfhi; - - when 17 => - result := op_mthi; - - when 18 => - result := op_mflo; - - when 19 => - result := op_mtlo; - - when 24 => - result := op_mult; - - when 25 => - result := op_multu; - - when 26 => - result := op_div; - - when 27 => - result := op_divu; - - when 32 => - result := op_add; - - when 33 => - result := op_addu; - - when 34 => - result := op_sub; - - when 35 => - result := op_subu; - - when 36 => - result := op_and; - - when 37 => - result := op_or; - - when 38 => - result := op_xor; - - when 39 => - result := op_nor; - - when 42 => - result := op_slt; - - when 43 => - result := op_sltu; - - when others => null; -- undef - - end case; - - when 1 => - case rt is - - when 0 => - result := op_bltz; - - when 1 => - result := op_bgez; - - when 16 => - result := op_bltzal; - - when 17 => - result := op_bgezal; - - when others => null; -- undef - - end case; - - when 2 => - result := op_j; - - when 3 => - result := op_jal; - - when 4 => - result := op_beq; - - when 5 => - result := op_bne; - - when 6 => - result := op_blez; - - when 7 => - result := op_bgtz; - - when 8 => - result := op_addi; - - when 9 => - result := op_addiu; - - when 10 => - result := op_slti; - - when 11 => - result := op_sltiu; - - when 12 => - result := op_andi; - - when 13 => - result := op_ori; - - when 14 => - result := op_xori; - - when 15 => - result := op_lui; - - when 16 => - result := op_cop0; - case rs is - when 0 => - result := op_mfc0; - when 2 => - result := op_cfc0; -- illegal - when 4 => - result := op_mtc0; - when 6 => - result := op_ctc0; -- illegal - when 8 => - case rt is - when 0 => - result := op_bcf0; -- illegal - when 1 => - result := op_bct0; -- illegal - - when others => null; -- undef - end case; - - when others => null; -- undef - - end case; - - when 17 => - result := op_cop1; - case rs is - when 0 => - result := op_mfc1; - when 2 => - result := op_cfc1; - when 4 => - result := op_mtc1; - when 6 => - result := op_ctc1; - when 8 => - case rt is - when 0 => - result := op_bcf1; - when 1 => - result := op_bct1; - - when others => null; -- undef - end case; - - when others => null; -- undef - - end case; - - when 18 => - result := op_cop2; - case rs is - when 0 => - result := op_mfc2; - when 2 => - result := op_cfc2; - when 4 => - result := op_mtc2; - when 6 => - result := op_ctc2; - when 8 => - case rt is - when 0 => - result := op_bcf2; - when 1 => - result := op_bct2; - - when others => null; -- undef - end case; - - when others => null; -- undef - - end case; - - when 19 => - result := op_cop3; - case rs is - when 0 => - result := op_mfc3; - when 2 => - result := op_cfc3; - when 4 => - result := op_mtc3; - when 6 => - result := op_ctc3; - when 8 => - case rt is - when 0 => - result := op_bcf3; - when 1 => - result := op_bct3; - - when others => null; -- undef - end case; - - when others => null; -- undef - - end case; - - when 32 => - result := op_lb; - - when 33 => - result := op_lh; - - when 34 => - result := op_lwl; - - when 35 => - result := op_lw; - - when 36 => - result := op_lbu; - - when 37 => - result := op_lhu; - - when 38 => - result := op_lwr; - - when 40 => - result := op_sb; - - when 41 => - result := op_sh; - - when 42 => - result := op_swl; - - when 43 => - result := op_sw; - - when 46 => - result := op_swr; - - when 48 => - result := op_lwc0; -- illegal - - when 49 => - result := op_lwc1; - - when 50 => - result := op_lwc2; - - when 51 => - result := op_lwc3; - - when 56 => - result := op_swc0; -- illegal - - when 57 => - result := op_swc1; - - when 58 => - result := op_swc2; - - when 59 => - result := op_swc3; - - when others => null; -- undef - - end case; - - return result; - - end decode_op; - - function ctrl_lines_default return ctrl_lines_t is - variable result : ctrl_lines_t; - begin - result.cop_instr_en := '0'; - result.cop_read := '0'; - result.jump := '0'; - result.jump_long := '0'; - result.branch := '0'; - result.bc_src := bc_eq_ne; - result.bc_not := '0'; - result.alu.outsel := alu_adder; - result.alu.add := '1'; - result.alu.shift_right := '0'; - result.alu.shift_arith := '0'; - result.shamt2_srcsel := sa_src_imm; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.imm_src := src_imm16; - result.reg_write := '0'; - result.dmem_we := '0'; - result.dmem_en := '0'; - result.wptr_srcsel := wptr_src_imm; - result.reg_link := '0'; - result.shift_offset := "00"; - result.shift_byp := '1'; - result.byte_en_byp := '1'; - result.sign_ext_byp := '1'; - result.word4_en := '0'; - result.word2_en := '0'; - result.align_left := '0'; - result.load_signed := '0'; - result.mul_access := '0'; - result.mul_hilo_we := '0'; - result.mul_start := '0'; - result.mul_s_un := '0'; - result.mul_mul_divn := '0'; - result.mul_hilo_sel := '1'; - result.exc_break := '0'; - result.exc_syscall := '0'; - result.exc_illegal := '0'; - result.except_en := '0'; - result.alu_exc_en := '0'; - - return result; - - end ctrl_lines_default; - - function opcode_ctrl_lines(instr : word_t) return ctrl_lines_t is - variable result : ctrl_lines_t; - variable opc : integer range 0 to 2**opcode_t'length-1; - variable func : integer range 0 to 2**func_t'length-1; - variable rt : integer range 0 to 2**reg_ptr_t'length-1; - variable rs : integer range 0 to 2**reg_ptr_t'length-1; - begin - - result := ctrl_lines_default; - opc := to_integer(extract_opc(instr)); - func := to_integer(extract_func(instr)); - rt := to_integer(extract_rt(instr)); - rs := to_integer(extract_rs(instr)); - - case opc is --- SPECIAL - when 0 => - case func is - - -- when op_add => - when 32 => - result.alu.outsel := alu_adder; - result.alu.add := '1'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - result.alu_exc_en := '1'; - - -- when op_addu => - when 33 => - result.alu.outsel := alu_adder; - result.alu.add := '1'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_and => - when 36 => - result.alu.outsel := alu_and; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_break => - when 13 => - result.exc_break := '1'; - result.except_en := '1'; - - -- when op_div => - when 26 => - result.mul_access := '1'; - result.mul_start := '1'; - result.mul_s_un := '1'; - result.mul_mul_divn := '0'; - - -- when op_divu => - when 27 => - result.mul_access := '1'; - result.mul_start := '1'; - result.mul_s_un := '0'; - result.mul_mul_divn := '0'; - - -- when op_jalr => - when 9 => - result.jump_long := '1'; - result.wptr_srcsel := wptr_src_imm; - result.reg_write := '1'; - result.reg_link := '1'; - - -- when op_jr => - when 8 => - result.jump_long := '1'; - - -- when op_mfhi => - when 16 => - result.reg_write := '1'; - result.mul_access := '1'; - result.mul_hilo_sel := '1'; - - -- when op_mflo => - when 18 => - result.reg_write := '1'; - result.mul_access := '1'; - result.mul_hilo_sel := '0'; - - -- when op_mthi => - when 17 => - result.mul_hilo_we := '1'; - result.mul_hilo_sel := '1'; - - -- when op_mtlo => - when 19 => - result.mul_hilo_we := '1'; - result.mul_hilo_sel := '0'; - - -- when op_mult => - when 24 => - result.mul_access := '1'; - result.mul_start := '1'; - result.mul_s_un := '1'; - result.mul_mul_divn := '1'; - - -- when op_multu => - when 25 => - result.mul_access := '1'; - result.mul_start := '1'; - result.mul_s_un := '0'; - result.mul_mul_divn := '1'; - - -- when op_or => - when 37 => - result.alu.outsel := alu_or; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_nor => - when 39 => - result.alu.outsel := alu_nor; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_sll => - when 0 => - result.alu.op2_src := alu_src_reg; - result.alu.outsel := alu_shift2; - result.alu.shift_right := '0'; - result.shamt2_srcsel := sa_src_imm; - result.reg_write := '1'; - - -- when op_sllv => - when 4 => - result.alu.op2_src := alu_src_reg; - result.alu.outsel := alu_shift2; - result.alu.shift_right := '0'; - result.shamt2_srcsel := sa_src_reg; - result.reg_write := '1'; - - -- when op_slt => - when 42 => - result.alu.outsel := alu_lts; - result.alu.add := '0'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_sltu => - when 43 => - result.alu.outsel := alu_ltu; - result.alu.add := '0'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_sra => - when 3 => - result.alu.op2_src := alu_src_reg; - result.alu.outsel := alu_shift2; - result.alu.shift_right := '1'; - result.alu.shift_arith := '1'; - result.shamt2_srcsel := sa_src_imm; - result.reg_write := '1'; - - -- when op_srav => - when 7 => - result.alu.op2_src := alu_src_reg; - result.alu.outsel := alu_shift2; - result.alu.shift_right := '1'; - result.alu.shift_arith := '1'; - result.shamt2_srcsel := sa_src_reg; - result.reg_write := '1'; - - -- when op_srl => - when 2 => - result.alu.op2_src := alu_src_reg; - result.alu.outsel := alu_shift2; - result.alu.shift_right := '1'; - result.alu.shift_arith := '0'; - result.shamt2_srcsel := sa_src_imm; - result.reg_write := '1'; - - -- when op_srlv => - when 6 => - result.alu.op2_src := alu_src_reg; - result.alu.outsel := alu_shift2; - result.alu.shift_right := '1'; - result.alu.shift_arith := '0'; - result.shamt2_srcsel := sa_src_reg; - result.reg_write := '1'; - - -- when op_sub => - when 34 => - result.alu.outsel := alu_adder; - result.alu.add := '0'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - result.alu_exc_en := '1'; - - -- when op_subu => - when 35 => - result.alu.outsel := alu_adder; - result.alu.add := '0'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - -- when op_syscall => - when 12 => - result.exc_syscall := '1'; - result.except_en := '1'; - - -- when op_xor => - when 38 => - result.alu.outsel := alu_xor; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_reg; - result.reg_write := '1'; - - when others => - result.exc_illegal := '1'; - - end case; - --- REGIMM - when 1 => - case rt is - - -- when op_bgez => - when 1 => - result.branch := '1'; - result.bc_src := bc_ltz_gez; - result.bc_not := '1'; - - -- when op_bgezal => - when 17 => - result.branch := '1'; - result.bc_src := bc_ltz_gez; - result.bc_not := '1'; - result.wptr_srcsel := wptr_src_const; - result.reg_write := '1'; - result.reg_link := '1'; - - -- when op_bltz => - when 0 => - result.branch := '1'; - result.bc_src := bc_ltz_gez; - result.bc_not := '0'; - - -- when op_bltzal => - when 16 => - result.branch := '1'; - result.bc_src := bc_ltz_gez; - result.bc_not := '0'; - result.wptr_srcsel := wptr_src_const; - result.reg_write := '1'; - result.reg_link := '1'; - - when others => - result.exc_illegal := '1'; - - end case; - --- when COPz => - when 16 | 17 | 18 | 19 => - result.cop_instr_en := '1'; - case rs is - when 0 => -- MFCz - result.cop_read := '1'; - result.reg_write := '1'; - when 2 => -- CFCz - result.cop_read := '1'; - result.reg_write := '1'; - - when others => null; -- undef - - end case; - - --- when op_addi => - when 8 => - result.imm_src := src_imm32; - result.alu.outsel := alu_adder; - result.alu.add := '1'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.reg_write := '1'; - result.alu_exc_en := '1'; - --- when op_addiu => - when 9 => - result.imm_src := src_imm32; - result.alu.outsel := alu_adder; - result.alu.add := '1'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.reg_write := '1'; - --- when op_andi => - when 12 => - result.imm_src := src_imm16; - result.alu.outsel := alu_and; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.reg_write := '1'; - --- when op_beq => - when 4 => - result.branch := '1'; - result.bc_src := bc_eq_ne; - result.bc_not := '0'; - --- when op_bgtz => - when 7 => - result.branch := '1'; - result.bc_src := bc_lez_gtz; - result.bc_not := '1'; - --- when op_blez => - when 6 => - result.branch := '1'; - result.bc_src := bc_lez_gtz; - result.bc_not := '0'; - --- when op_bne => - when 5 => - result.branch := '1'; - result.bc_src := bc_eq_ne; - result.bc_not := '1'; - --- when op_j => - when 2 => - result.jump := '1'; - --- when op_jal => - when 3 => - result.jump := '1'; - result.wptr_srcsel := wptr_src_const; - result.reg_write := '1'; - result.reg_link := '1'; - --- when op_lb => - when 32 => - result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.shift_byp := '0'; - result.byte_en_byp := '1'; - result.sign_ext_byp := '0'; - result.load_signed := '1'; - result.word4_en := '1'; - --- when op_lbu => - when 36 => - result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.shift_byp := '0'; - result.byte_en_byp := '1'; - result.sign_ext_byp := '0'; - result.load_signed := '0'; - result.word4_en := '1'; - --- when op_lh => - when 33 => - result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.shift_byp := '0'; - result.sign_ext_byp := '0'; - result.byte_en_byp := '1'; - result.load_signed := '1'; - result.word2_en := '1'; - result.except_en := '1'; - --- when op_lhu => - when 37 => - result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.shift_byp := '0'; - result.sign_ext_byp := '0'; - result.byte_en_byp := '1'; - result.load_signed := '0'; - result.word2_en := '1'; - result.except_en := '1'; - --- when op_lui => - when 15 => - result.imm_src := src_imm16_high; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.alu.outsel := alu_adder; - result.reg_write := '1'; - result.alu.add := '1'; - --- when op_lw => - when 35 => --- result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.except_en := '1'; - --- when op_lwcz => - when 48 | 49 | 50 | 51 => --- result.imm_src := src_imm32; - result.dmem_en := '1'; - result.except_en := '1'; - result.cop_instr_en := '1'; - --- when op_lwl => - when 34 => --- result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.shift_byp := '0'; - result.byte_en_byp := '0'; - result.shift_offset := "01"; - result.align_left := '1'; - --- when op_lwr => - when 38 => --- result.imm_src := src_imm32; - result.dmem_en := '1'; - result.reg_write := '1'; - result.shift_byp := '0'; - result.byte_en_byp := '0'; - result.shift_offset := "00"; - result.align_left := '0'; - --- when op_ori => - when 13 => - result.imm_src := src_imm16; - result.alu.outsel := alu_or; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.reg_write := '1'; - --- when op_sb => - when 40 => - result.dmem_en := '1'; - result.dmem_we := '1'; --- result.imm_src := src_imm32; - result.shift_byp := '0'; - result.byte_en_byp := '0'; - result.word4_en := '1'; - --- when op_sh => - when 41 => - result.dmem_en := '1'; - result.dmem_we := '1'; --- result.imm_src := src_imm32; - result.shift_byp := '0'; - result.byte_en_byp := '0'; - result.word2_en := '1'; - result.except_en := '1'; - --- when op_slti => - when 10 => - result.alu.outsel := alu_lts; - result.alu.add := '0'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.imm_src := src_imm32; - result.reg_write := '1'; - --- when op_sltiu => - when 11 => - result.alu.outsel := alu_ltu; - result.alu.add := '0'; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.imm_src := src_imm32; - result.reg_write := '1'; - --- when op_sw => - when 43 => - result.dmem_en := '1'; - result.dmem_we := '1'; --- result.imm_src := src_imm32; - result.except_en := '1'; - --- when op_swcz => - when 56 | 57 | 58 | 59 => - result.dmem_en := '1'; - result.dmem_we := '1'; --- result.imm_src := src_imm32; - result.except_en := '1'; - result.cop_instr_en := '1'; - result.cop_read := '1'; - --- when op_swl => - when 42 => - result.dmem_en := '1'; - result.dmem_we := '1'; --- result.imm_src := src_imm32; - result.shift_byp := '0'; - result.byte_en_byp := '0'; - result.shift_offset := "01"; - --- when op_swr => - when 46 => - result.dmem_en := '1'; - result.dmem_we := '1'; --- result.imm_src := src_imm32; - result.shift_byp := '0'; - result.byte_en_byp := '0'; - result.align_left := '1'; - --- when op_xori => - when 14 => - result.imm_src := src_imm16; - result.alu.outsel := alu_xor; - result.alu.op1_src := alu_src_reg; - result.alu.op2_src := alu_src_imm; - result.reg_write := '1'; - - when others => - result.exc_illegal := '1'; - - end case; - - return result; - - end opcode_ctrl_lines; - -end mips_instr; - --------------------------------------------------------------------------- --------------------------------------------------------------------------- - diff --git a/lib/CPUs/MIPS/src/core/mips_muldiv.vhd b/lib/CPUs/MIPS/src/core/mips_muldiv.vhd deleted file mode 100644 index efce36b..0000000 --- a/lib/CPUs/MIPS/src/core/mips_muldiv.vhd +++ /dev/null @@ -1,454 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: The arithmetic logic unit --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.mips_types.all; - -entity muldiv is - Port - ( - rst : in std_logic; - clk : in std_logic; - hilo_we : in std_logic; - din_hi : in word_t; - din_lo : in word_t; - mul_divn : in std_logic; - start : in std_logic; - s_un : in std_logic; - hilo_sel : in std_logic; - busy : out std_logic; - dout : out word_t - ); -end muldiv; - -architecture Behavioral of muldiv is - - subtype pprod_t is unsigned (39 downto 0); - subtype prod_t is unsigned (63 downto 0); - subtype byte_t is unsigned (7 downto 0); - - type pprod_array_t is array (natural range <>) of pprod_t; - type word_array_t is array (natural range <>) of word_t; - type byte_array_t is array (natural range <>) of byte_t; - - signal pprod : pprod_array_t(0 to 3); - signal sign1 : std_logic; - signal sign2 : std_logic; - signal s1_r : std_logic; - signal s2_r : std_logic; - signal sr_r : std_logic; - signal cy : unsigned (3 downto 0); - signal mul_start : std_logic; - signal mul_en : std_logic; - signal sum_en : std_logic; - signal pre_sum_vld : std_logic; - signal pp_reg : unsigned (63 downto 8); - signal pre_const : word_array_t(0 to 1); - signal result : prod_t; - signal add_op1 : unsigned (39 downto 0); - signal add_op2 : unsigned (39 downto 0); - signal add_res : unsigned (39 downto 0); - signal ppadd_op1 : word_array_t(0 to 3); - signal ppadd_op2 : word_array_t(0 to 3); - signal ppadd_res : word_array_t(0 to 3); - signal ppadd_cyi : unsigned (3 downto 0); - signal ppadd_cyo : unsigned (3 downto 0); - - signal pp_op1_r : word_t; - signal pp_op1 : word_t; - signal pp_op2 : word_t; - signal pp_op2_r : byte_array_t(0 to 3); - signal bsy : std_logic; - - signal div_add_res : unsigned (32 downto 0); - signal div_add_op1 : unsigned (32 downto 0); - signal div_add_op2 : unsigned (32 downto 0); - signal div_add_cyi : std_logic; - signal div_qbit : std_logic; - signal div_start : std_logic; - signal div_en : std_logic; - - signal div_A : unsigned (32 downto 0); - signal div_M : unsigned (32 downto 0); - signal div_M_n : unsigned (32 downto 0); - signal div_Q : word_t; - - type md_state_t is (md_rdy, mul_pre1, mul_pre2, mul_pp, mul_sum, div_process, div_post1, div_post2, div_post3); - signal s, sn : md_state_t; - signal cycle_cnt : natural range 0 to 31; - signal cycle_cnt_preset : natural range 0 to 31; - signal cycle_cnt_load : std_logic; - signal div_fin_en : unsigned (2 downto 0); - --------------------------------------------------------------------------- -begin --- 9A0CD0570B88D78 - - busy <= bsy; - - sign1 <= din_hi(din_hi'left) and s_un; - sign2 <= din_lo(din_lo'left) and s_un; - pp_op1 <= not din_hi when sign1 = '1' else din_hi; - pp_op2 <= not din_lo when sign2 = '1' else din_lo; - --------------------------------------------------------------------------- -md_state: - process(s, start, mul_divn, cycle_cnt) - begin - - bsy <= '1'; - cycle_cnt_load <= '0'; - cycle_cnt_preset <= 7; - - mul_en <= '0'; - div_en <= '0'; - sum_en <= '0'; - pre_sum_vld <= '0'; - mul_start <= '0'; - div_start <= '0'; - div_fin_en <= "000"; - sn <= s; - case s is - when md_rdy => - bsy <= '0'; - if start = '1' then - if mul_divn = '1' then - sn <= mul_pre1; - cycle_cnt_load <= '1'; - cycle_cnt_preset <= 7; - mul_start <= '1'; - else - sn <= div_process; - cycle_cnt_load <= '1'; - cycle_cnt_preset <= 31; - div_start <= '1'; - end if; - end if; - when mul_pre1 => - pre_sum_vld <= '1'; - mul_en <= '1'; - sn <= mul_pre2; - when mul_pre2 => - pre_sum_vld <= '1'; - mul_en <= '1'; - sn <= mul_pp; - when mul_pp => - mul_en <= '1'; - if cycle_cnt = 0 then - cycle_cnt_load <= '1'; - cycle_cnt_preset <= 3; - sn <= mul_sum; - end if; - when mul_sum => - sum_en <= '1'; - if cycle_cnt = 0 then - bsy <= '0'; - sn <= md_rdy; - end if; - when div_process => - div_en <= '1'; - if cycle_cnt = 0 then - sn <= div_post1; - end if; - when div_post1 => - div_fin_en <= "001"; - sn <= div_post2; - when div_post2 => - div_fin_en <= "010"; - sn <= div_post3; - when div_post3 => - div_fin_en <= "100"; - sn <= md_rdy; - bsy <= '0'; - when others => - sn <= md_rdy; - end case; - - end process; - -md_state_next: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - s <= md_rdy; - else - s <= sn; - end if; - end if; - end process; - -md_cycle_cnt: - process(clk) - begin - if rising_edge(clk) then - if rst = '1' then - cycle_cnt <= 0; - elsif cycle_cnt_load = '1' then - cycle_cnt <= cycle_cnt_preset; - elsif cycle_cnt /= 0 then - cycle_cnt <= cycle_cnt - 1; - end if; - end if; - end process; - -proc_out_reg: - process(hilo_sel, result) - begin - if hilo_sel = '1' then - dout <= result(63 downto 32); - else - dout <= result(31 downto 0); - end if; - end process; - -proc_in_reg: - process(clk) - variable pre_cond : unsigned(1 downto 0); - begin - if rising_edge(clk) then - if mul_start = '1' or div_start = '1' then - pp_op1_r <= pp_op1; - pre_const(0) <= (others => '0'); - pre_const(1) <= (others => '0'); - pre_cond := (din_hi(din_hi'left) and s_un) & (din_lo(din_lo'left) and s_un); - s1_r <= pre_cond(1); - s2_r <= pre_cond(0); - sr_r <= pre_cond(0) xor pre_cond(1); - case pre_cond is - when "01" => - pre_const(0) <= din_hi; - pre_const(1) <= X"FFFF_FFFF"; - when "10" => - pre_const(0) <= X"0000_0000"; - pre_const(1) <= X"FFFF_FFFF"; - when "11" => - pre_const(0) <= not din_hi; - pre_const(1) <= X"0000_0001"; - when others => null; - end case; - elsif pre_sum_vld = '1' then - pre_const(0) <= pre_const(1); - end if; - end if; - end process; - -proc_mul_sr: - process(clk) - begin - if rising_edge(clk) then - if mul_start = '1' then - for i in 0 to 3 loop - cy(i) <= '0'; - pprod(i) <= ppadd_res(i) & X"00"; - end loop; - elsif mul_en = '1' then - for i in 0 to 3 loop - cy(i) <= ppadd_cyo(i); - pprod(i) <= ppadd_res(i) & pprod(i)(8 downto 1); - end loop; - elsif sum_en = '1' then - for i in 1 to 3 loop - pprod(i-1) <= pprod(i); - end loop; - end if; - end if; - end process; - -gen_mul32x8pp: - for i in 0 to 3 generate - begin - - pp_adder_mux: - process(mul_start, pp_op1, pp_op2, pp_op1_r, pp_op2_r(i), s1_r, sign1, pprod(i), cy(i)) - variable v2 : unsigned(7 downto 0); - begin - ppadd_cyi(i) <= '0'; - ppadd_op1(i) <= (others => '0'); - if mul_start = '1' then - ppadd_op2(i) <= (others => '0'); - v2 := pp_op2(8*(i+1)-1 downto 8*i); - if v2(0) = '1' then - ppadd_cyi(i) <= sign1; - ppadd_op1(i) <= pp_op1; - end if; - else - ppadd_op2(i) <= cy(i) & pprod(i)(39 downto 9); - v2 := pp_op2_r(i); - if v2(0) = '1' then - ppadd_cyi(i) <= s1_r; - ppadd_op1(i) <= pp_op1_r; - end if; - end if; - end process; - - pp_adder: - process(ppadd_op1(i), ppadd_op2(i), ppadd_cyi(i)) - variable sum_pp : unsigned(33 downto 0); - begin - sum_pp := ('0' & ppadd_op1(i) & ppadd_cyi(i)) + ('0' & ppadd_op2(i) & ppadd_cyi(i)); - ppadd_res(i) <= sum_pp(sum_pp'left-1 downto 1); - ppadd_cyo(i) <= sum_pp(sum_pp'left); - end process; - - proc_mul_ctrl: - process(clk) - begin - if rising_edge(clk) then - if mul_start = '1' then - pp_op2_r(i) <= '0' & pp_op2(8*(i+1)-1 downto 8*i+1); - elsif mul_en = '1' then - pp_op2_r(i) <= '0' & pp_op2_r(i)(7 downto 1); - end if; - end if; - end process; - - end generate; - -comb_mul_adder: - process(add_op1, add_op2) - variable sum_mul : unsigned(39 downto 0); - begin - sum_mul := (add_op1) + (add_op2); - add_res <= sum_mul(sum_mul'left downto 0); - end process; - -comb_mul_adder_mux: - process(pre_const, pre_sum_vld, pp_reg, pprod, sr_r) - variable s_ext : std_logic; - begin - if pre_sum_vld = '1' then - add_op1 <= pp_reg(63 downto 24); - add_op2 <= pre_const(0) & X"00"; - else - s_ext := pp_reg(63) and sr_r; - add_op1 <= (7 downto 0 => s_ext) & pp_reg(63 downto 32); - add_op2 <= pprod(0); - end if; - end process; - -comb_mul: - process(clk) - variable tmp : prod_t; - begin - if rising_edge(clk) then - if mul_start = '1' then - pp_reg <= (others => '0'); - elsif pre_sum_vld = '1' then - pp_reg <= add_res & X"0000"; - elsif sum_en = '1' then - tmp := add_res & pp_reg(31 downto 8); - pp_reg <= tmp(63 downto 8); - result <= tmp; - if sr_r = '1' then - result <= not tmp; - end if; - elsif div_fin_en(1) = '1' then - result(63 downto 32) <= div_A(31 downto 0); - if s1_r = '1' then - result(63 downto 32) <= div_add_res(31 downto 0); - end if; - elsif div_fin_en(2) = '1' then - result(31 downto 0) <= div_Q; - if sr_r = '1' then - result(31 downto 0) <= div_add_res(31 downto 0); - end if; - elsif hilo_we = '1' then - if hilo_sel = '1' then - result(63 downto 32) <= din_hi; - else - result(31 downto 0) <= din_hi; - end if; - end if; - end if; - end process; - -div_adder: - process(div_add_op1, div_add_op2, div_add_cyi) - variable sum_div : unsigned(33 downto 0); - begin - sum_div := (div_add_op1 & div_add_cyi) + (div_add_op2 & div_add_cyi); - div_add_res <= sum_div(sum_div'left downto 1); - end process; - -div_adder_mux: - process(div_start, div_en, div_fin_en, div_A, div_Q, pp_op1, sign1, s1_r, s2_r, sr_r, div_qbit, div_M, div_M_n) - begin - - div_add_cyi <= s2_r xor div_qbit; - div_add_op1 <= div_A(31 downto 0) & div_Q(31); - div_add_op2 <= (others => '0'); - if div_start = '1' then - div_add_op1 <= '0' & pp_op1; - div_add_cyi <= sign1; - elsif div_en = '1' then - div_add_op2 <= div_M; - if div_qbit = '1' then - div_add_op2 <= div_M_n; - end if; - elsif div_fin_en(0) = '1' then - div_add_op2 <= div_M; - div_add_cyi <= s2_r; - div_add_op1 <= '0' & div_A(31 downto 0); - elsif div_fin_en(1) = '1' then - div_add_cyi <= s1_r; - div_add_op1 <= '0' & not div_A(31 downto 0); - elsif div_fin_en(2) = '1' then - div_add_cyi <= sr_r; - div_add_op1 <= '0' & not div_Q; - end if; - end process; - -divide: - process(clk) - variable quo : std_logic; - begin - if rising_edge(clk) then - if div_start = '1' then - div_qbit <= '1'; - div_Q <= div_add_res(31 downto 0); - div_A <= (others => '0'); - if sign2 = '1' then - div_M_n <= '1' & din_lo; - div_M <= '0' & not din_lo; - else - div_M_n <= '1' & not din_lo; - div_M <= '0' & din_lo; - end if; - elsif div_en = '1' then - div_qbit <= not div_add_res(32); - div_A <= div_add_res(32 downto 0); - div_Q <= div_Q(30 downto 0) & not div_add_res(32); - elsif div_fin_en(0) = '1' then - if div_A(32) = '1' then - div_A <= '0' & div_add_res(31 downto 0); - end if; - end if; - end if; - end process; - --------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/CPUs/MIPS/src/core/mips_pipeline.vhd b/lib/CPUs/MIPS/src/core/mips_pipeline.vhd deleted file mode 100644 index 2cc39e8..0000000 --- a/lib/CPUs/MIPS/src/core/mips_pipeline.vhd +++ /dev/null @@ -1,851 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: The pipeline --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -library work; -use work.mips_types.all; -use work.mips_instr.all; - -entity pipeline is - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - imem_err : in STD_LOGIC; - imem_rdy : in STD_LOGIC; - imem_en : out STD_LOGIC; - imem_addr : out word_t; - imem_data : in word_t; - dmem_err : in STD_LOGIC; - dmem_rdy : in STD_LOGIC; - dmem_en : out STD_LOGIC; - dmem_we : out STD_LOGIC; - dmem_be : out unsigned(3 downto 0); - dmem_addr : out word_t; - dmem_din : in word_t; - dmem_dout : out word_t; - cop_ir : out word_t; - cop_ir_en : out STD_LOGIC; - cop_din : in word_t; - cop_dout : out word_t; - c0_ctrl_out : out cop0_ctrl_in_t; - c0_ctrl_in : in cop0_ctrl_out_t - - ); -end pipeline; - -architecture Behavioral of pipeline is - --------------------------------------------------------------------------- - COMPONENT reg_dual is - Generic - ( - addr_width : integer := 3; - data_width : integer := 8 - ); - Port - ( - clk_w : in STD_LOGIC; - en : in STD_LOGIC; - we : in STD_LOGIC; - wptr : in unsigned (addr_width-1 downto 0); - din : in unsigned (data_width-1 downto 0); - rptr_a : in unsigned (addr_width-1 downto 0); - rptr_b : in unsigned (addr_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); - END COMPONENT; - --------------------------------------------------------------------------- - COMPONENT shifter is - Generic - ( - data_width : integer - ); - Port - ( - shift_ctrl : in shift_ctrl_t; - din : in unsigned (data_width-1 downto 0); - dout : out unsigned (data_width-1 downto 0) - ); - END COMPONENT; - --------------------------------------------------------------------------- - COMPONENT alu is - Generic - ( - data_width : integer - ); - Port - ( - op1_in : in unsigned (data_width-1 downto 0); - op2_in : in unsigned (data_width-1 downto 0); - op2_shifted : in unsigned (data_width-1 downto 0); - ctrl : in alu_ctrl_t; - result : out unsigned (data_width-1 downto 0); - flags : out alu_flags_t - ); - END COMPONENT; - --------------------------------------------------------------------------- - COMPONENT bcu is - Generic - ( - data_width : integer - ); - Port - ( - op1_in : in unsigned (data_width-1 downto 0); - op2_in : in unsigned (data_width-1 downto 0); - flags : out bcu_flags_t - ); - END COMPONENT; - --------------------------------------------------------------------------- - COMPONENT muldiv is - Port - ( - rst : in std_logic; - clk : in std_logic; - hilo_we : in std_logic; - din_hi : in word_t; - din_lo : in word_t; - mul_divn : in std_logic; - start : in std_logic; - s_un : in std_logic; - hilo_sel : in std_logic; - busy : out std_logic; - dout : out word_t - ); - END COMPONENT; - --------------------------------------------------------------------------- - signal ID_stage : ID_t; - signal EX_stage : EX_t; - signal MEM_stage : MEM_t; - signal WB_stage : WB_t; - signal clk_2, clk_1 : STD_LOGIC; - signal hdu : hdu_t; - signal sdu : sdu_t; - signal reg_a : word_t; - signal reg_b : word_t; - signal branch_ce : STD_LOGIC; - signal cpu_run : STD_LOGIC; - signal alu_result : word_t; - signal mul_result : word_t; - signal mul_busy : STD_LOGIC; - signal EX_events_instr : event_t; - signal EX_events_alu : event_t; - signal EX_events_mem : event_t; - signal EX_events : event_t; - signal MEM_events : event_t; - signal bcu_op_a : word_t; - signal bcu_op_b : word_t; - signal bcu_flags : bcu_flags_t; - signal vaddr : word_t; - signal dmem_src : word_t; - signal stage_rst : unsigned(3 downto 0); - signal pipe_rst : STD_LOGIC; - - signal pc : pc_t; - --------------------------------------------------------------------------- -begin - - clk_1 <= clk; - clk_2 <= not clk; - cpu_run <= ce; - - -- Stall Detection Unit --------------------------------------------------- - sdu.ID_nop <= sdu.imem_dep or c0_ctrl_in.exc_pending or ID_stage.exc or EX_stage.exc or MEM_stage.exc; - sdu.EX_nop <= sdu.mul_dep or ID_stage.nop or ID_stage.exc; - sdu.MEM_nop <= EX_stage.nop or EX_stage.exc; - sdu.WB_nop <= sdu.dmem_dep or MEM_stage.nop; - - sdu.stall_all <= sdu.dmem_dep; - sdu.ID_stall <= sdu.stall_all or sdu.imem_dep or sdu.mul_dep or c0_ctrl_in.exc_exit; - sdu.EX_stall <= sdu.stall_all; - sdu.MEM_stall <= sdu.stall_all; - sdu.WB_stall <= '0'; - - sdu.mul_dep <= ID_stage.ctrl.mul_access and (EX_stage.ctrl.mul_start or mul_busy); - sdu.imem_dep <= not imem_rdy; - sdu.dmem_dep <= not dmem_rdy and MEM_stage.ctrl.dmem_en; - --------------------------------------------------------------------------- - imem_en <= cpu_run and not (sdu.mul_dep or sdu.dmem_dep or c0_ctrl_in.exc_commit); - --------------------------------------------------------------------------- --- Coprocessor assignments --------------------------------------------------------------------------- - c0_ctrl_out.bd_wb <= WB_stage.bd; - c0_ctrl_out.epc_mem <= MEM_stage.pcn; - c0_ctrl_out.epc_wb <= MEM_stage.epc; - c0_ctrl_out.imem_addr <= EX_stage.epc; - c0_ctrl_out.dmem_addr <= MEM_stage.va; - c0_ctrl_out.sdu <= sdu; - c0_ctrl_out.events <= WB_stage.events; - c0_ctrl_out.exc_req <= MEM_stage.exc; - c0_ctrl_out.exc_ack <= WB_stage.exc; - cop_ir <= ID_stage.IR; - cop_ir_en <= ID_stage.ctrl.cop_instr_en; - cop_dout <= dmem_din when MEM_stage.ctrl.dmem_en = '1' else MEM_stage.ex_result; - --------------------------------------------------------------------------- --- Muldiv --------------------------------------------------------------------------- -inst_muldiv: muldiv - PORT MAP - ( - rst => rst, - clk => clk, - hilo_we => EX_stage.ctrl.mul_hilo_we, - din_hi => EX_stage.reg_a, - din_lo => EX_stage.reg_b, - mul_divn => EX_stage.ctrl.mul_mul_divn, - start => EX_stage.ctrl.mul_start, - s_un => EX_stage.ctrl.mul_s_un, - hilo_sel => EX_stage.ctrl.mul_hilo_sel, - busy => mul_busy, - dout => mul_result - ); - --------------------------------------------------------------------------- --- IF stage --------------------------------------------------------------------------- - imem_addr <= pc.curr; - - pipe_rst <= stage_rst(0); - -proc_stage_reset: - process(clk_1) - begin - if rising_edge(clk_1) then - if rst = '1' then - stage_rst <= (others => '1'); - else - stage_rst <= stage_rst(stage_rst'left-1 downto 0) & '0'; - end if; - end if; - end process; - -proc_stage_pc: - process(pc) - begin - if pc.branch_take = '1' then - pc.curr <= pc.pc_branch after 2 ns; - else - pc.curr <= pc.nxt after 2 ns; - end if; - end process; - -proc_stage_pc_branch: - process(clk_1) - begin - if rising_edge(clk_1) then - if sdu.ID_stall = '0' then - pc.pc_branch <= pc.curr + ID_stage.bimm18; - end if; - end if; - end process; - -proc_stage_branch_ce: - process(clk_1) - begin - if rising_edge(clk_1) then - if pipe_rst = '1' then - branch_ce <= '1'; - else - branch_ce <= c0_ctrl_in.exc_pending; - if sdu.ID_stall = '0' and c0_ctrl_in.exc_inject = '0' then - branch_ce <= '1'; - end if; - end if; - end if; - end process; - -proc_stage_pc_next: - process(clk_1) - begin - if rising_edge(clk_1) then - if c0_ctrl_in.exc_inject = '1' then - pc.nxt <= c0_ctrl_in.exc_vec; - elsif sdu.ID_stall = '0' then - pc.last <= pc.curr; - if ID_stage.ctrl.jump = '1' then - pc.nxt <= ID_stage.jimm32; - elsif ID_stage.ctrl.jump_long = '1' then - pc.nxt <= ID_stage.reg_a; - else - pc.nxt <= pc.curr + 4; - end if; - end if; - end if; - end process; - -proc_stage_branch: - process(clk_2) - begin - if rising_edge(clk_2) and branch_ce = '1' then - pc.branch_take <= '0'; - if EX_stage.ctrl.branch = '1' then - - case EX_stage.ctrl.bc_src is - - when bc_eq_ne => - pc.branch_take <= EX_stage.ctrl.bc_not xor bcu_flags.eq; - - when bc_lez_gtz => - pc.branch_take <= EX_stage.ctrl.bc_not xor (bcu_flags.eq or bcu_flags.ltz); - - when bc_ltz_gez => - pc.branch_take <= EX_stage.ctrl.bc_not xor bcu_flags.ltz; - - when others => null; - end case; - end if; - end if; - end process; - --------------------------------------------------------------------------- --- ID stage --------------------------------------------------------------------------- - ID_stage.IR <= to_01(imem_data); - ID_stage.pcn <= pc.curr; - ID_stage.op <= decode_op(ID_stage.IR); - ID_stage.jimm32 <= extract_jimm32(ID_stage.IR, ID_stage.pcn); - ID_stage.bimm18 <= extract_bimm18(ID_stage.IR, ID_stage.pcn); - ID_stage.shamt <= extract_shamt(ID_stage.IR); - ID_stage.reg_a_rptr <= extract_rs(ID_stage.IR); - ID_stage.reg_b_rptr <= extract_rt(ID_stage.IR); - ID_stage.ctrl <= opcode_ctrl_lines(ID_stage.IR) when sdu.ID_nop = '0' else ctrl_lines_default; - ID_stage.reg_write <= ID_stage.ctrl.reg_write; - ID_stage.epc <= pc.last; - ID_stage.exc <= event_is_active(ID_stage.events); -- Todo: works - ID_stage.nop <= sdu.ID_nop; - -proc_ID_except: - process(ID_stage, c0_ctrl_in, pc) - begin - ID_stage.events <= events_clr; - ID_stage.events.inst_load_err <= not c0_ctrl_in.exc_pending and (pc.nxt(1) or pc.nxt(0)); - ID_stage.events.inst_priv_addr <= not c0_ctrl_in.exc_pending and (pc.nxt(word_t'left) and c0_ctrl_in.user_mode); - end process; - -proc_stage_hdu: - process(ID_stage, EX_stage, MEM_stage, WB_stage) - variable read_a, read_b : boolean; - variable raw_a_EX, raw_a_MEM, raw_a_WB : boolean; - variable raw_b_EX, raw_b_MEM, raw_b_WB : boolean; - variable reg_ptr_a : reg_ptr_t; - variable reg_ptr_b : reg_ptr_t; - begin - - reg_ptr_a := ID_stage.reg_a_rptr; - reg_ptr_b := ID_stage.reg_b_rptr; - raw_a_EX := reg_ptr_a = EX_stage.reg_wptr and EX_stage.wreg_we = '1'; - raw_a_MEM := reg_ptr_a = MEM_stage.reg_wptr and MEM_stage.wreg_we = '1'; - raw_a_WB := reg_ptr_a = WB_stage.reg_wptr and WB_stage.wreg_we = '1'; - raw_b_EX := reg_ptr_b = EX_stage.reg_wptr and EX_stage.wreg_we = '1'; - raw_b_MEM := reg_ptr_b = MEM_stage.reg_wptr and MEM_stage.wreg_we = '1'; - raw_b_WB := reg_ptr_b = WB_stage.reg_wptr and WB_stage.wreg_we = '1'; - - hdu.alu_fwd_a_ex <= raw_a_EX after 1 ns; - hdu.alu_fwd_a_mem <= raw_a_MEM after 1 ns; - hdu.alu_fwd_a_wb <= raw_a_WB after 1 ns; - hdu.alu_fwd_b_ex <= raw_b_EX after 1 ns; - hdu.alu_fwd_b_mem <= raw_b_MEM after 1 ns; - hdu.alu_fwd_b_wb <= raw_b_WB after 1 ns; - - end process; - -proc_stage_fwd_a: - process(reg_a, hdu, EX_stage, MEM_stage, WB_stage) - variable data : word_t; - begin - data := reg_a; - if hdu.alu_fwd_a_ex then - data := EX_stage.result; - elsif hdu.alu_fwd_a_mem then - data := MEM_stage.data; - elsif hdu.alu_fwd_a_wb then - data := WB_stage.data; - end if; - ID_stage.reg_a <= to_01(data) after 2 ns; - end process; - -proc_stage_fwd_b: - process(reg_b, hdu, EX_stage, MEM_stage, WB_stage) - variable data : word_t; - begin - data := reg_b; - if hdu.alu_fwd_b_ex then - data := EX_stage.result; - elsif hdu.alu_fwd_b_mem then - data := MEM_stage.data; - elsif hdu.alu_fwd_b_wb then - data := WB_stage.data; - end if; - ID_stage.reg_b <= to_01(data) after 2 ns; - end process; - -proc_imm_mux: - process(ID_stage) - variable data : word_t; - begin - data := extract_uimm16(ID_stage.IR); - - case ID_stage.ctrl.imm_src is - - when src_imm32 => - data := extract_simm32(ID_stage.IR); - - when src_imm16 => - data := extract_uimm16(ID_stage.IR); - - when src_imm16_high => - data := ID_stage.IR(word_t'length/2-1 downto 0) & (word_t'length/2-1 downto 0 => '0'); - - when others => null; - - end case; - - ID_stage.imm <= data after 2 ns; - - end process; - --------------------------------------------------------------------------- -inst_reg_dual: reg_dual - GENERIC MAP - ( - addr_width => reg_ptr_t'length, - data_width => word_t'length - ) - PORT MAP - ( - clk_w => clk_1, - we => WB_stage.wreg_we, - en => '1', - wptr => WB_stage.reg_wptr, - din => WB_stage.data, - rptr_a => ID_stage.reg_a_rptr, - rptr_b => ID_stage.reg_b_rptr, - dout_a => reg_a, - dout_b => reg_b - ); - --------------------------------------------------------------------------- --- EX stage --------------------------------------------------------------------------- - EX_stage.reg_a_rptr <= extract_rs(EX_stage.IR); - EX_stage.reg_b_rptr <= extract_rt(EX_stage.IR); - EX_stage.result <= alu_result when EX_stage.ctrl.mul_access = '0' else mul_result; - -proc_stage_ID_EX_1: - process(clk_1) - begin - if rising_edge(clk_1) then - if stage_rst(1) = '1' then - EX_stage.op <= NOP; - EX_stage.IR <= (others => '0'); - EX_stage.ctrl <= ctrl_lines_default; - EX_stage.reg_write <= '0'; - EX_stage.epc <= (others => '0'); - EX_stage.pcn <= (others => '0'); - EX_stage.events_in <= events_clr; - elsif sdu.EX_stall = '0' then - EX_stage.reg_a <= ID_stage.reg_a; - EX_stage.reg_b <= ID_stage.reg_b; - EX_stage.events_in <= ID_stage.events; - EX_stage.op <= ID_stage.op; - EX_stage.ctrl <= ID_stage.ctrl; - EX_stage.reg_write <= ID_stage.reg_write; - EX_stage.nop <= sdu.EX_nop; - EX_stage.IR <= ID_stage.IR; - EX_stage.pcn <= ID_stage.pcn; - EX_stage.epc <= ID_stage.epc; - if sdu.EX_nop = '1' then - EX_stage.op <= NOP; - EX_stage.IR <= (others => '0'); - EX_stage.ctrl <= ctrl_lines_default; - EX_stage.reg_write <= '0'; - end if; - end if; - end if; - end process; - -proc_stage_EX_instr_except: - process(EX_stage) - begin - EX_events_instr <= events_clr; - EX_events_instr.illegal <= EX_stage.ctrl.exc_illegal; - EX_events_instr.break <= EX_stage.ctrl.exc_break; - EX_events_instr.syscall <= EX_stage.ctrl.exc_syscall; - end process; - -proc_stage_EX_alu_except: - process(EX_stage) - begin - EX_events_alu <= events_clr; - if EX_stage.ctrl.alu_exc_en = '1' then - if EX_stage.alu_flags.ovf = '1' then - EX_events_alu.alu_ovf <= '1'; - end if; - if EX_stage.alu_flags.uvf = '1' then - EX_events_alu.alu_uvf <= '1'; - end if; - end if; - end process; - - vaddr <= ID_stage.reg_a + extract_simm32(ID_stage.IR); - -proc_stage_EX_mem_except: - process(clk_1) - begin - if rising_edge(clk_1) then - if pipe_rst = '1' then - dmem_en <= '0'; - elsif sdu.EX_stall = '0' then - EX_events_mem <= events_clr; - dmem_en <= '0'; - if ID_stage.ctrl.dmem_en = '1' then - dmem_en <= '1'; - if ID_stage.ctrl.except_en = '1' then - if ID_stage.ctrl.word2_en = '1' then - if vaddr(0) = '1' then - EX_events_mem.data_load_err <= not ID_stage.ctrl.dmem_we; - EX_events_mem.data_store_err <= ID_stage.ctrl.dmem_we; - dmem_en <= '0'; - end if; - elsif vaddr(1 downto 0) /= "00" then - EX_events_mem.data_load_err <= not ID_stage.ctrl.dmem_we; - EX_events_mem.data_store_err <= ID_stage.ctrl.dmem_we; - dmem_en <= '0'; - end if; - end if; - end if; - end if; - end if; - end process; - -proc_stage_DMEM_ADDR: - process(clk_1) - begin - if rising_edge(clk_1) then - if sdu.EX_stall = '0' then - EX_stage.va <= vaddr; - if c0_ctrl_in.EB = '1' then - if ID_stage.ctrl.word2_en = '0' then - EX_stage.pa_off <= not vaddr(1 downto 0); - else - EX_stage.pa_off <= not vaddr(1) & vaddr(0); - end if; - else - EX_stage.pa_off <= vaddr(1 downto 0); - end if; - end if; - end if; - end process; - dmem_src <= cop_din when EX_stage.ctrl.cop_instr_en = '1' else EX_stage.reg_b; - dmem_be <= store_be(EX_stage.pa_off, EX_stage.ctrl.dmem_en, EX_stage.ctrl.word2_en, EX_stage.ctrl.word4_en, EX_stage.ctrl.align_left, EX_stage.ctrl.shift_byp) after 1 ns; - dmem_we <= EX_stage.ctrl.dmem_we; - dmem_dout <= store_shift(dmem_src, EX_stage.pa_off, EX_stage.ctrl.shift_offset, EX_stage.ctrl.shift_byp) after 1ns; - dmem_addr <= EX_stage.va; - EX_stage.events <= EX_events_instr or EX_events_mem or EX_events_alu or EX_stage.events_in; - EX_stage.exc <= event_is_active(EX_stage.events); - --------------------------------------------------------------------------- -proc_wptr_mux: - process(EX_stage) - variable opclass : opcode_t; - variable reg_wptr : reg_ptr_t; - begin - - opclass := extract_opc(EX_stage.IR); - case opclass is - when "000000" => - reg_wptr := extract_rd(EX_stage.IR); - when others => - reg_wptr := extract_rt(EX_stage.IR); - end case; - - EX_stage.wreg_we <= EX_stage.reg_write after 1 ns; - if reg_wptr = "00000" then - EX_stage.wreg_we <= '0' after 1 ns; - end if; - - EX_stage.reg_wptr <= reg_wptr after 1 ns; - case EX_stage.ctrl.wptr_srcsel is - when wptr_src_imm => - EX_stage.reg_wptr <= reg_wptr after 1 ns; - - when wptr_src_const => - EX_stage.reg_wptr <= to_unsigned(31, reg_ptr_t'length) after 1 ns; - EX_stage.wreg_we <= '1' after 1 ns; - - when others => null; - end case; - - end process; - --------------------------------------------------------------------------- -proc_stage_bcu_op: - process(clk_1) - begin - if rising_edge(clk_1) and sdu.EX_stall = '0' then - bcu_op_a <= ID_stage.reg_a; - bcu_op_b <= ID_stage.reg_b; - end if; - end process; - -EX_stage.alu_op1 <= EX_stage.reg_a; - -alu_op2_mux: - process(clk_1) - variable data : word_t; - begin - - if rising_edge(clk_1) and sdu.EX_stall = '0' then - data := ID_stage.reg_b; - - case ID_stage.ctrl.alu.op2_src is - - when alu_src_reg => - data := ID_stage.reg_b; - - when alu_src_imm => - data := ID_stage.imm; - - when others => null; - - end case; - - EX_stage.alu_op2 <= data; - end if; - - end process; - -shifter_sa_mux: - process(clk_1) - variable data : shamt_t; - variable data_inv : shamt_t; - - begin - if rising_edge(clk_1) and sdu.EX_stall = '0' then - data := ID_stage.reg_a(4 downto 0); - case ID_stage.ctrl.shamt2_srcsel is - - when sa_src_reg => - data := ID_stage.reg_a(4 downto 0); - - when sa_src_imm => - data := ID_stage.shamt; - - when others => null; - - end case; - data_inv := not data + 1; - if ID_stage.ctrl.alu.shift_right = '0' then - EX_stage.shift_ctrl.shamt_rnd <= data_inv after 2 ns; - else - EX_stage.shift_ctrl.shamt_rnd <= data after 2 ns; - end if; - EX_stage.shift_ctrl.shamt_nrm <= data after 1 ns; - EX_stage.shift_ctrl.shift_right <= ID_stage.ctrl.alu.shift_right; - EX_stage.shift_ctrl.shift_arith <= ID_stage.ctrl.alu.shift_arith; - end if; - - end process; - --------------------------------------------------------------------------- -inst_shifter: shifter - GENERIC MAP - ( - data_width => word_t'length - ) - PORT MAP - ( - shift_ctrl => EX_stage.shift_ctrl, - din => EX_stage.reg_b, - dout => EX_stage.alu_op2_s - ); - -inst_alu: alu - GENERIC MAP - ( - data_width => word_t'length - ) - PORT MAP - ( - op1_in => EX_stage.alu_op1, - op2_in => EX_stage.alu_op2, - op2_shifted => EX_stage.alu_op2_s, - ctrl => EX_stage.ctrl.alu, - result => alu_result, - flags => EX_stage.alu_flags - ); - -inst_bcu: bcu - GENERIC MAP - ( - data_width => word_t'length - ) - PORT MAP - ( - op1_in => bcu_op_a, - op2_in => bcu_op_b, - flags => bcu_flags - ); - --------------------------------------------------------------------------- --- MEM stage --------------------------------------------------------------------------- -proc_stage_MEM_n: - process(clk_1) - begin - if rising_edge(clk_1) then - if stage_rst(2) = '1' then - MEM_stage.op <= NOP; - MEM_stage.wreg_we <= '0'; - MEM_stage.ctrl <= ctrl_lines_default; - MEM_stage.pa_off <= (others => '0'); - MEM_stage.events_in <= events_clr; - elsif sdu.MEM_stall = '0' then - MEM_stage.events_in <= EX_stage.events; - MEM_stage.op <= EX_stage.op; - MEM_stage.wreg_we <= EX_stage.wreg_we; - MEM_stage.ctrl <= EX_stage.ctrl; - if EX_stage.ctrl.dmem_en = '1' then - MEM_stage.va <= EX_stage.va; - end if; - MEM_stage.pa_off <= EX_stage.pa_off; - MEM_stage.reg_wptr <= EX_stage.reg_wptr; - MEM_stage.nop <= sdu.MEM_nop; - if MEM_stage.reg_wptr = EX_stage.reg_wptr then - if (EX_stage.ctrl.dmem_en and MEM_stage.ctrl.dmem_en) = '1' then - MEM_stage.ex_result <= MEM_stage.data; - end if; - else - MEM_stage.ex_result <= EX_stage.reg_b; - end if; - if EX_stage.ctrl.cop_instr_en = '1' then - if EX_stage.ctrl.cop_read = '1' then - MEM_stage.ex_result <= cop_din; - end if; - elsif EX_stage.ctrl.dmem_en = '0' then - MEM_stage.ex_result <= EX_stage.result; - end if; - if sdu.MEM_nop = '1' then - MEM_stage.op <= NOP; - MEM_stage.wreg_we <= '0'; - MEM_stage.ctrl <= ctrl_lines_default; - else - MEM_stage.pcn <= EX_stage.pcn; - MEM_stage.epc <= EX_stage.epc; - end if; - end if; - end if; - end process; - -proc_stage_MEM_mux: - process(MEM_stage, dmem_din) - variable temp1 : word_t; - variable temp2 : word_t; - variable data : word_t; - variable be : unsigned(3 downto 0); - begin - data := MEM_stage.ex_result; - if MEM_stage.ctrl.reg_link = '1' then - data := MEM_stage.epc + 8; - elsif MEM_stage.ctrl.dmem_en = '1' then - temp1 := load_shift(dmem_din, MEM_stage.pa_off, MEM_stage.ctrl.shift_offset, MEM_stage.ctrl.shift_byp); - temp2 := load_sign_ext(temp1, MEM_stage.ctrl.sign_ext_byp, MEM_stage.ctrl.load_signed, MEM_stage.ctrl.word2_en, MEM_stage.ctrl.word4_en); - be := load_be(MEM_stage.pa_off, MEM_stage.ctrl.align_left, MEM_stage.ctrl.byte_en_byp); - if be(0) = '1' then - data(7 downto 0) := temp2(7 downto 0); - end if; - if be(1) = '1' then - data(15 downto 8) := temp2(15 downto 8); - end if; - if be(2) = '1' then - data(23 downto 16) := temp2(23 downto 16); - end if; - if be(3) = '1' then - data(31 downto 24) := temp2(31 downto 24); - end if; - end if; - MEM_stage.data <= data after 1 ns; - - end process; - -proc_stage_MEM_except: - process(MEM_stage, c0_ctrl_in) - begin - MEM_stage.events <= MEM_stage.events_in; - MEM_stage.events.Int <= c0_ctrl_in.int; - MEM_stage.events.NMI <= c0_ctrl_in.NMI; - end process; - - MEM_stage.exc <= event_is_active(MEM_stage.events); - --------------------------------------------------------------------------- --- WB stage --------------------------------------------------------------------------- -proc_stage_WB_p: - process(clk_1) - begin - if rising_edge(clk_1) then - if stage_rst(3) = '1' then - WB_stage.op <= NOP; - WB_stage.wreg_we <= '1'; - WB_stage.reg_wptr <= (others => '0'); - WB_stage.data <= (others => '0'); - WB_stage.events <= events_clr; - elsif sdu.WB_stall = '0' then - WB_stage.op <= MEM_stage.op; - WB_stage.wreg_we <= MEM_stage.wreg_we; - WB_stage.reg_wptr <= MEM_stage.reg_wptr; - WB_stage.data <= MEM_stage.data; - WB_stage.exc <= '0'; - if sdu.stall_all = '0' then - WB_stage.exc <= MEM_stage.exc; - if MEM_stage.exc = '1' then - WB_stage.events <= MEM_stage.events; - end if; - end if; - WB_stage.nop <= sdu.WB_nop; - if sdu.WB_nop = '1' then - WB_stage.op <= NOP; - WB_stage.wreg_we <= '0'; - else - WB_stage.bd <= MEM_stage.ctrl.branch or MEM_stage.ctrl.jump or MEM_stage.ctrl.jump_long; -- Todo: works - end if; - end if; - end if; - end process; - --------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/CPUs/MIPS/src/core/mips_reg.vhd b/lib/CPUs/MIPS/src/core/mips_reg.vhd deleted file mode 100644 index e7b72da..0000000 --- a/lib/CPUs/MIPS/src/core/mips_reg.vhd +++ /dev/null @@ -1,72 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: On-Chip work registers --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.mips_types.all; - -entity reg_dual is - Generic - ( - addr_width : integer := 3; - data_width : integer := 8 - ); - Port ( - clk_w : in STD_LOGIC; - we : in STD_LOGIC; - en : in STD_LOGIC; - wptr : in unsigned (addr_width-1 downto 0); - din : in unsigned (data_width-1 downto 0); - rptr_a : in unsigned (addr_width-1 downto 0); - rptr_b : in unsigned (addr_width-1 downto 0); - dout_a : out unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -end reg_dual; - -architecture Behavioral of reg_dual is - - constant depth : integer := 2**addr_width; - type mem_t is array (0 to depth-1) of unsigned (data_width-1 downto 0); - - signal reg_mem : mem_t; - -begin - -reg_in: - process(clk_w) - begin - if rising_edge(clk_w) then - if we = '1' and en = '1' then - reg_mem(to_integer(wptr)) <= din; - end if; - end if; - end process; - - dout_a <= reg_mem(to_integer(rptr_a)) after 2 ns; - dout_b <= reg_mem(to_integer(rptr_b)) after 2 ns; - -end Behavioral; - diff --git a/lib/CPUs/MIPS/src/core/mips_shifter.vhd b/lib/CPUs/MIPS/src/core/mips_shifter.vhd deleted file mode 100644 index 7f047ec..0000000 --- a/lib/CPUs/MIPS/src/core/mips_shifter.vhd +++ /dev/null @@ -1,117 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: The shifter unit --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.mips_types.all; - -entity shifter is - Generic - ( - data_width : integer := 8 - ); - Port - ( - shift_ctrl : in shift_ctrl_t; - din : in unsigned (data_width-1 downto 0); - dout : out unsigned (data_width-1 downto 0) - ); -end shifter; - -architecture Behavioral of shifter is - - subtype word_t is unsigned(data_width-1 downto 0); - type word_array_t is array (0 to 5) of word_t; - - signal rot_data : word_array_t; - signal sa_rnd : unsigned (4 downto 0); - signal fill : std_logic; - - type fill_mask_rom_t is array (0 to 2*data_width-1) of unsigned(data_width-1 downto 0); --------------------------------------------------------------------------- -function gen_fill_mask_rom(data_width : natural) return fill_mask_rom_t is - variable result : fill_mask_rom_t; - begin - result(0) := (data_width-1 downto 0 => '0'); - for i in 1 to data_width-1 loop - result(i) := (data_width-1-i downto 0 => '0') & (i-1 downto 0 => '1'); - end loop; - result(data_width) := (data_width-1 downto 0 => '0'); - for i in 1 to data_width-1 loop - result(data_width+i) := (i-1 downto 0 => '1') & (data_width-1-i downto 0 => '0'); - end loop; - return result; - -end gen_fill_mask_rom; - -function rot_stage(x : unsigned; en : std_logic; stage_num : natural) return unsigned is - variable result : unsigned(x'range); - constant sa : natural := 2**stage_num; - begin - if en = '1' then - result := x(sa-1 downto 0) & x(x'left downto sa); - else - result := x; - end if; - return result; - -end rot_stage; - - constant fill_mask_rom : fill_mask_rom_t := gen_fill_mask_rom(data_width); - signal fill_mask : unsigned(data_width-1 downto 0); - signal fill_mask_addr : unsigned(5 downto 0); - signal dout_filled : unsigned (data_width-1 downto 0); - --------------------------------------------------------------------------- -begin - - rot_data(0) <= din; - -gen_rotate_right: - for stage in 0 to 4 generate - begin - rot_data(stage+1) <= rot_stage(rot_data(stage), sa_rnd(stage), stage); - end generate; - - sa_rnd <= shift_ctrl.shamt_rnd; - fill <= shift_ctrl.shift_arith and din(data_width-1); - fill_mask_addr <= shift_ctrl.shift_right & shift_ctrl.shamt_nrm; - fill_mask <= fill_mask_rom(to_integer(fill_mask_addr)); - -proc_fill_neu: - process(fill_mask, fill, rot_data(5)) - begin - if fill = '1' then - dout_filled <= rot_data(5) or fill_mask; - else - dout_filled <= rot_data(5) and not fill_mask; - end if; - end process; - - dout <= dout_filled after 5 ns; - --------------------------------------------------------------------------- -end Behavioral; - diff --git a/lib/CPUs/MIPS/src/core/mips_top.vhd b/lib/CPUs/MIPS/src/core/mips_top.vhd deleted file mode 100644 index 5c90a86..0000000 --- a/lib/CPUs/MIPS/src/core/mips_top.vhd +++ /dev/null @@ -1,308 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: JIPS top file --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -library work; -use work.mips_types.all; - -entity mips_top is - Generic - ( - icache_size : natural := 8192; -- words - icache_line : natural := 8; -- words - dcache_size : natural := 4096; -- words - dcache_line : natural := 8 -- words - ); - Port - ( - debug : out unsigned(1 downto 0); - eb : in STD_LOGIC; - nmi : in STD_LOGIC; - cpu_clk : in STD_LOGIC; - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - ADDR_O : out unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - WE_O : out STD_LOGIC; - SEL_O : out unsigned(3 downto 0); - CYC_O : out STD_LOGIC; - STB_O : out STD_LOGIC; - MRDY_O : out STD_LOGIC; - INT : in unsigned (5 downto 0) - ); - -end mips_top; - -architecture rtl of mips_top is - --------------------------------------------------------------------------- --- Pipeline --------------------------------------------------------------------------- - COMPONENT pipeline is - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - imem_err : in STD_LOGIC; - imem_rdy : in STD_LOGIC; - imem_en : out STD_LOGIC; - imem_addr : out word_t; - imem_data : in word_t; - dmem_err : in STD_LOGIC; - dmem_rdy : in STD_LOGIC; - dmem_en : out STD_LOGIC; - dmem_we : out STD_LOGIC; - dmem_be : out unsigned(3 downto 0); - dmem_addr : out word_t; - dmem_din : in word_t; - dmem_dout : out word_t; - cop_ir : out word_t; - cop_ir_en : out STD_LOGIC; - cop_din : in word_t; - cop_dout : out word_t; - c0_ctrl_out : out cop0_ctrl_in_t; - c0_ctrl_in : in cop0_ctrl_out_t - ); - END COMPONENT; - signal imem_err : std_logic; - signal imem_rdy : std_logic; - signal imem_en : std_logic; - signal imem_addr : word_t; - signal imem_din : word_t; - signal dmem_err : std_logic; - signal dmem_rdy : std_logic; - signal dmem_en : std_logic; - signal dmem_we : std_logic; - signal dmem_addr : word_t; - signal dmem_dout : word_t; - signal dmem_din : word_t; - signal dmem_be : unsigned(3 downto 0); - - signal biu_rst : STD_LOGIC; - signal cpu_rst : STD_LOGIC; - signal cpu_run : STD_LOGIC; - - signal pipe_cop_ir : word_t; - signal pipe_cop_ir_en : STD_LOGIC; - signal pipe_cop_din : word_t; - signal pipe_cop_dout : word_t; - signal pipe_c0_ctrl_out : cop0_ctrl_in_t; - signal pipe_c0_ctrl_in : cop0_ctrl_out_t; - --------------------------------------------------------------------------- --- Coprocessor --------------------------------------------------------------------------- - COMPONENT cop is - GENERIC - ( - icache_size : natural; - icache_line : natural; - dcache_size : natural; - dcache_line : natural - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - nmi : in STD_LOGIC; - eb : in STD_LOGIC; - int : in unsigned (5 downto 0); - ir_en : in STD_LOGIC; - ir : in word_t; - ctrl_in : in cop0_ctrl_in_t; - ctrl_out : out cop0_ctrl_out_t; - din : in word_t; - dout : out word_t - ); - END COMPONENT; - --------------------------------------------------------------------------- --- Bus Interface Unit --------------------------------------------------------------------------- - COMPONENT biu - GENERIC - ( - icache_size : natural; - icache_line : natural; - dcache_size : natural; - dcache_line : natural - ); - PORT - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - ADDR_O : out unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - WE_O : out STD_LOGIC; - SEL_O : out unsigned(3 downto 0); - CYC_O : out STD_LOGIC; - STB_O : out STD_LOGIC; - MRDY_O : out STD_LOGIC; - cop0_ctrl_in : in cop0_ctrl_out_t; - cpu_clk : in STD_LOGIC; - cpu_imem_err : out STD_LOGIC; - cpu_imem_rdy : out STD_LOGIC; - cpu_imem_en : in STD_LOGIC; - cpu_imem_addr : in word_t; - cpu_imem_din : out word_t; - cpu_dmem_err : out STD_LOGIC; - cpu_dmem_rdy : out STD_LOGIC; - cpu_dmem_en : in STD_LOGIC; - cpu_dmem_we : in STD_LOGIC; - cpu_dmem_be : in unsigned(3 downto 0); - cpu_dmem_dout : in word_t; - cpu_dmem_din : out word_t; - cpu_dmem_addr : in word_t - ); - END COMPONENT; - -begin - -------------------------------------------------------------------- - debug(0) <= imem_err; - debug(1) <= dmem_err; - - process(CLK_I) - variable reset_delay : unsigned (31 downto 0); - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - reset_delay := (others => '0'); - biu_rst <= '1'; - cpu_rst <= '1'; - cpu_run <= '0'; - else - reset_delay := reset_delay(reset_delay'left-1 downto 0) & '1'; - if reset_delay(20) = '1' then - biu_rst <= '0'; - end if; - if reset_delay(31) = '1' then - cpu_rst <= '0'; - end if; - if reset_delay(16) = '1' then - cpu_run <= '1'; - end if; - end if; - end if; - end process; - -inst_pipeline: pipeline - PORT MAP - ( - rst => cpu_rst, - clk => cpu_clk, - ce => cpu_run, - imem_err => imem_err, - imem_rdy => imem_rdy, - imem_en => imem_en, - imem_addr => imem_addr, - imem_data => imem_din, - dmem_err => dmem_err, - dmem_rdy => dmem_rdy, - dmem_en => dmem_en, - dmem_we => dmem_we, - dmem_be => dmem_be, - dmem_addr => dmem_addr, - dmem_din => dmem_din, - dmem_dout => dmem_dout, - cop_ir => pipe_cop_ir, - cop_ir_en => pipe_cop_ir_en, - cop_din => pipe_cop_din, - cop_dout => pipe_cop_dout, - c0_ctrl_out => pipe_c0_ctrl_out, - c0_ctrl_in => pipe_c0_ctrl_in - ); - -inst_cop: cop - GENERIC MAP - ( - icache_size => icache_size, -- words - icache_line => icache_line, -- words - dcache_size => dcache_size, -- words - dcache_line => dcache_line -- words - ) - PORT MAP - ( - rst => cpu_rst, - clk => cpu_clk, - nmi => nmi, - eb => eb, - int => INT, - ir_en => pipe_cop_ir_en, - ir => pipe_cop_ir, - ctrl_in => pipe_c0_ctrl_out, - ctrl_out => pipe_c0_ctrl_in, - dout => pipe_cop_din, - din => pipe_cop_dout - ); - -inst_biu: biu - GENERIC MAP - ( - icache_size => icache_size, -- words - icache_line => icache_line, -- words - dcache_size => dcache_size, -- words - dcache_line => dcache_line -- words - ) - PORT MAP - ( - RST_I => biu_rst, - CLK_I => CLK_I, - ACK_I => ACK_I, - SRDY_I => SRDY_I, - ADDR_O => ADDR_O, - DAT_I => DAT_I, - DAT_O => DAT_O, - WE_O => WE_O, - SEL_O => SEL_O, - CYC_O => CYC_O, - STB_O => STB_O, - MRDY_O => MRDY_O, - cop0_ctrl_in => pipe_c0_ctrl_in, - cpu_clk => cpu_clk, - cpu_imem_err => imem_err, - cpu_imem_rdy => imem_rdy, - cpu_imem_en => imem_en, - cpu_imem_addr => imem_addr, - cpu_imem_din => imem_din, - cpu_dmem_err => dmem_err, - cpu_dmem_rdy => dmem_rdy, - cpu_dmem_en => dmem_en, - cpu_dmem_we => dmem_we, - cpu_dmem_be => dmem_be, - cpu_dmem_addr => dmem_addr, - cpu_dmem_din => dmem_din, - cpu_dmem_dout => dmem_dout - ); - -end rtl; diff --git a/lib/CPUs/MIPS/src/core/mips_types.vhd b/lib/CPUs/MIPS/src/core/mips_types.vhd deleted file mode 100644 index 6954641..0000000 --- a/lib/CPUs/MIPS/src/core/mips_types.vhd +++ /dev/null @@ -1,670 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: Types, constants and functions for JIPS --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; -use IEEE.MATH_REAL.ALL; - --------------------------------------------------------------------------- -package mips_types is - - -- Revision of the CPU - constant REVISION : integer := 13; - constant WORD_WIDTH : integer := 32; - - --Types - subtype instr_name_t is string(1 to 12); - type instr_name_array_t is array (0 to 63) of instr_name_t; - subtype opcode_t is unsigned (5 downto 0); - subtype word_t is unsigned (WORD_WIDTH-1 downto 0); - subtype reg_ptr_t is unsigned (4 downto 0); - subtype shamt_t is unsigned(4 downto 0); - subtype sa_t is natural range 0 to 63; - subtype func_t is unsigned(5 downto 0); - - type op_t is - ( - reserved, - nop, - op_sll, - op_srl, - op_sra, - op_sllv, - op_srlv, - op_srav, - op_jr, - op_jalr, - op_syscall, - op_break, - op_mfhi, - op_mthi, - op_mflo, - op_mtlo, - op_mult, - op_multu, - op_div, - op_divu, - op_add, - op_addu, - op_sub, - op_subu, - op_and, - op_or, - op_xor, - op_nor, - op_slt, - op_sltu, - op_bltz, - op_bgez, - op_bltzal, - op_bgezal, - op_j, - op_jal, - op_beq, - op_bne, - op_blez, - op_bgtz, - op_addi, - op_addiu, - op_slti, - op_sltiu, - op_andi, - op_ori, - op_xori, - op_lui, - op_lb, - op_lh, - op_lwl, - op_lw, - op_lbu, - op_lhu, - op_lwr, - op_sb, - op_sh, - op_swl, - op_sw, - op_swr, - op_cop0, - op_cop1, - op_cop2, - op_cop3, - op_mfc0, - op_cfc0, - op_mtc0, - op_ctc0, - op_bcf0, - op_bct0, - op_mfc1, - op_cfc1, - op_mtc1, - op_ctc1, - op_bcf1, - op_bct1, - op_mfc2, - op_cfc2, - op_mtc2, - op_ctc2, - op_bcf2, - op_bct2, - op_mfc3, - op_cfc3, - op_mtc3, - op_ctc3, - op_bcf3, - op_bct3, - op_lwc0, - op_lwc1, - op_lwc2, - op_lwc3, - op_swc0, - op_swc1, - op_swc2, - op_swc3 - ); - - attribute ENUM_ENCODING : string; - - type imm_src_t is (src_imm32, src_imm16, src_imm16_high); - type sa_src_t is (sa_src_reg, sa_src_imm); - type alu_src1_t is (alu_src_reg); - type alu_src2_t is (alu_src_reg, alu_src_imm); - type bc_src_t is (bc_eq_ne, bc_lez_gtz, bc_ltz_gez); - type shift_opsel_t is (shift_sll, shift_srl, shift_sra); - type wptr_src_t is (wptr_src_imm, wptr_src_const); - --- attribute ENUM_ENCODING of itype_t: type is "ONE-HOT"; - - type pc_t is record - curr : word_t; - last : word_t; - nxt : word_t; - pc_branch : word_t; - branch_take : std_logic; - end record; - - type alu_outsel_t is - ( - alu_adder, - alu_shift2, - alu_and, - alu_or, - alu_xor, - alu_nor, - alu_ltu, - alu_lts - ); - - type sdu_t is record - imem_dep : STD_LOGIC; - dmem_dep : STD_LOGIC; - mul_dep : STD_LOGIC; - ID_nop : STD_LOGIC; - EX_nop : STD_LOGIC; - MEM_nop : STD_LOGIC; - WB_nop : STD_LOGIC; - ID_stall : STD_LOGIC; - EX_stall : STD_LOGIC; - MEM_stall : STD_LOGIC; - WB_stall : STD_LOGIC; - stall_all : STD_LOGIC; - end record; - - type hdu_t is record - alu_fwd_a_ex : boolean; - alu_fwd_a_mem : boolean; - alu_fwd_a_wb : boolean; - alu_fwd_b_ex : boolean; - alu_fwd_b_mem : boolean; - alu_fwd_b_wb : boolean; - end record; - - type alu_flags_t is record - c : STD_LOGIC; - uvf : STD_LOGIC; - ovf : STD_LOGIC; - ltu : STD_LOGIC; - lts : STD_LOGIC; - end record; - - type bcu_flags_t is record - eq : STD_LOGIC; - ltz : STD_LOGIC; - end record; - - type event_t is record - NMI : STD_LOGIC; - Int : STD_LOGIC; - data_load_err : STD_LOGIC; - data_store_err : STD_LOGIC; - inst_load_err : STD_LOGIC; - inst_priv_addr : STD_LOGIC; - alu_ovf : STD_LOGIC; - alu_uvf : STD_LOGIC; - syscall : STD_LOGIC; - break : STD_LOGIC; - illegal : STD_LOGIC; - end record; - - type exc_flags_t is record - Int : STD_LOGIC; - DAdEL : STD_LOGIC; - DAdES : STD_LOGIC; - IAdEL : STD_LOGIC; - IAdEK : STD_LOGIC; - Ov : STD_LOGIC; - Sys : STD_LOGIC; - Bp : STD_LOGIC; - RI : STD_LOGIC; - IBE : STD_LOGIC; - DBE : STD_LOGIC; - end record; - - type except_t is record - act : STD_LOGIC; - epc : word_t; - cause : word_t; - end record; - - type cache_ctrl_t is record - inv_addr : word_t; - inv_at : STD_LOGIC; - inv_all : STD_LOGIC; - end record; - - type cop0_ctrl_in_t is record - sdu : sdu_t; - events : event_t; - bd_wb : STD_LOGIC; - epc_mem : word_t; - epc_wb : word_t; - imem_addr : word_t; - dmem_addr : word_t; - exc_req : STD_LOGIC; - exc_ack : STD_LOGIC; - end record; - - type cop0_ctrl_out_t is record - EB : STD_LOGIC; - exc_inject : STD_LOGIC; - exc_commit : STD_LOGIC; - exc_pending : STD_LOGIC; - exc_exit : STD_LOGIC; - user_mode : STD_LOGIC; - NMI : STD_LOGIC; - int : STD_LOGIC; - exc_vec : word_t; - icache : cache_ctrl_t; - dcache : cache_ctrl_t; - end record; - - type alu_ctrl_t is record - outsel : alu_outsel_t; - add : STD_LOGIC; - shift_right : STD_LOGIC; - shift_arith : STD_LOGIC; - op1_src : alu_src1_t; - op2_src : alu_src2_t; - end record; - - type shift_ctrl_t is record - shamt_nrm : shamt_t; - shamt_rnd : shamt_t; - shift_right : STD_LOGIC; - shift_arith : STD_LOGIC; - end record; - - type ctrl_lines_t is record - branch : STD_LOGIC; - jump_long : STD_LOGIC; - jump : STD_LOGIC; - bc_not : STD_LOGIC; - bc_src : bc_src_t; - imm_src : imm_src_t; - alu : alu_ctrl_t; - reg_write : STD_LOGIC; - reg_link : STD_LOGIC; - dmem_we : STD_LOGIC; - dmem_en : STD_LOGIC; - shamt2_srcsel : sa_src_t; - wptr_srcsel : wptr_src_t; - cop_instr_en : STD_LOGIC; - cop_read : STD_LOGIC; - shift_offset : unsigned(1 downto 0); - shift_byp : STD_LOGIC; - byte_en_byp : STD_LOGIC; - sign_ext_byp : STD_LOGIC; - word4_en : STD_LOGIC; - word2_en : STD_LOGIC; - align_left : STD_LOGIC; - load_signed : STD_LOGIC; - mul_access : STD_LOGIC; - mul_hilo_we : STD_LOGIC; - mul_mul_divn : STD_LOGIC; - mul_start : STD_LOGIC; - mul_s_un : STD_LOGIC; - mul_hilo_sel : STD_LOGIC; - exc_break : STD_LOGIC; - exc_syscall : STD_LOGIC; - exc_illegal : STD_LOGIC; - except_en : STD_LOGIC; - alu_exc_en : STD_LOGIC; - end record; - - type ID_t is record - nop : STD_LOGIC; - exc : std_logic; - IR : word_t; - op : op_t; - pcn : word_t; - epc : word_t; - jimm32 : word_t; - bimm18 : word_t; - imm : word_t; - shamt : shamt_t; - ctrl : ctrl_lines_t; - reg_write : STD_LOGIC; - reg_a_rptr : reg_ptr_t; - reg_b_rptr : reg_ptr_t; - reg_a : word_t; - reg_b : word_t; - events : event_t; - end record; - - type EX_t is record - nop : STD_LOGIC; - exc : std_logic; - IR : word_t; - op : op_t; - pcn : word_t; - epc : word_t; - reg_a : word_t; - reg_b : word_t; - ctrl : ctrl_lines_t; - shift_ctrl : shift_ctrl_t; - alu_op1 : word_t; - alu_op2 : word_t; - alu_op2_s : word_t; - alu_flags : alu_flags_t; - result : word_t; - reg_write : STD_LOGIC; - wreg_we : STD_LOGIC; - reg_wptr : reg_ptr_t; - reg_a_rptr : reg_ptr_t; - reg_b_rptr : reg_ptr_t; - va : word_t; - pa_off : unsigned(1 downto 0); - events_in : event_t; - events : event_t; - end record; - - type MEM_t is record - nop : STD_LOGIC; - exc : std_logic; - op : op_t; - pcn : word_t; - epc : word_t; - ctrl : ctrl_lines_t; - ex_result : word_t; - reg_wptr : reg_ptr_t; - wreg_we : STD_LOGIC; - data : word_t; - va : word_t; - pa_off : unsigned(1 downto 0); - events_in : event_t; - events : event_t; - end record; - - type WB_t is record - nop : STD_LOGIC; - exc : std_logic; - events : event_t; - op : op_t; - reg_wptr : reg_ptr_t; - wreg_we : STD_LOGIC; - data : word_t; - bd : STD_LOGIC; - end record; - - - type rom_special_t is array (0 to 2**func_t'length-1) of ctrl_lines_t; - type rom_regimm_t is array (0 to 2**reg_ptr_t'length-1) of ctrl_lines_t; - type rom_opcode_t is array (0 to 2**opcode_t'length-1) of ctrl_lines_t; - - function store_shift(x : word_t; va, shift_off : unsigned(1 downto 0); bypass : std_logic) return word_t; - function store_be(va : unsigned(1 downto 0); be_src, word2_en, word4_en, align_left, bypass : std_logic) return unsigned; - function load_shift(x : word_t; va, shift_off : unsigned(1 downto 0); bypass : std_logic) return word_t; - function load_be(va : unsigned(1 downto 0); align_left, bypass : std_logic) return unsigned; - function load_sign_ext(x : word_t; bypass, signed, word2_en, word4_en : std_logic) return word_t; - function events_clr return event_t; - function event_is_active(e : event_t) return std_logic; - function "or" (a, b : event_t) return event_t; - - function lg2(x : natural) return natural; - function po2(x : natural) return natural; - -end mips_types; - --------------------------------------------------------------------------- -package body mips_types is - - function store_shift(x : word_t; va, shift_off : unsigned(1 downto 0); bypass : std_logic) return word_t is - variable stage1 : word_t; - variable result : word_t; - variable sa : unsigned(1 downto 0); - begin - - if bypass = '1' then - sa := "00"; - else - sa := va + shift_off; - end if; - - stage1 := x; - if sa(0) = '1' then - stage1 := x(23 downto 0) & x(31 downto 24); - end if; - result := stage1; - if sa(1) = '1' then - result := stage1(15 downto 0) & stage1(31 downto 16); - end if; - - return result; - end store_shift; - --------------------------------------------------------------------------- - function store_be(va : unsigned(1 downto 0); be_src, word2_en, word4_en, align_left, bypass : std_logic) return unsigned is - variable result : unsigned(3 downto 0); - begin - result := (3 downto 0 => be_src); - if bypass = '0' then - if word2_en = '1' then - case va is - when "00" => - result := "00" & be_src & be_src; - when "10" => - result := be_src & be_src & "00"; - when others => null; - end case; - elsif word4_en = '1' then - case va is - when "00" => - result := "000" & be_src; - when "01" => - result := "00" & be_src & '0'; - when "10" => - result := '0' & be_src & "00"; - when "11" => - result := be_src & "000"; - when others => null; - end case; - elsif align_left = '1' then - case va is - when "00" => - result := be_src & be_src & be_src & be_src; - when "01" => - result := be_src & be_src & be_src & '0'; - when "10" => - result := be_src & be_src & "00"; - when "11" => - result := be_src & "000"; - when others => null; - end case; - else - case va is - when "00" => - result := "000" & be_src; - when "01" => - result := "00" & be_src & be_src; - when "10" => - result := '0' & be_src & be_src & be_src; - when "11" => - result := be_src & be_src & be_src & be_src; - when others => null; - end case; - end if; - end if; - - return result; - - end store_be; - --------------------------------------------------------------------------- - function load_shift(x : word_t; va, shift_off : unsigned(1 downto 0); bypass : std_logic) return word_t is - variable stage1 : word_t; - variable result : word_t; - variable sa : unsigned(1 downto 0); - - begin - if bypass = '1' then - sa := "00"; - else - sa := va + shift_off; - end if; - - stage1 := x; - if sa(0) = '1' then - stage1 := x(7 downto 0) & x(31 downto 8); - end if; - result := stage1; - if sa(1) = '1' then - result := stage1(15 downto 0) & stage1(31 downto 16); - end if; - - return result; - end load_shift; - --------------------------------------------------------------------------- - function load_be(va : unsigned(1 downto 0); align_left, bypass : std_logic) return unsigned is - variable result : unsigned(3 downto 0); - begin - result := (3 downto 0 => '1'); - if bypass = '0' then - if align_left = '1' then - case va is - when "00" => - result := "1000"; - when "01" => - result := "1100"; - when "10" => - result := "1110"; - when "11" => - result := "1111"; - when others => null; - end case; - else - case va is - when "00" => - result := "1111"; - when "01" => - result := "0111"; - when "10" => - result := "0011"; - when "11" => - result := "0001"; - when others => null; - end case; - end if; - end if; - - return result; - - end load_be; - --------------------------------------------------------------------------- - function load_sign_ext(x : word_t; bypass, signed, word2_en, word4_en : std_logic) return word_t is - variable result : word_t; - variable sign : std_logic; - - begin - if bypass = '1' then - result := x; - elsif word2_en = '1' then - sign := signed and x(15); - result := (31 downto 16 => sign) & x(15 downto 0); - else - sign := signed and x(7); - result := (31 downto 8 => sign) & x(7 downto 0); - end if; - - return result; - end load_sign_ext; - --------------------------------------------------------------------------- - function events_clr return event_t is - variable result : event_t; - begin - result.NMI := '0'; - result.Int := '0'; - result.data_load_err := '0'; - result.data_store_err := '0'; - result.inst_load_err := '0'; - result.inst_priv_addr := '0'; - result.alu_ovf := '0'; - result.alu_uvf := '0'; - result.syscall := '0'; - result.break := '0'; - result.illegal := '0'; - - return result; - - end events_clr; - --------------------------------------------------------------------------- - function event_is_active(e : event_t) return std_logic is - variable result : std_logic; - begin - result := '0'; - - result := result or e.NMI; - result := result or e.Int; - result := result or e.data_load_err; - result := result or e.data_store_err; - result := result or e.inst_load_err; - result := result or e.inst_priv_addr; - result := result or e.alu_ovf; - result := result or e.alu_uvf; - result := result or e.syscall; - result := result or e.break; - result := result or e.illegal; - - return result; - - end event_is_active; - --------------------------------------------------------------------------- - function "or" (a, b : event_t) return event_t is - variable result : event_t; - begin - result.NMI := a.NMI or b.NMI; - result.Int := a.Int or b.Int; - result.data_load_err := a.data_load_err or b.data_load_err; - result.data_store_err := a.data_store_err or b.data_store_err; - result.inst_load_err := a.inst_load_err or b.inst_load_err; - result.inst_priv_addr := a.inst_priv_addr or b.inst_priv_addr; - result.alu_ovf := a.alu_ovf or b.alu_ovf; - result.alu_uvf := a.alu_uvf or b.alu_uvf; - result.syscall := a.syscall or b.syscall; - result.break := a.break or b.break; - result.illegal := a.illegal or b.illegal; - - return result; - - end "or"; - --------------------------------------------------------------------------- - function lg2(x : natural) return natural is - begin - return natural(ceil(log2(real(x)))); - end lg2; - --------------------------------------------------------------------------- - function po2(x : natural) return natural is - begin - - return 2**lg2(x); - end po2; - --------------------------------------------------------------------------- -end mips_types; - diff --git a/lib/CPUs/MIPS/src/mips_top_syn.vhd b/lib/CPUs/MIPS/src/mips_top_syn.vhd deleted file mode 100644 index c7c99e8..0000000 --- a/lib/CPUs/MIPS/src/mips_top_syn.vhd +++ /dev/null @@ -1,100 +0,0 @@ --------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: JIPS top file --- --- Copyright (C) 2008 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -library work; -use work.mips_types.all; - -entity mips_top is - Generic - ( - icache_size : natural := 8192; -- words - icache_line : natural := 8; -- words - dcache_size : natural := 4096; -- words - dcache_line : natural := 8 -- words - ); - Port - ( - debug : out unsigned(1 downto 0); - eb : in STD_LOGIC; - nmi : in STD_LOGIC; - cpu_clk : in STD_LOGIC; - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - ADDR_O : out unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - WE_O : out STD_LOGIC; - SEL_O : out unsigned(3 downto 0); - CYC_O : out STD_LOGIC; - STB_O : out STD_LOGIC; - MRDY_O : out STD_LOGIC; - INT : in unsigned (5 downto 0) - ); - -end mips_top; - -architecture rtl of mips_top is - - signal SEL_O_SLV : STD_LOGIC_VECTOR (3 downto 0); - signal DAT_O_SLV : STD_LOGIC_VECTOR (31 downto 0); - signal ADDR_O_SLV : STD_LOGIC_VECTOR (31 downto 0); - signal DEBUG_SLV : STD_LOGIC_VECTOR (1 downto 0); - -begin - - SEL_O <= unsigned(SEL_O_SLV); - DAT_O <= unsigned(DAT_O_SLV); - ADDR_O <= unsigned(ADDR_O_SLV); - DEBUG <= unsigned(DEBUG_SLV); - -inst_mips_top_syn : entity work.mips_top_syn - PORT MAP - ( - RST_I => RST_I, - eb => eb, - WE_O => WE_O, - CYC_O => CYC_O, - cpu_clk => cpu_clk, - ACK_I => ACK_I, - nmi => nmi, - STB_O => STB_O, - CLK_I => CLK_I, - MRDY_O => MRDY_O, - SRDY_I => SRDY_I, - debug => DEBUG_SLV, - DAT_O => DAT_O_SLV, - SEL_O => SEL_O_SLV, - ADDR_O => ADDR_O_SLV, - DAT_I => STD_LOGIC_VECTOR(DAT_I), - INT => STD_LOGIC_VECTOR(INT) - ); - - - -end rtl; diff --git a/lib/CPUs/MIPS/src/tb_mips_muldiv.vhd b/lib/CPUs/MIPS/src/tb_mips_muldiv.vhd deleted file mode 100644 index ba364eb..0000000 --- a/lib/CPUs/MIPS/src/tb_mips_muldiv.vhd +++ /dev/null @@ -1,332 +0,0 @@ -------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: Testbench for JCPU --- also writes 'opc.lst' for JASM-assembler --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.mips_types.all; -use work.mips_instr.all; - -ENTITY tb_mips_muldiv IS -END tb_mips_muldiv; - -ARCHITECTURE behavior OF tb_mips_muldiv IS - - COMPONENT muldiv is - Port - ( - rst : in std_logic; - clk : in std_logic; - hilo_we : in std_logic; - din_hi : in word_t; - din_lo : in word_t; - mul_divn : in std_logic; - s_un : in std_logic; - start : in std_logic; - hilo_sel : in std_logic; - busy : out std_logic; - dout : out word_t - ); - END COMPONENT; - - constant CLK_PERIOD : time := 10 ns; - signal ENABLE_FAIL_REPORT : boolean := true; - signal rst : std_logic := '1'; - signal clk : std_logic := '1'; - signal busy : std_logic; - signal mul_divn : std_logic := '0'; - signal s_un : std_logic := '1'; - signal hilo_we : std_logic := '0'; - signal start : std_logic := '0'; - signal din_hi : word_t := (others => '-'); - signal din_lo : word_t := (others => '-'); - signal dout : word_t; - signal hilo_sel : std_logic := '0'; - signal md_result : unsigned (2*word_t'length-1 downto 0) := (others => '0'); - signal ref_result : unsigned (2*word_t'length-1 downto 0); - signal ref_hi : unsigned (word_t'length-1 downto 0); - signal rtmp : unsigned (2*word_t'length-1 downto 0); - signal tmp2 : unsigned (word_t'length-1 downto 0); - signal check : std_logic; - - type word_array_t is array (natural range <>) of word_t; - - constant operands : word_array_t(0 to 63) := - ( - X"00000000", - X"00000001", - X"00000010", - X"00000100", - X"00001000", - X"00010000", - X"00100000", - X"01000000", - X"10000000", - X"0000000F", - X"000000FF", - X"00000FFF", - X"0000FFFF", - X"000FFFFF", - X"00FFFFFF", - X"0FFFFFFF", - X"12345678", - X"23456789", - X"7FFFFFFF", - X"80000000", - X"A541B3B9", - X"80000001", - X"80000010", - X"80000100", - X"80001000", - X"80010000", - X"80100000", - X"81000000", - X"87654321", - X"98765432", - X"FFFFFFFF", - X"FFFFFFFE", - X"FFFFFFFD", - X"FFFFFFFB", - X"FFFFFFF7", - X"FFFFFFEF", - X"FFFFFFDF", - X"FFFFFFBF", - X"FFFFFF7F", - X"FFFFFEFF", - X"FFFFFDFF", - X"FFFFFBFF", - X"FFFFF7FF", - X"FFFFEFFF", - X"FFFFDFFF", - X"FFFFBFFF", - X"FFFF7FFF", - X"FFFEFFFF", - X"FFFDFFFF", - X"FFFBFFFF", - X"FFF7FFFF", - X"FFEFFFFF", - X"FFDFFFFF", - X"FFBFFFFF", - X"FF7FFFFF", - X"FEFFFFFF", - X"FDFFFFFF", - X"FBFFFFFF", - X"F7FFFFFF", - X"EFFFFFFF", - X"DFFFFFFF", - X"BFFFFFFF", - X"CFFFFFFF", - X"7FFFFFFF" - ); - -BEGIN - -uut: muldiv - PORT MAP( - rst => rst, - clk => clk, - hilo_we => hilo_we, - din_hi => din_hi, - din_lo => din_lo, - mul_divn => mul_divn, - s_un => s_un, - start => start, - hilo_sel => hilo_sel, - busy => busy, - dout => dout - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - -REF_GEN: process - begin - if mul_divn = '0' then - wait until rising_edge(clk) and check = '1'; - if s_un = '1' then - rtmp <= unsigned(signed(md_result(31 downto 0)) * signed(din_lo)); - wait until rising_edge(clk); - tmp2 <= unsigned(signed(rtmp(31 downto 0)) + signed(md_result(63 downto 32))); - wait until rising_edge(clk); - ref_hi <= tmp2(31 downto 0); - else - rtmp <= md_result(31 downto 0) * din_lo; - wait until rising_edge(clk); - tmp2 <= rtmp(31 downto 0) + md_result(63 downto 32); - wait until rising_edge(clk); - ref_hi <= tmp2(31 downto 0); - end if; - wait until rising_edge(clk); - - if din_lo /= X"00000000" then - if ENABLE_FAIL_REPORT then - assert din_hi = ref_hi report "Error on divison" severity failure; - end if; - end if; - else - wait until rising_edge(clk) and check = '1'; - if s_un = '1' then - ref_result <= unsigned(signed(din_hi) * signed(din_lo)); - else - ref_result <= unsigned(din_hi) * unsigned(din_lo); - end if; - wait until rising_edge(clk); - wait until rising_edge(clk); - wait until rising_edge(clk); - if ENABLE_FAIL_REPORT then - assert ref_result = md_result report "Error on multiplication" severity failure; - end if; - end if; - - end process; - -STIMULUS: process - - begin - - wait for 3*CLK_PERIOD; - wait until rising_edge(clk); - rst <= '0'; - wait for 2*CLK_PERIOD; - - mul_divn <= '0'; - s_un <= '0'; - for i in 0 to operands'length-1 loop - for j in 0 to operands'length-1 loop - check <= '0'; - wait until rising_edge(clk) and busy = '0'; - din_hi <= operands(i); - din_lo <= operands(j); - start <= '1'; - wait until rising_edge(clk); - start <= '0'; - hilo_sel <= '0'; - - -- Read result - wait until rising_edge(clk) and busy = '0'; - wait until rising_edge(clk); - md_result(31 downto 0) <= dout; - wait until rising_edge(clk); - hilo_sel <= '1'; - wait until rising_edge(clk); - md_result(63 downto 32) <= dout; - check <= '1'; - wait until rising_edge(clk); - check <= '0'; - wait for 8*CLK_PERIOD; - end loop; - end loop; - - s_un <= '1'; - for i in 0 to operands'length-1 loop - for j in 0 to operands'length-1 loop - check <= '0'; - wait until rising_edge(clk) and busy = '0'; - din_hi <= operands(i); - din_lo <= operands(j); - start <= '1'; - wait until rising_edge(clk); - start <= '0'; - hilo_sel <= '0'; - - -- Read result - wait until rising_edge(clk) and busy = '0'; - wait until rising_edge(clk); - md_result(31 downto 0) <= dout; - wait until rising_edge(clk); - hilo_sel <= '1'; - wait until rising_edge(clk); - md_result(63 downto 32) <= dout; - check <= '1'; - wait until rising_edge(clk); - check <= '0'; - wait for 8*CLK_PERIOD; - end loop; - end loop; - - mul_divn <= '1'; - s_un <= '0'; - for i in 0 to operands'length-1 loop - for j in 0 to operands'length-1 loop - check <= '0'; - wait until rising_edge(clk) and busy = '0'; - din_hi <= operands(i); - din_lo <= operands(j); - start <= '1'; - wait until rising_edge(clk); - start <= '0'; - hilo_sel <= '0'; - - -- Read result - wait until rising_edge(clk) and busy = '0'; - wait until rising_edge(clk); - md_result(31 downto 0) <= dout; - wait until rising_edge(clk); - hilo_sel <= '1'; - wait until rising_edge(clk); - md_result(63 downto 32) <= dout; - check <= '1'; - wait until rising_edge(clk); - check <= '0'; - wait for 8*CLK_PERIOD; - end loop; - end loop; - - s_un <= '1'; - for i in 0 to operands'length-1 loop - for j in 0 to operands'length-1 loop - check <= '0'; - wait until rising_edge(clk) and busy = '0'; - din_hi <= operands(i); - din_lo <= operands(j); - start <= '1'; - wait until rising_edge(clk); - start <= '0'; - hilo_sel <= '0'; - - -- Read result - wait until rising_edge(clk) and busy = '0'; - wait until rising_edge(clk); - md_result(31 downto 0) <= dout; - wait until rising_edge(clk); - hilo_sel <= '1'; - wait until rising_edge(clk); - md_result(63 downto 32) <= dout; - check <= '1'; - wait until rising_edge(clk); - check <= '0'; - wait for 8*CLK_PERIOD; - end loop; - end loop; - - wait; - - end process; - -END; diff --git a/lib/CPUs/MIPS/src/tb_mips_top.vhd b/lib/CPUs/MIPS/src/tb_mips_top.vhd deleted file mode 100644 index 587254f..0000000 --- a/lib/CPUs/MIPS/src/tb_mips_top.vhd +++ /dev/null @@ -1,460 +0,0 @@ -------------------------------------------------------------------------- --- Project: JIPS, a portable 32-bit RISC CPU written in VHDL --- This file: Testbench for JCPU --- also writes 'opc.lst' for JASM-assembler --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -library work; -use work.mips_types.all; -use work.mips_instr.all; -use work.async_types.all; -use work.async_defs.all; - -ENTITY tb_mips_top IS -END tb_mips_top; - -ARCHITECTURE behavior OF tb_mips_top IS - - constant SYS_FREQ : real := 100.0; - constant CLK_PERIOD : time := 10 ns; - constant SRAM_ADDR_WIDTH : integer := 17; -- bits - constant FLASH_ADDR_WIDTH : integer := 17; -- bits - - signal debug : unsigned(1 downto 0); - - -- Master - signal nmi : STD_LOGIC := '0'; - signal rst : STD_LOGIC := '1'; - signal clk : STD_LOGIC := '0'; - signal eb : STD_LOGIC := '1'; - signal ACK_I : STD_LOGIC := '0'; - signal SRDY_I : STD_LOGIC := '0'; - signal ADDR_O : unsigned(31 downto 0); - signal DAT_I : unsigned(31 downto 0) := (others => '0'); - signal DAT_O : unsigned(31 downto 0); - signal WE_O : STD_LOGIC; - signal SEL_O : unsigned(3 downto 0); - signal CYC_O : STD_LOGIC; - signal STB_O : STD_LOGIC; - signal MRDY_O : STD_LOGIC; - signal INT : unsigned (5 downto 0) := (others => '0'); - - -- Slaves - signal CYC_I_rom : std_logic; - signal ACK_O_rom : std_logic; - signal SRDY_O_rom : std_logic; - signal DAT_O_rom : unsigned(31 downto 0); - - signal CYC_I_flash : std_logic; - signal ACK_O_flash : std_logic; - signal SRDY_O_flash : std_logic; - signal DAT_O_flash : unsigned(31 downto 0); - - signal CYC_I_sram : std_logic; - signal ACK_O_sram : std_logic; - signal SRDY_O_sram : std_logic; - signal DAT_O_sram : unsigned(31 downto 0); - - signal CYC_I_gpio : std_logic; - signal ACK_O_gpio : std_logic; - signal SRDY_O_gpio : std_logic; - signal DAT_O_gpio : unsigned(31 downto 0); - - signal CYC_I_uart : std_logic; - signal ACK_O_uart : std_logic; - signal SRDY_O_uart : std_logic; - signal DAT_O_uart : unsigned(31 downto 0); - - signal flash_cs_n : std_logic; - signal flash_we_n : std_logic; - signal flash_oe_n : std_logic; - signal flash_be_n : unsigned(3 downto 0); - signal sram_cs_n : std_logic; - signal sram_be_n : unsigned(3 downto 0); - signal sram_wr_n : std_logic; - signal sram_oe_n : std_logic; - signal sram_a : unsigned(SRAM_ADDR_WIDTH-1 downto 0); - signal sram_d : unsigned(31 downto 0); - signal flash_a : unsigned(FLASH_ADDR_WIDTH-1 downto 0); - signal flash_d : unsigned(31 downto 0); - signal flash_page_mode_en : std_logic; - - signal gpi_0 : unsigned(31 downto 0); - signal gpo_0 : unsigned(31 downto 0); - - signal int_timer : std_logic; - signal int_uart : std_logic; - signal rx : std_logic := '1'; - signal tx : std_logic; - - type mem_area_t is (mem_dead, mem_flash, mem_sram, mem_rom, mem_gpio, mem_uart); - signal mem_area : mem_area_t; - - type word_array_t is array (natural range <>) of unsigned(31 downto 0); - signal sram_data : word_array_t(0 to 2**SRAM_ADDR_WIDTH-1); - signal flash_data : word_array_t(0 to 2**FLASH_ADDR_WIDTH-1); - -BEGIN - ------------------------------------------------------------------- -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------- --- Memory mux ------------------------------------------------------------------- -mem_mux: - process(ADDR_O) - begin - mem_area <= mem_dead; - flash_page_mode_en <= '0'; - if ADDR_O(31 downto 28) = X"0" then - mem_area <= mem_flash; - flash_page_mode_en <= '1'; - elsif ADDR_O(31 downto 28) = X"A" then - if ADDR_O(27 downto 26) = "00" then - if ADDR_O(18 downto 16) = "000" then - mem_area <= mem_gpio; - elsif ADDR_O(18 downto 16) = "001" then - mem_area <= mem_uart; - end if; - elsif ADDR_O(27 downto 26) = "01" then - mem_area <= mem_flash; - end if; - elsif (ADDR_O(31 downto 28) = X"B" and ADDR_O(15) = '0') then - mem_area <= mem_rom; - elsif (ADDR_O(31 downto 28) = X"8" or ADDR_O(30) = '1') then - mem_area <= mem_sram; - end if; - end process; - -signal_mux: - process(mem_area, CYC_O) - begin - - CYC_I_uart <= '0'; - CYC_I_gpio <= '0'; - CYC_I_flash <= '0'; - CYC_I_rom <= '0'; - CYC_I_sram <= '0'; - - case mem_area is - - when mem_gpio => - CYC_I_gpio <= CYC_O; - - when mem_uart => - CYC_I_uart <= CYC_O; - - when mem_flash => - CYC_I_flash <= CYC_O; - - when mem_rom => - CYC_I_rom <= CYC_O; - - when mem_sram => - CYC_I_sram <= CYC_O; - - when others => null; - - end case; - - end process; - - SRDY_I <= SRDY_O_flash or SRDY_O_sram or SRDY_O_rom or SRDY_O_uart or SRDY_O_gpio; - ACK_I <= ACK_O_flash or ACK_O_sram or ACK_O_rom or ACK_O_uart or ACK_O_gpio; - DAT_I <= DAT_O_sram when CYC_I_sram = '1' else - DAT_O_rom when CYC_I_rom = '1' else - DAT_O_flash when CYC_I_flash = '1' else - DAT_O_uart when CYC_I_uart = '1' else - DAT_O_gpio when CYC_I_gpio = '1' else X"DEADBEEF"; - - ------------------------------------------------------------------- -uut: entity work.mips_top - GENERIC MAP - ( - icache_size => 1024, -- words - dcache_size => 1024 -- words - ) - PORT MAP - ( - debug => debug, - eb => eb, - cpu_clk => clk, - RST_I => rst, - CLK_I => clk, - ACK_I => ACK_I, - SRDY_I => SRDY_I, - ADDR_O => ADDR_O, - DAT_I => DAT_I, - DAT_O => DAT_O, - WE_O => WE_O, - SEL_O => SEL_O, - CYC_O => CYC_O, - STB_O => STB_O, - MRDY_O => MRDY_O, - INT => INT, - nmi => nmi - ); - INT(1) <= int_uart; - INT(5) <= int_timer; - -inst_rom : entity work.rom_wb - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_rom, - STB_I => STB_O, - ACK_O => ACK_O_rom, - MRDY_I => MRDY_O, - SRDY_O => SRDY_O_rom, - ADDR_I => ADDR_O, - DAT_O => DAT_O_rom - ); - -inst_gpio : entity work.gpio_wb - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_gpio, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_O_gpio, - SRDY_O => SRDY_O_gpio, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_gpio, - INT_TIM_O => int_timer, - - sys_gpi_0 => gpi_0, - sys_gpo_0 => gpo_0 - ); - -inst_flash_port : entity work.async_port_wb - GENERIC MAP - ( - f_sysclk => SYS_FREQ, - addr_width => FLASH_ADDR_WIDTH, - data_width => 32, - byte_sel_width => 4, - async_timespec => ts_flash - ) - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_flash, - STB_I => STB_O, - WE_I => WE_O, - ACK_O => ACK_O_flash, - SRDY_O => SRDY_O_flash, - MRDY_I => MRDY_O, - SEL_I => SEL_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_flash, - page_mode_en => flash_page_mode_en, - async_a => flash_a, - async_d => flash_d, - async_cs => flash_cs_n, - async_wr => flash_we_n, - async_rd => flash_oe_n, - async_be => flash_be_n, - async_rst => open - ); - -inst_sram_port : entity work.async_port_wb - GENERIC MAP - ( - f_sysclk => SYS_FREQ, - addr_width => SRAM_ADDR_WIDTH, - data_width => 32, - byte_sel_width => 4, - async_timespec => ts_sram - ) - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_sram, - STB_I => STB_O, - WE_I => WE_O, - ACK_O => ACK_O_sram, - SRDY_O => SRDY_O_sram, - MRDY_I => MRDY_O, - SEL_I => SEL_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_sram, - page_mode_en => '0', - async_a => sram_a, - async_d => sram_d, - async_cs => sram_cs_n, - async_wr => sram_wr_n, - async_rd => sram_oe_n, - async_be => sram_be_n, - async_rst => open - ); - -inst_uart : entity work.uart_wb - GENERIC MAP - ( - simulate_tx => true - ) - PORT MAP - ( - CLK_I => clk, - RST_I => rst, - CYC_I => CYC_I_uart, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_O_uart, - SRDY_O => SRDY_O_uart, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_O_uart, - INT_O => int_uart, - ser_rx => rx, - ser_tx => tx - ); - ------------------------------------------------------------------- -SRAM_READ: - process(sram_a, sram_cs_n, sram_oe_n, sram_be_n) - begin - sram_d <= (others => 'Z') after 10 ns; - if sram_oe_n = '0' then - if sram_cs_n = '0' then - if sram_be_n(0) = '0' then - sram_d(7 downto 0) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(7 downto 0) after 10 ns; - end if; - if sram_be_n(1) = '0' then - sram_d(15 downto 8) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(15 downto 8) after 10 ns; - end if; - if sram_be_n(2) = '0' then - sram_d(23 downto 16) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(23 downto 16) after 10 ns; - end if; - if sram_be_n(3) = '0' then - sram_d(31 downto 24) <= sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(31 downto 24) after 10 ns; - end if; - end if; - end if; - end process; - -SRAM_WRITE: - process(sram_wr_n) - begin - if rising_edge(sram_wr_n) then - if sram_cs_n = '0' then - if sram_be_n(0) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(7 downto 0) <= sram_d(7 downto 0); - end if; - if sram_be_n(1) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(15 downto 8) <= sram_d(15 downto 8); - end if; - if sram_be_n(2) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(23 downto 16) <= sram_d(23 downto 16); - end if; - if sram_be_n(3) = '0' then - sram_data(to_integer(sram_a(SRAM_ADDR_WIDTH-1 downto 2)))(31 downto 24) <= sram_d(31 downto 24); - end if; - end if; - end if; - end process; - ------------------------------------------------------------------- -FLASH_READ: - process(rst, flash_cs_n, flash_oe_n, flash_a) - type file_t is file of integer; - file load_flash : file_t open read_mode is "ucb.elf.flash.bin"; --- file load_flash : file_t open read_mode is "test_dcache.flash.bin"; - variable instr : integer; - variable index : natural; - variable temp : signed(31 downto 0); - constant tpd : time := 25 ns; - begin - if rst = '1' then - index := 0; - while not endfile(load_flash) loop - read(load_flash, instr); - temp := to_signed(instr, word_t'length); - flash_data(index) <= unsigned(temp); - index := index + 1; - end loop; - else - flash_d <= (others => 'Z') after tpd; - index := to_integer(flash_a(FLASH_ADDR_WIDTH-1 downto 2)); - if flash_oe_n = '0' then - if flash_cs_n = '0' then - if flash_be_n(0) = '0' then - flash_d(7 downto 0) <= flash_data(index)(7 downto 0) after tpd; - end if; - if flash_be_n(1) = '0' then - flash_d(15 downto 8) <= flash_data(index)(15 downto 8) after tpd; - end if; - if flash_be_n(2) = '0' then - flash_d(23 downto 16) <= flash_data(index)(23 downto 16) after tpd; - end if; - if flash_be_n(3) = '0' then - flash_d(31 downto 24) <= flash_data(index)(31 downto 24) after tpd; - end if; - end if; - end if; - end if; - end process; - ------------------------------------------------------------------- -STIMULUS: process - - begin - - gpi_0(23 downto 16) <= "00000000"; - gpi_0(28 downto 24) <= "00000"; - gpi_0(31) <= 'H'; - wait for 3*CLK_PERIOD; - wait until rising_edge(clk); - rst <= '0'; - wait for 778254*CLK_PERIOD; - wait until rising_edge(clk); - nmi <= '0'; - wait for 3000*CLK_PERIOD; - wait until rising_edge(clk); - nmi <= '0'; - - wait; - - end process; - -END; diff --git a/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf b/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf deleted file mode 100644 index 5d908f7..0000000 --- a/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf +++ /dev/null @@ -1,6 +0,0 @@ -BEGIN MODEL biu - INST inst_bin_fifo ram_style = distributed; - INST inst_bout_fifo ram_style = distributed; - INST inst_write_fifo ram_style = distributed; -END; - diff --git a/lib/CPUs/MIPS/syn/ise101/mips_top.prj b/lib/CPUs/MIPS/syn/ise101/mips_top.prj deleted file mode 100644 index ea45b69..0000000 --- a/lib/CPUs/MIPS/syn/ise101/mips_top.prj +++ /dev/null @@ -1,21 +0,0 @@ -vhdl work "../../../../FIFO/src/fifo_ctrl_pkg.vhd" -vhdl work "../../../../FIFO/src/gray_counter.vhd" -vhdl work "../../../../misc/dpram_2w2r.vhd" -vhdl work "../../../../misc/dpram_1w1r.vhd" -vhdl work "../../../../FIFO/src/fifo_sync_ctrl.vhd" -vhdl work "../../../../FIFO/src/fifo_async_ctrl.vhd" -vhdl work "../../src/core/mips_types.vhd" -vhdl work "../../../../FIFO/src/fifo_sync.vhd" -vhdl work "../../../../FIFO/src/fifo_async.vhd" -vhdl work "../../src/core/mips_shifter.vhd" -vhdl work "../../src/core/mips_reg.vhd" -vhdl work "../../src/core/mips_muldiv.vhd" -vhdl work "../../src/core/mips_instr.vhd" -vhdl work "../../src/core/mips_icache.vhd" -vhdl work "../../src/core/mips_dcache.vhd" -vhdl work "../../src/core/mips_bcu.vhd" -vhdl work "../../src/core/mips_alu.vhd" -vhdl work "../../src/core/mips_pipeline.vhd" -vhdl work "../../src/core/mips_cop.vhd" -vhdl work "../../src/core/mips_biu.vhd" -vhdl work "../../src/core/mips_top.vhd" diff --git a/lib/CPUs/MIPS/syn/ise101/mips_top_vhdl.prj b/lib/CPUs/MIPS/syn/ise101/mips_top_vhdl.prj deleted file mode 100644 index 7676319..0000000 --- a/lib/CPUs/MIPS/syn/ise101/mips_top_vhdl.prj +++ /dev/null @@ -1,21 +0,0 @@ -vhdl work "W:\vhdl\lib\FIFO\src\fifo_ctrl_pkg.vhd" -vhdl work "W:\vhdl\lib\FIFO\src\gray_counter.vhd" -vhdl work "W:\vhdl\lib\misc\dpram_2w2r.vhd" -vhdl work "W:\vhdl\lib\misc\dpram_1w1r.vhd" -vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync_ctrl.vhd" -vhdl work "W:\vhdl\lib\FIFO\src\fifo_async_ctrl.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_types.vhd" -vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync.vhd" -vhdl work "W:\vhdl\lib\FIFO\src\fifo_async.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_shifter.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_reg.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_muldiv.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_instr.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_icache.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_dcache.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bcu.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_alu.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_pipeline.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_cop.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_biu.vhd" -vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_top.vhd" diff --git a/lib/CPUs/MIPS/todo.txt b/lib/CPUs/MIPS/todo.txt deleted file mode 100644 index 551e1a0..0000000 --- a/lib/CPUs/MIPS/todo.txt +++ /dev/null @@ -1,35 +0,0 @@ -2008-10-26 -- Area-Optimierung: DIV und MUL verwenden gleiche Ressourcen -- Area-Optimierung: MUL32x32 primitive für Virtex-4 -- shifter: log shifter besser als built-in sll, srl, sra? Nein (2008-10-27) -- External COP 1..3 interface -- FPU (COP1) -- MMU - -2008-10-27 -- Area vs. speed : Pipeline-stall statt forwarding -- Caches: - Lock-up free cache (refill critical word first then un-lock CPU) (geringer Effekt, zu kompliziert => geringere Zuverlässigkeit) - - 1,2,4-way assoziative - - 2nd-Level cache in System - - Write-back policy - -2008-11-15 -- Bus exceptions IBE DBE (BUI/Cache restart notwendig) - -2009-03-18 -- cache line sizes von 1 word (4 bytes) gibt NULL-vector. Fehler in Berechnung der inedx_widths - -2009-8-8 -- Soft-Reset. Ähnlich wie Exception (Reset/NMI). Speicherung von EPC (done) -- CP_COND - -2009-10-17 -- Soft-reset implemetiert. Register werden wie bei normaler Exception verändert. - TodO: Bei Soft-reset (laut Buch) KUc=0, IEc=0 und BEV=1 initialisieren - -- Uncached write: Geht wie bei cached-write in den Write-Buffer. Folge: Mögliche lange Latenz bis uncached memory-mapped I/O tatsächlich geschieben wird. - Könnte bei IRQ acknowledging Probleme bereiten (z.b. mehrfaches (unötiges) anspringen der ISR, obwohl IRQ schon acknowleded wurde). - Work-around: Nach schreiben von memory-mapped I/O, gleiche Adresse zurücklesen (lesen wartet bis write-buffer leer). - -2010-01-09 -- COP dependency einführen => Pipeline stall, wenn COP Daten nicht verfügbar diff --git a/lib/CPUs/MIPS/tools/Makefile b/lib/CPUs/MIPS/tools/Makefile deleted file mode 100644 index 852df6b..0000000 --- a/lib/CPUs/MIPS/tools/Makefile +++ /dev/null @@ -1,20 +0,0 @@ -CFLAGS=-O2 -CC=gcc -PREFIX=/usr/local -all: romgen ramgen flashgen - -romgen: ./src/romgen.c - $(CC) $(CFLAGS) ./src/romgen.c -lm -o ./romgen - -ramgen: ./src/ramgen.c - $(CC) $(CFLAGS) ./src/ramgen.c -lm -o ./ramgen - -flashgen: ./src/flashgen.c - $(CC) $(CFLAGS) ./src/flashgen.c -lm -o ./flashgen - -install: - cp romgen $(PREFIX)/bin - cp ramgen $(PREFIX)/bin - cp flashgen $(PREFIX)/bin -clean: - rm -rf romgen* ramgen* flashgen* diff --git a/lib/CPUs/MIPS/tools/src/flashgen.c b/lib/CPUs/MIPS/tools/src/flashgen.c deleted file mode 100644 index a6b5470..0000000 --- a/lib/CPUs/MIPS/tools/src/flashgen.c +++ /dev/null @@ -1,140 +0,0 @@ -#include -#include -#include -#include - -#define INT8 char -#define INT16 short -#define INT32 long -#define UINT8 unsigned char -#define UINT16 unsigned short -#define UINT32 unsigned long -#define INT int -#define UINT unsigned int -#define FLOAT32 float -#define FLOAT64 double - -#define SDRAM_BASE 0x40000000 -#define FLASH_OFFSET 0x00000000 - -#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian; -#define MAGIC_EL 0x3149464A // "JFI1" in little-endian; - -UINT32 conv_endian32(UINT32 src) -{ - UINT32 dst; - - dst = (0xFF000000 & (src << 24)) - | (0x00FF0000 & (src << 8)) - | (0x0000FF00 & (src >> 8)) - | (0x000000FF & (src >> 24)); - - return dst; -}; - -// -------------------------------------------------------------- -typedef struct _sflash_img_hdr_t -{ - UINT32 magic; - UINT32 target_addr; - UINT32 img_offset; - UINT32 img_size; - UINT32 hdr_next; - UINT8 img_name[128]; - UINT8 res[108]; - -} flash_img_hdr_t; - -// -------------------------------------------------------------- -void basename(char *pSrc, char *pDst) -{ - int i, size; - - size = strlen(pSrc); - - while(pSrc[size] != '.') - size--; - - for (i=0; i < size; i++) - pDst[i] = pSrc[i]; - - pDst[i] = 0; - -} - -// -------------------------------------------------------------- -int main(int argc, char *argv[]) -{ - char *pFilenameIn; - char name_flash[1024]; - char name_prj[1024]; - char *pBuf; - UINT32 *pBuf32; - flash_img_hdr_t img_hdr = {0}; - - FILE *pFile; - int filesize; - long start, end; - int i; - - if (argc < 2) - { - fprintf(stderr, "Usage: flashgen [-{EL|EB}]\n"); - return 1; - } - - pFilenameIn = argv[1]; - pFile = fopen(pFilenameIn, "rb"); - if (!pFile) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - basename(pFilenameIn, name_prj); - sprintf(name_flash, "%s.flash.bin", name_prj); - - // determine filesize - fseek(pFile, 0, SEEK_SET); - start = ftell(pFile); - fseek(pFile, 0, SEEK_END); - end = ftell(pFile); - fseek(pFile, 0, SEEK_SET); - filesize = (end-start); - - pBuf = (char*)malloc(filesize); - fread(pBuf, 1, filesize, pFile); - - fclose(pFile); - - pFile = fopen(name_flash, "wb"); - if (!pFile) - { - fprintf(stderr, "Error opening file %s\n", name_flash); - return 1; - } - - img_hdr.magic = MAGIC_EL; - img_hdr.target_addr = SDRAM_BASE; - img_hdr.img_size = filesize; - img_hdr.img_offset = FLASH_OFFSET + sizeof(flash_img_hdr_t); - img_hdr.hdr_next = FLASH_OFFSET; - - if (argc == 3) - { - if ((argv[2][0] == '-') && (toupper(argv[2][1]) == 'E') && (toupper(argv[2][2]) == 'B')) - { - img_hdr.magic = MAGIC_EB; - pBuf32 = (UINT32*)pBuf; - for (i=0; i < filesize/4; i ++) - pBuf32[i] = conv_endian32(pBuf32[i]); - } - } - fwrite(&img_hdr, sizeof(flash_img_hdr_t), 1, pFile); - fwrite(pBuf, 1, filesize, pFile); - - fclose(pFile); - - return 0; -} - diff --git a/lib/CPUs/MIPS/tools/src/ramgen.c b/lib/CPUs/MIPS/tools/src/ramgen.c deleted file mode 100644 index 8f61118..0000000 --- a/lib/CPUs/MIPS/tools/src/ramgen.c +++ /dev/null @@ -1,385 +0,0 @@ -#include -#include -#include -#include - -#define ARCH_NAME "data" -#define ENT_NAME "ram" -#define JTAG_ADDR_WIDTH 16 - -// -------------------------------------------------------------- -void basename(char *pSrc, char *pDst) -{ - int i, size; - - size = strlen(pSrc); - - while(pSrc[size] != '.') - size--; - - for (i=0; i < size; i++) - pDst[i] = pSrc[i]; - - pDst[i] = 0; - -} - -int SaveRAM(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntName, int nbits_addr, int nbits_data) -{ - FILE *pFileIn, *pFileOut; - long start, end; - int i, word, filesize, romsize; - - pFileIn = fopen(pFilenameIn, "rb"); - if (!pFileIn) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - pFileOut = fopen(pFilenameOut, "wb"); - if (!pFileOut) - { - fprintf(stderr, "Error opening file %s\n", pFilenameOut); - return 1; - } - - fseek(pFileIn, 0, SEEK_SET); - start = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_END); - end = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_SET); - - filesize = (end-start); - romsize = (int)pow(2, nbits_addr+2); - - // ------------------------------------------------------------------------- - // Header - - // ------------------------------------------------------------------------- - fprintf(pFileOut, "LIBRARY IEEE;\n"); - fprintf(pFileOut, "USE IEEE.STD_LOGIC_1164.ALL;\n"); - fprintf(pFileOut, "USE IEEE.NUMERIC_STD.ALL;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "ENTITY %s IS\n", ENT_NAME); - fprintf(pFileOut, "\tPort\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\t\tclk\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\tce\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\twe\t\t: in unsigned(%d downto 0);\n", nbits_data/8-1); - fprintf(pFileOut, "\t\taddr\t\t: in unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\t\tdin\t\t: in unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\t\tdout\t\t: out unsigned(%d downto 0)\n", nbits_data-1); - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "END %s;\n", ENT_NAME); - fprintf(pFileOut, "\n"); - - - fprintf(pFileOut, "ARCHITECTURE %s OF %s IS\n", ARCH_NAME, ENT_NAME); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "\tconstant depth : natural := %d;\n", romsize/4); - fprintf(pFileOut, "\tsubtype word_t is unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\ttype word_array_t is array (0 to %d) of word_t;\n", romsize/4-1); - - fprintf(pFileOut, "\tsignal sram : word_array_t :=\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // ROM part - // ------------------------------------------------------------------------- - for (i=0; i < filesize; i += sizeof(int)) - { - fread(&word, 1, sizeof(int), pFileIn); - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - word = 0; - for (; i < romsize; i += sizeof(int)) - { - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // Trailer - // ------------------------------------------------------------------------- - fprintf(pFileOut, "begin\n", ARCH_NAME); - fprintf(pFileOut, "\n"); - fprintf(pFileOut, "RAM_RW:\n", ARCH_NAME); - fprintf(pFileOut, "\tprocess(clk)\n"); - fprintf(pFileOut, "\tvariable index : natural range 0 to depth-1;\n"); - fprintf(pFileOut, "\tbegin\n"); - fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n"); - fprintf(pFileOut, "\t\t\tindex := to_integer(addr(%d downto 2));\n", nbits_addr+1); - fprintf(pFileOut, "\t\t\tif we(0) = '1' then\n"); - fprintf(pFileOut, "\t\t\t\tsram(index)(7 downto 0)\t\t<= din(7 downto 0);\n"); - fprintf(pFileOut, "\t\t\tend if;\n"); - fprintf(pFileOut, "\t\t\tif we(1) = '1' then\n"); - fprintf(pFileOut, "\t\t\t\tsram(index)(15 downto 8)\t<= din(15 downto 8);\n"); - fprintf(pFileOut, "\t\t\tend if;\n"); - fprintf(pFileOut, "\t\t\tif we(2) = '1' then\n"); - fprintf(pFileOut, "\t\t\t\tsram(index)(23 downto 16)\t<= din(23 downto 16);\n"); - fprintf(pFileOut, "\t\t\tend if;\n"); - fprintf(pFileOut, "\t\t\tif we(3) = '1' then\n"); - fprintf(pFileOut, "\t\t\t\tsram(index)(31 downto 24)\t\t<= din(31 downto 24);\n"); - fprintf(pFileOut, "\t\t\tend if;\n"); - fprintf(pFileOut, "\t\t\tdout <= sram(index);\n"); - fprintf(pFileOut, "\t\tend if;\n"); - fprintf(pFileOut, "\tend process;\n"); - fprintf(pFileOut, "\n"); - fprintf(pFileOut, "end %s;\n", ARCH_NAME); - - return 0; -} - -int SaveRAM_V4LD(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntName, int nbits_addr, int nbits_data) -{ - FILE *pFileIn, *pFileOut; - long start, end; - int i, word, filesize, romsize; - - char tpl[] = {"--------------------------------------------------------------------------\n-- Virtex-4: JTAG Loader\n--------------------------------------------------------------------------\n\ti00_BUFG : BUFG\n\tport map\n\t(\n\t\tO => bs_clk1,\n I => bs_clk0\n\t);\n\t\n\ti01_BUFG : BUFG\n\tport map\n\t(\n\t\tO => bs_update1,\n I => bs_update0\n\t);\n\n\tBSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 \n\tgeneric map\n\t(\n\t\tJTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4)\n\t)\n\tport map \n\t(\n\t\tCAPTURE => bs_capture, -- CAPTURE output from TAP controller\n\t\tDRCK => bs_clk0, -- Data register output for USER functions\n\t\tRESET => bs_rst, -- Reset output from TAP controller\n\t\tSEL => bs_sel, -- USER active output\n\t\tSHIFT => bs_shift, -- SHIFT output from TAP controller\n\t\tTDI => bs_tdi, -- TDI output from TAP controller\n\t\tUPDATE => bs_update0, -- UPDATE output from TAP controller\n\t\tTDO => bs_tdo -- Data input for USER function\n\t);\n\n\tjtag_ld_addr <= user_regi(user_regi'left downto jtag_ld_dout'length);\n\tjtag_ld_din <= user_regi(jtag_ld_dout'length-1 downto 0);\n\tjtag_ld_clk <= bs_update1;\n\tjtag_ld_we <= bs_sel;\n\t\nsipo:\n\tprocess (bs_rst, bs_clk1, bs_tdi, bs_shift)\n\tbegin\n\t\tif bs_rst = '1' then\n\t\t\tuser_regi <= (others => '0');\n\t\telsif rising_edge(bs_clk1) then\n\t\t\tif bs_shift = '1' then\n\t\t\t\tuser_regi <= bs_tdi & user_regi(user_regi'left downto 1);\n\t\t\tend if;\n\t\tend if;\n\tend process;\t\n\npiso:\n\tprocess (bs_rst, bs_clk1, bs_shift, user_rego)\n\tbegin\n\t\tbs_tdo <= user_rego(0);\n\t\tif bs_rst = '1' then\n\t\t\tuser_rego <= (others => '0');\n\t\telsif rising_edge(bs_clk1) then\n\t\t\tif bs_shift = '1' then\n\t\t\t\tuser_rego <= user_rego(0) & user_rego(user_rego'left downto 1);\n\t\t\telse\n\t\t\t\tuser_rego <= (user_rego'left downto jtag_ld_dout'length => '0') & jtag_ld_dout;\t\n\t\n\t\t\tend if;\n\t\tend if;\n\tend process;\n\n"}; - - pFileIn = fopen(pFilenameIn, "rb"); - if (!pFileIn) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - pFileOut = fopen(pFilenameOut, "wb"); - if (!pFileOut) - { - fprintf(stderr, "Error opening file %s\n", pFilenameOut); - return 1; - } - - fseek(pFileIn, 0, SEEK_SET); - start = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_END); - end = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_SET); - - filesize = (end-start); - romsize = (int)pow(2, nbits_addr+2); - - // ------------------------------------------------------------------------- - // Header - - // ------------------------------------------------------------------------- - fprintf(pFileOut, "LIBRARY IEEE;\n"); - fprintf(pFileOut, "USE IEEE.STD_LOGIC_1164.ALL;\n"); - fprintf(pFileOut, "USE IEEE.NUMERIC_STD.ALL;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "library UNISIM;\n"); - fprintf(pFileOut, "use UNISIM.VComponents.all;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "ENTITY %s IS\n", ENT_NAME); - fprintf(pFileOut, "\tPort\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\t\tclk\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\tce\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\taddr\t\t: in unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\t\tdout\t\t: out unsigned(%d downto 0)\n", nbits_data-1); - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "END %s;\n", ENT_NAME); - fprintf(pFileOut, "\n"); - - - fprintf(pFileOut, "ARCHITECTURE %s OF %s IS\n", ARCH_NAME, ENT_NAME); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "\tsubtype word_t is unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\ttype word_array_t is array (0 to %d) of word_t;\n", romsize/4-1); - - fprintf(pFileOut, "\tsignal jtag_ld_clk\t\t: STD_LOGIC;\n"); - fprintf(pFileOut, "\tsignal jtag_ld_we\t\t: STD_LOGIC;\n"); - fprintf(pFileOut, "\tsignal jtag_ld_addr\t\t: unsigned (%d downto 0);\n", JTAG_ADDR_WIDTH-1); - fprintf(pFileOut, "\tsignal jtag_ld_dout\t\t: unsigned (%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\tsignal jtag_ld_din\t\t: unsigned (%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\tsignal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic;\n"); - fprintf(pFileOut, "\tsignal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic;\n"); - fprintf(pFileOut, "\tsignal user_regi, user_rego : unsigned (%d downto 0);\n", 31 + JTAG_ADDR_WIDTH); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "\tsignal word_array : word_array_t :=\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // ROM part - // ------------------------------------------------------------------------- - for (i=0; i < filesize; i += sizeof(int)) - { - fread(&word, 1, sizeof(int), pFileIn); - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - word = 0; - for (; i < romsize; i += sizeof(int)) - { - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "begin\n", ARCH_NAME); - - fprintf(pFileOut, "\n"); - fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME); - fprintf(pFileOut, "\tprocess(clk)\n"); - fprintf(pFileOut, "\tbegin\n"); - fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n"); - fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1); - fprintf(pFileOut, "\t\tend if;\n"); - fprintf(pFileOut, "\tend process;\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // Trailer - // ------------------------------------------------------------------------- - fprintf(pFileOut, "\n"); - fputs(tpl, pFileOut); - - fprintf(pFileOut, "PROM_WRITE:\n", ARCH_NAME); - fprintf(pFileOut, "\tprocess(jtag_ld_clk, jtag_ld_we)\n"); - fprintf(pFileOut, "\tbegin\n"); - fprintf(pFileOut, "\t\tif rising_edge(jtag_ld_clk) then\n"); - fprintf(pFileOut, "\t\t\tif jtag_ld_we = '1' then\n"); - fprintf(pFileOut, "\t\t\t\tword_array(to_integer(jtag_ld_addr(%d downto 0))) <= jtag_ld_din;\n", nbits_addr-1); - fprintf(pFileOut, "\t\t\telse\n"); - fprintf(pFileOut, "\t\t\t\tjtag_ld_dout <= word_array(to_integer(jtag_ld_addr(%d downto 0)));\n", nbits_addr-1); - fprintf(pFileOut, "\t\t\tend if;\n"); - fprintf(pFileOut, "\t\tend if;\n"); - fprintf(pFileOut, "\tend process;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "end %s;\n", ARCH_NAME); - return 0; -} - -int SaveRAM_TCL(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntName, int nbits_addr, int nbits_data) -{ - FILE *pFileIn, *pFileOut; - long start, end; - int i, word, word_addr, filesize, romsize; - char binstr_addr[33]; - char binstr_data[33]; - - char tpl[] = {"# ---------------------------------------------------------------------\n# For Chipscope 9.1\n# ---------------------------------------------------------------------\n# Source JTAG/TCL frame work\ncd $env(CHIPSCOPE)\\\\bin\\\\nt\nsource csejtag.tcl\n\nnamespace import ::chipscope::*\n\n# Platform USB Cable\nset PLATFORM_USB_CABLE_ARGS [list \"port=USB2\" \"frequency=6000000\"]\n# frequency=\"24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000\"\n\n# Create session\nset handle [::chipscope::csejtag_session create 0]\n\n# Open JTAG and lock\nset open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS]\nset lock_result [::chipscope::csejtag_target lock $handle 1000]\n\nset devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]\n\n# Get Device ID\nset devtype \"Virtex-4SX\"\nset devid 2\nset irlength [::chipscope::csejtag_tap get_irlength $handle $devid]\nset idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid]\n\nset CSE_OP $CSEJTAG_SHIFT_READWRITE\nset CSE_ES $CSEJTAG_RUN_TEST_IDLE\n\n# Write Program\n"}; - - pFileIn = fopen(pFilenameIn, "rb"); - if (!pFileIn) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - pFileOut = fopen(pFilenameOut, "wb"); - if (!pFileOut) - { - fprintf(stderr, "Error opening file %s\n", pFilenameOut); - return 1; - } - - fseek(pFileIn, 0, SEEK_SET); - start = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_END); - end = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_SET); - - filesize = (end-start); - romsize = (int)pow(2, nbits_addr+2); - - // ------------------------------------------------------------------------- - // Header - - // ------------------------------------------------------------------------- - fputs(tpl, pFileOut); - - // ------------------------------------------------------------------------- - // ROM part - // ------------------------------------------------------------------------- - fprintf(pFileOut, "# Assembled from %s\n", pFilenameIn); - fprintf(pFileOut, "# ---------------------------------------------------------------\n"); - fprintf(pFileOut, "# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA\n"); - fprintf(pFileOut, "# User 2\n"); - fprintf(pFileOut, "set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength \"3C3\"]\n\n"); - - word_addr = 0; - for (i=0; i < filesize; i += sizeof(int)) - { - fread(&word, 1, sizeof(int), pFileIn); - fprintf(pFileOut, "::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 %d \"%4.4X%8.8X\"\n", nbits_data + JTAG_ADDR_WIDTH, word_addr, word); - word_addr++; - } - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // Trailer - // ------------------------------------------------------------------------- - fprintf(pFileOut, "::chipscope::csejtag_target unlock $handle\n"); - fprintf(pFileOut, "::chipscope::csejtag_target close $handle\n"); - fprintf(pFileOut, "::chipscope::csejtag_session destroy $handle\n"); - fprintf(pFileOut, "exit\n"); - - return 0; -} - -int main(int argc, char *argv[]) -{ - char *pFilenameIn; - char name_prj[1024]; - char name_rom_tcl[1024]; - char name_rom[1024]; - char name_rom_v4ld[1024]; - - FILE *pFileIn; - int filesize, romsize, nbits_addr, nbits_data; - long start, end; - int word, i; - - if (argc < 2) - { - fprintf(stderr, "Usage: ramgen \n"); - return 1; - } - - pFilenameIn = argv[1]; - if (argc == 3) - nbits_addr = atoi(argv[2]); - - - basename(pFilenameIn, name_prj); - sprintf(name_rom, "%s.vhd", name_prj); - sprintf(name_rom_v4ld, "%s_ld.vhd", name_prj); - sprintf(name_rom_tcl, "%s.tcl", name_prj); - - SaveRAM(pFilenameIn, name_rom, ARCH_NAME, ENT_NAME, nbits_addr, 32); -// SaveROM_V4LD(pFilenameIn, name_rom_v4ld, ARCH_NAME, ENT_NAME, nbits_addr, 32); - SaveRAM_TCL(pFilenameIn, name_rom_tcl, ARCH_NAME, ENT_NAME, nbits_addr, 32); - - - return 0; -} - diff --git a/lib/CPUs/MIPS/tools/src/romgen.c b/lib/CPUs/MIPS/tools/src/romgen.c deleted file mode 100644 index f674a6a..0000000 --- a/lib/CPUs/MIPS/tools/src/romgen.c +++ /dev/null @@ -1,428 +0,0 @@ -#include -#include -#include -#include - -#define INT8 char -#define INT16 short -#define INT32 long -#define UINT8 unsigned char -#define UINT16 unsigned short -#define UINT32 unsigned long -#define INT int -#define UINT unsigned int -#define FLOAT32 float -#define FLOAT64 double - -#define ARCH_NAME "data" -#define ENT_NAME "rom" -#define JTAG_ADDR_WIDTH 16 - -UINT32 g_endianess_EB; - -// -------------------------------------------------------------- -UINT32 conv_endian32(UINT32 src) -{ - UINT32 dst; - - dst = (0xFF000000 & (src << 24)) - | (0x00FF0000 & (src << 8)) - | (0x0000FF00 & (src >> 8)) - | (0x000000FF & (src >> 24)); - - return dst; -}; - -UINT32 to_big_endian32(UINT32 src) -{ -#ifndef NATIVE_IS_BIG_ENDIAN - return conv_endian32(src); -#else - return src; -#endif -} - -UINT32 from_big_endian32(UINT32 src) -{ -#ifndef NATIVE_IS_BIG_ENDIAN - return conv_endian32(src); -#else - return src; -#endif -} - -void basename(char *pSrc, char *pDst) -{ - int i, size; - - size = strlen(pSrc); - - while(pSrc[size] != '.') - size--; - - for (i=0; i < size; i++) - pDst[i] = pSrc[i]; - - pDst[i] = 0; - -} - -int SaveROM(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntName, int nbits_addr, int nbits_data) -{ - FILE *pFileIn, *pFileOut; - long start, end; - int i, word, filesize, romsize; - - pFileIn = fopen(pFilenameIn, "rb"); - if (!pFileIn) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - pFileOut = fopen(pFilenameOut, "wb"); - if (!pFileOut) - { - fprintf(stderr, "Error opening file %s\n", pFilenameOut); - return 1; - } - - fseek(pFileIn, 0, SEEK_SET); - start = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_END); - end = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_SET); - - filesize = (end-start); - romsize = (int)pow(2, nbits_addr+2); - - // ------------------------------------------------------------------------- - // Header - - // ------------------------------------------------------------------------- - fprintf(pFileOut, "LIBRARY IEEE;\n"); - fprintf(pFileOut, "USE IEEE.STD_LOGIC_1164.ALL;\n"); - fprintf(pFileOut, "USE IEEE.NUMERIC_STD.ALL;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "ENTITY %s IS\n", ENT_NAME); - fprintf(pFileOut, "\tPort\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\t\tclk\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\tce\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\taddr\t\t: in unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\t\tdout\t\t: out unsigned(%d downto 0)\n", nbits_data-1); - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "END %s;\n", ENT_NAME); - fprintf(pFileOut, "\n"); - - - fprintf(pFileOut, "ARCHITECTURE %s OF %s IS\n", ARCH_NAME, ENT_NAME); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "\tsubtype word_t is unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\ttype word_array_t is array (0 to %d) of word_t;\n", romsize/4-1); - - fprintf(pFileOut, "\tconstant word_array : word_array_t :=\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // ROM part - // ------------------------------------------------------------------------- - for (i=0; i < filesize; i += sizeof(int)) - { - fread(&word, 1, sizeof(int), pFileIn); - if (g_endianess_EB) - fprintf(pFileOut, "\t\tX\"%8.8X\"", to_big_endian32(word)); - else - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - word = 0; - for (; i < romsize; i += sizeof(int)) - { - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // Trailer - // ------------------------------------------------------------------------- - fprintf(pFileOut, "begin\n", ARCH_NAME); - fprintf(pFileOut, "\n"); - fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME); - fprintf(pFileOut, "\tprocess(clk)\n"); - fprintf(pFileOut, "\tbegin\n"); - fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n"); - fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1); - fprintf(pFileOut, "\t\tend if;\n"); - fprintf(pFileOut, "\tend process;\n"); - fprintf(pFileOut, "\n"); - fprintf(pFileOut, "end %s;\n", ARCH_NAME); - - return 0; -} - -int SaveROM_V4LD(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntName, int nbits_addr, int nbits_data) -{ - FILE *pFileIn, *pFileOut; - long start, end; - int i, word, filesize, romsize; - - char tpl[] = {"--------------------------------------------------------------------------\n-- Virtex-4: JTAG Loader\n--------------------------------------------------------------------------\n\ti00_BUFG : BUFG\n\tport map\n\t(\n\t\tO => bs_clk1,\n I => bs_clk0\n\t);\n\t\n\ti01_BUFG : BUFG\n\tport map\n\t(\n\t\tO => bs_update1,\n I => bs_update0\n\t);\n\n\tBSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 \n\tgeneric map\n\t(\n\t\tJTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4)\n\t)\n\tport map \n\t(\n\t\tCAPTURE => bs_capture, -- CAPTURE output from TAP controller\n\t\tDRCK => bs_clk0, -- Data register output for USER functions\n\t\tRESET => bs_rst, -- Reset output from TAP controller\n\t\tSEL => bs_sel, -- USER active output\n\t\tSHIFT => bs_shift, -- SHIFT output from TAP controller\n\t\tTDI => bs_tdi, -- TDI output from TAP controller\n\t\tUPDATE => bs_update0, -- UPDATE output from TAP controller\n\t\tTDO => bs_tdo -- Data input for USER function\n\t);\n\n\tjtag_ld_addr <= user_regi(user_regi'left downto jtag_ld_dout'length);\n\tjtag_ld_din <= user_regi(jtag_ld_dout'length-1 downto 0);\n\tjtag_ld_clk <= bs_update1;\n\tjtag_ld_we <= bs_sel;\n\t\nsipo:\n\tprocess (bs_rst, bs_clk1, bs_tdi, bs_shift)\n\tbegin\n\t\tif bs_rst = '1' then\n\t\t\tuser_regi <= (others => '0');\n\t\telsif rising_edge(bs_clk1) then\n\t\t\tif bs_shift = '1' then\n\t\t\t\tuser_regi <= bs_tdi & user_regi(user_regi'left downto 1);\n\t\t\tend if;\n\t\tend if;\n\tend process;\t\n\npiso:\n\tprocess (bs_rst, bs_clk1, bs_shift, user_rego)\n\tbegin\n\t\tbs_tdo <= user_rego(0);\n\t\tif bs_rst = '1' then\n\t\t\tuser_rego <= (others => '0');\n\t\telsif rising_edge(bs_clk1) then\n\t\t\tif bs_shift = '1' then\n\t\t\t\tuser_rego <= user_rego(0) & user_rego(user_rego'left downto 1);\n\t\t\telse\n\t\t\t\tuser_rego <= (user_rego'left downto jtag_ld_dout'length => '0') & jtag_ld_dout;\t\n\t\n\t\t\tend if;\n\t\tend if;\n\tend process;\n\n"}; - - pFileIn = fopen(pFilenameIn, "rb"); - if (!pFileIn) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - pFileOut = fopen(pFilenameOut, "wb"); - if (!pFileOut) - { - fprintf(stderr, "Error opening file %s\n", pFilenameOut); - return 1; - } - - fseek(pFileIn, 0, SEEK_SET); - start = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_END); - end = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_SET); - - filesize = (end-start); - romsize = (int)pow(2, nbits_addr+2); - - // ------------------------------------------------------------------------- - // Header - - // ------------------------------------------------------------------------- - fprintf(pFileOut, "LIBRARY IEEE;\n"); - fprintf(pFileOut, "USE IEEE.STD_LOGIC_1164.ALL;\n"); - fprintf(pFileOut, "USE IEEE.NUMERIC_STD.ALL;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "library UNISIM;\n"); - fprintf(pFileOut, "use UNISIM.VComponents.all;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "ENTITY %s IS\n", ENT_NAME); - fprintf(pFileOut, "\tPort\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\t\tclk\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\tce\t\t: in STD_LOGIC;\n"); - fprintf(pFileOut, "\t\taddr\t\t: in unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\t\tdout\t\t: out unsigned(%d downto 0)\n", nbits_data-1); - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "END %s;\n", ENT_NAME); - fprintf(pFileOut, "\n"); - - - fprintf(pFileOut, "ARCHITECTURE %s OF %s IS\n", ARCH_NAME, ENT_NAME); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "\tsubtype word_t is unsigned(%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\ttype word_array_t is array (0 to %d) of word_t;\n", romsize/4-1); - - fprintf(pFileOut, "\tsignal jtag_ld_clk\t\t: STD_LOGIC;\n"); - fprintf(pFileOut, "\tsignal jtag_ld_we\t\t: STD_LOGIC;\n"); - fprintf(pFileOut, "\tsignal jtag_ld_addr\t\t: unsigned (%d downto 0);\n", JTAG_ADDR_WIDTH-1); - fprintf(pFileOut, "\tsignal jtag_ld_dout\t\t: unsigned (%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\tsignal jtag_ld_din\t\t: unsigned (%d downto 0);\n", nbits_data-1); - fprintf(pFileOut, "\tsignal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic;\n"); - fprintf(pFileOut, "\tsignal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic;\n"); - fprintf(pFileOut, "\tsignal user_regi, user_rego : unsigned (%d downto 0);\n", 31 + JTAG_ADDR_WIDTH); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "\tsignal word_array : word_array_t :=\n"); - fprintf(pFileOut, "\t(\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // ROM part - // ------------------------------------------------------------------------- - for (i=0; i < filesize; i += sizeof(int)) - { - fread(&word, 1, sizeof(int), pFileIn); - if (g_endianess_EB) - fprintf(pFileOut, "\t\tX\"%8.8X\"", to_big_endian32(word)); - else - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - word = 0; - for (; i < romsize; i += sizeof(int)) - { - fprintf(pFileOut, "\t\tX\"%8.8X\"", word); - if (i < (romsize-sizeof(int))) - fprintf(pFileOut, ", -- %8.8X\n", i); - else - fprintf(pFileOut, " -- %8.8X\n", i); - } - fprintf(pFileOut, "\t);\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "begin\n", ARCH_NAME); - - fprintf(pFileOut, "\n"); - fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME); - fprintf(pFileOut, "\tprocess(clk)\n"); - fprintf(pFileOut, "\tbegin\n"); - fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n"); - fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1); - fprintf(pFileOut, "\t\tend if;\n"); - fprintf(pFileOut, "\tend process;\n"); - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // Trailer - // ------------------------------------------------------------------------- - fprintf(pFileOut, "\n"); - fputs(tpl, pFileOut); - - fprintf(pFileOut, "PROM_WRITE:\n", ARCH_NAME); - fprintf(pFileOut, "\tprocess(jtag_ld_clk, jtag_ld_we)\n"); - fprintf(pFileOut, "\tbegin\n"); - fprintf(pFileOut, "\t\tif rising_edge(jtag_ld_clk) then\n"); - fprintf(pFileOut, "\t\t\tif jtag_ld_we = '1' then\n"); - fprintf(pFileOut, "\t\t\t\tword_array(to_integer(jtag_ld_addr(%d downto 0))) <= jtag_ld_din;\n", nbits_addr-1); - fprintf(pFileOut, "\t\t\telse\n"); - fprintf(pFileOut, "\t\t\t\tjtag_ld_dout <= word_array(to_integer(jtag_ld_addr(%d downto 0)));\n", nbits_addr-1); - fprintf(pFileOut, "\t\t\tend if;\n"); - fprintf(pFileOut, "\t\tend if;\n"); - fprintf(pFileOut, "\tend process;\n"); - fprintf(pFileOut, "\n"); - - fprintf(pFileOut, "end %s;\n", ARCH_NAME); - return 0; -} - -int SaveROM_TCL(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntName, int nbits_addr, int nbits_data) -{ - FILE *pFileIn, *pFileOut; - long start, end; - int i, word, word_addr, filesize, romsize; - char binstr_addr[33]; - char binstr_data[33]; - - char tpl[] = - {"# ---------------------------------------------------------------------\n# For Chipscope 10.1\n# ---------------------------------------------------------------------\n# Source JTAG/TCL frame work\nsource $env(CS_PATH)\\\\csejtag.tcl\n\nnamespace import ::chipscope::*\n\n# Platform USB Cable\n# Create session\nset handle [::chipscope::csejtag_session create 0]\n\n# Open JTAG and lock\nset open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 \"port=USB2\" \"frequency=6000000\"]\n# frequency=\"24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000\"\n\nset lock_result [::chipscope::csejtag_target lock $handle 1000]\n\nset devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]\n\n# Get Device ID\nset devtype \"Virtex-4SX\"\nset devid 2\nset irlength [::chipscope::csejtag_tap get_irlength $handle $devid]\nset idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid]\n\nset CSE_OP $CSEJTAG_SHIFT_READWRITE\nset CSE_ES $CSEJTAG_RUN_TEST_IDLE\n\n# Write Program\n"}; - - pFileIn = fopen(pFilenameIn, "rb"); - if (!pFileIn) - { - fprintf(stderr, "Error opening file %s\n", pFilenameIn); - return 1; - } - - pFileOut = fopen(pFilenameOut, "wb"); - if (!pFileOut) - { - fprintf(stderr, "Error opening file %s\n", pFilenameOut); - return 1; - } - - fseek(pFileIn, 0, SEEK_SET); - start = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_END); - end = ftell(pFileIn); - fseek(pFileIn, 0, SEEK_SET); - - filesize = (end-start); - romsize = (int)pow(2, nbits_addr+2); - - // ------------------------------------------------------------------------- - // Header - - // ------------------------------------------------------------------------- - fputs(tpl, pFileOut); - - // ------------------------------------------------------------------------- - // ROM part - // ------------------------------------------------------------------------- - fprintf(pFileOut, "# Assembled from %s\n", pFilenameIn); - fprintf(pFileOut, "# ---------------------------------------------------------------\n"); - fprintf(pFileOut, "# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA\n"); - fprintf(pFileOut, "# User 1\n"); - fprintf(pFileOut, "set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength \"3C2\"]\n\n"); - - word_addr = 0; - for (i=0; i < filesize; i += sizeof(int)) - { - fread(&word, 1, sizeof(int), pFileIn); - if (g_endianess_EB) - fprintf(pFileOut, "::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 %d \"%4.4X%8.8X\"\n", nbits_data + JTAG_ADDR_WIDTH, word_addr, to_big_endian32(word)); - else - fprintf(pFileOut, "::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 %d \"%4.4X%8.8X\"\n", nbits_data + JTAG_ADDR_WIDTH, word_addr, word); - word_addr++; - } - fprintf(pFileOut, "\n"); - - // ------------------------------------------------------------------------- - // Trailer - // ------------------------------------------------------------------------- - fprintf(pFileOut, "::chipscope::csejtag_target unlock $handle\n"); - fprintf(pFileOut, "::chipscope::csejtag_target close $handle\n"); - fprintf(pFileOut, "::chipscope::csejtag_session destroy $handle\n"); - fprintf(pFileOut, "exit\n"); - - return 0; -} - -int main(int argc, char *argv[]) -{ - char *pFilenameIn; - char name_prj[1024]; - char name_rom[1024]; - char name_rom_v4ld[1024]; - char name_rom_tcl[1024]; - - FILE *pFileIn; - int filesize, romsize, nbits_addr, nbits_data; - long start, end; - int word, i; - - if (argc < 2) - { - fprintf(stderr, "Usage: romgen [-{EL|EB}]\n"); - return 1; - } - - pFilenameIn = argv[1]; - nbits_addr = atoi(argv[2]); - - g_endianess_EB = 0; - if (argc == 4) - { - if ((argv[3][0] == '-') && (toupper(argv[3][1]) == 'E') && (toupper(argv[3][2]) == 'B')) - g_endianess_EB = 1; - } - - basename(pFilenameIn, name_prj); - sprintf(name_rom, "%s.vhd", name_prj); - sprintf(name_rom_v4ld, "%s_ld.vhd", name_prj); - sprintf(name_rom_tcl, "%s.tcl", name_prj); - - SaveROM(pFilenameIn, name_rom, ARCH_NAME, ENT_NAME, nbits_addr, 32); - SaveROM_V4LD(pFilenameIn, name_rom_v4ld, ARCH_NAME, ENT_NAME, nbits_addr, 32); - SaveROM_TCL(pFilenameIn, name_rom_tcl, ARCH_NAME, ENT_NAME, nbits_addr, 32); - - - return 0; -} - diff --git a/lib/FIFO/sim/tb_gray_counter.fdo b/lib/FIFO/sim/tb_gray_counter.fdo deleted file mode 100644 index b619f71..0000000 --- a/lib/FIFO/sim/tb_gray_counter.fdo +++ /dev/null @@ -1,13 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work -vcom -explicit -93 "../src/fifo_ctrl_pkg.vhd" -vcom -explicit -93 "../src/gray_counter.vhd" -vcom -explicit -93 "../src/tb_gray_counter.vhd" -vsim -t 1ps -lib work tb_gray_counter -view wave -do {tb_gray_counter.wdo} -view structure -view signals - -run 1us diff --git a/lib/FIFO/sim/tb_gray_counter.wdo b/lib/FIFO/sim/tb_gray_counter.wdo deleted file mode 100644 index dd0c3c2..0000000 --- a/lib/FIFO/sim/tb_gray_counter.wdo +++ /dev/null @@ -1,29 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_gray_counter/rst -add wave -noupdate -format Logic /tb_gray_counter/ce -add wave -noupdate -format Logic /tb_gray_counter/clk -add wave -noupdate -divider -add wave -noupdate -format Literal /tb_gray_counter/bcnt -add wave -noupdate -divider -add wave -noupdate -format Literal /tb_gray_counter/bnxt -add wave -noupdate -divider -add wave -noupdate -format Literal /tb_gray_counter/gcnt -add wave -noupdate -divider -add wave -noupdate -format Literal /tb_gray_counter/gnxt -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {61919 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {915144 ps} {1004467 ps} diff --git a/lib/FIFO/src/.directory_history b/lib/FIFO/src/.directory_history deleted file mode 100644 index d1192e2..0000000 --- a/lib/FIFO/src/.directory_history +++ /dev/null @@ -1,8 +0,0 @@ -VHDL/lib/FIFO/src/async_fifo_ctrl.vhd -VHDL/lib/FIFO/src/fifo_async_ctrl.vhd -VHDL/lib/FIFO/src/fifo_async_ctrl.vhd - -VHDL/lib/FIFO/src/fifo_sync_ctrl.vhd - -VHDL/lib/FIFO/src/sync_fifo_ctrl.vhd -VHDL/lib/FIFO/src/fifo_sync_ctrl.vhd diff --git a/lib/FIFO/src/async_fifo_ctrl.vhd b/lib/FIFO/src/async_fifo_ctrl.vhd deleted file mode 100644 index 17733b6..0000000 --- a/lib/FIFO/src/async_fifo_ctrl.vhd +++ /dev/null @@ -1,248 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -LIBRARY WORK; -USE WORK.FIFO_CTRL_PKG.ALL; - -entity fifo_async_ctrl is - Generic - ( - addr_width : integer := 3; - almost_full_thresh : integer := 6; - almost_empty_thresh : integer := 2 - ); - Port - ( - rst : in STD_LOGIC; - clk_w : in STD_LOGIC; - clk_r : in STD_LOGIC; - winc : in STD_LOGIC; - rinc : in STD_LOGIC; - ptr_w : out unsigned (addr_width-1 downto 0); - ptr_r : out unsigned (addr_width-1 downto 0); - fifo_pre_full : out STD_LOGIC; - fifo_pre_empty : out STD_LOGIC; - fifo_full : out STD_LOGIC; - fifo_empty : out STD_LOGIC; - fifo_afull : out STD_LOGIC; - fifo_aempty : out STD_LOGIC - ); -end fifo_async_ctrl; - -architecture Behavioral of fifo_async_ctrl is - - signal gcnt_w : unsigned (addr_width downto 0); - signal gcnt2_w : unsigned (addr_width downto 0); - signal bcnt2_aw : unsigned (addr_width downto 0); - signal bcnt_w : unsigned (addr_width downto 0); - signal gnxt_w : unsigned (addr_width downto 0); - signal bnxt_w : unsigned (addr_width downto 0); - signal gcnt_r : unsigned (addr_width downto 0); - signal gcnt2_r : unsigned (addr_width downto 0); - signal bcnt2_ar : unsigned (addr_width downto 0); - signal bcnt_r : unsigned (addr_width downto 0); - signal gnxt_r : unsigned (addr_width downto 0); - signal bnxt_r : unsigned (addr_width downto 0); - - signal pre_empty, pre_full : std_logic; - signal full, empty : std_logic; - - -- synthesis translate_off - signal diffw : signed (addr_width downto 0); - signal diffr : signed (addr_width downto 0); - -- synthesis translate_on - -begin - - ptr_w <= bcnt_w(addr_width-1 downto 0); - ptr_r <= bnxt_r(addr_width-1 downto 0); - fifo_full <= full; - fifo_empty <= empty; - fifo_pre_full <= pre_full; - fifo_pre_empty <= pre_empty; - -proc_write_inhibit: - process(rst, clk_w) - begin - if rst = '1' then - full <= '0'; - elsif rising_edge(clk_w) then - full <= pre_full; - end if; - end process; - -proc_read_inhibit: - process(rst, clk_r) - begin - if rst = '1' then - empty <= '1'; - elsif rising_edge(clk_r) then - empty <= pre_empty; - end if; - end process; - -proc_sync_grptr: - process(clk_w) - variable p1, p2 : unsigned (addr_width downto 0); - begin - if rising_edge(clk_w) then - gcnt2_r <= p2; - p2 := p1; - p1 := gcnt_r; - end if; - end process; - -proc_ptr_gwptr: - process(clk_r) - variable p1, p2 : unsigned (addr_width downto 0); - begin - if rising_edge(clk_r) then - gcnt2_w <= p2; - p2 := p1; - p1 := gcnt_w; - end if; - end process; - -proc_status_full: - process(gnxt_w, gcnt2_r) - begin - if (gnxt_w = (not gcnt2_r(gcnt2_r'left downto gcnt2_r'left-1) & gcnt2_r(gcnt2_r'left-2 downto 0))) then - pre_full <= '1'; - else - pre_full <= '0'; - end if; - end process; - -proc_status_empty: - process(gnxt_r, gcnt2_w) - begin - if (gnxt_r = gcnt2_w) then - pre_empty <= '1'; - else - pre_empty <= '0'; - end if; - end process; - -proc_sync_arptr: - process(clk_w) - variable p1, p2 : unsigned (addr_width downto 0); - begin - if rising_edge(clk_w) then - bcnt2_ar <= p2; - p2 := p1; - p1 := bcnt_r; - end if; - end process; - -proc_ptr_awptr: - process(clk_r) - variable p1, p2 : unsigned (addr_width downto 0); - begin - if rising_edge(clk_r) then - bcnt2_aw <= p2; - p2 := p1; - p1 := bcnt_w; - end if; - end process; - -proc_status_almost_full: - process(rst, clk_w) - variable diff : unsigned (addr_width downto 0); - begin - -- synthesis translate_off - diffw <= signed(diff); - -- synthesis translate_on - if rst = '1' then - fifo_afull <= '0'; - diff := (others => '0'); - elsif rising_edge(clk_w) then - if diff >= almost_full_thresh-1 then - fifo_afull <= '1'; - else - fifo_afull <= '0'; - end if; - diff := unsigned(abs(signed(bnxt_w) - signed(bcnt2_ar))); - end if; - end process; - -proc_status_almost_empty: - process(rst, clk_r) - variable diff : unsigned (addr_width downto 0); - begin - -- synthesis translate_off - diffr <= signed(diff); - -- synthesis translate_on - if rst = '1' then - fifo_aempty <= '1'; - diff := (others => '0'); - elsif rising_edge(clk_r) then - if diff <= almost_empty_thresh+1 then - fifo_aempty <= '1'; - else - fifo_aempty <= '0'; - end if; - diff := unsigned(abs(signed(bcnt2_aw) - signed(bnxt_r))); - end if; - end process; - -inst_gray_counter_w : entity work.gray_counter - generic map - ( - width => addr_width+1, - init_value => 0 - ) - port map - ( - rst => rst, - clk => clk_w, - ce => winc, - bcnt => bcnt_w, - bnxt => bnxt_w, - gcnt => gcnt_w, - gnxt => gnxt_w - ); - -inst_gray_counter_r : entity work.gray_counter - generic map - ( - width => addr_width+1, - init_value => 0 - ) - port map - ( - rst => rst, - clk => clk_r, - ce => rinc, - bcnt => bcnt_r, - bnxt => bnxt_r, - gcnt => gcnt_r, - gnxt => gnxt_r - ); - -end Behavioral; - diff --git a/lib/FIFO/src/dpram_1w1r.vhd b/lib/FIFO/src/dpram_1w1r.vhd deleted file mode 100644 index c63153e..0000000 --- a/lib/FIFO/src/dpram_1w1r.vhd +++ /dev/null @@ -1,77 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -entity dpram_1w1r is - Generic ( - addr_width : integer := 3; - data_width : integer := 8 - ); - Port ( - clka : in STD_LOGIC; - clkb : in STD_LOGIC; - en_a : in STD_LOGIC; - en_b : in STD_LOGIC; - we_a : in STD_LOGIC; - addr_a : in unsigned (addr_width-1 downto 0); - addr_b : in unsigned (addr_width-1 downto 0); - din_a : in unsigned (data_width-1 downto 0); - dout_b : out unsigned (data_width-1 downto 0) - ); -end dpram_1w1r; - -architecture Behavioral of dpram_1w1r is - - constant depth : integer := 2**addr_width; - type RAMtype is array (0 to depth-1) of unsigned (data_width-1 downto 0); - signal RAM : RAMtype; - -begin - -process (clka) -begin -if clka'event and clka = '1' then - if en_a = '1' then - if we_a = '1' then - RAM(to_integer(addr_a)) <= din_a; - end if; - end if; -end if; -end process; - -process (clkb) -begin -if clkb'event and clkb = '1' then - if en_b = '1' then - dout_b <= RAM(to_integer(addr_b)); - end if; -end if; -end process; - - -end Behavioral; - diff --git a/lib/FIFO/src/fifo_async.vhd b/lib/FIFO/src/fifo_async.vhd deleted file mode 100644 index cff8591..0000000 --- a/lib/FIFO/src/fifo_async.vhd +++ /dev/null @@ -1,124 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.fifo_ctrl_pkg.all; - -entity fifo_async is - Generic - ( - addr_width : natural := 4; - data_width : natural := 8; - almost_full_thresh : integer := 12; - almost_empty_thresh : integer := 4; - allow_full_writes : boolean := false; - allow_empty_reads : boolean := false; - do_last_read_update : boolean := true - ); - Port - ( - rst : in STD_LOGIC; - clk_w : in STD_LOGIC; - clk_r : in STD_LOGIC; - we : in STD_LOGIC; - re : in STD_LOGIC; - fifo_full : out STD_LOGIC; - fifo_empty : out STD_LOGIC; - fifo_afull : out STD_LOGIC; - fifo_aempty : out STD_LOGIC; - data_w : in unsigned (data_width-1 downto 0); - data_r : out unsigned (data_width-1 downto 0) - ); -end fifo_async; - -architecture Behavioral of fifo_async is - - signal mem_wr_en : STD_LOGIC; - signal mem_rd_en : STD_LOGIC; - signal ptr_w : unsigned (addr_width-1 downto 0); - signal ptr_r : unsigned (addr_width-1 downto 0); - signal full : std_logic; - signal empty : std_logic; - signal pre_full : STD_LOGIC; - signal pre_empty : STD_LOGIC; - signal rinc : std_logic; - -begin - - fifo_full <= full; - fifo_empty <= empty; - - mem_wr_en <= (we and not full) when allow_full_writes = false else we; - rinc <= (re and not empty) when allow_empty_reads = false else re; - mem_rd_en <= not pre_empty when do_last_read_update = false else '1'; - - - inst_fifo_async_ctrl: entity work.fifo_async_ctrl - GENERIC MAP - ( - addr_width => addr_width, - almost_full_thresh => almost_full_thresh, - almost_empty_thresh => almost_empty_thresh - ) - PORT MAP - ( - rst => rst, - clk_w => clk_w, - clk_r => clk_r, - winc => mem_wr_en, - rinc => rinc, - ptr_w => ptr_w, - ptr_r => ptr_r, - fifo_full => full, - fifo_empty => empty, - fifo_pre_full => pre_full, - fifo_pre_empty => pre_empty, - fifo_afull => fifo_afull, - fifo_aempty => fifo_aempty - - ); - -inst_dpram_1w1r: entity work.dpram_1w1r - GENERIC MAP - ( - addr_width => addr_width, - data_width => data_width - ) - PORT MAP( - clka => clk_w, - clkb => clk_r, - en_a => '1', - en_b => mem_rd_en, - we_a => mem_wr_en, - addr_a => ptr_w, - addr_b => ptr_r, - din_a => data_w, - dout_b => data_r - ); - -end Behavioral; - diff --git a/lib/FIFO/src/fifo_ctrl_pkg.vhd b/lib/FIFO/src/fifo_ctrl_pkg.vhd deleted file mode 100644 index 7404fc2..0000000 --- a/lib/FIFO/src/fifo_ctrl_pkg.vhd +++ /dev/null @@ -1,67 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -package fifo_ctrl_pkg is - - -- Constants - -- Types - - -- Functions - function bin2gray(xb : unsigned) return unsigned; - function gray2bin(xg : unsigned) return unsigned; - -end fifo_ctrl_pkg; - -package body fifo_ctrl_pkg is - - function bin2gray(xb : unsigned) return unsigned is - variable xg : unsigned(xb'left downto xb'right); - begin - - xg(xg'left) := xb(xb'left); - for i in 1 to xb'left loop - xg(xg'left-i) := xb(xb'left-i+1) xor xb(xb'left-i); - end loop; - - return xg; - end bin2gray; - - function gray2bin(xg : unsigned) return unsigned is - variable xb : unsigned(xg'left downto xg'right); - begin - - xb(xb'left) := xg(xg'left); - for i in 1 to xg'left loop - xb(xb'left-i) := xb(xb'left-i+1) xor xg(xg'left-i); - end loop; - - return xb; - end gray2bin; - -end fifo_ctrl_pkg; - diff --git a/lib/FIFO/src/fifo_sync.vhd b/lib/FIFO/src/fifo_sync.vhd deleted file mode 100644 index 6be9075..0000000 --- a/lib/FIFO/src/fifo_sync.vhd +++ /dev/null @@ -1,123 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.fifo_ctrl_pkg.all; - -entity fifo_sync is - Generic - ( - addr_width : natural := 4; - data_width : natural := 8; - almost_full_thresh : integer := 12; - almost_empty_thresh : integer := 4; - allow_full_writes : boolean := false; - allow_empty_reads : boolean := false; - do_last_read_update : boolean := true - - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - we : in STD_LOGIC; - re : in STD_LOGIC; - fifo_full : out STD_LOGIC; - fifo_empty : out STD_LOGIC; - fifo_afull : out STD_LOGIC; - fifo_aempty : out STD_LOGIC; - data_w : in unsigned (data_width-1 downto 0); - data_r : out unsigned (data_width-1 downto 0) - ); -end fifo_sync; - -architecture Behavioral of fifo_sync is - - signal mem_wr_en : STD_LOGIC; - signal mem_rd_en : STD_LOGIC; - signal ptr_w : unsigned (addr_width-1 downto 0); - signal ptr_r : unsigned (addr_width-1 downto 0); - signal full : STD_LOGIC; - signal empty : std_logic; - signal pre_full : STD_LOGIC; - signal pre_empty : STD_LOGIC; - signal rinc : std_logic; - -begin - - fifo_full <= full; - fifo_empty <= empty; - - mem_wr_en <= (we and not full) when allow_full_writes = false else we; - rinc <= (re and not empty) when allow_empty_reads = false else re; - mem_rd_en <= not pre_empty when do_last_read_update = false else '1'; - - -inst_fifo_sync_ctrl: entity work.fifo_sync_ctrl - GENERIC MAP - ( - addr_width => addr_width, - almost_full_thresh => almost_full_thresh, - almost_empty_thresh => almost_empty_thresh - ) - PORT MAP - ( - rst => rst, - clk => clk, - winc => mem_wr_en, - rinc => rinc, - ptr_w => ptr_w, - ptr_r => ptr_r, - fifo_full => full, - fifo_empty => empty, - fifo_pre_full => pre_full, - fifo_pre_empty => pre_empty, - fifo_afull => fifo_afull, - fifo_aempty => fifo_aempty - - ); - -inst_dpram_1w1r: entity work.dpram_1w1r - GENERIC MAP - ( - addr_width => addr_width, - data_width => data_width - ) - PORT MAP( - clka => clk, - clkb => clk, - en_a => '1', - en_b => mem_rd_en, - we_a => mem_wr_en, - addr_a => ptr_w, - addr_b => ptr_r, - din_a => data_w, - dout_b => data_r - ); - -end Behavioral; - diff --git a/lib/FIFO/src/fifo_sync_dist.vhd b/lib/FIFO/src/fifo_sync_dist.vhd deleted file mode 100644 index beb89f5..0000000 --- a/lib/FIFO/src/fifo_sync_dist.vhd +++ /dev/null @@ -1,117 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: Dual-ported register file with asynchrous read - --- Copyright (C) 2007 J. Ahrensfeld - --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. - --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. - --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - --- For questions and ideas, please contact the author at jens@jayfield.org - ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.fifo_ctrl_pkg.all; - -entity fifo_sync_dist is - Generic ( - addr_width : natural := 4; - data_width : natural := 8; - almost_full_thresh : integer := 12; - almost_empty_thresh : integer := 4 - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - we : in STD_LOGIC; - re : in STD_LOGIC; - fifo_full : out STD_LOGIC; - fifo_empty : out STD_LOGIC; - fifo_afull : out STD_LOGIC; - fifo_aempty : out STD_LOGIC; - data_w : in unsigned (data_width-1 downto 0); - data_r : out unsigned (data_width-1 downto 0) - ); -end fifo_sync_dist; - -architecture Behavioral of fifo_sync_dist is - - signal mem_wr_en : STD_LOGIC; - signal mem_rd_en : STD_LOGIC; - signal ptr_w : unsigned (addr_width-1 downto 0); - signal ptr_r : unsigned (addr_width-1 downto 0); - signal full : STD_LOGIC; - signal empty : STD_LOGIC; - signal almost_full : STD_LOGIC; - signal almost_empty : STD_LOGIC; - signal pre_full : STD_LOGIC; - signal pre_empty : STD_LOGIC; - -begin - - mem_wr_en <= not full; - mem_rd_en <= not pre_empty; - fifo_full <= full; - fifo_empty <= empty; - fifo_afull <= almost_full; - fifo_aempty <= almost_empty; - - inst_fifo_sync_ctrl: entity work.fifo_sync_ctrl - GENERIC MAP - ( - addr_width => addr_width, - almost_full_thresh => almost_full_thresh, - almost_empty_thresh => almost_empty_thresh - ) - PORT MAP - ( - rst => rst, - clk => clk, - we => we, - re => re, - ptr_w => ptr_w, - ptr_r => ptr_r, - fifo_full => full, - fifo_empty => empty, - fifo_pre_full => pre_full, - fifo_pre_empty => pre_empty, - fifo_afull => almost_full, - fifo_aempty => almost_empty - - ); - - inst_dpram_1w1r: entity work.dpram_1w1r_dist - GENERIC MAP ( - addr_width => addr_width, - data_width => data_width - ) - PORT MAP( - clka => clk, - clkb => clk, - en_a => mem_wr_en, - en_b => mem_rd_en, - we_a => we, - addr_a => ptr_w, - addr_b => ptr_r, - din_a => data_w, - dout_b => data_r - ); - -end Behavioral; - diff --git a/lib/FIFO/src/gray_counter.vhd b/lib/FIFO/src/gray_counter.vhd deleted file mode 100644 index 990f15b..0000000 --- a/lib/FIFO/src/gray_counter.vhd +++ /dev/null @@ -1,84 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -LIBRARY WORK; -USE WORK.FIFO_CTRL_PKG.ALL; - -entity gray_counter is - Generic ( - width : natural := 3; - init_value : natural := 0 - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - ce : in STD_LOGIC; - bcnt : out unsigned (width-1 downto 0); - bnxt : out unsigned (width-1 downto 0); - gcnt : out unsigned (width-1 downto 0); - gnxt : out unsigned (width-1 downto 0) - ); -end gray_counter; - -architecture Behavioral of gray_counter is - - signal cntg : unsigned (width-1 downto 0); - signal cntb : unsigned (width-1 downto 0); - signal nxtb : unsigned (width-1 downto 0); - signal nxtg : unsigned (width-1 downto 0); - -begin - - bnxt <= nxtb; - gnxt <= nxtg; - bcnt <= cntb; - gcnt <= cntg; - - process(rst, clk, ce, cntb, nxtb) - begin - if rst = '1' then - cntb <= to_unsigned(init_value, width); - nxtb <= to_unsigned(init_value, width); - nxtg <= to_unsigned(init_value, width); - cntg <= to_unsigned(init_value, width); - else - if rising_edge(clk) then - cntg <= nxtg; - cntb <= nxtb; - end if; - nxtg <= bin2gray(nxtb); - nxtb <= cntb; - if ce = '1' then - nxtb <= cntb + 1; - end if; - end if; - end process; - -end Behavioral; - diff --git a/lib/FIFO/src/sync_fifo_ctrl.vhd b/lib/FIFO/src/sync_fifo_ctrl.vhd deleted file mode 100644 index a198fa1..0000000 --- a/lib/FIFO/src/sync_fifo_ctrl.vhd +++ /dev/null @@ -1,198 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -entity fifo_sync_ctrl is - Generic - ( - addr_width : integer := 3; - almost_full_thresh : integer := 6; - almost_empty_thresh : integer := 2 - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - winc : in STD_LOGIC; - rinc : in STD_LOGIC; - ptr_w : out unsigned (addr_width-1 downto 0); - ptr_r : out unsigned (addr_width-1 downto 0); - fifo_pre_full : out STD_LOGIC; - fifo_pre_empty : out STD_LOGIC; - fifo_full : out STD_LOGIC; - fifo_empty : out STD_LOGIC; - fifo_afull : out STD_LOGIC; - fifo_aempty : out STD_LOGIC - ); -end fifo_sync_ctrl; - -architecture Behavioral of fifo_sync_ctrl is - - signal pW, pW_cnt, pW_next : unsigned (addr_width-1 downto 0); - signal pR, pR_cnt, pR_next : unsigned (addr_width-1 downto 0); - signal empty, full : std_logic; - signal pre_empty, pre_full : std_logic; - signal was_write : std_logic; - signal diff : unsigned (addr_width downto 0); - -begin - - fifo_full <= full; - fifo_empty <= empty; - fifo_pre_full <= pre_full; - fifo_pre_empty <= pre_empty; - - -proc_diff_gen: - process(rst, clk) - begin - if rst = '1' then - diff <= (others => '0'); - elsif rising_edge(clk) then - if winc = '1' and rinc = '0' then - diff <= diff + 1; - elsif winc = '0' and rinc = '1' then - diff <= diff - 1; - end if; - end if; - end process; - -proc_status_almost_full: - process(rst, clk) - begin - if rst = '1' then - fifo_afull <= '0'; - elsif rising_edge(clk) then - if diff >= almost_full_thresh-1 then - fifo_afull <= '1'; - else - fifo_afull <= '0'; - end if; - end if; - end process; - -proc_status_almost_empty: - process(rst, clk) - begin - if rst = '1' then - fifo_aempty <= '1'; - elsif rising_edge(clk) then - if diff <= almost_empty_thresh+1 then - fifo_aempty <= '1'; - else - fifo_aempty <= '0'; - end if; - end if; - end process; - -proc_full_reg: - process(rst, clk) - begin - if rst = '1' then - full <= '0'; - elsif rising_edge(clk) then - full <= pre_full; - end if; - end process; - -proc_empty_reg: - process(rst, clk) - begin - if rst = '1' then - empty <= '1'; - elsif rising_edge(clk) then - empty <= pre_empty; - end if; - end process; - -proc_status_w: - process(was_write, pW_next, pR_next, pW, pR, winc, rinc) - begin - if (pW_next = pR) and (winc = '1' or was_write = '1') then - pre_full <= '1'; - else - pre_full <= '0'; - end if; - if (pR_next = pW) and (rinc = '1' or was_write = '0') then - pre_empty <= '1'; - else - pre_empty <= '0'; - end if; - end process; - -proc_flag_write: - process(rst, clk) - begin - if rst = '1' then - was_write <= '0'; - elsif rising_edge(clk) then - if winc = '1' then - was_write <= '1'; - elsif rinc = '1' then - was_write <= '0'; - end if; - end if; - end process; - -proc_ptr_w: - process(rst, clk, pW, winc) - begin - if rst = '1' then - pW <= to_unsigned(0, addr_width); - pW_next <= to_unsigned(0, addr_width); - elsif rising_edge(clk) then - if winc = '1' then - pW <= pW_next; - end if; - end if; - pW_next <= pW; - if winc = '1' then - pW_next <= pW + 1; - end if; - ptr_w <= pW; - end process; - -proc_ptr_r: - process(rst, clk, pR_next, pR, rinc) - begin - if rst = '1' then - pR <= to_unsigned(0, addr_width); - pR_next <= to_unsigned(0, addr_width); - elsif rising_edge(clk) then - if rinc = '1' then - pR <= pR_next; - end if; - end if; - pR_next <= pR; - if rinc = '1' then - pR_next <= pR + 1; - end if; - ptr_r <= pR_next; - end process; - -end Behavioral; - diff --git a/lib/FIFO/src/tb_fifo_async.vhd b/lib/FIFO/src/tb_fifo_async.vhd deleted file mode 100644 index c285ec7..0000000 --- a/lib/FIFO/src/tb_fifo_async.vhd +++ /dev/null @@ -1,225 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.MATH_REAL.ALL; -USE IEEE.NUMERIC_STD.ALL; -USE STD.TEXTIO.ALL; - --- LIBRARY WORK; --- USE.YOURLIB.WHATELSE - -ENTITY tb_fifo_async IS -END tb_fifo_async; - -ARCHITECTURE behavior OF tb_fifo_async IS - - --Constants - constant PERIOD_W : time := 10 ns; - constant PERIOD_R : time := 7.5 ns; - constant ADDR_WIDTH : integer := 3; - constant DATA_WIDTH : integer := 8; - - --Inputs - signal rst : STD_LOGIC := '1'; - signal clk_w : STD_LOGIC := '0'; - signal clk_r : STD_LOGIC := '0'; - signal we : STD_LOGIC := '0'; - signal re : STD_LOGIC := '0'; - signal din : unsigned (7 downto 0); - --Outputs - - signal dout : unsigned (7 downto 0); - signal fifo_full : STD_LOGIC; - signal fifo_empty : STD_LOGIC; - signal fifo_almost_full : STD_LOGIC; - signal fifo_almost_empty : STD_LOGIC; - - signal write_en : STD_LOGIC := '0'; - signal read_en : STD_LOGIC := '0'; - - signal ref_r : unsigned (7 downto 0); - -BEGIN - - -- Instantiate the Unit Under Test (UUT) - uut: entity work.fifo_async - GENERIC MAP - ( - addr_width => ADDR_WIDTH, - data_width => DATA_WIDTH, - almost_full_thresh => 6, - almost_empty_thresh => 2, - allow_full_writes => false, - allow_empty_reads => false, - do_last_read_update => false - ) - PORT MAP - ( - rst => rst, - clk_w => clk_w, - clk_r => clk_r, - we => we, - re => re, - data_w => din, - data_r => dout, - fifo_full => fifo_full, - fifo_empty => fifo_empty, - fifo_afull => fifo_almost_full, - fifo_aempty => fifo_almost_empty - - ); - - tb_clk_w : PROCESS - BEGIN - clk_w <= not clk_w; - wait for PERIOD_W/2; - END PROCESS; - - tb_clk_r : PROCESS - BEGIN - clk_r <= not clk_r; - wait for PERIOD_R/2; - END PROCESS; - - tb_write : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 5*PERIOD_W; - rst <= '0'; - wait for 7*PERIOD_W; - write_en <= '1'; - wait for 25*PERIOD_W; - write_en <= '0'; - wait for 7*PERIOD_W; - write_en <= '1'; - wait for 25*PERIOD_W; - write_en <= '0'; - wait for 7*PERIOD_W; - write_en <= '1'; - wait for 1*PERIOD_W; - write_en <= '0'; - wait for 1*PERIOD_W; - write_en <= '1'; - wait for 1*PERIOD_W; - write_en <= '0'; - wait for 3*PERIOD_W; - write_en <= '1'; - wait for 4*PERIOD_W; - write_en <= '0'; - wait for 17*PERIOD_W; - write_en <= '1'; - wait for 55*PERIOD_W; - write_en <= '0'; - wait for 1*PERIOD_W; - write_en <= '1'; - wait for 1*PERIOD_W; - write_en <= '0'; - wait for 3*PERIOD_W; - write_en <= '1'; - wait for 44*PERIOD_W; - write_en <= '0'; - - wait; - - END PROCESS; - - tb_read : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 25*PERIOD_R; - read_en <= '1'; - wait for 25*PERIOD_R; - read_en <= '0'; - wait for 25*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 5*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 5*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 5*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 5*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 5*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 5*PERIOD_R; - read_en <= '1'; - wait for 1*PERIOD_R; - read_en <= '0'; - wait for 7*PERIOD_R; - read_en <= '1'; - wait for 15*PERIOD_R; - read_en <= '0'; - wait; - - END PROCESS; - - we <= write_en; - - tb_w : PROCESS(rst, clk_w) - BEGIN - - if rst = '1' then - din <= (others => '0'); - elsif rising_edge(clk_w) then - if we = '1' and fifo_full = '0' then - din <= din + 1; - end if; - end if; - - END PROCESS; - - re <= read_en; - - tb_r : PROCESS(rst, clk_r) - BEGIN - - if rst = '1' then - ref_r <= (others => '0'); - elsif rising_edge(clk_r) then - if re = '1' and fifo_empty = '0' then - assert ref_r = dout report "FIFO read error!" severity failure; - ref_r <= ref_r + 1; - end if; - end if; - - END PROCESS; - -END behavior; \ No newline at end of file diff --git a/lib/FIFO/src/tb_fifo_sync.vhd b/lib/FIFO/src/tb_fifo_sync.vhd deleted file mode 100644 index c25b260..0000000 --- a/lib/FIFO/src/tb_fifo_sync.vhd +++ /dev/null @@ -1,206 +0,0 @@ -------------------------------------------------------------------------- --- Project: FIFO, generic FIFOs written in VHDL --- Release 1 --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. --- --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. --- --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA --- --- For questions and ideas, please contact the author at jens@jayfield.org --- ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.MATH_REAL.ALL; -USE IEEE.NUMERIC_STD.ALL; -USE STD.TEXTIO.ALL; - --- LIBRARY WORK; --- USE.YOURLIB.WHATELSE - -ENTITY tb_fifo_sync IS -END tb_fifo_sync; - -ARCHITECTURE behavior OF tb_fifo_sync IS - - --Constants - constant PERIOD : time := 10 ns; - constant ADDR_WIDTH : integer := 3; - constant DATA_WIDTH : integer := 8; - - --Inputs - signal rst : STD_LOGIC := '1'; - signal clk : STD_LOGIC := '0'; - signal we : STD_LOGIC := '0'; - signal re : STD_LOGIC := '0'; - signal din : unsigned (7 downto 0); - --Outputs - - signal dout : unsigned (7 downto 0); - signal fifo_full : STD_LOGIC; - signal fifo_empty : STD_LOGIC; - signal fifo_almost_full : STD_LOGIC; - signal fifo_almost_empty : STD_LOGIC; - - signal write_en : STD_LOGIC := '0'; - signal read_en : STD_LOGIC := '0'; - - signal ref_r : unsigned (7 downto 0) := (others => '0'); - -BEGIN - - -- Instantiate the Unit Under Test (UUT) - uut: entity work.fifo_sync - GENERIC MAP - ( - data_width => DATA_WIDTH, - addr_width => ADDR_WIDTH, - almost_full_thresh => 6, - almost_empty_thresh => 2 - ) - PORT MAP - ( - rst => rst, - clk => clk, - we => we, - re => re, - data_w => din, - data_r => dout, - fifo_full => fifo_full, - fifo_empty => fifo_empty, - fifo_afull => fifo_almost_full, - fifo_aempty => fifo_almost_empty - - ); - - tb_clk : PROCESS - BEGIN - clk <= not clk; - wait for PERIOD/2; - END PROCESS; - - tb_write : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 5*PERIOD; - rst <= '0'; - wait for 7*PERIOD; - write_en <= '1'; - wait for 25*PERIOD; - write_en <= '0'; - wait for 7*PERIOD; - write_en <= '1'; - wait for 25*PERIOD; - write_en <= '0'; - wait for 7*PERIOD; - write_en <= '1'; - wait for 1*PERIOD; - write_en <= '0'; - wait for 1*PERIOD; - write_en <= '1'; - wait for 1*PERIOD; - write_en <= '0'; - wait for 3*PERIOD; - write_en <= '1'; - wait for 4*PERIOD; - write_en <= '0'; - wait for 17*PERIOD; - write_en <= '1'; - wait for 25*PERIOD; - write_en <= '0'; - - wait; - - END PROCESS; - - tb_read : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 25*PERIOD; - read_en <= '1'; - wait for 25*PERIOD; - read_en <= '0'; - wait for 25*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 5*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 5*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 5*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 5*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 5*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 5*PERIOD; - read_en <= '1'; - wait for 1*PERIOD; - read_en <= '0'; - wait for 7*PERIOD; - read_en <= '1'; - wait for 20*PERIOD; - read_en <= '0'; - - wait; - - END PROCESS; - - we <= write_en and not fifo_full; - - tb_w : PROCESS(rst, clk) - BEGIN - - if rst = '1' then - din <= (others => '0'); - elsif rising_edge(clk) then - if we = '1' then - din <= din + 1; - end if; - end if; - - END PROCESS; - - re <= read_en and not fifo_empty; - - tb_r : PROCESS(rst, clk) - BEGIN - - if rst = '1' then - ref_r <= (others => '0'); - elsif rising_edge(clk) then - if re = '1' then - assert ref_r = dout report "FIFO read error!" severity failure; - ref_r <= ref_r + 1; - end if; - end if; - - END PROCESS; - -END behavior; \ No newline at end of file diff --git a/lib/FIFO/src/tb_gray_counter.vhd b/lib/FIFO/src/tb_gray_counter.vhd deleted file mode 100644 index 1fd241d..0000000 --- a/lib/FIFO/src/tb_gray_counter.vhd +++ /dev/null @@ -1,85 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 17:16:42 13.05.2007 --- Design Name: tb_gray_counter --- Module Name: tb_gray_counter.vhd --- Project Name: gray_counter package --- Target Device: --- Tool versions: --- Description: --- ------------------------------------------------------------------------ --- $Header: /tmp/cvsroot/VHDL/lib/FIFO/src/tb_gray_counter.vhd,v 1.2 2010-02-13 10:50:47 Jens Exp $ ------------------------------------------------------------------------ -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.MATH_REAL.ALL; -USE IEEE.NUMERIC_STD.ALL; -USE STD.TEXTIO.ALL; - -LIBRARY WORK; -USE WORK.FIFO_CTRL_PKG.ALL; - -ENTITY tb_gray_counter IS -END tb_gray_counter; - -ARCHITECTURE behavior OF tb_gray_counter IS - - constant PERIOD : time := 10 ns; - constant WIDTH : integer := 3; - - --Signals - signal gcnt : unsigned (WIDTH-1 downto 0) := to_unsigned(0, WIDTH); - signal bcnt : unsigned (WIDTH-1 downto 0) := to_unsigned(0, WIDTH); - signal gnxt : unsigned (WIDTH-1 downto 0) := to_unsigned(0, WIDTH); - signal bnxt : unsigned (WIDTH-1 downto 0) := to_unsigned(0, WIDTH); - signal rst : STD_LOGIC := '1'; - signal clk : STD_LOGIC := '0'; - signal ce : STD_LOGIC := '0'; - -BEGIN - -inst_gray_counter : entity work.gray_counter - generic map (width => WIDTH) - port map ( - rst => rst, - clk => clk, - ce => ce, - bcnt => bcnt, - bnxt => bnxt, - gcnt => gcnt, - gnxt => gnxt - ); - - tb_clk : PROCESS - BEGIN - clk <= not clk; - wait for PERIOD/2; - END PROCESS; - - tb_counter : PROCESS - - BEGIN - - wait for 4*PERIOD; - rst <= '0'; - wait until rising_edge(clk); - ce <= '1'; - wait for 2*PERIOD; - wait until rising_edge(clk); - ce <= '0'; - wait for 3*PERIOD; - wait until rising_edge(clk); - ce <= '1'; - wait until rising_edge(clk); - ce <= '0'; - wait until rising_edge(clk); - ce <= '1'; - - wait; - - END PROCESS; - -END behavior; \ No newline at end of file diff --git a/lib/PCK_FIO-1.16/PCK_FIO.html b/lib/PCK_FIO-1.16/PCK_FIO.html deleted file mode 100644 index 8b8c8c5..0000000 --- a/lib/PCK_FIO-1.16/PCK_FIO.html +++ /dev/null @@ -1,297 +0,0 @@ - - - - - - VHDL package for formatted file output - - - - -

-

-Name

-PCK_FIO - VHDL package for  formatted file output -

-

-

-Contents

-Usage -
The file output function 'fo' -
Format specifiers -
Special characters -
Things to watch out for -
Methodology notes -
Parametrization -
Test bench -
Known limitations and problems -
Author -

-

-

-Usage

-PCK_FIO is a VHDL package that defines  fprint, a function -for formatted file output. -

After installing the package you can call fprint as follows: -

  fprint(F, L, Format, fo(Expr_1), fo(Expr_2), ... fo(Expr_n));
-where F is the filehandle and L is the line variable. -

The argument Format is the format string, which consists of ``normal'' -substrings which are copied verbatim, and format specifiers, starting with -'%'. -A typical format string looks as follows: -

   "Arg1 = %6r, Arg2 = %10d, Arg3 = %-5r\n"
-The remaining arguments are the expressions whose results you want to write -to the file, embedded in fo function calls. There can be 0 to -32 of such arguments. The expressions can be of any type for which an fo -function exists. String expressions can also be called directly. -

-

-

-The file output function 'fo'

-The fo (file output) functions do the trick. They -return a tagged string representation that is meaningful to format specifiers. -Here are some examples: -
  fo (signed'("1100"))   returns "S:1100" 
-  fo (unsigned'("1100")) returns "U:1100" 
-  fo (TRUE)              returns "L:T"
-  fo (127)               returns "I:127"
-The internal behavior of fo is irrelevant to the typical user. -

The fo function is currently overloaded as follows: -

  function fo (Arg: unsigned)          return string;
-  function fo (Arg: signed)            return string;
-  function fo (Arg: std_logic_vector)  return string;
-  function fo (Arg: std_ulogic_vector) return string;
-  function fo (Arg: bit_vector)        return string;
-  function fo (Arg: integer)           return string;
-  function fo (Arg: std_ulogic)        return string;
-  function fo (Arg: bit)               return string;
-  function fo (Arg: boolean)           return string; 
-  function fo (Arg: character)         return string;
-  function fo (Arg: string)            return string;
-  function fo (Arg: time)              return string;
- -
-
- -

-Format specifiers

-The general format of a format specifier is: -
   %[-][n]c
-The optional - sign specifies left justified output; default is -right justified. -

The optional number n specifies a field-width. If it is not specified, -fprint -does something reasonable. -

c is the conversion specifier. Currently the following conversion -specifiers are supported: -

-
-r
- -
-reasonable output format (inspired by Synopsys VSS)
- -
Prints the ``most reasonable'' representation e.g. hex for -unsigned, signed and other bit-like vectors (not preferred for integers)
- -
-b
- -
-bit-oriented output
- -
-d
- -
-decimal output
- -
-s
- -
-string output (e.g. in combination with 'IMAGE for enum types)
- -
-q
- -
-``qualified'' string output (shows internal representation from fo)
- -
-{}
- -
-Iteration operator, used as follows:
- -
-%n{<format-string>}
- -
In this case, n is the iteration count and is mandatory. Iteration -can be nested.
- -
-

-Special characters

-To print a double-quote,  use '""' in the format string (VHDL -convention). To print the special characters, '\', and '%', -escape them with '\'. To prevent '{' and '}' -from being interpreted as opening and closing brackets in iteration strings, -escape them with '\'. -

A newline is specified in the format string by '\n'. -

-

-

-Things to notice

-The fprint function expands into VHDL write and writeline -commands. As in plain VHDL, nothing will be written to the output file -until a writeline is given. Therefore, don't forget to include -'\n' -commands in the format string, or it ``will not work''. -

The preferred format specifier for integers is, naturally, %d. -This calls the VHDL write for integers. If you specify a field -width that is too small, the field will automatically be expanded. If you -use %r for integers, the field is not expanded automatically, which -means that some digits are simply thrown away. This may sometimes be useful -but it is also dangerous. Look at the test bench output for differences -between %d and %r output. -

When using the %d format specifier, the VHDL constraints for -the allowed integer range apply. -

In VHDL, signed/unsigned types have been standardized only relatively -recently, in the package IEEE.numeric_std. The lack of a standard -has caused (and is causing) portability issues. The most popular non-standard -package that defines signed/unsigned is IEEE.std_logic_arith from -Synopsys. PCK_FIO has been developed with this latter package, and still -refers to this package by default. However, PCK_FIO  works with -IEEE.numeric_std -as well. To use IEEE.numeric_std, replace the reference to IEEE.std_logic_arith -in the source code.  This needs to be done consistently in a design -database (e.g. in the PCK_FIO test bench as well). -

-

-

-Methodology notes

-The obvious application for fprint is in test benches, to produce -output files that trace the simulation behavior. -

Another interesting application for fprint is to produce info, -warning and error messages in your models. As it can take arguments, fprint -is much better suited for this task than VHDL's assert or report -statements. Actually fprint produces its own (few) warning messages. -

An advanced usage is the generation of test vectors in a specific format. -Instead of using the fo functions, you can write your own set -of functions that return the symbols of a specific test format in a way -that is understandable to the fprint format specifiers. As an -example, when a high output value should be represented using the symbol -'H' it suffices to write a conversion function that returns "B:H" and call -it in combination with the %b format specifier. -

-

-

-Parametrization

-Prefix and postfix strings for bit-oriented and hex-oriented output are -parameterizable in the packages to accommodate different output styles. -The settings in the distribution are such that hex output is indicated -by the prefix '0x', while  bit output prefix and postfix are empty -strings. -

You can adapt the output style by modifying the following constants -in the package header: -

   -- prefix string for hex output -
  -- VHDL style:    "X""" -
  -- Verilog style: "h'" -
  -- C style:       "0x" -
  constant FIO_h_PRE:  string := "0x"; -

  -- postfix string for hex output -
  -- VHDL style:    """" -
  constant FIO_h_POST: string := ""; -

  -- prefix string for bit vector output -
  -- VHDL style:    "B""" -
  -- Verilog style: "b'" -
  constant FIO_bv_PRE:  string := ""; -

  -- postfix string for bit vector output -
  -- VHDL style:    """" -
  constant FIO_bv_POST: string := ""; -

  -- prefix string for bit output -
  -- VHDL style:    "'" -
  -- Verilog style: "b'" -
  constant FIO_b_PRE:  string := ""; -

  -- postfix string for bit output -
  -- VHDL style:    "'" -
  constant FIO_b_POST: string := ""; -

-

-

-Test bench

-Included in the distribution is a file TB_PCK_FIO.vhd with a test -bench for the PCK_FIO package. The file PCK_FIO.out.gold contains -the expected output. If you run the test bench it should produce the file -PCK_FIO.out -that should be identical to PCK_FIO.out.gold. The source files -should be analyzed in a VHDL library EASICS_PACKAGES. -

A good way to understand fprint is to inspect the test bench -and what it produces. -

-

-

-Known limitations and problems

-This VHDL package is an implementation of a flexible concept. It is likely -to be extended and modified in the future. Backward compatibility is not -guaranteed. Therefore, it is not recommended to give this package the status -of a company-wide standard package (or even worse, a VHDL standard package). -Rather, it should be linked with a particular project (and it can be regarded -as a standard package within that project). -

PCK_FIO is written in standard VHDL Std1076-1987. Nevertheless, some -simulators/versions have problems with the package. The following is an -overview of currently known issues: -
  -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
SimulatorPCK_FIO handling
Synopsys VSS 3.5 and earlierIncorrect (all zero) output in compiled mode
Synopsys VSS 97.01OK
Mentor quickhdlOK
Modeltech modelsimOK
Cadence LeapfrogShould work with 4.4.1 -
Mysterious problems have been reported - please run the test bench -and report problems
PCK_FIO and various simulators/versions
- -

Although the package name suggests file IO, it only does file output. -

-

-

-Author

-Jan Decaluwe -

-

- - diff --git a/lib/PCK_FIO-1.16/PCK_FIO.out.gold b/lib/PCK_FIO-1.16/PCK_FIO.out.gold deleted file mode 100644 index dcd183e..0000000 --- a/lib/PCK_FIO-1.16/PCK_FIO.out.gold +++ /dev/null @@ -1,206 +0,0 @@ -PCK_FIO.out: TESTBENCH OUTPUT FOR PCK_FIO ------------------------------------------ - -This is the result of running the PCK_FIO testbench. -This file should be compared with PCK_FIO.out.gold, which is -the reference output. Any difference indicates a portability -issue or a simulator non-compliance or bug. - - --------------------- --- Basic features -- --------------------- - --- First some auxiliary declarations -> file RESULT: text is out "PCK_FIO.out"; -> variable L: line; -> variable BoolTrue: boolean := TRUE; -> variable BoolFalse: boolean := FALSE; -> variable IntPos: integer := 5678; -> variable BigIntPos: integer := 12345678; -> variable IntNeg: integer := -8765; -> variable BigIntNeg: integer := -87654321; -> variable Uns: unsigned(6 downto 0) := unsigned'("1010010"); -> variable Unk: unsigned(6 downto 0) := unsigned'("1X10Z10"); -> variable Std: std_logic_vector(6 downto 0) := std_logic_vector'("0010010"); -> variable SigPos: signed(6 downto 0) := signed'("0010010"); -> variable SigNeg: signed(6 downto 0) := signed'("1010010"); -> variable BitX: std_logic := 'X'; -> variable Bit1: std_logic := '1'; -> variable Bit0: std_logic := '0'; - - --- fprint call with no arguments -> fprint(RESULT, L, "No arguments.\n);" -No arguments. - --- Special characters need to be escaped -> fprint(RESULT, L, "Special characters: \% \\ " \n"); -Special characters: % \ " - --- Various format specifiers interprete the same object differently -> fprint(RESULT, L, "Format specifiers: %r %d %b %q\n);" -> fo(Uns), fo(Uns), fo(Uns), fo(Uns) -> ); -Format specifiers: 0x52 82 1010010 U:1010010 - --- Format string can be shortened by using the iteration specifier -> fprint(RESULT, L, "Iteration specifier: %4{%r }\n);" -> fo(Uns), fo(SigPos), fo(SigNeg), fo(Std) -> ); -Iteration specifier: 0x52 0x12 0x52 0x12 - ------------------------------------- --- Support for bit-oriented types -- ------------------------------------- - --- Reasonable format -> fprint(RESULT, L, "Reasonable format: %9{%r }\n", -> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), -> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) -> ); -Reasonable format: 0x12 0x52 0x12 0x52 0x?? 1 X T F - --- Decimal format -> fprint(RESULT, L, "Decimal format: %7{%d }\n", -> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), -> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) -> ); -Decimal format: 18 82 18 -46 -1 1 -1 1 0 - --- Bit format -> fprint(RESULT, L, "Bit format: %7{%b }\n", -> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), -> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) -> ); -Bit format: 0010010 1010010 0010010 1010010 1X10Z10 1 X 1 0 - - --- Alignment --- Template of the call: ( stands for the format specifier) - -> fprint(RESULT, L, "Bitvectors with : %4{|}\n", -> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg) -> ); - --- Results of the call with various format specifiers - -Bitvectors with %1r: 0x52|0x12|0x12|0x52| -Bitvectors with %2r: 0x52|0x12|0x12|0x52| -Bitvectors with %3r: 0x52|0x12|0x12|0x52| -Bitvectors with %4r: 0x52|0x12|0x12|0x52| -Bitvectors with %5r: 0x52| 0x12| 0x12| 0x52| -Bitvectors with %6r: 0x52| 0x12| 0x12| 0x52| -Bitvectors with %7r: 0x52| 0x12| 0x12| 0x52| -Bitvectors with %8r: 0x52| 0x12| 0x12| 0x52| -Bitvectors with %9r: 0x52| 0x12| 0x12| 0x52| - -Bitvectors with %-1r: 0x52|0x12|0x12|0x52| -Bitvectors with %-2r: 0x52|0x12|0x12|0x52| -Bitvectors with %-3r: 0x52|0x12|0x12|0x52| -Bitvectors with %-4r: 0x52|0x12|0x12|0x52| -Bitvectors with %-5r: 0x52 |0x12 |0x12 |0x52 | -Bitvectors with %-6r: 0x52 |0x12 |0x12 |0x52 | -Bitvectors with %-7r: 0x52 |0x12 |0x12 |0x52 | -Bitvectors with %-8r: 0x52 |0x12 |0x12 |0x52 | -Bitvectors with %-9r: 0x52 |0x12 |0x12 |0x52 | - -Bitvectors with %1d: 82|18|18|-46| -Bitvectors with %2d: 82|18|18|-46| -Bitvectors with %3d: 82| 18| 18|-46| -Bitvectors with %4d: 82| 18| 18| -46| -Bitvectors with %5d: 82| 18| 18| -46| -Bitvectors with %6d: 82| 18| 18| -46| -Bitvectors with %7d: 82| 18| 18| -46| -Bitvectors with %8d: 82| 18| 18| -46| -Bitvectors with %9d: 82| 18| 18| -46| - -Bitvectors with %-1d: 82|18|18|-46| -Bitvectors with %-2d: 82|18|18|-46| -Bitvectors with %-3d: 82 |18 |18 |-46| -Bitvectors with %-4d: 82 |18 |18 |-46 | -Bitvectors with %-5d: 82 |18 |18 |-46 | -Bitvectors with %-6d: 82 |18 |18 |-46 | -Bitvectors with %-7d: 82 |18 |18 |-46 | -Bitvectors with %-8d: 82 |18 |18 |-46 | -Bitvectors with %-9d: 82 |18 |18 |-46 | - - -------------------------------- --- Support for integer types -- -------------------------------- - - --- Template of the call: ( stands for the format specifier) - -> fprint(RESULT, L, "Integers with : %4{|}\n", -> fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) -> ); - --- Results of the call with various format specifiers - -Integers with %5d: 5678|-8765|12345678|-87654321| -Integers with %6d: 5678| -8765|12345678|-87654321| -Integers with %7d: 5678| -8765|12345678|-87654321| -Integers with %8d: 5678| -8765|12345678|-87654321| -Integers with %9d: 5678| -8765| 12345678|-87654321| -Integers with %10d: 5678| -8765| 12345678| -87654321| - -Integers with %-5d: 5678 |-8765|12345678|-87654321| -Integers with %-6d: 5678 |-8765 |12345678|-87654321| -Integers with %-7d: 5678 |-8765 |12345678|-87654321| -Integers with %-8d: 5678 |-8765 |12345678|-87654321| -Integers with %-9d: 5678 |-8765 |12345678 |-87654321| -Integers with %-10d: 5678 |-8765 |12345678 |-87654321 | - -Integers with %5r: 5678|-8765| 5678|-4321| -Integers with %6r: 5678|- 8765| 45678|-54321| -Integers with %7r: 5678|- 8765| 345678|-654321| -Integers with %8r: 5678|- 8765| 2345678|-7654321| -Integers with %9r: 5678|- 8765| 12345678|-87654321| -Integers with %10r: 5678|- 8765| 12345678|- 87654321| - -Integers with %-5r: 5678|-8765| 1234|-8765| -Integers with %-6r: 5678 |-8765 | 12345|-87654| -Integers with %-7r: 5678 |-8765 | 123456|-876543| -Integers with %-8r: 5678 |-8765 | 1234567|-8765432| -Integers with %-9r: 5678 |-8765 | 12345678|-87654321| -Integers with %-10r: 5678 |-8765 | 12345678 |-87654321 | - - ----------------------- --- Support for time -- ----------------------- --- For portability reasons, time is converted --- into an integer value (of nanoseconds) -> wait for 648 ns -> fprint (RESULT, L, "The time is now %d ns\n", fo(now)); -The time is now 648 ns - ----------------------------------------- --- Erroneous calls and error messages -- ----------------------------------------- - --- Less arguments than formats specifiers -> fprint(RESULT, L, "%d %d %d %d \n", fo(Uns), fo(Std)); -82 18 -** Warning: FIO_PrintLastValue: Format specifier beyond last argument -** in format string: "%d %d %d %d \n" -** ------^ - --- Unsupported format specifier -> fprint(RESULT, L, "%r %v %r %r\n", fo(Uns), fo(Std), fo(Uns), fo(Std)); -0x52 -** Warning: FIO_PrintArg: Unexpected format specifier 'v' -** in format string: "%r %v %r %r\n" -** ----^ -** Assuming 'q' to proceed: V:0010010 0x52 0x12 - - ----------------------------------------- --- Things you wouldn't expect to work -- ----------------------------------------- - --- Nested iteration -> fprint(RESULT, L, "%3{<<%3{_END_}>>}\n"); -<<_END__END__END_>><<_END__END__END_>><<_END__END__END_>> diff --git a/lib/PCK_FIO-1.16/PCK_FIO.vhd b/lib/PCK_FIO-1.16/PCK_FIO.vhd deleted file mode 100644 index e635721..0000000 --- a/lib/PCK_FIO-1.16/PCK_FIO.vhd +++ /dev/null @@ -1,919 +0,0 @@ ----- File: PCK_FIO.vhd ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 1999 Easics NV ----- ----- This program is free software; you can redistribute it and/or modify ----- it under the terms of the GNU General Public License as published by ----- the Free Software Foundation; either version 1, or (at your option) ----- any later version. ----- ----- This program is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ----- GNU General Public License for more details. ----- ----- You should have received a copy of the GNU General Public License ----- along with this program; if not, write to the Free Software ----- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- ----- ----- Revision history: ----- ----- $Source: /tmp/cvsroot/VHDL/lib/PCK_FIO-1.16/PCK_FIO.vhd,v $ ----- $Revision: 1.2 $ ----- $Log: not supported by cvs2svn $ ----- Revision 1.1 2008/08/23 08:20:28 Jens ----- Initial import ----- ----- Revision 1.16 1999/04/21 08:28:46 jand ----- Tested with IEEE.numeric_std ----- Small patch for Leapfrog ----- ----- Revision 1.14 1997/07/14 10:16:04 jand ----- prefix/postfix for bits/bitvectors set to empty strings by default ----- ----- Revision 1.13 1997/07/11 17:42:57 jand ----- Corrected Easics address ----- ----- Revision 1.12 1997/07/11 17:38:49 jand ----- Improved prefix/postfix support ----- ----- Revision 1.11 1995/11/15 13:46:02 jand ----- Catched integer'low value in fo for integers ----- ----- Revision 1.10 1995/08/11 16:42:26 jand ----- Reimplemented FIO_FormatExpand as a procedure in an attempt to ----- avoid memory leakage problems in VSS ----- ----- Revision 1.9 1995/08/09 13:47:51 jand ----- Removed array of line trick in fprint for less memory, less ----- CPU time, and more conservatism in general ----- Rearranged FIO_PrintValue call so that fprint remains concise ----- ----- Revision 1.8 1995/08/09 10:32:27 jand ----- Removed fprint_flat to have a single call level ----- Added explicit deallocators of line variables (has strong influence ----- on memory usage in VSS - and possibly CPU time) ----- Redefined 'fo' for type time to make it more portable ----- ----- Revision 1.7 1995/08/07 08:56:04 jand ----- Improved conciseness of fprint argument handling through array of line type ----- ----- Revision 1.6 1995/08/04 18:19:13 jand ----- Increase # arguments from 16 to 32 ----- Corrected bug within fprint 's call to Arg16 ----- Added support for bit format specifier 'b' ----- ----- Revision 1.5 1995/08/02 10:22:37 jand ----- Release 1.1 under GNU ----- ----- Revision 1.4 1995/08/01 11:15:52 jand ----- Added escaping during iteration string read ----- ----- Revision 1.3 1995/08/01 08:23:47 jand ----- Many improvements in robustness, conciseness and coding style ----- ----- Revision 1.2 1995/07/30 16:15:43 jand ----- Improved robustness for release to the world ----- ----- Revision 1.1 1995/07/30 14:21:30 jand ----- Initial revision ----- - -use STD.TEXTIO.all; - -library IEEE; -use IEEE.std_logic_1164.all; --- signed/unsigned definition: use either std_logic_arith or numeric_std -use IEEE.std_logic_arith.all; -- the Synopsys one --- use IEEE.numeric_std.all; - -package PCK_FIO is - - -- prefix string for hex output - -- VHDL style: "X""" - -- Verilog style: "h'" - -- C style: "0x" - constant FIO_h_PRE: string := ""; - - -- postfix string for hex output - -- VHDL style: """" - constant FIO_h_POST: string := ""; - - -- prefix string for bit vector output - -- VHDL style: "B""" - -- Verilog style: "b'" - constant FIO_bv_PRE: string := ""; - - -- postfix string for bit vector output - -- VHDL style: """" - constant FIO_bv_POST: string := ""; - - -- prefix string for bit output - -- VHDL style: "'" - -- Verilog style: "b'" - constant FIO_b_PRE: string := ""; - - -- postfix string for bit output - -- VHDL style: "'" - constant FIO_b_POST: string := ""; - - -- digit width for the string representation of integers - constant FIO_d_WIDTH: integer := 10; - - -- bit width for the string representation of integers - constant FIO_b_WIDTH: integer := 32; - - -- definition of the NIL string (default value for fprint arguments) - -- fprint stops consuming arguments at the first NIL argument - constant FIO_NIL: string := "\"; - - procedure fprint - (F: out text; - L: inout line; - Format: in string; - A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL; - A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL; - A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL; - A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL - ); - - function fo (Arg: unsigned) return string; - function fo (Arg: signed) return string; - function fo (Arg: std_logic_vector) return string; - function fo (Arg: std_ulogic_vector) return string; - function fo (Arg: bit_vector) return string; - function fo (Arg: integer) return string; - function fo (Arg: std_ulogic) return string; - function fo (Arg: bit) return string; - function fo (Arg: boolean) return string; - function fo (Arg: character) return string; - function fo (Arg: string) return string; - function fo (Arg: time) return string; - - procedure FIO_FormatExpand (FMT: inout line; - Format: in string; - StartPointer: in positive); - -end PCK_FIO; - - -package body PCK_FIO is - - - -------------------------- - -- FIO Warnings support -- - -------------------------- - - procedure FIO_Warning_Fsbla (F: out text; - L: inout line; - Format: in string; - Pointer: in positive) is - begin - fprint (F, L, "\n** Warning: FIO_PrintLastValue: " & - "Format specifier beyond last argument\n"); - fprint (F, L, "** in format string: ""%s""\n", Format); - fprint (F, L, "** "); - for i in 1 to Pointer-1 loop - fprint (F, L, "-"); - end loop; - fprint (F, L, "^\n"); - end FIO_Warning_Fsbla; - - procedure FIO_Warning_Ufs (F: out text; - L: inout line; - Format: in string; - Pointer: in positive; - Char: in character) is - begin - fprint (F, L, "\n** Warning: FIO_PrintArg: " & - "Unexpected format specifier '%r'\n", - fo(Char)); - fprint (F, L, "** in format string: ""%s""\n", Format) ; - fprint (F, L, "** "); - for i in 1 to Pointer-1 loop - fprint (F, L, "-"); - end loop; - fprint (F, L, "^\n** Assuming 'q' to proceed: "); - end FIO_Warning_Ufs; - - - ---------------------------------- - -- bit conversion support -- - ---------------------------------- - - type T_bit_map is array(bit) of character; - - constant C_BIT_MAP: T_bit_map - := ('0', '1'); - - ---------------------------------- - -- std_logic conversion support -- - ---------------------------------- - - type T_std_logic_map is array(std_ulogic) of character; - - constant C_STD_LOGIC_MAP: T_std_logic_map - := ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-'); - - ------------------------------ - -- Digit conversion support -- - ------------------------------ - - -- types & constants - - subtype S_digit_chars is character range '0' to '9'; - subtype S_digits is integer range 0 to 9 ; - - type T_digit_chars_map is array(S_digit_chars) of S_digits; - - constant C_DIGIT_CHARS_MAP: T_digit_chars_map - := (0, 1, 2, 3, 4, 5, 6, 7, 8, 9); - - type T_digits_map is array(S_digits) of S_digit_chars; - - constant C_DIGITS_MAP: T_digits_map - := ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9'); - - - -------------------------------- - -- Decimal conversion support -- - -------------------------------- - - function U_To_d (Arg: string) return integer is - constant Argument: string(Arg'length downto 1) := Arg; - variable Result: integer := 0; - begin - for i in Argument'range loop - case Argument(i) is when '1' => Result := 2**(i-1) + Result; - when '0' => null; - when others => return(-1); - end case; - end loop; - return (Result); - end U_To_d; - - function S_To_d (Arg: string) return integer is - constant Argument: string(Arg'length downto 1) := Arg; - variable Result: integer := 0; - begin - case Argument(Argument'left) is - when '1' => Result := - 2**(Argument'left-1); - when '0' => Result := 0; - when others => return (integer'low); - end case; - for i in Argument'left-1 downto 1 loop - case Argument(i) is when '1' => Result := 2**(i-1) + Result; - when '0' => null; - when others => return(integer'low); - end case; - end loop; - return (Result); - end S_To_d; - - function I_To_d (Arg: string(1 to FIO_d_WIDTH+1)) return integer is - constant Sign: character := Arg(1); - constant Value: string(Arg'length-1 downto 1) := Arg(2 to Arg'length); - variable Char: character; - variable Result: integer := 0; - begin - Result := 0; - for i in Value'range loop - Result := Result * 10; - Char := Value(i); - if (Char /= ' ') then - Result := Result + C_DIGIT_CHARS_MAP(Char); - end if; - end loop; - case Sign is when '-' => return(-Result); - when others => return(Result); - end case; - end I_To_d; - - function B_To_d (Arg: string(1 to 1)) return integer is - begin - case Arg is when "1" => return(1); - when "0" => return(0); - when others => return(-1); - end case; - end B_To_d; - - function L_To_d (Arg: string(1 to 1)) return integer is - begin - case Arg is when "T" => return(1); - when others => return(0); - end case; - end L_To_d; - - - - ---------------------------- - -- Hex conversion support -- - ---------------------------- - - -- Constants & types - - constant C_HEX_CHARS: string(1 to 17) := "0123456789ABCDEF?"; - - -- Function to return Hex index of a nibble - - function U_To_h_Index(Arg: string(4 downto 1)) return integer is - variable Index: integer := 0; - begin - for i in Arg'range loop - case Arg(i) is when '1' => Index := 2**(i-1) + Index; - when '0' => null; - when others => return (17); - end case; - end loop; - return (Index+1); - end U_To_h_Index; - - -- Hex conversion - - function U_To_h (Arg: string) return string is - variable Result: string((Arg'length-1)/4 +1 downto 1); - variable ExtArg: string(Result'length*4 downto 1) := (others => '0'); - begin - ExtArg(Arg'length downto 1) := Arg; - for i in Result'range loop - Result(i) := C_HEX_CHARS(U_To_h_Index( ExtArg(i*4 downto i*4 -3) )); - end loop; - return (FIO_h_PRE & Result & FIO_h_POST); - end U_To_h; - - - - ---------------------------- - -- Bit conversion support -- - ---------------------------- - - function L_To_b (Arg: string(1 to 1)) return string is - variable Result: string(1 to 1); - begin - case Arg is when "T" => Result := "1"; - when others => Result := "0"; - end case; - return(FIO_b_PRE & Result & FIO_b_POST); - end L_To_b; - - - function I_To_b (Arg: string(1 to FIO_d_WIDTH+1); - Justified: side; - Width: integer) return string is - - variable IntValue: integer := I_To_d(Arg); - variable BitValue: string(1 to FIO_b_WIDTH) := (others => ' '); - variable Sign: character := ' '; - constant Blanks: string(1 to FIO_b_WIDTH) := (others => ' '); - variable BitWidth: integer range 0 to FIO_b_WIDTH; - variable MsPos: integer range 1 to BitValue'length; - variable BitValueExtended: string(1 to 2*FIO_b_WIDTH); - - begin - - if (IntValue < 0) then - Sign := '-'; - IntValue := -IntValue; - end if; - - for i in BitValue'reverse_range loop - BitValue(i) := C_DIGITS_MAP(IntValue mod 2); - IntValue := IntValue / 2; - exit when (IntValue = 0); - end loop; - - BitValueExtended := BitValue & Blanks; - - if (Width = 0) or (Width > FIO_b_WIDTH+1) then - BitWidth := FIO_b_WIDTH; - else - BitWidth := Width-1; - end if; - - if (Justified = RIGHT) then - return (FIO_bv_PRE & - Sign & BitValue(BitValue'length-BitWidth+1 to BitValue'length) & - FIO_bv_POST); - else - for i in BitValue'range loop - if BitValue(i) /= ' ' then - MSPos := i; - exit; - end if; - end loop; - return (FIO_bv_PRE & - Sign & BitValueExtended(MSPos to MSPos+BitWidth-1) & - FIO_bv_POST); - end if; - - end I_To_b; - - - ----------------------------------- - -- Reasonable conversion support -- - ----------------------------------- - - function I_To_r (Arg: string(1 to FIO_d_WIDTH+1); - Justified: side; - Width: integer) return string is - constant Value: string(1 to FIO_d_WIDTH) := Arg(2 to FIO_d_WIDTH+1); - constant Sign: character := Arg(1); - constant Blanks: string(1 to FIO_d_WIDTH) := (others => ' '); - variable IntWidth: integer range 0 to FIO_d_WIDTH; - variable MsPos: integer range 1 to Value'length; - variable ValueExtended: string(1 to 2*FIO_d_WIDTH) := Value & Blanks; - begin - if (Width = 0) or (Width > FIO_d_WIDTH+1) then - IntWidth := FIO_d_WIDTH; - else - IntWidth := Width-1; - end if; - if (Justified = RIGHT) then - return (Sign & Value(Value'length-IntWidth+1 to Value'length)); - else - for i in Value'range loop - if Value(i) /= ' ' then - MSPos := i; - exit; - end if; - end loop; - return (Sign & ValueExtended(MSPos to MSPos+IntWidth-1)); - end if; - end I_To_r; - - - ------------------------------------------- - -- Reasonable output conversion function -- - ------------------------------------------- - - function ReasonableOutput (Arg: string; - Justified: side; - Width: integer) return string is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:" | "S:" | "V:" => - return U_To_h(Value); - when "I:" => - return I_To_r(Value, Justified, Width); - when "B:" | "L:" | "C:" => - return Value; - when others => - return Argument; - end case; - - end ReasonableOutput; - - - ------------------------------------ - -- Bit output conversion function -- - ------------------------------------ - - function BitOutput (Arg: string; - Justified: side; - Width: integer) return string is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:" | "S:" | "V:" => - return (FIO_bv_PRE & Value & FIO_bv_POST); - when "B:" => - -- Value(1 to 1) instead of Value for LeapFrog - return (FIO_b_PRE & Value(1 to 1) & FIO_b_POST); - when "I:" => - return I_To_b(Value, Justified, Width); - when "L:" => - -- Value(1 to 1) instead of Value for LeapFrog - return L_To_b(Value(1 to 1)); - when others => - return Argument; - end case; - - end BitOutput; - - - ------------------------------------------- - -- Decimal output conversion function -- - ------------------------------------------- - - function DecimalOutput (Arg: string) return integer is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:"| "V:" => - return U_To_d(Value); - when "S:" => - return S_To_d(Value); - when "I:" => - return I_To_d(Value); - when "B:" => - return B_To_d(Value); - when "L:" => - return L_To_d(Value); - when others => - return integer'low; - end case; - - end DecimalOutput; - - - ---------------------------- - -- Atomic print functions -- - ---------------------------- - - function FIO_EOS (Format: in string; - Pointer: in integer) - return boolean is - begin - return (Pointer > Format'length); - end FIO_EOS; - - - -- Atomic value print function - - procedure FIO_PrintValue (F: out text; - L: inout line; - Format: in string; - Pointer: inout integer; - Last: in boolean := FALSE) is - variable Char: character; - begin - while (not FIO_EOS(Format, Pointer)) loop - Char := Format(Pointer); - case Char is - when '\' => - Pointer := Pointer + 1; - exit when (FIO_EOS(Format, Pointer)); - Char := Format(Pointer); - case Char is when 'n' => writeline(F, L); - when others => write(L, Char); - end case; - when '%' => - if Last then - FIO_Warning_Fsbla(F, L, Format, Pointer); - end if; - Pointer := Pointer + 1; - exit; - when others => - write(L, char); - end case; - Pointer := Pointer + 1; - end loop; - end FIO_PrintValue; - - - ---- Atomic argument print function - - procedure FIO_PrintArg (F: out text; - L: inout line; - Format: in string; - Pointer: inout integer; - Arg: in string) is - variable Char: character; - variable Justified: side; - variable Width: integer; - begin - - FIO_PrintValue(F, L, Format, Pointer); - - Justified := RIGHT; - Width := 0; - while (not FIO_EOS(Format, Pointer)) loop - Char := Format(Pointer); - case Char is - when '-' => - Justified := LEFT; - Pointer := Pointer + 1; - when '0' to '9' => - Width := Width*10 + C_DIGIT_CHARS_MAP(Char); - Pointer := Pointer + 1; - when 'r' => - write(L, ReasonableOutput(Arg, Justified, Width), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'b' => - write(L, BitOutput(Arg, Justified, Width), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'd' => - write(L, DecimalOutput(Arg), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'q' | 's' => - write(L, Arg, Justified, Width); - Pointer := Pointer + 1; - exit; - when others => - FIO_Warning_Ufs(F, L, Format, Pointer, Char); - write(L, Arg, Justified, Width); - Pointer := Pointer + 1; - exit; - end case; - end loop; - end FIO_PrintArg; - - - ----------------------------------------------------- - -- The format string iteration expansion procedure -- - ----------------------------------------------------- - - procedure FIO_FormatExpand (FMT: inout line; - Format: in string; - StartPointer: in positive) is - - variable Pointer: positive := StartPointer; - variable TokenStart: positive; - variable IterStringStart: positive; - variable IterStringEnd: positive; - variable IterCount: natural; - variable OpenBrackets: natural; - variable L: line; - - begin - - FORMAT_SEARCH: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - - -- look for format specifier - when '%' => - - -- initialize iteration token search - TokenStart := Pointer; - IterCount := 0; - Pointer := Pointer + 1; - - -- start iteration token search - TOKEN_READ: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - - -- read iteration counter - when '0' to '9' => - IterCount := IterCount*10 + C_DIGIT_CHARS_MAP(Format(Pointer)); - Pointer := Pointer + 1; - - -- expect open bracket - when '{' => - - -- initialize iteration string read - OpenBrackets := 1; - IterStringStart := Pointer + 1; - Pointer := Pointer + 1; - -- quit prematurely when iteration count is 0 - next FORMAT_SEARCH when (IterCount = 0); - - -- start iteration string read - ITER_STRING_READ: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - -- keep track of open brackets - when '{' => - OpenBrackets := OpenBrackets + 1; - Pointer := Pointer + 1; - -- when closing bracket is found, process iteration string - when '}' => - OpenBrackets := OpenBrackets - 1; - if (OpenBrackets = 0) then - IterStringEnd := Pointer-1; - if (TokenStart /= 1) then - write(L, Format(1 to TokenStart-1)); - end if; - for i in 1 to IterCount loop - write(L, Format(IterStringStart to IterStringEnd)); - end loop; - if (IterStringEnd /= Format'length) then - write(L, Format(IterStringEnd+2 to Format'length)); - end if; - -- call expansion procedure recursively on expanded format - FIO_FormatExpand(FMT, L.all, TokenStart); - deallocate(L); - return; - end if; - Pointer := Pointer + 1; - -- skip escaped characters - when '\' => - Pointer := Pointer + 2; - -- read iteration string - when others => - Pointer := Pointer + 1; - - end case; - - end loop ITER_STRING_READ; - - -- stop iteration token search when no opening bracket found - when others => - Pointer := Pointer + 1; - next FORMAT_SEARCH; - - end case; - - end loop TOKEN_READ; - - -- skip escaped characters - when '\' => - Pointer := Pointer + 2; - - -- read other characters - when others => - Pointer := Pointer + 1; - - end case; - - end loop FORMAT_SEARCH; - - write(FMT, Format); - deallocate(L); - - end FIO_FormatExpand; - - - - -------------------------- - -- The fprint procedure -- - -------------------------- - - procedure fprint - (F: out text; - L: inout line; - Format: in string; - A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL; - A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL; - A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL; - A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL - ) is - - variable Pointer: integer; - variable FMT: line; - - begin - - Pointer := 1; - - FIO_FormatExpand (FMT, Format, Format'low); - - if (A1 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A1 ); - if (A2 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A2 ); - if (A3 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A3 ); - if (A4 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A4 ); - if (A5 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A5 ); - if (A6 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A6 ); - if (A7 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A7 ); - if (A8 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A8 ); - if (A9 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A9 ); - if (A10 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A10); - if (A11 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A11); - if (A12 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A12); - if (A13 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A13); - if (A14 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A14); - if (A15 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A15); - if (A16 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A16); - if (A17 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A17); - if (A18 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A18); - if (A19 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A19); - if (A20 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A20); - if (A21 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A21); - if (A22 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A22); - if (A23 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A23); - if (A24 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A24); - if (A25 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A25); - if (A26 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A26); - if (A27 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A27); - if (A28 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A28); - if (A29 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A29); - if (A30 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A30); - if (A31 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A31); - if (A32 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A32); - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - - FIO_PrintValue(F, L, FMT.all, Pointer, Last => TRUE); - - deallocate(FMT); - - end fprint; - - - ------------------------------------------- - -- Formatted output conversion functions -- - ------------------------------------------- - - function fo (Arg: unsigned) return string is - constant Argument: unsigned(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("U:" & Result); - end fo; - - function fo (Arg: signed) return string is - constant Argument: signed(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("S:" & Result); - end fo; - - function fo (Arg: std_logic_vector) return string is - constant Argument: std_logic_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: std_ulogic_vector) return string is - constant Argument: std_ulogic_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: bit_vector) return string is - constant Argument: bit_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_BIT_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: integer) return string is - variable Argument: integer := Arg; - variable Result: string(1 to FIO_d_WIDTH) := (others => ' '); - variable Sign: character := ' '; - begin - if (Argument < 0) and (Argument /= integer'low) then - Sign := '-'; - Argument := -Argument; - end if; - for i in Result'reverse_range loop - Result(i) := C_DIGITS_MAP(Argument mod 10); - Argument := Argument / 10; - exit when (Argument = 0); - end loop; - return ("I:" & Sign & Result); - end fo; - - function fo (Arg: std_ulogic) return string is - begin - return ("B:" & C_STD_LOGIC_MAP(Arg)); - end fo; - - function fo (Arg: bit) return string is - begin - return ("B:" & C_BIT_MAP(Arg)); - end fo; - - function fo (Arg: boolean) return string is - begin - if (ARG = TRUE) then - return ("L:T"); - else - return ("L:F"); - end if; - end fo; - - function fo (Arg: character) return string is - begin - return ("C:" & Arg); - end fo; - - function fo (Arg: string) return string is - begin - return Arg; - end fo; - - function fo (Arg: time) return string is - begin - return fo (integer (Arg / 1 ns)); - end fo; - -end PCK_FIO; diff --git a/lib/PCK_FIO-1.16/README b/lib/PCK_FIO-1.16/README deleted file mode 100644 index 4af4c99..0000000 --- a/lib/PCK_FIO-1.16/README +++ /dev/null @@ -1,72 +0,0 @@ -# $Id: README,v 1.1 2008-08-23 08:20:28 Jens Exp $ -# $Log: not supported by cvs2svn $ -# Revision 1.3 1999/04/21 08:08:35 jand -# Tested with IEEE.numeric_std -# Small patch for Leapfrog -# -# - - PCK_FIO, Version 1.16 - Copyright (C) 1995, 1999 Easics NV - ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 1999 Easics NV ----- ----- This program is free software; you can redistribute it and/or modify ----- it under the terms of the GNU General Public License as published by ----- the Free Software Foundation; either version 1, or (at your option) ----- any later version. ----- ----- This program is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ----- GNU General Public License for more details. ----- ----- You should have received a copy of the GNU General Public License ----- along with this program; if not, write to the Free Software ----- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - -Contents --------- - -This distribution contains the following files: - - PCK_FIO.vhd: VHDL source of the PCK_FIO package - TB_PCK_FIO.vhd: VHDL source of the testbench for package PCK_FIO - PCK_FIO.out.gold: Certified test bench output - PCK_FIO.html: Manual for PCK_FIO in html format - README: This file - - -Installation ------------- - -To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and -analyze the VHDL file PCK_FIO.vhd into this library. - -To install the test bench, analyze TB_PCK_FIO.vhd into the same library. - -If you want to use IEEE.numeric_std instead of IEEE.std_logic_arith, you need -to edit the source code of the package and the test bench and replace the -package use clause. PCK_FIO works with either of these packages. - -To install the documentation, point your web browser to the file PCK_FIO.html -and bookmark it. - - -Installation check ------------------- - -After installing the test bench, you should run it. The corresponding VHDL -design unit is EASICS_PACKAGES.TBE_PCK_FIO(TB). - -Simulating the test bench should create a file called PCK_FIO.out. This file -should be identical to PCK_FIO.out.gold. Any difference indicates a portability -issue or a simulator non-compliance or bug. diff --git a/lib/PCK_FIO-1.16/TB_PCK_FIO.vhd b/lib/PCK_FIO-1.16/TB_PCK_FIO.vhd deleted file mode 100644 index c64d045..0000000 --- a/lib/PCK_FIO-1.16/TB_PCK_FIO.vhd +++ /dev/null @@ -1,504 +0,0 @@ ----- File: TB_PCK_FIO.vhd ----- ----- TBC_PCK_FIO: a test bench for the PCK_FIO package. ----- Copyright (C) 1995, 1999 Easics NV ----- ----- This program is free software; you can redistribute it and/or modify ----- it under the terms of the GNU General Public License as published by ----- the Free Software Foundation; either version 1, or (at your option) ----- any later version. ----- ----- This program is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ----- GNU General Public License for more details. ----- ----- You should have received a copy of the GNU General Public License ----- along with this program; if not, write to the Free Software ----- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 396 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- ----- ----- $Source: /tmp/cvsroot/VHDL/lib/PCK_FIO-1.16/TB_PCK_FIO.vhd,v $ ----- $Revision: 1.1 $ ----- $Log: not supported by cvs2svn $ ----- Revision 1.7 1999/04/21 08:23:53 jand ----- Tested with IEEE.numeric_std ----- Small patch for Leapfrog ----- ----- Revision 1.3 1998/09/29 10:09:44 vhdl ----- to EASICS_PACKAGES ----- ----- Revision 1.2 1998/09/29 09:17:51 vhdl ----- library EASICS_PACKAGES; ----- ----- Revision 1.1 1998/09/29 09:15:44 vhdl ----- Initial revision ----- - - -library IEEE; -use IEEE.std_logic_1164.all; --- signed/unsigned definition: use either std_logic_arith or numeric_std -use IEEE.std_logic_arith.all; -- the Synopsys one --- use IEEE.numeric_std.all; - -use STD.TEXTIO.all; - -library EASICS_PACKAGES; -use EASICS_PACKAGES.PCK_FIO.all; - -entity TBE_PCK_FIO is - -end TBE_PCK_FIO; - -architecture TB of TBE_PCK_FIO is - -begin - -USAGE: process - - file RESULT: text is out "PCK_FIO.out"; - variable L: line; - variable Pointer: integer; - variable BoolTrue: boolean := TRUE; - variable BoolFalse: boolean := FALSE; - variable IntPos: integer := 5678; - variable BigIntPos: integer := 12345678; - variable IntNeg: integer := -8765; - variable BigIntNeg: integer := -87654321; - variable Uns: unsigned(6 downto 0) := unsigned'("1010010"); - variable Unk: unsigned(6 downto 0) := unsigned'("1X10Z10"); - variable Std: std_logic_vector(6 downto 0) := std_logic_vector'("0010010"); - variable SigPos: signed(6 downto 0) := signed'("0010010"); - variable SigNeg: signed(6 downto 0) := signed'("1010010"); - variable BitX: std_logic := 'X'; - variable Bit1: std_logic := '1'; - variable Bit0: std_logic := '0'; - - variable parameter_1: integer := 1234; - variable parameter_2: integer := 2345; - variable parameter_3: integer := 4567; - - -begin - -fprint(RESULT, L, - "PCK_FIO.out: TESTBENCH OUTPUT FOR PCK_FIO\n" & - "-----------------------------------------\n\n" & - "This is the result of running the PCK_FIO testbench.\n" & - "This file should be compared with PCK_FIO.out.gold, which is\n" & - "the reference output. Any difference indicates a portability\n" & - "issue or a simulator non-compliance or bug.\n\n" - ); - - -fprint(RESULT, L, - "\n--------------------\n" & - "-- Basic features --\n" & - "--------------------\n\n" - ); - -fprint(RESULT, L, - "-- First some auxiliary declarations\n" - ); - -fprint(RESULT, L, - "> file RESULT: text is out ""PCK_FIO.out"";\n" & - "> variable L: line;\n" & - "> variable BoolTrue: boolean := TRUE;\n" & - "> variable BoolFalse: boolean := FALSE;\n" & - "> variable IntPos: integer := 5678;\n" & - "> variable BigIntPos: integer := 12345678;\n" & - "> variable IntNeg: integer := -8765;\n" & - "> variable BigIntNeg: integer := -87654321;\n" & - "> variable Uns: unsigned(6 downto 0) := unsigned'(""1010010"");\n" & - "> variable Unk: unsigned(6 downto 0) := unsigned'(""1X10Z10"");\n" & - "> variable Std: std_logic_vector(6 downto 0) := std_logic_vector'(""0010010"");\n" & - "> variable SigPos: signed(6 downto 0) := signed'(""0010010"");\n" & - "> variable SigNeg: signed(6 downto 0) := signed'(""1010010"");\n" & - "> variable BitX: std_logic := 'X';\n" & - "> variable Bit1: std_logic := '1';\n" & - "> variable Bit0: std_logic := '0';\n" -); - - -fprint(RESULT, L, - "\n\n-- fprint call with no arguments\n" & - "> fprint(RESULT, L, ""No arguments.\\n);""\n" - ); -fprint(RESULT, L, "No arguments.\n"); - - -fprint(RESULT, L, - "\n-- Special characters need to be escaped\n" & - "> fprint(RESULT, L, ""Special characters: \\\% \\\\ "" \\n"");\n" - ); - -fprint(RESULT, L, "Special characters: \% \\ "" \n"); - - -fprint(RESULT, L, - "\n-- Various format specifiers interprete the same object differently\n" & - "> fprint(RESULT, L, ""Format specifiers: \%r \%d \%b \%q\\n);""\n" & - "> fo(Uns), fo(Uns), fo(Uns), fo(Uns)\n" & - "> );\n" - ); - -fprint(RESULT, L, "Format specifiers: %r %d %b %q\n", - fo(Uns), fo(Uns), fo(Uns), fo(Uns) - ); - -fprint(RESULT, L, - "\n-- Format string can be shortened by using the iteration specifier\n" & - "> fprint(RESULT, L, ""Iteration specifier: \%4{\%r }\\n);""\n" & - "> fo(Uns), fo(SigPos), fo(SigNeg), fo(Std)\n" & - "> );\n" - ); - -fprint(RESULT, L, "Iteration specifier: %4{%r }\n", - fo(Uns), fo(SigPos), fo(SigNeg), fo(Std) - ); - - -fprint(RESULT, L, - "\n------------------------------------\n" & - "-- Support for bit-oriented types --\n" & - "------------------------------------\n" - ); - -fprint (RESULT, L, "\n-- Reasonable format\n" & - "> fprint(RESULT, L, ""Reasonable format: \%9{\%r }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Reasonable format: %9{%r }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint (RESULT, L, "\n-- Decimal format\n" & - "> fprint(RESULT, L, ""Decimal format: \%7{\%d }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Decimal format: %9{%d }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint (RESULT, L, "\n-- Bit format\n" & - "> fprint(RESULT, L, ""Bit format: \%7{\%b }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Bit format: %9{%b }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint(RESULT, L, - "\n\n" & - "-- Alignment\n-- Template of the call: ( stands for the format specifier)\n" - ); - - -fprint(RESULT, L, "\n" & - "> fprint(RESULT, L, ""Bitvectors with : \%4{|}\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg)\n" & - - "> );\n" - ); - -fprint(RESULT, L, - "\n" & - "-- Results of the call with various format specifiers\n\n" - ); - -fprint(RESULT, L, "Bitvectors with \%1r: %4{%1r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%2r: %4{%2r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%3r: %4{%3r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%4r: %4{%4r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%5r: %4{%5r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%6r: %4{%6r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%7r: %4{%7r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%8r: %4{%8r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%9r: %4{%9r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%-1r: %4{%-1r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-2r: %4{%-2r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-3r: %4{%-3r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-4r: %4{%-4r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-5r: %4{%-5r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-6r: %4{%-6r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-7r: %4{%-7r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-8r: %4{%-8r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-9r: %4{%-9r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%1d: %4{%1d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%2d: %4{%2d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%3d: %4{%3d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%4d: %4{%4d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%5d: %4{%5d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%6d: %4{%6d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%7d: %4{%7d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%8d: %4{%8d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%9d: %4{%9d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%-1d: %4{%-1d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-2d: %4{%-2d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-3d: %4{%-3d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-4d: %4{%-4d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-5d: %4{%-5d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-6d: %4{%-6d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-7d: %4{%-7d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-8d: %4{%-8d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-9d: %4{%-9d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); - - - -fprint(RESULT, L, - "\n-------------------------------\n" & - "-- Support for integer types --\n" & - "-------------------------------\n" - ); - -fprint(RESULT, L, - "\n\n" & - "-- Template of the call: ( stands for the format specifier)\n" - ); - - -fprint(RESULT, L, "\n" & - "> fprint(RESULT, L, ""Integers with : \%4{|}\\n"",\n" & - "> fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg)\n" & - - "> );\n" - ); - -fprint(RESULT, L, - "\n" & - "-- Results of the call with various format specifiers\n\n" - ); - - -fprint(RESULT, L, "Integers with \%5d: %4{%5d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%6d: %4{%6d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%7d: %4{%7d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%8d: %4{%8d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%9d: %4{%9d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%10d: %4{%10d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%-5d: %4{%-5d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-6d: %4{%-6d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-7d: %4{%-7d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-8d: %4{%-8d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-9d: %4{%-9d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-10d: %4{%-10d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%5r: %4{%5r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%6r: %4{%6r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%7r: %4{%7r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%8r: %4{%8r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%9r: %4{%9r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%10r: %4{%10r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%-5r: %4{%-5r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-6r: %4{%-6r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-7r: %4{%-7r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-8r: %4{%-8r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-9r: %4{%-9r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-10r: %4{%-10r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); - - -fprint(RESULT, L, - "\n----------------------\n" & - "-- Support for time --\n" & - "----------------------\n" - ); - -fprint (RESULT, L, "-- For portability reasons, time is converted \n" & - "-- into an integer value (of nanoseconds)\n" - ); -fprint (RESULT, L, "> wait for 648 ns\n"); -fprint (RESULT, L, "> fprint (RESULT, L, ""The time is now \%d ns\\n"", fo(now));\n"); - -wait for 648 ns; - -fprint (RESULT, L, "The time is now %d ns\n", fo(now)); - - -fprint(RESULT, L, - "\n----------------------------------------\n" & - "-- Erroneous calls and error messages --\n" & - "----------------------------------------\n" - ); - -fprint(RESULT, L, "\n-- Less arguments than formats specifiers\n" & - "> fprint(RESULT, L, ""\%d \%d \%d \%d \\n"", fo(Uns), fo(Std));\n" - ); - -fprint(RESULT, L, "%d %d %d %d \n", fo(Uns), fo(Std)); - -fprint(RESULT, L, "\n"); - -fprint(RESULT, L, "-- Unsupported format specifier\n" & - "> fprint(RESULT, L, ""\%r \%v \%r \%r\\n"", " & - "fo(Uns), fo(Std), fo(Uns), fo(Std));\n" - ); - -fprint(RESULT, L, "%r %v %r %r\n", fo(Uns), fo(Std), fo(Uns), fo(Std)); - -fprint(RESULT, L, "\n"); - -fprint(RESULT, L, - "\n----------------------------------------\n" & - "-- Things you wouldn't expect to work --\n" & - "----------------------------------------\n" - ); - -fprint(RESULT, L, "\n-- Nested iteration\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%3{<<\%3{_END_}>>}\\n"");\n"); -fprint(RESULT, L, "%3{<<%3{_END_}>>}\n"); - -wait; - -end process USAGE; - -end TB; diff --git a/lib/PCK_FIO-2002.7/CHANGES b/lib/PCK_FIO-2002.7/CHANGES deleted file mode 100644 index b755a56..0000000 --- a/lib/PCK_FIO-2002.7/CHANGES +++ /dev/null @@ -1,86 +0,0 @@ ----- $Id: CHANGES,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - - -Changes from version 1.16 to version 2002.07 -============================================ - -PCK_FIO is now distributed under the GNU Lesser General Public Licencse -instead of the ordinary GPL, to better reflect intended usage. - -Cosmetic changes in source code to correct some typos in the testbench output. -A new testbench is also supplied. - -The package now uses IEEE.numeric_std as default. - -URL http://www.easics.com has been made part of address. - -Changed syntax in the PCK_FIO package and its testbench to support VHDL-1993. -Because of backwards-incompatibility, it has been necessary to supply -different sets of files for 1987 and 1993. - -Split the packages into a separate file for the header and a -separate file for the body (in compliance with Easics' guidelines). - -These changes resulted in the files: - -Files for VHDL-1993: --------------------- - PCK_FIO_1993.vhd : the source code of the header file for the package - PCK_FIO_1993_BODY.vhd: the source code of the body of the package - TB_PCK_FIO_1993.vhd: the testbench for the package - -Files for VHDL-1987: --------------------- - PCK_FIO_1987.vhd: the source code of the header file for the package - PCK_FIO_1987_BODY.vhd: the source code of the body of the package - TB_PCK_FIO_1987.vhd: the testbench for the package - -Updated README and PCK_FIO.html to support these changes. - -Adapted package files to support NUL termination of strings. -fo(Arg: string) now prints the string until the first NUL. -Several examples of its use are demonstrated in the supplied testbenches. - -Made cosmetic changes to code to improve readability. - -Acknowledgment --------------- -These changes have been implemented by Peter Geens. - - - - - - - - - - - - - diff --git a/lib/PCK_FIO-2002.7/PCK_FIO.html b/lib/PCK_FIO-2002.7/PCK_FIO.html deleted file mode 100644 index 6b5fc72..0000000 --- a/lib/PCK_FIO-2002.7/PCK_FIO.html +++ /dev/null @@ -1,339 +0,0 @@ - - - - - - VHDL package for formatted file output - - - - -
-

-Name

-PCK_FIO - VHDL package for  formatted file output -

-

-

-Contents

-Usage -
The file output function 'fo' -
Format specifiers -
Special characters -
Things to watch out for -
Methodology notes -
Parametrization -
Test bench -
Known limitations and problems -
Author -

-

-

-Usage

-PCK_FIO is a VHDL package that defines  fprint, a function -for formatted file output. -

After installing the package you can call fprint as follows: -

  fprint(F, L, Format, fo(Expr_1), fo(Expr_2), ... fo(Expr_n));
-where F is the filehandle and L is the line variable. -

The argument Format is the format string, which consists of ``normal'' -substrings which are copied verbatim, and format specifiers, starting with -'%'. -A typical format string looks as follows: -

   "Arg1 = %6r, Arg2 = %10d, Arg3 = %-5r\n"
-The remaining arguments are the expressions whose results you want to write -to the file, embedded in fo function calls. There can be 0 to -32 of such arguments. The expressions can be of any type for which an fo -function exists. String expressions can also be called directly. -

-

-

-The file output function 'fo'

-The fo (file output) functions do the trick. They -return a tagged string representation that is meaningful to format specifiers. -Here are some examples: -
  fo (signed'("1100"))   returns "S:1100" 
-  fo (unsigned'("1100")) returns "U:1100" 
-  fo (TRUE)              returns "L:T"
-  fo (127)               returns "I:127"
-The internal behavior of fo is irrelevant to the typical user. -
  -
The fo function is currently overloaded as follows:
- -
  function fo (Arg: unsigned)          return string;
-  function fo (Arg: signed)            return string;
-  function fo (Arg: std_logic_vector)  return string;
-  function fo (Arg: std_ulogic_vector) return string;
-  function fo (Arg: bit_vector)        return string;
-  function fo (Arg: integer)           return string;
-  function fo (Arg: std_ulogic)        return string;
-  function fo (Arg: bit)               return string;
-  function fo (Arg: boolean)           return string; 
-  function fo (Arg: character)         return string;
-  function fo (Arg: string)            return string;
-  function fo (Arg: time)              return string;
- -


To support null-terminated strings, the function fo(Arg: -string) processes Arg up to the first NUL character, -if any. If you want the whole string to be outputted you can just enter -the string as a direct argument in fprint.  See also the -examples in the testbench. -

-
- -

-Format specifiers

-The general format of a format specifier is: -
   %[-][n]c
-The optional - sign specifies left justified output; default is -right justified. -

The optional number n specifies a field-width. If it is not specified, -fprint -does something reasonable. -

c is the conversion specifier. Currently the following conversion -specifiers are supported: -

-
-r
- -
-reasonable output format (inspired by Synopsys VSS)
- -
Prints the ``most reasonable'' representation e.g. hex for -unsigned, signed and other bit-like vectors (not preferred for integers)
- -
-b
- -
-bit-oriented output
- -
-d
- -
-decimal output
- -
-s
- -
-string output (e.g. in combination with 'IMAGE for enum types)
- -
-q
- -
-``qualified'' string output (shows internal representation from fo)
- -
-{}
- -
-Iteration operator, used as follows:
- -
-%n{<format-string>}
- -
In this case, n is the iteration count and is mandatory. Iteration -can be nested.
- -
-

-Special characters

-To print a double quote,  use '""' in the format string (VHDL -convention). To print the special characters, '\', and '%', -escape them with '\'. To prevent '{' and '}' -from being interpreted as opening and closing brackets in iteration strings, -escape them with '\'. -

A newline is specified in the format string by '\n'. -

-

-

-Things to notice

-The fprint function expands into VHDL write and writeline -commands. As in plain VHDL, nothing will be written to the output file -until a writeline is given. Therefore, don't forget to include -'\n' -commands in the format string, or it ``will not work''. -

The preferred format specifier for integers is, naturally, %d. -This calls the VHDL write for integers. If you specify a field -width that is too small, the field will automatically be expanded. If you -use %r for integers, the field is not expanded automatically, which -means that some digits are simply thrown away. This may sometimes be useful -but it is also dangerous. Look at the test bench output for differences -between %d and %r output. -

When using the %d format specifier, the VHDL constraints for -the allowed integer range apply. -

In VHDL, signed/unsigned types have been standardized only relatively -recently, in the package IEEE.numeric_std. The lack of a standard -has caused (and is causing) portability issues. The most popular non-standard -package that defines signed/unsigned is IEEE.std_logic_arith from -Synopsys. PCK_FIO works with both packages,  but refers to the standard -package IEEE.numeric_std by default. To use IEEE.std_logic_arith -instead, replace the reference to IEEE.numeric_std in the source -code.  This needs to be done consistently in a design database (e.g. -in the PCK_FIO test bench as well). -

-

-

-Methodology notes

-The obvious application for fprint is in test benches, to produce -output files that trace the simulation behavior. -

Another interesting application for fprint is to produce info, -warning and error messages in your models. As it can take arguments, fprint -is much better suited for this task than VHDL's assert or report -statements. Actually fprint produces its own (few) warning messages. -

An advanced usage is the generation of test vectors in a specific format. -Instead of using the fo functions, you can write your own set -of functions that return the symbols of a specific test format in a way -that is understandable to the fprint format specifiers. As an -example, when a high output value should be represented using the symbol -'H' it suffices to write a conversion function that returns "B:H" and call -it in combination with the %b format specifier. -

-

-

-Parametrization

-Prefix and postfix strings for bit-oriented and hex-oriented output are -parameterizable in the packages to accommodate different output styles. -The settings in the distribution are such that hex output is indicated -by the prefix '0x', while  bit output prefix and postfix are empty -strings. -

You can adapt the output style by modifying the following constants -in the package header: -

   -- prefix string for hex output -
  -- VHDL style:    "X""" -
  -- Verilog style: "h'" -
  -- C style:       "0x" -
  constant FIO_h_PRE:  string := "0x"; -

  -- postfix string for hex output -
  -- VHDL style:    """" -
  constant FIO_h_POST: string := ""; -

  -- prefix string for bit vector output -
  -- VHDL style:    "B""" -
  -- Verilog style: "b'" -
  constant FIO_bv_PRE:  string := ""; -

  -- postfix string for bit vector output -
  -- VHDL style:    """" -
  constant FIO_bv_POST: string := ""; -

  -- prefix string for bit output -
  -- VHDL style:    "'" -
  -- Verilog style: "b'" -
  constant FIO_b_PRE:  string := ""; -

  -- postfix string for bit output -
  -- VHDL style:    "'" -
  constant FIO_b_POST: string := ""; -

-

-

-Test bench

-Included in the distribution are the files TB_PCK_FIO_1987.vhd and -TB_PCK_FIO_1993 with a test bench,depending on the standard you're -running, for the PCK_FIO package. The file PCK_FIO.out.gold contains -the expected output. If you run the test bench it should produce the file -PCK_FIO.out -that should be identical to PCK_FIO.out.gold. The source files -should be analyzed in a VHDL library EASICS_PACKAGES. -

A good way to understand fprint is to inspect the test bench -and what it produces. -

-

-

-Known limitations and problems

-This VHDL package is an implementation of a flexible concept. It is likely -to be extended and modified in the future. Backward compatibility is not -guaranteed. Therefore, it is not recommended to give this package the status -of a company wide standard package (or even worse, a VHDL standard package). -Rather, it should be linked with a particular project (and it can be regarded -as a standard package within that project). -

PCK_FIO is available in either standard VHDL Std1076-1987 or standard -VHDL Std1076-1993. Nevertheless, some simulators/versions have problems -with the package. The following is an overview of currently known issues: -
  -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
PCK_FIO_1987 and various simulators/versions
SimulatorPCK_FIO_1987
Synopsys VSS 3.5 and earlierIncorrect (all zero) output in compiled mode
Synopsys VSS 97.01OK
Synopsys VSS/Scirocco 2000.02Incorrect output in compiled mode, interpreted mode works
Mentor quickhdlOK
Modeltech modelsimOK
Cadence LeapfrogShould work with 4.4.1 -
Mysterious problems have been reported - please run the test bench -and report problems
- -
  -
- - - - - - - - - - - - - - - - - - - - - - - - - -
PCK_FIO_1993 and various simulators/versions
SimulatorPCK_FIO_1993
Synopsys VSS/Scirocco 2000.02Compile errors due to improper handling of files by Synopsys
Synopsys VSS/Scirocco 2000.06works fine
Modeltech modelsim 5.4c and higherOK
- -

Although the package name suggests file IO, it only does file output. -

-

-

-Author

-Jan Decaluwe -

-

- - diff --git a/lib/PCK_FIO-2002.7/PCK_FIO.out.gold b/lib/PCK_FIO-2002.7/PCK_FIO.out.gold deleted file mode 100644 index 3fcfe4c3ee52eaf461a691b4b3eca59aa1cc34dc..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 8979 zcmd5?ZExa8628y;iV{*T$qGl1SBA@FmCPi%(M6ePLS{#&(MARu;vHkNw#kbo```De z>TcWMb^@n6-63KcQ%`lhc9*Mj{r;bK7au?E#Ph62{qvjt+4V?OH96NxmINI zwbTArg~?4e%9*6u=q`*W!SL=u4H0?E5-tA@$yltaWH-SicZ6FxefKp6xz*ob;I_?K zkbSj!Z;u$^0mzzM9T%vIOf(k5c*Md7Gza@0;{j zy1Ko@wfW)v0-3@oOye17GaC9~s27(gCO?_Xrz*-M{p9y8oqR32Y*F*7M6vTN;<#A2 zC46sYY8dz-4eyc5!%QV9MG6ZT0u1Y!N{9YTjX1rl{HxF&ecPaK->6A?Iu`{9@Vm_Y z1q(ntPiY({Qy=RKi!u&a1Wt`)mZ(h0>YMsldE&uuh_`%w%))24SQpFOdbE+y#)vis zwDCIxYXMh%jpHrk+ja}m)C_VM4C$Dp{dBNP-CZ)FMz=jP5?w7oyLyO44Cckgkz@*4 zO@n8er*^XmpuDWBg-P71eykEg+5I2T_m7nn)hVcz#u(XT#@T4Qtgdq+QMmoo*`;E{ zy1x3t?|tl{tf~q7sUHP1-o&tx)NDc}j==LC%=l3psgl(UyCSiu=gKFRkU4PFNuDX} zvfvg(Mj&@KAu0;a+lT;UDmY1G@@CIF+&FHfv1BKI;~X}kI=xq7C*1ymY-izuF~@v@ ztrmZwO4D*~LP{ zY}9Bz9pF2P%F;S(TxQ}{FR<(~cAY5+#UqA5%)`v4@Z)qoUE;>8Hdg8y9pCcIuG2I1 zetFww`xTpko3&Uep=*Y0h@1J0%U;RUL6CWI5@5IE&FOhoU$HJTWRuWm<)?8Z)h6;D zyNx?SD`Z$s-@UngIH|o~a+vxjt?e@b(hUUX{i5Z#dxA-PC?lzTIXNS~F%d%OZ zfBu;|^p)_Oq&MIX*l-c5Y~WgxEYiRpM?bKazPi2qukEoca;Gc%a+kdQL-IPXfn3_! z2r%}m1}J{l$`Ag(l`o5H>h8QGS^nP9#l8eZhu9vRE2klzG`OzhFTCnuZ$|kg+maNZ zJ=!`RrzhAi{b(fRo2*khii(gDiRZlW}gKIMe`h#KJ(ZZm@XNf(y{% zNaLA7)uSEmPIPx)I$eHam3LWWcNL;N>2rV;ff4`JFx%Jt5GE8#xzx}eXj&E!=3~C* zT0?(m=ncRi%tsC8$YLzWqU>i4uAAd>phZ|wiMLIcLEjbF0$iYrk;Yfu=B?y6Zzach z;yFBiBLehajntmF4unEwE}(UXrudGDHKDySy&E9T6M&)3KLq0jiT5%9Pb$*df@r!Lj>#y86hJ%)1`7$CnS{+!dB^tQ~ zw6vTU>>A+mdScNAPOB)~X_pqHoPp&~u+Vpm(Uz^|8EZ41*08o`%q=(rL?)TTg4g`y z8GCD_g|3J-1~=Foydv6I+@cG3fj9TuA?6vA=L||5N-Rn|WFc7!R9&c&oWK~1o3VRV zQ>a=1@gd6#$)U`Pci_g@LNx~&ls?OO@eXTnd7)YW4KnvEW_Qn76sje#L9Y@RopxU7 zmKhihMLc_Q$H-8PXTyYjWUb4y+i?Y8%_~mTRPdSztiSD7*BZ~-S4V{Vxk}YEj$K zX6g&Hpi2k4ID6(URoWtfqLGN>q6dW|f)V#F`BVf)I^65kr^i6sHQ* zqm*}`M_>0e=y1PF`gB$wA1#~@_0dbT6GibOACW{U9~+<@vV|MmGFBbbe zNzke1$80{mLd!WCk;1)%rs!__lhs>!Jg2lMF1an9AAh0y0ITTs1Ddb-F_OFe05$Ws z)iyu*;r0U5Mpc9|vhmYT^oyTx*Stsgr-Qp|K7+gT)9edd9`}}xnsBD`3?EPkl3YCI z!tHt69x;c0&0Gi!Acv5l&Rl+JJO3(bLrmQgRim7p)wV`ioP0gV`B&o9b@8~%XfKaq zZskuCnBq24Pned&(kf-8pv{L(t%*zH1!3wGM#^~JulmvJVqqv-$tahvMCo=NRT>t<8 diff --git a/lib/PCK_FIO-2002.7/PCK_FIO_1987.vhd b/lib/PCK_FIO-2002.7/PCK_FIO_1987.vhd deleted file mode 100644 index d4cf8e6..0000000 --- a/lib/PCK_FIO-2002.7/PCK_FIO_1987.vhd +++ /dev/null @@ -1,105 +0,0 @@ ----- $Id: PCK_FIO_1987.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - -use STD.TEXTIO.all; - -library IEEE; -use IEEE.std_logic_1164.all; --- signed/unsigned definition: use either std_logic_arith or numeric_std --- use IEEE.std_logic_arith.all; -- the Synopsys one -use IEEE.numeric_std.all; - -package PCK_FIO is - - -- prefix string for hex output - -- VHDL style: "X""" - -- Verilog style: "h'" - -- C style: "0x" - constant FIO_h_PRE: string := "0x"; - - -- postfix string for hex output - -- VHDL style: """" - constant FIO_h_POST: string := ""; - - -- prefix string for bit vector output - -- VHDL style: "B""" - -- Verilog style: "b'" - constant FIO_bv_PRE: string := ""; - - -- postfix string for bit vector output - -- VHDL style: """" - constant FIO_bv_POST: string := ""; - - -- prefix string for bit output - -- VHDL style: "'" - -- Verilog style: "b'" - constant FIO_b_PRE: string := ""; - - -- postfix string for bit output - -- VHDL style: "'" - constant FIO_b_POST: string := ""; - - -- digit width for the string representation of integers - constant FIO_d_WIDTH: integer := 10; - - -- bit width for the string representation of integers - constant FIO_b_WIDTH: integer := 32; - - -- definition of the NIL string (default value for fprint arguments) - -- fprint stops consuming arguments at the first NIL argument - constant FIO_NIL: string := "\"; - - - procedure fprint - (F: out text; - L: inout line; - Format: in string; - A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL; - A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL; - A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL; - A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL - ); - - function fo (Arg: unsigned) return string; - function fo (Arg: signed) return string; - function fo (Arg: std_logic_vector) return string; - function fo (Arg: std_ulogic_vector) return string; - function fo (Arg: bit_vector) return string; - function fo (Arg: integer) return string; - function fo (Arg: std_ulogic) return string; - function fo (Arg: bit) return string; - function fo (Arg: boolean) return string; - function fo (Arg: character) return string; - function fo (Arg: string) return string; - function fo (Arg: time) return string; - - procedure FIO_FormatExpand (FMT: inout line; - Format: in string; - StartPointer: in positive); - -end PCK_FIO; - diff --git a/lib/PCK_FIO-2002.7/PCK_FIO_1987_BODY.vhd b/lib/PCK_FIO-2002.7/PCK_FIO_1987_BODY.vhd deleted file mode 100644 index 44e42cf..0000000 --- a/lib/PCK_FIO-2002.7/PCK_FIO_1987_BODY.vhd +++ /dev/null @@ -1,821 +0,0 @@ ----- $Id: PCK_FIO_1987_BODY.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - - -package body PCK_FIO is - - -------------------------- - -- FIO Warnings support -- - -------------------------- - - procedure FIO_Warning_Fsbla (F: out text; - L: inout line; - Format: in string; - Pointer: in positive) is - begin - fprint (F, L, "\n** Warning: FIO_PrintLastValue: " & - "Format specifier beyond last argument\n"); - fprint (F, L, "** in format string: ""%s""\n", Format); - fprint (F, L, "** "); - for i in 1 to Pointer-1 loop - fprint (F, L, "-"); - end loop; - fprint (F, L, "^\n"); - end FIO_Warning_Fsbla; - - procedure FIO_Warning_Ufs (F: out text; - L: inout line; - Format: in string; - Pointer: in positive; - Char: in character) is - begin - fprint (F, L, "\n** Warning: FIO_PrintArg: " & - "Unexpected format specifier '%r'\n", - fo(Char)); - fprint (F, L, "** in format string: ""%s""\n", Format) ; - fprint (F, L, "** "); - for i in 1 to Pointer-1 loop - fprint (F, L, "-"); - end loop; - fprint (F, L, "^\n** Assuming 'q' to proceed: "); - end FIO_Warning_Ufs; - - - ---------------------------------- - -- bit conversion support -- - ---------------------------------- - - type T_bit_map is array(bit) of character; - - constant C_BIT_MAP: T_bit_map - := ('0', '1'); - - ---------------------------------- - -- std_logic conversion support -- - ---------------------------------- - - type T_std_logic_map is array(std_ulogic) of character; - - constant C_STD_LOGIC_MAP: T_std_logic_map - := ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-'); - - ------------------------------ - -- Digit conversion support -- - ------------------------------ - - -- types & constants - - subtype S_digit_chars is character range '0' to '9'; - subtype S_digits is integer range 0 to 9 ; - - type T_digit_chars_map is array(S_digit_chars) of S_digits; - - constant C_DIGIT_CHARS_MAP: T_digit_chars_map - := (0, 1, 2, 3, 4, 5, 6, 7, 8, 9); - - type T_digits_map is array(S_digits) of S_digit_chars; - - constant C_DIGITS_MAP: T_digits_map - := ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9'); - - - -------------------------------- - -- Decimal conversion support -- - -------------------------------- - - -- unsigned to decimal - - function U_To_d (Arg: string) return integer is - constant Argument: string(Arg'length downto 1) := Arg; - variable Result: integer := 0; - begin - for i in Argument'range loop - case Argument(i) is when '1' => Result := 2**(i-1) + Result; - when '0' => null; - when others => return(-1); - end case; - end loop; - return (Result); - end U_To_d; - - -- signed to decimal - - function S_To_d (Arg: string) return integer is - constant Argument: string(Arg'length downto 1) := Arg; - variable Result: integer := 0; - begin - case Argument(Argument'left) is - when '1' => Result := - 2**(Argument'left-1); - when '0' => Result := 0; - when others => return (integer'low); - end case; - for i in Argument'left-1 downto 1 loop - case Argument(i) is when '1' => Result := 2**(i-1) + Result; - when '0' => null; - when others => return(integer'low); - end case; - end loop; - return (Result); - end S_To_d; - - -- string to decimal - - function I_To_d (Arg: string(1 to FIO_d_WIDTH+1)) return integer is - constant Sign: character := Arg(1); - constant Value: string(Arg'length-1 downto 1) := Arg(2 to Arg'length); - variable Char: character; - variable Result: integer := 0; - begin - Result := 0; - for i in Value'range loop - Result := Result * 10; - Char := Value(i); - if (Char /= ' ') then - Result := Result + C_DIGIT_CHARS_MAP(Char); - end if; - end loop; - case Sign is when '-' => return(-Result); - when others => return(Result); - end case; - end I_To_d; - - -- boolean (0,1) to decimal - - function B_To_d (Arg: string(1 to 1)) return integer is - begin - case Arg is when "1" => return(1); - when "0" => return(0); - when others => return(-1); - end case; - end B_To_d; - - -- boolean (T,F) to decimal - - function L_To_d (Arg: string(1 to 1)) return integer is - begin - case Arg is when "T" => return(1); - when others => return(0); - end case; - end L_To_d; - - - - ---------------------------- - -- Hex conversion support -- - ---------------------------- - - -- Constants & types - - constant C_HEX_CHARS: string(1 to 17) := "0123456789ABCDEF?"; - - -- Function to return Hex index of a nibble - - function U_To_h_Index(Arg: string(4 downto 1)) return integer is - variable Index: integer := 0; - begin - for i in Arg'range loop - case Arg(i) is when '1' => Index := 2**(i-1) + Index; - when '0' => null; - when others => return (17); - end case; - end loop; - return (Index+1); - end U_To_h_Index; - - -- Hex conversion - - function U_To_h (Arg: string) return string is - variable Result: string((Arg'length-1)/4 +1 downto 1); - variable ExtArg: string(Result'length*4 downto 1) := (others => '0'); - begin - ExtArg(Arg'length downto 1) := Arg; - for i in Result'range loop - Result(i) := C_HEX_CHARS(U_To_h_Index( ExtArg(i*4 downto i*4 -3) )); - end loop; - return (FIO_h_PRE & Result & FIO_h_POST); - end U_To_h; - - - - ---------------------------- - -- Bit conversion support -- - ---------------------------- - - function L_To_b (Arg: string(1 to 1)) return string is - variable Result: string(1 to 1); - begin - case Arg is when "T" => Result := "1"; - when others => Result := "0"; - end case; - return(FIO_b_PRE & Result & FIO_b_POST); - end L_To_b; - - - function I_To_b (Arg: string(1 to FIO_d_WIDTH+1); - Justified: side; - Width: integer) return string is - - variable IntValue: integer := I_To_d(Arg); - variable BitValue: string(1 to FIO_b_WIDTH) := (others => ' '); - variable Sign: character := ' '; - constant Blanks: string(1 to FIO_b_WIDTH) := (others => ' '); - variable BitWidth: integer range 0 to FIO_b_WIDTH; - variable MsPos: integer range 1 to BitValue'length; - variable BitValueExtended: string(1 to 2*FIO_b_WIDTH); - - begin - - if (IntValue < 0) then - Sign := '-'; - IntValue := -IntValue; - end if; - - for i in BitValue'reverse_range loop - BitValue(i) := C_DIGITS_MAP(IntValue mod 2); - IntValue := IntValue / 2; - exit when (IntValue = 0); - end loop; - - BitValueExtended := BitValue & Blanks; - - if (Width = 0) or (Width > FIO_b_WIDTH+1) then - BitWidth := FIO_b_WIDTH; - else - BitWidth := Width-1; - end if; - - if (Justified = RIGHT) then - return (FIO_bv_PRE & - Sign & BitValue(BitValue'length-BitWidth+1 to BitValue'length) & - FIO_bv_POST); - else - for i in BitValue'range loop - if BitValue(i) /= ' ' then - MSPos := i; - exit; - end if; - end loop; - return (FIO_bv_PRE & - Sign & BitValueExtended(MSPos to MSPos+BitWidth-1) & - FIO_bv_POST); - end if; - - end I_To_b; - - - ----------------------------------- - -- Reasonable conversion support -- - ----------------------------------- - - function I_To_r (Arg: string(1 to FIO_d_WIDTH+1); - Justified: side; - Width: integer) return string is - constant Value: string(1 to FIO_d_WIDTH) := Arg(2 to FIO_d_WIDTH+1); - constant Sign: character := Arg(1); - constant Blanks: string(1 to FIO_d_WIDTH) := (others => ' '); - variable IntWidth: integer range 0 to FIO_d_WIDTH; - variable MsPos: integer range 1 to Value'length; - variable ValueExtended: string(1 to 2*FIO_d_WIDTH) := Value & Blanks; - begin - if (Width = 0) or (Width > FIO_d_WIDTH+1) then - IntWidth := FIO_d_WIDTH; - else - IntWidth := Width-1; - end if; - if (Justified = RIGHT) then - return (Sign & Value(Value'length-IntWidth+1 to Value'length)); - else - for i in Value'range loop - if Value(i) /= ' ' then - MSPos := i; - exit; - end if; - end loop; - return (Sign & ValueExtended(MSPos to MSPos+IntWidth-1)); - end if; - end I_To_r; - - - ------------------------------------------- - -- Reasonable output conversion function -- - ------------------------------------------- - - function ReasonableOutput (Arg: string; - Justified: side; - Width: integer) return string is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:" | "S:" | "V:" => - return U_To_h(Value); - when "I:" => - return I_To_r(Value, Justified, Width); - when "B:" | "L:" | "C:" => - return Value; - when others => - return Argument; - end case; - - end ReasonableOutput; - - - ------------------------------------ - -- Bit output conversion function -- - ------------------------------------ - - function BitOutput (Arg: string; - Justified: side; - Width: integer) return string is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:" | "S:" | "V:" => - return (FIO_bv_PRE & Value & FIO_bv_POST); - when "B:" => - -- Value(1 to 1) instead of Value for LeapFrog - return (FIO_b_PRE & Value(1 to 1) & FIO_b_POST); - when "I:" => - return I_To_b(Value, Justified, Width); - when "L:" => - -- Value(1 to 1) instead of Value for LeapFrog - return L_To_b(Value(1 to 1)); - when others => - return Argument; - end case; - - end BitOutput; - - - ------------------------------------------- - -- Decimal output conversion function -- - ------------------------------------------- - - function DecimalOutput (Arg: string) return integer is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:"| "V:" => - return U_To_d(Value); - when "S:" => - return S_To_d(Value); - when "I:" => - return I_To_d(Value); - when "B:" => - return B_To_d(Value); - when "L:" => - return L_To_d(Value); - when others => - return integer'low; - end case; - - end DecimalOutput; - - - ---------------------------- - -- Atomic print functions -- - ---------------------------- - - -- test for end of format string - - function FIO_EOS (Format: in string; - Pointer: in integer) - return boolean is - begin - return (Pointer > Format'length); - end FIO_EOS; - - - -- Atomic value print function - - procedure FIO_PrintValue (F: out text; - L: inout line; - Format: in string; - Pointer: inout integer; - Last: in boolean := FALSE) is - variable Char: character; - begin - while (not FIO_EOS(Format, Pointer)) loop - Char := Format(Pointer); - case Char is - when '\' => - Pointer := Pointer + 1; - exit when (FIO_EOS(Format, Pointer)); - Char := Format(Pointer); - case Char is when 'n' => writeline(F, L); - when others => write(L, Char); - end case; - when '%' => - if Last then - FIO_Warning_Fsbla(F, L, Format, Pointer); - end if; - Pointer := Pointer + 1; - exit; - when others => - write(L, char); - end case; - Pointer := Pointer + 1; - end loop; - end FIO_PrintValue; - - - ---- Atomic argument print function - - procedure FIO_PrintArg (F: out text; - L: inout line; - Format: in string; - Pointer: inout integer; - Arg: in string) is - variable Char: character; - variable Justified: side; - variable Width: integer; - begin - - FIO_PrintValue(F, L, Format, Pointer); - - Justified := RIGHT; - Width := 0; - while (not FIO_EOS(Format, Pointer)) loop - Char := Format(Pointer); - case Char is - when '-' => - Justified := LEFT; - Pointer := Pointer + 1; - when '0' to '9' => - Width := Width*10 + C_DIGIT_CHARS_MAP(Char); - Pointer := Pointer + 1; - when 'r' => - write(L, ReasonableOutput(Arg, Justified, Width), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'b' => - write(L, BitOutput(Arg, Justified, Width), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'd' => - write(L, DecimalOutput(Arg), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'q' | 's' => - write(L, Arg, Justified, Width); - Pointer := Pointer + 1; - exit; - when others => - FIO_Warning_Ufs(F, L, Format, Pointer, Char); - write(L, Arg, Justified, Width); - Pointer := Pointer + 1; - exit; - end case; - end loop; - end FIO_PrintArg; - - - ----------------------------------------------------- - -- The format string iteration expansion procedure -- - ----------------------------------------------------- - - procedure FIO_FormatExpand (FMT: inout line; - Format: in string; - StartPointer: in positive) is - - variable Pointer: positive := StartPointer; - variable TokenStart: positive; - variable IterStringStart: positive; - variable IterStringEnd: positive; - variable IterCount: natural; - variable OpenBrackets: natural; - variable L: line; - - begin - - FORMAT_SEARCH: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - - -- look for format specifier - when '%' => - - -- initialize iteration token search - TokenStart := Pointer; - IterCount := 0; - Pointer := Pointer + 1; - - -- start iteration token search - TOKEN_READ: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - - -- read iteration counter - when '0' to '9' => - IterCount := IterCount*10 + C_DIGIT_CHARS_MAP(Format(Pointer)); - Pointer := Pointer + 1; - - -- expect open bracket - when '{' => - - -- initialize iteration string read - OpenBrackets := 1; - IterStringStart := Pointer + 1; - Pointer := Pointer + 1; - -- quit prematurely when iteration count is 0 - next FORMAT_SEARCH when (IterCount = 0); - - -- start iteration string read - ITER_STRING_READ: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - -- keep track of open brackets - when '{' => - OpenBrackets := OpenBrackets + 1; - Pointer := Pointer + 1; - -- when closing bracket is found, process iteration string - when '}' => - OpenBrackets := OpenBrackets - 1; - if (OpenBrackets = 0) then - IterStringEnd := Pointer-1; - if (TokenStart /= 1) then - write(L, Format(1 to TokenStart-1)); - end if; - for i in 1 to IterCount loop - write(L, Format(IterStringStart to IterStringEnd)); - end loop; - if (IterStringEnd /= Format'length) then - write(L, Format(IterStringEnd+2 to Format'length)); - end if; - -- call expansion procedure recursively on expanded format - FIO_FormatExpand(FMT, L.all, TokenStart); - deallocate(L); - return; - end if; - Pointer := Pointer + 1; - -- skip escaped characters - when '\' => - Pointer := Pointer + 2; - -- read iteration string - when others => - Pointer := Pointer + 1; - - end case; - - end loop ITER_STRING_READ; - - -- stop iteration token search when no opening bracket found - when others => - Pointer := Pointer + 1; - next FORMAT_SEARCH; - - end case; - - end loop TOKEN_READ; - - -- skip escaped characters - when '\' => - Pointer := Pointer + 2; - - -- read other characters - when others => - Pointer := Pointer + 1; - - end case; - - end loop FORMAT_SEARCH; - - write(FMT, Format); - deallocate(L); - - end FIO_FormatExpand; - - - - -------------------------- - -- The fprint procedure -- - -------------------------- - - procedure fprint - (F: out text; - L: inout line; - Format: in string; - A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL; - A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL; - A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL; - A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL - ) is - - variable Pointer: integer; - variable FMT: line; - - begin - - Pointer := 1; - - FIO_FormatExpand (FMT, Format, Format'low); - - if (A1 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A1 ); - if (A2 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A2 ); - if (A3 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A3 ); - if (A4 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A4 ); - if (A5 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A5 ); - if (A6 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A6 ); - if (A7 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A7 ); - if (A8 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A8 ); - if (A9 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A9 ); - if (A10 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A10); - if (A11 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A11); - if (A12 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A12); - if (A13 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A13); - if (A14 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A14); - if (A15 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A15); - if (A16 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A16); - if (A17 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A17); - if (A18 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A18); - if (A19 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A19); - if (A20 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A20); - if (A21 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A21); - if (A22 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A22); - if (A23 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A23); - if (A24 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A24); - if (A25 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A25); - if (A26 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A26); - if (A27 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A27); - if (A28 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A28); - if (A29 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A29); - if (A30 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A30); - if (A31 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A31); - if (A32 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A32); - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - - FIO_PrintValue(F, L, FMT.all, Pointer, Last => TRUE); - - deallocate(FMT); - - end fprint; - - - ------------------------------------------- - -- Formatted output conversion functions -- - ------------------------------------------- - - function fo (Arg: unsigned) return string is - constant Argument: unsigned(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("U:" & Result); - end fo; - - function fo (Arg: signed) return string is - constant Argument: signed(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("S:" & Result); - end fo; - - function fo (Arg: std_logic_vector) return string is - constant Argument: std_logic_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: std_ulogic_vector) return string is - constant Argument: std_ulogic_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: bit_vector) return string is - constant Argument: bit_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_BIT_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: integer) return string is - variable Argument: integer := Arg; - variable Result: string(1 to FIO_d_WIDTH) := (others => ' '); - variable Sign: character := ' '; - begin - if (Argument < 0) and (Argument /= integer'low) then - Sign := '-'; - Argument := -Argument; - end if; - for i in Result'reverse_range loop - Result(i) := C_DIGITS_MAP(Argument mod 10); - Argument := Argument / 10; - exit when (Argument = 0); - end loop; - return ("I:" & Sign & Result); - end fo; - - function fo (Arg: std_ulogic) return string is - begin - return ("B:" & C_STD_LOGIC_MAP(Arg)); - end fo; - - function fo (Arg: bit) return string is - begin - return ("B:" & C_BIT_MAP(Arg)); - end fo; - - function fo (Arg: boolean) return string is - begin - if (ARG = TRUE) then - return ("L:T"); - else - return ("L:F"); - end if; - end fo; - - function fo (Arg: character) return string is - begin - return ("C:" & Arg); - end fo; - - -- auxilary function fgets(Arg: string) - -- gives index until first NUL - -- reads string from 1 to Arg'length - function fgets (Arg: string) return integer is - variable index: integer := Arg'length; - begin - for i in 1 to Arg'length loop - if Arg(i) = NUL then - index := i - 1; - exit; - else - null; - end if; - end loop; - return index; - end fgets; - - function fo (Arg: string) return string is - begin - return Arg(1 to fgets(Arg)); - end fo; - - function fo (Arg: time) return string is - begin - return fo (integer (Arg / 1 ns)); - end fo; - -end PCK_FIO; - - - - - - - - - - - - - diff --git a/lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd b/lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd deleted file mode 100644 index 9df893e..0000000 --- a/lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd +++ /dev/null @@ -1,108 +0,0 @@ ----- $Id: PCK_FIO_1993.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - - -use STD.TEXTIO.all; - -library IEEE; -use IEEE.std_logic_1164.all; --- signed/unsigned definition: use either std_logic_arith or numeric_std --- use IEEE.std_logic_arith.all; -- the Synopsys one -use IEEE.numeric_std.all; - -package PCK_FIO is - - - -- prefix string for hex output - -- VHDL style: "X""" - -- Verilog style: "h'" - -- C style: "0x" - constant FIO_h_PRE: string := "0x"; - - -- postfix string for hex output - -- VHDL style: """" - constant FIO_h_POST: string := ""; - - -- prefix string for bit vector output - -- VHDL style: "B""" - -- Verilog style: "b'" - constant FIO_bv_PRE: string := ""; - - -- postfix string for bit vector output - -- VHDL style: """" - constant FIO_bv_POST: string := ""; - - -- prefix string for bit output - -- VHDL style: "'" - -- Verilog style: "b'" - constant FIO_b_PRE: string := ""; - - -- postfix string for bit output - -- VHDL style: "'" - constant FIO_b_POST: string := ""; - - -- digit width for the string representation of integers - constant FIO_d_WIDTH: integer := 10; - - -- bit width for the string representation of integers - constant FIO_b_WIDTH: integer := 32; - - -- definition of the NIL string (default value for fprint arguments) - -- fprint stops consuming arguments at the first NIL argument - constant FIO_NIL: string := "\"; - - procedure fprint - (file F: text; - L: inout line; - Format: in string; - A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL; - A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL; - A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL; - A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL - ); - - function fo (Arg: unsigned) return string; - function fo (Arg: signed) return string; - function fo (Arg: std_logic_vector) return string; - function fo (Arg: std_ulogic_vector) return string; - function fo (Arg: bit_vector) return string; - function fo (Arg: integer) return string; - function fo (Arg: std_ulogic) return string; - function fo (Arg: bit) return string; - function fo (Arg: boolean) return string; - function fo (Arg: character) return string; - function fo (Arg: string) return string; - function fo (Arg: time) return string; - - procedure FIO_FormatExpand (FMT: inout line; - Format: in string; - StartPointer: in positive); - -end PCK_FIO; - - - diff --git a/lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd b/lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd deleted file mode 100644 index 3d123f0..0000000 --- a/lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd +++ /dev/null @@ -1,814 +0,0 @@ ----- $Id: PCK_FIO_1993_BODY.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - - - package body PCK_FIO is - - -------------------------- - -- FIO Warnings support -- - -------------------------- - - procedure FIO_Warning_Fsbla (file F: text; - L: inout line; - Format: in string; - Pointer: in positive) is - begin - fprint (F, L, "\n** Warning: FIO_PrintLastValue: " & - "Format specifier beyond last argument\n"); - fprint (F, L, "** in format string: ""%s""\n", Format); - fprint (F, L, "** "); - for i in 1 to Pointer-1 loop - fprint (F, L, "-"); - end loop; - fprint (F, L, "^\n"); - end FIO_Warning_Fsbla; - - procedure FIO_Warning_Ufs (file F: text; - L: inout line; - Format: in string; - Pointer: in positive; - Char: in character) is - begin - fprint (F, L, "\n** Warning: FIO_PrintArg: " & - "Unexpected format specifier '%r'\n", - fo(Char)); - fprint (F, L, "** in format string: ""%s""\n", Format) ; - fprint (F, L, "** "); - for i in 1 to Pointer-1 loop - fprint (F, L, "-"); - end loop; - fprint (F, L, "^\n** Assuming 'q' to proceed: "); - end FIO_Warning_Ufs; - - - ---------------------------------- - -- bit conversion support -- - ---------------------------------- - - type T_bit_map is array(bit) of character; - - constant C_BIT_MAP: T_bit_map - := ('0', '1'); - - ---------------------------------- - -- std_logic conversion support -- - ---------------------------------- - - type T_std_logic_map is array(std_ulogic) of character; - - constant C_STD_LOGIC_MAP: T_std_logic_map - := ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-'); - - ------------------------------ - -- Digit conversion support -- - ------------------------------ - - -- types & constants - - subtype S_digit_chars is character range '0' to '9'; - subtype S_digits is integer range 0 to 9 ; - - type T_digit_chars_map is array(S_digit_chars) of S_digits; - - constant C_DIGIT_CHARS_MAP: T_digit_chars_map - := (0, 1, 2, 3, 4, 5, 6, 7, 8, 9); - - type T_digits_map is array(S_digits) of S_digit_chars; - - constant C_DIGITS_MAP: T_digits_map - := ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9'); - - - -------------------------------- - -- Decimal conversion support -- - -------------------------------- - - -- unsigned to decimal - - function U_To_d (Arg: string) return integer is - constant Argument: string(Arg'length downto 1) := Arg; - variable Result: integer := 0; - begin - for i in Argument'range loop - case Argument(i) is when '1' => Result := 2**(i-1) + Result; - when '0' => null; - when others => return(-1); - end case; - end loop; - return (Result); - end U_To_d; - - -- signed to decimal - - function S_To_d (Arg: string) return integer is - constant Argument: string(Arg'length downto 1) := Arg; - variable Result: integer := 0; - begin - case Argument(Argument'left) is - when '1' => Result := - 2**(Argument'left-1); - when '0' => Result := 0; - when others => return (integer'low); - end case; - for i in Argument'left-1 downto 1 loop - case Argument(i) is when '1' => Result := 2**(i-1) + Result; - when '0' => null; - when others => return(integer'low); - end case; - end loop; - return (Result); - end S_To_d; - - -- string to decimal - - function I_To_d (Arg: string(1 to FIO_d_WIDTH+1)) return integer is - constant Sign: character := Arg(1); - constant Value: string(Arg'length-1 downto 1) := Arg(2 to Arg'length); - variable Char: character; - variable Result: integer := 0; - begin - Result := 0; - for i in Value'range loop - Result := Result * 10; - Char := Value(i); - if (Char /= ' ') then - Result := Result + C_DIGIT_CHARS_MAP(Char); - end if; - end loop; - case Sign is when '-' => return(-Result); - when others => return(Result); - end case; - end I_To_d; - - -- boolean (0,1) to decimal - - function B_To_d (Arg: string(1 to 1)) return integer is - begin - case Arg is when "1" => return(1); - when "0" => return(0); - when others => return(-1); - end case; - end B_To_d; - - -- boolean (T,F) to decimal - - function L_To_d (Arg: string(1 to 1)) return integer is - begin - case Arg is when "T" => return(1); - when others => return(0); - end case; - end L_To_d; - - - - ---------------------------- - -- Hex conversion support -- - ---------------------------- - - -- Constants & types - - constant C_HEX_CHARS: string(1 to 17) := "0123456789ABCDEF?"; - - -- Function to return Hex index of a nibble - - function U_To_h_Index(Arg: string(4 downto 1)) return integer is - variable Index: integer := 0; - begin - for i in Arg'range loop - case Arg(i) is when '1' => Index := 2**(i-1) + Index; - when '0' => null; - when others => return (17); - end case; - end loop; - return (Index+1); - end U_To_h_Index; - - -- Hex conversion - - function U_To_h (Arg: string) return string is - variable Result: string((Arg'length-1)/4 +1 downto 1); - variable ExtArg: string(Result'length*4 downto 1) := (others => '0'); - begin - ExtArg(Arg'length downto 1) := Arg; - for i in Result'range loop - Result(i) := C_HEX_CHARS(U_To_h_Index( ExtArg(i*4 downto i*4 -3) )); - end loop; - return (FIO_h_PRE & Result & FIO_h_POST); - end U_To_h; - - - - ---------------------------- - -- Bit conversion support -- - ---------------------------- - - function L_To_b (Arg: string(1 to 1)) return string is - variable Result: string(1 to 1); - begin - case Arg is when "T" => Result := "1"; - when others => Result := "0"; - end case; - return(FIO_b_PRE & Result & FIO_b_POST); - end L_To_b; - - - function I_To_b (Arg: string(1 to FIO_d_WIDTH+1); - Justified: side; - Width: integer) return string is - - variable IntValue: integer := I_To_d(Arg); - variable BitValue: string(1 to FIO_b_WIDTH) := (others => ' '); - variable Sign: character := ' '; - constant Blanks: string(1 to FIO_b_WIDTH) := (others => ' '); - variable BitWidth: integer range 0 to FIO_b_WIDTH; - variable MsPos: integer range 1 to BitValue'length; - variable BitValueExtended: string(1 to 2*FIO_b_WIDTH); - - begin - - if (IntValue < 0) then - Sign := '-'; - IntValue := -IntValue; - end if; - - for i in BitValue'reverse_range loop - BitValue(i) := C_DIGITS_MAP(IntValue mod 2); - IntValue := IntValue / 2; - exit when (IntValue = 0); - end loop; - - BitValueExtended := BitValue & Blanks; - - if (Width = 0) or (Width > FIO_b_WIDTH+1) then - BitWidth := FIO_b_WIDTH; - else - BitWidth := Width-1; - end if; - - if (Justified = RIGHT) then - return (FIO_bv_PRE & - Sign & BitValue(BitValue'length-BitWidth+1 to BitValue'length) & - FIO_bv_POST); - else - for i in BitValue'range loop - if BitValue(i) /= ' ' then - MSPos := i; - exit; - end if; - end loop; - return (FIO_bv_PRE & - Sign & BitValueExtended(MSPos to MSPos+BitWidth-1) & - FIO_bv_POST); - end if; - - end I_To_b; - - - ----------------------------------- - -- Reasonable conversion support -- - ----------------------------------- - - function I_To_r (Arg: string(1 to FIO_d_WIDTH+1); - Justified: side; - Width: integer) return string is - constant Value: string(1 to FIO_d_WIDTH) := Arg(2 to FIO_d_WIDTH+1); - constant Sign: character := Arg(1); - constant Blanks: string(1 to FIO_d_WIDTH) := (others => ' '); - variable IntWidth: integer range 0 to FIO_d_WIDTH; - variable MsPos: integer range 1 to Value'length; - variable ValueExtended: string(1 to 2*FIO_d_WIDTH) := Value & Blanks; - begin - if (Width = 0) or (Width > FIO_d_WIDTH+1) then - IntWidth := FIO_d_WIDTH; - else - IntWidth := Width-1; - end if; - if (Justified = RIGHT) then - return (Sign & Value(Value'length-IntWidth+1 to Value'length)); - else - for i in Value'range loop - if Value(i) /= ' ' then - MSPos := i; - exit; - end if; - end loop; - return (Sign & ValueExtended(MSPos to MSPos+IntWidth-1)); - end if; - end I_To_r; - - - ------------------------------------------- - -- Reasonable output conversion function -- - ------------------------------------------- - - function ReasonableOutput (Arg: string; - Justified: side; - Width: integer) return string is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:" | "S:" | "V:" => - return U_To_h(Value); - when "I:" => - return I_To_r(Value, Justified, Width); - when "B:" | "L:" | "C:" => - return Value; - when others => - return Argument; - end case; - - end ReasonableOutput; - - - ------------------------------------ - -- Bit output conversion function -- - ------------------------------------ - - function BitOutput (Arg: string; - Justified: side; - Width: integer) return string is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:" | "S:" | "V:" => - return (FIO_bv_PRE & Value & FIO_bv_POST); - when "B:" => - -- Value(1 to 1) instead of Value for LeapFrog - return (FIO_b_PRE & Value(1 to 1) & FIO_b_POST); - when "I:" => - return I_To_b(Value, Justified, Width); - when "L:" => - -- Value(1 to 1) instead of Value for LeapFrog - return L_To_b(Value(1 to 1)); - when others => - return Argument; - end case; - - end BitOutput; - - - ------------------------------------------- - -- Decimal output conversion function -- - ------------------------------------------- - - function DecimalOutput (Arg: string) return integer is - constant Argument: string(1 to Arg'length) := Arg; - constant TypeSpec: string (1 to 2) := Argument(1 to 2); - constant Value: string(1 to Arg'length-2) := Argument(3 to Arg'length); - begin - case TypeSpec is - when "U:"| "V:" => - return U_To_d(Value); - when "S:" => - return S_To_d(Value); - when "I:" => - return I_To_d(Value); - when "B:" => - return B_To_d(Value); - when "L:" => - return L_To_d(Value); - when others => - return integer'low; - end case; - - end DecimalOutput; - - - ---------------------------- - -- Atomic print functions -- - ---------------------------- - - -- test for end of format string - - function FIO_EOS (Format: in string; - Pointer: in integer) - return boolean is - begin - return (Pointer > Format'length); - end FIO_EOS; - - - -- Atomic value print function - - procedure FIO_PrintValue (file F: text; - L: inout line; - Format: in string; - Pointer: inout integer; - Last: in boolean := FALSE) is - variable Char: character; - begin - while (not FIO_EOS(Format, Pointer)) loop - Char := Format(Pointer); - case Char is - when '\' => - Pointer := Pointer + 1; - exit when (FIO_EOS(Format, Pointer)); - Char := Format(Pointer); - case Char is when 'n' => writeline(F, L); - when others => write(L, Char); - end case; - when '%' => - if Last then - FIO_Warning_Fsbla(F, L, Format, Pointer); - end if; - Pointer := Pointer + 1; - exit; - when others => - write(L, char); - end case; - Pointer := Pointer + 1; - end loop; - end FIO_PrintValue; - - - ---- Atomic argument print function - - procedure FIO_PrintArg (file F: text; - L: inout line; - Format: in string; - Pointer: inout integer; - Arg: in string) is - variable Char: character; - variable Justified: side; - variable Width: integer; - - begin - - FIO_PrintValue(F, L, Format, Pointer); - - Justified := RIGHT; - Width := 0; - while (not FIO_EOS(Format, Pointer)) loop - Char := Format(Pointer); - case Char is - when '-' => - Justified := LEFT; - Pointer := Pointer + 1; - when '0' to '9' => - Width := Width*10 + C_DIGIT_CHARS_MAP(Char); - Pointer := Pointer + 1; - when 'r' => - write(L, ReasonableOutput(Arg, Justified, Width), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'b' => - write(L, BitOutput(Arg, Justified, Width), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'd' => - write(L, DecimalOutput(Arg), Justified, Width); - Pointer := Pointer + 1; - exit; - when 'q' | 's' => - write(L, Arg, Justified, Width); - Pointer := Pointer + 1; - exit; - when others => - FIO_Warning_Ufs(F, L, Format, Pointer, Char); - write(L, Arg, Justified, Width); - Pointer := Pointer + 1; - exit; - end case; - end loop; - end FIO_PrintArg; - - - ----------------------------------------------------- - -- The format string iteration expansion procedure -- - ----------------------------------------------------- - - procedure FIO_FormatExpand (FMT: inout line; - Format: in string; - StartPointer: in positive) is - - variable Pointer: positive := StartPointer; - variable TokenStart: positive; - variable IterStringStart: positive; - variable IterStringEnd: positive; - variable IterCount: natural; - variable OpenBrackets: natural; - variable L: line; - - begin - - FORMAT_SEARCH: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - - -- look for format specifier - when '%' => - - -- initialize iteration token search - TokenStart := Pointer; - IterCount := 0; - Pointer := Pointer + 1; - - -- start iteration token search - TOKEN_READ: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - - -- read iteration counter - when '0' to '9' => - IterCount := IterCount*10 + C_DIGIT_CHARS_MAP(Format(Pointer)); - Pointer := Pointer + 1; - - -- expect open bracket - when '{' => - - -- initialize iteration string read - OpenBrackets := 1; - IterStringStart := Pointer + 1; - Pointer := Pointer + 1; - -- quit prematurely when iteration count is 0 - next FORMAT_SEARCH when (IterCount = 0); - - -- start iteration string read - ITER_STRING_READ: while not FIO_EOS(Format, Pointer) loop - - case Format(Pointer) is - -- keep track of open brackets - when '{' => - OpenBrackets := OpenBrackets + 1; - Pointer := Pointer + 1; - -- when closing bracket is found, process iteration string - when '}' => - OpenBrackets := OpenBrackets - 1; - if (OpenBrackets = 0) then - IterStringEnd := Pointer-1; - if (TokenStart /= 1) then - write(L, Format(1 to TokenStart-1)); - end if; - for i in 1 to IterCount loop - write(L, Format(IterStringStart to IterStringEnd)); - end loop; - if (IterStringEnd /= Format'length) then - write(L, Format(IterStringEnd+2 to Format'length)); - end if; - -- call expansion procedure recursively on expanded format - FIO_FormatExpand(FMT, L.all, TokenStart); - deallocate(L); - return; - end if; - Pointer := Pointer + 1; - -- skip escaped characters - when '\' => - Pointer := Pointer + 2; - -- read iteration string - when others => - Pointer := Pointer + 1; - - end case; - - end loop ITER_STRING_READ; - - -- stop iteration token search when no opening bracket found - when others => - Pointer := Pointer + 1; - next FORMAT_SEARCH; - - end case; - - end loop TOKEN_READ; - - -- skip escaped characters - when '\' => - Pointer := Pointer + 2; - - -- read other characters - when others => - Pointer := Pointer + 1; - - end case; - - end loop FORMAT_SEARCH; - - write(FMT, Format); - deallocate(L); - - end FIO_FormatExpand; - - - - -------------------------- - -- The fprint procedure -- - -------------------------- - - procedure fprint - (file F: text; - L: inout line; - Format: in string; - A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL; - A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL; - A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL; - A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL - ) is - - variable Pointer: integer; - variable FMT: line; - - begin - - Pointer := 1; - - FIO_FormatExpand (FMT, Format, Format'low); - - if (A1 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A1 ); - if (A2 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A2 ); - if (A3 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A3 ); - if (A4 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A4 ); - if (A5 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A5 ); - if (A6 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A6 ); - if (A7 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A7 ); - if (A8 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A8 ); - if (A9 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A9 ); - if (A10 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A10); - if (A11 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A11); - if (A12 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A12); - if (A13 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A13); - if (A14 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A14); - if (A15 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A15); - if (A16 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A16); - if (A17 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A17); - if (A18 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A18); - if (A19 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A19); - if (A20 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A20); - if (A21 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A21); - if (A22 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A22); - if (A23 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A23); - if (A24 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A24); - if (A25 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A25); - if (A26 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A26); - if (A27 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A27); - if (A28 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A28); - if (A29 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A29); - if (A30 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A30); - if (A31 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A31); - if (A32 /= FIO_NIL) then FIO_PrintArg(F, L, FMT.all, Pointer, A32); - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - end if; end if; end if; end if; end if; end if; end if; end if; - - FIO_PrintValue(F, L, FMT.all, Pointer, Last => TRUE); - - deallocate(FMT); - - end fprint; - - - ------------------------------------------- - -- Formatted output conversion functions -- - ------------------------------------------- - - function fo (Arg: unsigned) return string is - constant Argument: unsigned(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("U:" & Result); - end fo; - - function fo (Arg: signed) return string is - constant Argument: signed(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("S:" & Result); - end fo; - - function fo (Arg: std_logic_vector) return string is - constant Argument: std_logic_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: std_ulogic_vector) return string is - constant Argument: std_ulogic_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_STD_LOGIC_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: bit_vector) return string is - constant Argument: bit_vector(1 to Arg'length) := Arg; - variable Result: string(1 to Arg'length); - begin - for i in Argument'range loop - Result(i) := C_BIT_MAP(Argument(i)); - end loop; - return ("V:" & Result); - end fo; - - function fo (Arg: integer) return string is - variable Argument: integer := Arg; - variable Result: string(1 to FIO_d_WIDTH) := (others => ' '); - variable Sign: character := ' '; - begin - if (Argument < 0) and (Argument /= integer'low) then - Sign := '-'; - Argument := -Argument; - end if; - for i in Result'reverse_range loop - Result(i) := C_DIGITS_MAP(Argument mod 10); - Argument := Argument / 10; - exit when (Argument = 0); - end loop; - return ("I:" & Sign & Result); - end fo; - - function fo (Arg: std_ulogic) return string is - begin - return ("B:" & C_STD_LOGIC_MAP(Arg)); - end fo; - - function fo (Arg: bit) return string is - begin - return ("B:" & C_BIT_MAP(Arg)); - end fo; - - function fo (Arg: boolean) return string is - begin - if (ARG = TRUE) then - return ("L:T"); - else - return ("L:F"); - end if; - end fo; - - function fo (Arg: character) return string is - begin - return ("C:" & Arg); - end fo; - - -- auxilary function fgets(Arg :string) - -- returns index of first NUL in Arg or if no NUL is present just Arg'length - -- goes through Arg from 1 to Arg'length - function fgets (Arg: string) return integer is - variable index: integer := Arg'length; - begin - for i in 1 to Arg'length loop - if Arg(i) = NUL then - index := i - 1; - exit; - else - null; - end if; - end loop; - return index; - end fgets; - - -- returns the Arg string until the first NUL was encountered - -- if fo is used on a string with NUL in it it will stop reading the rest - -- of the string, even if a larger field width has been supplied. fo will - -- then just pad the remaining characters with blanco's - function fo (Arg: string) return string is - begin - return Arg(1 to fgets(Arg)); - end fo; - - function fo (Arg: time) return string is - begin - return fo (integer (Arg / 1 ns)); - end fo; - -end PCK_FIO; - diff --git a/lib/PCK_FIO-2002.7/README b/lib/PCK_FIO-2002.7/README deleted file mode 100644 index b16c6c5..0000000 --- a/lib/PCK_FIO-2002.7/README +++ /dev/null @@ -1,88 +0,0 @@ ----- $Id: README,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - -Version 2002.07 -=============== - -Contents -======== - -This distribution contains the following files: - - PCK_FIO_1987.vhd: VHDL-87 source of the header of the PCK_FIO package - PCK_FIO_1987_BODY.vhd: VHDL-87 source of the body of the PCK_FIO package - PCK_FIO_1993.vhd: VHDL-93 source of the header of the PCK_FIO package - PCK_FIO_1993_BODY.vhd: VHDL-93 source of the body of the PCK_FIO package - TB_PCK_FIO_1987.vhd: VHDL-87 source of the testbench for package PCK_FIO - TB_PCK_FIO_1993.vhd: VHDL-93 source of the testbench for package PCK_FIO - PCK_FIO.out.gold: Certified test bench output - PCK_FIO.html: Manual for PCK_FIO in html format - README: This file - - -Installation -============ - -VHDL-1987 ---------- -To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and -analyze the VHDL file PCK_FIO_1987.vhd and PCK_FIO_1987_BODY.vhd into this library. - -To install the test bench, analyze TB_PCK_FIO_1987.vhd into the same library. - -VHDL-1993 ---------- -To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and -analyze the VHDL file PCK_FIO_1993.vhd and PCK_FIO_1993_BODY.vhd into this library. - -To install the test bench, analyze TB_PCK_FIO_1993.vhd into the same library. - -Numeric packages ----------------- -If you want to use IEEE.std_logic_arith instead of IEEE.numeric_std, you need -to edit the source code of the package, both header and body, and the test bench -and replace the package use clause. PCK_FIO works with either of these packages. - -Documentation -------------- -To install the documentation, put the file point PCK_FIO.html in a path of -your choosing, point your web browser to it, and bookmark it. - - -Installation check -================== - -After installing the test bench, you should run it. The corresponding VHDL -design unit is EASICS_PACKAGES.TBE_PCK_FIO(TB). - -Simulating the test bench should create a file called PCK_FIO.out. This file -should be identical to PCK_FIO.out.gold. Any difference indicates a portability -issue or a simulator non-compliance or bug. - - - - diff --git a/lib/PCK_FIO-2002.7/TB_PCK_FIO_1987.vhd b/lib/PCK_FIO-2002.7/TB_PCK_FIO_1987.vhd deleted file mode 100644 index 2e18ff4..0000000 --- a/lib/PCK_FIO-2002.7/TB_PCK_FIO_1987.vhd +++ /dev/null @@ -1,531 +0,0 @@ ----- $Id: TB_PCK_FIO_1987.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - - -library IEEE; -use IEEE.std_logic_1164.all; --- signed/unsigned definition: use either std_logic_arith or numeric_std --- use IEEE.std_logic_arith.all; -- the Synopsys one - use IEEE.numeric_std.all; - -use STD.TEXTIO.all; - -library EASICS_PACKAGES; -use EASICS_PACKAGES.PCK_FIO.all; - -entity TBE_PCK_FIO is - -end TBE_PCK_FIO; - -architecture TB of TBE_PCK_FIO is - -begin - -USAGE: process - - file RESULT: text is out "PCK_FIO.out"; - variable L: line; - variable Pointer: integer; - variable BoolTrue: boolean := TRUE; - variable BoolFalse: boolean := FALSE; - variable IntPos: integer := 5678; - variable BigIntPos: integer := 12345678; - variable IntNeg: integer := -8765; - variable BigIntNeg: integer := -87654321; - variable Uns: unsigned(6 downto 0) := unsigned'("1010010"); - variable Unk: unsigned(6 downto 0) := unsigned'("1X10Z10"); - variable Std: std_logic_vector(6 downto 0) := std_logic_vector'("0010010"); - variable SigPos: signed(6 downto 0) := signed'("0010010"); - variable SigNeg: signed(6 downto 0) := signed'("1010010"); - variable BitX: std_logic := 'X'; - variable Bit1: std_logic := '1'; - variable Bit0: std_logic := '0'; - - variable parameter_1: integer := 1234; - variable parameter_2: integer := 2345; - variable parameter_3: integer := 4567; - - constant TempString: string :="ABC" & NUL & "DEF"; -begin - -fprint(RESULT, L, - "PCK_FIO.out: TESTBENCH OUTPUT FOR PCK_FIO\n" & - "-----------------------------------------\n\n" & - "This is the result of running the PCK_FIO testbench.\n" & - "This file should be compared with PCK_FIO.out.gold, which is\n" & - "the reference output. Any difference indicates a portability\n" & - "issue or a simulator non-compliance or bug.\n\n" - ); - - -fprint(RESULT, L, - "\n--------------------\n" & - "-- Basic features --\n" & - "--------------------\n\n" - ); - -fprint(RESULT, L, - "-- First some auxiliary declarations\n" - ); - -fprint(RESULT, L, - "> file RESULT: text is out ""PCK_FIO.out"";\n" & - "> variable L: line;\n" & - "> variable BoolTrue: boolean := TRUE;\n" & - "> variable BoolFalse: boolean := FALSE;\n" & - "> variable IntPos: integer := 5678;\n" & - "> variable BigIntPos: integer := 12345678;\n" & - "> variable IntNeg: integer := -8765;\n" & - "> variable BigIntNeg: integer := -87654321;\n" & - "> variable Uns: unsigned(6 downto 0) := unsigned'(""1010010"");\n" & - "> variable Unk: unsigned(6 downto 0) := unsigned'(""1X10Z10"");\n" & - "> variable Std: std_logic_vector(6 downto 0) := std_logic_vector'(""0010010"");\n" & - "> variable SigPos: signed(6 downto 0) := signed'(""0010010"");\n" & - "> variable SigNeg: signed(6 downto 0) := signed'(""1010010"");\n" & - "> variable BitX: std_logic := 'X';\n" & - "> variable Bit1: std_logic := '1';\n" & - "> variable Bit0: std_logic := '0';\n" & - "> constant TempString: string := ""ABC"" & NUL & ""DEF"";\n" -); - - -fprint(RESULT, L, - "\n\n-- fprint call with no arguments\n" & - "> fprint(RESULT, L, ""No arguments.\\n"");\n" - ); -fprint(RESULT, L, "No arguments.\n"); - - -fprint(RESULT, L, - "\n-- Special characters need to be escaped\n" & - "> fprint(RESULT, L, ""Special characters: \\\% \\\\ "" \\n"");\n" - ); - -fprint(RESULT, L, "Special characters: \% \\ "" \n"); - - -fprint(RESULT, L, - "\n-- Various format specifiers interprete the same object differently\n" & - "> fprint(RESULT, L, ""Format specifiers: \%r \%d \%b \%q\\n"",\n" & - "> fo(Uns), fo(Uns), fo(Uns), fo(Uns)\n" & - "> );\n" - ); - -fprint(RESULT, L, "Format specifiers: %r %d %b %q\n", - fo(Uns), fo(Uns), fo(Uns), fo(Uns) - ); - -fprint(RESULT, L, - "\n-- Format string can be shortened by using the iteration specifier\n" & - "> fprint(RESULT, L, ""Iteration specifier: \%4{\%r }\\n"",\n" & - "> fo(Uns), fo(SigPos), fo(SigNeg), fo(Std)\n" & - "> );\n" - ); - -fprint(RESULT, L, "Iteration specifier: %4{%r }\n", - fo(Uns), fo(SigPos), fo(SigNeg), fo(Std) - ); -fprint(RESULT, L, - "\n-------------------------------\n"& - "--Testing string manipulation--\n"& - "-------------------------------\n"); -fprint(RESULT, L, "--testing done using the string TempString : " & """ABC""" - & " & NUL & ""DEF""\n"); --- temp_string: string:="ABC"&NUL&"DEF" --- test for detecting NUL in string -fprint(RESULT, L, "\n--test for NUL ending in strings\n"); -fprint(RESULT, L, "> fprint(RESULT, L, fo(TempString));\n"); -fprint(RESULT, L, fo(TempString)); - --- direct inclusion of string in fprint should give whole string -fprint(RESULT, L, "\n--same without fo,so without NUL testing\n"); -fprint(RESULT, L, "> fprint(RESULT, L, TempString);\n"); -fprint(RESULT, L, TempString & "\n"); - --- influence of given width - -fprint(RESULT, L, "\n--if there are less characters in the given string then" - & " in the width fo will\n"& - "-- pad the remaining with blanco's according to the given justification\n"); -fprint(RESULT, L, "\n--with specified width, justified right,using fo\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%5s"", fo(TempString));\n"); -fprint(RESULT, L, "%5s", fo(TempString)); -fprint(RESULT, L, "\n--with specified width, justified left, using fo\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%-5s"", fo(TempString));\n"); -fprint(RESULT, L, "%-5s",fo(TempString)); -fprint(RESULT, L, "\n--with specified width without fo\n"); -fprint(RESUlT, L, "> fprint(RESULT, L, ""\%9s"", TempString);\n"); -fprint(RESULT, L, "%9s", TempString); -fprint(RESULT, L, "\n\n-- if the width is smaller then the number" & - " of characters in the string fprint\n" & - "-- will output the string with the minimum of characters needed\n"); -fprint(RESULT, L, "\n--with specified width,using fo\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%2s"", fo(TempString));\n"); -fprint(RESULT, L, "%2s",fo(TempString)); -fprint(RESULT, L, "\n--with specified width without fo\n"); -fprint(RESUlT, L, "> fprint(RESULT, L, ""\%4s"", TempString);\n"); -fprint(RESULT, L, "%4s", TempString); - - -fprint(RESULT, L, - "\n\n------------------------------------\n" & - "-- Support for bit-oriented types --\n" & - "------------------------------------\n" - ); - -fprint (RESULT, L, "\n-- Reasonable format\n" & - "> fprint(RESULT, L, ""Reasonable format: \%9{\%r }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Reasonable format: %9{%r }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint (RESULT, L, "\n-- Decimal format\n" & - "> fprint(RESULT, L, ""Decimal format: \%7{\%d }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Decimal format: %9{%d }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint (RESULT, L, "\n-- Bit format\n" & - "> fprint(RESULT, L, ""Bit format: \%7{\%b }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Bit format: %9{%b }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint(RESULT, L, - "\n\n" & - "-- Alignment\n-- Template of the call: ( stands for the format specifier)\n" - ); - - -fprint(RESULT, L, "\n" & - "> fprint(RESULT, L, ""Bitvectors with : \%4{|}\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg)\n" & - - "> );\n" - ); - -fprint(RESULT, L, - "\n" & - "-- Results of the call with various format specifiers\n\n" - ); - -fprint(RESULT, L, "Bitvectors with \%1r: %4{%1r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%2r: %4{%2r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%3r: %4{%3r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%4r: %4{%4r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%5r: %4{%5r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%6r: %4{%6r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%7r: %4{%7r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%8r: %4{%8r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%9r: %4{%9r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%-1r: %4{%-1r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-2r: %4{%-2r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-3r: %4{%-3r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-4r: %4{%-4r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-5r: %4{%-5r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-6r: %4{%-6r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-7r: %4{%-7r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-8r: %4{%-8r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-9r: %4{%-9r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%1d: %4{%1d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%2d: %4{%2d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%3d: %4{%3d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%4d: %4{%4d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%5d: %4{%5d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%6d: %4{%6d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%7d: %4{%7d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%8d: %4{%8d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%9d: %4{%9d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%-1d: %4{%-1d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-2d: %4{%-2d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-3d: %4{%-3d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-4d: %4{%-4d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-5d: %4{%-5d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-6d: %4{%-6d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-7d: %4{%-7d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-8d: %4{%-8d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-9d: %4{%-9d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); - - - -fprint(RESULT, L, - "\n-------------------------------\n" & - "-- Support for integer types --\n" & - "-------------------------------\n" - ); - -fprint(RESULT, L, - "\n\n" & - "-- Template of the call: ( stands for the format specifier)\n" - ); - - -fprint(RESULT, L, "\n" & - "> fprint(RESULT, L, ""Integers with : \%4{|}\\n"",\n" & - "> fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg)\n" & - - "> );\n" - ); - -fprint(RESULT, L, - "\n" & - "-- Results of the call with various format specifiers\n\n" - ); - - -fprint(RESULT, L, "Integers with \%5d: %4{%5d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%6d: %4{%6d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%7d: %4{%7d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%8d: %4{%8d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%9d: %4{%9d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%10d: %4{%10d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%-5d: %4{%-5d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-6d: %4{%-6d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-7d: %4{%-7d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-8d: %4{%-8d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-9d: %4{%-9d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-10d: %4{%-10d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%5r: %4{%5r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%6r: %4{%6r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%7r: %4{%7r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%8r: %4{%8r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%9r: %4{%9r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%10r: %4{%10r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%-5r: %4{%-5r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-6r: %4{%-6r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-7r: %4{%-7r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-8r: %4{%-8r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-9r: %4{%-9r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-10r: %4{%-10r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); - - -fprint(RESULT, L, - "\n----------------------\n" & - "-- Support for time --\n" & - "----------------------\n" - ); - -fprint (RESULT, L, "-- For portability reasons, time is converted \n" & - "-- into an integer value (of nanoseconds)\n" - ); -fprint (RESULT, L, "> wait for 648 ns\n"); -fprint (RESULT, L, "> fprint (RESULT, L, ""The time is now \%d ns\\n"", fo(now));\n"); - -wait for 648 ns; - -fprint (RESULT, L, "The time is now %d ns\n", fo(now)); - - -fprint(RESULT, L, - "\n----------------------------------------\n" & - "-- Erroneous calls and error messages --\n" & - "----------------------------------------\n" - ); - -fprint(RESULT, L, "\n-- Less arguments than formats specifiers\n" & - "> fprint(RESULT, L, ""\%d \%d \%d \%d \\n"", fo(Uns), fo(Std));\n" - ); - -fprint(RESULT, L, "%d %d %d %d \n", fo(Uns), fo(Std)); - -fprint(RESULT, L, "\n"); - -fprint(RESULT, L, "-- Unsupported format specifier\n" & - "> fprint(RESULT, L, ""\%r \%v \%r \%r\\n"", " & - "fo(Uns), fo(Std), fo(Uns), fo(Std));\n" - ); - -fprint(RESULT, L, "%r %v %r %r\n", fo(Uns), fo(Std), fo(Uns), fo(Std)); - -fprint(RESULT, L, "\n"); - -fprint(RESULT, L, - "\n----------------------------------------\n" & - "-- Things you wouldn't expect to work --\n" & - "----------------------------------------\n" - ); - -fprint(RESULT, L, "\n-- Nested iteration\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%3{<<\%3{_END_}>>}\\n"");\n"); -fprint(RESULT, L, "%3{<<%3{_END_}>>}\n"); - -wait; - -end process USAGE; - -end TB; - - diff --git a/lib/PCK_FIO-2002.7/TB_PCK_FIO_1993.vhd b/lib/PCK_FIO-2002.7/TB_PCK_FIO_1993.vhd deleted file mode 100644 index 0386a11..0000000 --- a/lib/PCK_FIO-2002.7/TB_PCK_FIO_1993.vhd +++ /dev/null @@ -1,536 +0,0 @@ ----- $Id: TB_PCK_FIO_1993.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ ----- ----- PCK_FIO: a VHDL package for C-style formatted file output ----- Copyright (C) 1995, 2001 Easics NV ----- ----- This library is free software; you can redistribute it and/or ----- modify it under the terms of the GNU Lesser General Public ----- License as published by the Free Software Foundation; either ----- version 2.1 of the License, or (at your option) any later version. ----- ----- This library is distributed in the hope that it will be useful, ----- but WITHOUT ANY WARRANTY; without even the implied warranty of ----- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ----- Lesser General Public License for more details. ----- ----- You should have received a copy of the GNU Lesser General Public ----- License along with this library; if not, write to the Free Software ----- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ----- ----- For suggestions, bug reports, enhancement requests, and info about ----- our design services, you can contact us at the following address: ----- http://www.easics.com ----- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium ----- tel.: +32 16 395 600 fax : +32 16 395 619 ----- e-mail: jand@easics.be (Jan Decaluwe) ----- - - -library IEEE; -use IEEE.std_logic_1164.all; --- signed/unsigned definition: use either std_logic_arith or numeric_std --- use IEEE.std_logic_arith.all; -- the Synopsys one -use IEEE.numeric_std.all; - -use STD.TEXTIO.all; - -library EASICS_PACKAGES; -use EASICS_PACKAGES.PCK_FIO.all; - -entity TBE_PCK_FIO is - -end TBE_PCK_FIO; - -architecture TB of TBE_PCK_FIO is - -begin - -USAGE: process - - file RESULT: text open write_mode is "PCK_FIO.out"; - variable L: line; - variable Pointer: integer; - variable BoolTrue: boolean := TRUE; - variable BoolFalse: boolean := FALSE; - variable IntPos: integer := 5678; - variable BigIntPos: integer := 12345678; - variable IntNeg: integer := -8765; - variable BigIntNeg: integer := -87654321; - variable Uns: unsigned(6 downto 0) := unsigned'("1010010"); - variable Unk: unsigned(6 downto 0) := unsigned'("1X10Z10"); - variable Std: std_logic_vector(6 downto 0) := std_logic_vector'("0010010"); - variable SigPos: signed(6 downto 0) := signed'("0010010"); - variable SigNeg: signed(6 downto 0) := signed'("1010010"); - variable BitX: std_logic := 'X'; - variable Bit1: std_logic := '1'; - variable Bit0: std_logic := '0'; - - variable parameter_1: integer := 1234; - variable parameter_2: integer := 2345; - variable parameter_3: integer := 4567; - - constant TempString: string :="ABC" & NUL & "DEF"; -begin - -fprint(RESULT, L, - "PCK_FIO.out: TESTBENCH OUTPUT FOR PCK_FIO\n" & - "-----------------------------------------\n\n" & - "This is the result of running the PCK_FIO testbench.\n" & - "This file should be compared with PCK_FIO.out.gold, which is\n" & - "the reference output. Any difference indicates a portability\n" & - "issue or a simulator non-compliance or bug.\n\n" - ); - - -fprint(RESULT, L, - "\n--------------------\n" & - "-- Basic features --\n" & - "--------------------\n\n" - ); - -fprint(RESULT, L, - "-- First some auxiliary declarations\n" - ); - -fprint(RESULT, L, - "> file RESULT: text is out ""PCK_FIO.out"";\n" & - "> variable L: line;\n" & - "> variable BoolTrue: boolean := TRUE;\n" & - "> variable BoolFalse: boolean := FALSE;\n" & - "> variable IntPos: integer := 5678;\n" & - "> variable BigIntPos: integer := 12345678;\n" & - "> variable IntNeg: integer := -8765;\n" & - "> variable BigIntNeg: integer := -87654321;\n" & - "> variable Uns: unsigned(6 downto 0) := unsigned'(""1010010"");\n" & - "> variable Unk: unsigned(6 downto 0) := unsigned'(""1X10Z10"");\n" & - "> variable Std: std_logic_vector(6 downto 0) := std_logic_vector'(""0010010"");\n" & - "> variable SigPos: signed(6 downto 0) := signed'(""0010010"");\n" & - "> variable SigNeg: signed(6 downto 0) := signed'(""1010010"");\n" & - "> variable BitX: std_logic := 'X';\n" & - "> variable Bit1: std_logic := '1';\n" & - "> variable Bit0: std_logic := '0';\n" & - "> constant TempString: string := ""ABC"" & NUL & ""DEF"";\n" -); - - -fprint(RESULT, L, - "\n\n-- fprint call with no arguments\n" & - "> fprint(RESULT, L, ""No arguments.\\n"");\n" - ); -fprint(RESULT, L, "No arguments.\n"); - - -fprint(RESULT, L, - "\n-- Special characters need to be escaped\n" & - "> fprint(RESULT, L, ""Special characters: \\\% \\\\ "" \\n"");\n" - ); - -fprint(RESULT, L, "Special characters: \% \\ "" \n"); - - -fprint(RESULT, L, - "\n-- Various format specifiers interprete the same object differently\n" & - "> fprint(RESULT, L, ""Format specifiers: \%r \%d \%b \%q\\n"",\n" & - "> fo(Uns), fo(Uns), fo(Uns), fo(Uns)\n" & - "> );\n" - ); - -fprint(RESULT, L, "Format specifiers: %r %d %b %q\n", - fo(Uns), fo(Uns), fo(Uns), fo(Uns) - ); - -fprint(RESULT, L, - "\n-- Format string can be shortened by using the iteration specifier\n" & - "> fprint(RESULT, L, ""Iteration specifier: \%4{\%r }\\n"",\n" & - "> fo(Uns), fo(SigPos), fo(SigNeg), fo(Std)\n" & - "> );\n" - ); - -fprint(RESULT, L, "Iteration specifier: %4{%r }\n", - fo(Uns), fo(SigPos), fo(SigNeg), fo(Std) - ); -fprint(RESULT, L, - "\n-------------------------------\n"& - "--Testing string manipulation--\n"& - "-------------------------------\n"); -fprint(RESULT, L, "--testing done using the string TempString : " & """ABC""" - & " & NUL & ""DEF""\n"); --- TempString: string:="ABC" & NUL & "DEF" --- test for detecting NUL in string -fprint(RESULT, L ,"\n--test for NUL ending in strings\n"); -fprint(RESULT, L, "> fprint(RESULT, L, fo(TempString));\n"); -fprint(RESULT, L, fo(TempString)); - --- direct inclusion of string in fprint should give whole string -fprint(RESULT, L, "\n--same without fo,so without NUL testing\n"); -fprint(RESULT, L, "> fprint(RESULT, L, TempString);\n"); -fprint(RESULT, L, TempString & "\n"); - --- influence of given width - -fprint(RESULT, L, "\n--if there are less characters in the given string then in the width fo will\n"& - "-- pad the remaining with blanco's according to the given justification\n"); -fprint(RESULT, L, "\n--with specified width, justified right,using fo\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%5s"", fo(TempString));\n"); -fprint(RESULT, L, "%5s", fo(TempString)); -fprint(RESULT, L, "\n--with specified width, justified left, using fo\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%-5s"", fo(TempString));\n"); -fprint(RESULT, L, "%-5s", fo(TempString)); -fprint(RESULT, L, "\n--with specified width without fo\n"); -fprint(RESUlT, L, "> fprint(RESULT, L, ""\%9s"", TempString);\n"); -fprint(RESULT, L, "%9s", TempString); -fprint(RESULT, L, "\n\n-- if the width is smaller then the number of characters in the string fprint\n"& - "-- will output the string with the minimum of characters needed\n"); -fprint(RESULT, L, "\n--with specified width,using fo\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%2s"", fo(TempString));\n"); -fprint(RESULT, L, "%2s", fo(TempString)); -fprint(RESULT, L, "\n--with specified width without fo\n"); -fprint(RESUlT, L, "> fprint(RESULT, L, ""\%4s"", TempString);\n"); -fprint(RESULT, L, "%4s", TempString); - -fprint(RESULT, L, - "\n\n------------------------------------\n" & - "-- Support for bit-oriented types --\n" & - "------------------------------------\n" - ); - -fprint (RESULT, L, "\n-- Reasonable format\n" & - "> fprint(RESULT, L, ""Reasonable format: \%9{\%r }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Reasonable format: %9{%r }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint (RESULT, L, "\n-- Decimal format\n" & - "> fprint(RESULT, L, ""Decimal format: \%7{\%d }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Decimal format: %9{%d }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint (RESULT, L, "\n-- Bit format\n" & - "> fprint(RESULT, L, ""Bit format: \%7{\%b }\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk),\n" & - "> fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) \n" & - "> );\n" - ); - - -fprint(RESULT, L, "Bit format: %9{%b }\n", - fo(Std), fo(Uns), fo(SigPos), fo(SigNeg), fo(Unk), - fo(Bit1), fo(BitX), fo(BoolTrue), fo(BoolFalse) - ); - -fprint(RESULT, L, - "\n\n" & - "-- Alignment\n-- Template of the call: ( stands for the format specifier)\n" - ); - - -fprint(RESULT, L, "\n" & - "> fprint(RESULT, L, ""Bitvectors with : \%4{|}\\n"",\n" & - "> fo(Std), fo(Uns), fo(SigPos), fo(SigNeg)\n" & - "> );\n" - ); - -fprint(RESULT, L, - "\n" & - "-- Results of the call with various format specifiers\n\n" - ); - -fprint(RESULT, L, "Bitvectors with \%1r: %4{%1r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%2r: %4{%2r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%3r: %4{%3r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%4r: %4{%4r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%5r: %4{%5r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%6r: %4{%6r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%7r: %4{%7r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%8r: %4{%8r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%9r: %4{%9r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%-1r: %4{%-1r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-2r: %4{%-2r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-3r: %4{%-3r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-4r: %4{%-4r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-5r: %4{%-5r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-6r: %4{%-6r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-7r: %4{%-7r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-8r: %4{%-8r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-9r: %4{%-9r|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%1d: %4{%1d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%2d: %4{%2d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%3d: %4{%3d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%4d: %4{%4d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%5d: %4{%5d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%6d: %4{%6d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%7d: %4{%7d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%8d: %4{%8d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%9d: %4{%9d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Bitvectors with \%-1d: %4{%-1d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-2d: %4{%-2d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-3d: %4{%-3d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-4d: %4{%-4d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-5d: %4{%-5d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-6d: %4{%-6d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-7d: %4{%-7d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-8d: %4{%-8d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "Bitvectors with \%-9d: %4{%-9d|} \n", - fo(Uns), fo(Std), fo(SigPos), fo(SigNeg) - ); -fprint(RESULT, L, "\n"); - - - -fprint(RESULT, L, - "\n-------------------------------\n" & - "-- Support for integer types --\n" & - "-------------------------------\n" - ); - -fprint(RESULT, L, - "\n\n" & - "-- Template of the call: ( stands for the format specifier)\n" - ); - - -fprint(RESULT, L, "\n" & - "> fprint(RESULT, L, ""Integers with : \%4{|}\\n"",\n" & - "> fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg)\n" & - - "> );\n" - ); - -fprint(RESULT, L, - "\n" & - "-- Results of the call with various format specifiers\n\n" - ); - - -fprint(RESULT, L, "Integers with \%5d: %4{%5d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%6d: %4{%6d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%7d: %4{%7d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%8d: %4{%8d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%9d: %4{%9d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%10d: %4{%10d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%-5d: %4{%-5d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-6d: %4{%-6d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-7d: %4{%-7d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-8d: %4{%-8d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-9d: %4{%-9d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-10d: %4{%-10d|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%5r: %4{%5r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%6r: %4{%6r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%7r: %4{%7r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%8r: %4{%8r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%9r: %4{%9r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%10r: %4{%10r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); -fprint(RESULT, L, "Integers with \%-5r: %4{%-5r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-6r: %4{%-6r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-7r: %4{%-7r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-8r: %4{%-8r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-9r: %4{%-9r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "Integers with \%-10r: %4{%-10r|} \n", - fo(IntPos), fo(IntNeg), fo(BigIntPos), fo(BigIntNeg) - ); -fprint(RESULT, L, "\n"); - - -fprint(RESULT, L, - "\n----------------------\n" & - "-- Support for time --\n" & - "----------------------\n" - ); - -fprint (RESULT, L, "-- For portability reasons, time is converted \n" & - "-- into an integer value (of nanoseconds)\n" - ); -fprint (RESULT, L, "> wait for 648 ns\n"); -fprint (RESULT, L, "> fprint (RESULT, L, ""The time is now \%d ns\\n"", fo(now));\n"); - -wait for 648 ns; - -fprint (RESULT, L, "The time is now %d ns\n", fo(now)); - - -fprint(RESULT, L, - "\n----------------------------------------\n" & - "-- Erroneous calls and error messages --\n" & - "----------------------------------------\n" - ); - -fprint(RESULT, L, "\n-- Less arguments than formats specifiers\n" & - "> fprint(RESULT, L, ""\%d \%d \%d \%d \\n"", fo(Uns), fo(Std));\n" - ); - -fprint(RESULT, L, "%d %d %d %d \n", fo(Uns), fo(Std)); - -fprint(RESULT, L, "\n"); - -fprint(RESULT, L, "-- Unsupported format specifier\n" & - "> fprint(RESULT, L, ""\%r \%v \%r \%r\\n"", " & - "fo(Uns), fo(Std), fo(Uns), fo(Std));\n" - ); - -fprint(RESULT, L, "%r %v %r %r\n", fo(Uns), fo(Std), fo(Uns), fo(Std)); - -fprint(RESULT, L, "\n"); - -fprint(RESULT, L, - "\n----------------------------------------\n" & - "-- Things you wouldn't expect to work --\n" & - "----------------------------------------\n" - ); - -fprint(RESULT, L, "\n-- Nested iteration\n"); -fprint(RESULT, L, "> fprint(RESULT, L, ""\%3{<<\%3{_END_}>>}\\n"");\n"); -fprint(RESULT, L, "%3{<<%3{_END_}>>}\n"); - -wait; - -end process USAGE; - -end TB; - - - - - - - - - - - diff --git a/lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1987 b/lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1987 deleted file mode 100644 index c5a4a92..0000000 --- a/lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1987 +++ /dev/null @@ -1,34 +0,0 @@ -### msMakefile generated by vma on Thu Oct 4 17:33:56 CEST 2001 - -ANALYZER = vcom -quiet -nologo -ANALYZER_C = vcom -quiet -nologo -all : \ - bin/tbe_pck_fio/tb.dat \ - bin/tbe_pck_fio/_primary.dat - -# Prerequisites for architecture EASICS_PACKAGES.TBE_PCK_FIO(TB) -# Prerequisites for entity EASICS_PACKAGES.TBE_PCK_FIO - -bin/tbe_pck_fio/tb.dat \ -bin/tbe_pck_fio/_primary.dat : \ - bin/pck_fio/body.dat \ - bin/pck_fio/_primary.dat \ - TB_PCK_FIO_1987.vhd - ${ANALYZER_C} -work EASICS_PACKAGES TB_PCK_FIO_1987.vhd - - -# Prerequisites for package body EASICS_PACKAGES.PCK_FIO() - -bin/pck_fio/body.dat : \ - bin/pck_fio/_primary.dat \ - PCK_FIO_1987_BODY.vhd - ${ANALYZER_C} -work EASICS_PACKAGES PCK_FIO_1987_BODY.vhd - - -# Prerequisites for package declaration EASICS_PACKAGES.PCK_FIO - -bin/pck_fio/_primary.dat : \ - PCK_FIO_1987.vhd - ${ANALYZER} -work EASICS_PACKAGES PCK_FIO_1987.vhd - - diff --git a/lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1993 b/lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1993 deleted file mode 100644 index 0f9a351..0000000 --- a/lib/PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1993 +++ /dev/null @@ -1,34 +0,0 @@ -### msMakefile generated by vma on Thu Oct 4 17:32:23 CEST 2001 - -ANALYZER = vcom -quiet -nologo -93 -ANALYZER_C = vcom -quiet -nologo -93 -all : \ - bin/tbe_pck_fio/tb.dat \ - bin/tbe_pck_fio/_primary.dat - -# Prerequisites for architecture EASICS_PACKAGES.TBE_PCK_FIO(TB) -# Prerequisites for entity EASICS_PACKAGES.TBE_PCK_FIO - -bin/tbe_pck_fio/tb.dat \ -bin/tbe_pck_fio/_primary.dat : \ - bin/pck_fio/body.dat \ - bin/pck_fio/_primary.dat \ - TB_PCK_FIO_1993.vhd - ${ANALYZER_C} -work EASICS_PACKAGES TB_PCK_FIO_1993.vhd - - -# Prerequisites for package body EASICS_PACKAGES.PCK_FIO() - -bin/pck_fio/body.dat : \ - bin/pck_fio/_primary.dat \ - PCK_FIO_1993_BODY.vhd - ${ANALYZER_C} -work EASICS_PACKAGES PCK_FIO_1993_BODY.vhd - - -# Prerequisites for package declaration EASICS_PACKAGES.PCK_FIO - -bin/pck_fio/_primary.dat : \ - PCK_FIO_1993.vhd - ${ANALYZER} -work EASICS_PACKAGES PCK_FIO_1993.vhd - - diff --git a/lib/SDRAM/ddr_sdr_v1_4/doc/SDRAM_CTRL.vsd b/lib/SDRAM/ddr_sdr_v1_4/doc/SDRAM_CTRL.vsd deleted file mode 100644 index 63a59d46f0cd074664c7a375cfe1b6845dc03ed2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 71680 zcmeFYcU08e+cvs04MbpQ(nK>fMJ$61U?(F*5S1Xs_NbwVilP|-d&vl>Sc3(8ERTa= z_t9X(ZV<$-L9n+0Y$$3*5JW|C_UP|j@3+2l&N}b;^Q?8UxQ4lBc4qHn?|t9bT~f(e z*X%y#TnqlUBM^u|yU+p1{+G{1@ICThvK0V6|B>4TLHMtaec>A@{{P4SNAAEcILqL3D&Lhp>RKgpfnPB>=1;Y#?kQ>>xTp*h4r#I6^o!PP(ZjsxIwr>ctChUbc5&);RVqH!W*I|L@$Wm5Pcw&5XN=)Uoc*WAN~=fS3u93NZ^}HUtTwftUl429XYt0WlY19>jcz1rQ4%7C|hASOT#WVi^Plp@oQs zzeK__74XVu!~bc&&wyY24-b2|V*YEXi{Lpn&c;^&N`JrpzLkI8!B-#IE#K6MH<7-^ zPyRH6_bLUBJq3;-1R@EJe-^w4#*zHb4i_LojQvYsbL0R2$yvs(!;BLG4=J2EW1q9& zOc<|yIP7~W97)>mPcnXw%y_^5?+!26KLWoLL;O$sSHZSENB;bx^#63-|L?}r|3BAn z?Av(!`PKjD*Fxi<;V~v9J%vk#XL;B|)Wg~E3M}vvmOpy<8 zF;Du>d7q|y_#$?E-w3Zv}AY z&K+>##0eg3-@e@yuDz+k)Tv<9s8K*gsZ_w(*{CIqhjAv2hXe?Y@Rouq9L(`~E||(| zf8fBW!JtRrJ~L}DOo3}yF*GeDA+-m%i1e1dhKgjMRP>{_$WA4;iA|Z6ETk(Uljkd< z$+5E%X7>QDy+xKP5hW6hg;zOc6%eO`S+NayKF@{s~9QYFUCwwmHVoG+0`VkGB9*xP0^)WyCE$wp#b>~|wbfU_vTSsdVC z`orRfphZBWc&j+iWUDx;8NQsCZxx&7OFHCB;>_|T9rGpT`4S5#SmsOQ`4X#qiFLkY zuT8$hb{@LH$|MRT90u*d3M9;36y`2I6y`1obC-s>%fj4E3}K2Y^tCP3wHx>)gzt0D z?2IGvTkT3cM5P`V#ig!+qF=(f?)wFhFDe3)McD!vCE5c%A_W5QLso$+V5I=ofE7^T zZw~AS&B`88%5o5hEY;}SthxiAxIVsF71#!=P3RspAIS#NP}lk zTlzurF%7Jq5d}}%^QOfGJs9BAMRmcqiS;=V(9PZly&r@gkjjgI>jgi|Hgh*3xe^fX zYadn$CnxXHD&L(@iHe7aTqYLxzAfqia#s0TTYxcDAXe1LT#Tv3`nDCK0kY>@z)1OI zxdyKDx#q+D*V#UljPyN-3Ak3Od4ciR1oUL*RbU+A^UpA8fCOA$?_;NmQg6l95$Cbu zF^|OMA`lRq7iIxO)&QA>Q;`T5ARCD6!i(`T{67A6)Qs^f#M7c8F!fVn3EDnBx2+@D zg@k*>*X5eUoa*?0u`2TQ)IObFPmS#v-9AIqK119-ZIy{%mj%r#{G-NBS<0jv;eZ9R1B58Xzzm2VP5ErT=y!Am8yAu7NA8l zB39fV|0XW zjxI}A9qrnk0Rxy3%p`_n)-YEuo$)wjqb@$Uh(K8{b|70ugz;K+uIdW&@X+bxSBJkJ zh>&W*6m}k)!)|B)Wv{W7Y#j^EFo|3Sw~_;_oO9&7IY~HM8RxF!j&bGO1MVFMMEcFl zUPh^3D2vdaNjL?-tHbJ=3_Y#?TYpG@L4SKZ;_*!XNiXQFd3QdL@2Ce|^fURTJk9Us zPw;p7N4)8K{wL3k@pKS+2!n)C0w9D%LY9yxG_huKTe+tk4B|#{r-d8BGvU+MU!e^K zQ^>OV0099|MW<^>frMlrEO~aakd~69h$7Q7gqWnX6itRA3Vt#>BN=i6bYxU)-+|8s zVVF^cJrscz3aF@fLtE2xq4mr3OHh$PtyTZ7Sx@obe*Rh}S9_ZX^tD%C77V_GwGWoE z!^~C$?T(u7wFiroNq}j~mtIrl3*-R#@Wt}G!CRKsz7ZgKW}?BeU5L0nRMu_^M6yK5 z3veAVNd%n8H1VP-C+d)>0J{*$*GSk(`pE=r0+PtJKo64Fg06_&yRVO=ApCt}mWhoS znEUd5qoTHz}=pkLkoOn>xTKJ9g+F#gdEAL)>h3r(6y^*tspgYllPZL$ZICb zXUnznP4b=MbwK=cerpHI4LL|FZ6YA8zeYD0qLY)RXCw)?05**I^OOP1u=VO{|dF(smn3dCv-sz5d=l z-Q^Y5Vkf~qcM-FOZ$I_Fma*beKdGLV`6J)h5UCLUdy2&1fm?$?++Yye8ztb844BmZ zK)xFguyneuajwoF^-aRCn%}b}{K9&fjQZ36cWl`20W`d693p)`Oj?JHp4`z4@^n#8 zllD1aFEZCm6ewGUh{I&La=`aV#5`WL&VUxtiVpF}O zgC6nXfmkH%1Q3aI1dx~jDIAKm2-xgJ;9@iZO+frjBo+MJTfgYd3u77nvp!a4`_F2PXqDt^yvwjWTDUWRE?|q z03X4}2ecOfUqqh`IwL#UAuaoM07-2{AT9S=64c2W4nG03H(BK&-)u$StcJa9HtmKa z0rNC)1g=SGyNlu=!UA_Uv+o9}$jWTfAcff5YM=rMG_g@4z_VANe1fu<>l9bh?#q-O zJx=cIX=&0i4WuE16s4!yYZS<9SEO{j)!M_L=9}W=H$~1j#Y7gGJr}UL9ms4#6?4*n z0`c&aj+R-Ps1E|vwb<0Fhg(3XtZqdwa1iu_vfF?|-TPyuJ>*{61kBxS0k#I4-nRg& z!M3rW3Ty+rlb@h*2IRQ_)jiz( zS3# zW3yVJZZKH9Z|wLJxL89!Pz3in_~imuGf+c!OW28DPA<=dSFMi!>({Y~ zCP=37Yt!e3?~9%b#`C10s{pxrDq@0M=Al=*u)%Nxgb2W;O@<6K13!VR!GJ-cDmml; zX7&UQ4TcaEcr6!X$eKZt(efmC@&Ehr-%RuTbx6^qe~DlI67kSQHGTJ0svVPsh#Cz1 zmo9Rpe5jncCbSAc@)Y@pFJlJ^6aT}Nh4hIbDbrFi67;Ek=B1~L&EgPLsy!qUIRR%m zE5C9NHs2p7{~=!}pBSTCn4Xb5YqR7C=+yqcu}yd{NTdWWhCH`HW?-KR{=LudOLkDZ zQ}7nrthQ1gmAg2K`7hHzhso$V^i?b64F(|IVBbM2%nmN>5=7`^)Ed=`z?YB)gTc@y zfd8wXX%{}fZC(V18P&aHEr2#a%o|3Ez2$(19QzM<{RaMp+;te7MRu)m7Kb^D6@q$L z?r&r8^Afi1k1^2gj)KNumuxDqsvje-fEQ=91wa(B(4@To0*aaI(hd2O*!c}HI4t158ng$|s#fj*B(>_jCAW?zZ zAP22~AzrRBGn=!{lC#dzvkp!+Lrqb;Mypz|)ZsJI0r9RdJL}x>tOJeudm6Bi@ZLkb zqV9F9Mb0|IzqB)*3>|EDbT>1yd_4kHn9V?|xuS#d!;trl(&Mh;({9qpiwdaw%6rrT zS!%bhiq2haJ9M!II{?cfr=c>~G!2M(utPKrsOB#=cs5p{S5PCf%c zeLFW80jy5lsv@(VkofW+Nx152fL`{rpz$)qS0T zNsjMuw>?&?`+ARnvhNn3&#U_m1RZmHgMfLT9N!3Fk>eX(16KFlIswRYd=q=XRx@q^ z>m1*-f8pCjV3KW)ZzizI@m=%D0MFe7>~nm#1BcH!zJDo!xaata5RZ~v72)-c zA+x%lQ6XNXDx}AC)icDqQib$R@C*IBYU7Di|3wE*KeH5+95VnI4P;YJ!nt*n;47 ziseDb&>Yx4C^r}h{ySI{lB;?q3O%3_4J%fO!b;AlMB$|>(eUdk(X5C{m1x9cm1txQ zY%;1|C5kktM0iQ7N)!cxMWaoFMeC!jf<-Zo!LxyDkZ4w%SFmV|Pq1ig|KMk$aq3{v z`0!xSgp#OW(O=_&MHAzLMYASN4;D?<1dE6Tut~f&Sd@?xEJ`fN4HhN+9W0)bs}j#j zKA;j$Emn!Aol!j#PcK!8Q?9GTGfFB|;+c5jqT3`MYb)?BY(@jRbk@q9QI@d91OC?u9>CX{HROEeKs2rAJGEYbLuXuP4|R-$n((b$w|%t|z)L?xOZ$Z1W0 z_CtU+t}a0PG(cMwpuGu&vH257ejXg39D*FYgNK)WbFn--v*0foc> z?SuerbbvMj3PAzdfdN|I0IfF^+yb=D0a}{?tyzF}lqf*^1Dw{BXg`#|eoC}YOSDxb z+M7@)E76`S(H<|+9)dz)iFSL5c2kLV4HPmWxHz0lutnZW8HJ?o%W3m-BD{u8;sllrH+hROZ4 zjK|cImmx=qvI}K4PP1DG%r8xSz@^vpsMv@1*Uey!JbmE|rQAzS98mFbXRW zM+X)TFJz&G$Og-;eI%djz)_Iu-WQS?r=0ty6CfkGxOF*Gu~oCWpkKFx%->FH!MLXd z4?><6_&hCe@lcz9xYg4ju`BRe;MeDgw7vGnAHw)u!2S@{#yD)GRG8{Br~j7H{+=O~ z`LDlO4F|&y#uX#O58CLCd}ILkPa6Z`jtx0jlMG)@99hBMI*D^e zizS8od=AurNd+WuG&`Fhq|7!8CTC})QDkZ=bVO42`83W(23L1@4xp#+>lrtstfIJ} z1~D0Y)zNyZC=pR9z}sT10A!ks7HPJpBg=K0bpt#Wvw=G9T~p^1e?JE7u5;xNb?M#* zDt_tYN6uAD>COz;9hq1*pb8nCSSAXsLgJWd%nj!3wWa#~3^>c&VqP#jGr!z~bz(;% zwW1m@VDq@XFziCkLSZmyio*V;aH0oiYIL)RYjfPL3@EvMb;NlP`Xu>S=#w2U?i{~; zd)ui2Pt?iB20XdQHuAM>)9LWxpmNT(D#a3R!`b|?W$J4S(XdB(jC?6 z(yk{3b;*PyV-7#CcRt-*SK2I7zu@+M%W>BhH<#I#HJ`LS+w887D;8UiN-XOyih5c& zS+CKrECOd+H1g7KN1psGzombnZ#ojS;ER~=#Cz0=eM$=Ydxqa?8F6}pg{%bJ{AFJP zv~kD!cSwdPw1`Ew+ip7yGH^pYZs>&@92>u$%xNp}9uN`|tuTq2zEHs>^Yi)De2x#m z3cCBu-6-61>@>_Z`{&Hkr}#i?xE8i)$04JUuZqT&wS;( zffKGfqvo2&&lSw#C9e}jz(haSB7Sbi3m#(aLTlN5LpOWq_LX}Cp7zk%sN1bS8qO)a zPb2AlLqz3Hh zac7z0+|_ug&5fJaC&qLsavKv zbJTzL?0@+v$KGg2>`&JY;d6?WWlC^g`BvGgG{ab;5B7zK_HW&Md9uoFlhhddq>Zu9 zG%VZyV7}9`z?`hh@ji~`*9}0u;*#Ikyzk}e6;4Gdc``Ae^IQA6Z92W#b+bj#8J)*a zt=pzoo6EQM-28rflVx<}Qy%#TxWx^VfDa%6PsfwUIO-sNe&}wpfy{n|H;**=Nm3{we=?!XjuF=P|VH_>J;|*MPK~yBUT1G9kC+*yA%j2+L;WS6pPn%&KwU@O>1?0Z(UuM$l1yIa?h>%u8H zoo`vokpS?oNg~(LympYethMjmIWLqdC;M1VNe*%*K`%0pj3QquJ+P@%C3zbMUr7UAL)sC8DSPTE zK9MN6ifaiCl}T+`YBxU|h6GaQ&Qc^ync|vOLS3hxQXdz0B(OPHTNai#IBI|O`;38z z!(r?q#$mOAyOMuk<~Znz``|&i^{#R8o?D2t3>>V)|HcpD7x1G*DdA0Ar9dR{ff`6y z()omjxKE9t3reX)^iAS9@p+QXoCVS49HIjj3*~E#R^WL(+Vp)%pl(n6 zHTe@cXpsMs%TZTUg@&SIQ5#0G7!6@W!%OeIo>Rr3mr+oS+BVWxU0di1i891MSBPAd z;`fgNUFTHUywX(1xB**!1{4Bcb$z#}I^@F@0bEetRTeXatOT>ij`0JrvXPkOXkC(S zt}buzhYY!qzgz)2-7#Ic4!jzi(EL%?uIsONWBeGpE9h(}vU3wnWfs6t>rQ3|4{G`2 ztP8tZu4a$Od$ITAAcsw4x5}N+Ecp=h0(+Mo_<54KpJ{BuG#QMmhIn%$X2>JBiQMel zAD7)l&Q(14n>)l^;O=rYTqCFcv*2F{BlU8*$U@OJJ;dMlwG-Yb_oAi60t+4C7g1(yB zIa7A)rC;7_Jt7Lt2mH-B;o7Fm#w?FIkf$3|+mu-QA8+LoLV z;?k4TjN3XmtxpcMo%)vo-nO@?)|Zrln(lrG5~vyaQ(e{SaV}ANqm_tSeKOXqG0E#q zHBzUdL+P<}3cZ+KPwQxKjGoFqpnD9+uk@5$suStj>~!6Bbb?`wW8*rxJbkR_kg0h3 zXuY5C1}rIh{$Rif>*lZ%{aQ9|yi^B>ri-ukZHgBzLSb#w%x~b@tBpV2>wfAim|rZ< z1v83|hBq&>xW!EQD7#%uG1FGY-2XT7x6%Q@xgVK!#)@^ja8x>g9l?SXJjpI+Jp!kL z{(hv*2^RcO`t?E|xxl4x4^gn5`++Xxx+))V4EGwHsw}NU*C;#aJL{7u?D>?0;EaSA zeX@SO{?ejOTlK96_2>1Xb-y_oGW~slGu?~sz<1_*^BAul%_s45d2e(ZKM@th`+yg* zIYD=LJ>N}t!gpW5uzbZn|FOCVu+Kk3CkA6TZUi|&Jz`b`@7v@}T-=xw6c+>h$8HS% zYr;w4s_`bs|JQMsA-XUo3B1FTelqNh5u^1Ku-N<&Whb}>!||eBIQxahu%)r#L|E0 z0rnhj0IO(yA54wqJab6E(y#4dp7PFZ+kY~;@V_-e0e(F6Yvr?Hnta!+MR}S$x3BW?2$_F332fW@ zJc-@cZFF?uyQ0xWa~eTClk+9I(Dp>r{=bTx&V5=wG60%>|TI$v)|pVQBvLujpDE#g!4-S}N}F;@tFw z@96JzM_tUojZQsvLv$+!n-jZ6m71BX2^`MtNP#>kAgchMw`AYo=41Cp-SdD%&Hkh~P z$79d1f>2DrG<+ssw%)pWeMWG?w3GZ*{xRQWd*@cZ)l9&32|Ir~r{Xs@8tKUI$BHHk z8X;2vTZDbW8R4ezT-d7w^3X$y`|80NZP5u#Is^XR?>sSgeSvdamgLSs#A!@{Tnwg9 zd%e3YdSlYhnD2#~NULL@E&5{8Khva1_VuF6 zOVoghl!IhpcaOLBk*np=9T&p=^QdP-mk$RNL1l^$`?DlKUa>y?lfra`*U-@^Oo=Jvy=bCJgpFiM_0VIn|Z2)Bz@zYAbC%x^5N|O>t+I!Wh2V<)*J&4Ex&3nhu8`&lF2Kp@P0v1#P zHwjf|WI6Tp54x2L)B`JKQNBtasz(Id)+;(60o3ctbS?Y>p^o1vxG;T~ALIx-{9r~} zY99rfnld{%J&BpitYXTpMWFkc-){ZCB@@u!{&f>0WgS@1gB`?x5KykL12;ec(~8JX+VGg4n}Lgg7L&cSq5_YDc#Z3ek-vt3>`SP9NSVVZkb z_afU_-dDJX9H{3W^EZXAdLR8$WvqUxzE+VgUm@QrfAMd9(|0+fWDczSp8S=(Sq@B4 zC$uLz1jW$=G#y=mg6~lwK0<72&_VP(dIz;Fg8?tst84t*(QZC#{5vbf;C0xBgw!C5 zn3=)L%Pfg=2_Q9SK#bGaxxv_kTxFs1q*8lTX^wqRwkiK56qqmOYFMaWtN%yOJkNyw zm)KNtMgLG=um7Q+m~6*`ZoCSQ;3x8XHrU6X$?lQ{Ht+@fasCRQ56SFP0VYVYsp-N2 zDpt5n6$@*GO_bV>UPkq&UkfdQsfCqt0S1k5T5`H^1!YIe|32*IK=y!)g?S!{{x)>E z17?$25^N%yW1{n*dr3Yd>&YJ^xOmAt_ufg{!d_G$6-6Z)H^5YS0bNHeVr29#rjY_= zOeF0^=P+h$2GfVlq`z*VO)V@u46le8R<>ADN8?-K#ECcdJIDFX{tEcdx3iuDSlmr~32Ls~570p~nC1N=`Fse2`A8 zAZ9X?*z?34VmAMUSScofhlLK+_0^3^jm7?u!tuJ9Ik$(qbdg7p7J00wswBhf3&`+vm(4lyCeqkV`2By zpP^uGlO!%nIH%k%oE7Sna44tLii``7ojzdH^(1MAS7U1%{Xtm$5f)}bD^TYp$KTRSRtM?v=Y>&mdQ zMobOKFb=~7EuLO2>2LdaQIH!Lslm3PV3d+j&QWG5^OXCQ8se4`6cQcx?$_Aw;WA~I zBj!D*ZT7=Y^XgzpLs#0mbHn_<{0g5SALq?&a?1lmOn81?UoKO#`EJ%B-#NO{%TU<4 zdCAttS%uqSfueZ07^rP=PrMUpLj8p+e&x0-+d*!|Z+!APK%JxPJh+!j-a0f2Unv>w zNCR(rFda$9(`j@zolhU2!8zKaa$$k@{oTg{^x^vcTeX+=yXCWcRl2_l*u7DZmswoP z>kGduFF0|?w;y-8FW7xNu{`M7p%c?@e!|>&e;&Nkeb-@37e>jv<6@X(W@z|LtHsQE zM#tzEe|2a?_^Zrg<^$8lSh5P%mjxm07pKz@3etLB{a-#ASN z{bixI9@B>d?-IP`I{p-|NOEwkPg_%7OKJMMh}7!G+aE|Q#w-!*yAaCpGo?pJGv3?qCACz4$3EZvJzA3a93h2 z9!k_3y{pirc6XITTC(e$8fBwWf^A>a%L5C*+QP9Z<`W?q*c**}$@DiSy?I1A?Bq{c}jdF+KDpzfxWwuK4cI%#oUWVjoH_)Gsq?61`-roPRcU|9bS+; ziBP$hfJ5${lU)npEuzL!Db!*L%%Um!J+*?dpbs+NsXH)ePb=xoOedCN2C%E?9klwQ zlHG8heoME~_5=IG>R(UQFL>UXD9wH7vbI7F-KDky{c*j~x&WhjG3UGTKKvtHEZ>3A zEU2+4UG~}^>Rsz$RjwO1^LyVss11GC&b*7csxEsQQ&G*!K}>~#7aw^9EWY?xJ*@Vt zc58g39{}GQM6c=|1y-AWFa}<`_$+IILDx0HPGKHXI-RW&UJDt#soYr(lmgq+_g|D-wzfib^FsNAZD4JOZ1l0@6rAsE^Ox4c zZjKYRh~7`&Qn_VZE?3B% z=QjQ28fVWEy*Q&^^*zw$_K)hPdwta|Ot{zPc0;8&*iWkB2JUbfW0gIyruTaz$sWu{ z@_}+6G@JLy=W+ZTe;c~tHGCs)CxM(n5nJ}Lmk=mK2_Uf@#4Q%q3+2jVLb+hO44hMU z&$t}jESSih+Ejy z1Zuj|_W@e}4)x`3Cb`Y80x&!EpCpAECJy|RJL1gKW0g~t3zTb=V5jn^az0U|JV-be zF&fuBxsNhCVqGxhpcTU0=6RVSAx+jaKi`BXw7n+}9C2^lnKY;3@ig3l$;X2Z;HqM(jQWn=Oghx6`8ng1o8i2% zfQonnwMp^y!bWM1sIsWef$l*MqDRpLJ%=G{e#E7jO$oAs8ej2 zOT~eC54G3!#`}FZ6<>61?^0F46ESeTR(C^;B^QS#&|OQ3M-F}VhARP`{Z{Xzk}=Xn@KiZn)~t1i@F)a>J6kb0eTUIkA_tr zc`$~UPH5P51lUD9XrEU3{_E_zN}`VVN&p%8j_a*=p;nR)_(SA(9^{in}4o6_o%^zZJf`UK9{0EkR_QLlS_lgHkvt!e?qL7$7rcLGS(~_-f zP#2%HT^A&@5W27e|_u?yhT`FRpD;x`74qk5DKQ zXPGoK9W-my0||^6c<}>yEkBvp@Ls6P7JeTe4h9XvMqvcDY|db#KV&LdiGjbdL)ZoE zX{U!+J$6v|lK_a^Vigjy!z~I=#D6CM?9d75PC`bAFmIw82JDFlER7gRSYey6Hf0H> z*+-lqZW2ekD}!U+6Q;kTnKK6Gq5ILZ=q(rQPt0#Y{3{eRqb5qHUbjPiltD_P(gX{X z!OK>v$7ZaLKBP28)Pa#byvACvcOv-&G4v^CUZi9P_vhW`s zJv0b6jm4+p3q}lC1!KsEaoCwL&rqxBRr&x2@9^)qQ!jR|8{tO`BgPS62GQl{LQUU2 z+RUAVF`EIZh}VSCBa0^A(eucTI*>>zb(hG$$!2=Ku9n`R1C69HG8Hh~j~YgeqvnsS z4O~R6qjpiZTwqkk1jhJfhTnM=%BdGPzPA(IogP4speNDa?xq%ij`!1#)39Xw1YJQt zqHpNHGhL|eDVw5eXXA8k+%X+ktE*>caQE2_+#B6Dod+%p2p=2TgBiq(VirdHFw|e< zIllIT9se2Dt;&sM#wLQ3&{G&909;5A(uEbmR-qSrUYN{k^oAdXH(yuQL6)(#ZpFqQ zKP09dB=_>)rqoJ-6=H9)=V1@oo(BWv^Q`tf5RH|KW#2N8m37Ld6|Yu{fR9iBg}<5x zeWPC`{J1S2n+-nKg8pwz+rP+x7`??_>HZl3nR)@IBVc6a3 zPtkyb0_=FuQ@lxP$~v>7_&_!a)^GM133hqJ*krO>;9fYxg4=?P{4Up@JBLo>UZUZ! zB3!u#Qitnkgz_XhTltuC{J^zwQyoG^dojjPVR zs>oXXf2ZusQ9$s4=$fcNpWN7~L3wR}PSa zpiy!{K1ZJSoJZ#w3mDe;?2sRk!)o_?<};G(VXimc8}BxVy@ViS=`WzaR( ziKhh3wi8xlI0!L#lKsfxWZrXQ%vSDYXQ!^7G9!1%)PY%GN$v)+fP8vlXvL+X-w|BE z825=6lU4Jxc=c;h6&Og3q$X1uYB776T}d0}frzUqdOLc(9?-}16X^h2J751@pQP`? z=hB7r^WK($c8`a`P)eUF`Zb;1LiZgQYOnLs4b)|spA(g(*(B;RbSrg#>kjEI=)hfF zjjmC5p0j5@aY89y1IE}nh(AASb2UaN|&)tBv-d*pn57Wn?JJ3n|H9ZK%8uZh!NBXsx zinriLW9n*b2%NQP{6hZZdW+9qa%0vKu1>y^H{E_O%)pBTyEeOsUG5vv-}S45g-9V@ z0BJ(DkS`n%&Iz}LJf%Uk?mQPQpnOZQuj$=#>0j9V-} zZDkqvw_L251~1$Yy)B84F%)hmO^z9&E0Q#Or+tsPHNygh``gV*+P|A)yDu7o`eEJh zMJQN@j-ZOsGSnvb5&9nei7r#!x&YVsvrl$Wo}~v1>w0=gv#N$DaV1z)(KdHsl5_>7 zJV6vGPbtAOLMScKsP|mVY*7AE$}!-I1yD<1qQ-($FNkL1^y26)t%IJ z)zv)K4aH;dWV~_}bW(RGtiX*y__`0nPitf$=hJR4A6{H|CH?MNnSQ~q3s>@%{jLoY zU~yO-bet{qtGYnn`F+8!WkozTR?<=1TBH~DR*A9EgZ`SF_;znzI=?qQs{lE*FsXHK zZSCE)E*&aI{QDwp{&8gTi#ejK&uUZ;Y+URz%GIk`u3c+{Ou-$!BoO^w)<^ec0QuP^wK zQsl_xL?@>wX9#A~;KL=b65pLnn_BQun_4h<$oQYyHPr67!(|m~_8qP$ST33mpK+^w z*B8t=ULcyeyYxz)S;^c3FVyqT{w#Gu=AV6Xu?l;013ATovX4`B8`uICh`1~4r4PRzG@RA*9k|Y1LGL>!?hWN) zxGQraW?Xez#^nU3l1Vca*&N8{4shqV+uTdeaGQGH@gAVwKls%1*{=uR%hREl{@(Qc zColPmC)!Q=CB--K=Xm4i5#xS^zTJ0hTrc}~Yb%^P5#0%xouYn+puV%g1c)Q15etd6 z#6QGrT1ywuhI?LxK<{z$Hz7xl8VR}Sj2CG>iG~xlT@qg%Yyi;Lc8OEJ*+25mCa1sR zJM-#Kn$x>YfYJj2TDGHlkxJd(OM#d}hT$pFd>$I*I?XMx2O^%T406j)xM{P){f6z~ zMChoMLE)PF{_fSbcf3E(GNfOefBc5ks#<-JE|LHuQO#PQnRTU z*e0rQ4>ht#eoFpnBo>bsrFr=6EE%HxWUg(8#oNHw71Qv9E~U8e@q5A zj9rZPgfcQyGGSL zN~VZy2@aaFw9DzBC_0TkH@YnCpRA>;ZlxEkDW3E1jkLM7k24XsE#eV4)O^3eX!3X>Eb{gWvp6MtEpO2(nMmRZkCjS@})wk zF%+0i{h?mP)XvhztWJx9)6r6V)y>W(8WecL4OwH^bUjTyu) zx+L9DollHz5NAvr0{kBxqig*>m?;wwV~v5$&(*-v(_F32ysR@8VzsoIHkZF`H*+M^ zsooX?PJ<`+oS9xsAQQzTG8xQDm|>@s zz7d_c?%XVH1h=+t^W8KqB%50^D{4P?mis>VYll!lwA{$<9boya`|C1To0uJBeEPu7 z&O4lIl7PW@B<`#KPdo{a<~LoAZ{ zevjAw7+H~5l%o~%U$uC^1v6&aqp>O2xTuN@ZQ|<{82>~%eaZ{V#TO@|#xhFvYm*E9 z&e@kEhGf4>?6dYAsmc~IjF&ZSi@)$CML@jKPxf}!>z(Y_Hur|@g|6C5Re;quW@`zL!40Yvzu znDJ4PNzrP}=&3QohH56gKDNkHa;ll-e>2hTiVF{KYM*_&ZFpP{el3IfQ+0f?=aVdb z%?emG+1RYDjxn>jwjw19RIacHezM|wOx+5j2cEKgxvXtv5;?Q~8tt_`8#hTW%$c|} z*Z2V1uY&Av@L7(dLq(tki0bD?o%;G9>Svlsrj&M|B|X-}HbW_k*Ui+Z=KGVF@|+ai>{dQUJVN~NVZ=w53wp`;e@n%BoddyG)Tjwfak>AgOlYF?^k zzeu3!b^KIez4D^}zHXH#MD@ZC;WYtT2vgFTG#1On=n~1YCpF89@7+IGMw7fAs2722 z$=6E0$*!F;wR>5Sl6CEr$P*QJdgMLyU|C@Gf%3670Mn0w!i?&ON5{)GPq$l(D&L83 z)znizs1Lg5j1R52RatpS!%U~cC&d~4n%4AQQFZ6e9fwwKZBvDrF(U<{@?T<3np~IN z7mQRAz-TEK!j0jkbBnlj+|2&!u$sdXvhjCX>iUTdZ`9vp>)#;y9yLdryXwX3-h!bv zWTQkpyJ@VAR1V9c8r42xE0YCH0cQJ_p4s?xuiA3!Bba;Jqc724*IV-OANB3}61f}i z$AdB9{FDiNdN0!~&y}^J<@LpT?)tyD^6Tihm*t;ICwG8PHCMo=XpIliS_r7nR{+66 zoG{zp)oP*NaJOZ`ZnEtJIo07$k*T-^yVL(hV_qDvbsc6I1pfByj4P~nSq*m!cefY4 zQ)Hqh44vZ*V0!1&qX}fix`*; zf#vB$8LXJ2U>am5;YqeIU!kvgvD0A382EsgJb9KPsoyc9-`_NFZX!WD;;hD&0in z(t6?~J&5c?Y8TOM^i*1*Bgy5Y^F_PBo|jT)YvyL0C-0EidNSkOc!9L0+^KQ4{Nj1% zBh=PvbwnryerFiw`R}b$1@8S_s&$E~r0S@@@3!XtdqpU;qd_;iKOI3&q$73lx|^^d z3w);6uutiuY=F*6m%+BM1@WviH$%5Xw|SPWZkO+>em=#gbk}rGbYEsn$o;PC2$Njn zY+VVPoi%T<-`Tp3v#qvyN}~3utKY^m3l{cyP^aqm0K9HeKPY5QGJo=3sRr<+H0^6^ z)t~g2G5ZC=xe45r67@rZuV=IP`z+Yc`*3F5ELinAp0^dIa9`(fn`d<%>=>P#Fs09_ zB!$L3#`2z(E=n7vJNYrZkwG}wzk{|OOFu&*d4j-$fA@0D{$qJV13v>TduFsnM zF4te|C+?)pE)u`%XI}|2{pR_d(k`vEer9bJKhH;OwzRLTq%X3h zimK2=?27yU{^sURlRRp9QyKaEZ~c1iy}5Jm?{~iEclPr=-QPYC8B$x5rK{H^rEA@; zin+mcyT0|}F0NjePrLrJN8_&BG2#BDj1XNjpHI1fT8le3l^AMrJ+#m0UkFIb{a1T~ zVa-wPGlSoV44mFn`jjTrmkp-Dx7yD&U)Hxl-|5eVY;mrqXvfxW_3v_`$J56ma$kB{ ztbZHE8Q65gTZUDJO@=QGM-68UHw{JSkEVvHW^ak44snaK{%v5L22PgLldK+!bp-5} zoi#fe3r6-?mFv~JdrZ%vq30Xa)5P?;UZe!4Q0q8U!l@1}@sE|Zwsei1+j&dmh`3Lq z*orPAEuY{bJuY_Q&ZvJ)$=}v;M`V5W>CpO2+L%M9%O#pZ#yy{Wq8loTlJiF1$eu6_ z#He4bq+>%~F}-H83_d>OEz>H~CR2l1sD@3)nipqVFd%T&lfe^Zi_c7y4chlgdy_?| zg>A25W(~~&=3sR04L2v6=b4wAcb-3*mL%D`Q^L0NQLDEuTG3^6<|mzlx1}#$9lvh(qU9faZW)pj z%j~O;TFzQ-TB@h^OKp?drN1VB;owwrs%5b0A}?3hQBVJR0Zq$0Qt)#U>#XQ`I70D? zW4tma*>d2A&1|9C>PWI?s}HMxJ+>(8kArOaZk4vawxza{)&~>d`{~&ZE$29)ZR+^G zu&1MiUdkt_9chj~?3*1!^fCGww`$&A)B?>-9demiBNxni|NuK${iQC&aTq$+;YqmIg!7zh2-RW#pjF?Te1D5<7rz+ zUrpZclN}Rmmche>PQiv>FZk|wzZMPhZN)a3oz>3STuX27Y@f>0d^uGgX4W+9me}}x z`{#D*cEMy(mV+~x9Zd~vuVbyFK>wQIh(66g+z~f?&(|7sh6;sf-Arab32xK709?-!6<6)qNqnYVZreVYQ>krrGv6T8k z;YelUNWP_>y}=LBe-t$)__N{Z;o1C;))v3_Z@e+|$t#gfHug}*v#%$>k#^yWV4A-Ptx&A8Y2v$4>~nUZ`=O-&t4JxxweFiBXqnC*+l z&7@)QJ%dsbe;A-kNjPh2vNI(?X_g+Hi|>z{$t@Z?Yq&&WeVrROv(+M2ZE3=+w##We ze5ILYBJHeVp{Yn8TN_ydEun1J@EGk(?PBday>mb6)>vN+>#>T%Pwc7t+G;Kry+QTX zbw4m`_*!q@*VeLndVMPO0u4<4xTw*}jBM8Q<7E9({rmdQ_5Ze>wC*>sj_qH2cY)1h z$g;g)IA~jEU^5KMZ4K>nY{B-Q449sAep>Z*p**ddp<~zMD z=)a)ui?Nw(T4rkII~xZb`YiLi%ww5FnM`6^bGydAt(WSZ2(pFP24TLMZK`d&J;{F7 zmQ+~XzNV1fuzg)Pz#eE{Sg7Hr6bA8{6#EK03aGu~g+Y}rgL{n-M*ZJy`0*PF7GVtN z%JNA!`b$r*pX6-9DWBQ0-DW}S(sJ3NOl9>_zjfp}ZaT&`SFp)V0%|m*xzj9o)&O}* zVt?sVieAd>*-^C)q)OszZ$H3#%WusLsPTnQD<7ZqY;B7)7Eq(m$6lv{&*l09tfQ<` ztZacbrZAGw z;hB!FW<1$$iBGe3Y~ulayX}q(>U>ABqn z-SAmp(C@y5PmN;96IS$F>7USP#QOueY3F7b-kIDk`lGNFVIPiOHDxbk z=AIn`;*)b*OClnl<4dI~iG^sf+2@=?il- znfr`EncIzQP-b0Iv9VF+O0=4?GkcpZ4Kb~{rFm}HN9{8+$8yVjC1lr)yvm< z9GaP*OcUF^_m4W2bTD|s=}lg5#VAJQcbQQOtW)kCd2<=S-Xn)H8VH9Wa< zw>&WUiT%6NLbQWweQ;slm$%0TCl8R+&f99SJ=vP8m$zk3P43VVpJSUh9`HHDdM|qB z@XjZ8?jCl)_QjzZk&d0`aPj7W*N%Mi#iAdRf(-TBxuN z-x6WK5 z3k7Z2yv9P7AkTfbw$I^rYiXJ|dgs4etFuGOItS7VgBlL`*vY!$a*cxZkmyINvpt^PYXRJ%J$I@ z)yL}BrnL!Pzxd_wrFusBr95|1h|l3k-OuT32FoUO_cBOx2M*c)a`+z+FGaAp+?%Ep zT=+#PM@B`o8sn<0-EdacmYcg(H|mVz+ZwwY2llR7eZuYipOp+MGg{(E6QrpVp}=^{ z$ke8%Ol?iwP5;>`i&?)I>-$EVUN^mIlIQkH^f}xsVTVa|dT6hNpG?v8Bn{6z~5YGme|ed~+t3#(WXpU$u0Kjp_*v#j5#+pF0i z+so>ywh;A7+bZ=`^$1(=8C$rms{Jt9kvFQ<^smcfwx@G3Ti4;S4YdKY&C36Z0&8KwrB0V z?Vs9Mc;Sz>#KJFa%L^OZZ`y_y2A@DSs^F=eexq8A%&+H$n(QK0qB$`=nC4>-bePw(#&YLMB4=}aVnALId!xxO5^)|_7ZgM+gwHDMr9D_U z9*d{awGDZ8rErk;M-0B))`szs{FLvX_gQz1hJ_aKYx$}~U&UhOmO7S!#*R}Bm^zJ_ z(}DXUEG*hG(K6riwq=7wD5F&WRx4BYsU?SWgZtfT(=nCNoF8j=gZ3K+G-&r$>UVF+ z8noMxDoyC|?TlM({@wLvTjrQ)HD1BRw_QKzq3F7=7Yj3oT3@z4rw!1*WnE=`-ZcA5 z>rrdm&pb^^eQNz#t#dJcSd72=c{MYt&FjzipQKJvXB#%EcdA)~h3mrfvo}T-t7&~p zb1m~jWxbRBJ#8(^ciLwxTeWPkrKbLOt*>RRMQ!=U5~`1XSwH3bswZoShxKRlH(IWmdHccy8dv@4yoL`B7FM;SVntbA(@tk*J@-sqgD`vb_0|yv7Hybl zn2&z%4Tebbe#2sO(Qj*)C0$yxE1lXd!q`DAqhI$XD=pic3{y3Jo>%?&40PK4Ja<^P zD@!J=W{%|PT~%xQMg_e4cIRE`16H%0i?X^5%=`)$Ggn8h`*zW_c^?d2urbWJ!Ug^9 z*J$ai%v2jQmMqsSy-h>};&CE2ue@bLs%R`8u^-vSJm(%cS|mibqQu-%_jH|xe6 zPL4gWZS(Z5yEn7G=GoQ+^IY?K>y5y;tltl^DZBq;wwsTeFPbl6uAx^di%Z=7>2do~ zi`+5G@(+i@!nRoo?Gqe7*_SwcQk$m6-+I2<@OdK=#*G`0Ix4l>lvMkT#O0~$Q*X39 zSEUnk%%NGAp@v4*Kx-FkKdWwpb&|E6eT8+TT{0s7w2Un*rWr0HdK{Y@7V^aUQ7^E7 z4`;v7>w|^GzS1`@W_4+zW?yw)SZtK)l}j)7uX3^T7wb6bj+Of}f5|*x-{YufGnrJo zF+*^eZDPD_j_qHzW3RGpw!OBWZN6sC?qhFie~D*3?XTF2o^7dN-P$&uZ-3j)$br_Y zi`9oP6?VBk%E5N%jgAxg4;{&l_w+3ci}m~Z7#xlZ4(a*otI%hauc(G8<3#@P_ zwd{(vwtn>}UGPW4L&G!p%nMBx6@@jH7p4`YSGkZrIOMlpKiBxF=*c17(KgCNUqJm+ zMGc~KG3Q4`>6C0kzdr|)J_zF&CX0m2Buo1r_F36Kd{t;T<0E=RfF;n}n+py1kMbV5 zvu{M}F=w7LhWC47L?qWD6N5-Mcdl%a{a$@elA>OrUZ9_D$W?C~YVM<|VW^^w`p@K6 zT7$N)c2gAJkaz<|se<|7-<(c<^{OHG*9o!8;NY!|ucn`vn2;DVGcGqno2g+V6TISL z5~R|}35R`VCMZp;o=K(Gn?76IA|`ur>zQ5jOqhuHfw{=M&~UBUP&588c-Y8`1KOE zv7pGCwP?!fUM^}=hQliF-wN&mNZGhfc}1<8=kZMaTXB;T7OU>83*(=&D!34Eb#PVk zif;A!ARbHIttfm79M)mzlxs83!6!>g~x?;LlQJAFB; z4m+s6cIIL%Sm-n?EJ*qlYd){AC_sDaN?@Azx@j$I@d@ft+9}!vT1GSacWV!7PiwDf ztLPi*S%5xRAFdy+Pt?!TFW0X}$AEsH{)GOL-Z@R*@SNdhAHyvWbVa<_uh(sz&q~&r z4QFPaMY3q{EJqZu9+LydPYwi|$R8}~^*}R7gX2G#78o_RP0XUeu(@r<-&_I%4#cXx1Bj4PIP!>+tB2+t6#=llnd*##zkqtn0A2 zxSZB3%piT?kDD+yY#7G|^3kIm(YoHF$Md73@n(*72D##}ak?qd4(jhpj?sz+=W`Loh~-YsOKc#d@$H!MEB72le* z4&+$k=v#3T7Tqi1wHP+7Z88fPHavQ~KMMd^S#R@=i=aydGpX)rT}*ty6DlRUB~dbB zGmIL09V}(v$phMekb3y_qN9qoUvh_49oiZsIoFi!Si59)RM9%{NIMqTiDNz*q@xZ^ zHP1BFv<7AL<+jggo_R(SIt(P!5u=zl>s6=U=mE7XZP^&EEgKQ7=^q)b84|5|Ia)IS z7va&GKGB+9(V7rkbcxnHfUOG(A3_bQEbo{z&r}7tXtiFD+WndX?GO(&xk?p zD#s+3i)7$_n+Pt%i*UrMzh2r{mGfo+4Orc3>}k-#jXQork;hk8>(p)3r>?-4y0F=6 z6kLO(LA}9X$5)4^%kh51d=0Rr&5KTDoKlv@`yg@i9N$PStly>~yA1WbO!Y1zHTx24 zU4Ol#Q5CCeYYU2G{u;fuv-a$TtM%Cv1w}Q$WzK7vjy;9AYw9z)hSFT)wF;~1uaR0b399!s)vgvHGm&a0K7skc8aeYCsTszNuCY*iN_)PBj?BJ$^(ZdzJ>=`X?7<^?04UG=mi zsQQ|?H&mFDel6*mqVN((=4yjhFKFKpDfe_i5eSp(uz|sB#p`SVSV?EeF0X%`El!oy z1vjB-ctRC!ML`jmS@~uxgk8#&a))jg6oJ#S{yMfP@2Zs36&B4#24>;eP$tWl7GAm4 za0?rh(ul2*9|0+QLD7>F*{ioL3htdM;9kdjn!x*q|A_aTm;UEx_e z_tac==|%(1ZEekeAi89HQWZ`Cp88KgRp>X7twEkT@-jw!8f;-Iz7ac=Wz<9!7PZ;J zdRMV{b3Ow>re0Wd%P^5uMMUo$gzp3FZ%00{M)@JL0N|H8C{0KXeSc_0Km*O9r7Gs%^7_VZxF;`nuRapcVcf^i391*21w(Ko(cTHw zAz=_?Ga#cD(i!b(P!$pnA^y-!5c<|hBt9R6SS91!AA;URMh9pDgK;}Xy2IfQlKQE}fdBEM$52g0} zWNYzt<0#FCY4Cr)PktaT08g^hXXx*t5K66K5ReJ8p%C&I@(%I@+JA(6lhPG=$6F98 zDc6)-Q_3etrQh@duQr0a`upAT0lJSepE+BArmp?Md!u=T>wfD|`NKhasF*BX6;2)u z-eBod1L%vjo!&+NZ>CVQ#=3zohIA#H=&4snQAn0C9b@b9#`Q3X{<;9N3@0BU;schi)vE4a0seqp>r|$dU&sr*axla*fwHuQwq}&B8@9TsMS}&UA<&oi~L*1?RmQ zCFg_=<;JDoS+C@8Yu-?CemJiSq37s8#5zOqU34GO>f8~kBMdg;1_s)lLg;psM#_Z$ zjFOI0l1Q2OTl_t#Ii4Y%=sn_nM6K&S>0gmHWgr=oP1#V2>>`^ol##M*6^T)jp(J^{ zY@&2RHu;pKW3nmBi&y!0lNcpgUL?Fq!~=hK;qf3i(R;;1d>7&A&a@}K_ij4Uees#n z-==f416UKt5a2oohQ;FHg$T*UNLh+xygWrB{uar=^`7$SQ+$T*Kd5b_N9jX+7u_en zY6%$wy{15^`3RRGgu1vlMKT}yjgc>dOmXRnM_gFZJH+>qZsq-m@+a{SpQGPAs0|cf zblfR#5Z_x`FM7W8eet~Xx9MEOCk1(F6BxY`AhbY8zt2$m$=+1>x$=^V#3vE@)q`GX z2!jyfAI^hhiO?@iQ4bR2(zA3t+zTH(>pJcfM-&hLYu+usx3pdliVyh@=1x2P$AFN2 zA1Ui79WU=F72jWx_>lkjLof25UI+=FF>-(DeCRhu-V5UI(zA3tR3?0G0u;*MWG;Ld z@L?{yD;l37=tuZ~zN-YEBIIuj*r*{z50$^+b*`f+&i;BV~I~KiK0+mlf?l zo1qlpa}c4Bzio#9>_Oe&AOx!fO49#>-~*^#hxmKK)YIw*CKychg9I2S)(;|OezI7( zXVedn&pPV|gpXK17%#6Un-BfQ%Yz{GDs}yU+RfxYO^~2O|H^dRKn{0DHmj;1*C)bghn8VA0}z?Pw1=#LOl!TPBDluNw)l%n1h znZKn$uR2hG+O6#oQvR0aRY#cx{nEVJL+ZHnM4Y?I;mT6}kpEEol>A3*pJs3=@E^}; zpOXJj`;`1gY@ariPJ#cVz;~8GDtG(zW8m`}Z0`gqgpmJql%A7r=FYk5MHT5k8PM+- z^xBH>IzsZFt=x5K2K3v?9fMqV=~-F*hw9hlKVtnlgG-d^q@Gc~CjX)OHTjQNziucU zA?*nL8cLHP4_Cj&>s*JJk0S|qT>Wi1l%o0@re(Y8ZyB7Q%vb6e^*0^#qW&GiN36f; zr1j9l;V08cgCLc={l#PTQ2YYO_XQzU6# z%ODR|{va=O9iHqzgb(%a5I$o64#q2_OT0Xze~0j){vEs3*e~`U zWUKsS%e*|J{DB`k%OAo=EPs}G)svz9BU|DX1gZSx57pnuf5iG*wki?%+oP$!-FdEn zP&80on&~i400VV2?qB*SU1o@5dE{$U*CQ;&x?Y;s2x%5z}Kk1 zVH4~RM~G|(anVN=pz5O%M=IYlMRT zWFuW>yV7Mv;OUy#_AZ73~5UpGTPof=ZP+p<)5JA-*nR2MHoNdD7DbxyIw>zqQ&mn+hLsD7OX zy{LZu2SW0nG_O2G7W7N=`U8^Z((^(5=W(gOX)vdAE?V9@yj8%bBk=Kzxu%3qE9gc36Y9dJm6V5mC%r=uGc4 zTEK2Kls$v64no2wz}rWD5+dqdk@YuPlOls&Z4mk*Bz)R<`^tTwUmI^3#Mh-K{(RT| zH_;YUSO1nZ8Tlo8QaTd#%!htF^vs8jbS~=fS9&&seWllH;aS%q{@xS)Tn)RI0USz4 z?;sTXJVSQUJHs`Xu_DtE;j<8W5k4Cb;vdWRUMSK%l@*^e$lnN`B3C|q z4*8pB%t<1A@=EgIKT7i9eD6Hu!{?;=-hV*yDs?_g{^N^8N%;696#T~z{^J>Aj)YGg z=tch19wGk0f9k-0{NOw7A$2OX|4=!35JnR|c?gAa@+j~*>ax2c^EWCdzkyyguQ^MQVCyuX2*aq0P2`I}hA{GH__=}GBG)H5IY@z66LI?}nQ!(ZuHzMP~oQ9Q)o zyStn$y{?(oeLL4R<0H@${eO`h)-^*u!Z}GKC+bn!4oWxTeTw7exE9AQD%z$#P?T)q z5#k?g;N_7rl0H}&N5bE+4)Y*3A!~OXVm!DTC-J?o!4M1VEz3r zgmf;(N9j1D_z>@tZspS_UgtW*=Ss&X#hE9pMmxm>B8+Y9*;=h?XTrSurCPvHIu{QVe5&xvtg z8L=Az%tY)&KO9!2gTxcCYYCkCK|k^>GeXg~%vFM*pHb2eA)Qxdd|JUN2%okHMSKEP z9VCIOKhtGJ`4-{h3%v**n!_XF(@7Ns{frV{gmivC_=wNoHE!=e2!)=0cySKm@mYkw zl;i<{s$aPFs^i?VsyxUcobTfTRXLnLLO)#l;l4lqPS1(@$)R6!ybnc+lh;MOkJmo7 z`8TZxm;=LTJ-`Bllz(S%^X0x+aV*+bk!g(915AZpGzPpBA(gK>=~UF0=F4@`rI4vE zJ@MyChmW&-h0!!$_9uiTqzTQ`RL`;X|XAj!Pi{xGA5Z^`j#eQm<^Sc+i(>OMWubpXZiPv7t z`8|sHzNaC3?@Q0ewGKz+%tY8t<&2od0##FFC}&)DS7aVQn07=Nl`p9#nQ(SgeWE!J(9HlX8$BAidmvov8?NV7D zLOK`I&tIjn#}yyqb)b3xl`~>JAQG$z%e*|J9zc0C)dMJx7V7~^yr#;tpx+X&rI5;9 z4K5;sKv*SN*3V{fF?`Qi4w|La57@cx?eb*}x_jvc;t*{#@zmX|yi= z5R9h$O)NumP`}yCc}5vZ>(Z%?L+jGTI?h(^v@8SqZRPetPFL#ujpl)ER0#NNLP-9z zNAi&(NBWU#j^bbW&*Pe}Q@LBSoZVz|j8X%$z$!(XLKF>d}Ye5n0>6FO1* zyAJdte00*AxURzKq;()SUH#aV5g*DgsSoZ5>=*mD529cAbIvpR;8sJoy^tM{(-6XE z2X~rV4gGd-dm*P?>8LW|Lv!G$-b!=e#Cofb_k8)U5Yaa((tl_U9MxNCOjfM7V%|08 zF3rb0u%(d7U2i3PsNPEWi1k(nAUXaSoM@{(98c)JUT;qv+2>5u$8XLlg)_4*=;u_EC z$|Cp=12$?%R;;Un^`Bq|btk7ummAbf~Jh42wMRHiFOz<&~fO){i%bEptL z#3x1ghyTp)wKn2$!RIFYhWfW8z)75A#>+cM zc)4fvZxus7nqyWC`iXPQswsk?pHWgQ50cQinEvsot4%_6ckw>;jg~%tP#?KhJ0KL_ zx`L0>95XNIDb6wD<-c%p#c|F{kq0@1^L-pI&*84i_i&TC547 zgZ2=kb85RtIhC_b=}k`WJgX}C#Ovc~u$$e$JyCypwiPZYlyDN~lbnQh9z)`H))IwQ ztneJ?+}g2;RF1ayfA1?M{G#leCC)b&al#hhHzbG>9Q01{jT9E)NB^5z zmZ*#LZ~OM0cJaF3ZwoOaAaVbQh_;lsO}PH^Jwp69l}gatAndFq#?I@ zF5n{E7q0J|LWDO6&k4OIO{B8_+96B$yQru5JuzJ%#g-@{zK6m)f3I|kl$Gc$zPIf4 zo$MEPt`ffEK6}gWICU?39}e%b_7!nuukU29xD%AS?Jd89ljqng?5yN|d&};K^V zI~BR#-m*Ikd5*op&Oh$Ax9pBR_p=#JCV5C-ts$$+{@la=fA?v9`3fc{Ei&= zviDKpEAEuxZhOn`aB(kt9~Hjh&J*soxBQL~o@1}DlY{&1ExQAQ=h!RkjNpEI%kF4! zFMA)A|B5>exZB?HI|SUz-bd%Z0&~B+?Jduu?&HTz3hEd={d_wV2gLR zz2#ZnJ;z>weck=`mSs)9m%We5f3v&wP1pVQmSw@cm%Wdwz9F*Hy4&9Jtg?5rSGfP+H40-SJtTUDb2!6Q>R|C?Fze!u;w z>ct}4qo9}j=4F&;UMy>O#mz$j6M&Nu(Ove|$9$P4Qtt<1GW3+V5E%yD6&JK{hvp!a zX9n~Xdqu`RciUT@Y42|K3it0n&lJVvOLFLfw{{4_LgOw@)UbTCMb8?Tb{wm zQ|uL)mF{Nmqt8zS#-qFGBiw)RvZ_2&k*CDJ$ROlyd&@Kbc#6FuBagf7EzhLmDfWsC zH}1B#JTr~w*efu`xZmEgOfQ~dugJjSZhOl!r`*fl|Fs|NPAn&7zj^n5ut(KLFEWp~ zJFd&KfRwfSzx$#doxK7(hx_d<%c|iy_6lql?zgurONHmyE3ikn-`=vU51wPMz{cQy zd&{yY+{@la)yE~W8@Suv@~i}&Vz0;+;BI@%uk!a4d&SlF?zXr5s`. --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library ieee, work; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -Library UNISIM; -use UNISIM.vcomponents.all; - -entity clockgen is - generic - ( - read_phaseshift : integer := 0; - frequency_hz : integer := 100E6 - ); - port - ( - -- Clocks and Reset - rst : in std_logic; -- external async reset, low active - clk_in : in std_logic; -- system clock (e.g. 100MHz), from board - clk_fb_in : in std_logic; -- feedback clock - read_clk0_out : out std_logic; -- Clock for DDR-SDRAM data capture, dcm#1 output 0° - read_clk270_out : out std_logic; -- Clock for DDR-SDRAM data capture, dcm#1 output 270° - sys_clk0_out : out std_logic; -- System clock, dcm#0 output 0° - sys_clk270_out : out std_logic; -- System clock, dcm#0 output 270° - locked_out : out std_logic; -- DCM locked status - error_out : out std_logic -- indicates DCM Errors - ); - -end; - -architecture tech of clockgen is - - constant CLKIN_PER : real := real(1000E6/frequency_hz); - - signal locked : unsigned(1 downto 0); - signal dcm_rst : unsigned(1 downto 0); - signal read_clk0 : std_logic; - signal read_clk270 : std_logic; - signal read_clk0_bufg : std_logic; - signal read_clk270_bufg : std_logic; - signal sys_clk0 : std_logic; - signal sys_clk270 : std_logic; - signal sys_clk0_bufg : std_logic; - signal sys_clk270_bufg : std_logic; - signal dcm1_locked, dcm2_locked : unsigned(2 downto 0); - signal cnt_q : unsigned(4 downto 0); - - type STATE_TYPE is (s0, s1, s2, s3, s4); - signal state_q : STATE_TYPE; - -begin - - read_clk0_out <= read_clk0_bufg; - read_clk270_out <= read_clk270_bufg; - sys_clk0_out <= sys_clk0_bufg; - sys_clk270_out <= sys_clk270_bufg; - -bufg11: bufg - port map - ( - o => sys_clk0_bufg, - i => sys_clk0 - ); - -bufg12: bufg - port map ( - o => sys_clk270_bufg, - i => sys_clk270 - ); - -bufg13: bufg - port map - ( - o => read_clk0_bufg, - i => read_clk0 - ); - -bufg14: bufg - port map ( - o => read_clk270_bufg, - i => read_clk270 - ); - - ------------------------------------------------------------------------------------------------------- - -- Clock generation - ------------------------------------------------------------------------------------------------------- - -inst_DCM_BASE_0 : DCM_BASE - generic map ( - CLKDV_DIVIDE => 2.0, -- Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - -- 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - CLKFX_DIVIDE => 1, -- Can be any interger from 1 to 32 - CLKFX_MULTIPLY => 4, -- Can be any integer from 2 to 32 - CLKIN_DIVIDE_BY_2 => FALSE, -- TRUE/FALSE to enable CLKIN divide by two feature - CLKIN_PERIOD => CLKIN_PER, -- Specify period of input clock in ns from 1.25 to 1000.00 - CLKOUT_PHASE_SHIFT => "FIXED", -- Specify phase shift mode of NONE or FIXED - CLK_FEEDBACK => "1X", -- Specify clock feedback of NONE or 1X - DCM_AUTOCALIBRATION => TRUE, -- DCM calibrartion circuitry TRUE/FALSE - DCM_PERFORMANCE_MODE => "MAX_SPEED", -- Can be MAX_SPEED or MAX_RANGE - DESKEW_ADJUST => "SOURCE_SYNCHRONOUS", -- SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - -- an integer from 0 to 15 - DFS_FREQUENCY_MODE => "LOW", -- LOW or HIGH frequency mode for frequency synthesis - DLL_FREQUENCY_MODE => "LOW", -- LOW, HIGH, or HIGH_SER frequency mode for DLL - DUTY_CYCLE_CORRECTION => TRUE, -- Duty cycle correction, TRUE or FALSE - FACTORY_JF => X"F0F0", -- FACTORY JF Values Suggested to be set to X"F0F0" - PHASE_SHIFT => 0, -- Amount of fixed phase shift from -255 to 1023 - STARTUP_WAIT => FALSE) -- Delay configuration DONE until DCM LOCK, TRUE/FALSE - port map ( - CLK0 => sys_clk0, -- 0 degree DCM CLK ouptput - CLK180 => open, -- 180 degree DCM CLK output - CLK270 => sys_clk270, -- 270 degree DCM CLK output - CLK2X => open, -- 2X DCM CLK output - CLK2X180 => open, -- 2X, 180 degree DCM CLK out - CLK90 => open, -- 90 degree DCM CLK output - CLKDV => open, -- Divided DCM CLK out (CLKDV_DIVIDE) - CLKFX => open, -- DCM CLK synthesis out (M/D) - CLKFX180 => open, -- 180 degree CLK synthesis out - LOCKED => locked(0), -- DCM LOCK status output - CLKFB => clk_fb_in, -- DCM clock feedback - CLKIN => clk_in, -- Clock input (from IBUFG, BUFG or DCM) - RST => dcm_rst(0) -- DCM asynchronous reset input - ); - - inst_DCM_BASE_1 : DCM_BASE - generic map ( - CLKDV_DIVIDE => 2.0, -- Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - -- 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - CLKFX_DIVIDE => 1, -- Can be any interger from 1 to 32 - CLKFX_MULTIPLY => 4, -- Can be any integer from 2 to 32 - CLKIN_DIVIDE_BY_2 => FALSE, -- TRUE/FALSE to enable CLKIN divide by two feature - CLKIN_PERIOD => CLKIN_PER, -- Specify period of input clock in ns from 1.25 to 1000.00 - CLKOUT_PHASE_SHIFT => "FIXED", -- Specify phase shift mode of NONE or FIXED - CLK_FEEDBACK => "1X", -- Specify clock feedback of NONE or 1X - DCM_AUTOCALIBRATION => TRUE, -- DCM calibrartion circuitry TRUE/FALSE - DCM_PERFORMANCE_MODE => "MAX_SPEED", -- Can be MAX_SPEED or MAX_RANGE - DESKEW_ADJUST => "SYSTEM_SYNCHRONOUS", -- SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - -- an integer from 0 to 15 - DFS_FREQUENCY_MODE => "LOW", -- LOW or HIGH frequency mode for frequency synthesis - DLL_FREQUENCY_MODE => "LOW", -- LOW, HIGH, or HIGH_SER frequency mode for DLL - DUTY_CYCLE_CORRECTION => TRUE, -- Duty cycle correction, TRUE or FALSE - FACTORY_JF => X"F0F0", -- FACTORY JF Values Suggested to be set to X"F0F0" - PHASE_SHIFT => read_phaseshift, -- Amount of fixed phase shift from -255 to 1023 - STARTUP_WAIT => FALSE) -- Delay configuration DONE until DCM LOCK, TRUE/FALSE - port map ( - CLK0 => read_clk0, -- 0 degree DCM CLK ouptput - CLK180 => open, -- 180 degree DCM CLK output - CLK270 => read_clk270, -- 270 degree DCM CLK output - CLK2X => open, -- 2X DCM CLK output - CLK2X180 => open, -- 2X, 180 degree DCM CLK out - CLK90 => open, -- 90 degree DCM CLK output - CLKDV => open, -- Divided DCM CLK out (CLKDV_DIVIDE) - CLKFX => open, -- DCM CLK synthesis out (M/D) - CLKFX180 => open, -- 180 degree CLK synthesis out - LOCKED => locked(1), -- DCM LOCK status output - CLKFB => read_clk0_bufg, -- DCM clock feedback - CLKIN => clk_fb_in, -- Clock input (from IBUFG, BUFG or DCM) - RST => dcm_rst(1) -- DCM asynchronous reset input - ); - - dcm_rst(1) <= not locked(0); - -dcm_fsm: - process(rst, clk_in) - begin - if rst = '1' then - state_q <= s0; - dcm_rst(0) <= '0'; - cnt_q <= "11111"; - error_out <= '0'; - locked_out <= '0'; - dcm1_locked <= (others => '0'); - dcm2_locked <= (others => '0'); - elsif rising_edge(clk_in) then - case state_q is - when s0 => - state_q <= s1; - - when s1 => - cnt_q <= cnt_q - 1; - if cnt_q = 0 then - dcm_rst(0) <= '1'; - state_q <= s2; - end if; - - when s2 => - cnt_q <= cnt_q - 1; - if cnt_q = 0 then - dcm_rst(0) <= '0'; - state_q <= s3; - end if; - - when s3 => - if dcm1_locked(2)='1' and dcm2_locked(2)='1' then - state_q <= s4; - error_out <= '0'; - end if; - - when s4 => - if dcm1_locked(2)='1' and dcm2_locked(2)='1' then - locked_out <= '1'; - else - error_out <= '1'; - end if; - end case; - - -- synchronize 'dcm1_locked' - dcm1_locked <= dcm1_locked(1 downto 0) & locked(0); - dcm2_locked <= dcm2_locked(1 downto 0) & locked(1); - - end if; - end process; - -end architecture tech; - - diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd deleted file mode 100644 index f5ab332..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd +++ /dev/null @@ -1,389 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: DDR physical layer (Virtex-4 specific) --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -Library UNISIM; -use UNISIM.vcomponents.all; - -entity ddr_phy is - Port ( - sys_rst : in STD_LOGIC; - sys_clk0 : in STD_LOGIC; - sys_clk270 : in STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_rd : out user_tag_t; - u_tag_wr : out user_tag_t; - read_clk : in STD_LOGIC; - phy_ctrl : in phy_ctrl_t; - part_ctrl : in part_ctrl_t; - sdr_data_w : in unsigned(SDR_DATA_WIDTH-1 downto 0); - sdr_dm_wr_in : in unsigned(SDR_DM_WIDTH-1 downto 0); - sdr_dm_rd_in : in unsigned(SDR_DM_WIDTH-1 downto 0); - sdr_dm_rd_out : out unsigned(SDR_DM_WIDTH-1 downto 0); - sdr_data_r : out unsigned(SDR_DATA_WIDTH-1 downto 0); - sdr_data_vld : out STD_LOGIC; - sdr_data_req_w : out STD_LOGIC; - sdr_data_req_r : out STD_LOGIC; - part_clk_p : out STD_LOGIC; - part_clk_n : out STD_LOGIC; - part_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - part_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - part_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0); - part_ba : out unsigned(DDR_BANK_WIDTH-1 downto 0); - part_addr : out unsigned(DDR_ADDR_WIDTH-1 downto 0); - part_cs_n : out STD_LOGIC; - part_we_n : out STD_LOGIC; - part_cas_n : out STD_LOGIC; - part_ras_n : out STD_LOGIC; - part_cke : out STD_LOGIC - ); -end ddr_phy; - -architecture tech of ddr_phy is - - signal dqs_drive : std_logic; - signal drive : std_logic; - signal dqs : unsigned(DDR_DQS_WIDTH-1 downto 0); - signal dqs_zen : unsigned(DDR_DQS_WIDTH-1 downto 0); - signal dqs_rst : std_logic; - signal ddr_data_w : unsigned(DDR_DATA_WIDTH-1 downto 0); - signal data_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal data_reg_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal drive270 : unsigned(DDR_DATA_WIDTH-1 downto 0); - signal part_ctrl_reg : part_ctrl_t; - signal we_reg : std_logic; - signal read_en : std_logic; - - type u_tag_array_t is array (natural range 0 to 4) of user_tag_t; - signal u_tag_pipe : u_tag_array_t; - - type dm_out_array_t is array (natural range 0 to 4) of unsigned(SDR_DM_WIDTH-1 downto 0); - signal dm_out_pipe : dm_out_array_t; - -begin - ------------------------------------------------------------------------------------------------------------------------------------------------- -utag_pipe: - process(sys_rst, sys_clk0) - begin - if rising_edge(sys_clk0) then - for i in u_tag_pipe'length-1 downto 1 loop - u_tag_pipe(i) <= u_tag_pipe(i-1); - end loop; - if phy_ctrl.utag_we = '1' then - u_tag_pipe(0) <= u_tag_in; - end if; - end if; - end process; - -dmout_pipe: - process(sys_rst, sys_clk0) - begin - if rising_edge(sys_clk0) then - for i in dm_out_pipe'length-1 downto 1 loop - dm_out_pipe(i) <= dm_out_pipe(i-1); - end loop; - if phy_ctrl.utag_we = '1' then - dm_out_pipe(0) <= sdr_dm_rd_in; - end if; - end if; - end process; - -WE_REGISTER: - process(sys_rst, sys_clk0) - begin - if sys_rst = '1' then - we_reg <= '0'; - elsif rising_edge(sys_clk0) then - we_reg <= phy_ctrl.we; - end if; - end process; - -DATA_DRIVE_GEN: - process(sys_clk0) - begin - if falling_edge(sys_clk0) then - dqs_rst <= not we_reg; - drive <= we_reg; - end if; - end process; - -DQS_DRIVE_GEN: - process(sys_clk0) - variable p : unsigned(1 downto 0); - begin - if rising_edge(sys_clk0) then - if phy_ctrl.drive_en = '1' then - p := (others => '1'); - else - p := p(p'left-1 downto 0) & '0'; - end if; - end if; - dqs_drive <= p(p'left); - end process; - ------------------------------------------------------------------------------------------------------------------------------------------------- --- SDRAM Clock -ODDR_clk_p : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => part_clk_p, -- 1-bit DDR output - C => sys_clk0, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => '1', -- 1-bit data input (positive edge) - D2 => '0', -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - -ODDR_clk_n : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => part_clk_n, -- 1-bit DDR output - C => sys_clk0, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => '0', -- 1-bit data input (positive edge) - D2 => '1', -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - ------------------------------------------------------------------------------------------------------------------------------------------------- --- Data OUT DDR-FFs -gen_ddr_data_out: - for n in 0 to DDR_DATA_WIDTH-1 generate - begin - ODDR_data : ODDR - generic map - ( - DDR_CLK_EDGE => "SAME_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => ddr_data_w(n), -- 1-bit DDR output - C => sys_clk270, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => sdr_data_w(n + DDR_DATA_WIDTH), -- 1-bit data input (positive edge) - D2 => sdr_data_w(n), -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - end generate gen_ddr_data_out; - --- Sample tristate on clock90 - process (sys_clk270) - begin - if rising_edge(sys_clk270) then - for n in 0 to DDR_DATA_WIDTH-1 loop - drive270(n) <= drive; - end loop; - end if; - end process; - --- Output mux -out_mux_data: - for n in 0 to DDR_DATA_WIDTH-1 generate - part_data(n) <= ddr_data_w(n) when drive270(n) = '1' else 'Z'; - end generate; - ------------------------------------------------------------------------------------------------------------------------------------------------- --- Data-mask OUT DDR-FFs -gen_ddr_dm_out: - for n in 0 to DDR_DM_WIDTH-1 generate - begin - ODDR_dm : ODDR - generic map - ( - DDR_CLK_EDGE => "SAME_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => part_dm(n), -- 1-bit DDR output - C => sys_clk270, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => sdr_dm_wr_in(n + DDR_DM_WIDTH), -- 1-bit data input (positive edge) - D2 => sdr_dm_wr_in(n), -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - end generate gen_ddr_dm_out; - ------------------------------------------------------------------------------------------------------------------------------------------------- --- DQS OUT DDR-FFs -gen_dqs_out: - for n in 0 to DDR_DQS_WIDTH-1 generate - begin - ODDR_dqs : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => dqs(n), -- 1-bit DDR output - C => sys_clk0, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D2 => '0', -- 1-bit data input (positive edge) - D1 => '1', -- 1-bit data input (negative edge) - R => dqs_rst, -- 1-bit reset input - S => '0' -- 1-bit set input - ); - end generate gen_dqs_out; - --- Tristate-Control fuer dqs - process (sys_clk0) is - variable zctrl : boolean; - begin - if rising_edge(sys_clk0) then - if dqs_drive = '1' then - zctrl := false; - else - zctrl := true; - end if; - if zctrl then - dqs_zen <= (others => '1'); - else - dqs_zen <= (others => '0'); - end if; - end if; - end process; - --- Tristate-Buffer fuer dqs -gen_out_mux_dqs: - for n in 0 to DDR_DQS_WIDTH-1 generate - part_dqs(n) <= 'Z' when dqs_zen(n)='1' else dqs(n); - end generate gen_out_mux_dqs; - ------------------------------------------------------------------------------------------------------------------------------------------------- - process (sys_rst, sys_clk0) is - begin - if sys_rst = '1' then - part_ctrl_reg.cmd <= COMMAND(SD_DESELECT); - part_ctrl_reg.ba <= (others=>'0'); - part_ctrl_reg.addr <= (others=>'0'); - part_ctrl_reg.cke <= '0'; - elsif rising_edge(sys_clk0) then - part_ctrl_reg <= part_ctrl; - end if; - end process; - - process (sys_clk0) is - begin - if falling_edge(sys_clk0) then - part_ras_n <= part_ctrl_reg.cmd.ras_n; - part_cas_n <= part_ctrl_reg.cmd.cas_n; - part_we_n <= part_ctrl_reg.cmd.we_n; - part_cs_n <= part_ctrl_reg.cmd.cs_n; - part_ba <= part_ctrl_reg.ba; - part_addr <= part_ctrl_reg.addr; - part_cke <= part_ctrl_reg.cke; - end if; - end process; - ------------------------------------------------------------------ --- READ DATA Processing ------------------------------------------------------------------ -gen_ddr_data_in: - for n in 0 to DDR_DATA_WIDTH-1 generate - begin - IDDR_data : IDDR - generic map - ( - DDR_CLK_EDGE => "SAME_EDGE", -- "OPPOSITE_EDGE", "SAME_EDGE" or "SAME_EDGE_PIPELINED" - INIT_Q1 => '0', -- Initial value of Q1: '0' or '1' - INIT_Q2 => '0', -- Initial value of Q2: '0' or '1' - SRTYPE => "SYNC" -- Set/Reset type: "SYNC" or "ASYNC" - ) - port map - ( - Q1 => data_r(n), -- 1-bit output for positive edge of clock - Q2 => data_r(n + DDR_DATA_WIDTH), -- 1-bit output for negative edge of clock - C => read_clk, -- 1-bit clock input - CE => read_en, -- 1-bit clock enable input - D => part_data(n), -- 1-bit DDR data input - R => '0', -- 1-bit reset - S => '0' -- 1-bit set - ); - end generate; - - -data_sample_stage: - process (sys_clk0) - begin - if falling_edge(sys_clk0) then - data_reg_r <= data_r; - end if; - end process; - -misc_flags_and_data_out: - process (sys_rst, sys_clk0) - variable p : unsigned(3 downto 0); - begin - if sys_rst = '1' then - p := (others => '0'); - read_en <= '0'; - sdr_data_vld <= '0'; - sdr_data_req_w <= '0'; - sdr_data_req_r <= '0'; - elsif rising_edge(sys_clk0) then - sdr_data_r <= data_reg_r; - if p(3) = '1' then - u_tag_rd <= u_tag_pipe(4); - sdr_dm_rd_out <= dm_out_pipe(4); - end if; - if phy_ctrl.we = '1' then - u_tag_wr <= u_tag_pipe(0); - end if; - sdr_data_req_w <= phy_ctrl.we; - sdr_data_req_r <= phy_ctrl.re; - sdr_data_vld <= p(3); - read_en <= p(1); - if phy_ctrl.re = '1' then - p := p(p'left-1 downto 0) & '1'; - else - p := p(p'left-1 downto 0) & '0'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -end tech; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd deleted file mode 100644 index 02ad3a7..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd +++ /dev/null @@ -1,111 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: Dual-ported register file with asynchrous read - --- Copyright (C) 2007 J. Ahrensfeld - --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. - --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. - --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - --- For questions and ideas, please contact the author at jens@jayfield.org - ------------------------------------------------------------------------ - -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.fifo_ctrl_pkg.all; - -entity fifo_sync is - Generic ( - addr_width : natural := 4; - data_width : natural := 8; - almost_full_thresh : integer := 12; - almost_empty_thresh : integer := 4 - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - we : in STD_LOGIC; - re : in STD_LOGIC; - fifo_full : out STD_LOGIC; - fifo_empty : out STD_LOGIC; - fifo_afull : out STD_LOGIC; - fifo_aempty : out STD_LOGIC; - data_w : in unsigned (data_width-1 downto 0); - data_r : out unsigned (data_width-1 downto 0) - ); -end fifo_sync; - -architecture Behavioral of fifo_sync is - - signal mem_we : STD_LOGIC; - signal ptr_w : unsigned (addr_width-1 downto 0); - signal ptr_r : unsigned (addr_width-1 downto 0); - signal full : STD_LOGIC; - signal empty : STD_LOGIC; - signal almost_full : STD_LOGIC; - signal almost_empty : STD_LOGIC; - -begin - - mem_we <= we; - fifo_full <= full; - fifo_empty <= empty; - fifo_afull <= almost_full; - fifo_aempty <= almost_empty; - - inst_fifo_sync_ctrl: entity work.fifo_sync_ctrl - GENERIC MAP - ( - addr_width => addr_width, - almost_full_thresh => almost_full_thresh, - almost_empty_thresh => almost_empty_thresh - ) - PORT MAP - ( - rst => rst, - clk => clk, - we => we, - re => re, - ptr_w => ptr_w, - ptr_r => ptr_r, - fifo_full => full, - fifo_empty => empty, - fifo_afull => almost_full, - fifo_aempty => almost_empty - - ); - - inst_dpram_1w1r: entity work.dpram_1w1r_dist - GENERIC MAP ( - addr_width => addr_width, - data_width => data_width - ) - PORT MAP( - clka => clk, - clkb => clk, - en_a => '1', - en_b => '1', - we_a => mem_we, - addr_a => ptr_w, - addr_b => ptr_r, - din_a => data_w, - dout_b => data_r - ); - -end Behavioral; - diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd deleted file mode 100644 index 356bb28..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd +++ /dev/null @@ -1,1320 +0,0 @@ ------------------------------------------------------------------------------------------ --- --- File Name: MT46V16M16.VHD --- Version: 2.1 --- Date: January 14th, 2002 --- Model: Behavioral --- Simulator: NCDesktop - http://www.cadence.com --- ModelSim PE - http://www.model.com --- --- Dependencies: None --- --- Author: Son P. Huynh --- Email: sphuynh@micron.com --- Phone: (208) 368-3825 --- Company: Micron Technology, Inc. --- Part Number: MT46V16M16 (4 Mb x 16 x 4 Banks) --- --- Description: Micron 256 Mb SDRAM DDR (Double Data Rate) --- --- Limitation: Doesn't model internal refresh counter --- --- Note: --- --- Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY --- WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY --- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR --- A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. --- --- Copyright (c) 1998 Micron Semiconductor Products, Inc. --- All rights researved --- --- Rev Author Date Changes --- --- ---------------------------- ---------- ------------------------------------- --- 2.1 Son P. Huynh 01/14/2002 - Fix Burst_counter --- Micron Technology, Inc. --- --- 2.0 Son P. Huynh 11/08/2001 - Second release --- Micron Technology, Inc. - Rewrote and remove SHARED VARIABLE --- ------------------------------------------------------------------------------------------ - -LIBRARY IEEE; - USE IEEE.STD_LOGIC_1164.ALL; - USE IEEE.STD_LOGIC_UNSIGNED.ALL; - USE IEEE.STD_LOGIC_ARITH.ALL; - -ENTITY MT46V16M16 IS - GENERIC ( -- Timing for -75Z CL2 - tCK : TIME := 7.500 ns; - tCH : TIME := 3.375 ns; -- 0.45*tCK - tCL : TIME := 3.375 ns; -- 0.45*tCK - tDH : TIME := 0.500 ns; - tDS : TIME := 0.500 ns; - tIH : TIME := 0.900 ns; - tIS : TIME := 0.900 ns; - tMRD : TIME := 15.000 ns; - tRAS : TIME := 40.000 ns; - tRAP : TIME := 20.000 ns; - tRC : TIME := 65.000 ns; - tRFC : TIME := 75.000 ns; - tRCD : TIME := 20.000 ns; - tRP : TIME := 20.000 ns; - tRRD : TIME := 15.000 ns; - tWR : TIME := 15.000 ns; - addr_bits : INTEGER := 13; - data_bits : INTEGER := 16; - cols_bits : INTEGER := 9 - ); - PORT ( - Dq : INOUT STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0) := (OTHERS => 'Z'); - Dqs : INOUT STD_LOGIC_VECTOR (1 DOWNTO 0) := "ZZ"; - Addr : IN STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - Ba : IN STD_LOGIC_VECTOR (1 DOWNTO 0); - Clk : IN STD_LOGIC; - Clk_n : IN STD_LOGIC; - Cke : IN STD_LOGIC; - Cs_n : IN STD_LOGIC; - Ras_n : IN STD_LOGIC; - Cas_n : IN STD_LOGIC; - We_n : IN STD_LOGIC; - Dm : IN STD_LOGIC_VECTOR (1 DOWNTO 0) - ); -END MT46V16M16; - -ARCHITECTURE behave OF MT46V16M16 IS - -- Array for Read pipeline - TYPE Array_Read_cmnd IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Read_bank IS ARRAY (8 DOWNTO 0) OF STD_LOGIC_VECTOR (1 DOWNTO 0); - TYPE Array_Read_cols IS ARRAY (8 DOWNTO 0) OF STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - - -- Array for Write pipeline - TYPE Array_Write_cmnd IS ARRAY (2 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Write_bank IS ARRAY (2 DOWNTO 0) OF STD_LOGIC_VECTOR (1 DOWNTO 0); - TYPE Array_Write_cols IS ARRAY (2 DOWNTO 0) OF STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - - -- Array for Auto Precharge - TYPE Array_Read_precharge IS ARRAY (3 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Write_precharge IS ARRAY (3 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Count_precharge IS ARRAY (3 DOWNTO 0) OF INTEGER; - - -- Array for Manual Precharge - TYPE Array_A10_precharge IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Bank_precharge IS ARRAY (8 DOWNTO 0) OF STD_LOGIC_VECTOR (1 DOWNTO 0); - TYPE Array_Cmnd_precharge IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - - -- Array for Burst Terminate - TYPE Array_Cmnd_bst IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - - -- Array for Memory Access - TYPE Array_ram_type IS ARRAY (2**cols_bits - 1 DOWNTO 0) OF STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0); - TYPE Array_ram_pntr IS ACCESS Array_ram_type; - TYPE Array_ram_stor IS ARRAY (2**addr_bits - 1 DOWNTO 0) OF Array_ram_pntr; - - -- Data pair - SIGNAL Dq_pair : STD_LOGIC_VECTOR (2 * data_bits - 1 DOWNTO 0); - SIGNAL Dm_pair : STD_LOGIC_VECTOR (3 DOWNTO 0); - - -- Mode Register - SIGNAL Mode_reg : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0'); - - -- Command Decode Variables - SIGNAL Active_enable, Aref_enable, Burst_term, Ext_mode_enable : STD_LOGIC := '0'; - SIGNAL Mode_reg_enable, Prech_enable, Read_enable, Write_enable : STD_LOGIC := '0'; - - -- Burst Length Decode Variables - SIGNAL Burst_length_2, Burst_length_4, Burst_length_8, Burst_length_f : STD_LOGIC := '0'; - - -- Cas Latency Decode Variables - SIGNAL Cas_latency_15, Cas_latency_2, Cas_latency_25, Cas_latency_3, Cas_latency_4 : STD_LOGIC := '0'; - - -- Internal Control Signals - SIGNAL Cs_in, Ras_in, Cas_in, We_in : STD_LOGIC := '0'; - - -- System Clock - SIGNAL Sys_clk : STD_LOGIC := '0'; - - -- Dqs buffer - SIGNAL Dqs_out : STD_LOGIC_VECTOR (1 DOWNTO 0) := "ZZ"; - -BEGIN - -- Strip the strength - Cs_in <= To_X01 (Cs_n); - Ras_in <= To_X01 (Ras_n); - Cas_in <= To_X01 (Cas_n); - We_in <= To_X01 (We_n); - - -- Commands Decode - Active_enable <= NOT(Cs_in) AND NOT(Ras_in) AND Cas_in AND We_in; - Aref_enable <= NOT(Cs_in) AND NOT(Ras_in) AND NOT(Cas_in) AND We_in; - Burst_term <= NOT(Cs_in) AND Ras_in AND Cas_in AND NOT(We_in); - Ext_mode_enable <= NOT(Cs_in) AND NOT(Ras_in) AND NOT(Cas_in) AND NOT(We_in) AND Ba(0) AND NOT(Ba(1)); - Mode_reg_enable <= NOT(Cs_in) AND NOT(Ras_in) AND NOT(Cas_in) AND NOT(We_in) AND NOT(Ba(0)) AND NOT(Ba(1)); - Prech_enable <= NOT(Cs_in) AND NOT(Ras_in) AND Cas_in AND NOT(We_in); - Read_enable <= NOT(Cs_in) AND Ras_in AND NOT(Cas_in) AND We_in; - Write_enable <= NOT(Cs_in) AND Ras_in AND NOT(Cas_in) AND NOT(We_in); - - -- Burst Length Decode - Burst_length_2 <= NOT(Mode_reg(2)) AND NOT(Mode_reg(1)) AND Mode_reg(0); - Burst_length_4 <= NOT(Mode_reg(2)) AND Mode_reg(1) AND NOT(Mode_reg(0)); - Burst_length_8 <= NOT(Mode_reg(2)) AND Mode_reg(1) AND Mode_reg(0); - Burst_length_f <= (Mode_reg(2)) AND Mode_reg(1) AND Mode_reg(0); - - -- CAS Latency Decode - Cas_latency_15 <= Mode_reg(6) AND NOT(Mode_reg(5)) AND (Mode_reg(4)); - Cas_latency_2 <= NOT(Mode_reg(6)) AND Mode_reg(5) AND NOT(Mode_reg(4)); - Cas_latency_25 <= Mode_reg(6) AND Mode_reg(5) AND NOT(Mode_reg(4)); - Cas_latency_3 <= NOT(Mode_reg(6)) AND Mode_reg(5) AND Mode_reg(4); - Cas_latency_4 <= (Mode_reg(6)) AND NOT(Mode_reg(5)) AND NOT(Mode_reg(4)); - - -- Dqs buffer - Dqs <= Dqs_out; - - -- - -- System Clock - -- - int_clk : PROCESS (Clk, Clk_n) - VARIABLE ClkZ, CkeZ : STD_LOGIC := '0'; - begin - IF Clk = '1' AND Clk_n = '0' THEN - ClkZ := '1'; - CkeZ := Cke; - ELSIF Clk = '0' AND Clk_n = '1' THEN - ClkZ := '0'; - END IF; - Sys_clk <= CkeZ AND ClkZ; - END PROCESS; - - -- - -- Main Process - -- - state_register : PROCESS - -- Precharge Variables - VARIABLE Pc_b0, Pc_b1, Pc_b2, Pc_b3 : STD_LOGIC := '0'; - - -- Activate Variables - VARIABLE Act_b0, Act_b1, Act_b2, Act_b3 : STD_LOGIC := '1'; - - -- Data IO variables - VARIABLE Data_in_enable, Data_out_enable : STD_LOGIC := '0'; - - -- Internal address mux variables - VARIABLE Cols_brst : STD_LOGIC_VECTOR (2 DOWNTO 0); - VARIABLE Prev_bank : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"; - VARIABLE Bank_addr : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"; - VARIABLE Cols_addr : STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - VARIABLE Rows_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B0_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B1_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B2_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B3_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - - -- DLL Reset variables - VARIABLE DLL_enable : STD_LOGIC := '0'; - VARIABLE DLL_reset : STD_LOGIC := '0'; - VARIABLE DLL_done : STD_LOGIC := '0'; - VARIABLE DLL_count : INTEGER := 0; - - -- Timing Check - VARIABLE MRD_chk : TIME := 0 ns; - VARIABLE RFC_chk : TIME := 0 ns; - VARIABLE RRD_chk : TIME := 0 ns; - VARIABLE RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3 : TIME := 0 ns; - VARIABLE RAP_chk0, RAP_chk1, RAP_chk2, RAP_chk3 : TIME := 0 ns; - VARIABLE RC_chk0, RC_chk1, RC_chk2, RC_chk3 : TIME := 0 ns; - VARIABLE RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3 : TIME := 0 ns; - VARIABLE RP_chk0, RP_chk1, RP_chk2, RP_chk3 : TIME := 0 ns; - VARIABLE WR_chk0, WR_chk1, WR_chk2, WR_chk3 : TIME := 0 ns; - - -- Read pipeline variables - VARIABLE Read_cmnd : Array_Read_cmnd; - VARIABLE Read_bank : Array_Read_bank; - VARIABLE Read_cols : Array_Read_cols; - - -- Write pipeline variables - VARIABLE Write_cmnd : Array_Write_cmnd; - VARIABLE Write_bank : Array_Write_bank; - VARIABLE Write_cols : Array_Write_cols; - - -- Auto Precharge variables - VARIABLE Read_precharge : Array_Read_precharge := ('0' & '0' & '0' & '0'); - VARIABLE Write_precharge : Array_Write_precharge := ('0' & '0' & '0' & '0'); - VARIABLE Count_precharge : Array_Count_precharge := ( 0 & 0 & 0 & 0 ); - - -- Manual Precharge variables - VARIABLE A10_precharge : Array_A10_precharge; - VARIABLE Bank_precharge : Array_Bank_precharge; - VARIABLE Cmnd_precharge : Array_Cmnd_precharge; - - -- Burst Terminate variable - VARIABLE Cmnd_bst : Array_Cmnd_bst; - - -- Memory Banks - VARIABLE Bank0 : Array_ram_stor; - VARIABLE Bank1 : Array_ram_stor; - VARIABLE Bank2 : Array_ram_stor; - VARIABLE Bank3 : Array_ram_stor; - - -- Burst Counter - VARIABLE Burst_counter : STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - - -- Internal Dqs initialize - VARIABLE Dqs_int : STD_LOGIC := '0'; - - -- Data buffer for DM Mask - VARIABLE Data_buf : STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0) := (OTHERS => 'Z'); - - -- - -- Initialize empty rows - -- - PROCEDURE Init_mem (Bank : STD_LOGIC_VECTOR; Row_index : INTEGER) IS - VARIABLE i, j : INTEGER := 0; - BEGIN - IF Bank = "00" THEN - IF Bank0 (Row_index) = NULL THEN -- Check to see if row empty - Bank0 (Row_index) := NEW Array_ram_type; -- Open new row for access - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP -- Filled row with zeros - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank0 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - ELSIF Bank = "01" THEN - IF Bank1 (Row_index) = NULL THEN - Bank1 (Row_index) := NEW Array_ram_type; - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank1 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - ELSIF Bank = "10" THEN - IF Bank2 (Row_index) = NULL THEN - Bank2 (Row_index) := NEW Array_ram_type; - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank2 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - ELSIF Bank = "11" THEN - IF Bank3 (Row_index) = NULL THEN - Bank3 (Row_index) := NEW Array_ram_type; - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank3 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - END IF; - END; - - -- - -- Burst Counter - -- - PROCEDURE Burst_decode IS - VARIABLE Cols_temp : STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0) := (OTHERS => '0'); - BEGIN - -- Advance burst counter - Burst_counter := Burst_counter + 1; - - -- Burst Type - IF Mode_reg (3) = '0' THEN - Cols_temp := Cols_addr + 1; - ELSIF Mode_reg (3) = '1' THEN - Cols_temp (2) := Burst_counter (2) XOR Cols_brst (2); - Cols_temp (1) := Burst_counter (1) XOR Cols_brst (1); - Cols_temp (0) := Burst_counter (0) XOR Cols_brst (0); - END IF; - - -- Burst Length - IF Burst_length_2 = '1' THEN - Cols_addr (0) := Cols_temp (0); - ELSIF Burst_length_4 = '1' THEN - Cols_addr (1 DOWNTO 0) := Cols_temp (1 DOWNTO 0); - ELSIF Burst_length_8 = '1' THEN - Cols_addr (2 DOWNTO 0) := Cols_temp (2 DOWNTO 0); - ELSE - Cols_addr := Cols_temp; - END IF; - - -- Data counter - IF Burst_length_2 = '1' THEN - IF Burst_counter >= 2 THEN - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - ELSIF Data_out_enable = '1' THEN - Data_out_enable := '0'; - END IF; - END IF; - ELSIF Burst_length_4 = '1' THEN - IF Burst_counter >= 4 THEN - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - ELSIF Data_out_enable = '1' THEN - Data_out_enable := '0'; - END IF; - END IF; - ELSIF Burst_length_8 = '1' THEN - IF Burst_counter >= 8 THEN - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - ELSIF Data_out_enable = '1' THEN - Data_out_enable := '0'; - END IF; - END IF; - END IF; - END; - - BEGIN - WAIT ON Sys_clk; - - -- - -- Manual Precharge Pipeline - -- - IF ((Sys_clk'EVENT AND Sys_clk = '0') OR (Sys_clk'EVENT AND Sys_clk = '1')) THEN - -- A10 Precharge Pipeline - A10_precharge(0) := A10_precharge(1); - A10_precharge(1) := A10_precharge(2); - A10_precharge(2) := A10_precharge(3); - A10_precharge(3) := A10_precharge(4); - A10_precharge(4) := A10_precharge(5); - A10_precharge(5) := A10_precharge(6); - A10_precharge(6) := A10_precharge(7); - A10_precharge(7) := A10_precharge(8); - A10_precharge(8) := '0'; - - -- Bank Precharge Pipeline - Bank_precharge(0) := Bank_precharge(1); - Bank_precharge(1) := Bank_precharge(2); - Bank_precharge(2) := Bank_precharge(3); - Bank_precharge(3) := Bank_precharge(4); - Bank_precharge(4) := Bank_precharge(5); - Bank_precharge(5) := Bank_precharge(6); - Bank_precharge(6) := Bank_precharge(7); - Bank_precharge(7) := Bank_precharge(8); - Bank_precharge(8) := "00"; - - -- Command Precharge Pipeline - Cmnd_precharge(0) := Cmnd_precharge(1); - Cmnd_precharge(1) := Cmnd_precharge(2); - Cmnd_precharge(2) := Cmnd_precharge(3); - Cmnd_precharge(3) := Cmnd_precharge(4); - Cmnd_precharge(4) := Cmnd_precharge(5); - Cmnd_precharge(5) := Cmnd_precharge(6); - Cmnd_precharge(6) := Cmnd_precharge(7); - Cmnd_precharge(7) := Cmnd_precharge(8); - Cmnd_precharge(8) := '0'; - - -- Terminate Read if same bank or all banks - IF ((Cmnd_precharge (0) = '1') AND - (Bank_precharge (0) = Bank_addr OR A10_precharge (0) = '1') AND - (Data_out_enable = '1')) THEN - Data_out_enable := '0'; - END IF; - END IF; - - -- - -- Burst Terminate Pipeline - -- - IF ((Sys_clk'EVENT AND Sys_clk = '0') OR (Sys_clk'EVENT AND Sys_clk = '1')) THEN - -- Burst Terminate pipeline - Cmnd_bst (0) := Cmnd_bst (1); - Cmnd_bst (1) := Cmnd_bst (2); - Cmnd_bst (2) := Cmnd_bst (3); - Cmnd_bst (3) := Cmnd_bst (4); - Cmnd_bst (4) := Cmnd_bst (5); - Cmnd_bst (5) := Cmnd_bst (6); - Cmnd_bst (6) := Cmnd_bst (7); - Cmnd_bst (7) := Cmnd_bst (8); - Cmnd_bst (8) := '0'; - - -- Terminate current Read - IF ((Cmnd_bst (0) = '1') AND (Data_out_enable = '1')) THEN - Data_out_enable := '0'; - END IF; - END IF; - - -- - -- Dq and Dqs Drivers - -- - IF ((Sys_clk'EVENT AND Sys_clk = '0') OR (Sys_clk'EVENT AND Sys_clk = '1')) THEN - -- Read Command Pipeline - Read_cmnd (0) := Read_cmnd (1); - Read_cmnd (1) := Read_cmnd (2); - Read_cmnd (2) := Read_cmnd (3); - Read_cmnd (3) := Read_cmnd (4); - Read_cmnd (4) := Read_cmnd (5); - Read_cmnd (5) := Read_cmnd (6); - Read_cmnd (6) := Read_cmnd (7); - Read_cmnd (7) := Read_cmnd (8); - Read_cmnd (8) := '0'; - - -- Read Bank Pipeline - Read_bank (0) := Read_bank (1); - Read_bank (1) := Read_bank (2); - Read_bank (2) := Read_bank (3); - Read_bank (3) := Read_bank (4); - Read_bank (4) := Read_bank (5); - Read_bank (5) := Read_bank (6); - Read_bank (6) := Read_bank (7); - Read_bank (7) := Read_bank (8); - Read_bank (8) := "00"; - - -- Read Column Pipeline - Read_cols (0) := Read_cols (1); - Read_cols (1) := Read_cols (2); - Read_cols (2) := Read_cols (3); - Read_cols (3) := Read_cols (4); - Read_cols (4) := Read_cols (5); - Read_cols (5) := Read_cols (6); - Read_cols (6) := Read_cols (7); - Read_cols (7) := Read_cols (8); - Read_cols (8) := (OTHERS => '0'); - - -- Initialize Read command - IF Read_cmnd (0) = '1' THEN - Data_out_enable := '1'; - Bank_addr := Read_bank (0); - Cols_addr := Read_cols (0); - Cols_brst := Cols_addr (2 DOWNTO 0); - Burst_counter := (OTHERS => '0'); - - -- Row address mux - CASE Bank_addr IS - WHEN "00" => Rows_addr := B0_row_addr; - WHEN "01" => Rows_addr := B1_row_addr; - WHEN "10" => Rows_addr := B2_row_addr; - WHEN OTHERS => Rows_addr := B3_row_addr; - END CASE; - END IF; - - -- Toggle Dqs during Read command - IF Data_out_enable = '1' THEN - Dqs_int := '0'; - IF Dqs_out = "00" THEN - Dqs_out <= "11"; - ELSIF Dqs_out = "11" THEN - Dqs_out <= "00"; - ELSE - Dqs_out <= "00"; - END IF; - ELSIF Data_out_enable = '0' AND Dqs_int = '0' THEN - Dqs_out <= "ZZ"; - END IF; - - -- Initialize Dqs for Read command - IF Read_cmnd (2) = '1' THEN - IF Data_out_enable = '0' THEN - Dqs_int := '1'; - Dqs_out <= "00"; - END IF; - END IF; - - -- Read Latch - IF Data_out_enable = '1' THEN - -- Initialize Memory - Init_mem (Bank_addr, CONV_INTEGER(Rows_addr)); - - -- Output Data - CASE Bank_addr IS - WHEN "00" => Dq <= Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "01" => Dq <= Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "10" => Dq <= Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN OTHERS => Dq <= Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - END CASE; - - -- Increase Burst Counter - Burst_decode; - ELSE - Dq <= (OTHERS => 'Z'); - END IF; - END IF; - - -- - -- Write FIFO and DM Mask Logic - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - -- Write command pipeline - Write_cmnd (0) := Write_cmnd (1); - Write_cmnd (1) := Write_cmnd (2); - Write_cmnd (2) := '0'; - - -- Write command pipeline - Write_bank (0) := Write_bank (1); - Write_bank (1) := Write_bank (2); - Write_bank (2) := "00"; - - -- Write column pipeline - Write_cols (0) := Write_cols (1); - Write_cols (1) := Write_cols (2); - Write_cols (2) := (OTHERS => '0'); - - -- Initialize Write command - IF Write_cmnd (0) = '1' THEN - Data_in_enable := '1'; - Bank_addr := Write_bank (0); - Cols_addr := Write_cols (0); - Cols_brst := Cols_addr (2 DOWNTO 0); - Burst_counter := (OTHERS => '0'); - - -- Row address mux - CASE Bank_addr IS - WHEN "00" => Rows_addr := B0_row_addr; - WHEN "01" => Rows_addr := B1_row_addr; - WHEN "10" => Rows_addr := B2_row_addr; - WHEN OTHERS => Rows_addr := B3_row_addr; - END CASE; - END IF; - - -- Write data - IF Data_in_enable = '1' THEN - -- Initialize memory - Init_mem (Bank_addr, CONV_INTEGER(Rows_addr)); - - -- Write first data - IF Dm_pair (1) = '0' OR Dm_pair (0) = '0' THEN - -- Data Buffer - CASE Bank_addr IS - WHEN "00" => Data_buf := Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "01" => Data_buf := Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "10" => Data_buf := Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN OTHERS => Data_buf := Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - END CASE; - - -- Perform DM Mask - IF Dm_pair (0) = '0' THEN - Data_buf ( 7 DOWNTO 0) := Dq_pair ( 7 DOWNTO 0); - END IF; - IF Dm_pair (1) = '0' THEN - Data_buf (15 DOWNTO 8) := Dq_pair (15 DOWNTO 8); - END IF; - - -- Write Data - CASE Bank_addr IS - WHEN "00" => Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "01" => Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "10" => Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN OTHERS => Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - END CASE; - END IF; - - -- Increase Burst Counter - Burst_decode; - - -- Write second data - IF Dm_pair (3) = '0' OR Dm_pair (2) = '0' THEN - -- Data Buffer - CASE Bank_addr IS - WHEN "00" => Data_buf := Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "01" => Data_buf := Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "10" => Data_buf := Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN OTHERS => Data_buf := Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - END CASE; - - -- Perform DM Mask - IF Dm_pair (2) = '0' THEN - Data_buf ( 7 DOWNTO 0) := Dq_pair (23 DOWNTO 16); - END IF; - IF Dm_pair (3) = '0' THEN - Data_buf (15 DOWNTO 8) := Dq_pair (31 DOWNTO 24); - END IF; - - -- Write Data - CASE Bank_addr IS - WHEN "00" => Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "01" => Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "10" => Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN OTHERS => Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - END CASE; - END IF; - - -- Increase Burst Counter - Burst_decode; - - -- tWR start and tWTR check - IF Dm_pair (3 DOWNTO 2) = "00" OR Dm_pair (1 DOWNTO 0) = "00" THEN - CASE Bank_addr IS - WHEN "00" => WR_chk0 := NOW; - WHEN "01" => WR_chk1 := NOW; - WHEN "10" => WR_chk2 := NOW; - WHEN OTHERS => WR_chk3 := NOW; - END CASE; - - -- tWTR check - ASSERT (Read_enable = '0') - REPORT "tWTR violation during Read" - SEVERITY WARNING; - END IF; - END IF; - END IF; - - -- - -- Auto Precharge Calculation - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - -- Precharge counter - IF Read_precharge (0) = '1' OR Write_precharge (0) = '1' THEN - Count_precharge (0) := Count_precharge (0) + 1; - END IF; - IF Read_precharge (1) = '1' OR Write_precharge (1) = '1' THEN - Count_precharge (1) := Count_precharge (1) + 1; - END IF; - IF Read_precharge (2) = '1' OR Write_precharge (2) = '1' THEN - Count_precharge (2) := Count_precharge (2) + 1; - END IF; - IF Read_precharge (3) = '1' OR Write_precharge (3) = '1' THEN - Count_precharge (3) := Count_precharge (3) + 1; - END IF; - - -- Read with AutoPrecharge Calculation - -- The device start internal precharge when: - -- 1. Meet tRAS requirement - -- 2. BL/2 cycles after command - IF ((Read_precharge(0) = '1') AND (NOW - RAS_chk0 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(0) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(0) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(0) >= 4)) THEN - Pc_b0 := '1'; - Act_b0 := '0'; - RP_chk0 := NOW; - Read_precharge(0) := '0'; - END IF; - END IF; - IF ((Read_precharge(1) = '1') AND (NOW - RAS_chk1 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(1) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(1) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(1) >= 4)) THEN - Pc_b1 := '1'; - Act_b1 := '0'; - RP_chk1 := NOW; - Read_precharge(1) := '0'; - END IF; - END IF; - IF ((Read_precharge(2) = '1') AND (NOW - RAS_chk2 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(2) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(2) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(2) >= 4)) THEN - Pc_b2 := '1'; - Act_b2 := '0'; - RP_chk2 := NOW; - Read_precharge(2) := '0'; - END IF; - END IF; - IF ((Read_precharge(3) = '1') AND (NOW - RAS_chk3 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(3) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(3) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(3) >= 4)) THEN - Pc_b3 := '1'; - Act_b3 := '0'; - RP_chk3 := NOW; - Read_precharge(3) := '0'; - END IF; - END IF; - - -- Write with AutoPrecharge Calculation - -- The device start internal precharge when: - -- 1. Meet tRAS requirement - -- 2. Two clock after last burst - -- Since tWR is time base, the model will compensate tRP - IF ((Write_precharge(0) = '1') AND (NOW - RAS_chk0 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (0) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (0) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (0) >= 7)) THEN - Pc_b0 := '1'; - Act_b0 := '0'; - RP_chk0 := NOW - ((2 * tCK) - tWR); - Write_precharge(0) := '0'; - END IF; - END IF; - IF ((Write_precharge(1) = '1') AND (NOW - RAS_chk1 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (1) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (1) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (1) >= 7)) THEN - Pc_b1 := '1'; - Act_b1 := '0'; - RP_chk1 := NOW - ((2 * tCK) - tWR); - Write_precharge(1) := '0'; - END IF; - END IF; - IF ((Write_precharge(2) = '1') AND (NOW - RAS_chk2 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (2) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (2) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (2) >= 7)) THEN - Pc_b2 := '1'; - Act_b2 := '0'; - RP_chk2 := NOW - ((2 * tCK) - tWR); - Write_precharge(2) := '0'; - END IF; - END IF; - IF ((Write_precharge(3) = '1') AND (NOW - RAS_chk3 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (3) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (3) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (3) >= 7)) THEN - Pc_b3 := '1'; - Act_b3 := '0'; - RP_chk3 := NOW - ((2 * tCK) - tWR); - Write_precharge(3) := '0'; - END IF; - END IF; - END IF; - - -- - -- DLL Counter - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - IF (DLL_Reset = '1' AND DLL_done = '0') THEN - DLL_count := DLL_count + 1; - IF (DLL_count >= 200) THEN - DLL_done := '1'; - END IF; - END IF; - END IF; - - -- - -- Control Logic - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - -- Auto Refresh - IF Aref_enable = '1' THEN - -- Auto Refresh to Auto Refresh - ASSERT (NOW - RFC_chk >= tRFC) - REPORT "tRFC violation during Auto Refresh" - SEVERITY WARNING; - - -- Precharge to Auto Refresh - ASSERT ((NOW - RP_chk0 >= tRP) AND (NOW - RP_chk1 >= tRP) AND - (NOW - RP_chk2 >= tRP) AND (NOW - RP_chk3 >= tRP)) - REPORT "tRP violation during Auto Refresh" - SEVERITY WARNING; - - -- Precharge to Auto Refresh - ASSERT (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') - REPORT "All banks must be Precharge before Auto Refresh" - SEVERITY WARNING; - - -- Record current tRFC time - RFC_chk := NOW; - END IF; - - -- Extended Load Mode Register - IF Ext_mode_enable = '1' THEN - IF (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') THEN - IF (Addr (0) = '0') THEN - DLL_enable := '1'; - ELSE - DLL_enable := '0'; - END IF; - END IF; - - -- Precharge to EMR - ASSERT (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') - REPORT "All bank must be Precharged before Extended Mode Register" - SEVERITY WARNING; - - -- Precharge to EMR - ASSERT ((NOW - RP_chk0 >= tRP) AND (NOW - RP_chk1 >= tRP) AND - (NOW - RP_chk2 >= tRP) AND (NOW - RP_chk3 >= tRP)) - REPORT "tRP violation during Extended Load Register" - SEVERITY WARNING; - - -- LMR/EMR to EMR - ASSERT (NOW - MRD_chk >= tMRD) - REPORT "tMRD violation during Extended Mode Register" - SEVERITY WARNING; - - -- Record current tMRD time - MRD_chk := NOW; - END IF; - - -- Load Mode Register - IF Mode_reg_enable = '1' THEN - -- Register mode - Mode_reg <= Addr; - - -- DLL Reset - IF (DLL_enable = '1' AND Addr (8) = '1') THEN - DLL_reset := '1'; - DLL_done := '0'; - DLL_count := 0; - ELSIF (DLL_enable = '1' AND DLL_reset = '0' AND Addr (8) = '0') THEN - ASSERT (FALSE) - REPORT "DLL is ENABLE: DLL RESET is require" - SEVERITY WARNING; - ELSIF (DLL_enable = '0' AND Addr (8) = '1') THEN - ASSERT (FALSE) - REPORT "DLL is DISABLE: DLL RESET will be ignored" - SEVERITY WARNING; - END IF; - - -- Precharge to LMR - ASSERT (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') - REPORT "All bank must be Precharged before Load Mode Register" - SEVERITY WARNING; - - -- Precharge to EMR - ASSERT ((NOW - RP_chk0 >= tRP) AND (NOW - RP_chk1 >= tRP) AND - (NOW - RP_chk2 >= tRP) AND (NOW - RP_chk3 >= tRP)) - REPORT "tRP violation during Load Mode Register" - SEVERITY WARNING; - - -- LMR/ELMR to LMR - ASSERT (NOW - MRD_chk >= tMRD) - REPORT "tMRD violation during Load Mode Register" - SEVERITY WARNING; - - -- Check for invalid Burst Length - ASSERT ((Addr (2 DOWNTO 0) = "001") OR -- BL = 2 - (Addr (2 DOWNTO 0) = "010") OR -- BL = 4 - (Addr (2 DOWNTO 0) = "011")) -- BL = 8 - REPORT "Invalid Burst Length during Load Mode Register" - SEVERITY WARNING; - - -- Check for invalid CAS Latency - ASSERT ((Addr (6 DOWNTO 4) = "010") OR -- CL = 2.0 - (Addr (6 DOWNTO 4) = "110")) -- CL = 2.5 - REPORT "Invalid CAS Latency during Load Mode Register" - SEVERITY WARNING; - - -- Record current tMRD time - MRD_chk := NOW; - END IF; - - -- Active Block (latch Bank and Row Address) - IF Active_enable = '1' THEN - -- Activate an OPEN bank can corrupt data - ASSERT ((Ba = "00" AND Act_b0 = '0') OR - (Ba = "01" AND Act_b1 = '0') OR - (Ba = "10" AND Act_b2 = '0') OR - (Ba = "11" AND Act_b3 = '0')) - REPORT "Bank is already activated - data can be corrupted" - SEVERITY WARNING; - - -- Activate Bank 0 - IF Ba = "00" AND Pc_b0 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk0 >= tRC) - REPORT "tRC violation during Activate Bank 0" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk0 >= tRP) - REPORT "tRP violation during Activate Bank 0" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b0 := '1'; - Pc_b0 := '0'; - B0_row_addr := Addr; - RC_chk0 := NOW; - RCD_chk0 := NOW; - RAS_chk0 := NOW; - RAP_chk0 := NOW; - END IF; - - -- Activate Bank 1 - IF Ba = "01" AND Pc_b1 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk1 >= tRC) - REPORT "tRC violation during Activate Bank 1" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk1 >= tRP) - REPORT "tRP violation during Activate Bank 1" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b1 := '1'; - Pc_b1 := '0'; - B1_row_addr := Addr; - RC_chk1 := NOW; - RCD_chk1 := NOW; - RAS_chk1 := NOW; - RAP_chk1 := NOW; - END IF; - - -- Activate Bank 2 - IF Ba = "10" AND Pc_b2 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk2 >= tRC) - REPORT "tRC violation during Activate Bank 2" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk2 >= tRP) - REPORT "tRP violation during Activate Bank 2" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b2 := '1'; - Pc_b2 := '0'; - B2_row_addr := Addr; - RC_chk2 := NOW; - RCD_chk2 := NOW; - RAS_chk2 := NOW; - RAP_chk2 := NOW; - END IF; - - -- Activate Bank 3 - IF Ba = "11" AND Pc_b3 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk3 >= tRC) - REPORT "tRC violation during Activate Bank 3" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk3 >= tRP) - REPORT "tRP violation during Activate Bank 3" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b3 := '1'; - Pc_b3 := '0'; - B3_row_addr := Addr; - RC_chk3 := NOW; - RCD_chk3 := NOW; - RAS_chk3 := NOW; - RAP_chk3 := NOW; - END IF; - - -- Activate Bank A to Activate Bank B - IF (Prev_bank /= Ba) THEN - ASSERT (NOW - RRD_chk >= tRRD) - REPORT "tRRD violation during Activate" - SEVERITY WARNING; - END IF; - - -- AutoRefresh to Activate - ASSERT (NOW - RFC_chk >= tRFC) - REPORT "tRFC violation during Activate" - SEVERITY WARNING; - - -- Record Variables for Checking Violation - RRD_chk := NOW; - Prev_bank := Ba; - END IF; - - -- Precharge Block - Consider NOP if bank already precharged or in process of precharging - IF Prech_enable = '1' THEN - -- EMR or LMR to Precharge - ASSERT (NOW - MRD_chk >= tMRD) - REPORT "tMRD violation during Precharge" - SEVERITY WARNING; - - -- Precharge Bank 0 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "00")) AND Act_b0 = '1') THEN - Act_b0 := '0'; - Pc_b0 := '1'; - RP_chk0 := NOW; - - -- Activate to Precharge bank 0 - ASSERT (NOW - RAS_chk0 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk0 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Precharge Bank 1 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "01")) AND Act_b1 = '1') THEN - Act_b1 := '0'; - Pc_b1 := '1'; - RP_chk1 := NOW; - - -- Activate to Precharge - ASSERT (NOW - RAS_chk1 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk1 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Precharge Bank 2 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "10")) AND Act_b2 = '1') THEN - Act_b2 := '0'; - Pc_b2 := '1'; - RP_chk2 := NOW; - - -- Activate to Precharge - ASSERT (NOW - RAS_chk2 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk2 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Precharge Bank 3 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "11")) AND Act_b3 = '1') THEN - Act_b3 := '0'; - Pc_b3 := '1'; - RP_chk3 := NOW; - - -- Activate to Precharge - ASSERT (NOW - RAS_chk3 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk3 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Pipeline for READ - IF CAS_latency_15 = '1' THEN - A10_precharge (3) := Addr(10); - Bank_precharge (3) := Ba; - Cmnd_precharge (3) := '1'; - ELSIF CAS_latency_2 = '1' THEN - A10_precharge (4) := Addr(10); - Bank_precharge (4) := Ba; - Cmnd_precharge (4) := '1'; - ELSIF CAS_latency_25 = '1' THEN - A10_precharge (5) := Addr(10); - Bank_precharge (5) := Ba; - Cmnd_precharge (5) := '1'; - ELSIF CAS_latency_3 = '1' THEN - A10_precharge (6) := Addr(10); - Bank_precharge (6) := Ba; - Cmnd_precharge (6) := '1'; - ELSIF CAS_latency_4 = '1' THEN - A10_precharge (8) := Addr(10); - Bank_precharge (8) := Ba; - Cmnd_precharge (8) := '1'; - END IF; - END IF; - - -- Burst Terminate - IF Burst_term = '1' THEN - -- Pipeline for Read - IF CAS_latency_15 = '1' THEN - Cmnd_bst (3) := '1'; - ELSIF CAS_latency_2 = '1' THEN - Cmnd_bst (4) := '1'; - ELSIF CAS_latency_25 = '1' THEN - Cmnd_bst (5) := '1'; - ELSIF CAS_latency_3 = '1' THEN - Cmnd_bst (6) := '1'; - ELSIF CAS_latency_4 = '1' THEN - Cmnd_bst (8) := '1'; - END IF; - - -- Terminate Write - ASSERT (Data_in_enable = '0') - REPORT "It's illegal to Burst Terminate a Write" - SEVERITY WARNING; - - -- Terminate Read with Auto Precharge - ASSERT (Read_precharge (0) = '0' AND Read_precharge (1) = '0' AND - Read_precharge (2) = '0' AND Read_precharge (3) = '0') - REPORT "It's illegal to Burst Terminate a Read with Auto Precharge" - SEVERITY WARNING; - END IF; - - -- Read Command - IF Read_enable = '1' THEN - -- CAS Latency Pipeline - IF Cas_latency_15 = '1' THEN - Read_cmnd (3) := '1'; - Read_bank (3) := Ba; - Read_cols (3) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_2 = '1' THEN - Read_cmnd (4) := '1'; - Read_bank (4) := Ba; - Read_cols (4) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_25 = '1' THEN - Read_cmnd (5) := '1'; - Read_bank (5) := Ba; - Read_cols (5) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_3 = '1' THEN - Read_cmnd (6) := '1'; - Read_bank (6) := Ba; - Read_cols (6) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_4 = '1' THEN - Read_cmnd (8) := '1'; - Read_bank (8) := Ba; - Read_cols (8) := Addr (8 DOWNTO 0); - END IF; - - -- Write to Read: Terminate Write Immediately - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - END IF; - - -- Interrupting a Read with Auto Precharge (same bank only) - ASSERT (Read_precharge(CONV_INTEGER(Ba)) = '0') - REPORT "It's illegal to interrupt a Read with Auto Precharge" - SEVERITY WARNING; - - -- Activate to Read - ASSERT ((Ba = "00" AND Act_b0 = '1') OR - (Ba = "01" AND Act_b1 = '1') OR - (Ba = "10" AND Act_b2 = '1') OR - (Ba = "11" AND Act_b3 = '1')) - REPORT "Bank is not Activated for Read" - SEVERITY WARNING; - - -- Activate to Read without Auto Precharge - IF Addr (10) = '0' THEN - ASSERT ((Ba = "00" AND NOW - RCD_chk0 >= tRCD) OR - (Ba = "01" AND NOW - RCD_chk1 >= tRCD) OR - (Ba = "10" AND NOW - RCD_chk2 >= tRCD) OR - (Ba = "11" AND NOW - RCD_chk3 >= tRCD)) - REPORT "tRCD violation during Read" - SEVERITY WARNING; - END IF; - - -- Activate to Read with Auto Precharge - IF Addr (10) = '1' THEN - ASSERT ((Ba = "00" AND NOW - RAP_chk0 >= tRAP) OR - (Ba = "01" AND NOW - RAP_chk1 >= tRAP) OR - (Ba = "10" AND NOW - RAP_chk2 >= tRAP) OR - (Ba = "11" AND NOW - RAP_chk3 >= tRAP)) - REPORT "tRAP violation during Read" - SEVERITY WARNING; - END IF; - - -- Auto precharge - IF Addr (10) = '1' THEN - Read_precharge (Conv_INTEGER(Ba)) := '1'; - Count_precharge (Conv_INTEGER(Ba)) := 0; - END IF; - - -- DLL Check - IF (DLL_reset = '1') THEN - ASSERT (DLL_done = '1') - REPORT "DLL RESET not complete" - SEVERITY WARNING; - END IF; - END IF; - - -- Write Command - IF Write_enable = '1' THEN - -- Pipeline for Write - Write_cmnd (2) := '1'; - Write_bank (2) := Ba; - Write_cols (2) := Addr (8 DOWNTO 0); - - -- Interrupting a Write with Auto Precharge (same bank only) - ASSERT (Write_precharge(CONV_INTEGER(Ba)) = '0') - REPORT "It's illegal to interrupt a Write with Auto Precharge" - SEVERITY WARNING; - - -- Activate to Write - ASSERT ((Ba = "00" AND Act_b0 = '1') OR - (Ba = "01" AND Act_b1 = '1') OR - (Ba = "10" AND Act_b2 = '1') OR - (Ba = "11" AND Act_b3 = '1')) - REPORT "Bank is not Activated for Write" - SEVERITY WARNING; - - -- Activate to Write - ASSERT ((Ba = "00" AND NOW - RCD_chk0 >= tRCD) OR - (Ba = "01" AND NOW - RCD_chk1 >= tRCD) OR - (Ba = "10" AND NOW - RCD_chk2 >= tRCD) OR - (Ba = "11" AND NOW - RCD_chk3 >= tRCD)) - REPORT "tRCD violation during Write" - SEVERITY WARNING; - - -- Auto precharge - IF Addr (10) = '1' THEN - Write_precharge (Conv_INTEGER(Ba)) := '1'; - Count_precharge (Conv_INTEGER(Ba)) := 0; - END IF; - END IF; - END IF; - END PROCESS; - - -- - -- Dqs Receiver - -- - dqs_rcvrs : PROCESS - VARIABLE Dm_temp : STD_LOGIC_VECTOR (1 DOWNTO 0); - VARIABLE Dq_temp : STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0); - BEGIN - WAIT ON Dqs; - -- Latch data at posedge Dqs - IF Dqs'EVENT AND Dqs (1) = '1' AND Dqs (0) = '1' THEN - Dq_temp := Dq; - Dm_temp := Dm; - END IF; - -- Latch data at negedge Dqs - IF Dqs'EVENT AND Dqs (1) = '0' AND Dqs (0) = '0' THEN - Dq_pair <= (Dq & Dq_temp); - Dm_pair <= (Dm & Dm_temp); - END IF; - END PROCESS; - - -- - -- Setup timing checks - -- - Setup_check : PROCESS - BEGIN - WAIT ON Sys_clk; - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - ASSERT(Cke'LAST_EVENT >= tIS) - REPORT "CKE Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Cs_n'LAST_EVENT >= tIS) - REPORT "CS# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Cas_n'LAST_EVENT >= tIS) - REPORT "CAS# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Ras_n'LAST_EVENT >= tIS) - REPORT "RAS# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(We_n'LAST_EVENT >= tIS) - REPORT "WE# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Addr'LAST_EVENT >= tIS) - REPORT "ADDR Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Ba'LAST_EVENT >= tIS) - REPORT "BA Setup time violation -- tIS" - SEVERITY WARNING; - END IF; - END PROCESS; - - -- - -- Hold timing checks - -- - Hold_check : PROCESS - BEGIN - WAIT ON Sys_clk'DELAYED (tIH); - IF Sys_clk'DELAYED (tIH) = '1' THEN - ASSERT(Cke'LAST_EVENT >= tIH) - REPORT "CKE Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Cs_n'LAST_EVENT >= tIH) - REPORT "CS# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Cas_n'LAST_EVENT >= tIH) - REPORT "CAS# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Ras_n'LAST_EVENT >= tIH) - REPORT "RAS# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(We_n'LAST_EVENT >= tIH) - REPORT "WE# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Addr'LAST_EVENT >= tIH) - REPORT "ADDR Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Ba'LAST_EVENT >= tIH) - REPORT "BA Hold time violation -- tIH" - SEVERITY WARNING; - END IF; - END PROCESS; - -END behave; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd deleted file mode 100644 index 4f799c5..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd +++ /dev/null @@ -1,111 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: Reset generator (Virtex-4 specific) --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library ieee; -use ieee.std_logic_1164.all; - -Library UNISIM; -use UNISIM.vcomponents.all; - -entity reset is - port - ( - clk : in std_logic; - rst_in : in std_logic; - rst_out : out std_logic - ); -end; - -architecture tech of reset is - - signal rst : std_logic; - signal shift_pipe : std_logic_vector(3 downto 0); - attribute KEEP : string; - attribute KEEP of shift_pipe : signal is "TRUE"; - -begin - - rst <= shift_pipe(0); - -bufg_reset: bufg - port map - ( - o => rst_out, - i => rst - ); - -fdp0: fdp - generic map - ( - init => '1' - ) - port map - ( - d => rst_in, - c => clk, - pre => '0', - q => shift_pipe(3) - ); - -fdp1: fdp - generic map - ( - init => '1' - ) - port map - ( - - d => shift_pipe(3), - c => clk, - pre => '0', - q => shift_pipe(2) - ); - -fdp2: fdp - generic map - ( - init => '1' - ) - port map - ( - d => shift_pipe(2), - c => clk, - pre => '0', - q => shift_pipe(1) - ); - -fdp3: fdp - generic map - ( - init => '1' - ) - port map - ( - - d => shift_pipe(1), - c => clk, - pre => '0', - q => shift_pipe(0) - ); - -end tech; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd deleted file mode 100644 index a50b6e8..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd +++ /dev/null @@ -1,269 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: SDRAM command controller --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_cmd is - Generic (BL : natural := 2); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - enable : in STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_out : out user_tag_t; - phy_ctrl : out phy_ctrl_t; - cmd : in sdr_cmd_t; - cmd_we : in STD_LOGIC; - cmd_ack : out STD_LOGIC; - col_addr : in col_addr_t; - mode_word : in mode_word_t; - sdr_cmd_ctrl : out sdr_cmd_lines_t; - sdr_addr : out sdr_addr_t; - sdr_ba : out sdr_ba_t - ); -end sdram_cmd; - -architecture behaviour of sdram_cmd is - - signal st_sdr, st_sdr_next : sdr_state_t; - - signal cc_preset : natural range 0 to 10; - signal cc_load_en : std_logic; - signal cycle_finished : std_logic; - - signal burst_preset : natural range 0 to 3; - signal burst_load_en : std_logic; - signal burst_finished : std_logic; - -begin - - u_tag_out <= u_tag_in; - ------------------------------------------------------------------------------------------- - -fsm_sdr_state: - process (st_sdr, cmd, cmd_we, cycle_finished, burst_finished, mode_word, enable, col_addr) - begin - st_sdr_next <= st_sdr; - sdr_cmd_ctrl <= COMMAND(SD_NOP); - - cc_load_en <= '0'; - cc_preset <= TIMING(cmd); - burst_load_en <= '0'; - cmd_ack <= '0'; - burst_preset <= BL/2-1; - phy_ctrl.re <= '0'; - phy_ctrl.drive_en <= '0'; - phy_ctrl.we <= '0'; - phy_ctrl.utag_we <= '0'; - sdr_addr <= mode_word(sdr_addr_t'left downto sdr_addr_t'right); - sdr_ba <= mode_word(mode_word_t'left downto mode_word_t'left-1); - - case st_sdr is - when PWR_DOWN => - sdr_cmd_ctrl <= COMMAND(SD_DESELECT); - if enable = '1' then - st_sdr_next <= IDLE; - end if; - - when PRECHARGE => - if cycle_finished = '1' then - st_sdr_next <= IDLE; - end if; - - when MODE => - if cycle_finished = '1' then - st_sdr_next <= IDLE; - end if; - - when IDLE => - if cmd_we = '1' then - cmd_ack <= '1'; - cc_load_en <= '1'; - cc_preset <= TIMING(cmd); - sdr_cmd_ctrl <= COMMAND(cmd); - case cmd is - when SD_PRE => - st_sdr_next <= PRECHARGE; - sdr_addr(BIT_PRE_ALL) <= mode_word(BIT_PRE_ALL); - when SD_LMR => - st_sdr_next <= MODE; - when SD_ACT => - st_sdr_next <= ROW_ACT; - when SD_AR => - st_sdr_next <= AUTO_REF; - when others => null; - end case; - end if; - - when ROW_ACT => - if cycle_finished = '1' then - if cmd_we = '1' then - cmd_ack <= '1'; - burst_load_en <= '1'; - cc_load_en <= '1'; - cc_preset <= TIMING(cmd); - sdr_cmd_ctrl <= COMMAND(cmd); - case cmd is - when SD_PRE => - st_sdr_next <= PRECHARGE; - when SD_READ => - phy_ctrl.utag_we <= '1'; - st_sdr_next <= READ; - sdr_addr(col_addr_t'range) <= col_addr; - when SD_WRITE => - phy_ctrl.utag_we <= '1'; - phy_ctrl.drive_en <= '1'; - st_sdr_next <= WRITE; - sdr_addr(col_addr_t'range) <= col_addr; - when others => null; - end case; - end if; - end if; - - when WRITE => - phy_ctrl.drive_en <= '1'; - phy_ctrl.we <= '1'; - if burst_finished = '1' then - if cmd_we = '1' and cmd = SD_WRITE then - sdr_addr(col_addr_t'range) <= col_addr; - cmd_ack <= '1'; - burst_load_en <= '1'; - sdr_cmd_ctrl <= COMMAND(cmd); - phy_ctrl.utag_we <= '1'; - else - phy_ctrl.drive_en <= '0'; - cc_load_en <= '1'; - cc_preset <= TIMING(SD_WRITE)+1; - st_sdr_next <= ROW_ACT; - end if; - end if; - - when READ => - phy_ctrl.re <= '1'; - if burst_finished = '1' then - if cmd_we = '1' and cmd = SD_READ then - sdr_addr(col_addr_t'range) <= col_addr; - cmd_ack <= '1'; - burst_load_en <= '1'; - sdr_cmd_ctrl <= COMMAND(cmd); - phy_ctrl.utag_we <= '1'; - else - cc_load_en <= '1'; - cc_preset <= TIMING(SD_READ); - st_sdr_next <= ROW_ACT; - end if; - end if; - - when WRITE_A => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when READ_A => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when BURST_STOP => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when SELF_REF => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when PRE_PWR_DOWN => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when ACT_PWR_DOWN => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when AUTO_REF => - if cycle_finished = '1' then - st_sdr_next <= IDLE; - end if; - - when others => - st_sdr_next <= IDLE; - end case; - - end process; - -fsm_sdr_state_next: - process (rst, clk) - begin - if rst = '1' then - st_sdr <= PWR_DOWN; - elsif rising_edge(clk) then - st_sdr <= st_sdr_next; - end if; - end process; - ------------------------------------------------------------------------------------------- -cycle_counter: - process (rst, clk) - variable cycle_cnt : natural range 0 to 10; - begin - if rst = '1' then - cycle_cnt := 0; - cycle_finished <= '0'; - elsif rising_edge(clk) then - cycle_finished <= '0'; - if cc_load_en = '1' then - cycle_cnt := cc_preset; - elsif cycle_cnt /= 0 then - cycle_cnt := cycle_cnt - 1; - else - cycle_finished <= '1'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -burst_counter: - process (rst, clk) - variable burst_cnt : natural range 0 to 3; - begin - if rst = '1' then - burst_cnt := 0; - elsif rising_edge(clk) then - burst_finished <= '0'; - if burst_load_en = '1' then - burst_cnt := burst_preset; - elsif burst_cnt /= 0 then - burst_cnt := burst_cnt - 1; - end if; - if burst_cnt = 0 then - burst_finished <= '1'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -end behaviour; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_config.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/sdram_config.vhd deleted file mode 100644 index b62e085..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_config.vhd +++ /dev/null @@ -1,74 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: User SDRAM component adjustments --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -package sdram_config is - - constant DDR_DATA_WIDTH : positive := 16; -- External DDR-SDRAM Module data bus width - constant DDR_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module - constant DDR_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM - constant DDR_ROW_ADDR_WIDTH : positive := 13; -- - constant DDR_COL_ADDR_WIDTH : positive := 9; -- - - constant LMR_REG_BASE : natural := 0; - constant LMR_REG_EXTENDED : natural := 1; - constant LMR_OP_NORMAL : natural := 0; - constant LMR_OP_RES_DLL : natural := 2; - constant LMR_BT_SEQ : natural := 0; - constant LMR_BT_ILVD : natural := 1; - constant LMR_BL2 : natural := 1; - constant LMR_BL4 : natural := 2; - constant LMR_BL8 : natural := 3; - constant LMR_CL2 : natural := 2; - constant LMR_CL3 : natural := 3; - constant LMR_CL2_5 : natural := 6; - - -- DDR SDRAM Hardware defined constants - constant BIT_AUTO_PRE : positive := 10; -- bit-position in column address for auto precharge (see Data Sheet) - constant BIT_PRE_ALL : positive := 10; -- bit-position in column address for precharge all (see Data Sheet) - constant ENABLE_PRE_ALL : std_logic := '1'; - constant ENABLE_AUTO_PRE : std_logic := '0'; - - -- DDR-SDR TIMING constants ------------------------------------------------------------------ - -- After REFRESH_CLOCKS a refresh cycle is necessary, 64ms / 8192 = max every 7.8125 us refesh - constant REFRESH_INTERVAL : real := 7.8125; -- us - - -- These values are for your SDRAM part (see datasheet) - constant TCAS : positive := 2; -- CAS latency [clocks] - constant TRP : positive := 2; -- precharge command period - constant TRAS : positive := 4; -- active to precharge delay - constant TRFC : positive := 8; -- auto refresh command period - constant TMRD : positive := 2; -- load mode register command cylce time - constant TRCD : positive := 2; -- active to read or write delay ! - constant TWR : positive := 2; -- write recovery time - - constant PWR_UP_WAIT : natural := 1; -- µs - - subtype user_tag_t is unsigned(3 downto 0); - - ---------------------------------------------------------------------------------------------- - -end sdram_config; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd deleted file mode 100644 index dbb5b80..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd +++ /dev/null @@ -1,487 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: SDRAM main controller and user I/F --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity sdram_ctrl is - Generic - ( - f_sysclk : natural := 100E6; - BL : natural := 2 - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - u_busy : out STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_out : out user_tag_t; - u_addr : in user_addr_t; - u_cmd : in user_cmd_t; - u_cmd_we : in STD_LOGIC; - col_addr : out col_addr_t; - sdr_cmd_busy : in STD_LOGIC; - sdr_cmd : out sdr_cmd_t; - sdr_cmd_we : out STD_LOGIC; - sdr_mode : out mode_word_t; - sdr_cke : out STD_LOGIC - ); -end sdram_ctrl; - -architecture behaviour of sdram_ctrl is - - constant LMR_BURST_LEN : natural := NextExpBaseTwo(BL); - - type ctrl_state_t is (RESET, POWER_WAIT, INIT, INIT_WAIT, USER_READY, USER_WRITE_PRE, USER_WRITE_ACT, USER_WRITE, USER_READ_PRE, USER_READ_ACT, USER_READ, REFRESH); - signal st_ctrl, st_ctrl_next : ctrl_state_t; - - constant PWR_UP_CLOCK_INTERVAL : natural := PWR_UP_WAIT*(f_sysclk/1E6); - signal pwr_up_cnt : natural range 0 to PWR_UP_CLOCK_INTERVAL-1; - signal pwr_up_cnt_rst : std_logic; - signal pwr_up_finished : std_logic; - - signal cycle_cnt : natural range 0 to 255; - signal cc_preset : natural range 0 to 255; - signal cc_load_en : std_logic; - signal cycle_finished : std_logic; - - signal seq_cnt : natural range 0 to 31; - signal seq_rst_en : std_logic; - signal seq_cnt_en : std_logic; - - constant REFRESH_CLOCK_INTERVAL : natural := natural(REFRESH_INTERVAL*real(f_sysclk)/1.0E6); - signal refresh_cnt : natural range 0 to REFRESH_CLOCK_INTERVAL-1; - signal refresh_request : std_logic; - signal refresh_cnt_rst : std_logic; - - signal addr_reg_load_en : std_logic; - - signal u_tag_reg : user_tag_t; - signal bank_addr_reg : bank_addr_t; - signal row_addr_reg : row_addr_t; - signal col_addr_reg : col_addr_t; - - signal u_bank_addr : bank_addr_t; - signal u_row_addr : row_addr_t; - signal u_col_addr : col_addr_t; - - signal act_request : std_logic; - signal act_request_set : std_logic; - signal act_request_clr : std_logic; - - type init_seq_rom_t is array (0 to 14) of init_seq_t; - - constant init_seq_rom : init_seq_rom_t := - ( - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_PRE, - mode_word => "000010000000000", - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_LMR, - mode_word => to_unsigned(LMR_REG_EXTENDED, 2) & "0000000000010", - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_LMR, - mode_word => to_unsigned(LMR_REG_BASE, 2) & to_unsigned(LMR_OP_RES_DLL, 6) & to_unsigned(LMR_CL2, 3) & '0' & to_unsigned(LMR_BURST_LEN, 3), - wait_cycle => 200 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_PRE, - mode_word => "000010000000000", - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_AR, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_AR, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_LMR, - mode_word => to_unsigned(LMR_REG_BASE, 2) & to_unsigned(LMR_OP_NORMAL, 6) & to_unsigned(LMR_CL2, 3) & '0' & to_unsigned(LMR_BURST_LEN, 3), - wait_cycle => 200 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ) - - ); - -begin - - u_row_addr <= u_addr(user_addr_t'left downto user_addr_t'left-row_addr_t'length+1); - u_bank_addr <= u_addr(user_addr_t'left-row_addr_t'length downto user_addr_t'left-row_addr_t'length-bank_addr_t'length+1); - u_col_addr <= u_addr(user_addr_t'left-row_addr_t'length-bank_addr_t'length downto 0); - ------------------------------------------------------------------------------------------- -fsm_ctrl_state: - process (st_ctrl, u_tag_in, u_tag_reg, u_cmd, u_cmd_we, sdr_cmd_busy, pwr_up_finished, seq_cnt, cycle_finished, u_bank_addr, u_row_addr, bank_addr_reg, row_addr_reg, u_col_addr, col_addr_reg, refresh_request, act_request) - begin - - u_busy <= '1'; - pwr_up_cnt_rst <= '0'; - cc_preset <= init_seq_rom(seq_cnt).wait_cycle; - cc_load_en <= '0'; - sdr_cmd <= init_seq_rom(seq_cnt).cmd; - sdr_cmd_we <= '0'; - sdr_mode <= bank_addr_reg & row_addr_reg; - col_addr <= col_addr_reg; - sdr_cke <= '1'; - seq_cnt_en <= '0'; - seq_rst_en <= '0'; - addr_reg_load_en <= '0'; - refresh_cnt_rst <= '0'; - act_request_set <= '0'; - act_request_clr <= '0'; - u_tag_out <= u_tag_reg; - - st_ctrl_next <= st_ctrl; - case st_ctrl is - when RESET => - sdr_cke <= '0'; - pwr_up_cnt_rst <= '1'; - st_ctrl_next <= POWER_WAIT; - - when POWER_WAIT => - sdr_cke <= '0'; - if pwr_up_finished = '1' then - seq_rst_en <= '1'; - st_ctrl_next <= INIT; - end if; - - when INIT => - sdr_mode <= init_seq_rom(seq_cnt).mode_word; - sdr_cmd <= init_seq_rom(seq_cnt).cmd; - cc_preset <= init_seq_rom(seq_cnt).wait_cycle; - if seq_cnt = init_seq_rom_t'high then - act_request_set <= '1'; - refresh_cnt_rst <= '1'; - st_ctrl_next <= USER_READY; - elsif sdr_cmd_busy = '0' then - cc_load_en <= '1'; - sdr_cmd_we <= '1'; - st_ctrl_next <= INIT_WAIT; - end if; - - when INIT_WAIT => - if sdr_cmd_busy = '0' and cycle_finished = '1' then - seq_cnt_en <= '1'; - st_ctrl_next <= INIT; - end if; - - when USER_READY => - if sdr_cmd_busy = '0' then - if refresh_request = '1' then - sdr_mode(BIT_PRE_ALL) <= '1'; - sdr_cmd_we <= '1'; - sdr_cmd <= SD_PRE; - st_ctrl_next <= REFRESH; - else - u_busy <= '0'; - if u_cmd_we = '1' then - case u_cmd is - when UCMD_NOP => - sdr_cmd <= SD_NOP; - when UCMD_LMR => - sdr_cmd <= SD_NOP; - when UCMD_WRITE => - col_addr <= u_col_addr; - u_tag_out <= u_tag_in; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - addr_reg_load_en <= '1'; - act_request_clr <= '1'; - sdr_cmd <= SD_WRITE; - if (u_row_addr /= row_addr_reg) or act_request = '1' then - st_ctrl_next <= USER_WRITE_PRE; - elsif (u_bank_addr /= bank_addr_reg) then - if ENABLE_PRE_ALL = '1' then - st_ctrl_next <= USER_WRITE_ACT; - else - st_ctrl_next <= USER_WRITE_PRE; - end if; - elsif sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - else - st_ctrl_next <= USER_WRITE; - end if; - when UCMD_READ => - col_addr <= u_col_addr; - u_tag_out <= u_tag_in; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - addr_reg_load_en <= '1'; - act_request_clr <= '1'; - sdr_cmd <= SD_READ; - if (u_row_addr /= row_addr_reg) or act_request = '1' then - st_ctrl_next <= USER_READ_PRE; - elsif (u_bank_addr /= bank_addr_reg) then - if ENABLE_PRE_ALL = '1' then - st_ctrl_next <= USER_READ_ACT; - else - st_ctrl_next <= USER_READ_PRE; - end if; - elsif sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - else - st_ctrl_next <= USER_READ; - end if; - when others => null; - end case; - end if; - end if; - end if; - - when USER_WRITE_PRE => - sdr_cmd <= SD_PRE; - sdr_mode(BIT_PRE_ALL) <= ENABLE_PRE_ALL; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_WRITE_ACT; - end if; - - when USER_WRITE_ACT => - sdr_cmd <= SD_ACT; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_WRITE; - end if; - - when USER_WRITE => - sdr_cmd <= SD_WRITE; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READY; - end if; - - when USER_READ_PRE => - sdr_cmd <= SD_PRE; - sdr_mode(BIT_PRE_ALL) <= ENABLE_PRE_ALL; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READ_ACT; - end if; - - when USER_READ_ACT => - sdr_cmd <= SD_ACT; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READ; - end if; - - when USER_READ => - sdr_cmd <= SD_READ; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READY; - end if; - - when REFRESH => - sdr_cmd <= SD_AR; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READY; - refresh_cnt_rst <= '1'; - act_request_set <= '1'; - end if; - - when others => - st_ctrl_next <= RESET; - end case; - - end process; - -fsm_ctrl_state_next: - process (rst, clk) - begin - if rst = '1' then - st_ctrl <= RESET; - elsif rising_edge(clk) then - st_ctrl <= st_ctrl_next; - end if; - end process; - ------------------------------------------------------------------------------------------- -act_request_register: - process (rst, clk) - begin - if rst = '1' then - act_request <= '1'; - elsif rising_edge(clk) then - if act_request_set = '1' then - act_request <= '1'; - elsif act_request_clr = '1' then - act_request <= '0'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -user_addr_register: - process (rst, clk) - begin - if rst = '1' then - bank_addr_reg <= (others => '0'); - row_addr_reg <= (others => '0'); - col_addr_reg <= (others => '0'); - u_tag_reg <= (others => '0'); - elsif rising_edge(clk) then - if addr_reg_load_en = '1' then - bank_addr_reg <= u_bank_addr; - row_addr_reg <= u_row_addr; - col_addr_reg <= u_col_addr; - u_tag_reg <= u_tag_in; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -power_up_counter: - process (rst, clk) - begin - if rst = '1' then - pwr_up_cnt <= 0; - pwr_up_finished <= '0'; - elsif rising_edge(clk) then - pwr_up_finished <= '0'; - if pwr_up_cnt_rst = '1' then - pwr_up_cnt <= PWR_UP_CLOCK_INTERVAL-1; - else - if pwr_up_cnt /= 0 then - pwr_up_cnt <= pwr_up_cnt - 1; - else - pwr_up_finished <= '1'; - end if; - end if; - end if; - end process; - - ------------------------------------------------------------------------------------------- -refresh_counter: - process (rst, clk) - begin - if rst = '1' then - refresh_cnt <= 0; - refresh_request <= '0'; - elsif rising_edge(clk) then - refresh_request <= '0'; - if refresh_cnt_rst = '1' then - refresh_cnt <= REFRESH_CLOCK_INTERVAL-1; - else - if refresh_cnt /= 0 then - refresh_cnt <= refresh_cnt - 1; - else - refresh_request <= '1'; - end if; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -cycle_counter: - process (rst, clk) - begin - if rst = '1' then - cycle_cnt <= 0; - cycle_finished <= '0'; - elsif rising_edge(clk) then - cycle_finished <= '0'; - if cc_load_en = '1' then - cycle_cnt <= cc_preset; - elsif cycle_cnt /= 0 then - cycle_cnt <= cycle_cnt - 1; - else - cycle_finished <= '1'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -seq_counter: - process (rst, clk) - begin - if rst = '1' then - seq_cnt <= 0; - elsif rising_edge(clk) then - if seq_rst_en = '1' then - seq_cnt <= 0; - elsif seq_cnt_en = '1' then - if seq_cnt /= init_seq_rom_t'high then - seq_cnt <= seq_cnt + 1; - end if; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -end behaviour; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd deleted file mode 100644 index 268636e..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd +++ /dev/null @@ -1,293 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_ctrl_frontend is - Generic - ( - BL : natural := 2; - f_sysclk : natural := 100E6; - read_phaseshift : integer := 0; - fifo_depth : integer := 4 - ); - Port - ( - sys_rst_in : in STD_LOGIC; - sys_clk_in : in STD_LOGIC; - sys_rst_out : out STD_LOGIC; - sys_clk_out : out STD_LOGIC; - sys_clk_fb : in STD_LOGIC; - - -- User interface - busy : out STD_LOGIC; - en : in STD_LOGIC; - r_wn : in STD_LOGIC; - be : in unsigned(SDR_DM_WIDTH-1 downto 0); - addr : in user_addr_t; - din : in unsigned(SDR_DATA_WIDTH-1 downto 0); - dout : out unsigned(SDR_DATA_WIDTH-1 downto 0); - dout_re : in STD_LOGIC; - dout_vld : out STD_LOGIC; - - -- SDRAM signals - sd_clk_p : out STD_LOGIC; - sd_clk_n : out STD_LOGIC; - sd_cke : out STD_LOGIC; - sd_cs_n : out STD_LOGIC; - sd_cas_n : out STD_LOGIC; - sd_ras_n : out STD_LOGIC; - sd_we_n : out STD_LOGIC; - sd_addr : out sdr_addr_t; - sd_ba : out sdr_ba_t; - sd_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - sd_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - sd_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0) - - ); -end sdram_ctrl_frontend; - -architecture struct of sdram_ctrl_frontend is - - -- Number of user data words for simulation - signal rst_out : std_logic; - signal clk_out : std_logic; - - signal u_addr : user_addr_t; - signal u_tag_in : user_tag_t; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t; - signal u_cmd_we : std_logic; - signal u_busy : std_logic; - signal u_data_w : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal u_dm_wr_in : unsigned(SDR_DM_WIDTH-1 downto 0); - signal u_dm_rd_in : unsigned(SDR_DM_WIDTH-1 downto 0); - signal u_dm_rd_out : unsigned(SDR_DM_WIDTH-1 downto 0); - signal u_data_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal rdy : std_logic; - - constant CAT_FIFO_WIDTH : integer := user_cmd_t'length + user_tag_t'length + DDR_ROW_ADDR_WIDTH + DDR_BANK_WIDTH + DDR_COL_ADDR_WIDTH + SDR_DM_WIDTH; - signal cat_fifo_din : unsigned(CAT_FIFO_WIDTH-1 downto 0); - signal cat_fifo_dout : unsigned(CAT_FIFO_WIDTH-1 downto 0); - signal cat_fifo_re : std_logic; - signal cat_fifo_we : std_logic; - signal cat_fifo_full : std_logic; - signal cat_fifo_empty : std_logic; --- signal cat_fifo_almost_full : std_logic; --- signal cat_fifo_almost_empty : std_logic; - - signal write_fifo_din : unsigned(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto 0); - signal write_fifo_dout : unsigned(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto 0); - signal write_fifo_re : std_logic; - signal write_fifo_we : std_logic; - signal write_fifo_full : std_logic; - signal write_fifo_empty : std_logic; --- signal write_fifo_almost_full : std_logic; --- signal write_fifo_almost_empty : std_logic; - - signal read_fifo_din : unsigned(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto 0); - signal read_fifo_dout : unsigned(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto 0); - signal read_fifo_re : std_logic; - signal read_fifo_we : std_logic; - signal read_fifo_full : std_logic; - signal read_fifo_empty : std_logic; --- signal read_fifo_almost_full : std_logic; --- signal read_fifo_almost_empty : std_logic; - - alias cmd_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-1 downto CAT_FIFO_WIDTH-user_cmd_t'length); - alias tag_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-user_cmd_t'length-1 downto CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length); - alias addr_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length-1 downto SDR_DM_WIDTH); - alias dm_rd_fifo_in is cat_fifo_din(SDR_DM_WIDTH-1 downto 0); - alias cmd_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-1 downto CAT_FIFO_WIDTH-user_cmd_t'length); - alias tag_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-user_cmd_t'length-1 downto CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length); - alias addr_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length-1 downto SDR_DM_WIDTH); - alias dm_rd_fifo_out is cat_fifo_dout(SDR_DM_WIDTH-1 downto 0); - - alias write_fifo_dm_in is write_fifo_din(write_fifo_din'length-1 downto write_fifo_din'length-SDR_DM_WIDTH); - alias write_fifo_data_in is write_fifo_din(write_fifo_din'length-SDR_DM_WIDTH-1 downto 0); - alias write_fifo_dm_out is write_fifo_dout(write_fifo_dout'length-1 downto write_fifo_dout'length-SDR_DM_WIDTH); - alias write_fifo_data_out is write_fifo_dout(write_fifo_dout'length-SDR_DM_WIDTH-1 downto 0); - - alias read_fifo_dm_in is read_fifo_din(read_fifo_din'length-1 downto read_fifo_din'length-SDR_DM_WIDTH); - alias read_fifo_data_in is read_fifo_din(read_fifo_din'length-SDR_DM_WIDTH-1 downto 0); - alias read_fifo_dm_out is read_fifo_dout(read_fifo_dout'length-1 downto read_fifo_dout'length-SDR_DM_WIDTH); - alias read_fifo_data_out is read_fifo_dout(read_fifo_dout'length-SDR_DM_WIDTH-1 downto 0); - -begin - - -- Instantiate synchronous FIFO - inst_cat_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => CAT_FIFO_WIDTH - ) - PORT MAP - ( - rst => rst_out, - clk => clk_out, - we => cat_fifo_we, - re => cat_fifo_re, - fifo_full => cat_fifo_full, - fifo_empty => cat_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => cat_fifo_din, - data_r => cat_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_write_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => 2*DDR_DATA_WIDTH + SDR_DM_WIDTH - ) - PORT MAP - ( - rst => rst_out, - clk => clk_out, - we => write_fifo_we, - re => write_fifo_re, - fifo_full => write_fifo_full, - fifo_empty => write_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => write_fifo_din, - data_r => write_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_read_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => 2*DDR_DATA_WIDTH + SDR_DM_WIDTH - ) - PORT MAP - ( - rst => rst_out, - clk => clk_out, - we => read_fifo_we, - re => read_fifo_re, - fifo_full => read_fifo_full, - fifo_empty => read_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => read_fifo_din, - data_r => read_fifo_dout - ); - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BL, - read_phaseshift => read_phaseshift, - f_sysclk => f_sysclk - ) - Port map - ( - - sys_rst_in => sys_rst_in, - sys_clk_in => sys_clk_in, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => sys_clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => open, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm_wr_in, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => sd_clk_p, - sd_clk_n => sd_clk_n, - sd_cke => sd_cke, - sd_cs_n => sd_cs_n, - sd_cas_n => sd_cas_n, - sd_ras_n => sd_ras_n, - sd_we_n => sd_we_n, - sd_addr => sd_addr, - sd_ba => sd_ba, - sd_dm => sd_dm, - sd_dqs => sd_dqs, - sd_data => sd_data - - ); - ------------------------------------------------------------------------------------------- - sys_rst_out <= rst_out; - sys_clk_out <= clk_out; - busy <= not rdy; - rdy <= not (cat_fifo_full or write_fifo_full or read_fifo_full); - write_fifo_we <= en and not r_wn and rdy; - write_fifo_data_in <= din; - write_fifo_dm_in <= not be; - cat_fifo_we <= en and rdy; - cmd_fifo_in <= UCMD_WRITE when r_wn = '0' else UCMD_READ; - addr_fifo_in <= addr; - dm_rd_fifo_in <= not be; - tag_fifo_in <= (others=>'0'); - dout <= read_fifo_data_out; - dout_vld <= not read_fifo_empty; - - u_cmd_we <= (not cat_fifo_empty) and (not u_busy); - u_cmd <= cmd_fifo_out; - u_addr <= addr_fifo_out; - u_dm_rd_in <= dm_rd_fifo_out; - u_dm_wr_in <= write_fifo_dm_out; - u_tag_in <= tag_fifo_out; - - write_fifo_re <= u_req_wr and (not write_fifo_empty); - cat_fifo_re <= u_cmd_we; - u_data_w <= write_fifo_data_out; - read_fifo_re <= (not read_fifo_empty) and dout_re; - read_fifo_we <= u_data_vld; - read_fifo_data_in <= u_data_r; - read_fifo_dm_in <= u_dm_rd_out; - - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd deleted file mode 100644 index 19768a4..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd +++ /dev/null @@ -1,289 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: Top-level put all together --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_ctrl_top is - Generic - ( - BL : natural := 2; - f_sysclk : natural := 100E6; - read_phaseshift : integer := 0 - ); - Port - ( - sys_rst_in : in STD_LOGIC; - sys_clk_in : in STD_LOGIC; - sys_rst_out : out STD_LOGIC; - sys_clk_out : out STD_LOGIC; - sys_clk_fb : in STD_LOGIC; - - -- User interface - u_data_vld : out STD_LOGIC; - u_data_req_w : out STD_LOGIC; - u_data_req_r : out STD_LOGIC; - u_busy : out STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_rd : out user_tag_t; - u_tag_wr : out user_tag_t; - u_addr : in user_addr_t; - u_cmd : in user_cmd_t; - u_cmd_we : in STD_LOGIC; - u_data_wr : in unsigned(SDR_DATA_WIDTH-1 downto 0); - u_dm_wr_in : in unsigned(SDR_DM_WIDTH-1 downto 0); - u_dm_rd_in : in unsigned(SDR_DM_WIDTH-1 downto 0); - u_dm_rd_out : out unsigned(SDR_DM_WIDTH-1 downto 0); - u_data_rd : out unsigned(SDR_DATA_WIDTH-1 downto 0); - - -- SDRAM signals - sd_clk_p : out STD_LOGIC; - sd_clk_n : out STD_LOGIC; - sd_cke : out STD_LOGIC; - sd_cs_n : out STD_LOGIC; - sd_cas_n : out STD_LOGIC; - sd_ras_n : out STD_LOGIC; - sd_we_n : out STD_LOGIC; - sd_addr : out sdr_addr_t; - sd_ba : out sdr_ba_t; - sd_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - sd_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - sd_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0) - - ); -end sdram_ctrl_top; - -architecture rtl of sdram_ctrl_top is - - signal clk0 : std_logic; - signal clk270 : std_logic; - signal read_clk270 : std_logic; - - signal phy_ctrl : phy_ctrl_t; - - signal u_tag : user_tag_t; - signal sd_cmd_in : sdr_cmd_t; - signal sd_cmd : sdr_cmd_t; - signal sd_cmd_we : std_logic; - signal cmd_ctrl : sdr_cmd_lines_t; - signal cke : std_logic; - signal ba : unsigned(DDR_BANK_WIDTH-1 downto 0); - signal addr : unsigned(DDR_ADDR_WIDTH-1 downto 0); - - -- Clock generator - - signal cg_rst : std_logic; - signal cg_read_clk0 : std_logic; - signal cg_read_clk270 : std_logic; - signal cg_sys_clk0 : std_logic; - signal cg_sys_clk270 : std_logic; - signal cg_locked : std_logic; - signal cg_error : std_logic; - signal ctrl_rst : std_logic; - signal part_ctrl : part_ctrl_t; - - -- SD command FIFO - - constant CMD_FIFO_ADDR_WIDTH : positive := 2; - constant CMD_FIFO_DATA_WIDTH : positive := user_tag_t'length + 4 + mode_word_t'length + col_addr_t'length; - signal cmd_fifo_din : unsigned(CMD_FIFO_DATA_WIDTH-1 downto 0); - signal cmd_fifo_dout : unsigned(CMD_FIFO_DATA_WIDTH-1 downto 0); - signal cmd_fifo_re : std_logic; - signal cmd_fifo_we : std_logic; - signal cmd_fifo_full : std_logic; - signal cmd_fifo_empty : std_logic; - - alias tag_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length); - alias cmd_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-user_tag_t'length-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4); - alias mode_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length); - alias col_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length-1 downto 0); - - alias tag_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length); - alias cmd_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-user_tag_t'length-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4); - alias mode_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length); - alias col_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length-1 downto 0); - -begin - - --------------------------------- - clk0 <= cg_sys_clk0; - clk270 <= cg_sys_clk270; - read_clk270 <= cg_read_clk270; - cg_rst <= not cg_locked; - - --------------------------------- - sys_clk_out <= cg_sys_clk0; - sys_rst_out <= ctrl_rst; - - --------------------------------- - part_ctrl.cmd <= cmd_ctrl; - part_ctrl.ba <= ba; - part_ctrl.addr <= addr; - part_ctrl.cke <= cke; - - --------------------------------- - sd_cmd_we <= not cmd_fifo_empty; - cmd_fifo_in <= to_unsigned(sd_cmd_in, 4); - sd_cmd <= sdr_cmd_t(to_integer(cmd_fifo_out)); - - --------------------------------- - inst_reset: entity work.reset - port map - ( - clk => clk0, - rst_in => cg_rst, - rst_out => ctrl_rst - ); - - inst_clockgen : entity work.clockgen - generic map - ( - read_phaseshift => read_phaseshift, - frequency_hz => f_sysclk - ) - port map - ( - rst => sys_rst_in, - clk_in => sys_clk_in, - clk_fb_in => sys_clk_fb, - read_clk0_out => cg_read_clk0, - read_clk270_out => cg_read_clk270, - sys_clk0_out => cg_sys_clk0, - sys_clk270_out => cg_sys_clk270, - locked_out => cg_locked, - error_out => cg_error - ); - - -- Main controller - inst_sdram_ctrl : entity work.sdram_ctrl - Generic map - ( - f_sysclk => 100E6, - BL => BL - ) - Port map - ( - rst => ctrl_rst, - clk => clk0, - u_busy => u_busy, - u_tag_in => u_tag_in, - u_tag_out => tag_fifo_in, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_addr => u_addr, - sdr_cmd_busy => cmd_fifo_full, - sdr_cmd => sd_cmd_in, - sdr_cmd_we => cmd_fifo_we, - col_addr => col_fifo_in, - sdr_mode => mode_fifo_in, - sdr_cke => cke - ); - - -- Instantiate synchronous FIFO - inst_sd_cmd_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => CMD_FIFO_ADDR_WIDTH, - data_width => CMD_FIFO_DATA_WIDTH, - almost_full_thresh => 2**(CMD_FIFO_ADDR_WIDTH-1), - almost_empty_thresh => 2**(CMD_FIFO_ADDR_WIDTH-1) - ) - PORT MAP - ( - rst => ctrl_rst, - clk => clk0, - we => cmd_fifo_we, - re => cmd_fifo_re, - fifo_full => cmd_fifo_full, - fifo_empty => cmd_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => cmd_fifo_din, - data_r => cmd_fifo_dout - ); - - -- DDR SDRAM command fsm - inst_sdram_cmd : entity work.sdram_cmd - Generic map - ( - BL => BL - ) - Port map - ( - rst => ctrl_rst, - clk => clk0, - u_tag_in => tag_fifo_out, - u_tag_out => u_tag, - phy_ctrl => phy_ctrl, - enable => cke, - cmd => sd_cmd, - cmd_we => sd_cmd_we, - cmd_ack => cmd_fifo_re, - sdr_cmd_ctrl => cmd_ctrl, - col_addr => col_fifo_out, - mode_word => mode_fifo_out, - sdr_ba => ba, - sdr_addr => addr - ); - - -- DDR phy - inst_ddr_phy : entity work.ddr_phy - Port map - ( - sys_rst => ctrl_rst, - sys_clk0 => clk0, - sys_clk270 => clk270, - u_tag_in => u_tag, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - read_clk => read_clk270, - phy_ctrl => phy_ctrl, - part_ctrl => part_ctrl, - sdr_data_req_w => u_data_req_w, - sdr_data_req_r => u_data_req_r, - sdr_data_w => u_data_wr, - sdr_dm_wr_in => u_dm_wr_in, - sdr_dm_rd_in => u_dm_rd_in, - sdr_dm_rd_out => u_dm_rd_out, - sdr_data_r => u_data_rd, - sdr_data_vld => u_data_vld, - part_clk_p => sd_clk_p, - part_clk_n => sd_clk_n, - part_addr => sd_addr, - part_ba => sd_ba, - part_dm => sd_dm, - part_dqs => sd_dqs, - part_data => sd_data, - part_cs_n => sd_cs_n, - part_we_n => sd_we_n, - part_cas_n => sd_cas_n, - part_ras_n => sd_ras_n, - part_cke => sd_cke - ); - -end architecture rtl; - diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd deleted file mode 100644 index d235d75..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd +++ /dev/null @@ -1,133 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: Type definitions --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -use work.sdram_config.all; - -package sdram_types is - - ----------------------------------------------------------------------------------------- - -- Table of Timing Parameters as a function of operation - - -- Derived constants from sdram_config - - constant DDR_DQS_WIDTH : positive := DDR_DATA_WIDTH / 8; -- Number of data strobe lines - constant DDR_DM_WIDTH : positive := DDR_DATA_WIDTH / 8; -- Number of Data Mask Lines - constant SDR_DATA_WIDTH : positive := 2*DDR_DATA_WIDTH; -- - constant SDR_DM_WIDTH : positive := 2*DDR_DM_WIDTH; -- - - subtype user_cmd_t is unsigned(1 downto 0); - constant UCMD_NOP : user_cmd_t := "00"; - constant UCMD_READ : user_cmd_t := "01"; - constant UCMD_WRITE : user_cmd_t := "10"; - constant UCMD_LMR : user_cmd_t := "11"; - - subtype sdr_cmd_t is natural range 0 to 9; - constant SD_DESELECT : sdr_cmd_t := 0; - constant SD_NOP : sdr_cmd_t := 1; - constant SD_LMR : sdr_cmd_t := 2; - constant SD_ACT : sdr_cmd_t := 3; - constant SD_READ : sdr_cmd_t := 4; - constant SD_WRITE : sdr_cmd_t := 5; - constant SD_PRE : sdr_cmd_t := 6; - constant SD_BST : sdr_cmd_t := 7; - constant SD_AR : sdr_cmd_t := 8; - constant SD_SR : sdr_cmd_t := 9; - - type sdr_state_t is (PWR_DOWN, PRECHARGE, MODE, IDLE, ROW_ACT, WRITE, WRITE_A, READ, READ_A, BURST_STOP, SELF_REF, AUTO_REF, PRE_PWR_DOWN, ACT_PWR_DOWN); - subtype user_addr_t is unsigned(DDR_BANK_WIDTH+DDR_ROW_ADDR_WIDTH+DDR_COL_ADDR_WIDTH-1 downto 0); - subtype sdr_addr_t is unsigned(DDR_ADDR_WIDTH-1 downto 0); - subtype sdr_ba_t is unsigned(DDR_BANK_WIDTH-1 downto 0); - subtype mode_word_t is unsigned(DDR_ADDR_WIDTH+DDR_BANK_WIDTH-1 downto 0); - - subtype bank_addr_t is unsigned(DDR_BANK_WIDTH-1 downto 0); - subtype row_addr_t is unsigned(DDR_ADDR_WIDTH-1 downto 0); - subtype col_addr_t is unsigned(8 downto 0); - - subtype cycle_cnt_t is natural range 0 to 10; - - type phy_ctrl_t is - record - drive_en : std_logic; - re : std_logic; - we : std_logic; - utag_we : std_logic; - end record phy_ctrl_t; - - type sdr_cmd_lines_t is - record - cs_n : std_logic; - ras_n : std_logic; - cas_n : std_logic; - we_n : std_logic; - end record sdr_cmd_lines_t; - - type part_ctrl_t is - record - cmd : sdr_cmd_lines_t; - ba : unsigned(DDR_BANK_WIDTH-1 downto 0); - addr : unsigned(DDR_ADDR_WIDTH-1 downto 0); - cke : std_logic; - end record part_ctrl_t; - - type part_cmd_array_t is array (sdr_cmd_t) of sdr_cmd_lines_t; - constant COMMAND : part_cmd_array_t := - -- command cs_n ras_qn cas_qn we_qn - ( SD_DESELECT => ( '1', '1', '1', '1'), - SD_NOP => ( '0', '1', '1', '1'), - SD_LMR => ( '0', '0', '0', '0'), - SD_ACT => ( '0', '0', '1', '1'), - SD_READ => ( '0', '1', '0', '1'), - SD_WRITE => ( '0', '1', '0', '0'), - SD_PRE => ( '0', '0', '1', '0'), - SD_BST => ( '0', '1', '1', '0'), - SD_AR => ( '0', '0', '0', '1'), - SD_SR => ( '0', '0', '0', '1') - ); - - type part_timing_array_t is array (sdr_cmd_t) of cycle_cnt_t; - constant TIMING : part_timing_array_t := - -- command cycle_cnt - ( SD_DESELECT => ( 0 ), - SD_NOP => ( 0 ), - SD_LMR => ( TMRD-1 ), - SD_ACT => ( TRCD-1 ), - SD_READ => ( TCAS-1 ), - SD_WRITE => ( TWR-1 ), - SD_PRE => ( TRP-1 ), - SD_BST => ( 0 ), - SD_AR => ( TRFC-1 ), - SD_SR => ( TRFC-1 ) - ); - - type init_seq_t is - record - cmd : sdr_cmd_t; - mode_word : mode_word_t; - wait_cycle : natural; - end record init_seq_t; - -end sdram_types; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd deleted file mode 100644 index 034215c..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd +++ /dev/null @@ -1,336 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity tb_sdr_ctrl is -end; - -architecture struct of tb_sdr_ctrl is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 8; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal u_addr : user_addr_t := (others => '0'); - signal u_tag_in : user_tag_t := "0000"; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t := UCMD_NOP; - signal u_cmd_we : std_logic := '0'; - signal u_busy : std_logic; - signal u_data_w : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_dm : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_in : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_out : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_data_r : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal u_req_rd : std_logic; - signal u_read_en : std_logic := '0'; - signal u_write_en : std_logic := '0'; - signal u_addr_cnt_en : std_logic := '0'; - signal u_addr_load : std_logic := '0'; - signal u_addr_preset : user_addr_t := (others => '0'); - signal u_addr_end : user_addr_t := (others => '0'); - signal ref_data : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - type test_phase_t is (IDLE, PART_INIT, WRITE_SINGLE, WRITE_MULTI, READ_SINGLE, READ_MULTI, FINISHED); - signal test_phase : test_phase_t := IDLE; - - type u_addr_mode_t is (MONOTONIC, RANDOM); - signal u_addr_mode : u_addr_mode_t := MONOTONIC; - signal cycle_cnt : natural := 1; - signal data_cnt : natural := 0; - signal efficiency : real := 0.0; - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => u_req_rd, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------------------------------- - -R_DATA_COMPARE: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_data_vld='1' then - if u_read_en = '1' then - assert (ref_data = u_data_r) report "Error on read!" severity failure; - end if; - for i in 0 to DDR_DATA_WIDTH/4-1 loop - ref_data((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_read_en = '0' then - last_data := (others => '0'); - ref_data <= (others => '0'); - end if; - end if; - end process; - -W_DATA_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_req_wr = '1' then - for i in 0 to DDR_DATA_WIDTH/4-1 loop - u_data_w((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_write_en = '0' then - last_data := (others => '0'); - u_data_w <= (others => '0'); - end if; - end if; - end process; - -ADDR_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_addr_load = '1' then - u_addr <= u_addr_preset; - elsif u_addr_cnt_en = '1' then - if u_addr_mode = MONOTONIC then - u_addr <= u_addr + BURST_LEN; - else - if u_addr(u_addr'left) = '1' then - if BURST_LEN = 2 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "10000000000010001010100"; - elsif BURST_LEN = 4 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "1000000000010011010110"; - elsif BURST_LEN = 8 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "100000000001011110100"; - end if; - else - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)-1) <= u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)-1) & u_addr(u_addr'left); - end if; - end if; - end if; - end if; - end process; - -performance_count: - process(clk_out) - begin - if rising_edge(clk_out) then - if u_write_en = '1' or u_read_en = '1' then - cycle_cnt <= cycle_cnt + 1; - if u_req_wr = '1' or u_req_rd = '1' then - data_cnt <= data_cnt + 1; - end if; - else - cycle_cnt <= 1; - data_cnt <= 0; - end if; - end if; - end process; - - u_tag_in <= ("00" & u_write_en & u_read_en) when ((u_addr = X"333C98" or u_addr = X"000100") and u_cmd_we = '1') else "0000"; - - efficiency <= real(data_cnt)/real(cycle_cnt); - u_cmd_we <= (u_write_en or u_read_en) and (not u_busy); - u_addr_cnt_en <= '1' when (u_cmd_we = '1' and (u_addr /= u_addr_end)) else '0'; - - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait until rising_edge(clk_out) and u_busy='0'; - wait for 137*CLK_PERIOD; - - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - u_addr_preset <= X"000000"; - u_addr_end <= X"008000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_WRITE; - u_write_en <= '1'; - while u_addr /= u_addr_end loop - wait until rising_edge(clk_out); - end loop; - u_write_en <= '0'; - wait until rising_edge(clk_out) and u_req_wr='0'; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 1 - u_addr_preset <= X"400000"; - u_addr_end <= X"408000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_WRITE; - u_write_en <= '1'; - while u_addr /= u_addr_end loop - wait until rising_edge(clk_out); - end loop; - u_write_en <= '0'; - wait until rising_edge(clk_out) and u_req_wr='0'; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - u_addr_preset <= X"000000"; - u_addr_end <= X"008000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_READ; - u_read_en <= '1'; - while u_addr /= u_addr_end loop - wait until rising_edge(clk_out); - end loop; - u_read_en <= '0'; - wait until rising_edge(clk_out) and u_data_vld='0'; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 1 - u_addr_preset <= X"400000"; - u_addr_end <= X"408000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_READ; - u_read_en <= '1'; - while u_addr /= u_addr_end loop - wait until rising_edge(clk_out); - end loop; - u_read_en <= '0'; - wait until rising_edge(clk_out) and u_data_vld='0'; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd deleted file mode 100644 index 51910b0..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd +++ /dev/null @@ -1,420 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity tb_sdr_ctrl_fifo is -end; - -architecture struct of tb_sdr_ctrl_fifo is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 2; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal u_addr : user_addr_t := (others => '0'); - signal u_tag_in : user_tag_t := "0000"; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t := UCMD_NOP; - signal u_cmd_we : std_logic := '0'; - signal u_busy : std_logic; - signal u_data_w : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_dm : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_in : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_out : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_data_r : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal u_req_rd : std_logic; - signal u_read_en : std_logic := '0'; - signal u_write_en : std_logic := '0'; - - signal cmd_fifo_din : unsigned(25 downto 0) := (others => '0'); - signal cmd_fifo_dout : unsigned(25 downto 0) := (others => '0'); - signal cmd_fifo_re : std_logic := '0'; - signal cmd_fifo_we : std_logic := '0'; - signal cmd_fifo_full : std_logic := '0'; - signal cmd_fifo_empty : std_logic := '0'; - signal cmd_fifo_almost_full : std_logic := '0'; - signal cmd_fifo_almost_empty : std_logic := '0'; - - signal write_fifo_din : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal write_fifo_dout : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal write_fifo_re : std_logic := '0'; - signal write_fifo_we : std_logic := '0'; - signal write_fifo_full : std_logic := '0'; - signal write_fifo_empty : std_logic := '0'; - signal write_fifo_almost_full : std_logic := '0'; - signal write_fifo_almost_empty : std_logic := '0'; - - signal read_fifo_din : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal read_fifo_dout : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal read_fifo_re : std_logic := '0'; - signal read_fifo_we : std_logic := '0'; - signal read_fifo_full : std_logic := '0'; - signal read_fifo_empty : std_logic := '0'; - signal read_fifo_almost_full : std_logic := '0'; - signal read_fifo_almost_empty : std_logic := '0'; - - signal write_start : std_logic := '1'; - signal read_start : std_logic := '1'; - - alias cmd_fifo_in is cmd_fifo_din(25 downto 24); - alias addr_fifo_in is cmd_fifo_din(23 downto 0); - alias cmd_fifo_out is cmd_fifo_dout(25 downto 24); - alias addr_fifo_out is cmd_fifo_dout(23 downto 0); - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- Instantiate synchronous FIFO - inst_command_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => 8, - data_width => 2+24 - ) - PORT MAP - ( - rst => rst_out, - clk => clk_out, - we => cmd_fifo_we, - re => cmd_fifo_re, - fifo_full => cmd_fifo_full, - fifo_empty => cmd_fifo_empty, - fifo_afull => cmd_fifo_almost_full, - fifo_aempty => cmd_fifo_almost_empty, - data_w => cmd_fifo_din, - data_r => cmd_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_write_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => 8, - data_width => 2*DDR_DATA_WIDTH - ) - PORT MAP - ( - rst => rst_out, - clk => clk_out, - we => write_fifo_we, - re => write_fifo_re, - fifo_full => write_fifo_full, - fifo_empty => write_fifo_empty, - fifo_afull => write_fifo_almost_full, - fifo_aempty => write_fifo_almost_empty, - data_w => write_fifo_din, - data_r => write_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_read_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => 8, - data_width => 2*DDR_DATA_WIDTH - ) - PORT MAP - ( - rst => rst_out, - clk => clk_out, - we => read_fifo_we, - re => read_fifo_re, - fifo_full => read_fifo_full, - fifo_empty => read_fifo_empty, - fifo_afull => read_fifo_almost_full, - fifo_aempty => read_fifo_almost_empty, - data_w => read_fifo_din, - data_r => read_fifo_dout - ); - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => u_req_rd, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------------------------------- - u_cmd_we <= (not cmd_fifo_empty) and write_start and (not u_busy); - u_cmd <= cmd_fifo_out; - u_addr <= addr_fifo_out; - - write_fifo_re <= u_req_wr and (not write_fifo_empty); - cmd_fifo_re <= u_cmd_we; - u_data_w <= write_fifo_dout; - read_fifo_re <= (not read_fifo_empty) and read_start; - read_fifo_we <= u_data_vld; - read_fifo_din <= u_data_r; - - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait for 4*CLK_PERIOD; - wait until rising_edge(clk_out) and rst_out='0'; - - write_fifo_we <= '1'; - cmd_fifo_we <= '1'; - write_fifo_din <= X"01020304"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000000"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"05060708"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000002"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"00001111"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000004"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"22223333"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000006"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"44445555"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000008"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"66667777"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"00000a"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"88889999"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"00000c"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"AAAABBBB"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"00000e"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"CCCCDDDD"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000010"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"EEEEFFFF"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000012"; - - wait until rising_edge(clk_out); - write_fifo_we <= '0'; - cmd_fifo_we <= '0'; - --- wait until rising_edge(clk_out) and u_busy='0'; --- write_start <= '1'; --- wait until rising_edge(clk_out) and write_fifo_empty='1'; - - write_fifo_we <= '1'; - cmd_fifo_we <= '1'; - write_fifo_din <= X"01234567"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000014"; - - wait until rising_edge(clk_out); - write_fifo_we <= '0'; - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"000014"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"89ABCDEF"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000016"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"11223344"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000018"; - - wait until rising_edge(clk_out); - write_fifo_we <= '0'; - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"000010"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"55667788"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"00001a"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"99990000"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"00001c"; - - wait until rising_edge(clk_out); - write_fifo_we <= '1'; - write_fifo_din <= X"AAAA5555"; - cmd_fifo_in <= UCMD_WRITE; - addr_fifo_in <= X"000020"; - - wait until rising_edge(clk_out); - write_fifo_we <= '0'; - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"000000"; - - wait until rising_edge(clk_out); - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"000018"; - - wait until rising_edge(clk_out); - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"00001A"; - - wait until rising_edge(clk_out); - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"00001C"; - - wait until rising_edge(clk_out); - cmd_fifo_in <= UCMD_READ; - addr_fifo_in <= X"000020"; - - wait until rising_edge(clk_out); - write_fifo_we <= '0'; - cmd_fifo_we <= '0'; - - wait for 40*CLK_PERIOD; - read_start <= '1'; - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_r_rand_w.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_r_rand_w.vhd deleted file mode 100644 index 961b58e..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_r_rand_w.vhd +++ /dev/null @@ -1,322 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity tb_sdr_ctrl is -end; - -architecture struct of tb_sdr_ctrl is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 8; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal u_addr : user_addr_t := (others => '0'); - signal lin_addr : user_addr_t := (others => '0'); - signal rand_gen : unsigned(7 downto 0) := (others => '0'); - signal u_tag_in : user_tag_t := "0000"; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t := UCMD_NOP; - signal u_cmd_we : std_logic := '0'; - signal u_busy : std_logic; - signal u_data_w : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_dm : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_in : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_out : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_data_r : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal u_req_rd : std_logic; - signal u_read_en : std_logic := '0'; - signal u_write_en : std_logic := '0'; - signal rw_null_en : std_logic := '0'; - signal u_addr_cnt_en : std_logic := '0'; - signal u_addr_load : std_logic := '0'; - signal u_addr_preset : user_addr_t := (others => '0'); - signal u_addr_end : user_addr_t := (others => '0'); - signal ref_data : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - type test_phase_t is (IDLE, PART_INIT, WRITE_SINGLE, WRITE_MULTI, READ_SINGLE, READ_MULTI, FINISHED); - signal test_phase : test_phase_t := IDLE; - - type u_addr_mode_t is (MONOTONIC, RANDOM); - signal u_addr_mode : u_addr_mode_t := MONOTONIC; - signal cycle_cnt : natural := 1; - signal data_cnt : natural := 0; - signal efficiency : real := 0.0; - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => u_req_rd, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------------------------------- - -R_DATA_COMPARE: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_data_vld='1' then - if u_read_en = '1' and u_tag_rd = "0000" then - assert (ref_data = u_data_r) report "Error on read!" severity failure; - for i in 0 to DDR_DATA_WIDTH/4-1 loop - ref_data((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - end if; - elsif u_read_en = '0' and rw_null_en = '0' then - last_data := (others => '0'); - ref_data <= (others => '0'); - end if; - end if; - end process; - -W_DATA_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_req_wr = '1' and u_tag_wr = "0000" then - for i in 0 to DDR_DATA_WIDTH/4-1 loop - u_data_w((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_write_en = '0' and rw_null_en = '0' then - last_data := (others => '0'); - u_data_w <= (others => '0'); - end if; - end if; - end process; - -ADDR_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_addr_load = '1' then - lin_addr <= u_addr_preset; - rand_gen <= X"80"; - elsif u_addr_cnt_en = '1' then - lin_addr <= lin_addr + BURST_LEN; - if rand_gen(rand_gen'left) = '1' then - rand_gen <= (rand_gen(rand_gen'left-1 downto 0) & rand_gen(rand_gen'left)) xor "10010010"; - else - rand_gen <= rand_gen(rand_gen'left-1 downto 0) & rand_gen(rand_gen'left); - end if; - end if; - end if; - end process; - -performance_count: - process(clk_out) - begin - if rising_edge(clk_out) then - if u_write_en = '1' or u_read_en = '1' then - cycle_cnt <= cycle_cnt + 1; - if u_req_wr = '1' or u_req_rd = '1' then - data_cnt <= data_cnt + 1; - end if; - else - cycle_cnt <= 1; - data_cnt <= 0; - end if; - end if; - end process; - - u_tag_in <= "000" & rw_null_en; - - efficiency <= real(data_cnt)/real(cycle_cnt); - u_cmd_we <= (u_write_en or u_read_en or rw_null_en) and (not u_busy); - u_addr_cnt_en <= '1' when (u_cmd_we = '1' and (lin_addr /= u_addr_end)) else '0'; - u_addr <= (rand_gen(7) and (not rw_null_en)) & lin_addr(lin_addr'left-1 downto 0); - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait until rising_edge(clk_out) and u_busy='0'; - wait for 137*CLK_PERIOD; - - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= WRITE_MULTI; - u_addr_preset <= X"000000"; - u_addr_end <= X"010000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_READ; - u_write_en <= '1'; - rw_null_en <= '1'; - while lin_addr /= u_addr_end loop - u_cmd <= UCMD_READ; - rw_null_en <= '1'; - if rand_gen(3) = '0' and rand_gen(4) = '0' and rand_gen(5) = '0' and rand_gen(6) = '0' then - if rand_gen(1) = '1' or rand_gen(7) = '1' then - u_cmd <= UCMD_WRITE; - end if; - rw_null_en <= '0'; - end if; - wait until rising_edge(clk_out); - end loop; - u_write_en <= '0'; - rw_null_en <= '0'; - wait until rising_edge(clk_out) and u_req_wr='0'; - wait for 200*CLK_PERIOD; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= READ_MULTI; - u_addr_preset <= X"000000"; - u_addr_end <= X"010000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_WRITE; - u_read_en <= '1'; - rw_null_en <= '1'; - while lin_addr /= u_addr_end loop - u_cmd <= UCMD_WRITE; - rw_null_en <= '1'; - if rand_gen(3) = '0' and rand_gen(4) = '0' and rand_gen(5) = '0' and rand_gen(6) = '0' then - if rand_gen(1) = '1' or rand_gen(7) = '1' then - u_cmd <= UCMD_READ; - end if; - rw_null_en <= '0'; - end if; - wait until rising_edge(clk_out); - end loop; - u_read_en <= '0'; - rw_null_en <= '0'; - wait until rising_edge(clk_out) and u_data_vld='0'; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_w_rand_r.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_w_rand_r.vhd deleted file mode 100644 index 286fb33..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_w_rand_r.vhd +++ /dev/null @@ -1,320 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity tb_sdr_ctrl is -end; - -architecture struct of tb_sdr_ctrl is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 8; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal u_addr : user_addr_t := (others => '0'); - signal lin_addr : user_addr_t := (others => '0'); - signal rand_gen : unsigned(7 downto 0) := (others => '0'); - signal u_tag_in : user_tag_t := "0000"; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t := UCMD_NOP; - signal u_cmd_we : std_logic := '0'; - signal u_busy : std_logic; - signal u_data_w : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_dm : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_in : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_out : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_data_r : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal u_req_rd : std_logic; - signal u_read_en : std_logic := '0'; - signal u_write_en : std_logic := '0'; - signal rw_null_en : std_logic := '0'; - signal u_addr_cnt_en : std_logic := '0'; - signal u_addr_load : std_logic := '0'; - signal u_addr_preset : user_addr_t := (others => '0'); - signal u_addr_end : user_addr_t := (others => '0'); - signal ref_data : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - type test_phase_t is (IDLE, PART_INIT, WRITE_SINGLE, WRITE_MULTI, READ_SINGLE, READ_MULTI, FINISHED); - signal test_phase : test_phase_t := IDLE; - - type u_addr_mode_t is (MONOTONIC, RANDOM); - signal u_addr_mode : u_addr_mode_t := MONOTONIC; - signal cycle_cnt : natural := 1; - signal data_cnt : natural := 0; - signal efficiency : real := 0.0; - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => u_req_rd, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------------------------------- - -R_DATA_COMPARE: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_data_vld='1' then - if u_read_en = '1' and u_tag_rd = "0000" then - assert (ref_data = u_data_r) report "Error on read!" severity failure; - for i in 0 to DDR_DATA_WIDTH/4-1 loop - ref_data((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - end if; - elsif u_read_en = '0' and rw_null_en = '0' then - last_data := (others => '0'); - ref_data <= (others => '0'); - end if; - end if; - end process; - -W_DATA_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_req_wr = '1' and u_tag_wr = "0000" then - for i in 0 to DDR_DATA_WIDTH/4-1 loop - u_data_w((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_write_en = '0' and rw_null_en = '0' then - last_data := (others => '0'); - u_data_w <= (others => '0'); - end if; - end if; - end process; - -ADDR_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_addr_load = '1' then - lin_addr <= u_addr_preset; - rand_gen <= X"80"; - elsif u_addr_cnt_en = '1' then - lin_addr <= lin_addr + BURST_LEN; - if rand_gen(rand_gen'left) = '1' then - rand_gen <= (rand_gen(rand_gen'left-1 downto 0) & rand_gen(rand_gen'left)) xor "10010010"; - else - rand_gen <= rand_gen(rand_gen'left-1 downto 0) & rand_gen(rand_gen'left); - end if; - end if; - end if; - end process; - -performance_count: - process(clk_out) - begin - if rising_edge(clk_out) then - if u_write_en = '1' or u_read_en = '1' then - cycle_cnt <= cycle_cnt + 1; - if u_req_wr = '1' or u_req_rd = '1' then - data_cnt <= data_cnt + 1; - end if; - else - cycle_cnt <= 1; - data_cnt <= 0; - end if; - end if; - end process; - - u_tag_in <= "000" & rw_null_en; - - efficiency <= real(data_cnt)/real(cycle_cnt); - u_cmd_we <= (u_write_en or u_read_en or rw_null_en) and (not u_busy); - u_addr_cnt_en <= '1' when (u_cmd_we = '1' and (lin_addr /= u_addr_end)) else '0'; - u_addr <= (rand_gen(7) and (rw_null_en)) & lin_addr(lin_addr'left-1 downto 0); - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait until rising_edge(clk_out) and u_busy='0'; - wait for 137*CLK_PERIOD; - - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= WRITE_MULTI; - u_addr_preset <= X"000000"; - u_addr_end <= X"010000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_WRITE; - u_write_en <= '1'; - while lin_addr /= u_addr_end loop - u_cmd <= UCMD_WRITE; - rw_null_en <= '0'; - if rand_gen(3) = '0' and rand_gen(4) = '0' and rand_gen(5) = '0' and rand_gen(6) = '0' then - if rand_gen(1) = '1' or rand_gen(7) = '1' then - u_cmd <= UCMD_READ; - end if; - rw_null_en <= '1'; - end if; - wait until rising_edge(clk_out); - end loop; - u_write_en <= '0'; - rw_null_en <= '0'; - wait until rising_edge(clk_out) and u_req_wr='0'; - wait for 200*CLK_PERIOD; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= READ_MULTI; - u_addr_preset <= X"000000"; - u_addr_end <= X"010000"-BURST_LEN; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_cmd <= UCMD_READ; - u_read_en <= '1'; - while lin_addr /= u_addr_end loop - u_cmd <= UCMD_READ; - rw_null_en <= '0'; - if rand_gen(3) = '0' and rand_gen(4) = '0' and rand_gen(5) = '0' and rand_gen(6) = '0' then - if rand_gen(1) = '1' or rand_gen(7) = '1' then - u_cmd <= UCMD_WRITE; - end if; - rw_null_en <= '1'; - end if; - wait until rising_edge(clk_out); - end loop; - u_read_en <= '0'; - rw_null_en <= '0'; - wait until rising_edge(clk_out) and u_data_vld='0'; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_addr.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_addr.vhd deleted file mode 100644 index 5f96aa3..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_addr.vhd +++ /dev/null @@ -1,319 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity tb_sdr_ctrl is -end; - -architecture struct of tb_sdr_ctrl is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 8; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal u_addr : user_addr_t := (others => '0'); - signal u_tag_in : user_tag_t := "0000"; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t := UCMD_NOP; - signal u_cmd_we : std_logic := '0'; - signal u_busy : std_logic; - signal u_data_w : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_dm : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_in : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_out : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_data_r : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal u_req_rd : std_logic; - signal u_read_en : std_logic := '0'; - signal u_write_en : std_logic := '0'; - signal u_addr_cnt_en : std_logic := '0'; - signal u_addr_load : std_logic := '0'; - signal u_addr_preset : user_addr_t := (others => '0'); - signal u_addr_end : user_addr_t := (others => '0'); - signal ref_data : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - type test_phase_t is (IDLE, PART_INIT, WRITE_SINGLE, WRITE_MULTI, READ_SINGLE, READ_MULTI, FINISHED); - signal test_phase : test_phase_t := IDLE; - - type u_addr_mode_t is (MONOTONIC, RANDOM); - signal u_addr_mode : u_addr_mode_t := MONOTONIC; - signal cycle_cnt : natural := 1; - signal data_cnt : natural := 0; - signal efficiency : real := 0.0; - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => u_req_rd, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------------------------------- - -R_DATA_COMPARE: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_data_vld='1' then - if u_read_en = '1' then - assert (ref_data = u_data_r) report "Error on read!" severity failure; - end if; - for i in 0 to DDR_DATA_WIDTH/4-1 loop - ref_data((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_read_en = '0' then - last_data := (others => '0'); - ref_data <= (others => '0'); - end if; - end if; - end process; - -W_DATA_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_req_wr = '1' then - for i in 0 to DDR_DATA_WIDTH/4-1 loop - u_data_w((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_write_en = '0' then - last_data := (others => '0'); - u_data_w <= (others => '0'); - end if; - end if; - end process; - -ADDR_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_addr_load = '1' then - u_addr <= u_addr_preset; - elsif u_addr_cnt_en = '1' then - if u_addr_mode = MONOTONIC then - u_addr <= u_addr + BURST_LEN; - else - if u_addr(u_addr'left) = '1' then - if BURST_LEN = 2 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "10000000000010001010100"; - elsif BURST_LEN = 4 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "1000000000010011010110"; - elsif BURST_LEN = 8 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "100000000001011110100"; - end if; - else - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)-1) <= u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)-1) & u_addr(u_addr'left); - end if; - end if; - end if; - end if; - end process; - -performance_count: - process(clk_out) - begin - if rising_edge(clk_out) then - if u_write_en = '1' or u_read_en = '1' then - cycle_cnt <= cycle_cnt + 1; - if u_req_wr = '1' or u_req_rd = '1' then - data_cnt <= data_cnt + 1; - end if; - else - cycle_cnt <= 1; - data_cnt <= 0; - end if; - end if; - end process; - - u_tag_in <= ("00" & u_write_en & u_read_en) when ((u_addr = X"333C98" or u_addr = X"000100") and u_cmd_we = '1') else "0000"; - - efficiency <= real(data_cnt)/real(cycle_cnt); - u_cmd_we <= (u_write_en or u_read_en) and (not u_busy); - u_addr_cnt_en <= '1' when (u_cmd_we = '1' and (u_addr /= u_addr_end)) else '0'; - - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait until rising_edge(clk_out) and u_busy='0'; - wait for 137*CLK_PERIOD; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= WRITE_MULTI; - u_addr_preset <= X"800000"; - if BURST_LEN = 2 then - u_addr_end <= X"5E2330"; - elsif BURST_LEN = 4 then - u_addr_end <= X"7DEDD0"; - elsif BURST_LEN = 8 then - u_addr_end <= X"5666B0"; - end if; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_addr_mode <= RANDOM; - u_cmd <= UCMD_WRITE; - u_write_en <= '1'; - while u_addr /= u_addr_end loop - wait until rising_edge(clk_out); - end loop; - u_write_en <= '0'; - wait until rising_edge(clk_out) and u_req_wr='0'; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= READ_MULTI; - u_addr_preset <= X"800000"; - if BURST_LEN = 2 then - u_addr_end <= X"5E2330"; - elsif BURST_LEN = 4 then - u_addr_end <= X"7DEDD0"; - elsif BURST_LEN = 8 then - u_addr_end <= X"5666B0"; - end if; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_addr_mode <= RANDOM; - u_cmd <= UCMD_READ; - u_read_en <= '1'; - while u_addr /= u_addr_end loop - wait until rising_edge(clk_out); - end loop; - u_read_en <= '0'; - wait until rising_edge(clk_out) and u_data_vld='0'; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd deleted file mode 100644 index c60d600..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd +++ /dev/null @@ -1,333 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity tb_sdr_ctrl is -end; - -architecture struct of tb_sdr_ctrl is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 2; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal u_addr : user_addr_t := (others => '0'); - signal u_tag_in : user_tag_t := "0000"; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t := UCMD_NOP; - signal u_cmd_we : std_logic := '0'; - signal u_busy : std_logic; - signal u_data_w : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_dm : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_in : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_dm_rd_out : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "0000"; - signal u_data_r : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal u_req_rd : std_logic; - signal u_read_en : std_logic := '0'; - signal u_write_en : std_logic := '0'; - signal rw_null_en : std_logic := '0'; - signal u_addr_cnt_en : std_logic := '0'; - signal u_addr_load : std_logic := '0'; - signal u_addr_preset : user_addr_t := (others => '0'); - signal u_addr_end : user_addr_t := (others => '0'); - signal ref_data : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - type test_phase_t is (IDLE, PART_INIT, WRITE_SINGLE, WRITE_MULTI, READ_SINGLE, READ_MULTI, FINISHED); - signal test_phase : test_phase_t := IDLE; - - type u_addr_mode_t is (MONOTONIC, RANDOM); - signal u_addr_mode : u_addr_mode_t := MONOTONIC; - signal cycle_cnt : natural := 1; - signal data_cnt : natural := 0; - signal efficiency : real := 0.0; - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_data_req_r => u_req_rd, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm_wr_in => u_dm, - u_dm_rd_in => u_dm_rd_in, - u_dm_rd_out => u_dm_rd_out, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - ------------------------------------------------------------------------------------------- - -R_DATA_COMPARE: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_data_vld='1' then - if u_read_en = '1' then - assert (ref_data = u_data_r) report "Error on read!" severity failure; - end if; - for i in 0 to DDR_DATA_WIDTH/4-1 loop - ref_data((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_read_en = '0' and rw_null_en = '0' then - last_data := (others => '0'); - ref_data <= (others => '0'); - end if; - end if; - end process; - -W_DATA_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_req_wr = '1' then - for i in 0 to DDR_DATA_WIDTH/4-1 loop - u_data_w((i+1)*DDR_DATA_WIDTH/2-1 downto i*DDR_DATA_WIDTH/2) <= last_data + i + 1; - end loop; - last_data := last_data + DDR_DATA_WIDTH/4; - elsif u_write_en = '0' and rw_null_en = '0' then - last_data := (others => '0'); - u_data_w <= (others => '0'); - end if; - end if; - end process; - -ADDR_GEN: - process(clk_out) - variable last_data : unsigned(7 downto 0) := (others => '0'); - begin - if rising_edge(clk_out) then - if u_addr_load = '1' then - u_addr <= u_addr_preset; - elsif u_addr_cnt_en = '1' then - if u_addr_mode = MONOTONIC then - u_addr <= u_addr + BURST_LEN; - else - if u_addr(u_addr'left) = '1' then - if BURST_LEN = 2 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "10000000000010001010100"; - elsif BURST_LEN = 4 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "1000000000010011010110"; - elsif BURST_LEN = 8 then - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)) <= (u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)) & u_addr(u_addr'left)) xor "100000000001011110100"; - end if; - else - u_addr(u_addr'left downto NextExpBaseTwo(BURST_LEN)-1) <= u_addr(u_addr'left-1 downto NextExpBaseTwo(BURST_LEN)-1) & u_addr(u_addr'left); - end if; - end if; - end if; - end if; - end process; - -performance_count: - process(clk_out) - begin - if rising_edge(clk_out) then - if u_write_en = '1' or u_read_en = '1' then - cycle_cnt <= cycle_cnt + 1; - if u_req_wr = '1' or u_req_rd = '1' then - data_cnt <= data_cnt + 1; - end if; - else - cycle_cnt <= 1; - data_cnt <= 0; - end if; - end if; - end process; - - u_tag_in <= ("00" & u_write_en & u_read_en) when ((u_addr = X"333C98" or u_addr = X"000100") and u_cmd_we = '1') else "0000"; - - efficiency <= real(data_cnt)/real(cycle_cnt); - u_cmd_we <= (u_write_en or u_read_en or rw_null_en) and (not u_busy); - u_addr_cnt_en <= '1' when (u_cmd_we = '1' and (u_addr /= u_addr_end)) else '0'; - - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait until rising_edge(clk_out) and u_busy='0'; - wait for 137*CLK_PERIOD; - - -- Bank 0 - test_phase <= WRITE_MULTI; - u_addr_preset <= X"800000"; - if BURST_LEN = 2 then - u_addr_end <= X"646808"; - elsif BURST_LEN = 4 then - u_addr_end <= X"7DEDD0"; - elsif BURST_LEN = 8 then - u_addr_end <= X"5666B0"; - end if; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_addr_mode <= RANDOM; - while u_addr /= u_addr_end loop - u_cmd <= UCMD_WRITE; - u_write_en <= '1'; - rw_null_en <= '0'; - if u_addr(20) = '0' then - u_cmd <= UCMD_READ; - u_write_en <= '0'; - rw_null_en <= '1'; - end if; - wait until rising_edge(clk_out); - end loop; - u_write_en <= '0'; - rw_null_en <= '0'; - wait for 200*CLK_PERIOD; - - wait until rising_edge(clk_out) and u_busy='0'; - -- Bank 0 - test_phase <= READ_MULTI; - u_addr_preset <= X"800000"; - if BURST_LEN = 2 then - u_addr_end <= X"646808"; - elsif BURST_LEN = 4 then - u_addr_end <= X"7DEDD0"; - elsif BURST_LEN = 8 then - u_addr_end <= X"5666B0"; - end if; - u_addr_load <= '1'; - wait until rising_edge(clk_out); - u_addr_load <= '0'; - wait until rising_edge(clk_out); - u_addr_mode <= RANDOM; - while u_addr /= u_addr_end loop - u_cmd <= UCMD_READ; - u_read_en <= '1'; - rw_null_en <= '0'; - if u_addr(20) = '0' then - u_cmd <= UCMD_WRITE; - u_read_en <= '0'; - rw_null_en <= '1'; - end if; - wait until rising_edge(clk_out); - end loop; - u_read_en <= '0'; - rw_null_en <= '0'; - wait until rising_edge(clk_out) and u_data_vld='0'; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdram_ctrl_frontend.vhd b/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdram_ctrl_frontend.vhd deleted file mode 100644 index 95ffa58..0000000 --- a/lib/SDRAM/ddr_sdr_v1_4/src/tb_sdram_ctrl_frontend.vhd +++ /dev/null @@ -1,385 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity tb_sdram_ctrl_frontend is -end; - -architecture struct of tb_sdram_ctrl_frontend is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant BURST_LEN : natural := 2; - - signal rst : std_logic := '1'; - signal clk : std_logic := '0'; - signal rst_out : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal addr : user_addr_t := (others => '0'); - signal r_wn : std_logic := '0'; - signal en : std_logic := '0'; - signal busy : std_logic; - signal din : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal be : unsigned(2*DDR_DM_WIDTH-1 downto 0) := "1111"; - signal dout : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - signal dout_vld : std_logic; - signal dout_re : std_logic; - signal dout_reg : unsigned(2*DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - -begin - - clk_fb <= part_clk_p after 1 ns; - - -- DDR SDRAM Controller Core - inst_sdram_ctrl_frontend : entity work.sdram_ctrl_frontend - Generic map - ( - BL => BURST_LEN, - read_phaseshift => 0, - f_sysclk => 100E6, - fifo_depth => 4 - ) - Port map - ( - - sys_rst_in => rst, - sys_clk_in => clk, - - sys_rst_out => rst_out, - sys_clk_out => clk_out, - sys_clk_fb => clk_fb, - - busy => busy, - en => en, - r_wn => r_wn, - be => be, - addr => addr, - din => din, - dout => dout, - dout_re => dout_re, - dout_vld => dout_vld, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model - i_mt46v16m16_0 : entity work.mt46v16m16 - port map ( - dq => std_logic_vector(part_data), - dqs => std_logic_vector(part_dqs), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - -read_register: - process(clk_out) - begin - if rising_edge(clk_out) then - if dout_vld = '1' then - dout_reg <= dout; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- - dout_re <= dout_vld; - - process - begin - - -- Write MAX_WORDS to DDR SDRAM Controller - wait for 4*CLK_PERIOD; - rst <= '0'; - - wait for 4*CLK_PERIOD; - wait until rising_edge(clk_out) and rst_out='0'; - - for i in 0 to 999 loop - en <= '1'; - r_wn <= '0'; - din <= to_unsigned(i, 32); - addr <= to_unsigned(2*i, 24); - wait until rising_edge(clk_out) and busy = '0'; - end loop; - - for i in 0 to 999 loop - en <= '1'; - r_wn <= '1'; - din <= to_unsigned(i, 32); - addr <= to_unsigned(2*i, 24); - wait until rising_edge(clk_out) and busy = '0'; - end loop; - - en <= '1'; - r_wn <= '0'; - din <= X"01020304"; - addr <= X"000000"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"05060708"; - addr <= X"000002"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"00001111"; - addr <= X"000004"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"22223333"; - addr <= X"000006"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"44445555"; - addr <= X"000008"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"66667777"; - addr <= X"00000a"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"88889999"; - addr <= X"00000c"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"AAAABBBB"; - addr <= X"00000e"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"CCCCDDDD"; - addr <= X"000010"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"EEEEFFFF"; - addr <= X"000012"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"FFFFFFFF"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"87CCCCCC"; - be <= "1000"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"CC65CCCC"; - be <= "0100"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"CCCC43CC"; - be <= "0010"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"89ABCDEF"; - addr <= X"000016"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"CCCCCC21"; - be <= "0001"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"55555555"; - be <= "1010"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"AAAAAAAA"; - be <= "0101"; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '1'; - addr <= X"000014"; - - wait until rising_edge(clk_out) and busy = '0'; - be <= "1111"; - en <= '1'; - r_wn <= '0'; - din <= X"11223344"; - addr <= X"000018"; - - wait until rising_edge(clk_out) and busy = '0'; - r_wn <= '1'; - addr <= X"000010"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"55667788"; - addr <= X"00001a"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"99990000"; - addr <= X"00001c"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '1'; - r_wn <= '0'; - din <= X"AAAA5555"; - addr <= X"000020"; - - wait until rising_edge(clk_out) and busy = '0'; - r_wn <= '1'; - addr <= X"000000"; - - wait until rising_edge(clk_out) and busy = '0'; - r_wn <= '1'; - addr <= X"000018"; - - wait until rising_edge(clk_out) and busy = '0'; - r_wn <= '1'; - addr <= X"00001A"; - - wait until rising_edge(clk_out) and busy = '0'; - r_wn <= '1'; - addr <= X"00001C"; - - wait until rising_edge(clk_out) and busy = '0'; - r_wn <= '1'; - addr <= X"000020"; - - wait until rising_edge(clk_out) and busy = '0'; - en <= '0'; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_5/doc/SDRAM_CTRL.vsd b/lib/SDRAM/ddr_sdr_v1_5/doc/SDRAM_CTRL.vsd deleted file mode 100644 index 92e3c51a0a029ef3fda503bb45f1094cfd91d35c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 91648 zcmeFZcT^MG`!~8LjiyehBBBW(iiie@itR9w&};-LR&*$Wg2GTmQJDy+*iNu}EGJP9 z_TwOmU4y+lh@u|bAOd1gCxRd3tqNNB$#=0l@y1J2{T~&)Z|*2^9bTD5M3a;LUe;bA>b4M)(|!jwh(p@_7Dyb-60$ydO$cq z^n`GR=mpUmLINR$aDi}zaD(Ur;SSLkq923@M1KfRhyf5@5Cb6wLC7GyAqGSEK*%A6 zKn#T#2H^`a9AX5-NQhAoqal8S@PjbT+5f=w43zM_0Ej?{Ac$ay5Qwo5;~>UEOn{gO z5elJ#2!oge5e^Xn5eX3mF&SbC#8ilB5Yr)MKtw~#gqQ_^L&QMDLc~GDL(GOqfJlUx z12GpO2_hL{9>jcz6o^y^0wN6}9U=oF6Cw*D8)5-O4#Yx;MG(0Viy@XkEQQE}AR*Kc z;qaFT_)RIi^HlgZ&&vrI2+Dk>6nb9*!lgz1!SP84l0t7Lf*H5JUcnxCNe1{fy4IkQh4vqmNnnM2*BJXBMyrz63&`#VIWyFnSTq+G%E!BY|&&y5EsRZ z;t971L|X)ATM(TZsp6|Fx0v2&}dUx@-}2g+jM20(6T&yhUKW zMNne1MPR!?^1Ik948$G=ok}SZ?8Xar;~xrk69l^ngWW{IZf3?{X_chTmh9aZ{NO_N zx#jm%Au(I+D*Es$`dr{wxcKpYaA*7N=fD=;UNDPS$bpHxzrcG$$AKZpN^ljd;J|9I z94h>ce!kGG{KZRJ2KAMlPE`N!uy%;Jo1+u5Tbj5%lRRgZT@aV zaCKOWk3(<;9GuM;SNiOPN|gT_&pEnu;9Z^tC|c=b-4#r(0+BrXE__VEXF8ViMu=X} z!zQ4!&@?#Dv%8EPy4LowV1my%8scVT!HT zTKpVVI{69z3J(lZZVv7Wc-8<(QIVkt7$F*o{HZEcT~<9(HB3yNwwymFY#gR|hA)wH zPAl%PB6<;Ut@t?K=$ig8<_K0r)FlqGuS<*^5Z;;0>rCc%&RJ?amtoPMEaVw?WUsgQ!4nPTL35LH3kXdH+Ox^{!}494 z09tVonApW%iU7XC9`Mb)rwD*6ljim*t&hJ{=-w5G#*h(YLT<^zNx>eHQ@#ck% zvj@eRqgrrcRfY75rdsoWD56^9z6q0kaw6FkqrYl=GFI zol1Cf`0IgjLN%DJU!X72Z`U8u-_Td;YxUqX6-Q^$D`=ocX-C?V7KG?4qujLgG5QK! zO~0i9kJ(6-P%>tbXdH7owj6*rhZQwhjE3399AeHhcc&qJo--d9j{3?4?q-j(_t__``8)PIOHX$1&h_U;aT7U!bGcjrx0!3vTcWn8I|@e86X{djE$%t@ z;q#BcCZjoIS%UzF0H~rf(+G}$WFR;pHG#`WikF5FnOR&!d`41QmNX2$lbV$PIe}zC zSmfZ5FE}p9q{1Haz;Y>6RIIV1BWvU;_|@t^o{4SOa<^c5gpF5rU9+ z%>`yQmLU7pyJl&N5r9gQU4g5;xJbjX`R%{wm|Gz^Yq=u9%J%lOwV-!z-WpD5?28UZ z$DuXRXez2kH=sNDYXSdzPP;|7-;0oTjTwiu|CrQd3{Qxko0Y)D&x5Q{nv=w3&6Q>) zEXeVV|TH; z02Mt4JoN+x*9o5!_k-*FjEgO;g4G}fQxaU-qKu?DbKwwpDEmtXj~L<0Nq^B0B}ZhW z5gD;rNgR%LBe#5bf{-}pK7ISl5h^@xv4%T5c z*dKaO1^xhk$`r}TGQ}{NLckMuL6&Z7GI~O{hzHk9X5e8V3TKj`_AAnAL|$-E-NV&? z9rV#62=fN|b_bh`Zh-R#FGll_wW24`e}O7|6gaW(34**-g6LqL0_eMJMUW9@-4O5{ z3>XEDoJWw6hIlZc$rv&KEcpYmLRQ3sQEhNqnw-H_uXoLm-w55-hj4vtR(UI?c{$)~ zuEq6JG#R_TYyM&doUNfJ$OHV|;D}dzS0~qhLc3Ts9bFs&zOA zs#6Al?oGx3IT%uG#)02Q2_~WO@b>@L8HhxvuIKT304G$B zUVQ+Y?~g*ip^MPy2<@WGtb~+}g1>=%=ey<(?j0u(;w&FB-6oL{^W}EjOFaIMy<8i^va~tlBsk+FJkveDhmE9oDk!gfbLOTfRF32h1@uo)@Nj^M=vA@7=nWiI?vuDgU6q)-c9>Hivt z8t3ff@)#I9Ki6w4&EH7)FMamz;ToZZUrL**ev>oXYm}Icn3td8dhpZZWTw3HKm;=_!>xD%=Hi6!&20H<> z4Mje#e~DKO_8bpopBJ0p>quZ#ljcf9?x;kD6#1-vjtrG5kzpQ6 z#CL(W5*c3Pa|jtRT=^UssZb)LLX^nplVM8ax2a0RFGh(R!{#d2O4I$3F$D|z8!CGS{-qcRm(g!7`LN?yuj4<&Dkw~{y2BjP!4+HfUrxkg< zn-v3_;B%F{m^39XcA@e)FHWuG#TP00vriVw`3VQ){KQf@KV{BoIe%`2oS$@4{+yp& zDd*37D(BBXSpz?6l=D-K@GsFW=cfTBKiypUoSz|9@-rQk{H&Aa5&Q)nO8!ER2>#!T zhAa7D;;dYSlAp3TM9E(grsOZ3s+`A<9-fsKqvVrw;aAmZO8&BiN`C%HwUS>@q!bhu z%LOUR56A^8O67v03i%9y-D$bNr#NdB?2KS_rChM)sa&uYc1EzSQ7-u12%Br#<$_|M z6s(7x5o{1E1sffef=#e9g3VH;V2g)RQ0^!$-0H0qWJ?RTJ@$wY5mYAvZNGBQ-5KH7yPb(^J#JQ`5$!rujo*WNMmEYMN(i znky8XQqycw(=1cdc&TX--*`=GL$Se7Tx%$fdS)oDG8Er76kmqISwnG|q4PRTl(WSwQQj+d;9_y*wp=nMv3 ztpQ%gpsOWoqD>LX08FYJ~u-%~BV9>2L=<=bEYtUsFbjb!?92BM-bm0cw zID^g~3L_0VAA`=*pmR0os+|lv8-vc$pc4S?0pKsZ1p{t~XH}EYqQQHP932b9pn9xG zG0s5|eZ+e%m|_R=J{ZY&%^{~<+#*Hiz3)i>foxPzY4r|L%w*yD;qH(Q>wkJLiao%N zvs~_?P$>Ft)I(nW4pXc^jy;*$fqgph&)4$z7&0kE#+)p2dslwh_IvpW+e6Leo%gyq zS4zjv0mzYyVVM>DNg0>G(#r_`2Pg!~ti1)b;LA}k-)%4?kVRb{nNNo-@YAVs`s=9+ z6{mgszNEMHSOcbZs|+x7tMu+x=`1ZZ1FJme0MV8TkA*`9{Udz+?Z?EHvagtlpHp}0 zo3RN(F3~&Pb^eKp;qHR#bzj6|!O~kkt16MDw;tYmk7fSzy+_kkL)zJdUDop0Ke69X)jL@Jh*0bRnRecq|a*U=9x zUH}+W@rl}yQhTkgq6RUW-{5G?TN8)KrNF6%y!2%Zuja3_nMgVGc}Mg)GWjrCom}4g zt^TXtiq7gUeOf=5R?<=QoExEemy??1$l{F4+0A^xYI-LPj?xu$6n(7NI7oXIe2(PK=_!6mP)h8@Cjix@;B31lkdyZyiE_UOJT_8*Le&6ef`8ZNd)$6zqcX1yi3khNsq7>KmI5k?jC+H(sT1T&P}0k?zZyEYbMP> zp{NLdq*$d7a9tnLN6OgOiW=?3imu$f?)_Vy+WWS|80-UEUfV}-t19^u^DbM)xFXBG z?)jb5ab+#99l$nOWA~R|D`elfu4uoPI%^L(8i+ny&J#YzjS^fuz%E}SP-nZtG7iLkm3dNc5s!6Vl2L!fMM|t?R=mIUm_<5HRxA^FS;zvvXGr5)1am@(#rCUdfQ?QrEEH$$P~8 zTad|r9Z+3OF-{75I&aM##p*|#R5X~MZw%QhMk1{RTWxgKGpmvGQ1TL8K2)FyY}ytm zEOoOKo#5C33D#voOnEdQB*xf)i=zTLOyMIeYc3{imY~Pl`Z1XXA1m6FX z=+6ZSc+OO>w3_9S^8CM#iTVeQfe!1@({SB0D?Ya^>Kmr^t==*FVBCJ<3~?v99tH%b zPI(lYo3mZR%Q>mZC7)@)`*r5&#VakfM>K=9+ce?Yqj!_mfR0bntDmH6b3aKVdo2*b z;Afvpo$bFx1PoNB%pO#SDpHOQiR|zgli_?rlkR-ul02wm^J%mG6}r+ZH8WL&YT39! zLdAsNN@(kz3Pn+q{jJ|S*5+IdavT^C`P~JvNL&9@Wl(jfy5UmX2Uou(C*wUdxlvbM zuZS2|Cgeb{;^mhD6)LQA-J~jq%FU!OOp-r_t68ASmlI8tdz}%9+mi6VnEvHUO zW5<;-$HCa+L*r`n6QE#qrRh|}@pkLmJ^k{H&yZcfwcFA}0Whp0b`WbcOSOsz#GBY# z8e6Ru*=vcJ8`VCPB30`rd{}VqWh!#&ZOuW|In_PYe(DT$hf=(xSPIeG>fQCedR|8b zSRUD@c0IlqFUN0$`#-LpEcLH$z`czA)qH}#^Q|-%^r^k}#_i3}xa;hM*gmzN-hc;h z2fq1YSV&B#=hJ!gRa&}-t|Ml1PiX^f{)0vtM;Au^;+geu=Y6W_%zOsqF~!Ut<^*${ zdCC}=4hD2%^CsOlE{|;E$=N`53ahvgZYQdqY$q&YPn52(7w}40zO6_S*T&mw+sYpr z2ewHj#J2IS*zWDl@ozafalni78i!_~D^RcvJ%pY|@1r$n-XxuLc_g^$Bb0QP^q1TSZ|GY+xxrlwL&&8K?l}^^ zB3K%G(+4CeZ^(znC95VtVY4zj_~rxoj&Vci!tdgbJp=%0`yoMPF0whYK-m;oPrS=w z**Y1p97tm1Br<*pHh-AOZFB;QNwAL8lE;?Zjk-xbBQ;nj3B(%L-&ceUD_j@nuZh$o zYQRE`2%mueu5H(RCY-g7Brw;GCTDB?v^=tq{74)i8@Fi>Y0vMngN%=uPiCh`V`tCK zc%?NrYI&61VXKw+ANXPXLNxa1UDn85p;dSt4%%>Y;`(w|Vh9mLOeK;DFyf+GJ@LfK z4LgaWLEhoHnKyTM>T5qP|akPK;y8^=8tXRM2@e< zaja&BCPf3fEYob%lxUnUMBh^HfB5dbl-9h~fEJC_{EOwz+Cf@{He5Sf3v53wEbUiE zUf!ZTpgpU-s|ByLl~gS?foh=BC`%@q0)v>-)CTG^y@08qw=?gl&z+RRI@|R({bN(- zdCT-;^bz_5J?Oeyc3jrc!U?-T=Uc#A2L1O=nHY1$hG0S1R4f?-OE6zrhb7UgV$*BB z3jSyYPq25`cWji+sfMu*r|P{_HuJ@j({*E2{F4nEZQ$o4`P*6+`;S65jQOKEkso9R z_O#5md@rd}wW*%cw;3;7?1%q@#^G6bw?+Cj`d#|G3(>p7JnSr&U)6)h`bPaX{VIDq zx-T8WjiW&{eacTMzB6Q;>+iIVE~CL!`U+|xdBy}V$7FMvY8i-RzRF6O)r?*?20JWE zz#8kAHpXFHmuQd3*g4`stbz?^GgqS-Y$3bl{g3ziKDt0FYO@NFUSuoTTJ|$5;v6|o z4vgkPIle4|8!Fpk9I7au-8nN{_)D|!a|@4gS6UC(JZoDV^uA5HIPeG8J!WyB6MvbD zXPcA zs$TU)Wr6p^!BrB&GjFvN=U?qvc7Qv}8SZ|c`n(w_Z**L94UIcCwM$E9bh+rtAQ9-v zOD*?6o7bo5dX_mIpTGkb^zlf~vc}^#PxU$e@vH^~(};P*49!ICZenbO|Iyc)!hZ;P zFPjdc8!06Zyg8dUxa8N;zEA^9S+P_Sd3-g(s+y4;Btb28k7UTA&TADrKi{pg)&Mun zP))EVkX}R2)S{T21x=bM>=VsmR<7-;9m8H>bpzSA>>TYP?V4S-ubxJ6nF$#`*S5=` zQtf5!Bdy0c+s|4N)!|6x+V(WDt+b9qVXJNY?G=jJPuRlIy)``*7GJvZ5i2{h1S*GG zMeU&eru3Be18N1+N}Xo-yo<((ebfy+PyJ|p=(!CMais#$3Q?zVxHF~`2+OChEf)wu zRm2E;oR2%4Io7~iXtP_!&n=HHZJzh1UiRxa~Aa^_SVz^F+Sz-+KS z*f1;vn~s6`SRPi4?ZG>n&tA5(TWppbC0SjR8^`vl_zeFFQv_IlYV#@?r@zp*}jguR-%H? zF>W?YA7&U6@(ScGk7Y8MNyJv>AY*xP2xL7cMs4^{4(bH?jRgI;_3R#PIeT5Zn>A>E zu;2+>s`a6EY9~{JIVBhMqnAzM54b#XxwYJ%Tz={I?(ujwzA}1f*^cQ&*e|+G;g?`+ zHS9lBWZ~`_ycrh|4ul6Wl2EgnS%i!BYPDA>{V4MCe^C*zhd7bo3|=N?oV=5mQ9jNt z(9UKdl77-Eb5aj}#SP$*9(noQm53|z{0(#@Jg=~S*m`5;m7dR9jvUrOGWL^&EMEW( zpR)NP(>$%67Ng$)Q4M$}=-NC^8?8;%sa=ewSKAnbi6 zdDN$kVP%h|U>v$o=q-1%X?dvkc5-m}E^2)ZHm{zMAG}W5W1t?>uZ-@J7khC9TxP?a zkK$mpz6w98uh3WN>-24Ua~fP@z34COiNO)#b3+!p{y~7l#07$m`@`X7;ve?T0rV|v zWSfIk=J8wnmVO@Ti(P@UJlAcWe=jT&3L$b2-AHUE?40A*vKKJ2o{9z89Wp++y0XXMsrerYrWAa?{81A)7);IYvGME5*aFG+ zbS#XCW59lFE53?=>3SbBPeOE8U2c2nJW@45HA|H?A@vk$vN8)xi&WcHM^xbAgs_ro z)mxQBV}3$u`{-T)?{j~C@MA|G&)Pe0`o9_EqrS@q4)(15^5)4~`I{dGm@!#7 zf?w!8SDUL%)<@HdQtedZq*q3LqqhIV-d5DpUX+X)@j_Uz*V;`nUZFU*=UvPJH~v2v z6ev81RUdD065cCt6P}XLDKn2smg>*J^g@wL%Zcl_>8$d z(~lYPVr5?aB*rvL!Aj;2#xzZ7<~6eg6|%gWDDS>h8QJDDf*sG!WC2lYH*9Hx-O%6J zlg4B3s1Lwy=)3$jpRLMP`ODgEDu?x;&F6}8Z!jmnHBQR;Z~>fph@`K~q}zt!rQBss znnufB%UWb3UO=v=sBCw_yf6pxf$QUaSDB5e89f%8fu&$12HoSmSUF}=-xG^;VKWME z#)*Zh?yCMOqE_-YYH345lz6%-Kg=dON5!w7{4W1y97xK%5&yC_nRHlxGj4Ncb`E$D zza#g(s#7J#UGcei5H6mIn`@TfzvC{|+*|G|mp9@?%1;XaJ`A{_L(yP#T9?zy)1WQW z5Wr;1z{L!;-HAmT3}^=mx=EyxW^%Y@m`o?B(O#7R0aYsTpt{H!BpE*vS!R&FU({4;YBirVN6SGstyJry z4S>ZIJwDDY9asm5%SGDl+9TSF+Dh$Z>JbI}sK<01^^FdtdNYTpLP}jnCo+}vYUUMX zq-GE7+I!i}I7p~X&fZvk{v}Vh-S~0*TJ-E%vyrR7@IV$vh%uNu;Y*AqW)RX8f+RfY zy+kz4n^E&h&{@#@UktN`XiivM=^M1WVQdiCUGGIks$<74p18Yyqklm&aOCH=EY9eG zZb&a^4&e7OGp=nJXX*N$sVoG~kR0f-UV*m4K$GA#d4oQ~bl3FP+(svAaLpCaCrQ6p zzfLb4{Wuvdhjb53JEgy+f362#)-JXe&<^xCZX`W{uJ;2&#b1YvcFm)U={@ubx*P@H z(c8=rX0L22b3+!uG|7OD$%V9Aj_s07!5%RUOb1V|>IVaHFb?N3-;woXN3%1|x<|9A z?6+&tU5Y=NB3UI!_~Ft+?0HxNQo}a00#4z;d2l1SFOpeYe;IFp0^FG$5&ndDM|>x) zHKzylTp&#ke9m*84y8S65q5&MR9QO!8p&r9W}I;(!)9+VA<d{+eRpQ`B6v-*gh zukhcUTKj2|>GL-o4@Ges*u8JmGa=d$Zn+ zt!;THTU*nj*!9NN)(n=f$Pcs!pC&!w&9{Bb7saJWdc{8Bfo--6yVvmlbb8BvWv#eg zoLa_Za}itu*GsmF+rfog0iHHwA95J!vN7!xYqFBt!yqvrcZKeUZot!f2_R{~Q@0I@ z#pJr2>+W;iXm{`^;;H*Nay!b9pUBH-SQuC(og7*0(@!%(GhQ=OV<7`7S*G^oil=?Q zV2HM->VpPgs3 zk;7(&bJO*#u?qyWt8}PsI3a=AT zGw=^re>dL8O$4{wX#H}~lNd-~#3Uk~aJsliJ?I2bZ`e%yj0_Sl37ULOg7M^AEkRmQ zGe{YAid;{ER&5UTTDya4B7cymWrUyYo2Nhnl66eOu4@!8PqM?z za^{q51g6_7n~5>ZCx-t4jr53A#?Bdm4`qYdX&=0k*}s;szrXJ?a?BpXi+@}>1Zzca zvCr8LEXP`NZd}YzE|}|(%;N^h_&jd~ST%cUI7}jNSGmW{3xev}z=FWm&sD8XwhIEE z*w(c^P=W`OWysX8HjpnxO=>CPHe=06Tu#Df7|*KTVh>PLric)GpN4u9&_LEYgd#yY$VPOZrf)hjyi2 zZ9!-12h#c4P1=20_fr!k;Q`a|u{X8PwC}Z-qYd)GDkWTDDz`M=Pfajp~P4(NsZ@wEs zi5Mb-C?r6Veg=J(xErT>^-2Gk7|_dQNEfO%c5J6!z#{xpBDCU z8y@tqubc1MIxsr$T8sP8e12%4TAmej{WUQ2->DQSt>Sj6nqQmw-&Cd@2o@{vkL%4r z79}?dU47dPFe<;!rpZN`9m&6zN1VMSaAYND||5-8EE8aP z4x@jCY6oE8H%x`aVwu=-Y%6vUJBNXV1cMzSx*a>Lwm2T4>j6gKV6+W%tX_Cudw%{^|9_rtrB7Mhtjf%nim zZ^TRR5HS3R#zdTf!)WXQS^G`XMcZ5Jt@YQcBekYAv0A%RdsJJYh4r?j1M2?1T&w-8 z9T{@xWN47|PWb?8PU)TU5Q^X92^@sKFZ(|{a^RlOr%NOjy%4XoqU(s^ZzZW_W3L$(CGf>nSGfJ2?Kme%OOpSJ37b<95{li)3N}Gbo4FyhK@aKV~a&mxO>(#T_G??XBE(VcgBDs*oCH+h`AMuI2gJ96j!_Ttj3 z+@7AAfsjFICc(INly;8xfhJMks)6C7*P5gH-?ZJeSulJQqX$m3sUm)}wmj(?Jcx3TvwS2yLc7is4|hevzkOWq}6rX-;ZxYV5jT#Lq-hO=-kN@UHaxiinNhOS@_%+G%ep>cMXhZ`DuK zl0O&7ewrr+xi#i?%bL$vH|qs7aG*VCQ%qqN zokow~Hql@ncYkoIxO&JI*E{q}nxz3!b;1FCe8OJJMAw|K|BXTT-F&A%*y8Fd-|R+I z4adL=D8$Q^zFN1WktX*KnEbz|+-(#(erzKa$#zSG+Bs-3yN=be&(>m(lTERW>+H|a zZ3nwO&=h2tDVxB};=rTSNJZo98R5m;9_|Ep9ln7%sa~K#=w&<^ZNMj^z>+9K*P@kp zIB_0dKs2DA+fn(2t|?PZ$x<<#of4H~<=J3DvP`nk`G?)Di;I7H@<^|9l6w+H@=0O} z9`uue5wh_zJDiXO;d#d3w7)kM5&0#u&~(9h*?sp2wGixD)^TIq0`&2^>~FGRignq% z?iin4IsE~V@3=9wfT#jJv@4(xu(8k9g$3ibuf?Xo<-OZ`c**e2V;H!C9mh+Eub7qU zwpOMZqpDb6I$1SWm8-gY?%}cBVO(!WM@&&x+xpr=A%%OZ&a3XLM6Fy-PoZ zHkuOJb%g4a$y*H*kPf5=8S6B5m`*fu&z|we#>%RcdncX~%{oxpsl4{;*S;DU?|>dO zv?RF;bx#wkV3o@0gx7_oaz{B&xz;6MaEgt zyLoL@t(EZJm(4w~C+%d>g@vL;Gy)bp8N}v28CK(eJ$f>`>=rCRJ6{oSzM|Uue1&sG zg_(ujd{E+HYd1*#h`lqhVb9kc*xBWKnla_x$?0Q1cd2Z=;uv~5JRviI%d(sUHxXsT z24@i&^%e6oyl*-)X~UO!=DW|**wxjpfm z^DgPkFICrh{H0!Bs;YSW1N_FLDC@!kIoq{&m~hrR9|`p4Slx#(5psgP&Q4Ar_p+f! z=xIzjpNO9){lZ#sjy<`790vEJMsTe+qSL^2i?g4uTX^)!`yM7d&{AcgJNv21Vsx*? zvZt+^UK-VhUK%I7G!Fmp`M?m}_yZy2baMU@?D=si@vNZGM7KklEOD(Yp% zMRiSLwF22Z&h6Rq=|`WRoE^~FGrBY_CH)KB_@GrHKyB4skt_ehpRZLN^S56Qdig(6 zIx9UlRIA3U@8u7-L(~NKRf?t?@AmO;e=sT>29XLuM}D#AifwQ!_C{@qcC&sZ{apJ& zyBW8pT-~S%Z8CFg{*w2}C4QogrMod7leRcqZR?;|J|#3>6gB4z35~)U%w!ZUVGpr- z>vjYPX!BW-huu((X3$g=s@qr0;8$iE| z^O=1!JvUq+$E@#{(U{qOGsipgW3DL#;M#4)7Cv~kL7R%J@$0zaFZ|@B(9}ElOWghM ziGZlHA)H2gcn(cn01M{Kpl-=Zo9uTca-%LO5$TpBe{Nht{7&eIGU6%$9utkkH=+wE zKY2}!o%papFpRvrOfYdlq%w7ZE0vS8Vuu2xHC9~opRnieu?QGX9rNEsQj0%q*tz%p z#`_sy7geABVZ+V62llsZynm=a{&k|%m0yOq!tJLcK2HdEWN!s&8qZ zYj2bqH?fyHwB7btO6?A){3mA$t`FIFSa|KXBVb?6MgPfF(+*E&7VYz^o_hssT5u+v zy}a+?$1C?U_A~YA3ifi2Yrv z;Y=x$!(xST(?eHt)K3)_+~}~VTQLkJ_fov=&dkh^DDtu!?N{6O7`kNd$Ps+cVX#vV zUDM=MZuc|NvHJ9fuDYG_CB84*_Kd9SD!5xy%j^BV*<9iz@sean!X!nkqpQk9SHYws zl8ch}dTB?&0C`+mSgiSFh5er|l%hfOSG_4uIZkFO1psQ<2H9V-lQQRp>tLtK!;5NV zV#f7J&CKipLuceH22Mi){~8iIZ?|*Yw8PFs!DHTvMf_mjGwJ2w^W#rMz&V&g)I(ug z{K7dGBmPYO&LER|^B%^T@(1mhr7BFN7^KQAe-S!OHBVK(F8p_uxlUCn=_ok4Z22!! z3ruAx191$Wg#S#~;{X2?%P4!XnlV4 z#)}2{J~OqOWA*uUQ~P&dxo_Uz?^gf-pP`w zd-Ww@@|z{Y3&ic&d75I))ZL<{eS0*ArrunnYrd*36P7NSUCL80o}lo6IUELjh?Vg` z8+fug?C4*1YK37#+Xho*isPYxQe^W=;IjM1{PL^b2cmX=Bw2krU2sc6 z@1}e1Ct(dHSOc!MSG2BeuZX~G6>i_sdp(zI+AuH{l}2HE~ZN9 z3}@{PQ#IzSig3g%Z0uuC@TypX^k1Nh+(v#rM3zl>f3&0n?%HG-LaHd=e`2ba3hs{j z_F-#mXC!UBW3GUTT-OC;1y=t(2!|ek}vD<0~wrqWq?=y(o49`oawT$?(`wjjL?t!y_ zxgGFC`%e3h{thjn&KmWv%yD`OwQ^}xI#a-uO~81!4?ZiasB$tnF#y&qzUq-y?7aIt zXkvaaCTsbt1Tu*Qi`hd{hk?g^X4&j#&#-qI1xrLs!?C3TBkKs32)l9!|8Ix+KC^6E zY-if$`+Syw&9Sp=ByL>yIkxVe*M8f7Y{av=m=*9p9~d@rC7k*c+~EoLDRU(94(dOiM|$vh{b0YQ&i|FYD#N%gXLW? z9uy$?J4)<*I&!#wibUFd$lJ9SydNx@JZ!?tz^-$oF4``M6XI6}9+T(BCJpxo)k1k)yAv%OUT@z8{bYRS`NBx1`i^tu#mb>?xZ|50!yeervb1SpM}-iQnPnS_A60PaD+g{y?&K&vKz zdp!z*+aL%kDnSt3B%-Le!Vp*0FvM96;Hp-Q+ge9(YsE%UaiO6IxOx9`i7!>Y^;_+i zYRdojJ{<0SFK?W4&mHI9dq&W;&<1IvJ)HBeil1th`8m7U9O(&O6wFUBwodd)sTUa6 z(+v%|56W{Es-A8OgcaI9J967B_mCl9*$`FCiOH%YS%spg3Y}9edgOWN`@6j_!04v7 zS0h(-H+6eWFU>)DmhOuBk`5hFztGufUZ@Z1B>FA7(fXf#G@~`KOKg+lSLL{NU^!=H zXs{i^b+d8JelXTW3l7^?Ivd;5Vd@HEl&g~L}Can}^5^F4;Y@?pAJ_T@HmPo3V$ zPcSX;jaV`_K0wo=W=)C2JJa>yMzJL3eyL~B_1?h+Eb(_W`h+Aq2j?E`7`)C+(ldgJs{w9^MfVhg7NKsD-p-NU z4dvb=%x2G>fLh3RI+YK6_0zEanXVOPE-KhxDi$-{ST4g^Xj0C=Fc-UIzu*OX%x0Mv zWZU~rEIT);;mou0XOU5>W_hoYc&|cjEETotS}NEFi^g8{UfCr7AvFkV(eQipZry{- z^5!&g?L2neW$%TjzVi!+J$}hQAnrF8rf(pl-J!+JT*QY)tSm}lt|?|x%~?6#mR*>| zjoe$ToZa<1JjM9lPU)JkvR|f)#5woEyod`cd*;nOva+YQjkrRe{$;kqW$(8R4I~B& z42pf%V1Y3uAj+cdGO)l{I{JjCUwQ3(d*L$MWeS@;V1RMcgCAgYYTF`cP9mB>`LYa zrtV4}zm37zos^g{X`?22#g?CjA4q!9(0NxvLuVEiUgafNai0;_%X?%C50GJ*&fS-J z`7u4ZF?y4*P&xAak#@`Tlw>$qpXxvGKc8J#~Zbfdok(oap z8FO*Z(JAR;bxYGEKORZG7#zaA$+Zc0wANSjLbi>7AopSHSx}j_L65MXz zTPL2OJtDp&&d{P4&Plh@*sF^9WJA)4l#s|qKUnWC4XS;+01VtTY5lchwf(8ZS~>Ns-C{vP zdE1?hPin89;;d)tzg_j3OOk>WitnguA}j`G(z8 zB3$pOI4~+%pQ+!Yf8q9H?maPHB3#nrn&7q`;dT8jJ^Fj??2gs`W{42({4&>tN%k&_ z^1<5A=nVB6^;F!JECG)>c~a26MY1rWsq7a}L3t#dAiE;XO^}rnpn}qV}_X<}^t zZXY4G?k(gE6HXM$>jy3os)W1tM?`ep7g4eGm6!E+IrBo~L#SxcuXfKLYALc4A!m`N zXrL%W)LObwG(wt{jK+oUU6vSoRCHad-*rv!c)2{b!cwXEwkZOu^(W%`d)3;^ygIM0 zZ>Dd~=?rI5enlkB=;^_;=0H^74NuS{LuBiJAnpOtE4wq(z2!H+Qm zW&KFSfuKrQyxxJa>5?xx9X`oz7Y3sY{(HhOrlh z-f_AaI&;EB(o0_Yst3juT8^miObTG$x>cDS2r)v%_)*#8?Rw;uJJ?D|~zTI;qgWsD8t)Mm095^d^o$~zHA(h$#7UytSa@oca>X*>AM7@kv5 z;WT2AdBb3)ieP>d@)J=c))BuGbxAZfOXt08Zb6`$M=BbID$G)wt^iSCOH-%b%eE})AC?dZqQWR?Z(b{SsXXfp>-D@;hUMnyZ7nomI|i*nljmmz%+G2wKP#o~e6TMF zSa3p-KgYWK;7c%r?a{jjxlpCxNSK{>tU9LnakgLn^_=5J=Uv}*eiW=>)*Ru%WxITv zFwTZ3mbNEeInL=fm;+lgL$^`>_7VwptK;}KMn8t!CV`3&aO$A zR-sKgfoe5-kZjj1Tl;{*-mwG(Y9-MMoV#6V+(;+VdFXs~hy)RPoPKMxUGpyD=ekj1 zbVnB_7VGQj`-;zsJBWW57e(sh^egnU!)c%XjQ%%$(IX3IMA=Xcn^NsxfiBwj z-U}1@QD`I;PQ_Bos14MQ)Grh`222zo;;4ve;qoZxiBDSs^&kclp-c<^say-ccp_WC zw(#3Pu!6@NWjyg&8dT_ut}&G|J)G19jO$)yn6((b_I;=R#(8LD7n#(ojC>7Gf$>QV*u;!Aq`i`trhRo#k1-bfuSMT84}pga5kAtW|DjQ-VVoV{F8OuHehFnHI={DZPRIV z=XFZXd#f48oqD6|O_8@vuzrd@UjMy*n;x$cq6X9+p_sZMY)w(Z`P3*%aa`C_lr0=D z`iVMAN&DMa)#QPpAtG#urbK&U4w}@5z)r;GFXhc|hwc&2!Nv|( zki3x|&P4-JFHfm(l5h^x=#9cvqOBrSOQa?{iY}7PM9<0DqG2M%0a7g8Oa@7JiB5`i zZ*A=?-SOVp3lU%3P(05`j3PqSGu8X$=Vsc2ULzP9-jSbFUst2Y>bGh_gEfk}YY;gO z^y|qb*_{H8%ngi4)#PZvB9NV=2(ekN2rkvQ022BhoMjig7^)4+;au|Un& zOjbK-wn;To-CIj5&RDQBd@ePYHIQ}YAD;ZJtiMb;!R&}#c3~-nRrGH)fI&(#?y|f8U9mczJhn@)b0@`Gub@qGlIs z#qQU&fs^|ePhJ&WeDUPhq+D01okljiJ?*K;QA*X_=z)!40LXbnb}gdfI; z&kLK^`qtU4)CQJt3Tt~_*|Kml(?2)GEvaW$=V%_KvDQi_6w1Qv%J3+Lw#nvbQ?whk zd$oA~c{Rmm=+02gX7+u%^>=Nj>#0Mhr!;!LE84E~gnV52!x?%Sb06|;O|zm&*0fD?z5WQLhbdv^zK9}VT}HmayAK8Lnri8YN#ITT~twCy@Q%* zCRS{9^*MA44PV#EH&PY1x`p3PHy6JnZm5%AEF}=*uH0QL4Sy^_!IO)9o`N?p+&0IP z*(B;Dytbi}{}9>F#4OoPB29(_!bijy*+ZGHtcDz0j=oxRz~&S-zWK&rd^1mYR-@DW zzVG~0yiVWbjI-Nu@S67$D+t37Mb57%kBQNu^Z_3XA!_3cK%!Xoyd2yPN(6DEK;X>?B) zr*^6GoT*(d<{pdgcKY(=8Pl=)XrDI6?EN&@ucV!Fto=0qHj1l{S367A_`ICaf+@N4 zaEVAIk|_<=-e`~VlybM`iLzkG@45LU^@{IvBn_k`?eA}W=cJ_F{mizlN_V=U4)=hf z(iGpoGM!7k;)Typ-Df4Pizo|^dd0h+Eq~tlnfv}%9X!NdOtiZf30C0!v|V*c>U0mu z(~H{E>KpwXW)$n#dY-Z#>xV9-XSjmzecj`|{D&1-4N~IK1mWRCqd%{|qc7EiUrZ$M zZo9{(zACIEM^$rryUykO(`LHEfx`9e!e0iwn3&+j3}3}aOzhNHzKYdRgytmaT=v+6 zHQ8-j;wlqacu4lxtZp*h@sMq5t2*i#HM7~f1+}tR?bJQh*cXW}A#ov8-F~wgMoc7b z^q-kP{FqME);Do;UDa=mcRf%b$f;OoEO#!#PT8^t7qUApc;J?YeXAIR7xbMlNQkAE zRlV|af=KDI`OY!CVk9Roi>FSFP zd0k3!ldgc1k-l9A{o;j257kkxMK#1iv5R=c_6J>g!Qv_6o7-ls7XJXcoQHki-V@z3 zXmqJt^7Ut3!a*GHJvKVVgugaV(SDb27&x zQB-tS^t9lZ=-vajhW$#{L^T&N!x?>+F3XST**af7rkOON_8c@a@={VAb z^T$Sx?zQl!Xx5d+vtn5&UxZ3TuyrhbBmGsHo-r?sC0kZYc5_?I(^PJ8I_q%Erd~;} zGdQQYwSP=K6<71%LswW5jnNPe<}W21*AKoGg9X|9mSy6N8&@S4h`&RYeaYgO6#L}) zDc6ElrG!57PDr_Po^!gv;o0`bl3JXow}9w%QprHd6&=(oR)mXFoi<3-T0G5}kn7iN zLay_K+=f$g&1PQ0)0}yiocb->d!zqqkGuN@=M;-yXS_*^fwj=AOJlOn#HKGlaMf>{ zd4ahgZEab@?9d+?XgqdAt%}ZFrB%RM=+LZMb%$oL`y`CLoZIBk&fK>)`>*-HdNjYs zAei24&*kJ?=xo)y=EdBT=l!SXKJdd57`YjL;kggTuDmlwMceO5Is~ z_ng~tG-k88E>68dy?NWiY^;#VEXtM_Y=~O^LY?cd{pj{%Hs|dbn@>?^3%l)eJAV1p zaGmbvb(o$F%?cQr<=1a$mV4;V1rfWg!xor%c?`t94b+;$nv1(?Dcl1%odemPA@d!` ziI+J?+}Y>a|9SbN3DqPsqA$no3v?2{ke3w`$N zp1r+q5ywvMEVobO)-LmuD|YuWvG<>Bn&`!+5h9r~^g%{WsP+0?h7X(g5FBc%Ii|hCH75fipau_W7TbAhA zOUA;wsA}wh(*|h^VR6ewt`@bI-xdvx=;}Q@aB@f>%rd70CQh0D!-bsq2=IBHh@wNv z***8n^^aYhGS^QtIUSk|n(G&LbZ_v@WL=2u?2tgSNE95@B9g)bR-RV-Awteu0muxr8|_Hf1Oq}q$5Yo%%_IxM{? zy(cwDl-K|VeJ9&gBv5QGaZiep&6ll`p(I!Td3!_r<9?A9hx^Cfhsjpf3ic%Tr0dBY zlIul)+~o`>oQ!)bJd!Q843~$=kwTs%zb414c~jMRHIFmbTEVUrYwkb^H)UST?$pSs z;Y`1}R`Va<8m?em3yAC8+-1iU#W2yJlfqr-a7K$=aYtQteJ^^g)QHZDP!rXrqWskD zB@c7(Ds+V+dZ2of+Lt`g-etG97PKiRYtM>TYFm;la-{Z_wvRTKts6nY@?L+d*FXAp z-`G#u8x(tbMeO%H>^`d?>++@Ey-?g8b*cIdY)bBbfW542L<_xP&0FKA8MD9Py%%sg%5QlwMBNUK2M5Y!p4!+v@G|AHeE&DqMrK6 z_QKY(u(F78;d`g97SE#*Mb~K?dF8 z+M*UBY|Xp8IST0!C*3F7EZrbFD`krFM2ci-Ety=}QC8ump-ZjuIoAhzN_*QkxAz*< zJ&ssGY$i_T#h)ewtw^wSYPcwwi@o+NAW?t2!BHW?|3cevW}S#;%tq0yBMGf$F~6NUHvQG`#M<_|reeiP;o}+-N#5kQ+tzovRUVM? z&iBGYbGt+eIfN@<+ls3290uD~nhMWh77y36#w)BR<+JRTm)Gu}dZ}pr-Svvm0_)ea z`2nr&rm`NVahql{o~0J0BGJy%u-f=muG=F`E!;Uj$2hqX&4nlhcFUPvL364Wn=e6` zlglzT4fNWjU}k1Ak|Ou-%Jj<2+#Y#u*WCS)CA(`MNtmD0@aVi9Twc9H^L8{o%b1_j z>u8IU2|Hd4_~n;1;_!+ImKJYGg(UQt%|?A6F$Tmf8G)Qdk~}UaJ!7kGATKTy$LYJq4B;6UmlTB3X;tMNXpnQZq=&TXGEPAkC!q zQ0Z%ly1fVw@M?Ef_KLD3STh}#8eE(7^sP1Ja%`>~HrZgU^f$6A@(KzOFPiQWyu__j z@b*ZrV1&(X&f;BAacxD3cf+~pbzm*hk?ctJB}b6hodWu8o>xeqTu;uE-ypZhJ4lhW zG+bURA1<%0#7kWJ);?6s=Pt$kU@>+azr ze0f8;lUyS2q)}*)zw&es^Ajy}cjf(bx$N=Z z_e|xU1s7w%pUA0sarb_W57i$IyOlF^g?NXachA}FYCc}wKUZ-1GT>=HiL@`)E=;ja{p^RuLY_50L_t7&Q%zVb^r|B2zv92CRH1MMS-b1GQ zdgiM~Nj%EAJ_YX4-Z&@P#A7RBG=++%RyWI_c2Os(>(pZkm3AFyZ{BT~tHFb|FM)!I zLBesui^LJ}bD}_e2h`0;v9O*nSL{RX7e|Bg120avLKxOTv{QIOcun|7X#Ym&BejQd zq}w;iSnuJ@G|?Kbimvf7tA+$Gz#S0D#{TA4F(If}PzTe7r=e-y<)hK2z)J-Q>>XAo*f4ghY+xD!IA*sNCRcXSg2mr1hn3q+MZ+7aN!t>OEKb zFH4v11Vz<{k<)d4s6X{mY9Y&YY@L!qdB73`3YJZg#miV*o+@nDmnQ9zp;NLOGVK53 zcR5QrQ4aIYM7cseOTHeQ*6fgnsteV~UoFtoPzseU$}-YV2_4`xJzv$|i@zw4T7kY|sm3Qq=unI^gcoj?=4EmATK?m4if46Y8yOkYN{*4G!- z(RUR_>idH)ap62+5wS&Bp;V?%H)Hrb(7)1KQg)OxHBU5MD-2IFkn)h1|HP9W=kA9~q->*ze!bwn0%gg}>w0s>cvfkH2Gs&EX6Mhh2_ zhrmkqJMtpgg?vsTSfm!!72VW#77Y*uh$2MxOGL{>n?&~7d-GOa5j_ySc_nJ(Td{68 zmQfeWYF)%kb7^ppI7*D>i&u%aiVuh%tZp3eVp+=w^jM4yW*ta3vYE7lG>t?F^5f)A zc{X`XUPF4HTqj5N%7yZ7O6*NCSlUVyFGb%=@jB?Q(mT>pkULyY_^oOZz;q0Roj}$F z#V?&EGW(8oo|ZUaw#_0rp2EX~w5E#~tf(bmtT5}qvN!Po;c?!Lv0lnm&?slI92DVE zmKuX+&}l_xI_wzK;w5OMw6i`C$a0!jUK=8Stv^@-dMTimVlkWV7f_PGdY#B^o5o!0x%*XFLibDME7ITDiAtyA@!e@2vuEzp9ub^C_Uv?SApfb;Atb4}Ek&n) zE(d?QLWxAMErl|ecQlghVW0*Uig3Aqg4tX2W<6FiLEr4O3#k2_)QbT*9rRP+B=C;s{qQXp$3FUXu|HlxK9NL_`S%OO;sVV9MYg1~)De zuBxueN7PvbD|!>w3@l=>2N#e3eH4{ZtFyxZ*`DK?u!@CPRnawc>iE_&eUn><4p8gH z?m3nfgbJGJpXr;ur3k{{3;;n+PCb5)=t+h*1lP% zz1jvV7`ZnjY+&2<)VaI9w@&TtgkEYbbo7?t2=Nr1LMd(%nd04M@`1oC-4PwKm3U{A z-teD$_3{nBmzPj+u#?*jKm9XyR3Eoi(S5Vgfk29>Sbhc(DI^v!wEdyxb2M%qin@!>pUm7 zU2%G9fOxJfLJSRN-gcQ{_4??f-D0dIT_{F+c{?RjDiq#SC6EmDOcFIyUn6tK$Eu0y ztExn`r4-po?+8nUgQfLEtwmi#gGGW-qDWDkXhm~XxH49`Oj*8R@dMBi>Z&qBcy$7{ z@0K!;Tc{eTL@MN=@>M1Lwm)nArK3mUR4Y_yv+5_+S(Qe8Uj41Ql}@Tg19W}W5xR}) z*=l#)K3!8C`b~F3jcre?HBB__G(9zvA)3jWSsJXzx}tgNa_J$g5OQWX^Tb_gnY8XV zLTtKX{_}af`il&1c_zxHXcJ|dwLTns^P&-K7v>q+Z!*N1!aN}<4q+azHQ9aIfU^y! zvB;B%oa6%g$EF9#B}~v?G{z1Y6o#xS|TlkJqw!aY)N%@x*ZfyJa)j z#+}lEoMhpe>c)3Nqa)J9GvMTm+YcRTx?Sk>ZW|Xbfo!f=2>tOpSOd|5?Qr^mEVkru z&ZX>MG;_LV-hObf;YB~n7j#-u`q)ZXl55kt*F0hA`^LMu*8L=U)qRZ@%Wv>eOTQ59 zInhEbTB9u!?F%>{IW+p14|aTwu;=S8U=D1jUvS0JzqJhgpd)1~b&;|X-8o%H*-x_6 zW-^_ug}#%%-xK1>U|$t>fIx=oXFiC?Uy*-!X~E(s)x%yWBljSgOXicD$eORa*IgpS zrVl*6w4u~V3d+Lzs5M?MqUgP5lqL;cmlHm1+1^;giU`7+Y&GOUdA!VCwN2Jdg;vSN zs!C;AnUg9@RUaHWBJAj)KkO?{lFyN+$Tv<+Tz^+sCgio@buD#mLQ!G~1p5FBT`z&; zi-`^e`qye`L*pm}XxHQeo<8#}xQFi`snj#JJ1XSc^;FC8DA%fOvdtlV8yEhixtu@- zpV~Q7aP)dM*Qb3p$C~2xN7)>Om}Ta;)+O1-xd}?L&2e=Ror06$O*%WSu|_QNPeWd3;E38Jpt^Y=B1O5hVz-NMwW$3`s$+(EIktm?pOgY41T!iZ!oB0uu?hBEtVgt2W^n>W2Xgiq-mMaeBN|~FqwRqai z%>%>%;x`fEZF4GCvprcHNs@TI7&>D2fRr0z^h8XF+sd1e?Z_khnj~D$YXP!P;Q%B2Ds z_%a^Ls0e@iw%fyE3&cd6CR9aZf$&ChtPWTa-iYEs9K#yO3Q+`vEwF~5SW;V56V-x% zNWT}ibADD-x3sAJ`$3Ni6DTBvNUaR7j|4qp!wu8$4g9>Kw*&6HU_g8x2=Q|it&e<* z4q8wUM|KQCrw}DUC91cmUgYzNxJNkbk@T*<90k_FVUG@U6EeW!WR4^FeMFQ!1UdTi zNO2lNq&Ns#NwE=k4VugHrSv#5t2tUtS+wPihQ|p#7>F?(;UBAqBl2jQNA)ENN*Pk# zOJ)%7x3}Itz5Vk&oM#f5#2(@larZfd1Z^U4EMz=l6qIJw0jd4PgJ%&CwoHJ$+p@sf z=K_6^lki@dbE3t@S#4@jQN&o`bck())(NwOM}(Jz*fkJe)KG++L=|rAMA4!JB3v!d zK~b(KUsNKZCwXrMh~GjyC*S@9`;^<;rXmlBpDUwKAPR=SyuOc7&uPwK)0`vFxYsCX zhO-Q!%ue1i%Qd?*zGQGV&S~8F|hHd5c+nU)wVaO1(!h&>$*!oG#eD z-?%VpTrj+ufjl4@->3=p(}Tmn`QfCybgr`5Vdwxj2L2@3^;-OcdNFYGOE=k?`|JH*~yw`hTbyG5DtGAH2x)OgwAlBTp@z-=$A#;xNavH zS9l%V#LROq%-W%Lap)S?#d%u09~jrT9bHk!TJ`m=?NNC9`W;aC2;?S!K+AptH$Urg zKS8fiQ0QY(p#=)7GjQDWT5f2mn&E~P#tY`f3u3p#3u590)8hrv@q!3A35yqm#tTB? z1wnA)8!zyT7r4a>8b68`*u)DM@q*ux+g5bvyx{VA!B6J}*;~#F($5Q$&I{(B7fgba z!1IFs=LO>Pf>w{t3u>PiaL)@MVkJZoWZ;$wF`fRrWj<#hW@!-{anKYlGJ95Jfh_Nr zY`0`sAg2bXZVluPvBW0ae#OnBtO$F;mAF?1Ey@!WZelPR?2YcnfVi(#5G9xmZQ(f! zS(O$IUdLbrnX&UITd3m{Wk(<{!jBk3fW9ZOmQWLiiF^oxbpni;?w3GkKtXR{3&GdS z#DIc1vbajLW^ejN=nRpv_|J>19~aqxmJ$M^C*;t_R$x2M#!O~&_c^DuXp^(hU3i6I z`Fj!TSrHFxIckg$K#%ggh%KzURCrHVXv;@`giEVT0}h-vQ_o-scT9m0xt-DMGkNb+ zDcTddH$BQ8Jj)di<`z*DHM0lt;8{iR+{r}V8sc%$S!DSH3XEXVk(;4u;Un@AG-UlV z2pCEgpEO5f%1Q;qZ*N;Xp_=VnVYT9pq=l+Qg!KuBj*PZeGk2VN^X$dLV&_pqScrmt zt2U0trat`!xj!y~K)ZFe+%H-DxQI80w@k^d3p*5O!mBrE&8x>n5X!STpguvpl))%} zTm&%?>mS^R)|`Qm!}_AR&^f{D0#M;i*#xNP4fmjx-^uHv^^g}oE-Gy_1$CZ*GC_^e zujk{UruRz+|aeSwsWub4cqScYe zw!t3s^M$MR(QQ%?q%U&C5%bvLZ&A0Xs}KTKUnHJ_@|MUMjF%8rTL^(vf7yeMEo3n2 zPJy4lhZu8H&}7|x2IGKIP}}-6Vs3d@d{Zgt@VKbU{gRrDsRCO=IhyK!sOnJ3|1@0EXKlMJTN?pAH$#TKMG7vBEIp(Q9>h)zrqi8@I3x555O?Ox*+I6V9+*< zmk{m=&Y+8_IGo`>#%Q$RQ~|+vE1t$w;7=;vo#Q;b7)kxTdv}w1`*ip3-F=X+;oget z_;SDA1NwS;_;!Ey%=?skz%@)2J}`xUeSD06fBmH4j@gjJ0?YxJ3lIk|4`4n3E`fM} zg#e2H76U8+SPGy7NB~F#NCHR(SO$;+upD3oz)FBs0ILDM2Ur8J7GNEK3Lq6A4ImvL z17JNsCcp-OjR2bfHUn${*b49iz&3#G0BV3NfdA{K{e*|zTj}=n9uke*L>Vi z@iToOt}-MaZSNoJ2k>Z$@vpcAL;#!ucx;K#4gBeMhXBaJ zU$O7rzX!e>KeLo)C<)vH;!?p!DLhvX5UB?*JZ`vT{QtNY8~HL>$RG6v$1c4Q3BPoM zFOEV}&^Q!^#=N@|_f!=GygP^2Rh*B4E_5e!tIgrOA%KCRKT>>qGXOxL;y0UjdCU#m z8^8a~dhdRldFl;vgnV59d>=lbU@KDkUHG~`fHMHhI#CE*u!RDg4tYr6+H|%p2SW(c zk&R(Gn|>C4SG0h8Fi!YA^mQmY<8@5O*Q6;Pkij%XK|#|r#q*}Kqs%dcFyna`{#`V! zg-V2JqM#1rdW`wBmVd*7vcM3+T+7FB!-D3=-{lj2FMZJO!u+htx<|kFV>sgL^gZu? z8|McBGzB2wrnOKWBcUtHgcSau4yQ4Pa?_afv(TFv-&47M()Zx&pGzCYHPcO#(A1Q(NOrEf#}6RgeRo<`FNg~J`T5Te*)p-E`Zl8 zNc%wwe~|CT4g~yWnYjS;GvfJvIba%T+W(9{aIf*8?|Z+DOoczV{S1K0gxillq!=$- zjt^@n*M~*p{WbZ6+m9FEh1*Xcq?kX0xL&Miz;6&Y5WvfbCy?^V?Fa5P9yFb%${*Wz z{Apn1PaWV-9V6Xen?JmF{Bbn$hX?$r1H5qr;2H6(uKbCA$Dc$af0h7$mKf>&+WY}4 zhKlyH*2te2;Lj4^&02sMBc9cjKi8mB!~NSWNDcj49>@oI#&P#+^XDueh5NTcNDckl zS&$F%KsG1@IBUf7bNBAIzU9XdrPgFT^q|oT7!yX=bze)68hRzh?W10lY#10X%Pw zhZMJ;7=EbPTEH)c9}f^}#1qQA+R1O2KX`tM+YdcIUC2y>_G23JQ`~;={1mqzdVb1d zCqes3gSL|mP`&4;>wtDVKWzm-&rcoMVxZnM=BEn*KRiFhb%&mxW-|M+7Xp5nOc#La zJwL_m2hV?S`=RGQ3z>CTmTc3Q|KRq6=Rdgp(DNT2o5ykl{CI3ffWJ5Y`M1b#^MOBD zezO6f<+p`QHk)9ZhWus;cwzYs^M{t-EZJqiA2!>PZ4FSp<+n+&_Kn9MEFaM0Pn3BY zb2i^J#vd#n;PD5`2lV(8!%u=W>@;Q!KO5lhjX(bu`3>_2_iva#bpIA*UWYZCZyNm@ z<`3@QFn{R&Er!oytp)sI_>KU7uYdbD@dwX;Fn{RvgDCSnXg{Vg|H1sh^B>F~dj1o` zKMU+a)AC!CxtJZtHx2nM7VyII8|Du!zs2%h*lPj5 zSbjeM7vnldb)5g;{td5>;`T$Yk4Bj94f>e@z|SdK#J;0@-_OaKFarh%k8jc+Ra znE-fU{>+Eez@PbiSWo0%K#~?qYM6dD)^IYxs3T3@XNJS11zi7d*PTr*MV-#A04Fd2mHwc{+PyE z1Lltwkiz_V1SxJmxt3bsPag2*5rDSZ^QR^>cFdppkQ(??hjr1?G}h`cfB1kG=1((7 z4gBG=9s_>4mdyb8e@j;ZUS&K?S$@OqhXiCXfBYad@W%)EV;Z`Qm_OYCFU+3+NDchy z4*c-}-UI-2ulD>|_>MmbM*b`T{(PCWAY&zl%=`72Uf;p|QM}{N_eTCGfImxsH{Sy& z{uX~gmM|XgfA@3s&2fFk$Di48(C>wB8FeV|{qJ9=^Y72SaGuuHt_}1%!V4}zDuNV0 zU*EDdCl`Qz_G`*-*yf=D;AIE+b%GSPA3MuV9Ll0K$Ih|=Kqn)f@UyWTFpV_+FojaQ zpZ{DQ;CH=$(C@<6>3Vbq@WXiGc247Y2Jm|f<#+~g#CiHTxb35OHivh722_G7^B zjO8(aOe3Dvl|Pth%pa`3VBilM_+uJ-_Lx5<@A_d|BY#SuA7%q@YynEDbw7;T&$sXR z<7MQJ82Dovds>)3BESo`p8-bxh@kz5fj0vHMAf?e;Bm6>9e+yR@u$9J5%8zTNcY$5 z-|#qj3-H3@BzD6Ae~_oxltmHS&hi!jWyJHp^>6eTgU8Iz9b-OqoWywIdPL)S2Jm|f z<#+~g#CaNr|AuGfaq|6d)6ZA+IElx4Y&UBT_@9E*1rVGLAAtm}O=q}pFr0!shUp9% z5BS|U-s66kzK+Yd1)M`sRM_}_O`7CTc|!ovjet}g(0_+4lAG1xZscJI;mFM})Zx;& z!|z7iKZhph;*AIWuBzq}{oaq^h_BQ4y#H;Sr{&_+z~d=!Ar(>|AQ02I7I?arO&Zrb zzGiz*0KEDFQd=PnffN$R_hqgHo9zThah|5}{c^xG(${hQt6b;)P5gNR#C!++9{4zK*L5zUqK2aLB5EQ$$rF0Wfw43 z1EfGc8Lp+U%i#PKTz>_>moe~tG(W2&pZh{#(0r!b;Q$Mg`MG@lCwSKe_#^@Ra623Z zDcuf-S@Z?`LYNXralSh9=M5Ar<_{D0zi9qYJd#QA{-~Fq(hmPA{uINDF@I_Rel&k- znD+(zLYT$8zD%6|6#mfn{1bTgf_hX2FUEae{ z3kJ(dDFE?Z)vApZjJe#Op!bR(Q^gzFjbJHC&`@4wOTZ8tML; zeLx1_h3nWsNa;G3!A$}Drn3)1iu2W(KkK1U;657bWYc~0MqU~xj&B-$G}g(+eKghs zq5J4qeliDaPB^jr?EuxgkH-AD{*FI7NO2#%k(USj$uo{kU$gyS{%GIv=MkjPlu#^R z3;f9g-aG=(8u5gmtKAriUFtpglm0ClecBk>9G-uF-{{{mj~76_Yy*8}ZAc>_#r4vb z7tXciiHvJaU$b6v057~AW)G<=q_|#kc&>n79j-m3INuDe{gv#{{9no+EPLC5pjrwQ zswtl50UZmO4vb=!gK^IBHTm-t@T!UDO~4otq?kWXSv48vYzM|umI$Dx5zp$_Z(yB1 zJpWDw!rxy9+sHJH`F8@~cL(s>3TgQ}{%mEIGZFy5t;{EI)`~NXNz}OENUK_=JG4UK0$N}GE)4?Amh7j;ehT(trnTy{` zAO93h^n2l3#yJ9zW?W~(*Xet38PoeYI8X2Wjf8T*{u3fV=A->51e&EW!@#PJeim*q zz6WkIeha^cz6W2Y-;Z(l6yL1x^Bo>Bz6)Qcb%*ybMdhqk#7<;4JhmH=2t`%lspfJJ-kSHKba>%a2DPmdFv_r{OEGge_= zC774DAjQuIn&rV*Wg7NFn3vdB3Fam3t0a_n7RIVP7^eyWs<*F_7QkHWt7IC;ShTN_ zXs(#unqwMzojCRb_El05mkv_+gM2@T{~%^Naa;iYp07D*zQ%*D=U9gMTzLrBXMFrq z_776%3$ZV=$xuIOUuJ=3Z1yCcY3N0V0bbab8E!wcFS9US8T5s0b{NkZ;P3e|`?v7t zA+#I3zNLqh)-NgKlFUM`X{>Mk26$opl9!Ou`Xw*9eF47^=5LVVJYD~xseN>wK;Hvw zuJSoUFK9pcfFIT`DTS2QFDc}{Via>ep0i%#xz$kz;AI|gPdI9{7@1ybi zZ!|QA@BAD0AeurSfcKVLK}zo}JDL@-9nDN*Z@C`eh3DmMA*J`0>zSnhe$&})A;tOX z&L6xthIP!|=MU(Z8R>?i`RIK7-&!xRZXK?d@6(NGrg)}NFN*;`TraV19bGSrc`1P3 zbaoB%6gJLR=X%M7N;eVu)A#o-&CT%MWw>!qusYUDyl0EsBc^*C3+xQ&8}Xh2Jc0ZJz_);115$H1H;3yr z;CFlfS7Fz4FCVEt4Bax!*L7dLH(uU7DS_IX0Z$tiCX}8Rm3fT)EKvb0dWfe zzZeF@Er2}TcA$QK(01tSxJ^}VN4PH22YnxW!sO<{m_OK;6Xp-?%PAUl1^$?bFDJmO z!j}`IMqf@0@Z|*f#W28^6Xfagg)*;}{E33Tv7-Gziu*liKYVCE#(wc@jk|3Cml)tn zDBy+1r+7$V=!I*cd}u#>Xg>g^vWKLa4e?FYsj_FBLX#vg#c z=L6y2(!U9yZsPTb+K|%gFt*G@wk`A1)?w(ni)EzG-3Ndo|KOnCg|E|k5nR9v%h?W) z((4giW(wdpo$UZA&eP9v0EhSIKJ;~r+xz*d#Yb~I|!@P8Y6uKiA+gkIMqSnT>qp!_NyoQH)=?*C#ZxbOG4frL(>K@L230}fy z(bwQlKVV1>(2e&!Iq&8ZB$H`QGIts2{#yKL3uWQ~c;P*Y;gI6BJ1$%!VXe-C`G(gA zEbM&&hC?1-`xHLW_rNQwTt1-jO?!v$en<`YrU8!o0oT2N^Io0@7dheI zI>ugx_Kxe-4M^#Fb&bI^zs4|)dUYD`!u6^EQo3GUgZ1Cjj5oYX;O*dMg%^Z3Jbdj_ z_(b0Wulz^q6~-6WD~vB)udXrDz*ED1z;!R+yq9+x^7tB!OLeSQ*oN`?yLzRA6uJd; zjgbfab)J##uhn1m0$k1ke=Y!C*dFN~q<9EE2l(YO@_CmT_jq{#w;_KAuH9x_f%6M+ z{Q~@cg@^B}&b-584d&fWkZoz+k<2_^HtP?%zb5ax0e+ZwLm;JjHw5q-#Js}uVO{`F zE*E$`Am0tH^9u|0S12(f2@G6ngIBK5MLE}EEBRAJOuqIvcQB_tFPJ@=A;XVe!-)qX^KpfHOpbv>51Y#s( zn9epl@!^}96>lzLFp%NP7$?I!={MrE2p;<1Fk=}piw8}MD02)UpizrqI@|Cq8W&at zPTv4dRsHR?{2LaO1qRr~7Re^{Tj)B$4i?256}OM{&=34JkUlA+|yMz1Z$hc%Sz102CEz3S*4#PwoD!+QsD0|C6=y`Sd8*QB=& z&|BvppqB^q)&W`_0eB`v?-HPQ$v;4E4A8p-Xk7~sV?y-iLI0Kau0N^D`g|7pt32qd z3IWcVOn+s|VY5eaAxw7_x8GshGT<+pJ&bD&P-Zgx1xse8CA;eR%VVDfDJ74|V;2Ja zHGjWU{|r$DAu`xBys%%T{c{W-v~=LTF?`U{f&Ba91eUi9=YNd9Uyj~1;BQ)$w_hGR z3HS?g4LcjabmR?3wivLgdU+$0*$*`4#OzF_3xMg!8=#rUvSe5N_{(GSSdQ>s9@`P% zugBjnB~LD7ve^W5&sE)iE!ky2FPm-2wgxbr{yEA#4WhnRefy2!gH{K;H--;d9gsJb z{wm764n*m$`uZHh=Rw5mIuI?}5#X=u^Ox$Mqs;Swzg0i}#_-PqfAfI1g#dp&{(hAb4x ztsJ4;bm%oi4zGH8KaBYOSM+|V{&_9m5Q)30>8%_=+jQtPM7FMadOwUvZ7THAk)o@b z-pUc4|BBu()nCz(m#doI$`O-Ihh9S@1aTFC7WCs_Cs9!S!SG8m@o-eq80qs~>wmy)XEs%9DBx!(ysB=W zvvNel59$8TeW5Q$uOU)lRnc1?_S2fOEIuo0psADv9nG(*$^u(aV4a-GQTR-SUOGBn zRnuEJs@=!vHC+GnK9jCnpA(JlW8bFxv@g}p=qPbjUDlPOyO|2Tbkwz~rnhpmw2#qi zxc>Qd>vN)R@ z9Bt}j^nU5~MMr`97(RyUpWfHdazW+jO{P-*bX29Prnho5BvYXmqJuJUl%lGpw{mnL zQ=ylR`cu{PR*u$VI`kT%=u|zuA4b116?*BYG*wM+goM3%7^LDYlyy4_4Ixi zHN$l1HAJYWdU`*MEb&+LeyMc`I^siB(_1-GgQ?Id$%{TSVb>!03-{PCSX_vZPr?|kY0g7&gm z)#dv!@0cH>`|p^on+d=1_vtEznIvFUTXM4C!j(B2!Xx-34&>!PWY1?>&7 zs>*_1v#RXH@MHASvLAGZfBW!9<4`1k4E07~C7^VAJ!rRHa3Oc_=v{Xp;GPWu-w8{0{Ii;Pq z@aq2QY}#osTwPDa)fP@R`o`>~5^>`(zpBh7SA%nZgS8W)9i*ZxTDmo6I@{+l*AHl5 z<)RP;sRg)+0{Hxp6058=uZu*R9F}|bJNJVm-B{@!vc%ja2txshVUXC|hmEkMR+INZJ4&b$2hfZP{$^pH*re zpBT6jZF+JiulQ;1nFq9P$k+Y;Z+Z=miY_E|;mPqz! zgsNa~PVVZArntncN+nJZ`*pb>-;*%}HQ`%EUzje#3kxY_{Nze30qC7iDTm?nY-6R! zzXoOQEXP{Lh%1K%VG}m?2AM8ihhnN21J%Q3w; fLJyH|q7OE({es1O4i#3#*wnAWOl$=WrXzm^$C@OA diff --git a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo deleted file mode 100644 index 584e104..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo +++ /dev/null @@ -1,30 +0,0 @@ -## NOTE: Do not edit this file. -## - -vlib work -vcom -explicit -93 "../../../FIFO/src/fifo_ctrl_pkg.vhd" -vcom -explicit -93 "../../../misc/dpram_1w1r.vhd" -vcom -explicit -93 "../../../FIFO/src/gray_counter.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_async_ctrl.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_async.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_sync_ctrl.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_sync.vhd" -vcom -explicit -93 "../../../misc/utils_pkg.vhd" -vcom -explicit -93 "../../../misc/clockgen_virtex4.vhd" -vcom -explicit -93 "../src/sdram_config.vhd" -vcom -explicit -93 "../src/sdram_types.vhd" -vcom -explicit -93 "../src/sdram_cmd.vhd" -vcom -explicit -93 "../src/sdram_ctrl.vhd" -vcom -explicit -93 "../src/ddr_phy_virtex4.vhd" -vcom -explicit -93 "../src/sdram_ctrl_top.vhd" -vcom -explicit -93 "../src/sdram_ctrl_frontend64_wb.vhd" -vcom -explicit -93 "../src/mt46v16m16.vhd" -vcom -explicit -93 "../src/tb_sdram_ctrl_frontend64_wb.vhd" - -#restart -force -vsim -t 1ps -lib work tb_sdram_ctrl_frontend64_wb -do {tb_sdram_ctrl_frontend64_wb.wdo} -view wave -view structure -view signals -run 200us diff --git a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo deleted file mode 100644 index f576e65..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo +++ /dev/null @@ -1,55 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/clk_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/rst_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/cyc_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/stb_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/we_o -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend64_wb/sel_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/ack_i -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/mrdy_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/dat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/dat_o -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/dout_reg -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend64_wb/dout_cnt -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/clk_fb -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/clk_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/clk0_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/clk270_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/clk270var_o -add wave -noupdate -divider Part -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/part_cs_n -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/part_we_n -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/part_ras_n -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend64_wb/part_cas_n -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend64_wb/part_ba -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend64_wb/part_dm -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend64_wb/part_dqs -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/part_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/part_data -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_col_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/col_addr_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_row_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/row_addr_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_bank_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend64_wb/sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/bank_addr_reg -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend64_wb/sd_cmd -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {38990166 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {38975716 ps} {39081070 ps} diff --git a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo deleted file mode 100644 index 976aebf..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo +++ /dev/null @@ -1,30 +0,0 @@ -## NOTE: Do not edit this file. -## - -vlib work -vcom -explicit -93 "../../../FIFO/src/fifo_ctrl_pkg.vhd" -vcom -explicit -93 "../../../misc/dpram_1w1r.vhd" -vcom -explicit -93 "../../../FIFO/src/gray_counter.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_async_ctrl.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_async.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_sync_ctrl.vhd" -vcom -explicit -93 "../../../FIFO/src/fifo_sync.vhd" -vcom -explicit -93 "../../../misc/utils_pkg.vhd" -vcom -explicit -93 "../../../misc/clockgen_virtex4.vhd" -vcom -explicit -93 "../src/sdram_config.vhd" -vcom -explicit -93 "../src/sdram_types.vhd" -vcom -explicit -93 "../src/sdram_cmd.vhd" -vcom -explicit -93 "../src/sdram_ctrl.vhd" -vcom -explicit -93 "../src/ddr_phy_virtex4.vhd" -vcom -explicit -93 "../src/sdram_ctrl_top.vhd" -vcom -explicit -93 "../src/sdram_ctrl_frontend_wb.vhd" -vcom -explicit -93 "../src/mt46v16m16.vhd" -vcom -explicit -93 "../src/tb_sdram_ctrl_frontend_wb.vhd" - -#restart -force -vsim -t 1ps -lib work tb_sdram_ctrl_frontend_wb -do {tb_sdram_ctrl_frontend_wb.wdo} -view wave -view structure -view signals -run 200us diff --git a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo b/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo deleted file mode 100644 index 20af0f9..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo +++ /dev/null @@ -1,62 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/clk_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/rst_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/cyc_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/stb_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/we_o -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend_wb/sel_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/ack_i -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/mrdy_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/dat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/dat_o -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/dout_reg -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend_wb/dout_cnt -add wave -noupdate -divider DEBUG -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/cmd_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/cmd_fifo_dout -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/cmd_fifo_re -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/cmd_fifo_we -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/cmd_fifo_full -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/cmd_fifo_empty -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/clk_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/clk0_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/clk270_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/clk270var_o -add wave -noupdate -divider Part -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/clk0_o -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/part_cs_n -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/part_we_n -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/part_ras_n -add wave -noupdate -format Logic /tb_sdram_ctrl_frontend_wb/part_cas_n -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend_wb/part_ba -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend_wb/part_dm -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend_wb/part_dqs -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/part_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/part_data -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_col_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/col_addr_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_row_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/row_addr_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_bank_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_sdram_ctrl_frontend_wb/sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/bank_addr_reg -add wave -noupdate -format Literal /tb_sdram_ctrl_frontend_wb/sd_cmd -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {199582900 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {199427964 ps} {200030108 ps} diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd deleted file mode 100644 index 11021bc..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd +++ /dev/null @@ -1,367 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: DDR physical layer (Virtex-4 specific) --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -Library UNISIM; -use UNISIM.vcomponents.all; - -entity ddr_phy is - Port ( - sys_rst : in STD_LOGIC; - sys_clk0 : in STD_LOGIC; - sys_clk270 : in STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_rd : out user_tag_t; - u_tag_wr : out user_tag_t; - read_clk : in STD_LOGIC; - phy_ctrl : in phy_ctrl_t; - part_ctrl : in part_ctrl_t; - sdr_data_w : in unsigned(SDR_DATA_WIDTH-1 downto 0); - sdr_dm : in unsigned(SDR_DM_WIDTH-1 downto 0); - sdr_data_r : out unsigned(SDR_DATA_WIDTH-1 downto 0); - sdr_data_vld : out STD_LOGIC; - sdr_data_req_w : out STD_LOGIC; - part_clk_p : out STD_LOGIC; - part_clk_n : out STD_LOGIC; - part_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - part_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - part_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0); - part_ba : out unsigned(DDR_BANK_WIDTH-1 downto 0); - part_addr : out unsigned(DDR_ADDR_WIDTH-1 downto 0); - part_cs_n : out STD_LOGIC; - part_we_n : out STD_LOGIC; - part_cas_n : out STD_LOGIC; - part_ras_n : out STD_LOGIC; - part_cke : out STD_LOGIC - ); -end ddr_phy; - -architecture tech of ddr_phy is - - signal dqs_drive : std_logic; - signal drive : std_logic; - signal dqs : unsigned(DDR_DQS_WIDTH-1 downto 0); - signal dqs_zen : unsigned(DDR_DQS_WIDTH-1 downto 0); - signal dqs_rst : std_logic; - signal ddr_data_w : unsigned(DDR_DATA_WIDTH-1 downto 0); - signal data_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal data_reg_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal drive270 : unsigned(DDR_DATA_WIDTH-1 downto 0); - signal part_ctrl_reg : part_ctrl_t; - signal we_reg : std_logic; - signal read_en : std_logic; - - type u_tag_array_t is array (natural range 0 to 4) of user_tag_t; - signal u_tag_pipe : u_tag_array_t; - -begin - ------------------------------------------------------------------------------------------------------------------------------------------------- -utag_pipe: - process(sys_rst, sys_clk0) - begin - if rising_edge(sys_clk0) then - for i in u_tag_pipe'length-1 downto 1 loop - u_tag_pipe(i) <= u_tag_pipe(i-1); - end loop; - if phy_ctrl.utag_we = '1' then - u_tag_pipe(0) <= u_tag_in; - end if; - end if; - end process; - -WE_REGISTER: - process(sys_rst, sys_clk0) - begin - if sys_rst = '1' then - we_reg <= '0'; - elsif rising_edge(sys_clk0) then - we_reg <= phy_ctrl.we; - end if; - end process; - -DATA_DRIVE_GEN: - process(sys_clk0) - begin - if falling_edge(sys_clk0) then - dqs_rst <= not we_reg; - drive <= we_reg; - end if; - end process; - -DQS_DRIVE_GEN: - process(sys_clk0) - variable p : unsigned(1 downto 0); - begin - if rising_edge(sys_clk0) then - if phy_ctrl.drive_en = '1' then - p := (others => '1'); - else - p := p(p'left-1 downto 0) & '0'; - end if; - end if; - dqs_drive <= p(p'left); - end process; - ------------------------------------------------------------------------------------------------------------------------------------------------- --- SDRAM Clock -ODDR_clk_p : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => part_clk_p, -- 1-bit DDR output - C => sys_clk0, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => '1', -- 1-bit data input (positive edge) - D2 => '0', -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - -ODDR_clk_n : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => part_clk_n, -- 1-bit DDR output - C => sys_clk0, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => '0', -- 1-bit data input (positive edge) - D2 => '1', -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - ------------------------------------------------------------------------------------------------------------------------------------------------- --- Data OUT DDR-FFs -gen_ddr_data_out: - for n in 0 to DDR_DATA_WIDTH-1 generate - begin - ODDR_data : ODDR - generic map - ( - DDR_CLK_EDGE => "SAME_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => ddr_data_w(n), -- 1-bit DDR output - C => sys_clk270, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => sdr_data_w(n + DDR_DATA_WIDTH), -- 1-bit data input (positive edge) - D2 => sdr_data_w(n), -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - end generate gen_ddr_data_out; - --- Sample tristate on clock90 - process (sys_clk270) - begin - if rising_edge(sys_clk270) then - for n in 0 to DDR_DATA_WIDTH-1 loop - drive270(n) <= drive; - end loop; - end if; - end process; - --- Output mux -out_mux_data: - for n in 0 to DDR_DATA_WIDTH-1 generate - part_data(n) <= ddr_data_w(n) when drive270(n) = '1' else 'Z'; - end generate; - ------------------------------------------------------------------------------------------------------------------------------------------------- --- Data-mask OUT DDR-FFs -gen_ddr_dm_out: - for n in 0 to DDR_DM_WIDTH-1 generate - begin - ODDR_dm : ODDR - generic map - ( - DDR_CLK_EDGE => "SAME_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => part_dm(n), -- 1-bit DDR output - C => sys_clk270, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => sdr_dm(n + DDR_DM_WIDTH), -- 1-bit data input (positive edge) - D2 => sdr_dm(n), -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - end generate gen_ddr_dm_out; - ------------------------------------------------------------------------------------------------------------------------------------------------- --- DQS OUT DDR-FFs -gen_dqs_out: - for n in 0 to DDR_DQS_WIDTH-1 generate - begin - ODDR_dqs : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => dqs(n), -- 1-bit DDR output - C => sys_clk0, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D2 => '0', -- 1-bit data input (positive edge) - D1 => '1', -- 1-bit data input (negative edge) - R => dqs_rst, -- 1-bit reset input - S => '0' -- 1-bit set input - ); - end generate gen_dqs_out; - --- Tristate-Control fuer dqs - process (sys_clk0) is - variable zctrl : boolean; - begin - if rising_edge(sys_clk0) then - if dqs_drive = '1' then - zctrl := false; - else - zctrl := true; - end if; - if zctrl then - dqs_zen <= (others => '1'); - else - dqs_zen <= (others => '0'); - end if; - end if; - end process; - --- Tristate-Buffer fuer dqs -gen_out_mux_dqs: - for n in 0 to DDR_DQS_WIDTH-1 generate - part_dqs(n) <= 'Z' when dqs_zen(n)='1' else dqs(n); - end generate gen_out_mux_dqs; - ------------------------------------------------------------------------------------------------------------------------------------------------- - process (sys_rst, sys_clk0) is - begin - if sys_rst = '1' then - part_ctrl_reg.cmd <= COMMAND(SD_DESELECT); - part_ctrl_reg.ba <= (others=>'0'); - part_ctrl_reg.addr <= (others=>'0'); - part_ctrl_reg.cke <= '0'; - elsif rising_edge(sys_clk0) then - part_ctrl_reg <= part_ctrl; - end if; - end process; - - process (sys_clk0) is - begin - if falling_edge(sys_clk0) then - part_ras_n <= part_ctrl_reg.cmd.ras_n; - part_cas_n <= part_ctrl_reg.cmd.cas_n; - part_we_n <= part_ctrl_reg.cmd.we_n; - part_cs_n <= part_ctrl_reg.cmd.cs_n; - part_ba <= part_ctrl_reg.ba; - part_addr <= part_ctrl_reg.addr; - part_cke <= part_ctrl_reg.cke; - end if; - end process; - ------------------------------------------------------------------ --- READ DATA Processing ------------------------------------------------------------------ -gen_ddr_data_in: - for n in 0 to DDR_DATA_WIDTH-1 generate - begin - IDDR_data : IDDR - generic map - ( - DDR_CLK_EDGE => "SAME_EDGE", -- "OPPOSITE_EDGE", "SAME_EDGE" or "SAME_EDGE_PIPELINED" - INIT_Q1 => '0', -- Initial value of Q1: '0' or '1' - INIT_Q2 => '0', -- Initial value of Q2: '0' or '1' - SRTYPE => "SYNC" -- Set/Reset type: "SYNC" or "ASYNC" - ) - port map - ( - Q1 => data_r(n), -- 1-bit output for positive edge of clock - Q2 => data_r(n + DDR_DATA_WIDTH), -- 1-bit output for negative edge of clock - C => read_clk, -- 1-bit clock input - CE => read_en, -- 1-bit clock enable input - D => part_data(n), -- 1-bit DDR data input - R => '0', -- 1-bit reset - S => '0' -- 1-bit set - ); - end generate; - - -data_sample_stage: - process (sys_clk0) - begin - if falling_edge(sys_clk0) then - data_reg_r <= data_r; - end if; - end process; - -misc_flags_and_data_out: - process (sys_rst, sys_clk0) - variable p : unsigned(3 downto 0); - begin - if sys_rst = '1' then - p := (others => '0'); - read_en <= '0'; - sdr_data_vld <= '0'; - sdr_data_req_w <= '0'; - elsif rising_edge(sys_clk0) then - sdr_data_r <= data_reg_r; - if p(3) = '1' then - u_tag_rd <= u_tag_pipe(4); - end if; - if phy_ctrl.we = '1' then - u_tag_wr <= u_tag_pipe(0); - end if; - sdr_data_req_w <= phy_ctrl.we; - sdr_data_vld <= p(3); - read_en <= p(1); - if phy_ctrl.re = '1' then - p := p(p'left-1 downto 0) & '1'; - else - p := p(p'left-1 downto 0) & '0'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -end tech; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd deleted file mode 100644 index 356bb28..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd +++ /dev/null @@ -1,1320 +0,0 @@ ------------------------------------------------------------------------------------------ --- --- File Name: MT46V16M16.VHD --- Version: 2.1 --- Date: January 14th, 2002 --- Model: Behavioral --- Simulator: NCDesktop - http://www.cadence.com --- ModelSim PE - http://www.model.com --- --- Dependencies: None --- --- Author: Son P. Huynh --- Email: sphuynh@micron.com --- Phone: (208) 368-3825 --- Company: Micron Technology, Inc. --- Part Number: MT46V16M16 (4 Mb x 16 x 4 Banks) --- --- Description: Micron 256 Mb SDRAM DDR (Double Data Rate) --- --- Limitation: Doesn't model internal refresh counter --- --- Note: --- --- Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY --- WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY --- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR --- A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. --- --- Copyright (c) 1998 Micron Semiconductor Products, Inc. --- All rights researved --- --- Rev Author Date Changes --- --- ---------------------------- ---------- ------------------------------------- --- 2.1 Son P. Huynh 01/14/2002 - Fix Burst_counter --- Micron Technology, Inc. --- --- 2.0 Son P. Huynh 11/08/2001 - Second release --- Micron Technology, Inc. - Rewrote and remove SHARED VARIABLE --- ------------------------------------------------------------------------------------------ - -LIBRARY IEEE; - USE IEEE.STD_LOGIC_1164.ALL; - USE IEEE.STD_LOGIC_UNSIGNED.ALL; - USE IEEE.STD_LOGIC_ARITH.ALL; - -ENTITY MT46V16M16 IS - GENERIC ( -- Timing for -75Z CL2 - tCK : TIME := 7.500 ns; - tCH : TIME := 3.375 ns; -- 0.45*tCK - tCL : TIME := 3.375 ns; -- 0.45*tCK - tDH : TIME := 0.500 ns; - tDS : TIME := 0.500 ns; - tIH : TIME := 0.900 ns; - tIS : TIME := 0.900 ns; - tMRD : TIME := 15.000 ns; - tRAS : TIME := 40.000 ns; - tRAP : TIME := 20.000 ns; - tRC : TIME := 65.000 ns; - tRFC : TIME := 75.000 ns; - tRCD : TIME := 20.000 ns; - tRP : TIME := 20.000 ns; - tRRD : TIME := 15.000 ns; - tWR : TIME := 15.000 ns; - addr_bits : INTEGER := 13; - data_bits : INTEGER := 16; - cols_bits : INTEGER := 9 - ); - PORT ( - Dq : INOUT STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0) := (OTHERS => 'Z'); - Dqs : INOUT STD_LOGIC_VECTOR (1 DOWNTO 0) := "ZZ"; - Addr : IN STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - Ba : IN STD_LOGIC_VECTOR (1 DOWNTO 0); - Clk : IN STD_LOGIC; - Clk_n : IN STD_LOGIC; - Cke : IN STD_LOGIC; - Cs_n : IN STD_LOGIC; - Ras_n : IN STD_LOGIC; - Cas_n : IN STD_LOGIC; - We_n : IN STD_LOGIC; - Dm : IN STD_LOGIC_VECTOR (1 DOWNTO 0) - ); -END MT46V16M16; - -ARCHITECTURE behave OF MT46V16M16 IS - -- Array for Read pipeline - TYPE Array_Read_cmnd IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Read_bank IS ARRAY (8 DOWNTO 0) OF STD_LOGIC_VECTOR (1 DOWNTO 0); - TYPE Array_Read_cols IS ARRAY (8 DOWNTO 0) OF STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - - -- Array for Write pipeline - TYPE Array_Write_cmnd IS ARRAY (2 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Write_bank IS ARRAY (2 DOWNTO 0) OF STD_LOGIC_VECTOR (1 DOWNTO 0); - TYPE Array_Write_cols IS ARRAY (2 DOWNTO 0) OF STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - - -- Array for Auto Precharge - TYPE Array_Read_precharge IS ARRAY (3 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Write_precharge IS ARRAY (3 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Count_precharge IS ARRAY (3 DOWNTO 0) OF INTEGER; - - -- Array for Manual Precharge - TYPE Array_A10_precharge IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - TYPE Array_Bank_precharge IS ARRAY (8 DOWNTO 0) OF STD_LOGIC_VECTOR (1 DOWNTO 0); - TYPE Array_Cmnd_precharge IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - - -- Array for Burst Terminate - TYPE Array_Cmnd_bst IS ARRAY (8 DOWNTO 0) OF STD_LOGIC; - - -- Array for Memory Access - TYPE Array_ram_type IS ARRAY (2**cols_bits - 1 DOWNTO 0) OF STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0); - TYPE Array_ram_pntr IS ACCESS Array_ram_type; - TYPE Array_ram_stor IS ARRAY (2**addr_bits - 1 DOWNTO 0) OF Array_ram_pntr; - - -- Data pair - SIGNAL Dq_pair : STD_LOGIC_VECTOR (2 * data_bits - 1 DOWNTO 0); - SIGNAL Dm_pair : STD_LOGIC_VECTOR (3 DOWNTO 0); - - -- Mode Register - SIGNAL Mode_reg : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0) := (OTHERS => '0'); - - -- Command Decode Variables - SIGNAL Active_enable, Aref_enable, Burst_term, Ext_mode_enable : STD_LOGIC := '0'; - SIGNAL Mode_reg_enable, Prech_enable, Read_enable, Write_enable : STD_LOGIC := '0'; - - -- Burst Length Decode Variables - SIGNAL Burst_length_2, Burst_length_4, Burst_length_8, Burst_length_f : STD_LOGIC := '0'; - - -- Cas Latency Decode Variables - SIGNAL Cas_latency_15, Cas_latency_2, Cas_latency_25, Cas_latency_3, Cas_latency_4 : STD_LOGIC := '0'; - - -- Internal Control Signals - SIGNAL Cs_in, Ras_in, Cas_in, We_in : STD_LOGIC := '0'; - - -- System Clock - SIGNAL Sys_clk : STD_LOGIC := '0'; - - -- Dqs buffer - SIGNAL Dqs_out : STD_LOGIC_VECTOR (1 DOWNTO 0) := "ZZ"; - -BEGIN - -- Strip the strength - Cs_in <= To_X01 (Cs_n); - Ras_in <= To_X01 (Ras_n); - Cas_in <= To_X01 (Cas_n); - We_in <= To_X01 (We_n); - - -- Commands Decode - Active_enable <= NOT(Cs_in) AND NOT(Ras_in) AND Cas_in AND We_in; - Aref_enable <= NOT(Cs_in) AND NOT(Ras_in) AND NOT(Cas_in) AND We_in; - Burst_term <= NOT(Cs_in) AND Ras_in AND Cas_in AND NOT(We_in); - Ext_mode_enable <= NOT(Cs_in) AND NOT(Ras_in) AND NOT(Cas_in) AND NOT(We_in) AND Ba(0) AND NOT(Ba(1)); - Mode_reg_enable <= NOT(Cs_in) AND NOT(Ras_in) AND NOT(Cas_in) AND NOT(We_in) AND NOT(Ba(0)) AND NOT(Ba(1)); - Prech_enable <= NOT(Cs_in) AND NOT(Ras_in) AND Cas_in AND NOT(We_in); - Read_enable <= NOT(Cs_in) AND Ras_in AND NOT(Cas_in) AND We_in; - Write_enable <= NOT(Cs_in) AND Ras_in AND NOT(Cas_in) AND NOT(We_in); - - -- Burst Length Decode - Burst_length_2 <= NOT(Mode_reg(2)) AND NOT(Mode_reg(1)) AND Mode_reg(0); - Burst_length_4 <= NOT(Mode_reg(2)) AND Mode_reg(1) AND NOT(Mode_reg(0)); - Burst_length_8 <= NOT(Mode_reg(2)) AND Mode_reg(1) AND Mode_reg(0); - Burst_length_f <= (Mode_reg(2)) AND Mode_reg(1) AND Mode_reg(0); - - -- CAS Latency Decode - Cas_latency_15 <= Mode_reg(6) AND NOT(Mode_reg(5)) AND (Mode_reg(4)); - Cas_latency_2 <= NOT(Mode_reg(6)) AND Mode_reg(5) AND NOT(Mode_reg(4)); - Cas_latency_25 <= Mode_reg(6) AND Mode_reg(5) AND NOT(Mode_reg(4)); - Cas_latency_3 <= NOT(Mode_reg(6)) AND Mode_reg(5) AND Mode_reg(4); - Cas_latency_4 <= (Mode_reg(6)) AND NOT(Mode_reg(5)) AND NOT(Mode_reg(4)); - - -- Dqs buffer - Dqs <= Dqs_out; - - -- - -- System Clock - -- - int_clk : PROCESS (Clk, Clk_n) - VARIABLE ClkZ, CkeZ : STD_LOGIC := '0'; - begin - IF Clk = '1' AND Clk_n = '0' THEN - ClkZ := '1'; - CkeZ := Cke; - ELSIF Clk = '0' AND Clk_n = '1' THEN - ClkZ := '0'; - END IF; - Sys_clk <= CkeZ AND ClkZ; - END PROCESS; - - -- - -- Main Process - -- - state_register : PROCESS - -- Precharge Variables - VARIABLE Pc_b0, Pc_b1, Pc_b2, Pc_b3 : STD_LOGIC := '0'; - - -- Activate Variables - VARIABLE Act_b0, Act_b1, Act_b2, Act_b3 : STD_LOGIC := '1'; - - -- Data IO variables - VARIABLE Data_in_enable, Data_out_enable : STD_LOGIC := '0'; - - -- Internal address mux variables - VARIABLE Cols_brst : STD_LOGIC_VECTOR (2 DOWNTO 0); - VARIABLE Prev_bank : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"; - VARIABLE Bank_addr : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"; - VARIABLE Cols_addr : STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - VARIABLE Rows_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B0_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B1_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B2_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - VARIABLE B3_row_addr : STD_LOGIC_VECTOR (addr_bits - 1 DOWNTO 0); - - -- DLL Reset variables - VARIABLE DLL_enable : STD_LOGIC := '0'; - VARIABLE DLL_reset : STD_LOGIC := '0'; - VARIABLE DLL_done : STD_LOGIC := '0'; - VARIABLE DLL_count : INTEGER := 0; - - -- Timing Check - VARIABLE MRD_chk : TIME := 0 ns; - VARIABLE RFC_chk : TIME := 0 ns; - VARIABLE RRD_chk : TIME := 0 ns; - VARIABLE RAS_chk0, RAS_chk1, RAS_chk2, RAS_chk3 : TIME := 0 ns; - VARIABLE RAP_chk0, RAP_chk1, RAP_chk2, RAP_chk3 : TIME := 0 ns; - VARIABLE RC_chk0, RC_chk1, RC_chk2, RC_chk3 : TIME := 0 ns; - VARIABLE RCD_chk0, RCD_chk1, RCD_chk2, RCD_chk3 : TIME := 0 ns; - VARIABLE RP_chk0, RP_chk1, RP_chk2, RP_chk3 : TIME := 0 ns; - VARIABLE WR_chk0, WR_chk1, WR_chk2, WR_chk3 : TIME := 0 ns; - - -- Read pipeline variables - VARIABLE Read_cmnd : Array_Read_cmnd; - VARIABLE Read_bank : Array_Read_bank; - VARIABLE Read_cols : Array_Read_cols; - - -- Write pipeline variables - VARIABLE Write_cmnd : Array_Write_cmnd; - VARIABLE Write_bank : Array_Write_bank; - VARIABLE Write_cols : Array_Write_cols; - - -- Auto Precharge variables - VARIABLE Read_precharge : Array_Read_precharge := ('0' & '0' & '0' & '0'); - VARIABLE Write_precharge : Array_Write_precharge := ('0' & '0' & '0' & '0'); - VARIABLE Count_precharge : Array_Count_precharge := ( 0 & 0 & 0 & 0 ); - - -- Manual Precharge variables - VARIABLE A10_precharge : Array_A10_precharge; - VARIABLE Bank_precharge : Array_Bank_precharge; - VARIABLE Cmnd_precharge : Array_Cmnd_precharge; - - -- Burst Terminate variable - VARIABLE Cmnd_bst : Array_Cmnd_bst; - - -- Memory Banks - VARIABLE Bank0 : Array_ram_stor; - VARIABLE Bank1 : Array_ram_stor; - VARIABLE Bank2 : Array_ram_stor; - VARIABLE Bank3 : Array_ram_stor; - - -- Burst Counter - VARIABLE Burst_counter : STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0); - - -- Internal Dqs initialize - VARIABLE Dqs_int : STD_LOGIC := '0'; - - -- Data buffer for DM Mask - VARIABLE Data_buf : STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0) := (OTHERS => 'Z'); - - -- - -- Initialize empty rows - -- - PROCEDURE Init_mem (Bank : STD_LOGIC_VECTOR; Row_index : INTEGER) IS - VARIABLE i, j : INTEGER := 0; - BEGIN - IF Bank = "00" THEN - IF Bank0 (Row_index) = NULL THEN -- Check to see if row empty - Bank0 (Row_index) := NEW Array_ram_type; -- Open new row for access - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP -- Filled row with zeros - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank0 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - ELSIF Bank = "01" THEN - IF Bank1 (Row_index) = NULL THEN - Bank1 (Row_index) := NEW Array_ram_type; - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank1 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - ELSIF Bank = "10" THEN - IF Bank2 (Row_index) = NULL THEN - Bank2 (Row_index) := NEW Array_ram_type; - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank2 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - ELSIF Bank = "11" THEN - IF Bank3 (Row_index) = NULL THEN - Bank3 (Row_index) := NEW Array_ram_type; - FOR i IN (2**cols_bits - 1) DOWNTO 0 LOOP - FOR j IN (data_bits - 1) DOWNTO 0 LOOP - Bank3 (Row_index) (i) (j) := '0'; - END LOOP; - END LOOP; - END IF; - END IF; - END; - - -- - -- Burst Counter - -- - PROCEDURE Burst_decode IS - VARIABLE Cols_temp : STD_LOGIC_VECTOR (cols_bits - 1 DOWNTO 0) := (OTHERS => '0'); - BEGIN - -- Advance burst counter - Burst_counter := Burst_counter + 1; - - -- Burst Type - IF Mode_reg (3) = '0' THEN - Cols_temp := Cols_addr + 1; - ELSIF Mode_reg (3) = '1' THEN - Cols_temp (2) := Burst_counter (2) XOR Cols_brst (2); - Cols_temp (1) := Burst_counter (1) XOR Cols_brst (1); - Cols_temp (0) := Burst_counter (0) XOR Cols_brst (0); - END IF; - - -- Burst Length - IF Burst_length_2 = '1' THEN - Cols_addr (0) := Cols_temp (0); - ELSIF Burst_length_4 = '1' THEN - Cols_addr (1 DOWNTO 0) := Cols_temp (1 DOWNTO 0); - ELSIF Burst_length_8 = '1' THEN - Cols_addr (2 DOWNTO 0) := Cols_temp (2 DOWNTO 0); - ELSE - Cols_addr := Cols_temp; - END IF; - - -- Data counter - IF Burst_length_2 = '1' THEN - IF Burst_counter >= 2 THEN - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - ELSIF Data_out_enable = '1' THEN - Data_out_enable := '0'; - END IF; - END IF; - ELSIF Burst_length_4 = '1' THEN - IF Burst_counter >= 4 THEN - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - ELSIF Data_out_enable = '1' THEN - Data_out_enable := '0'; - END IF; - END IF; - ELSIF Burst_length_8 = '1' THEN - IF Burst_counter >= 8 THEN - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - ELSIF Data_out_enable = '1' THEN - Data_out_enable := '0'; - END IF; - END IF; - END IF; - END; - - BEGIN - WAIT ON Sys_clk; - - -- - -- Manual Precharge Pipeline - -- - IF ((Sys_clk'EVENT AND Sys_clk = '0') OR (Sys_clk'EVENT AND Sys_clk = '1')) THEN - -- A10 Precharge Pipeline - A10_precharge(0) := A10_precharge(1); - A10_precharge(1) := A10_precharge(2); - A10_precharge(2) := A10_precharge(3); - A10_precharge(3) := A10_precharge(4); - A10_precharge(4) := A10_precharge(5); - A10_precharge(5) := A10_precharge(6); - A10_precharge(6) := A10_precharge(7); - A10_precharge(7) := A10_precharge(8); - A10_precharge(8) := '0'; - - -- Bank Precharge Pipeline - Bank_precharge(0) := Bank_precharge(1); - Bank_precharge(1) := Bank_precharge(2); - Bank_precharge(2) := Bank_precharge(3); - Bank_precharge(3) := Bank_precharge(4); - Bank_precharge(4) := Bank_precharge(5); - Bank_precharge(5) := Bank_precharge(6); - Bank_precharge(6) := Bank_precharge(7); - Bank_precharge(7) := Bank_precharge(8); - Bank_precharge(8) := "00"; - - -- Command Precharge Pipeline - Cmnd_precharge(0) := Cmnd_precharge(1); - Cmnd_precharge(1) := Cmnd_precharge(2); - Cmnd_precharge(2) := Cmnd_precharge(3); - Cmnd_precharge(3) := Cmnd_precharge(4); - Cmnd_precharge(4) := Cmnd_precharge(5); - Cmnd_precharge(5) := Cmnd_precharge(6); - Cmnd_precharge(6) := Cmnd_precharge(7); - Cmnd_precharge(7) := Cmnd_precharge(8); - Cmnd_precharge(8) := '0'; - - -- Terminate Read if same bank or all banks - IF ((Cmnd_precharge (0) = '1') AND - (Bank_precharge (0) = Bank_addr OR A10_precharge (0) = '1') AND - (Data_out_enable = '1')) THEN - Data_out_enable := '0'; - END IF; - END IF; - - -- - -- Burst Terminate Pipeline - -- - IF ((Sys_clk'EVENT AND Sys_clk = '0') OR (Sys_clk'EVENT AND Sys_clk = '1')) THEN - -- Burst Terminate pipeline - Cmnd_bst (0) := Cmnd_bst (1); - Cmnd_bst (1) := Cmnd_bst (2); - Cmnd_bst (2) := Cmnd_bst (3); - Cmnd_bst (3) := Cmnd_bst (4); - Cmnd_bst (4) := Cmnd_bst (5); - Cmnd_bst (5) := Cmnd_bst (6); - Cmnd_bst (6) := Cmnd_bst (7); - Cmnd_bst (7) := Cmnd_bst (8); - Cmnd_bst (8) := '0'; - - -- Terminate current Read - IF ((Cmnd_bst (0) = '1') AND (Data_out_enable = '1')) THEN - Data_out_enable := '0'; - END IF; - END IF; - - -- - -- Dq and Dqs Drivers - -- - IF ((Sys_clk'EVENT AND Sys_clk = '0') OR (Sys_clk'EVENT AND Sys_clk = '1')) THEN - -- Read Command Pipeline - Read_cmnd (0) := Read_cmnd (1); - Read_cmnd (1) := Read_cmnd (2); - Read_cmnd (2) := Read_cmnd (3); - Read_cmnd (3) := Read_cmnd (4); - Read_cmnd (4) := Read_cmnd (5); - Read_cmnd (5) := Read_cmnd (6); - Read_cmnd (6) := Read_cmnd (7); - Read_cmnd (7) := Read_cmnd (8); - Read_cmnd (8) := '0'; - - -- Read Bank Pipeline - Read_bank (0) := Read_bank (1); - Read_bank (1) := Read_bank (2); - Read_bank (2) := Read_bank (3); - Read_bank (3) := Read_bank (4); - Read_bank (4) := Read_bank (5); - Read_bank (5) := Read_bank (6); - Read_bank (6) := Read_bank (7); - Read_bank (7) := Read_bank (8); - Read_bank (8) := "00"; - - -- Read Column Pipeline - Read_cols (0) := Read_cols (1); - Read_cols (1) := Read_cols (2); - Read_cols (2) := Read_cols (3); - Read_cols (3) := Read_cols (4); - Read_cols (4) := Read_cols (5); - Read_cols (5) := Read_cols (6); - Read_cols (6) := Read_cols (7); - Read_cols (7) := Read_cols (8); - Read_cols (8) := (OTHERS => '0'); - - -- Initialize Read command - IF Read_cmnd (0) = '1' THEN - Data_out_enable := '1'; - Bank_addr := Read_bank (0); - Cols_addr := Read_cols (0); - Cols_brst := Cols_addr (2 DOWNTO 0); - Burst_counter := (OTHERS => '0'); - - -- Row address mux - CASE Bank_addr IS - WHEN "00" => Rows_addr := B0_row_addr; - WHEN "01" => Rows_addr := B1_row_addr; - WHEN "10" => Rows_addr := B2_row_addr; - WHEN OTHERS => Rows_addr := B3_row_addr; - END CASE; - END IF; - - -- Toggle Dqs during Read command - IF Data_out_enable = '1' THEN - Dqs_int := '0'; - IF Dqs_out = "00" THEN - Dqs_out <= "11"; - ELSIF Dqs_out = "11" THEN - Dqs_out <= "00"; - ELSE - Dqs_out <= "00"; - END IF; - ELSIF Data_out_enable = '0' AND Dqs_int = '0' THEN - Dqs_out <= "ZZ"; - END IF; - - -- Initialize Dqs for Read command - IF Read_cmnd (2) = '1' THEN - IF Data_out_enable = '0' THEN - Dqs_int := '1'; - Dqs_out <= "00"; - END IF; - END IF; - - -- Read Latch - IF Data_out_enable = '1' THEN - -- Initialize Memory - Init_mem (Bank_addr, CONV_INTEGER(Rows_addr)); - - -- Output Data - CASE Bank_addr IS - WHEN "00" => Dq <= Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "01" => Dq <= Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "10" => Dq <= Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN OTHERS => Dq <= Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - END CASE; - - -- Increase Burst Counter - Burst_decode; - ELSE - Dq <= (OTHERS => 'Z'); - END IF; - END IF; - - -- - -- Write FIFO and DM Mask Logic - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - -- Write command pipeline - Write_cmnd (0) := Write_cmnd (1); - Write_cmnd (1) := Write_cmnd (2); - Write_cmnd (2) := '0'; - - -- Write command pipeline - Write_bank (0) := Write_bank (1); - Write_bank (1) := Write_bank (2); - Write_bank (2) := "00"; - - -- Write column pipeline - Write_cols (0) := Write_cols (1); - Write_cols (1) := Write_cols (2); - Write_cols (2) := (OTHERS => '0'); - - -- Initialize Write command - IF Write_cmnd (0) = '1' THEN - Data_in_enable := '1'; - Bank_addr := Write_bank (0); - Cols_addr := Write_cols (0); - Cols_brst := Cols_addr (2 DOWNTO 0); - Burst_counter := (OTHERS => '0'); - - -- Row address mux - CASE Bank_addr IS - WHEN "00" => Rows_addr := B0_row_addr; - WHEN "01" => Rows_addr := B1_row_addr; - WHEN "10" => Rows_addr := B2_row_addr; - WHEN OTHERS => Rows_addr := B3_row_addr; - END CASE; - END IF; - - -- Write data - IF Data_in_enable = '1' THEN - -- Initialize memory - Init_mem (Bank_addr, CONV_INTEGER(Rows_addr)); - - -- Write first data - IF Dm_pair (1) = '0' OR Dm_pair (0) = '0' THEN - -- Data Buffer - CASE Bank_addr IS - WHEN "00" => Data_buf := Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "01" => Data_buf := Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "10" => Data_buf := Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN OTHERS => Data_buf := Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - END CASE; - - -- Perform DM Mask - IF Dm_pair (0) = '0' THEN - Data_buf ( 7 DOWNTO 0) := Dq_pair ( 7 DOWNTO 0); - END IF; - IF Dm_pair (1) = '0' THEN - Data_buf (15 DOWNTO 8) := Dq_pair (15 DOWNTO 8); - END IF; - - -- Write Data - CASE Bank_addr IS - WHEN "00" => Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "01" => Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "10" => Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN OTHERS => Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - END CASE; - END IF; - - -- Increase Burst Counter - Burst_decode; - - -- Write second data - IF Dm_pair (3) = '0' OR Dm_pair (2) = '0' THEN - -- Data Buffer - CASE Bank_addr IS - WHEN "00" => Data_buf := Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "01" => Data_buf := Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN "10" => Data_buf := Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - WHEN OTHERS => Data_buf := Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)); - END CASE; - - -- Perform DM Mask - IF Dm_pair (2) = '0' THEN - Data_buf ( 7 DOWNTO 0) := Dq_pair (23 DOWNTO 16); - END IF; - IF Dm_pair (3) = '0' THEN - Data_buf (15 DOWNTO 8) := Dq_pair (31 DOWNTO 24); - END IF; - - -- Write Data - CASE Bank_addr IS - WHEN "00" => Bank0 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "01" => Bank1 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN "10" => Bank2 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - WHEN OTHERS => Bank3 (CONV_INTEGER(Rows_addr)) (CONV_INTEGER(Cols_addr)) := Data_buf; - END CASE; - END IF; - - -- Increase Burst Counter - Burst_decode; - - -- tWR start and tWTR check - IF Dm_pair (3 DOWNTO 2) = "00" OR Dm_pair (1 DOWNTO 0) = "00" THEN - CASE Bank_addr IS - WHEN "00" => WR_chk0 := NOW; - WHEN "01" => WR_chk1 := NOW; - WHEN "10" => WR_chk2 := NOW; - WHEN OTHERS => WR_chk3 := NOW; - END CASE; - - -- tWTR check - ASSERT (Read_enable = '0') - REPORT "tWTR violation during Read" - SEVERITY WARNING; - END IF; - END IF; - END IF; - - -- - -- Auto Precharge Calculation - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - -- Precharge counter - IF Read_precharge (0) = '1' OR Write_precharge (0) = '1' THEN - Count_precharge (0) := Count_precharge (0) + 1; - END IF; - IF Read_precharge (1) = '1' OR Write_precharge (1) = '1' THEN - Count_precharge (1) := Count_precharge (1) + 1; - END IF; - IF Read_precharge (2) = '1' OR Write_precharge (2) = '1' THEN - Count_precharge (2) := Count_precharge (2) + 1; - END IF; - IF Read_precharge (3) = '1' OR Write_precharge (3) = '1' THEN - Count_precharge (3) := Count_precharge (3) + 1; - END IF; - - -- Read with AutoPrecharge Calculation - -- The device start internal precharge when: - -- 1. Meet tRAS requirement - -- 2. BL/2 cycles after command - IF ((Read_precharge(0) = '1') AND (NOW - RAS_chk0 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(0) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(0) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(0) >= 4)) THEN - Pc_b0 := '1'; - Act_b0 := '0'; - RP_chk0 := NOW; - Read_precharge(0) := '0'; - END IF; - END IF; - IF ((Read_precharge(1) = '1') AND (NOW - RAS_chk1 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(1) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(1) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(1) >= 4)) THEN - Pc_b1 := '1'; - Act_b1 := '0'; - RP_chk1 := NOW; - Read_precharge(1) := '0'; - END IF; - END IF; - IF ((Read_precharge(2) = '1') AND (NOW - RAS_chk2 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(2) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(2) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(2) >= 4)) THEN - Pc_b2 := '1'; - Act_b2 := '0'; - RP_chk2 := NOW; - Read_precharge(2) := '0'; - END IF; - END IF; - IF ((Read_precharge(3) = '1') AND (NOW - RAS_chk3 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge(3) >= 1) OR - (Burst_length_4 = '1' AND Count_precharge(3) >= 2) OR - (Burst_length_8 = '1' AND Count_precharge(3) >= 4)) THEN - Pc_b3 := '1'; - Act_b3 := '0'; - RP_chk3 := NOW; - Read_precharge(3) := '0'; - END IF; - END IF; - - -- Write with AutoPrecharge Calculation - -- The device start internal precharge when: - -- 1. Meet tRAS requirement - -- 2. Two clock after last burst - -- Since tWR is time base, the model will compensate tRP - IF ((Write_precharge(0) = '1') AND (NOW - RAS_chk0 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (0) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (0) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (0) >= 7)) THEN - Pc_b0 := '1'; - Act_b0 := '0'; - RP_chk0 := NOW - ((2 * tCK) - tWR); - Write_precharge(0) := '0'; - END IF; - END IF; - IF ((Write_precharge(1) = '1') AND (NOW - RAS_chk1 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (1) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (1) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (1) >= 7)) THEN - Pc_b1 := '1'; - Act_b1 := '0'; - RP_chk1 := NOW - ((2 * tCK) - tWR); - Write_precharge(1) := '0'; - END IF; - END IF; - IF ((Write_precharge(2) = '1') AND (NOW - RAS_chk2 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (2) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (2) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (2) >= 7)) THEN - Pc_b2 := '1'; - Act_b2 := '0'; - RP_chk2 := NOW - ((2 * tCK) - tWR); - Write_precharge(2) := '0'; - END IF; - END IF; - IF ((Write_precharge(3) = '1') AND (NOW - RAS_chk3 >= tRAS)) THEN - IF ((Burst_length_2 = '1' AND Count_precharge (3) >= 4) OR - (Burst_length_4 = '1' AND Count_precharge (3) >= 5) OR - (Burst_length_8 = '1' AND Count_precharge (3) >= 7)) THEN - Pc_b3 := '1'; - Act_b3 := '0'; - RP_chk3 := NOW - ((2 * tCK) - tWR); - Write_precharge(3) := '0'; - END IF; - END IF; - END IF; - - -- - -- DLL Counter - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - IF (DLL_Reset = '1' AND DLL_done = '0') THEN - DLL_count := DLL_count + 1; - IF (DLL_count >= 200) THEN - DLL_done := '1'; - END IF; - END IF; - END IF; - - -- - -- Control Logic - -- - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - -- Auto Refresh - IF Aref_enable = '1' THEN - -- Auto Refresh to Auto Refresh - ASSERT (NOW - RFC_chk >= tRFC) - REPORT "tRFC violation during Auto Refresh" - SEVERITY WARNING; - - -- Precharge to Auto Refresh - ASSERT ((NOW - RP_chk0 >= tRP) AND (NOW - RP_chk1 >= tRP) AND - (NOW - RP_chk2 >= tRP) AND (NOW - RP_chk3 >= tRP)) - REPORT "tRP violation during Auto Refresh" - SEVERITY WARNING; - - -- Precharge to Auto Refresh - ASSERT (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') - REPORT "All banks must be Precharge before Auto Refresh" - SEVERITY WARNING; - - -- Record current tRFC time - RFC_chk := NOW; - END IF; - - -- Extended Load Mode Register - IF Ext_mode_enable = '1' THEN - IF (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') THEN - IF (Addr (0) = '0') THEN - DLL_enable := '1'; - ELSE - DLL_enable := '0'; - END IF; - END IF; - - -- Precharge to EMR - ASSERT (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') - REPORT "All bank must be Precharged before Extended Mode Register" - SEVERITY WARNING; - - -- Precharge to EMR - ASSERT ((NOW - RP_chk0 >= tRP) AND (NOW - RP_chk1 >= tRP) AND - (NOW - RP_chk2 >= tRP) AND (NOW - RP_chk3 >= tRP)) - REPORT "tRP violation during Extended Load Register" - SEVERITY WARNING; - - -- LMR/EMR to EMR - ASSERT (NOW - MRD_chk >= tMRD) - REPORT "tMRD violation during Extended Mode Register" - SEVERITY WARNING; - - -- Record current tMRD time - MRD_chk := NOW; - END IF; - - -- Load Mode Register - IF Mode_reg_enable = '1' THEN - -- Register mode - Mode_reg <= Addr; - - -- DLL Reset - IF (DLL_enable = '1' AND Addr (8) = '1') THEN - DLL_reset := '1'; - DLL_done := '0'; - DLL_count := 0; - ELSIF (DLL_enable = '1' AND DLL_reset = '0' AND Addr (8) = '0') THEN - ASSERT (FALSE) - REPORT "DLL is ENABLE: DLL RESET is require" - SEVERITY WARNING; - ELSIF (DLL_enable = '0' AND Addr (8) = '1') THEN - ASSERT (FALSE) - REPORT "DLL is DISABLE: DLL RESET will be ignored" - SEVERITY WARNING; - END IF; - - -- Precharge to LMR - ASSERT (Pc_b0 = '1' AND Pc_b1 = '1' AND Pc_b2 = '1' AND Pc_b3 = '1') - REPORT "All bank must be Precharged before Load Mode Register" - SEVERITY WARNING; - - -- Precharge to EMR - ASSERT ((NOW - RP_chk0 >= tRP) AND (NOW - RP_chk1 >= tRP) AND - (NOW - RP_chk2 >= tRP) AND (NOW - RP_chk3 >= tRP)) - REPORT "tRP violation during Load Mode Register" - SEVERITY WARNING; - - -- LMR/ELMR to LMR - ASSERT (NOW - MRD_chk >= tMRD) - REPORT "tMRD violation during Load Mode Register" - SEVERITY WARNING; - - -- Check for invalid Burst Length - ASSERT ((Addr (2 DOWNTO 0) = "001") OR -- BL = 2 - (Addr (2 DOWNTO 0) = "010") OR -- BL = 4 - (Addr (2 DOWNTO 0) = "011")) -- BL = 8 - REPORT "Invalid Burst Length during Load Mode Register" - SEVERITY WARNING; - - -- Check for invalid CAS Latency - ASSERT ((Addr (6 DOWNTO 4) = "010") OR -- CL = 2.0 - (Addr (6 DOWNTO 4) = "110")) -- CL = 2.5 - REPORT "Invalid CAS Latency during Load Mode Register" - SEVERITY WARNING; - - -- Record current tMRD time - MRD_chk := NOW; - END IF; - - -- Active Block (latch Bank and Row Address) - IF Active_enable = '1' THEN - -- Activate an OPEN bank can corrupt data - ASSERT ((Ba = "00" AND Act_b0 = '0') OR - (Ba = "01" AND Act_b1 = '0') OR - (Ba = "10" AND Act_b2 = '0') OR - (Ba = "11" AND Act_b3 = '0')) - REPORT "Bank is already activated - data can be corrupted" - SEVERITY WARNING; - - -- Activate Bank 0 - IF Ba = "00" AND Pc_b0 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk0 >= tRC) - REPORT "tRC violation during Activate Bank 0" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk0 >= tRP) - REPORT "tRP violation during Activate Bank 0" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b0 := '1'; - Pc_b0 := '0'; - B0_row_addr := Addr; - RC_chk0 := NOW; - RCD_chk0 := NOW; - RAS_chk0 := NOW; - RAP_chk0 := NOW; - END IF; - - -- Activate Bank 1 - IF Ba = "01" AND Pc_b1 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk1 >= tRC) - REPORT "tRC violation during Activate Bank 1" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk1 >= tRP) - REPORT "tRP violation during Activate Bank 1" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b1 := '1'; - Pc_b1 := '0'; - B1_row_addr := Addr; - RC_chk1 := NOW; - RCD_chk1 := NOW; - RAS_chk1 := NOW; - RAP_chk1 := NOW; - END IF; - - -- Activate Bank 2 - IF Ba = "10" AND Pc_b2 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk2 >= tRC) - REPORT "tRC violation during Activate Bank 2" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk2 >= tRP) - REPORT "tRP violation during Activate Bank 2" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b2 := '1'; - Pc_b2 := '0'; - B2_row_addr := Addr; - RC_chk2 := NOW; - RCD_chk2 := NOW; - RAS_chk2 := NOW; - RAP_chk2 := NOW; - END IF; - - -- Activate Bank 3 - IF Ba = "11" AND Pc_b3 = '1' THEN - -- Activate to Activate (same bank) - ASSERT (NOW - RC_chk3 >= tRC) - REPORT "tRC violation during Activate Bank 3" - SEVERITY WARNING; - - -- Precharge to Active - ASSERT (NOW - RP_chk3 >= tRP) - REPORT "tRP violation during Activate Bank 3" - SEVERITY WARNING; - - -- Record Variables for checking violation - Act_b3 := '1'; - Pc_b3 := '0'; - B3_row_addr := Addr; - RC_chk3 := NOW; - RCD_chk3 := NOW; - RAS_chk3 := NOW; - RAP_chk3 := NOW; - END IF; - - -- Activate Bank A to Activate Bank B - IF (Prev_bank /= Ba) THEN - ASSERT (NOW - RRD_chk >= tRRD) - REPORT "tRRD violation during Activate" - SEVERITY WARNING; - END IF; - - -- AutoRefresh to Activate - ASSERT (NOW - RFC_chk >= tRFC) - REPORT "tRFC violation during Activate" - SEVERITY WARNING; - - -- Record Variables for Checking Violation - RRD_chk := NOW; - Prev_bank := Ba; - END IF; - - -- Precharge Block - Consider NOP if bank already precharged or in process of precharging - IF Prech_enable = '1' THEN - -- EMR or LMR to Precharge - ASSERT (NOW - MRD_chk >= tMRD) - REPORT "tMRD violation during Precharge" - SEVERITY WARNING; - - -- Precharge Bank 0 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "00")) AND Act_b0 = '1') THEN - Act_b0 := '0'; - Pc_b0 := '1'; - RP_chk0 := NOW; - - -- Activate to Precharge bank 0 - ASSERT (NOW - RAS_chk0 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk0 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Precharge Bank 1 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "01")) AND Act_b1 = '1') THEN - Act_b1 := '0'; - Pc_b1 := '1'; - RP_chk1 := NOW; - - -- Activate to Precharge - ASSERT (NOW - RAS_chk1 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk1 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Precharge Bank 2 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "10")) AND Act_b2 = '1') THEN - Act_b2 := '0'; - Pc_b2 := '1'; - RP_chk2 := NOW; - - -- Activate to Precharge - ASSERT (NOW - RAS_chk2 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk2 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Precharge Bank 3 - IF ((Addr (10) = '1' OR (Addr (10) = '0' AND Ba = "11")) AND Act_b3 = '1') THEN - Act_b3 := '0'; - Pc_b3 := '1'; - RP_chk3 := NOW; - - -- Activate to Precharge - ASSERT (NOW - RAS_chk3 >= tRAS) - REPORT "tRAS violation during Precharge" - SEVERITY WARNING; - - -- tWR violation check for Write - ASSERT (NOW - WR_chk3 >= tWR) - REPORT "tWR violation during Precharge" - SEVERITY WARNING; - END IF; - - -- Pipeline for READ - IF CAS_latency_15 = '1' THEN - A10_precharge (3) := Addr(10); - Bank_precharge (3) := Ba; - Cmnd_precharge (3) := '1'; - ELSIF CAS_latency_2 = '1' THEN - A10_precharge (4) := Addr(10); - Bank_precharge (4) := Ba; - Cmnd_precharge (4) := '1'; - ELSIF CAS_latency_25 = '1' THEN - A10_precharge (5) := Addr(10); - Bank_precharge (5) := Ba; - Cmnd_precharge (5) := '1'; - ELSIF CAS_latency_3 = '1' THEN - A10_precharge (6) := Addr(10); - Bank_precharge (6) := Ba; - Cmnd_precharge (6) := '1'; - ELSIF CAS_latency_4 = '1' THEN - A10_precharge (8) := Addr(10); - Bank_precharge (8) := Ba; - Cmnd_precharge (8) := '1'; - END IF; - END IF; - - -- Burst Terminate - IF Burst_term = '1' THEN - -- Pipeline for Read - IF CAS_latency_15 = '1' THEN - Cmnd_bst (3) := '1'; - ELSIF CAS_latency_2 = '1' THEN - Cmnd_bst (4) := '1'; - ELSIF CAS_latency_25 = '1' THEN - Cmnd_bst (5) := '1'; - ELSIF CAS_latency_3 = '1' THEN - Cmnd_bst (6) := '1'; - ELSIF CAS_latency_4 = '1' THEN - Cmnd_bst (8) := '1'; - END IF; - - -- Terminate Write - ASSERT (Data_in_enable = '0') - REPORT "It's illegal to Burst Terminate a Write" - SEVERITY WARNING; - - -- Terminate Read with Auto Precharge - ASSERT (Read_precharge (0) = '0' AND Read_precharge (1) = '0' AND - Read_precharge (2) = '0' AND Read_precharge (3) = '0') - REPORT "It's illegal to Burst Terminate a Read with Auto Precharge" - SEVERITY WARNING; - END IF; - - -- Read Command - IF Read_enable = '1' THEN - -- CAS Latency Pipeline - IF Cas_latency_15 = '1' THEN - Read_cmnd (3) := '1'; - Read_bank (3) := Ba; - Read_cols (3) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_2 = '1' THEN - Read_cmnd (4) := '1'; - Read_bank (4) := Ba; - Read_cols (4) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_25 = '1' THEN - Read_cmnd (5) := '1'; - Read_bank (5) := Ba; - Read_cols (5) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_3 = '1' THEN - Read_cmnd (6) := '1'; - Read_bank (6) := Ba; - Read_cols (6) := Addr (8 DOWNTO 0); - ELSIF Cas_latency_4 = '1' THEN - Read_cmnd (8) := '1'; - Read_bank (8) := Ba; - Read_cols (8) := Addr (8 DOWNTO 0); - END IF; - - -- Write to Read: Terminate Write Immediately - IF Data_in_enable = '1' THEN - Data_in_enable := '0'; - END IF; - - -- Interrupting a Read with Auto Precharge (same bank only) - ASSERT (Read_precharge(CONV_INTEGER(Ba)) = '0') - REPORT "It's illegal to interrupt a Read with Auto Precharge" - SEVERITY WARNING; - - -- Activate to Read - ASSERT ((Ba = "00" AND Act_b0 = '1') OR - (Ba = "01" AND Act_b1 = '1') OR - (Ba = "10" AND Act_b2 = '1') OR - (Ba = "11" AND Act_b3 = '1')) - REPORT "Bank is not Activated for Read" - SEVERITY WARNING; - - -- Activate to Read without Auto Precharge - IF Addr (10) = '0' THEN - ASSERT ((Ba = "00" AND NOW - RCD_chk0 >= tRCD) OR - (Ba = "01" AND NOW - RCD_chk1 >= tRCD) OR - (Ba = "10" AND NOW - RCD_chk2 >= tRCD) OR - (Ba = "11" AND NOW - RCD_chk3 >= tRCD)) - REPORT "tRCD violation during Read" - SEVERITY WARNING; - END IF; - - -- Activate to Read with Auto Precharge - IF Addr (10) = '1' THEN - ASSERT ((Ba = "00" AND NOW - RAP_chk0 >= tRAP) OR - (Ba = "01" AND NOW - RAP_chk1 >= tRAP) OR - (Ba = "10" AND NOW - RAP_chk2 >= tRAP) OR - (Ba = "11" AND NOW - RAP_chk3 >= tRAP)) - REPORT "tRAP violation during Read" - SEVERITY WARNING; - END IF; - - -- Auto precharge - IF Addr (10) = '1' THEN - Read_precharge (Conv_INTEGER(Ba)) := '1'; - Count_precharge (Conv_INTEGER(Ba)) := 0; - END IF; - - -- DLL Check - IF (DLL_reset = '1') THEN - ASSERT (DLL_done = '1') - REPORT "DLL RESET not complete" - SEVERITY WARNING; - END IF; - END IF; - - -- Write Command - IF Write_enable = '1' THEN - -- Pipeline for Write - Write_cmnd (2) := '1'; - Write_bank (2) := Ba; - Write_cols (2) := Addr (8 DOWNTO 0); - - -- Interrupting a Write with Auto Precharge (same bank only) - ASSERT (Write_precharge(CONV_INTEGER(Ba)) = '0') - REPORT "It's illegal to interrupt a Write with Auto Precharge" - SEVERITY WARNING; - - -- Activate to Write - ASSERT ((Ba = "00" AND Act_b0 = '1') OR - (Ba = "01" AND Act_b1 = '1') OR - (Ba = "10" AND Act_b2 = '1') OR - (Ba = "11" AND Act_b3 = '1')) - REPORT "Bank is not Activated for Write" - SEVERITY WARNING; - - -- Activate to Write - ASSERT ((Ba = "00" AND NOW - RCD_chk0 >= tRCD) OR - (Ba = "01" AND NOW - RCD_chk1 >= tRCD) OR - (Ba = "10" AND NOW - RCD_chk2 >= tRCD) OR - (Ba = "11" AND NOW - RCD_chk3 >= tRCD)) - REPORT "tRCD violation during Write" - SEVERITY WARNING; - - -- Auto precharge - IF Addr (10) = '1' THEN - Write_precharge (Conv_INTEGER(Ba)) := '1'; - Count_precharge (Conv_INTEGER(Ba)) := 0; - END IF; - END IF; - END IF; - END PROCESS; - - -- - -- Dqs Receiver - -- - dqs_rcvrs : PROCESS - VARIABLE Dm_temp : STD_LOGIC_VECTOR (1 DOWNTO 0); - VARIABLE Dq_temp : STD_LOGIC_VECTOR (data_bits - 1 DOWNTO 0); - BEGIN - WAIT ON Dqs; - -- Latch data at posedge Dqs - IF Dqs'EVENT AND Dqs (1) = '1' AND Dqs (0) = '1' THEN - Dq_temp := Dq; - Dm_temp := Dm; - END IF; - -- Latch data at negedge Dqs - IF Dqs'EVENT AND Dqs (1) = '0' AND Dqs (0) = '0' THEN - Dq_pair <= (Dq & Dq_temp); - Dm_pair <= (Dm & Dm_temp); - END IF; - END PROCESS; - - -- - -- Setup timing checks - -- - Setup_check : PROCESS - BEGIN - WAIT ON Sys_clk; - IF Sys_clk'EVENT AND Sys_clk = '1' THEN - ASSERT(Cke'LAST_EVENT >= tIS) - REPORT "CKE Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Cs_n'LAST_EVENT >= tIS) - REPORT "CS# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Cas_n'LAST_EVENT >= tIS) - REPORT "CAS# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Ras_n'LAST_EVENT >= tIS) - REPORT "RAS# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(We_n'LAST_EVENT >= tIS) - REPORT "WE# Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Addr'LAST_EVENT >= tIS) - REPORT "ADDR Setup time violation -- tIS" - SEVERITY WARNING; - ASSERT(Ba'LAST_EVENT >= tIS) - REPORT "BA Setup time violation -- tIS" - SEVERITY WARNING; - END IF; - END PROCESS; - - -- - -- Hold timing checks - -- - Hold_check : PROCESS - BEGIN - WAIT ON Sys_clk'DELAYED (tIH); - IF Sys_clk'DELAYED (tIH) = '1' THEN - ASSERT(Cke'LAST_EVENT >= tIH) - REPORT "CKE Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Cs_n'LAST_EVENT >= tIH) - REPORT "CS# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Cas_n'LAST_EVENT >= tIH) - REPORT "CAS# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Ras_n'LAST_EVENT >= tIH) - REPORT "RAS# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(We_n'LAST_EVENT >= tIH) - REPORT "WE# Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Addr'LAST_EVENT >= tIH) - REPORT "ADDR Hold time violation -- tIH" - SEVERITY WARNING; - ASSERT(Ba'LAST_EVENT >= tIH) - REPORT "BA Hold time violation -- tIH" - SEVERITY WARNING; - END IF; - END PROCESS; - -END behave; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd deleted file mode 100644 index ae38d48..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd +++ /dev/null @@ -1,290 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: SDRAM command controller --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_cmd is - Generic - ( - f_sdrclk : real := 100.0; - BL : natural := 2 - ); - Port - ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - enable : in STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_out : out user_tag_t; - phy_ctrl : out phy_ctrl_t; - cmd : in sdr_cmd_t; - cmd_we : in STD_LOGIC; - cmd_ack : out STD_LOGIC; - col_addr : in col_addr_t; - mode_word : in mode_word_t; - sdr_cmd_ctrl : out sdr_cmd_lines_t; - sdr_addr : out sdr_addr_t; - sdr_ba : out sdr_ba_t - ); -end sdram_cmd; - -architecture behaviour of sdram_cmd is - - signal st_sdr, st_sdr_next : sdr_state_t; - - signal cc_preset : natural range 0 to 15; - signal cc_load_en : std_logic; - signal cycle_finished : std_logic; - - signal burst_preset : natural range 0 to 3; - signal burst_load_en : std_logic; - signal burst_finished : std_logic; - - subtype cycle_cnt_t is natural range 0 to 15; - - type part_timing_array_t is array (sdr_cmd_t) of cycle_cnt_t; - constant TIMING : part_timing_array_t := - -- command cycle_cnt - ( SD_DESELECT => (0 ), - SD_NOP => (0 ), - SD_LMR => (TMRD-1 ), - SD_ACT => (to_cycles(TRCD, f_sdrclk)-1), - SD_READ => (TCAS-1 ), - SD_WRITE => (to_cycles(TWR, f_sdrclk)-1), - SD_PRE => (to_cycles(TRP, f_sdrclk)-1), - SD_BST => (0 ), - SD_AR => (to_cycles(TRFC, f_sdrclk)-1), - SD_SR => (to_cycles(TRFC, f_sdrclk)-1) - ); - -begin - - u_tag_out <= u_tag_in; - ------------------------------------------------------------------------------------------- - -fsm_sdr_state: - process (st_sdr, cmd, cmd_we, cycle_finished, burst_finished, mode_word, enable, col_addr) - begin - st_sdr_next <= st_sdr; - sdr_cmd_ctrl <= COMMAND(SD_NOP); - - cc_load_en <= '0'; - cc_preset <= TIMING(cmd); - burst_load_en <= '0'; - cmd_ack <= '0'; - burst_preset <= BL/2-1; - phy_ctrl.re <= '0'; - phy_ctrl.drive_en <= '0'; - phy_ctrl.we <= '0'; - phy_ctrl.utag_we <= '0'; - sdr_addr <= mode_word(sdr_addr_t'left downto sdr_addr_t'right); - sdr_ba <= mode_word(mode_word_t'left downto mode_word_t'left-1); - - case st_sdr is - when PWR_DOWN => - sdr_cmd_ctrl <= COMMAND(SD_DESELECT); - if enable = '1' then - st_sdr_next <= IDLE; - end if; - - when PRECHARGE => - if cycle_finished = '1' then - st_sdr_next <= IDLE; - end if; - - when MODE => - if cycle_finished = '1' then - st_sdr_next <= IDLE; - end if; - - when IDLE => - if cmd_we = '1' then - cmd_ack <= '1'; - cc_load_en <= '1'; - cc_preset <= TIMING(cmd); - sdr_cmd_ctrl <= COMMAND(cmd); - case cmd is - when SD_PRE => - st_sdr_next <= PRECHARGE; - when SD_LMR => - st_sdr_next <= MODE; - when SD_ACT => - st_sdr_next <= ROW_ACT; - when SD_AR => - st_sdr_next <= AUTO_REF; - when others => null; - end case; - end if; - - when ROW_ACT => - if cycle_finished = '1' then - if cmd_we = '1' then - cmd_ack <= '1'; - burst_load_en <= '1'; - cc_load_en <= '1'; - cc_preset <= TIMING(cmd); - sdr_cmd_ctrl <= COMMAND(cmd); - case cmd is - when SD_PRE => - st_sdr_next <= PRECHARGE; - when SD_READ => - phy_ctrl.utag_we <= '1'; - st_sdr_next <= READ; - sdr_addr(col_addr_t'range) <= col_addr; - when SD_WRITE => - phy_ctrl.utag_we <= '1'; - phy_ctrl.drive_en <= '1'; - st_sdr_next <= WRITE; - sdr_addr(col_addr_t'range) <= col_addr; - when others => null; - end case; - end if; - end if; - - when WRITE => - phy_ctrl.drive_en <= '1'; - phy_ctrl.we <= '1'; - if burst_finished = '1' then - if cmd_we = '1' and cmd = SD_WRITE then - sdr_addr(col_addr_t'range) <= col_addr; - cmd_ack <= '1'; - burst_load_en <= '1'; - sdr_cmd_ctrl <= COMMAND(cmd); - phy_ctrl.utag_we <= '1'; - else - phy_ctrl.drive_en <= '0'; - cc_load_en <= '1'; - cc_preset <= TIMING(SD_WRITE)+1; - st_sdr_next <= ROW_ACT; - end if; - end if; - - when READ => - phy_ctrl.re <= '1'; - if burst_finished = '1' then - if cmd_we = '1' and cmd = SD_READ then - sdr_addr(col_addr_t'range) <= col_addr; - cmd_ack <= '1'; - burst_load_en <= '1'; - sdr_cmd_ctrl <= COMMAND(cmd); - phy_ctrl.utag_we <= '1'; - else - cc_load_en <= '1'; - cc_preset <= TIMING(SD_READ); - st_sdr_next <= ROW_ACT; - end if; - end if; - - when WRITE_A => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when READ_A => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when BURST_STOP => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when SELF_REF => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when PRE_PWR_DOWN => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when ACT_PWR_DOWN => -- not implemented yet - cmd_ack <= '1'; - st_sdr_next <= IDLE; - - when AUTO_REF => - if cycle_finished = '1' then - st_sdr_next <= IDLE; - end if; - - when others => - st_sdr_next <= IDLE; - end case; - - end process; - -fsm_sdr_state_next: - process (rst, clk) - begin - if rst = '1' then - st_sdr <= PWR_DOWN; - elsif rising_edge(clk) then - st_sdr <= st_sdr_next; - end if; - end process; - ------------------------------------------------------------------------------------------- -cycle_counter: - process (rst, clk) - variable cycle_cnt : natural range 0 to 15; - begin - if rst = '1' then - cycle_cnt := 0; - cycle_finished <= '0'; - elsif rising_edge(clk) then - cycle_finished <= '0'; - if cc_load_en = '1' then - cycle_cnt := cc_preset; - elsif cycle_cnt /= 0 then - cycle_cnt := cycle_cnt - 1; - else - cycle_finished <= '1'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -burst_counter: - process (rst, clk) - variable burst_cnt : natural range 0 to 3; - begin - if rst = '1' then - burst_cnt := 0; - elsif rising_edge(clk) then - burst_finished <= '0'; - if burst_load_en = '1' then - burst_cnt := burst_preset; - elsif burst_cnt /= 0 then - burst_cnt := burst_cnt - 1; - end if; - if burst_cnt = 0 then - burst_finished <= '1'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -end behaviour; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd deleted file mode 100644 index 534232b..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd +++ /dev/null @@ -1,74 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: User SDRAM component adjustments --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -package sdram_config is - - constant DDR_DATA_WIDTH : positive := 32; -- External DDR-SDRAM Module data bus width - constant DDR_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module - constant DDR_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM - constant DDR_ROW_ADDR_WIDTH : positive := 13; -- - constant DDR_COL_ADDR_WIDTH : positive := 9; -- - - constant LMR_REG_BASE : natural := 0; - constant LMR_REG_EXTENDED : natural := 1; - constant LMR_OP_NORMAL : natural := 0; - constant LMR_OP_RES_DLL : natural := 2; - constant LMR_BT_SEQ : natural := 0; - constant LMR_BT_ILVD : natural := 1; - constant LMR_BL2 : natural := 1; - constant LMR_BL4 : natural := 2; - constant LMR_BL8 : natural := 3; - constant LMR_CL2 : natural := 2; - constant LMR_CL3 : natural := 3; - constant LMR_CL2_5 : natural := 6; - - -- DDR SDRAM Hardware defined constants - constant BIT_AUTO_PRE : positive := 10; -- bit-position in column address for auto precharge (see Data Sheet) - constant BIT_PRE_ALL : positive := 10; -- bit-position in column address for precharge all (see Data Sheet) - constant ENABLE_PRE_ALL : std_logic := '1'; - constant ENABLE_AUTO_PRE : std_logic := '0'; - - -- DDR-SDR TIMING constants ------------------------------------------------------------------ - -- After REFRESH_CLOCKS a refresh cycle is necessary, 64ms / 8192 = max every 7.8125 us refesh - constant REFRESH_INTERVAL : real := 7.8125E3; -- [ns] - - -- These values are for your SDRAM part (see datasheet) - constant TCAS : positive := 2; -- CAS latency [clocks] - constant TRP : real := 20.0; -- precharge command period [ns] - constant TRAS : real := 45.0; -- active to precharge delay [ns] - constant TRFC : real := 75.0; -- auto refresh command period [ns] - constant TMRD : positive := 2; -- load mode register command cylce time [clocks] - constant TRCD : real := 20.0; -- active to read or write delay [ns] - constant TWR : real := 15.0; -- write recovery time [ns] - - constant PWR_UP_WAIT : real := 1.0E3; -- [ns] - - subtype user_tag_t is unsigned(3 downto 0); - - ---------------------------------------------------------------------------------------------- - -end sdram_config; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd deleted file mode 100644 index d812b1c..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd +++ /dev/null @@ -1,491 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: SDRAM main controller and user I/F --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; -use work.utils_pkg.all; - -entity sdram_ctrl is - Generic - ( - f_sysclk : real := 100.0; - BL : natural := 2 - ); - Port ( - rst : in STD_LOGIC; - clk : in STD_LOGIC; - u_busy : out STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_out : out user_tag_t; - u_addr : in user_addr_t; - u_cmd : in user_cmd_t; - u_cmd_we : in STD_LOGIC; - col_addr : out col_addr_t; - sdr_cmd_busy : in STD_LOGIC; - sdr_cmd : out sdr_cmd_t; - sdr_cmd_we : out STD_LOGIC; - sdr_mode : out mode_word_t; - sdr_cke : out STD_LOGIC - ); -end sdram_ctrl; - -architecture behaviour of sdram_ctrl is - - constant LMR_BURST_LEN : natural := NextExpBaseTwo(BL); - - type ctrl_state_t is (RESET, POWER_WAIT, INIT, INIT_WAIT, USER_READY, USER_WRITE_PRE, USER_WRITE_ACT, USER_WRITE, USER_READ_PRE, USER_READ_ACT, USER_READ, REFRESH_PRE, REFRESH); - signal st_ctrl, st_ctrl_next : ctrl_state_t; - - constant PWR_UP_CLOCK_INTERVAL : natural := to_cycles(PWR_UP_WAIT, f_sysclk); - signal pwr_up_cnt : natural range 0 to PWR_UP_CLOCK_INTERVAL-1; - signal pwr_up_cnt_rst : std_logic; - signal pwr_up_finished : std_logic; - - signal cycle_cnt : natural range 0 to 255; - signal cc_preset : natural range 0 to 255; - signal cc_load_en : std_logic; - signal cycle_finished : std_logic; - - signal seq_cnt : natural range 0 to 31; - signal seq_rst_en : std_logic; - signal seq_cnt_en : std_logic; - - constant REFRESH_CLOCK_INTERVAL : natural := to_cycles(REFRESH_INTERVAL, f_sysclk); - signal refresh_cnt : natural range 0 to REFRESH_CLOCK_INTERVAL-1; - signal refresh_request : std_logic; - signal refresh_cnt_rst : std_logic; - - signal addr_reg_load_en : std_logic; - - signal u_tag_reg : user_tag_t; - signal bank_addr_reg : bank_addr_t; - signal row_addr_reg : row_addr_t; - signal col_addr_reg : col_addr_t; - signal bank_addr_last : bank_addr_t; - signal row_addr_last : row_addr_t; - signal col_addr_last : col_addr_t; - - signal u_bank_addr : bank_addr_t; - signal u_row_addr : row_addr_t; - signal u_col_addr : col_addr_t; - - signal bank_active_reg : unsigned(0 to 3); - signal bank_is_active : std_logic; - signal bank_activate : std_logic; - signal bank_clr : std_logic; - - type init_seq_rom_t is array (0 to 14) of init_seq_t; - - constant init_seq_rom : init_seq_rom_t := - ( - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_PRE, - mode_word => "000010000000000", - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_LMR, - mode_word => to_unsigned(LMR_REG_EXTENDED, 2) & "0000000000010", - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_LMR, - mode_word => to_unsigned(LMR_REG_BASE, 2) & to_unsigned(LMR_OP_RES_DLL, 6) & to_unsigned(LMR_CL2, 3) & '0' & to_unsigned(LMR_BURST_LEN, 3), - wait_cycle => 200 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_PRE, - mode_word => "000010000000000", - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_AR, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_AR, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ), - ( - cmd => SD_LMR, - mode_word => to_unsigned(LMR_REG_BASE, 2) & to_unsigned(LMR_OP_NORMAL, 6) & to_unsigned(LMR_CL2, 3) & '0' & to_unsigned(LMR_BURST_LEN, 3), - wait_cycle => 200 - ), - ( - cmd => SD_NOP, - mode_word => (others => '0'), - wait_cycle => 0 - ) - - ); - -begin - - u_row_addr <= u_addr(user_addr_t'left downto user_addr_t'left-row_addr_t'length+1); - u_bank_addr <= u_addr(user_addr_t'left-row_addr_t'length downto user_addr_t'left-row_addr_t'length-bank_addr_t'length+1); - u_col_addr <= u_addr(user_addr_t'left-row_addr_t'length-bank_addr_t'length downto 0); - bank_is_active <= bank_active_reg(to_integer(u_bank_addr)); - ------------------------------------------------------------------------------------------- -fsm_ctrl_state: - process (st_ctrl, u_tag_in, u_tag_reg, u_cmd, u_cmd_we, sdr_cmd_busy, pwr_up_finished, seq_cnt, cycle_finished, u_bank_addr, u_row_addr, bank_addr_reg, row_addr_reg, u_col_addr, col_addr_reg, bank_addr_last, row_addr_last, refresh_request, bank_is_active) - begin - - u_busy <= '1'; - pwr_up_cnt_rst <= '0'; - cc_preset <= init_seq_rom(seq_cnt).wait_cycle; - cc_load_en <= '0'; - sdr_cmd <= init_seq_rom(seq_cnt).cmd; - sdr_cmd_we <= '0'; - sdr_mode <= bank_addr_reg & row_addr_reg; - col_addr <= col_addr_reg; - sdr_cke <= '1'; - seq_cnt_en <= '0'; - seq_rst_en <= '0'; - addr_reg_load_en <= '0'; - refresh_cnt_rst <= '0'; - bank_activate <= '0'; - bank_clr <= '0'; - u_tag_out <= u_tag_reg; - - st_ctrl_next <= st_ctrl; - case st_ctrl is - when RESET => - sdr_cke <= '0'; - pwr_up_cnt_rst <= '1'; - st_ctrl_next <= POWER_WAIT; - - when POWER_WAIT => - sdr_cke <= '0'; - if pwr_up_finished = '1' then - seq_rst_en <= '1'; - st_ctrl_next <= INIT; - end if; - - when INIT => - sdr_mode <= init_seq_rom(seq_cnt).mode_word; - sdr_cmd <= init_seq_rom(seq_cnt).cmd; - cc_preset <= init_seq_rom(seq_cnt).wait_cycle; - if seq_cnt = init_seq_rom_t'high then - bank_clr <= '1'; - refresh_cnt_rst <= '1'; - st_ctrl_next <= USER_READY; - elsif sdr_cmd_busy = '0' then - cc_load_en <= '1'; - sdr_cmd_we <= '1'; - st_ctrl_next <= INIT_WAIT; - end if; - - when INIT_WAIT => - if sdr_cmd_busy = '0' and cycle_finished = '1' then - seq_cnt_en <= '1'; - st_ctrl_next <= INIT; - end if; - - when USER_READY => - if refresh_request = '1' then - st_ctrl_next <= REFRESH_PRE; - else - u_busy <= '0'; - col_addr <= u_col_addr; - u_tag_out <= u_tag_in; - sdr_mode <= u_bank_addr & u_row_addr; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - if u_cmd_we = '1' then - addr_reg_load_en <= '1'; - case u_cmd is - when UCMD_NOP => - sdr_cmd <= SD_NOP; - when UCMD_LMR => - sdr_cmd <= SD_NOP; - when UCMD_WRITE => - sdr_cmd <= SD_WRITE; - if (u_row_addr /= row_addr_reg) then - st_ctrl_next <= USER_WRITE_PRE; - elsif bank_is_active = '0' then - st_ctrl_next <= USER_WRITE_ACT; - elsif sdr_cmd_busy = '1' then - st_ctrl_next <= USER_WRITE; - else - sdr_cmd_we <= '1'; - end if; - when UCMD_READ => - sdr_cmd <= SD_READ; - if (u_row_addr /= row_addr_reg) then - st_ctrl_next <= USER_READ_PRE; - elsif bank_is_active = '0' then - st_ctrl_next <= USER_READ_ACT; - elsif sdr_cmd_busy = '1' then - st_ctrl_next <= USER_READ; - else - sdr_cmd_we <= '1'; - end if; - when others => null; - end case; - end if; - end if; - - when USER_WRITE_PRE => - bank_clr <= '1'; - sdr_cmd <= SD_PRE; - sdr_mode <= bank_addr_last & row_addr_last; - sdr_mode(BIT_PRE_ALL) <= ENABLE_PRE_ALL; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_WRITE_ACT; - end if; - - when USER_WRITE_ACT => - bank_activate <= '1'; - sdr_cmd <= SD_ACT; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_WRITE; - end if; - - when USER_WRITE => - sdr_cmd <= SD_WRITE; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READY; - end if; - - when USER_READ_PRE => - bank_clr <= '1'; - sdr_cmd <= SD_PRE; - sdr_mode <= bank_addr_last & row_addr_last; - sdr_mode(BIT_PRE_ALL) <= ENABLE_PRE_ALL; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READ_ACT; - end if; - - when USER_READ_ACT => - bank_activate <= '1'; - sdr_cmd <= SD_ACT; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READ; - end if; - - when USER_READ => - sdr_cmd <= SD_READ; - sdr_mode(BIT_AUTO_PRE) <= ENABLE_AUTO_PRE; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READY; - end if; - - when REFRESH_PRE => - bank_clr <= '1'; - sdr_cmd <= SD_PRE; --- sdr_mode <= bank_addr_last & row_addr_last; - sdr_mode(BIT_PRE_ALL) <= ENABLE_PRE_ALL; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= REFRESH; - end if; - - when REFRESH => - sdr_cmd <= SD_AR; - if sdr_cmd_busy = '0' then - sdr_cmd_we <= '1'; - st_ctrl_next <= USER_READY; - refresh_cnt_rst <= '1'; - end if; - - when others => - st_ctrl_next <= RESET; - end case; - - end process; - -fsm_ctrl_state_next: - process (rst, clk) - begin - if rst = '1' then - st_ctrl <= RESET; - elsif rising_edge(clk) then - st_ctrl <= st_ctrl_next; - end if; - end process; - ------------------------------------------------------------------------------------------- -bank_active_register: - process (clk) - begin - if rising_edge(clk) then - if bank_clr = '1' then - bank_active_reg <= (others => '0'); -- assumes PRE_ALL !!!!!!!!!!!!! - elsif bank_activate = '1' then - bank_active_reg(to_integer(bank_addr_reg)) <= '1'; - end if; - end if; - end process; - - ------------------------------------------------------------------------------------------- -user_addr_register: - process (rst, clk) - begin - if rst = '1' then - bank_addr_reg <= (others => '0'); - row_addr_reg <= (others => '0'); - col_addr_reg <= (others => '0'); - u_tag_reg <= (others => '0'); - elsif rising_edge(clk) then - if addr_reg_load_en = '1' then - bank_addr_last <= bank_addr_reg; - row_addr_last <= row_addr_reg; - col_addr_last <= col_addr_reg; - bank_addr_reg <= u_bank_addr; - row_addr_reg <= u_row_addr; - col_addr_reg <= u_col_addr; - u_tag_reg <= u_tag_in; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -power_up_counter: - process (rst, clk) - begin - if rst = '1' then - pwr_up_cnt <= 0; - pwr_up_finished <= '0'; - elsif rising_edge(clk) then - pwr_up_finished <= '0'; - if pwr_up_cnt_rst = '1' then - pwr_up_cnt <= PWR_UP_CLOCK_INTERVAL-1; - else - if pwr_up_cnt /= 0 then - pwr_up_cnt <= pwr_up_cnt - 1; - else - pwr_up_finished <= '1'; - end if; - end if; - end if; - end process; - - ------------------------------------------------------------------------------------------- -refresh_counter: - process (rst, clk) - begin - if rst = '1' then - refresh_cnt <= 0; - refresh_request <= '0'; - elsif rising_edge(clk) then - refresh_request <= '0'; - if refresh_cnt_rst = '1' then - refresh_cnt <= REFRESH_CLOCK_INTERVAL-1; - else - if refresh_cnt /= 0 then - refresh_cnt <= refresh_cnt - 1; - else - refresh_request <= '1'; - end if; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -cycle_counter: - process (rst, clk) - begin - if rst = '1' then - cycle_cnt <= 0; - cycle_finished <= '0'; - elsif rising_edge(clk) then - cycle_finished <= '0'; - if cc_load_en = '1' then - cycle_cnt <= cc_preset; - elsif cycle_cnt /= 0 then - cycle_cnt <= cycle_cnt - 1; - else - cycle_finished <= '1'; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -seq_counter: - process (rst, clk) - begin - if rst = '1' then - seq_cnt <= 0; - elsif rising_edge(clk) then - if seq_rst_en = '1' then - seq_cnt <= 0; - elsif seq_cnt_en = '1' then - if seq_cnt /= init_seq_rom_t'high then - seq_cnt <= seq_cnt + 1; - end if; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- -end behaviour; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd deleted file mode 100644 index 5d997c3..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd +++ /dev/null @@ -1,278 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_ctrl_frontend64_wb is - Generic - ( - BL : natural := 2; - f_sysclk : real := 100.0; - f_sdrclk : real := 100.0; - fifo_depth : integer := 4 - ); - Port - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - SDRAM_CLK0_I : in STD_LOGIC; - SDRAM_CLK270_I : in STD_LOGIC; - SDRAM_CLK270VAR_I : in STD_LOGIC; - - CYC_I : in STD_LOGIC; - STB_I : in STD_LOGIC; - SEL_I : in unsigned(SDR_DM_WIDTH-1 downto 0); - WE_I : in STD_LOGIC; - ACK_O : out STD_LOGIC; - MRDY_I : in STD_LOGIC; - SRDY_O : out STD_LOGIC; - ADDR_I : in unsigned(31 downto 0); - DAT_I : in unsigned(SDR_DATA_WIDTH-1 downto 0); - DAT_O : out unsigned(SDR_DATA_WIDTH-1 downto 0); - - -- SDRAM signals - sd_clk_p : out STD_LOGIC; - sd_clk_n : out STD_LOGIC; - sd_cke : out STD_LOGIC; - sd_cs_n : out STD_LOGIC; - sd_cas_n : out STD_LOGIC; - sd_ras_n : out STD_LOGIC; - sd_we_n : out STD_LOGIC; - sd_addr : out sdr_addr_t; - sd_ba : out sdr_ba_t; - sd_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - sd_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - sd_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0) - - ); -end sdram_ctrl_frontend64_wb; - -architecture struct of sdram_ctrl_frontend64_wb is - - -- Number of user data words for simulation - signal u_addr : user_addr_t; - signal u_tag_in : user_tag_t; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t; - signal u_cmd_we : std_logic; - signal u_busy : std_logic; - signal u_data_w : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal u_dm_wr_in : unsigned(SDR_DM_WIDTH-1 downto 0); - signal u_data_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal rdy : std_logic; - - constant CAT_FIFO_WIDTH : integer := user_cmd_t'length + user_tag_t'length + DDR_ROW_ADDR_WIDTH + DDR_BANK_WIDTH + DDR_COL_ADDR_WIDTH; - signal cat_fifo_din : unsigned(CAT_FIFO_WIDTH-1 downto 0); - signal cat_fifo_dout : unsigned(CAT_FIFO_WIDTH-1 downto 0); - signal cat_fifo_re : std_logic; - signal cat_fifo_we : std_logic; - signal cat_fifo_full : std_logic; - signal cat_fifo_empty : std_logic; --- signal cat_fifo_almost_full : std_logic; --- signal cat_fifo_almost_empty : std_logic; - - signal write_fifo_din : unsigned(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto 0); - signal write_fifo_dout : unsigned(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto 0); - signal write_fifo_re : std_logic; - signal write_fifo_we : std_logic; - signal write_fifo_full : std_logic; - signal write_fifo_empty : std_logic; --- signal write_fifo_almost_full : std_logic; --- signal write_fifo_almost_empty : std_logic; - - signal read_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal read_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal read_fifo_re : std_logic; - signal read_fifo_we : std_logic; - signal read_fifo_full : std_logic; - signal read_fifo_empty : std_logic; --- signal read_fifo_almost_full : std_logic; --- signal read_fifo_almost_empty : std_logic; - - alias cmd_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-1 downto CAT_FIFO_WIDTH-user_cmd_t'length); - alias tag_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-user_cmd_t'length-1 downto CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length); - alias addr_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length-1 downto 0); - alias cmd_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-1 downto CAT_FIFO_WIDTH-user_cmd_t'length); - alias tag_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-user_cmd_t'length-1 downto CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length); - alias addr_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length-1 downto 0); - - alias write_fifo_dm_in is write_fifo_din(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto SDR_DATA_WIDTH); - alias write_fifo_data_in is write_fifo_din(SDR_DATA_WIDTH-1 downto 0); - alias write_fifo_dm_out is write_fifo_dout(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto SDR_DATA_WIDTH); - alias write_fifo_data_out is write_fifo_dout(SDR_DATA_WIDTH-1 downto 0); - - alias read_fifo_data_in is read_fifo_din(SDR_DATA_WIDTH-1 downto 0); - alias read_fifo_data_out is read_fifo_dout(SDR_DATA_WIDTH-1 downto 0); - -begin - - -- Instantiate synchronous FIFO - inst_cat_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => CAT_FIFO_WIDTH - ) - PORT MAP - ( - rst => RST_I, - clk => CLK_I, - we => cat_fifo_we, - re => cat_fifo_re, - fifo_full => cat_fifo_full, - fifo_empty => cat_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => cat_fifo_din, - data_r => cat_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_write_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => write_fifo_din'length - ) - PORT MAP - ( - rst => RST_I, - clk_w => CLK_I, - clk_r => SDRAM_CLK0_I, - we => write_fifo_we, - re => write_fifo_re, - fifo_full => write_fifo_full, - fifo_empty => write_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => write_fifo_din, - data_r => write_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_read_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => read_fifo_din'length - ) - PORT MAP - ( - rst => RST_I, - clk_w => SDRAM_CLK0_I, - clk_r => CLK_I, - we => read_fifo_we, - re => read_fifo_re, - fifo_full => read_fifo_full, - fifo_empty => read_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => read_fifo_din, - data_r => read_fifo_dout - ); - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BL, - f_sysclk => f_sysclk, - f_sdrclk => f_sdrclk, - fifo_depth => fifo_depth - ) - Port map - ( - - sys_rst_in => RST_I, - sys_clk_in => CLK_I, - - sdram_clk0_in => SDRAM_CLK0_I, - sdram_clk270_in => SDRAM_CLK270_I, - sdram_clk270_rd_in => SDRAM_CLK270VAR_I, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm => u_dm_wr_in, - - -- SDRAM signals - sd_clk_p => sd_clk_p, - sd_clk_n => sd_clk_n, - sd_cke => sd_cke, - sd_cs_n => sd_cs_n, - sd_cas_n => sd_cas_n, - sd_ras_n => sd_ras_n, - sd_we_n => sd_we_n, - sd_addr => sd_addr, - sd_ba => sd_ba, - sd_dm => sd_dm, - sd_dqs => sd_dqs, - sd_data => sd_data - - ); - ------------------------------------------------------------------------------------------- - SRDY_O <= rdy; - ACK_O <= not (read_fifo_empty); - DAT_O <= read_fifo_data_out; - rdy <= not (cat_fifo_full or write_fifo_full or read_fifo_full) and CYC_I; - write_fifo_we <= STB_I and WE_I and rdy; - write_fifo_data_in <= DAT_I; - write_fifo_dm_in <= not SEL_I; - cat_fifo_we <= STB_I and rdy; - cmd_fifo_in <= UCMD_WRITE when WE_I = '1' else UCMD_READ; - addr_fifo_in <= ADDR_I(25 downto 3) & "0"; - tag_fifo_in <= "000" & ADDR_I(2); - - u_cmd_we <= (not cat_fifo_empty) and (not u_busy); - u_cmd <= cmd_fifo_out; - u_addr <= addr_fifo_out; - u_dm_wr_in <= (write_fifo_dm_out(SDR_DATA_WIDTH+SDR_DM_WIDTH-5 downto SDR_DATA_WIDTH) & write_fifo_dm_out(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto SDR_DATA_WIDTH+4)) when u_tag_wr(0) = '1' else write_fifo_dm_out(SDR_DATA_WIDTH+SDR_DM_WIDTH-1 downto SDR_DATA_WIDTH); - u_tag_in <= tag_fifo_out; - u_data_w <= (write_fifo_data_out(31 downto 0) & write_fifo_data_out(63 downto 32)) when u_tag_wr(0) = '1' else write_fifo_data_out(63 downto 0); - - write_fifo_re <= u_req_wr and (not write_fifo_empty); - cat_fifo_re <= u_cmd_we; - read_fifo_re <= (not read_fifo_empty) and MRDY_I; - read_fifo_we <= u_data_vld; - read_fifo_data_in <= (u_data_r(31 downto 0) & u_data_r(63 downto 32)) when u_tag_rd(0) = '1' else u_data_r(63 downto 0); - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd deleted file mode 100644 index 57002b9..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd +++ /dev/null @@ -1,278 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_ctrl_frontend_wb is - Generic - ( - BL : natural := 2; - f_sysclk : real := 100.0; - f_sdrclk : real := 100.0; - fifo_depth : integer := 4 - ); - Port - ( - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - SDRAM_CLK0_I : in STD_LOGIC; - SDRAM_CLK270_I : in STD_LOGIC; - SDRAM_CLK270VAR_I : in STD_LOGIC; - - CYC_I : in STD_LOGIC; - STB_I : in STD_LOGIC; - SEL_I : in unsigned(3 downto 0); - WE_I : in STD_LOGIC; - ACK_O : out STD_LOGIC; - MRDY_I : in STD_LOGIC; - SRDY_O : out STD_LOGIC; - ADDR_I : in unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - - -- SDRAM signals - sd_clk_p : out STD_LOGIC; - sd_clk_n : out STD_LOGIC; - sd_cke : out STD_LOGIC; - sd_cs_n : out STD_LOGIC; - sd_cas_n : out STD_LOGIC; - sd_ras_n : out STD_LOGIC; - sd_we_n : out STD_LOGIC; - sd_addr : out sdr_addr_t; - sd_ba : out sdr_ba_t; - sd_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - sd_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - sd_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0) - - ); -end sdram_ctrl_frontend_wb; - -architecture struct of sdram_ctrl_frontend_wb is - - -- Number of user data words for simulation - signal u_addr : user_addr_t; - signal u_tag_in : user_tag_t; - signal u_tag_rd : user_tag_t; - signal u_tag_wr : user_tag_t; - signal u_cmd : user_cmd_t; - signal u_cmd_we : std_logic; - signal u_busy : std_logic; - signal u_data_w : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal u_dm_wr_in : unsigned(SDR_DM_WIDTH-1 downto 0); - signal u_data_r : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal u_data_vld : std_logic; - signal u_req_wr : std_logic; - signal rdy : std_logic; - - constant CAT_FIFO_WIDTH : integer := user_cmd_t'length + user_tag_t'length + DDR_ROW_ADDR_WIDTH + DDR_BANK_WIDTH + DDR_COL_ADDR_WIDTH; - signal cat_fifo_din : unsigned(CAT_FIFO_WIDTH-1 downto 0); - signal cat_fifo_dout : unsigned(CAT_FIFO_WIDTH-1 downto 0); - signal cat_fifo_re : std_logic; - signal cat_fifo_we : std_logic; - signal cat_fifo_full : std_logic; - signal cat_fifo_empty : std_logic; --- signal cat_fifo_almost_full : std_logic; --- signal cat_fifo_almost_empty : std_logic; - - signal write_fifo_din : unsigned(35 downto 0); - signal write_fifo_dout : unsigned(35 downto 0); - signal write_fifo_re : std_logic; - signal write_fifo_we : std_logic; - signal write_fifo_full : std_logic; - signal write_fifo_empty : std_logic; --- signal write_fifo_almost_full : std_logic; --- signal write_fifo_almost_empty : std_logic; - - signal read_fifo_din : unsigned(31 downto 0); - signal read_fifo_dout : unsigned(31 downto 0); - signal read_fifo_re : std_logic; - signal read_fifo_we : std_logic; - signal read_fifo_full : std_logic; - signal read_fifo_empty : std_logic; --- signal read_fifo_almost_full : std_logic; --- signal read_fifo_almost_empty : std_logic; - - alias cmd_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-1 downto CAT_FIFO_WIDTH-user_cmd_t'length); - alias tag_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-user_cmd_t'length-1 downto CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length); - alias addr_fifo_in is cat_fifo_din(CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length-1 downto 0); - alias cmd_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-1 downto CAT_FIFO_WIDTH-user_cmd_t'length); - alias tag_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-user_cmd_t'length-1 downto CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length); - alias addr_fifo_out is cat_fifo_dout(CAT_FIFO_WIDTH-user_cmd_t'length-user_tag_t'length-1 downto 0); - - alias write_fifo_data_in is write_fifo_din(write_fifo_din'length-1 downto 4); - alias write_fifo_dm_in is write_fifo_din(3 downto 0); - alias write_fifo_data_out is write_fifo_dout(write_fifo_dout'length-1 downto 4); - alias write_fifo_dm_out is write_fifo_dout(3 downto 0); - - alias read_fifo_data_in is read_fifo_din(read_fifo_din'length-1 downto 0); - alias read_fifo_data_out is read_fifo_dout(read_fifo_dout'length-1 downto 0); - -begin - - -- Instantiate synchronous FIFO - inst_cat_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => CAT_FIFO_WIDTH - ) - PORT MAP - ( - rst => RST_I, - clk => CLK_I, - we => cat_fifo_we, - re => cat_fifo_re, - fifo_full => cat_fifo_full, - fifo_empty => cat_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => cat_fifo_din, - data_r => cat_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_write_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => write_fifo_din'length - ) - PORT MAP - ( - rst => RST_I, - clk_w => CLK_I, - clk_r => SDRAM_CLK0_I, - we => write_fifo_we, - re => write_fifo_re, - fifo_full => write_fifo_full, - fifo_empty => write_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => write_fifo_din, - data_r => write_fifo_dout - ); - - -- Instantiate synchronous FIFO - inst_read_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => read_fifo_din'length - ) - PORT MAP - ( - rst => RST_I, - clk_w => SDRAM_CLK0_I, - clk_r => CLK_I, - we => read_fifo_we, - re => read_fifo_re, - fifo_full => read_fifo_full, - fifo_empty => read_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => read_fifo_din, - data_r => read_fifo_dout - ); - - -- DDR SDRAM Controller Core - inst_sdram_ctrl : entity work.sdram_ctrl_top - Generic map - ( - BL => BL, - f_sysclk => f_sysclk, - f_sdrclk => f_sdrclk, - fifo_depth => fifo_depth - ) - Port map - ( - - sys_rst_in => RST_I, - sys_clk_in => CLK_I, - - sdram_clk0_in => SDRAM_CLK0_I, - sdram_clk270_in => SDRAM_CLK270_I, - sdram_clk270_rd_in => SDRAM_CLK270VAR_I, - - -- User interface - u_data_vld => u_data_vld, - u_data_req_w => u_req_wr, - u_tag_in => u_tag_in, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - u_busy => u_busy, - u_addr => u_addr, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_data_wr => u_data_w, - u_data_rd => u_data_r, - u_dm => u_dm_wr_in, - - -- SDRAM signals - sd_clk_p => sd_clk_p, - sd_clk_n => sd_clk_n, - sd_cke => sd_cke, - sd_cs_n => sd_cs_n, - sd_cas_n => sd_cas_n, - sd_ras_n => sd_ras_n, - sd_we_n => sd_we_n, - sd_addr => sd_addr, - sd_ba => sd_ba, - sd_dm => sd_dm, - sd_dqs => sd_dqs, - sd_data => sd_data - - ); - ------------------------------------------------------------------------------------------- - SRDY_O <= rdy; - ACK_O <= not (read_fifo_empty); - DAT_O <= read_fifo_data_out; - rdy <= not (cat_fifo_full or write_fifo_full or read_fifo_full) and CYC_I; - write_fifo_we <= STB_I and WE_I and rdy; - write_fifo_data_in <= DAT_I; - write_fifo_dm_in <= not SEL_I; - cat_fifo_we <= STB_I and rdy; - cmd_fifo_in <= UCMD_WRITE when WE_I = '1' else UCMD_READ; - addr_fifo_in <= ADDR_I(24 downto 2) & "0"; - tag_fifo_in <= "000" & ADDR_I(25); - - u_cmd_we <= (not cat_fifo_empty) and (not u_busy); - u_cmd <= cmd_fifo_out; - u_addr <= addr_fifo_out; - u_dm_wr_in <= ("1111" & write_fifo_dm_out) when u_tag_wr(0) = '0' else (write_fifo_dm_out & "1111"); - u_tag_in <= tag_fifo_out; - u_data_w <= write_fifo_data_out & write_fifo_data_out; - - write_fifo_re <= u_req_wr and (not write_fifo_empty); - cat_fifo_re <= u_cmd_we; - read_fifo_re <= (not read_fifo_empty) and MRDY_I; - read_fifo_we <= u_data_vld; - read_fifo_data_in <= u_data_r(31 downto 0) when u_tag_rd(0) = '0' else u_data_r(63 downto 32); - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd deleted file mode 100644 index 8d4a9a4..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd +++ /dev/null @@ -1,237 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: Top-level put all together --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.sdram_config.all; -use work.sdram_types.all; - -entity sdram_ctrl_top is - Generic - ( - BL : natural := 2; - f_sysclk : real := 100.0; - f_sdrclk : real := 100.0; - fifo_depth : natural := 3 - ); - Port - ( - sys_rst_in : in STD_LOGIC; - sys_clk_in : in STD_LOGIC; - - sdram_clk0_in : in STD_LOGIC; - sdram_clk270_in : in STD_LOGIC; - sdram_clk270_rd_in : in STD_LOGIC; - - -- User interface - u_data_vld : out STD_LOGIC; - u_data_req_w : out STD_LOGIC; - u_busy : out STD_LOGIC; - u_tag_in : in user_tag_t; - u_tag_rd : out user_tag_t; - u_tag_wr : out user_tag_t; - u_addr : in user_addr_t; - u_cmd : in user_cmd_t; - u_cmd_we : in STD_LOGIC; - u_data_wr : in unsigned(SDR_DATA_WIDTH-1 downto 0); - u_dm : in unsigned(SDR_DM_WIDTH-1 downto 0); - u_data_rd : out unsigned(SDR_DATA_WIDTH-1 downto 0); - - -- SDRAM signals - sd_clk_p : out STD_LOGIC; - sd_clk_n : out STD_LOGIC; - sd_cke : out STD_LOGIC; - sd_cs_n : out STD_LOGIC; - sd_cas_n : out STD_LOGIC; - sd_ras_n : out STD_LOGIC; - sd_we_n : out STD_LOGIC; - sd_addr : out sdr_addr_t; - sd_ba : out sdr_ba_t; - sd_dm : out unsigned(DDR_DM_WIDTH-1 downto 0); - sd_dqs : inout unsigned(DDR_DQS_WIDTH-1 downto 0); - sd_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0) - - ); -end sdram_ctrl_top; - -architecture rtl of sdram_ctrl_top is - - - signal phy_ctrl : phy_ctrl_t; - - signal u_tag : user_tag_t; - signal sd_cmd_in : sdr_cmd_t; - signal sd_cmd : sdr_cmd_t; - signal sd_cmd_we : std_logic; - signal cmd_ctrl : sdr_cmd_lines_t; - signal cke : std_logic; - signal ba : unsigned(DDR_BANK_WIDTH-1 downto 0); - signal addr : unsigned(DDR_ADDR_WIDTH-1 downto 0); - - -- Clock generator - - signal part_ctrl : part_ctrl_t; - - -- SD command FIFO - - constant CMD_FIFO_DATA_WIDTH : positive := user_tag_t'length + 4 + mode_word_t'length + col_addr_t'length; - signal cmd_fifo_din : unsigned(CMD_FIFO_DATA_WIDTH-1 downto 0); - signal cmd_fifo_dout : unsigned(CMD_FIFO_DATA_WIDTH-1 downto 0); - signal cmd_fifo_re : std_logic; - signal cmd_fifo_we : std_logic; - signal cmd_fifo_full : std_logic; - signal cmd_fifo_empty : std_logic; - - alias tag_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length); - alias cmd_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-user_tag_t'length-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4); - alias mode_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length); - alias col_fifo_in is cmd_fifo_din(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length-1 downto 0); - - alias sd_tag_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length); - alias sd_cmd_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-user_tag_t'length-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4); - alias sd_mode_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-1 downto CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length); - alias sd_col_fifo_out is cmd_fifo_dout(CMD_FIFO_DATA_WIDTH-user_tag_t'length-4-mode_word_t'length-1 downto 0); - -begin - - --------------------------------- - part_ctrl.cmd <= cmd_ctrl; - part_ctrl.ba <= ba; - part_ctrl.addr <= addr; - part_ctrl.cke <= cke; - - --------------------------------- - sd_cmd_we <= not cmd_fifo_empty; - cmd_fifo_in <= to_unsigned(sd_cmd_in, 4); - sd_cmd <= sdr_cmd_t(to_integer(sd_cmd_fifo_out)); - - --------------------------------- - - -- Main controller - inst_sdram_ctrl : entity work.sdram_ctrl - Generic map - ( - f_sysclk => f_sysclk, - BL => BL - ) - Port map - ( - rst => sys_rst_in, - clk => sys_clk_in, - u_busy => u_busy, - u_tag_in => u_tag_in, - u_tag_out => tag_fifo_in, - u_cmd => u_cmd, - u_cmd_we => u_cmd_we, - u_addr => u_addr, - sdr_cmd_busy => cmd_fifo_full, - sdr_cmd => sd_cmd_in, - sdr_cmd_we => cmd_fifo_we, - col_addr => col_fifo_in, - sdr_mode => mode_fifo_in, - sdr_cke => cke - ); - - -- Instantiate synchronous FIFO - inst_sd_cmd_fifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => CMD_FIFO_DATA_WIDTH - ) - PORT MAP - ( - rst => sys_rst_in, - clk_w => sys_clk_in, - clk_r => sdram_clk0_in, - we => cmd_fifo_we, - re => cmd_fifo_re, - fifo_full => cmd_fifo_full, - fifo_empty => cmd_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => cmd_fifo_din, - data_r => cmd_fifo_dout - ); - - -- DDR SDRAM command fsm - inst_sdram_cmd : entity work.sdram_cmd - Generic map - ( - f_sdrclk => f_sdrclk, - BL => BL - ) - Port map - ( - rst => sys_rst_in, - clk => sdram_clk0_in, - u_tag_in => sd_tag_fifo_out, - u_tag_out => u_tag, - phy_ctrl => phy_ctrl, - enable => cke, - cmd => sd_cmd, - cmd_we => sd_cmd_we, - cmd_ack => cmd_fifo_re, - sdr_cmd_ctrl => cmd_ctrl, - col_addr => sd_col_fifo_out, - mode_word => sd_mode_fifo_out, - sdr_ba => ba, - sdr_addr => addr - ); - - -- DDR phy - inst_ddr_phy : entity work.ddr_phy - Port map - ( - sys_rst => sys_rst_in, - sys_clk0 => sdram_clk0_in, - sys_clk270 => sdram_clk270_in, - u_tag_in => u_tag, - u_tag_rd => u_tag_rd, - u_tag_wr => u_tag_wr, - read_clk => sdram_clk270_rd_in, - phy_ctrl => phy_ctrl, - part_ctrl => part_ctrl, - sdr_data_req_w => u_data_req_w, - sdr_data_w => u_data_wr, - sdr_dm => u_dm, - sdr_data_r => u_data_rd, - sdr_data_vld => u_data_vld, - part_clk_p => sd_clk_p, - part_clk_n => sd_clk_n, - part_addr => sd_addr, - part_ba => sd_ba, - part_dm => sd_dm, - part_dqs => sd_dqs, - part_data => sd_data, - part_cs_n => sd_cs_n, - part_we_n => sd_we_n, - part_cas_n => sd_cas_n, - part_ras_n => sd_ras_n, - part_cke => sd_cke - ); - -end architecture rtl; - diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd deleted file mode 100644 index 5520b28..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd +++ /dev/null @@ -1,130 +0,0 @@ -------------------------------------------------------------------------- --- Project: SDRAM controller --- This file: Type definitions --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; -USE IEEE.MATH_REAL.ALL; - -use work.sdram_config.all; - -package sdram_types is - - ----------------------------------------------------------------------------------------- - -- Table of Timing Parameters as a function of operation - - -- Derived constants from sdram_config - - constant DDR_DQS_WIDTH : positive := DDR_DATA_WIDTH / 8; -- Number of data strobe lines - constant DDR_DM_WIDTH : positive := DDR_DATA_WIDTH / 8; -- Number of Data Mask Lines - constant SDR_DATA_WIDTH : positive := 2*DDR_DATA_WIDTH; -- - constant SDR_DM_WIDTH : positive := 2*DDR_DM_WIDTH; -- - - subtype user_cmd_t is unsigned(1 downto 0); - constant UCMD_NOP : user_cmd_t := "00"; - constant UCMD_READ : user_cmd_t := "01"; - constant UCMD_WRITE : user_cmd_t := "10"; - constant UCMD_LMR : user_cmd_t := "11"; - - subtype sdr_cmd_t is natural range 0 to 9; - constant SD_DESELECT : sdr_cmd_t := 0; - constant SD_NOP : sdr_cmd_t := 1; - constant SD_LMR : sdr_cmd_t := 2; - constant SD_ACT : sdr_cmd_t := 3; - constant SD_READ : sdr_cmd_t := 4; - constant SD_WRITE : sdr_cmd_t := 5; - constant SD_PRE : sdr_cmd_t := 6; - constant SD_BST : sdr_cmd_t := 7; - constant SD_AR : sdr_cmd_t := 8; - constant SD_SR : sdr_cmd_t := 9; - - type sdr_state_t is (PWR_DOWN, PRECHARGE, MODE, IDLE, ROW_ACT, WRITE, WRITE_A, READ, READ_A, BURST_STOP, SELF_REF, AUTO_REF, PRE_PWR_DOWN, ACT_PWR_DOWN); - subtype user_addr_t is unsigned(DDR_BANK_WIDTH+DDR_ROW_ADDR_WIDTH+DDR_COL_ADDR_WIDTH-1 downto 0); - subtype sdr_addr_t is unsigned(DDR_ADDR_WIDTH-1 downto 0); - subtype sdr_ba_t is unsigned(DDR_BANK_WIDTH-1 downto 0); - subtype mode_word_t is unsigned(DDR_ADDR_WIDTH+DDR_BANK_WIDTH-1 downto 0); - - subtype bank_addr_t is unsigned(DDR_BANK_WIDTH-1 downto 0); - subtype row_addr_t is unsigned(DDR_ADDR_WIDTH-1 downto 0); - subtype col_addr_t is unsigned(8 downto 0); - - type phy_ctrl_t is - record - drive_en : std_logic; - re : std_logic; - we : std_logic; - utag_we : std_logic; - end record phy_ctrl_t; - - type sdr_cmd_lines_t is - record - cs_n : std_logic; - ras_n : std_logic; - cas_n : std_logic; - we_n : std_logic; - end record sdr_cmd_lines_t; - - type part_ctrl_t is - record - cmd : sdr_cmd_lines_t; - ba : unsigned(DDR_BANK_WIDTH-1 downto 0); - addr : unsigned(DDR_ADDR_WIDTH-1 downto 0); - cke : std_logic; - end record part_ctrl_t; - - type part_cmd_array_t is array (sdr_cmd_t) of sdr_cmd_lines_t; - constant COMMAND : part_cmd_array_t := - -- command cs_n ras_qn cas_qn we_qn - ( SD_DESELECT => ( '1', '1', '1', '1'), - SD_NOP => ( '0', '1', '1', '1'), - SD_LMR => ( '0', '0', '0', '0'), - SD_ACT => ( '0', '0', '1', '1'), - SD_READ => ( '0', '1', '0', '1'), - SD_WRITE => ( '0', '1', '0', '0'), - SD_PRE => ( '0', '0', '1', '0'), - SD_BST => ( '0', '1', '1', '0'), - SD_AR => ( '0', '0', '0', '1'), - SD_SR => ( '0', '0', '0', '1') - ); - - type init_seq_t is - record - cmd : sdr_cmd_t; - mode_word : mode_word_t; - wait_cycle : natural; - end record init_seq_t; - - function to_cycles(T_ns : real; f_Mhz : real) return natural; - -end sdram_types; - -package body sdram_types is - - function to_cycles(T_ns : real; f_Mhz : real) return natural is - begin - - return natural(ceil(1.0E-3*T_ns*f_Mhz)); - - end to_cycles; - -end sdram_types; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd deleted file mode 100644 index fdfd07d..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd +++ /dev/null @@ -1,871 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity tb_sdram_ctrl_frontend64_wb is -end; - -architecture struct of tb_sdram_ctrl_frontend64_wb is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant SDCLK_PERIOD : time := 7.5 ns; - constant BURST_LEN : natural := 2; - - signal rst : std_logic := '1'; - signal clk : std_logic := '1'; - signal sdclk : std_logic := '1'; - signal locked : std_logic; - signal error : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal CLK_O : std_logic; - signal CLK0_O : std_logic; - signal CLK270_O : std_logic; - signal CLK270VAR_O : std_logic; - signal RST_O : std_logic; - signal CYC_O : std_logic := '0'; - signal STB_O : std_logic := '0'; - signal WE_O : std_logic := '0'; - signal SEL_O : unsigned(SDR_DM_WIDTH-1 downto 0); - signal ACK_I : std_logic; - signal MRDY_O : std_logic := '1'; - signal SRDY_I : std_logic; - signal ADDR_O : unsigned(31 downto 0) := (others => '-'); - signal DAT_I : unsigned(SDR_DATA_WIDTH-1 downto 0); - signal DAT_O : unsigned(SDR_DATA_WIDTH-1 downto 0); - - signal dout_rst : std_logic := '0'; - signal dout_reg : unsigned(31 downto 0); - signal dout_cnt : natural range 0 to 255; - - signal sddat : unsigned(31 downto 0) := (others => '-'); - signal sdsel : unsigned(3 downto 0) := (others => '1'); - - type sd_cmd_t is (nop, lmr, ar, pre, act, write, read, bst); - signal sd_cmd : sd_cmd_t; - -begin - - process(part_cs_n, part_ras_n, part_cas_n, part_we_n) - variable cmd : unsigned (2 downto 0); - - begin - cmd := part_ras_n & part_cas_n & part_we_n; - sd_cmd <= nop; - if part_cs_n = '0' then - case cmd is - when "000" => - sd_cmd <= lmr; - when "001" => - sd_cmd <= ar; - when "010" => - sd_cmd <= pre; - when "011" => - sd_cmd <= act; - when "100" => - sd_cmd <= write; - when "101" => - sd_cmd <= read; - when "110" => - sd_cmd <= bst; - when "111" => - sd_cmd <= nop; - - when others => - sd_cmd <= nop; - - end case; - end if; - end process; - -inst_clockgen : entity work.clockgen - GENERIC MAP - ( - clk_in_freq => 100.0, - clk0_out_phaseshift => 0, - clk1_out_phaseshift => 0 - ) - PORT MAP - ( - -- Clocks and Reset - rst => rst, -- external async reset, low active - clk_in => sdclk, -- system clock (e.g. 100MHz), from board - clk_fb_in => clk_fb, -- feedback clock - clk0_0_out => CLK0_O, -- System clock #0, dcm#0 output 0° - clk0_270_out => CLK270_O, -- System clock #0, dcm#0 output 270° - clk1_0_out => open, -- System clock #1 (e.g. clock for DDR-SDRAM data capture), dcm#1 output 0° - clk1_270_out => CLK270VAR_O, -- System clock #1 (e.g. clock for DDR-SDRAM data capture), dcm#1 output 270° - locked_out => locked, -- DCM locked status - error_out => error - ); - - clk_fb <= part_clk_p after 1 ns; - CLK_O <= clk; - RST_O <= not locked; - DAT_O <= X"DEADBEEF" & sddat; - SEL_O <= "0000" & sdsel; - - -- DDR SDRAM Controller Core - sdram_ctrl_frontend64_wb : entity work.sdram_ctrl_frontend64_wb - GENERIC MAP - ( - BL => BURST_LEN, - f_sysclk => 100.000, - f_sdrclk => 133.333, - fifo_depth => 4 - ) - PORT MAP - ( - RST_I => RST_O, - CLK_I => CLK_O, - SDRAM_CLK0_I => CLK0_O, - SDRAM_CLK270_I => CLK270_O, - SDRAM_CLK270VAR_I => CLK270VAR_O, - CYC_I => CYC_O, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_I, - SRDY_O => SRDY_I, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_I, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model -i_mt46v16m16_0 : entity work.mt46v16m16 - port map - ( - dq => std_logic_vector(part_data(15 downto 0)), - dqs => std_logic_vector(part_dqs(1 downto 0)), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm(1 downto 0)) - ); - - -- MICRON DDR SDRAM Simulation Model -i_mt46v16m16_1 : entity work.mt46v16m16 - port map - ( - dq => std_logic_vector(part_data(31 downto 16)), - dqs => std_logic_vector(part_dqs(3 downto 2)), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm(3 downto 2)) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - -SDCLK_GEN: process - begin - wait for SDCLK_PERIOD/2; - sdclk <= not sdclk; - end process; - -read_register: - process(CLK_O) - begin - if rising_edge(CLK_O) then - if dout_rst = '1' then - dout_cnt <= 0; - elsif ACK_I = '1' and WE_O = '0' then - dout_reg <= DAT_I(31 downto 0); - dout_cnt <= dout_cnt + 1; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- - -STIMULUS: process - - begin - - wait for 3*CLK_PERIOD; - rst <= '0'; - - wait until RST_O = '0'; - -- 8 single cycles - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sddat <= X"1234_0000"; - ADDR_O <= X"0000_0000"; - - for i in 0 to 8192 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - wait until rising_edge(CLK_O); - -- 1-word burst cycle - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "0011"; - ADDR_O <= X"0000_0080"; - sddat <= X"DEADBEEF"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - wait until rising_edge(CLK_O); - -- 1-word burst cycle - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0080"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O) and ACK_I = '1'; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"1111_0000"; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"2222_0000"; - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"3333_0000"; - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"4444_0000"; - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"1111_0000"; - ADDR_O <= X"0000_1000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"2222_0000"; - ADDR_O <= X"0000_1400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"3333_0000"; - ADDR_O <= X"0000_1800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - sdsel <= "1111"; - sddat <= X"4444_0000"; - ADDR_O <= X"0000_1C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - sddat <= sddat + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - end loop; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd b/lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd deleted file mode 100644 index 9673d37..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd +++ /dev/null @@ -1,867 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: cpu_embedded using cpu_core and rom --- --- Copyright (C) 2007 J. Ahrensfeld --- --- This program is free software: you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation, either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program. If not, see . --- --- For questions and ideas, please contact the author at jens@jayfield.org --- --------------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -use work.fifo_ctrl_pkg.all; -use work.sdram_config.all; -use work.sdram_types.all; - -entity tb_sdram_ctrl_frontend_wb is -end; - -architecture struct of tb_sdram_ctrl_frontend_wb is - - -- Number of user data words for simulation - constant CLK_PERIOD : time := 10 ns; - constant SDCLK_PERIOD : time := 8 ns; - constant BURST_LEN : natural := 2; - - signal rst : std_logic := '1'; - signal clk : std_logic := '1'; - signal sdclk : std_logic := '1'; - signal locked : std_logic; - signal error : std_logic; - signal clk_out : std_logic; - signal clk_fb : std_logic; - signal part_clk_p : std_logic; - signal part_clk_n : std_logic; - signal part_cke : std_logic; - signal part_cs_n : std_logic; - signal part_we_n : std_logic; - signal part_ras_n : std_logic; - signal part_cas_n : std_logic; - signal part_ba : unsigned(DDR_BANK_WIDTH-1 downto 0) := (others => '0'); - signal part_dm : unsigned(DDR_DM_WIDTH-1 downto 0) := (others => '0'); - signal part_dqs : unsigned(DDR_DQS_WIDTH-1 downto 0) := (others => '0'); - signal part_addr : unsigned(DDR_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal part_data : unsigned(DDR_DATA_WIDTH-1 downto 0) := (others => '0'); - - signal CLK_O : std_logic; - signal CLK0_O : std_logic; - signal CLK270_O : std_logic; - signal CLK270VAR_O : std_logic; - signal RST_O : std_logic; - signal CYC_O : std_logic := '0'; - signal STB_O : std_logic := '0'; - signal WE_O : std_logic := '0'; - signal SEL_O : unsigned(3 downto 0) := (others => '1'); - signal ACK_I : std_logic; - signal MRDY_O : std_logic := '1'; - signal SRDY_I : std_logic; - signal ADDR_O : unsigned(31 downto 0) := (others => '-'); - signal DAT_I : unsigned(31 downto 0); - signal DAT_O : unsigned(31 downto 0) := (others => '-'); - - signal dout_rst : std_logic := '0'; - signal dout_reg : unsigned(31 downto 0); - signal dout_cnt : natural range 0 to 255; - - type sd_cmd_t is (nop, lmr, ar, pre, act, write, read, bst); - signal sd_cmd : sd_cmd_t; - -begin - - process(part_cs_n, part_ras_n, part_cas_n, part_we_n) - variable cmd : unsigned (2 downto 0); - - begin - cmd := part_ras_n & part_cas_n & part_we_n; - sd_cmd <= nop; - if part_cs_n = '0' then - case cmd is - when "000" => - sd_cmd <= lmr; - when "001" => - sd_cmd <= ar; - when "010" => - sd_cmd <= pre; - when "011" => - sd_cmd <= act; - when "100" => - sd_cmd <= write; - when "101" => - sd_cmd <= read; - when "110" => - sd_cmd <= bst; - when "111" => - sd_cmd <= nop; - - when others => - sd_cmd <= nop; - - end case; - end if; - end process; - -inst_clockgen : entity work.clockgen - GENERIC MAP - ( - clk_in_freq => 100.0, - clk0_out_phaseshift => 0, - clk1_out_phaseshift => 0 - ) - PORT MAP - ( - -- Clocks and Reset - rst => rst, -- external async reset, low active - clk_in => sdclk, -- system clock (e.g. 100MHz), from board - clk_fb_in => clk_fb, -- feedback clock - clk0_0_out => CLK0_O, -- System clock #0, dcm#0 output 0° - clk0_270_out => CLK270_O, -- System clock #0, dcm#0 output 270° - clk1_0_out => open, -- System clock #1 (e.g. clock for DDR-SDRAM data capture), dcm#1 output 0° - clk1_270_out => CLK270VAR_O, -- System clock #1 (e.g. clock for DDR-SDRAM data capture), dcm#1 output 270° - locked_out => locked, -- DCM locked status - error_out => error - ); - - clk_fb <= part_clk_p after 1 ns; - RST_O <= not locked; - CLK_O <= clk; - - -- DDR SDRAM Controller Core - sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend_wb - GENERIC MAP - ( - BL => BURST_LEN, - f_sysclk => 100.0, - f_sdrclk => 100.0, - fifo_depth => 4 - ) - PORT MAP - ( - RST_I => RST_O, - CLK_I => CLK_O, - SDRAM_CLK0_I => CLK0_O, - SDRAM_CLK270_I => CLK270_O, - SDRAM_CLK270VAR_I => CLK270VAR_O, - - CYC_I => CYC_O, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_I, - SRDY_O => SRDY_I, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_I, - - -- SDRAM signals - sd_clk_p => part_clk_p, - sd_clk_n => part_clk_n, - sd_cke => part_cke, - sd_cs_n => part_cs_n, - sd_cas_n => part_cas_n, - sd_ras_n => part_ras_n, - sd_we_n => part_we_n, - sd_addr => part_addr, - sd_ba => part_ba, - sd_dm => part_dm, - sd_dqs => part_dqs, - sd_data => part_data - - ); - - -- MICRON DDR SDRAM Simulation Model -i_mt46v16m16_0 : entity work.mt46v16m16 - port map - ( - dq => std_logic_vector(part_data(15 downto 0)), - dqs => std_logic_vector(part_dqs(1 downto 0)), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm(1 downto 0)) - ); - - -- MICRON DDR SDRAM Simulation Model -i_mt46v16m16_1 : entity work.mt46v16m16 - port map - ( - dq => std_logic_vector(part_data(31 downto 16)), - dqs => std_logic_vector(part_dqs(3 downto 2)), - addr => std_logic_vector(part_addr), - ba => std_logic_vector(part_ba), - clk => part_clk_p, - clk_n => part_clk_n, - cke => part_cke, - cs_n => part_cs_n, - ras_n => part_ras_n, - cas_n => part_cas_n, - we_n => part_we_n, - dm => std_logic_vector(part_dm(3 downto 2)) - ); - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - clk <= not clk; - end process; - -SDCLK_GEN: process - begin - wait for SDCLK_PERIOD/2; - sdclk <= not sdclk; - end process; - -read_register: - process(CLK_O) - begin - if rising_edge(CLK_O) then - if dout_rst = '1' then - dout_cnt <= 0; - elsif ACK_I = '1' and WE_O = '0' then - dout_reg <= DAT_I; - dout_cnt <= dout_cnt + 1; - end if; - end if; - end process; - ------------------------------------------------------------------------------------------- - -STIMULUS: process - - begin - - wait for 3*CLK_PERIOD; - rst <= '0'; - - wait until RST_O = '0'; - -- 8 single cycles - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - DAT_O <= X"1234_0000"; - ADDR_O <= X"0000_0000"; - - for i in 0 to 8192 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - wait until rising_edge(CLK_O); - -- 1-word burst cycle - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "0011"; - ADDR_O <= X"0000_0080"; - DAT_O <= X"DEADBEEF"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - wait until rising_edge(CLK_O); - -- 1-word burst cycle - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0080"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O) and ACK_I = '1'; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"1111_0000"; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"2222_0000"; - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"3333_0000"; - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"4444_0000"; - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"1111_0000"; - ADDR_O <= X"0000_1000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"2222_0000"; - ADDR_O <= X"0000_1400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"3333_0000"; - ADDR_O <= X"0000_1800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"4444_0000"; - ADDR_O <= X"0000_1C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - end loop; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - for k in 0 to 3 loop - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ --- wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_1C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - end loop; - - wait; - - end process; - -end architecture struct; diff --git a/lib/SDRAM/ddr_sdr_v1_5/todo.txt b/lib/SDRAM/ddr_sdr_v1_5/todo.txt deleted file mode 100644 index 62fe90a..0000000 --- a/lib/SDRAM/ddr_sdr_v1_5/todo.txt +++ /dev/null @@ -1,7 +0,0 @@ -2009-11-04 -- several async. resets recognized. Sync. resets better? - -2009-11-11 -- utag-stuff from ddr_phy to sdram_ctrl_top -- connect ddr_phy on top level to sdram_ctrl_frontend* -- u_data_req_r not nessecary (removed 2009-11-15) diff --git a/lib/SSRAM/sim/ModelSim SE .lnk b/lib/SSRAM/sim/ModelSim SE .lnk deleted file mode 100644 index 935209c2310801e57ad76e532c79f82bfed1afce..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1447 zcmdT^T}YEr7=ETR6bck4m`JV2iUm`r+58DyYAHE4Tre+2W^U;x&V^fU!IurZ$Zq;E z2{H<^3#FTGguF=wDXc4rs4lD|qVfl|5`!q}Ip4RfANslJrgM0I&U@aU=e*xJUo`-Y zE{+@+S2*@w;8IUL`Q%hUKQXDfdOa{NB<^eFx081@IJZ{u)TsV3Zqewl(LQ6F($5u1 z$pcRku_Gtv%6ep%6}e(g-;_PbRTj>|SH&r?*V^{gS~_VmARbyQjovn&>2ns=4C?4* zM>~9IB5#0~(?eT2Y9blN%pav>SZ(DM)dxCrjixf>M{WL!j`+Q23e0%laOKl=EbA*G&>qv{uM`k{AMEIw_uXYTNKoGNn^$ zbNhmRu)FqlUsHR7*Xwav1%QC3vAMp$XlisRr*QpZHIyh@# zVW(VB(H&B2_SaF0(Q@pl6!5gG3-Tk5?&X#(o2mw0#OWR#AH3Yr@c2$@_S2Np50G}# z-TnS=`#K(oXYJ2YKAxk>T3>0iR%HEzxB^*3^!v`m;QZH07W-~PIVyOk9H`=|9+k9M zY5DW{d*o1R5_Y3UE{eS3<<-%D-iz((U*eZ}qxD4n={E*#$?AF8Li!%h2<;+xdWCXU z-4pkDfp%SQSQfe%b+ZQT&5>{{Hs_rhr{zV_FRHrg2~16-qJ;j1{ku9l7F^+H@d?U1 z5kDw9?WIviN;7Bahf#>Vs4mYNw4oC#!7!XFZq64xZ59~YyWc*#9Wc9&d5x@YW?XD;1R-m&nB<`6Z)#$h~Uz45*-*-qat93tjm RW=T-I?F7Dwt(3k<=C3#96%+sf diff --git a/lib/SSRAM/sim/tb_ssram_frontend_wb.fdo b/lib/SSRAM/sim/tb_ssram_frontend_wb.fdo deleted file mode 100644 index 9aafbb0..0000000 --- a/lib/SSRAM/sim/tb_ssram_frontend_wb.fdo +++ /dev/null @@ -1,17 +0,0 @@ -## NOTE: Do not edit this file. -## -vlib work - -# Top and TB -vcom -explicit -93 "../src/package_utility.vhd" -vcom -explicit -93 "../src/CY7C1354B.vhd" -vcom -explicit -93 "../src/ssram_frontend_wb.vhd" -vcom -explicit -93 "../src/tb_ssram_frontend_wb.vhd" - -vsim -t 1ps -lib work tb_ssram_frontend_wb -do {tb_ssram_frontend_wb.wdo} -view wave -view structure -view signals -run 6us - \ No newline at end of file diff --git a/lib/SSRAM/sim/tb_ssram_frontend_wb.wdo b/lib/SSRAM/sim/tb_ssram_frontend_wb.wdo deleted file mode 100644 index 71718ed..0000000 --- a/lib/SSRAM/sim/tb_ssram_frontend_wb.wdo +++ /dev/null @@ -1,47 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_ssram_frontend_wb/clk_o -add wave -noupdate -format Logic /tb_ssram_frontend_wb/rst_o -add wave -noupdate -format Logic /tb_ssram_frontend_wb/cyc_o -add wave -noupdate -format Logic /tb_ssram_frontend_wb/stb_o -add wave -noupdate -format Logic /tb_ssram_frontend_wb/we_o -add wave -noupdate -format Literal /tb_ssram_frontend_wb/sel_o -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ack_i -add wave -noupdate -format Logic /tb_ssram_frontend_wb/mrdy_o -add wave -noupdate -format Logic /tb_ssram_frontend_wb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_ssram_frontend_wb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_ssram_frontend_wb/dat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_ssram_frontend_wb/dat_o -add wave -noupdate -format Literal -radix hexadecimal /tb_ssram_frontend_wb/ssram_d -add wave -noupdate -format Literal /tb_ssram_frontend_wb/ssram_dp -add wave -noupdate -format Literal -radix hexadecimal /tb_ssram_frontend_wb/ssram_a -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_clk -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_cke_n -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_adv -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_mode -add wave -noupdate -format Literal /tb_ssram_frontend_wb/ssram_bw_n -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_we_n -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_oe_n -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_ce_n -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_zz -add wave -noupdate -format Literal -radix hexadecimal /tb_ssram_frontend_wb/dout_reg -add wave -noupdate -format Literal -radix unsigned /tb_ssram_frontend_wb/dout_cnt -add wave -noupdate -format Literal /tb_ssram_frontend_wb/inst_ssram_frontend_wb/vld_pipe -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_clk_fb -add wave -noupdate -format Logic /tb_ssram_frontend_wb/ssram_clk -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {1343191 ps} 0} {{Cursor 2} {178651436 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {0 ps} {6300 ns} diff --git a/lib/SSRAM/src/CY7C1354B.vhd b/lib/SSRAM/src/CY7C1354B.vhd deleted file mode 100644 index d652656..0000000 --- a/lib/SSRAM/src/CY7C1354B.vhd +++ /dev/null @@ -1,388 +0,0 @@ ------------------------------------------------------------------------------------------ --- --- File Name: CY7C1354B.VHD --- Version: 2.0 --- Date: Nov 22nd, 2004 --- Model: BUS Functional --- --- --- Author: RKF --- Company: Cypress Semiconductor --- Model: CY7C1354B (256k x 36) --- Mode: Pipelined --- --- Description: NoBL SRAM VHDL Model --- --- Limitation: None --- --- Note: - BSDL Model available separately --- - Set simulator resolution to "ps" timescale --- --- Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY --- WHATSOEVER AND CYPRESS SPECIFICALLY DISCLAIMS ANY --- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR --- A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT. --- --- Copyright (c) 2004 Cypress Semiconductor --- All rights reserved --- --- Trademarks: NoBL and No Bus Latency are trademarks of Cypress Semiconductor --- --- Rev Author Date Changes --- --- -------- ------- ---------- --- 2.0 RKF 11/22/2004 - Second Release --- - Fully Tested with New Test Bench and Test Vectors ------------------------------------------------------------------------------------------ - -LIBRARY ieee,work; - USE ieee.std_logic_1164.all; - USE ieee.std_logic_unsigned.all; - Use IEEE.Std_Logic_Arith.all; --- Use work.all; - USE work.package_utility.all; - -ENTITY cy7c1354 IS - - GENERIC ( - - -- Constant parameters - addr_bits : INTEGER := 18; - data_bits : INTEGER := 32; - par_bits : INTEGER := 4; - - -- Timing parameters for -5 (225 Mhz) --- tCYC : TIME := 4.4 ns; --- tCH : TIME := 1.8 ns; --- tCL : TIME := 1.8 ns; --- tCO : TIME := 2.8 ns; --- tAS : TIME := 1.4 ns; --- tCENS : TIME := 1.4 ns; --- tWES : TIME := 1.4 ns; --- tDS : TIME := 1.4 ns; --- tAH : TIME := 0.4 ns; --- tCENH : TIME := 0.4 ns; --- tWEH : TIME := 0.4 ns; --- tDH : TIME := 0.4 ns - - - - -- Timing parameters for -6 (200 Mhz) - --tCYC : TIME := 5.0 ns; - --tCH : TIME := 2.0 ns; - --tCL : TIME := 2.0 ns; - --tCO : TIME := 3.2 ns; - --tAS : TIME := 1.5 ns; - --tCENS : TIME := 1.5 ns; - --tWES : TIME := 1.5 ns; - --tDS : TIME := 1.5 ns; - --tAH : TIME := 0.5 ns; - --tCENH : TIME := 0.5 ns; - --tWEH : TIME := 0.5 ns; - --tDH : TIME := 0.5 ns - - - -- Timing parameters for -7 (166 Mhz) - tCYC : TIME := 6.0 ns; - tCH : TIME := 2.4 ns; - tCL : TIME := 2.4 ns; - tCO : TIME := 3.5 ns; - tAS : TIME := 1.5 ns; - tCENS : TIME := 1.5 ns; - tWES : TIME := 1.5 ns; - tDS : TIME := 1.5 ns; - tAH : TIME := 0.5 ns; - tCENH : TIME := 0.5 ns; - tWEH : TIME := 0.5 ns; - tDH : TIME := 0.5 ns - - - - ); - - -- Port Declarations - PORT ( - Dq : INOUT STD_LOGIC_VECTOR ((data_bits - 1) DOWNTO 0); -- Data I/O - Dpq : INOUT STD_LOGIC_VECTOR ((par_bits - 1) DOWNTO 0); -- Data parity I/O - Addr : IN STD_LOGIC_VECTOR ((addr_bits - 1) DOWNTO 0); -- Address - Mode : IN STD_LOGIC := '1'; -- Burst Mode - Clk : IN STD_LOGIC; -- Clk - CEN_n : IN STD_LOGIC; -- CEN# - AdvLd_n : IN STD_LOGIC; -- Adv/Ld# - Bwa_n : IN STD_LOGIC; -- Bwa# - Bwb_n : IN STD_LOGIC; -- BWb# - Bwc_n : IN STD_LOGIC; -- Bwc# - Bwd_n : IN STD_LOGIC; -- BWd# - Rw_n : IN STD_LOGIC; -- RW# - Oe_n : IN STD_LOGIC; -- OE# - Ce1_n : IN STD_LOGIC; -- CE1# - Ce2 : IN STD_LOGIC; -- CE2 - Ce3_n : IN STD_LOGIC; -- CE3# - Zz : IN STD_LOGIC -- Snooze Mode - ); -END cy7c1354; - -ARCHITECTURE behave OF cy7c1354 IS - SIGNAL ce : STD_LOGIC := '0'; - SIGNAL doe : STD_LOGIC := '0'; - SIGNAL dout : STD_LOGIC_VECTOR ((data_bits - 1) DOWNTO 0) := (OTHERS => 'Z'); - SIGNAL dout_p : STD_LOGIC_VECTOR ((par_bits - 1) DOWNTO 0) := (OTHERS => 'Z'); - SIGNAL Addr_read_sig : STD_LOGIC_VECTOR ((addr_bits - 1) DOWNTO 0) := (OTHERS => 'Z'); - -BEGIN - - - ce <= NOT(Ce1_n) AND NOT(Ce3_n) AND Ce2; - - doe <= NOT(Oe_n) AND NOT(Zz); - - -- Output Buffers - WITH doe SELECT - Dq <= TRANSPORT dout AFTER (tCO) WHEN '1', - (OTHERS => 'Z') AFTER (tCO) WHEN OTHERS; - - WITH doe SELECT - Dpq <= TRANSPORT dout_p AFTER (tCO) WHEN '1', - (OTHERS => 'Z') AFTER (tCO) WHEN OTHERS; - - - -- Check for Clock Timing Violation - clk_check : PROCESS - VARIABLE clk_high, clk_low : TIME := 0 ns; - BEGIN - WAIT ON Clk; - IF Clk = '1' AND NOW >= tCYC THEN - ASSERT (NOW - clk_low >= tCH) - REPORT "Clk width low - tCH violation" - SEVERITY ERROR; - ASSERT (NOW - clk_high >= tCYC) - REPORT "Clk period high - tCYC violation" - SEVERITY ERROR; - clk_high := NOW; - ELSIF Clk = '0' AND NOW /= 0 ns THEN - ASSERT (NOW - clk_high >= tCL) - REPORT "Clk width high - tCL violation" - SEVERITY ERROR; - ASSERT (NOW - clk_low >= tCYC) - REPORT "Clk period low - tCYC violation" - SEVERITY ERROR; - clk_low := NOW; - END IF; - END PROCESS; - - -- Check for Setup Timing Violation - setup_check : PROCESS - BEGIN - WAIT ON Clk; - IF Clk = '1' and (Ce1_n = '0' and Ce2 = '1' and Ce3_n = '0') THEN - ASSERT (Addr'LAST_EVENT >= tAS) - REPORT "Addr - tAS violation" - SEVERITY ERROR; - ASSERT (CEN_n'LAST_EVENT >= tCENS) - REPORT "CKE# - tCENS violation" - SEVERITY ERROR; - ASSERT (Ce1_n'LAST_EVENT >= tWES) - REPORT "CE1# - tWES violation" - SEVERITY ERROR; - ASSERT (Ce2'LAST_EVENT >= tWES) - REPORT "CE2 - tWES violation" - SEVERITY ERROR; - ASSERT (Ce3_n'LAST_EVENT >= tWES) - REPORT "CE3# - tWES violation" - SEVERITY ERROR; - ASSERT (AdvLd_n'LAST_EVENT >= tWES) - REPORT "ADV/LD# - tWES violation" - SEVERITY ERROR; - ASSERT (Rw_n'LAST_EVENT >= tWES) - REPORT "RW# - tWES violation" - SEVERITY ERROR; - ASSERT (Bwa_n'LAST_EVENT >= tWES) - REPORT "BWa# - tWES violation" - SEVERITY ERROR; - ASSERT (Bwb_n'LAST_EVENT >= tWES) - REPORT "BWb# - tWES violation" - SEVERITY ERROR; - ASSERT (Bwc_n'LAST_EVENT >= tWES) - REPORT "BWc# - tWES violation" - SEVERITY ERROR; - ASSERT (Bwd_n'LAST_EVENT >= tWES) - REPORT "BWd# - tWES violation" - SEVERITY ERROR; - ASSERT (Dq'LAST_EVENT >= tDS) - REPORT "Dq - tDS violation" - SEVERITY ERROR; - END IF; - END PROCESS; - - -- Check for Hold Timing Violation - hold_check : PROCESS - BEGIN - WAIT ON Clk'DELAYED(tAH), Clk'DELAYED(tCENH), Clk'DELAYED(tWEH), Clk'DELAYED(tDH); - IF Clk'DELAYED(tAH) = '1' THEN - ASSERT (Addr'LAST_EVENT > tAH) - REPORT "Addr - tAH violation" - SEVERITY ERROR; - END IF; - IF Clk'DELAYED(tCENH) = '1' THEN - ASSERT (CEN_n'LAST_EVENT > tCENH) - REPORT "CKE# - tCENH violation" - SEVERITY ERROR; - END IF; - IF Clk'DELAYED(tDH) = '1' THEN - ASSERT (Dq'LAST_EVENT > tDH) - REPORT "Dq - tDH violation" - SEVERITY ERROR; - END IF; - IF Clk'DELAYED(tWEH) = '1' THEN - ASSERT (Ce1_n'LAST_EVENT > tWEH) - REPORT "CE1# - tWEH violation" - SEVERITY ERROR; - ASSERT (Ce2'LAST_EVENT > tWEH) - REPORT "CE2 - tWEH violation" - SEVERITY ERROR; - ASSERT (Ce3_n'LAST_EVENT > tWEH) - REPORT "CE3 - tWEH violation" - SEVERITY ERROR; - ASSERT (AdvLd_n'LAST_EVENT > tWEH) - REPORT "ADV/LD# - tWEH violation" - SEVERITY ERROR; - ASSERT (Rw_n'LAST_EVENT > tWEH) - REPORT "RW# - tWEH violation" - SEVERITY ERROR; - ASSERT (Bwa_n'LAST_EVENT > tWEH) - REPORT "BWa# - tWEH violation" - SEVERITY ERROR; - ASSERT (Bwb_n'LAST_EVENT > tWEH) - REPORT "BWb# - tWEH violation" - SEVERITY ERROR; - ASSERT (Bwc_n'LAST_EVENT > tWEH) - REPORT "BWc# - tWEH violation" - SEVERITY ERROR; - ASSERT (Bwd_n'LAST_EVENT > tWEH) - REPORT "BWd# - tWEH violation" - SEVERITY ERROR; - END IF; - - END PROCESS; - - -- Main Program - main : PROCESS - - TYPE memory_array IS ARRAY ((2**addr_bits) - 1 DOWNTO 0) OF STD_LOGIC_VECTOR (((data_bits+par_bits) / 4) - 1 DOWNTO 0); - - VARIABLE Addr_in : STD_LOGIC_VECTOR ((addr_bits - 1) DOWNTO 0) := (OTHERS => '0'); - VARIABLE first_Addr : STD_LOGIC_VECTOR (1 DOWNTO 0) := (OTHERS => '0'); - VARIABLE Addr_read : STD_LOGIC_VECTOR ((addr_bits - 1) DOWNTO 0) := (OTHERS => '0'); - VARIABLE Addr_write : STD_LOGIC_VECTOR ((addr_bits - 1) DOWNTO 0) := (OTHERS => '0'); - VARIABLE bAddr0, bAddr1 : STD_LOGIC := '0'; - VARIABLE bank0 : memory_array; - VARIABLE bank1 : memory_array; - VARIABLE bank2 : memory_array; - VARIABLE bank3 : memory_array; - - VARIABLE ce_in : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"; - VARIABLE rw_in : STD_LOGIC_VECTOR (2 DOWNTO 0) := "111"; - VARIABLE bwa_in : STD_LOGIC_VECTOR (2 DOWNTO 0) := "000"; - VARIABLE bwb_in : STD_LOGIC_VECTOR (2 DOWNTO 0) := "000"; - VARIABLE bwc_in : STD_LOGIC_VECTOR (2 DOWNTO 0) := "000"; - VARIABLE bwd_in : STD_LOGIC_VECTOR (2 DOWNTO 0) := "000"; - VARIABLE bcnt : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00"; - - BEGIN - WAIT ON Clk; - IF Clk'EVENT AND Clk = '1' THEN - IF CEN_n = '0' AND Zz = '0' THEN - -- Write Address Register - Addr_write := Addr_read; - - -- Read Address Register - Addr_read := Addr_in ((addr_bits - 1) DOWNTO 2) & bAddr1 & bAddr0; - - -- Address Register - IF AdvLd_n = '0' and ce = '1' THEN - Addr_in := Addr; - first_Addr := Addr(1 DOWNTO 0); - bcnt := Addr(1 DOWNTO 0); - END IF; - - - -- Burst Logic - IF Mode = '0' AND AdvLd_n = '1' THEN - bcnt := bcnt + 1; - ELSIF Mode = '1' AND AdvLd_n = '1' THEN - IF (CONV_INTEGER1 (first_Addr) REM 2 = 0) THEN - bcnt := bcnt + 1; - ELSIF (CONV_INTEGER1 (first_Addr) REM 2 = 1) THEN - bcnt := bcnt - 1; - END IF; - END IF; - - - bAddr1 := bcnt (1); - bAddr0 := bcnt (0); - - -- Read Logic - ce_in (0) := ce_in (1); - - IF AdvLd_n = '0' THEN - ce_in (1) := ce; - END IF; - - rw_in (0) := rw_in (1); - rw_in (1) := rw_in (2); - - IF AdvLd_n = '0' THEN - rw_in (2) := NOT(ce AND NOT(Rw_n)); - END IF; - - -- Write Registry and Data Coherency Control Logic - bwa_in (0) := bwa_in (1); - bwb_in (0) := bwb_in (1); - bwc_in (0) := bwc_in (1); - bwd_in (0) := bwd_in (1); - bwa_in (1) := bwa_in (2); - bwb_in (1) := bwb_in (2); - bwc_in (1) := bwc_in (2); - bwd_in (1) := bwd_in (2); - bwa_in (2) := Bwa_n; - bwb_in (2) := Bwb_n; - bwc_in (2) := Bwc_n; - bwd_in (2) := Bwd_n; - - -- Write Data to Memory - IF rw_in (0) = '0' AND bwa_in (0) = '0' THEN - bank0 (CONV_INTEGER1 (Addr_write)) := Dpq(0) & Dq ( (data_bits / 4) - 1 DOWNTO 0); - END IF; - IF rw_in (0) = '0' AND bwb_in (0) = '0' THEN - bank1 (CONV_INTEGER1 (Addr_write)) := Dpq(1) & Dq ((data_bits / 2 - 1) DOWNTO (data_bits / 4)); - END IF; - IF rw_in (0) = '0' AND bwc_in (0) = '0' THEN - bank2 (CONV_INTEGER1 (Addr_write)) := Dpq(2) & Dq ((3 * (data_bits / 4)) - 1 DOWNTO (data_bits / 2)); - END IF; - IF rw_in (0) = '0' AND bwd_in (0) = '0' THEN - bank3 (CONV_INTEGER1 (Addr_write)) := Dpq(3) & Dq (data_bits - 1 DOWNTO (3 * (data_bits / 4))); - END IF; - END IF; - - Addr_read_sig <= Addr_read; - - -- Read Data from Memory Array - IF ce_in (0) = '1' AND rw_in (1) = '1' THEN - dout ((data_bits / 4) - 1 DOWNTO 0) <= bank0 (CONV_INTEGER1 (Addr_read))( (data_bits / 4) - 1 DOWNTO 0); - dout ((data_bits / 2 - 1) DOWNTO (data_bits / 4)) <= bank1 (CONV_INTEGER1 (Addr_read))( (data_bits / 4) - 1 DOWNTO 0); - dout ((3 * (data_bits / 4)) - 1 DOWNTO (data_bits / 2)) <= bank2 (CONV_INTEGER1 (Addr_read))( (data_bits / 4) - 1 DOWNTO 0); - dout (data_bits - 1 DOWNTO (3 * (data_bits / 4))) <= bank3 (CONV_INTEGER1 (Addr_read))( (data_bits / 4) - 1 DOWNTO 0); - dout_p(0) <= bank0 (CONV_INTEGER1 (Addr_read))(data_bits / 4); - dout_p(1) <= bank1 (CONV_INTEGER1 (Addr_read))(data_bits / 4); - dout_p(2) <= bank2 (CONV_INTEGER1 (Addr_read))(data_bits / 4); - dout_p(3) <= bank3 (CONV_INTEGER1 (Addr_read))(data_bits / 4); - ELSE - dout <= (OTHERS => 'Z'); - dout_p <= (OTHERS => 'Z'); - END IF; - END IF; - END PROCESS; - -END behave; - - - diff --git a/lib/SSRAM/src/package_utility.vhd b/lib/SSRAM/src/package_utility.vhd deleted file mode 100644 index 9fb543f..0000000 --- a/lib/SSRAM/src/package_utility.vhd +++ /dev/null @@ -1,73 +0,0 @@ ---**************************************************************** ---** MODEL : package_utility ** ---** COMPANY : Cypress Semiconductor ** ---** REVISION: 1.0 Created new package utility model ** ---** ** ---**************************************************************** -Library ieee,work; - Use ieee.std_logic_1164.all; - Use IEEE.Std_Logic_Arith.all; - Use IEEE.std_logic_TextIO.all; - --- Use work.package_timing.all; - -Library Std; - Use STD.TextIO.all; - -Package package_utility is - -FUNCTION convert_string( S: in STRING) RETURN STD_LOGIC_VECTOR; -FUNCTION CONV_INTEGER1(S : STD_LOGIC_VECTOR) RETURN INTEGER; - -End; -- package package_utility - -Package body package_utility is - - ------------------------------------------------------------------------------------------------- ---Converts string into std_logic_vector ------------------------------------------------------------------------------------------------- - -FUNCTION convert_string(S: in STRING) RETURN STD_LOGIC_VECTOR IS - VARIABLE result : STD_LOGIC_VECTOR(S'RANGE); - BEGIN - FOR i IN S'RANGE LOOP - IF S(i) = '0' THEN - result(i) := '0'; - ELSIF S(i) = '1' THEN - result(i) := '1'; - ELSIF S(i) = 'X' THEN - result(i) := 'X'; - ELSE - result(i) := 'Z'; - END IF; - END LOOP; - RETURN result; -END convert_string; - ------------------------------------------------------------------------------------------------- ---Converts std_logic_vector into integer ------------------------------------------------------------------------------------------------- - -FUNCTION CONV_INTEGER1(S : STD_LOGIC_VECTOR) RETURN INTEGER IS - VARIABLE result : INTEGER := 0; - BEGIN - FOR i IN S'RANGE LOOP - IF S(i) = '1' THEN - result := result + (2**i); - ELSIF S(i) = '0' THEN - result := result; - ELSE - result := 0; - END IF; - END LOOP; - RETURN result; - END CONV_INTEGER1; - - - - -end package_utility; - - - - diff --git a/lib/SSRAM/src/ssram_frontend_wb.vhd b/lib/SSRAM/src/ssram_frontend_wb.vhd deleted file mode 100644 index 056b328..0000000 --- a/lib/SSRAM/src/ssram_frontend_wb.vhd +++ /dev/null @@ -1,181 +0,0 @@ -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -Library UNISIM; -use UNISIM.vcomponents.all; - -ENTITY ssram_frontend_wb IS - Generic - ( - latency : natural := 2; -- clock cycles - addr_width : natural := 20; - data_width : natural := 32; - parity_width : natural := 4 - ); - Port - ( - -- J-Bus domain - CLK_I : in STD_LOGIC; - RST_I : in STD_LOGIC; - CYC_I : in STD_LOGIC; - STB_I : in STD_LOGIC; - SEL_I : in unsigned(3 downto 0); - WE_I : in STD_LOGIC; - ACK_O : out STD_LOGIC; - SRDY_O : out STD_LOGIC; - MRDY_I : in STD_LOGIC; - ADDR_I : in unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - - -- Sync SRAM domain - ssram_clk_o : out std_logic; - ssram_clk_fb : in std_logic; - ssram_cke_n : out std_logic; - ssram_ce_n : out std_logic; - ssram_oe_n : out std_logic; - ssram_we_n : out std_logic; - ssram_adv : out std_logic; - ssram_mode : out std_logic; - ssram_zz : out std_logic; - ssram_a : out unsigned(addr_width-1 downto 0); - ssram_d : inout unsigned(data_width-1 downto 0); - ssram_dp : inout unsigned(parity_width-1 downto 0); - ssram_bw_n : out unsigned(3 downto 0) - ); -END ssram_frontend_wb; - -ARCHITECTURE behavior OF ssram_frontend_wb IS - - constant topad : time := 3 ns; - subtype ssram_d_t is unsigned(data_width+parity_width-1 downto 0); - type data_pipe_t is array (latency downto 0) of ssram_d_t; - - signal ssram_clk : std_logic; - signal dcm_locked : std_logic; - signal dcm_clk0 : std_logic; - signal dcm_clk1 : std_logic; - signal data_en : std_logic; - signal drive : std_logic; - signal vld_pipe : unsigned(latency downto 0); - signal drive_pipe : unsigned(latency downto 0); - signal data_pipe : data_pipe_t; - signal ssram_dout : ssram_d_t; - -begin - - SRDY_O <= CYC_I and dcm_locked; - ACK_O <= vld_pipe(vld_pipe'left); - DAT_O(data_width-1 downto 0) <= ssram_d; - - data_en <= CYC_I and STB_I; - ssram_dout <= "0000" & DAT_I(data_width-1 downto 0); - drive <= drive_pipe(drive_pipe'left); - - ssram_clk_o <= ssram_clk after topad; - ssram_cke_n <= not dcm_locked after topad; - ssram_oe_n <= not vld_pipe(vld_pipe'left-1) after topad; - -inst_clock_out : ODDR - generic map - ( - DDR_CLK_EDGE => "OPPOSITE_EDGE", -- "OPPOSITE_EDGE" or "SAME_EDGE" - INIT => '0', -- Initial value for Q port ('1' or '0') - SRTYPE => "SYNC" -- Reset Type ("ASYNC" or "SYNC") - ) - port map ( - Q => ssram_clk, -- 1-bit DDR output - C => dcm_clk1, -- 1-bit clock input - CE => '1', -- 1-bit clock enable input - D1 => '1', -- 1-bit data input (positive edge) - D2 => '0', -- 1-bit data input (negative edge) - R => '0', -- 1-bit reset input - S => '0' -- 1-bit set input - ); - -ssram_bufg: bufg - port map - ( - o => dcm_clk1, - i => dcm_clk0 - ); - -inst_DCM_BASE_0 : DCM_BASE - generic map ( - CLKDV_DIVIDE => 2.0, -- Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - -- 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - CLKFX_DIVIDE => 1, -- Can be any interger from 1 to 32 - CLKFX_MULTIPLY => 4, -- Can be any integer from 2 to 32 - CLKIN_DIVIDE_BY_2 => FALSE, -- TRUE/FALSE to enable CLKIN divide by two feature - CLKIN_PERIOD => 10.0 , -- Specify period of input clock in ns from 1.25 to 1000.00 - CLKOUT_PHASE_SHIFT => "FIXED", -- Specify phase shift mode of NONE or FIXED - CLK_FEEDBACK => "1X", -- Specify clock feedback of NONE or 1X - DCM_AUTOCALIBRATION => TRUE, -- DCM calibrartion circuitry TRUE/FALSE - DCM_PERFORMANCE_MODE => "MAX_SPEED", -- Can be MAX_SPEED or MAX_RANGE - DESKEW_ADJUST => "SOURCE_SYNCHRONOUS", -- SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - -- an integer from 0 to 15 - DFS_FREQUENCY_MODE => "LOW", -- LOW or HIGH frequency mode for frequency synthesis - DLL_FREQUENCY_MODE => "LOW", -- LOW, HIGH, or HIGH_SER frequency mode for DLL - DUTY_CYCLE_CORRECTION => TRUE, -- Duty cycle correction, TRUE or FALSE - FACTORY_JF => X"F0F0", -- FACTORY JF Values Suggested to be set to X"F0F0" - PHASE_SHIFT => 0, -- Amount of fixed phase shift from -255 to 1023 - STARTUP_WAIT => FALSE) -- Delay configuration DONE until DCM LOCK, TRUE/FALSE - port map ( - CLK0 => dcm_clk0, -- 0 degree DCM CLK ouptput - CLK180 => open, -- 180 degree DCM CLK output - CLK270 => open, -- 270 degree DCM CLK output - CLK2X => open, -- 2X DCM CLK output - CLK2X180 => open, -- 2X, 180 degree DCM CLK out - CLK90 => open, -- 90 degree DCM CLK output - CLKDV => open, -- Divided DCM CLK out (CLKDV_DIVIDE) - CLKFX => open, -- DCM CLK synthesis out (M/D) - CLKFX180 => open, -- 180 degree CLK synthesis out - LOCKED => dcm_locked, -- DCM LOCK status output - CLKFB => ssram_clk_fb, -- DCM clock feedback - CLKIN => CLK_I, -- Clock input (from IBUFG, BUFG or DCM) - RST => RST_I -- DCM asynchronous reset input - ); - - -data_valid_pipeline: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - vld_pipe <= (others => '0'); - else - vld_pipe <= vld_pipe(vld_pipe'left-1 downto 0) & (data_en and MRDY_I and not WE_I); - end if; - end if; - end process; - -data_out_pipeline: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - ssram_ce_n <= '1' after topad; - ssram_we_n <= '1' after topad; - ssram_adv <= '0' after topad; - ssram_mode <= '0' after topad; - ssram_zz <= '1' after topad; - drive_pipe <= (others => '0'); - elsif dcm_locked = '1' then - ssram_ce_n <= not data_en after topad; - ssram_we_n <= not (WE_I and data_en) after topad; - ssram_adv <= '0' after topad; - ssram_mode <= '0' after topad; - ssram_zz <= '0' after topad; - ssram_a <= ADDR_I(addr_width-1 downto 0) after topad; - ssram_bw_n <= not SEL_I after topad; - drive_pipe <= drive_pipe(drive_pipe'left-1 downto 0) & (data_en and WE_I); - data_pipe <= data_pipe(data_pipe'left-1 downto 0) & ssram_dout; - end if; - end if; - end process; - - ssram_d <= data_pipe(data_pipe'left)(data_width-1 downto 0) after topad when drive = '1' else (others => 'Z') after topad; - ssram_dp <= data_pipe(data_pipe'left)(data_width+parity_width-1 downto data_width) after topad when drive = '1' else (others => 'Z') after topad; - -end behavior; diff --git a/lib/SSRAM/src/tb_ssram_frontend_wb.vhd b/lib/SSRAM/src/tb_ssram_frontend_wb.vhd deleted file mode 100644 index 86f1411..0000000 --- a/lib/SSRAM/src/tb_ssram_frontend_wb.vhd +++ /dev/null @@ -1,457 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: testbench for system test using Xilinx ML-402 - --- Copyright (C) 2007 J. Ahrensfeld - --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. - --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. - --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - --- For questions and ideas, please contact the author at jens@jayfield.org - ------------------------------------------------------------------------ - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; -USE work.package_utility.all; - -Library UNISIM; -use UNISIM.vcomponents.all; - -ENTITY tb_ssram_frontend_wb IS -END tb_ssram_frontend_wb; - -ARCHITECTURE behavior OF tb_ssram_frontend_wb IS - - constant CLK_PERIOD : time := 10 ns; - signal CLK_O : std_logic := '1'; - signal RST_O : std_logic := '1'; - signal CYC_O : std_logic := '0'; - signal STB_O : std_logic := '0'; - signal WE_O : std_logic := '0'; - signal SEL_O : unsigned(3 downto 0) := (others => '1'); - signal ACK_I : std_logic; - signal MRDY_O : std_logic := '1'; - signal SRDY_I : std_logic; - signal ADDR_O : unsigned(31 downto 0) := (others => '-'); - signal DAT_I : unsigned(31 downto 0); - signal DAT_O : unsigned(31 downto 0) := (others => '-'); - - SIGNAL ssram_d : unsigned (32 - 1 DOWNTO 0) := (OTHERS => 'Z'); - SIGNAL ssram_dp : unsigned (4 - 1 DOWNTO 0) := (OTHERS => 'Z'); - SIGNAL ssram_a : unsigned (20 - 1 DOWNTO 0) := (OTHERS => '0'); - SIGNAL ssram_clk : STD_LOGIC := '0'; - SIGNAL ssram_cke_n : STD_LOGIC; - SIGNAL ssram_adv : STD_LOGIC; - SIGNAL ssram_mode : STD_LOGIC; - SIGNAL ssram_bw_n : unsigned(3 downto 0); - SIGNAL ssram_we_n : STD_LOGIC; - SIGNAL ssram_oe_n : STD_LOGIC; - SIGNAL ssram_ce_n : STD_LOGIC; - SIGNAL ssram_zz : STD_LOGIC; - - SIGNAL ssram_clk_fb : STD_LOGIC; - - signal dout_rst : std_logic := '0'; - signal dout_reg : unsigned(31 downto 0); - signal dout_cnt : natural range 0 to 255; - -BEGIN - - ssram_clk_fb <= ssram_clk after 0.5 ns; - -inst_ssram_frontend_wb : entity work.ssram_frontend_wb - GENERIC MAP - ( - addr_width => 20, - data_width => 32, - parity_width => 4 - ) - PORT MAP - ( - -- J-Bus domain - RST_I => RST_O, - CLK_I => CLK_O, - CYC_I => CYC_O, - STB_I => STB_O, - SEL_I => SEL_O, - WE_I => WE_O, - ACK_O => ACK_I, - SRDY_O => SRDY_I, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_I, - - -- Sync SRAM domain - ssram_clk_o => ssram_clk, - ssram_clk_fb => ssram_clk_fb, - ssram_cke_n => ssram_cke_n, - ssram_ce_n => ssram_ce_n, - ssram_oe_n => ssram_oe_n, - ssram_we_n => ssram_we_n, - ssram_adv => ssram_adv, - ssram_mode => ssram_mode, - ssram_zz => ssram_zz, - ssram_a => ssram_a, - ssram_d => ssram_d, - ssram_dp => ssram_dp, - ssram_bw_n => ssram_bw_n - ); - -inst_ssram : entity work.cy7c1354 - -- PORT MAP Declarations - PORT MAP - ( - Dq => STD_LOGIC_VECTOR(ssram_d), -- Data I/O - Dpq => STD_LOGIC_VECTOR(ssram_dp), -- Data I/O - Addr => STD_LOGIC_VECTOR(ssram_a(19 downto 2)), -- Address - Mode => ssram_mode, -- Burst Mode - Clk => ssram_clk, -- Clk - CEN_n => ssram_cke_n, -- CEN# - AdvLd_n => ssram_adv, -- Adv/Ld# - Bwa_n => ssram_bw_n(0), -- Bwa# - Bwb_n => ssram_bw_n(1), -- BWb# - Bwc_n => ssram_bw_n(2), -- Bwc# - Bwd_n => ssram_bw_n(3), -- BWd# - Rw_n => ssram_we_n, -- RW# - Oe_n => ssram_oe_n, -- OE# - Ce1_n => ssram_ce_n, -- CE1# - Ce2 => '1', -- CE2 - Ce3_n => '0', -- CE3# - Zz => ssram_zz - ); - -read_register: - process(CLK_O) - begin - if rising_edge(CLK_O) then - if dout_rst = '1' then - dout_cnt <= 0; - elsif ACK_I = '1' and WE_O = '0' then - dout_reg <= DAT_I; - dout_cnt <= dout_cnt + 1; - end if; - end if; - end process; - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - CLK_O <= not CLK_O; - end process; - -STIMULUS: process - - begin - - wait for 5*CLK_PERIOD; - RST_O <= '0'; - - wait until rising_edge(CLK_O); - -- 8 single cycles - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - DAT_O <= X"1234_0000"; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - wait until rising_edge(CLK_O); - -- 1-word burst cycle - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "0011"; - ADDR_O <= X"0000_0010"; - DAT_O <= X"DEADBEEF"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - wait until rising_edge(CLK_O); - -- 1-word burst cycle - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0010"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O) and ACK_I = '1'; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 3*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 31 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"1111_0000"; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"2222_0000"; - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - WE_O <= '0'; - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"3333_0000"; - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - WE_O <= '0'; - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - SEL_O <= "1111"; - DAT_O <= X"4444_0000"; - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - DAT_O <= DAT_O + 1; - ADDR_O <= ADDR_O + 4; - end loop; - - WE_O <= '0'; - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 7; - CYC_O <= '0'; - - ------------------------------------------------------------ - wait for 10*CLK_PERIOD; - ------------------------------------------------------------ - - -- 8-word burst cycle - dout_rst <= '1'; - wait until rising_edge(CLK_O); - dout_rst <= '0'; - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - ADDR_O <= X"0000_0400"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - - ADDR_O <= X"0000_0800"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - - ADDR_O <= X"0000_0C00"; - - for i in 0 to 7 loop - wait until rising_edge(CLK_O) and SRDY_I = '1'; - ADDR_O <= ADDR_O + 4; - end loop; - - STB_O <= '0'; - wait until rising_edge(CLK_O) and dout_cnt = 31; - CYC_O <= '0'; - - wait; - - end process; - -END; diff --git a/lib/VGA_ctrl/sim/ModelSim SE .lnk b/lib/VGA_ctrl/sim/ModelSim SE .lnk deleted file mode 100644 index 0a329502962c27f43d6954378270457c758fb048..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1453 zcmdT^T}V@57=EWGQ7D+WV2RXpz!%PlzBz>Dn0 z%p}Ap%r2B}yfN~|6r!-MB%-=7iipY|v>)jrih90tw$l&&+;r1-c)$1k-rwhY&-Z<` zM5NMWU?!TDX4-ciOC4nOso9wB){N@%)z~8AbdM9?&fHN^?^?-ICHpJ0U8SK-o@ee^ z-GWU}4?oVPohH+z4OCcZ^C?c>guPTGExgv3<+M@x)MN#B9cYMcv!AH)CkT->+xekjE~3*%tsr#-?VPs>>Pfcp?P>>7PTf>R4xFq8 za$@DD8faY5{CWR{Ks7ujx;UOlG5T-oTAbB$ZgxJ2{TSLD4PCvh0b6s#HrA@V5@_>g-tZ zC6_a^q}#%tDG&5}(vIL3e2wS}v!!Km(ZD56uEvv~{sjX!j+mz#%O&|0I16Vr)-gdE zIW!8NsJTx(3(C&Qp#i#(Hqr~&?1f#T6LicN#|fSdb#WL0QIH^yF?Fs XzhJPKLj@IacEi`;PHY1Yr!s#9ePRv0 diff --git a/lib/VGA_ctrl/sim/tb_vga_frontend.fdo b/lib/VGA_ctrl/sim/tb_vga_frontend.fdo deleted file mode 100644 index 151b8dd..0000000 --- a/lib/VGA_ctrl/sim/tb_vga_frontend.fdo +++ /dev/null @@ -1,25 +0,0 @@ -## NOTE: Do not edit this file. -## Autogenerated by ProjNav (creatfdo.tcl) on Thu Jul 06 20:49:07 Westeuropäische Sommerzeit 2006 -## -vlib work -vcom -explicit -93 "../../misc/utils_pkg.vhd" -vcom -explicit -93 "../../misc/dpram_1w1r.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_ctrl_pkg.vhd" -vcom -explicit -93 "../../FIFO/src/gray_counter.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_async_ctrl.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_async.vhd" -vcom -explicit -93 "../src/fonts/char_rom_c64.vhd" -vcom -explicit -93 "../src/vga_types.vhd" -vcom -explicit -93 "../src/char_gen.vhd" -vcom -explicit -93 "../src/vga_sync.vhd" -vcom -explicit -93 "../src/vga_timing.vhd" -vcom -explicit -93 "../src/vga_backend.vhd" -vcom -explicit -93 "../src/vga_frontend.vhd" -vcom -explicit -93 "../src/tb_vga_frontend.vhd" -vsim -t 1ps -lib work tb_vga_frontend -view wave -do {tb_vga_frontend.wdo} -view structure -view signals - -run 20ms diff --git a/lib/VGA_ctrl/sim/tb_vga_frontend.wdo b/lib/VGA_ctrl/sim/tb_vga_frontend.wdo deleted file mode 100644 index 227b8b3..0000000 --- a/lib/VGA_ctrl/sim/tb_vga_frontend.wdo +++ /dev/null @@ -1,79 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_vga_frontend/clk_o -add wave -noupdate -format Logic /tb_vga_frontend/rst_o -add wave -noupdate -divider Master -add wave -noupdate -format Logic /tb_vga_frontend/cyc_o -add wave -noupdate -format Logic /tb_vga_frontend/stb_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/addr_o -add wave -noupdate -format Literal /tb_vga_frontend/sel_o -add wave -noupdate -format Logic /tb_vga_frontend/we_o -add wave -noupdate -format Logic /tb_vga_frontend/ack_i -add wave -noupdate -format Logic /tb_vga_frontend/mrdy_o -add wave -noupdate -format Logic /tb_vga_frontend/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/mdat_o -add wave -noupdate -divider Slave -add wave -noupdate -format Logic /tb_vga_frontend/cyc_i -add wave -noupdate -format Logic /tb_vga_frontend/stb_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/addr_i -add wave -noupdate -format Literal /tb_vga_frontend/sel_i -add wave -noupdate -format Logic /tb_vga_frontend/we_i -add wave -noupdate -format Logic /tb_vga_frontend/ack_o -add wave -noupdate -format Logic /tb_vga_frontend/mrdy_i -add wave -noupdate -format Logic /tb_vga_frontend/srdy_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/sdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/sdat_o -add wave -noupdate -divider VGA -add wave -noupdate -format Logic /tb_vga_frontend/vga_clk -add wave -noupdate -format Logic /tb_vga_frontend/vga_blank_n -add wave -noupdate -format Logic /tb_vga_frontend/vga_sync_n -add wave -noupdate -format Logic /tb_vga_frontend/vga_hsync -add wave -noupdate -format Logic /tb_vga_frontend/vga_vsync -add wave -noupdate -format Literal -radix decimal /tb_vga_frontend/vga_red -add wave -noupdate -format Literal -radix decimal /tb_vga_frontend/vga_green -add wave -noupdate -format Literal -radix decimal /tb_vga_frontend/vga_blue -add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/s -add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/request_cnt -add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/read_cnt -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/vga_master_en -add wave -noupdate -divider FIFO -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/fifo_full -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/fifo_empty -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/fifo_almost_empty -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/fifo_almost_full -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/fifo_color_re -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/fifo_color_we -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/inst_vga_frontend/fifo_color_out -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend/inst_vga_frontend/fifo_color_in -add wave -noupdate -divider Backend -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/ctrl_scan_en -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/sys_rst -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/stat_vga_rdy -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/stat_scan -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/scan_enable -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/is_scan -add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/stat_hpos -add wave -noupdate -format Literal /tb_vga_frontend/inst_vga_frontend/stat_vpos -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/rst -add wave -noupdate -format Logic /tb_vga_frontend/vga_en -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/cg_draw -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/cg_en -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/hready -add wave -noupdate -format Logic /tb_vga_frontend/inst_vga_frontend/inst_vga_backend/vready -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {9915333000 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {9915291469 ps} {9915942555 ps} diff --git a/lib/VGA_ctrl/sim/tb_vga_frontend64.fdo b/lib/VGA_ctrl/sim/tb_vga_frontend64.fdo deleted file mode 100644 index 69fd246..0000000 --- a/lib/VGA_ctrl/sim/tb_vga_frontend64.fdo +++ /dev/null @@ -1,27 +0,0 @@ -## NOTE: Do not edit this file. -## Autogenerated by ProjNav (creatfdo.tcl) on Thu Jul 06 20:49:07 Westeuropäische Sommerzeit 2006 -## -vlib work -vcom -explicit -93 "../../misc/utils_pkg.vhd" -vcom -explicit -93 "../../misc/dpram_1w1r.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_ctrl_pkg.vhd" -vcom -explicit -93 "../../FIFO/src/gray_counter.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_async_ctrl.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_async.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_sync_ctrl.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_sync.vhd" -vcom -explicit -93 "../src/fonts/char_rom_c64.vhd" -vcom -explicit -93 "../src/vga_types.vhd" -vcom -explicit -93 "../src/char_gen.vhd" -vcom -explicit -93 "../src/vga_sync.vhd" -vcom -explicit -93 "../src/vga_timing.vhd" -vcom -explicit -93 "../src/vga_backend.vhd" -vcom -explicit -93 "../src/vga_frontend64.vhd" -vcom -explicit -93 "../src/tb_vga_frontend64.vhd" -vsim -t 1ps -lib work tb_vga_frontend64 -view wave -do {tb_vga_frontend64.wdo} -view structure -view signals - -run 20ms diff --git a/lib/VGA_ctrl/sim/tb_vga_frontend64.wdo b/lib/VGA_ctrl/sim/tb_vga_frontend64.wdo deleted file mode 100644 index e03592a..0000000 --- a/lib/VGA_ctrl/sim/tb_vga_frontend64.wdo +++ /dev/null @@ -1,119 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_vga_frontend64/clk_o -add wave -noupdate -format Logic /tb_vga_frontend64/rst_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/read_reg -add wave -noupdate -divider Master -add wave -noupdate -format Logic /tb_vga_frontend64/cyc_o -add wave -noupdate -format Logic /tb_vga_frontend64/srdy_i -add wave -noupdate -format Logic /tb_vga_frontend64/stb_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/sdat_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/addr_o -add wave -noupdate -format Literal /tb_vga_frontend64/sel_o -add wave -noupdate -format Logic /tb_vga_frontend64/we_o -add wave -noupdate -format Logic /tb_vga_frontend64/ack_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/sdat_i -add wave -noupdate -format Logic /tb_vga_frontend64/mrdy_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/mdat_o -add wave -noupdate -divider Slave -add wave -noupdate -format Logic /tb_vga_frontend64/int_o -add wave -noupdate -format Logic /tb_vga_frontend64/cyc_i -add wave -noupdate -format Logic /tb_vga_frontend64/clk_o -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/bus_rdy -add wave -noupdate -format Logic /tb_vga_frontend64/stb_i -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/addr_i -add wave -noupdate -format Literal /tb_vga_frontend64/sel_i -add wave -noupdate -format Logic /tb_vga_frontend64/we_i -add wave -noupdate -format Logic /tb_vga_frontend64/ack_o -add wave -noupdate -format Logic /tb_vga_frontend64/mrdy_i -add wave -noupdate -format Logic /tb_vga_frontend64/srdy_o -add wave -noupdate -format Logic /tb_vga_frontend64/rdy -add wave -noupdate -divider VGA -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/vga_scan_dma_en -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/vga_scan_dma_en2 -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/cg_rdy -add wave -noupdate -format Logic /tb_vga_frontend64/vga_clk -add wave -noupdate -format Logic /tb_vga_frontend64/vga_blank_n -add wave -noupdate -format Logic /tb_vga_frontend64/vga_sync_n -add wave -noupdate -format Logic /tb_vga_frontend64/vga_hsync -add wave -noupdate -format Logic /tb_vga_frontend64/vga_vsync -add wave -noupdate -format Literal -radix decimal /tb_vga_frontend64/vga_red -add wave -noupdate -format Literal -radix decimal /tb_vga_frontend64/vga_green -add wave -noupdate -format Literal -radix decimal /tb_vga_frontend64/vga_blue -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/s -add wave -noupdate -format Literal -radix unsigned /tb_vga_frontend64/inst_vga_frontend64/request_cnt -add wave -noupdate -format Literal -radix unsigned /tb_vga_frontend64/inst_vga_frontend64/read_cnt -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/bus_read_fin -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/vga_fb_back -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/vga_fb_front -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/host_fb_front -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/host_fb_back -add wave -noupdate -divider FIFO -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/fifo_full -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/fifo_empty -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/fifo_almost_empty -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/fifo_almost_full -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/fifo_color_re -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/fifo_color_we -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/fifo_color_out -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/fifo_color_in -add wave -noupdate -divider {Blitter REGS} -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blit_reset -add wave -noupdate -format Logic /tb_vga_frontend64/clk_o -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/blit_nx -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/blit_ny -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/blit_func_sel -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/blit_comb_sel -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blit_request -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blit_request_set -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blit_complete -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blit_complete_ack -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blit_complete_inten -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blitfifo_full -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blitfifo_empty -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blitfifo_color_re -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/blitfifo_color_we -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/blitfifo_color_out -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/blitfifo_color_in -add wave -noupdate -divider {Blitter SRC} -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/blit_chunk_cnt -add wave -noupdate -format Logic /tb_vga_frontend64/clk_o -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/s -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/addr_o_blit_src -add wave -noupdate -divider {Blitter DST} -add wave -noupdate -format Logic /tb_vga_frontend64/clk_o -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/s -add wave -noupdate -format Literal -radix hexadecimal /tb_vga_frontend64/inst_vga_frontend64/addr_o_blit_dst -add wave -noupdate -divider Backend -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/vga_scan_rdy -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/ctrl_scan_en -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/sys_rst -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/stat_vga_rdy -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/stat_scan -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/scan_enable -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/is_scan -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/stat_hpos -add wave -noupdate -format Literal /tb_vga_frontend64/inst_vga_frontend64/stat_vpos -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/rst -add wave -noupdate -format Logic /tb_vga_frontend64/vga_en -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/cg_draw -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/cg_en -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/hready -add wave -noupdate -format Logic /tb_vga_frontend64/inst_vga_frontend64/inst_vga_backend/vready -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {457000000 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {16785616100 ps} {20169178100 ps} diff --git a/lib/VGA_ctrl/src/char_gen.vhd b/lib/VGA_ctrl/src/char_gen.vhd deleted file mode 100644 index 4dd93b1..0000000 --- a/lib/VGA_ctrl/src/char_gen.vhd +++ /dev/null @@ -1,547 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:25:45 10/15/05 --- Design Name: --- Module Name: char_gen - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -use work.utils_pkg.all; -use work.vga_types.all; - -entity char_gen is - Generic - ( - tsvga : vga_timespec_t := ts_vga_800_600_72; - - -- User supplied parameters - CHARACTER_SCALE : natural := 1; - CHAR_ROM_SIZE_X : natural := 8; -- Pixels - CHAR_ROM_SIZE_Y : natural := 16; -- Pixels - CHAR_ROM_DEPTH : natural := 256; -- Chars - MAX_CHAR_PER_LINE : natural := 32; -- Chars - MAX_LINE_PER_FRAME : natural := 16; -- Chars - CHAR_SPACING_X : natural := 0; -- Pixels - CHAR_SPACING_Y : natural := 0; -- Pixels - SCREEN_OFFSET_X : natural := 16; -- Pixels - SCREEN_OFFSET_Y : natural := 16 -- Pixels - ); - Port - ( - -- System signals - rst : in std_logic; - vga_clk : in std_logic; - sys_clk : in std_logic; - ce : in std_logic; - frame_pulse : in std_logic; - - - -- Host Signals - clr_screen : in std_logic; - clr_line : in std_logic; - din : in unsigned(7 downto 0); - dout : out unsigned(7 downto 0); - ascii_we : in std_logic; - posy_we : in std_logic; - posx_we : in std_logic; - ready : out std_logic; - - -- Control signals - scan_pos_x_in : in natural range 0 to tsvga.ts_h.ncyc_scan-1; - scan_pos_y_in : in natural range 0 to tsvga.ts_v.ncyc_scan-1; - - -- Status signals - csr_pos_x_out : out natural range 0 to MAX_CHAR_PER_LINE-1; - csr_pos_y_out : out natural range 0 to MAX_LINE_PER_FRAME-1; - - -- Output - char_draw_en : out std_logic - - ); -end char_gen; - -architecture Behavioral of char_gen is - - constant A_RAM_ADDR_WIDTH : integer := 12; - constant A_RAM_DATA_WIDTH : integer := 8; - - type offset_rom_t is array (0 to MAX_LINE_PER_FRAME-1) of unsigned(A_RAM_ADDR_WIDTH-1 downto 0); - - - - function gen_offset_rom(num_char_per_line, num_lines : natural) return offset_rom_t is - variable result : offset_rom_t; - - variable offset : unsigned(A_RAM_ADDR_WIDTH-1 downto 0) := (others => '0'); - begin - for i in 0 to num_lines-1 loop - result(i) := offset; - offset := offset + to_unsigned(num_char_per_line, A_RAM_ADDR_WIDTH-1); - end loop; - return result; - end gen_offset_rom; - - constant offset_rom : offset_rom_t := gen_offset_rom(MAX_CHAR_PER_LINE, MAX_LINE_PER_FRAME); - - -- Calculated parameters - type cg_state_t is (cg_init, cg_ready, cg_clr_line, cg_clr_screen); - signal s, sn : cg_state_t; - - constant CELL_SIZE_X : natural := (CHAR_ROM_SIZE_X+CHAR_SPACING_X)*CHARACTER_SCALE; - constant CELL_SIZE_Y : natural := (CHAR_ROM_SIZE_Y+CHAR_SPACING_Y)*CHARACTER_SCALE; - constant CHAR_SIZE_X : natural := CHAR_ROM_SIZE_X*CHARACTER_SCALE; - constant CHAR_SIZE_Y : natural := CHAR_ROM_SIZE_Y*CHARACTER_SCALE; - - signal line_offset : natural range 0 to MAX_LINE_PER_FRAME-1; - signal cell_x_cnt : natural range 0 to MAX_CHAR_PER_LINE-1; - signal cell_y_cnt : natural range 0 to MAX_LINE_PER_FRAME-1; - signal char_x_cnt : natural range 0 to CELL_SIZE_X-1; - signal char_y_cnt : natural range 0 to CELL_SIZE_Y-1; - signal char_rom_row : unsigned(NextExpBaseTwo(CHAR_SIZE_Y)-1 downto 0); - signal char_rom_addr : unsigned(NextExpBaseTwo(CHAR_ROM_DEPTH*CHAR_ROM_SIZE_Y)-1 downto 0); - signal char_rom_data : unsigned(CHAR_ROM_SIZE_X-1 downto 0); - signal char_reg : unsigned((CHARACTER_SCALE*CHAR_ROM_SIZE_X)-1 downto 0); - - signal a_addr_rd : unsigned(A_RAM_ADDR_WIDTH-1 downto 0); - signal a_addr_wr : unsigned(A_RAM_ADDR_WIDTH-1 downto 0); - signal a_data_rd : unsigned(A_RAM_DATA_WIDTH-1 downto 0); - signal a_data_wr : unsigned(A_RAM_DATA_WIDTH-1 downto 0); - signal a_ram_we : std_logic; - signal a_cnt : natural range 0 to 2**A_RAM_ADDR_WIDTH-1; - signal a_cnt_rst : std_logic; - signal a_cnt_en : std_logic; - signal csr_posx_reg : natural range 0 to MAX_CHAR_PER_LINE-1; - signal csr_posy_reg : natural range 0 to MAX_LINE_PER_FRAME-1; - signal a_data_reg : unsigned(A_RAM_DATA_WIDTH-1 downto 0); - signal a_data_we : std_logic; - signal csr_posx_overflow : std_logic; - signal csr_posx_cnt_din : natural range 0 to MAX_CHAR_PER_LINE-1; - signal csr_posx_cnt_set : std_logic; - signal csr_posx_cnt_en : std_logic; - signal csr_posy_overflow : std_logic; - signal csr_posy_cnt_din : natural range 0 to MAX_LINE_PER_FRAME-1; - signal csr_posy_cnt_set : std_logic; - signal csr_posy_cnt_en : std_logic; - - signal line_addr : unsigned(A_RAM_ADDR_WIDTH-1 downto 0); - signal char_addr : unsigned(A_RAM_ADDR_WIDTH-1 downto 0); - - -- Visible Cursor - constant CURSOR_BLINK_INTERVAL : natural := tsvga.nfps/2; - - type cursor_rom_t is array (0 to 2*CHAR_ROM_SIZE_Y-1) of unsigned (CHAR_ROM_SIZE_X-1 downto 0); - constant cursor_rom : cursor_rom_t := - ( - -- Cursor off - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "00000000", - "11111111", - "11111111", - "11111111", - - -- Cursor on - "00000000", - "00000000", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "11111111", - "00000000", - "00000000", - "00000000" - - ); - signal cursor_rom_addr : unsigned(NextExpBaseTwo(2*CHAR_ROM_SIZE_Y)-1 downto 0); - signal cursor_rom_data : unsigned(CHAR_ROM_SIZE_X-1 downto 0); - signal cursor_visible : std_logic; - signal cursor_cnt : natural range 0 to CURSOR_BLINK_INTERVAL-1; - signal csr_posx_synced : natural range 0 to MAX_CHAR_PER_LINE-1; - signal csr_posy_synced : natural range 0 to MAX_LINE_PER_FRAME-1; - - -- Scrolling - signal scroll_offset : natural range 0 to MAX_LINE_PER_FRAME-1; - signal scroll_active : std_logic; - - -begin - - a_addr_rd <= to_unsigned(cell_x_cnt, a_addr_rd'length) + offset_rom(line_offset); - line_addr <= offset_rom(csr_posy_reg); - char_addr <= to_unsigned(csr_posx_reg, char_addr'length); - char_rom_addr <= a_data_rd & char_rom_row(NextExpBaseTwo(CHAR_SIZE_Y)-1 downto (CHARACTER_SCALE-1)); - cursor_rom_addr <= cursor_visible & char_rom_row(NextExpBaseTwo(CHAR_SIZE_Y)-1 downto (CHARACTER_SCALE-1)); - csr_pos_x_out <= csr_posx_reg; - csr_pos_y_out <= csr_posy_reg; - - inst_char_rom : entity work.char_rom - PORT MAP - ( - CLK => vga_clk, - ADDR => char_rom_addr, - DATA => char_rom_data - ); - - inst_ascii_ram: entity work.dpram_1w1r - GENERIC MAP ( - addr_width => A_RAM_ADDR_WIDTH, - data_width => A_RAM_DATA_WIDTH - ) - PORT MAP( - clka => sys_clk, - clkb => vga_clk, - en_a => '1', - en_b => '1', - we_a => a_ram_we, - addr_a => a_addr_wr, - addr_b => a_addr_rd, - din_a => a_data_wr, - dout_b => a_data_rd - ); - - --------------------------------------------------------------------------------------------- - --- ASCII RAM control - --------------------------------------------------------------------------------------------- - asci_ram_fsm: - process (s, a_cnt, clr_line, clr_screen, a_data_we, a_data_reg, char_addr, line_addr) - begin - sn <= s; - a_cnt_rst <= '0'; - a_cnt_en <= '0'; - a_ram_we <= '0'; - a_data_wr <= a_data_reg; - a_addr_wr <= char_addr + line_addr; - ready <= '0'; - - case s is - - when cg_init => - sn <= cg_clr_screen; - a_cnt_rst <= '1'; - when cg_ready => - ready <= '1'; - a_ram_we <= a_data_we; - if clr_screen = '1' then - a_cnt_rst <= '1'; - sn <= cg_clr_screen; - elsif clr_line = '1' then - a_cnt_rst <= '1'; - sn <= cg_clr_line; - end if; - when cg_clr_line => - a_ram_we <= '1'; - a_cnt_en <= '1'; - a_data_wr <= to_unsigned(0, A_RAM_DATA_WIDTH); - a_addr_wr <= to_unsigned(a_cnt + to_integer(line_addr), A_RAM_ADDR_WIDTH); - if a_cnt = MAX_CHAR_PER_LINE-1 then - sn <= cg_ready; - end if; - when cg_clr_screen => - a_ram_we <= '1'; - a_cnt_en <= '1'; - a_data_wr <= to_unsigned(0, A_RAM_DATA_WIDTH); - a_addr_wr <= to_unsigned(a_cnt, A_RAM_ADDR_WIDTH); - if a_cnt = (2**A_RAM_ADDR_WIDTH-1) then - sn <= cg_ready; - end if; - - when others => - sn <= cg_ready; - - end case; - end process; - - asci_ram_fsm_next: process (sys_clk) - begin - if rising_edge(sys_clk) then - if rst = '1' then - s <= cg_init; - else - s <= sn; - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - asci_ram_cnt: process (sys_clk) - begin - if rising_edge(sys_clk) then - if a_cnt_rst = '1' then - a_cnt <= 0; - elsif a_cnt_en = '1' then - if a_cnt < (2**A_RAM_ADDR_WIDTH-1) then - a_cnt <= a_cnt + 1; - end if; - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - asci_addr_reg: process (sys_clk) - begin - if rising_edge(sys_clk) then - a_data_we <= '0'; - csr_posx_cnt_en <= '0'; - csr_posx_cnt_set <= '0'; - csr_posy_cnt_en <= '0'; - csr_posy_cnt_set <= '0'; - if rst = '1' then - a_data_reg <= (others => '0'); - elsif posy_we = '1' then - csr_posy_cnt_din <= to_integer(din); - csr_posy_cnt_set <= '1'; - elsif posx_we = '1' then - csr_posx_cnt_din <= to_integer(din); - csr_posx_cnt_set <= '1'; - elsif ascii_we = '1' then - dout <= din; -- written char is simply echoed back to dout - if din < X"20" then - if din = X"0D" then - csr_posx_cnt_din <= 0; - csr_posx_cnt_set <= '1'; - elsif din = X"0A" then - csr_posy_cnt_en <= '1'; - end if; - else - a_data_reg <= din - X"20"; - a_data_we <= '1'; - csr_posx_cnt_en <= '1'; - end if; - end if; - end if; - end process; - - asci_csr_posx_counter: - process (sys_clk) - begin - if rising_edge(sys_clk) then - csr_posx_overflow <= '0'; - if rst = '1' then - csr_posx_reg <= 0; - elsif csr_posx_cnt_set = '1' then - csr_posx_reg <= csr_posx_cnt_din; - elsif csr_posx_cnt_en = '1' then - if csr_posx_reg < MAX_CHAR_PER_LINE-1 then - csr_posx_reg <= csr_posx_reg + 1; - else - csr_posx_reg <= 0; - csr_posx_overflow <= '1'; - end if; - end if; - end if; - end process; - - asci_csr_posy_counter: - process (sys_clk) - begin - if rising_edge(sys_clk) then - csr_posy_overflow <= '0'; - if rst = '1' then - csr_posy_reg <= 0; - elsif csr_posy_cnt_set = '1' then - csr_posy_reg <= csr_posy_cnt_din; - elsif csr_posy_cnt_en = '1' or csr_posx_overflow = '1' then - if csr_posy_reg < MAX_LINE_PER_FRAME-1 then - csr_posy_reg <= csr_posy_reg + 1; - else - csr_posy_reg <= 0; - csr_posy_overflow <= '1'; - end if; - end if; - end if; - end process; - - scroll_gen: process (sys_clk) - begin - if rising_edge(sys_clk) then - if rst = '1' or clr_screen = '1' then - scroll_offset <= 0; - scroll_active <= '0'; - elsif csr_posy_cnt_set = '1' then - scroll_active <= '0'; - elsif csr_posy_overflow = '1' then - scroll_active <= '1'; - scroll_offset <= 1; - end if; - if (csr_posy_cnt_en = '1' or csr_posx_overflow = '1') and scroll_active = '1' then - scroll_offset <= scroll_offset + 1; - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - --- Cursor generator - --------------------------------------------------------------------------------------------- - proc_sync_csr_posx: - process(vga_clk) - variable p1, p2 : natural range 0 to MAX_CHAR_PER_LINE-1; - begin - if rising_edge(vga_clk) then - csr_posx_synced <= p2; - p2 := p1; - p1 := csr_posx_reg; - end if; - end process; - - proc_sync_csr_posy: - process(vga_clk) - variable p1, p2 : natural range 0 to MAX_LINE_PER_FRAME-1; - begin - if rising_edge(vga_clk) then - csr_posy_synced <= p2; - p2 := p1; - p1 := csr_posy_reg; - end if; - end process; - - csr_blink_cnt: process (rst, vga_clk) - begin - if rst = '1' then - cursor_cnt <= 0; - cursor_visible <= '0'; - elsif rising_edge(vga_clk) then - if frame_pulse = '1' then - if cursor_cnt < CURSOR_BLINK_INTERVAL-1 then - cursor_cnt <= cursor_cnt + 1; - else - cursor_cnt <= 0; - cursor_visible <= not cursor_visible; - end if; - end if; - end if; - end process; - - cursor_rom_read: process (vga_clk) - begin - if rising_edge(vga_clk) then - cursor_rom_data <= (others => '0'); - if (cell_x_cnt = csr_posx_synced) and (line_offset = csr_posy_synced) then - cursor_rom_data <= cursor_rom(to_integer(cursor_rom_addr)); - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - --- Character generator - --------------------------------------------------------------------------------------------- - char_rom_ctrl: process (vga_clk) - begin - if rising_edge(vga_clk) then - char_rom_row <= to_unsigned(char_y_cnt, char_rom_row'length); - end if; - end process; - - --------------------------------------------------------------------------------------------- - char_reg_ctrl: process (vga_clk) - begin - if rising_edge(vga_clk) and ce = '1' then - if char_x_cnt = 2 then -- +2 delay for ASCII-RAM access and CHAR-ROM access - for i in 0 to CHAR_ROM_SIZE_X-1 loop - for j in 0 to CHARACTER_SCALE-1 loop - char_reg(i*CHARACTER_SCALE + j) <= char_rom_data(i) xor cursor_rom_data(i); - end loop; - end loop; - else - char_reg <= char_reg(char_reg'left-1 downto 0) & '0'; - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - cg_ctrl: process (rst, vga_clk) - variable enable_x : std_logic; - variable enable_y : std_logic; - variable char_en : std_logic; - variable char_en2 : std_logic; - begin - - if (rst = '1') then - enable_x := '0'; - enable_y := '0'; - line_offset <= 0; - cell_x_cnt <= 0; - cell_y_cnt <= 0; - char_x_cnt <= 0; - char_y_cnt <= 0; - char_en := '0'; - elsif rising_edge(vga_clk) and ce = '1' then - char_draw_en <= char_en2 and char_reg(char_reg'left); - char_en2 := char_en; - char_en := '0'; - if scan_pos_y_in = SCREEN_OFFSET_Y then - enable_y := '1'; - cell_y_cnt <= 0; - char_x_cnt <= 0; - line_offset <= scroll_offset; - end if; - if scan_pos_x_in = SCREEN_OFFSET_X and enable_y = '1' then - enable_x := '1'; - cell_x_cnt <= 0; - char_x_cnt <= 0; - elsif enable_x = '1' and enable_y = '1' then - if char_x_cnt < CELL_SIZE_X-1 then - char_x_cnt <= char_x_cnt + 1; - else - char_x_cnt <= 0; - if cell_x_cnt < MAX_CHAR_PER_LINE-1 then - cell_x_cnt <= cell_x_cnt + 1; - else - enable_x := '0'; - if char_y_cnt < CELL_SIZE_Y-1 then - char_y_cnt <= char_y_cnt + 1; - else - char_y_cnt <= 0; - if cell_y_cnt < MAX_LINE_PER_FRAME-1 then - cell_y_cnt <= cell_y_cnt + 1; - else - enable_y := '0'; - end if; - if line_offset < MAX_LINE_PER_FRAME-1 then - line_offset <= line_offset + 1; - else - line_offset <= 0; - end if; - end if; - end if; - end if; - if (char_x_cnt < CHAR_SIZE_X) and (char_y_cnt < CHAR_SIZE_Y) then - char_en := '1'; - end if; - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/VGA_ctrl/src/clkgen_virtex4.vhd b/lib/VGA_ctrl/src/clkgen_virtex4.vhd deleted file mode 100644 index 0a08d0c..0000000 --- a/lib/VGA_ctrl/src/clkgen_virtex4.vhd +++ /dev/null @@ -1,106 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:25:45 10/15/05 --- Design Name: --- Module Name: vga_ctrl_core - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -library work; -use work.utils_pkg.all; - ----- Uncomment the following library declaration if instantiating ----- any Xilinx primitives in this code. -Library UNISIM; -use UNISIM.vcomponents.all; - -entity clkgen is - Generic - ( - clk_in_freq : real := 100.0; - clk_out_freq : real := 100.0 - ); - Port - ( - rst : in std_logic; - clk_in : in std_logic; - clk_out : out std_logic; - locked : out std_logic - ); -end clkgen; - -architecture tech of clkgen is - - signal dcm_clk0 : std_logic; - signal dcm_clk_fb : std_logic; - signal clk_out0 : std_logic; - - begin - - -- Compnent instantiation - DCM_VGA_CLK_inst : DCM_BASE - generic map ( - CLKDV_DIVIDE => 2.0, -- Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - -- 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - CLKFX_DIVIDE => UTILS_FREQ_D(clk_in_freq, clk_out_freq), -- Can be any interger from 1 to 32 - CLKFX_MULTIPLY => UTILS_FREQ_M(clk_in_freq, clk_out_freq), -- Can be any integer from 2 to 32 - CLKIN_DIVIDE_BY_2 => FALSE, -- TRUE/FALSE to enable CLKIN divide by two feature - CLKIN_PERIOD => UTILS_PERIOD_NS(clk_in_freq), -- Specify period of input clock in ns from 1.25 to 1000.00 - CLKOUT_PHASE_SHIFT => "NONE", -- Specify phase shift mode of NONE or FIXED - CLK_FEEDBACK => "1X", -- Specify clock feedback of NONE or 1X - DCM_PERFORMANCE_MODE => "MAX_SPEED", -- Can be MAX_SPEED or MAX_RANGE - DESKEW_ADJUST => "SYSTEM_SYNCHRONOUS", -- SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - -- an integer from 0 to 15 - DFS_FREQUENCY_MODE => "LOW", -- LOW or HIGH frequency mode for frequency synthesis - DLL_FREQUENCY_MODE => "LOW", -- LOW, HIGH, or HIGH_SER frequency mode for DLL - DUTY_CYCLE_CORRECTION => TRUE, -- Duty cycle correction, TRUE or FALSE - FACTORY_JF => X"F0F0", -- FACTORY JF Values Suggested to be set to X"F0F0" - PHASE_SHIFT => 0, -- Amount of fixed phase shift from -255 to 1023 - STARTUP_WAIT => FALSE) -- Delay configuration DONE until DCM LOCK, TRUE/FALSE - port map - ( - CLK0 => dcm_clk0, -- 0 degree DCM CLK ouptput - CLK180 => open, -- 180 degree DCM CLK output - CLK270 => open, -- 270 degree DCM CLK output - CLK2X => open, -- 2X DCM CLK output - CLK2X180 => open, -- 2X, 180 degree DCM CLK out - CLK90 => open, -- 90 degree DCM CLK output - CLKDV => open, -- Divided DCM CLK out (CLKDV_DIVIDE) - CLKFX => clk_out0, -- DCM CLK synthesis out (M/D) - CLKFX180 => open, -- 180 degree CLK synthesis out - LOCKED => locked, -- DCM LOCK status output - CLKFB => dcm_clk_fb, -- DCM clock feedback - CLKIN => clk_in, -- Clock input (from IBUFG, BUFG or DCM) - RST => rst -- DCM asynchronous reset input - ); - - BUFG_dcm_clk_fb : BUFG - port map - ( - O => dcm_clk_fb, -- Clock buffer output - I => dcm_clk0 -- Clock buffer input - ); - - BUFG_clk_out : BUFG - port map - ( - O => clk_out, -- Clock buffer output - I => clk_out0 -- Clock buffer input - ); - -end tech; diff --git a/lib/VGA_ctrl/src/fonts/Fixedsys_8x15.bff b/lib/VGA_ctrl/src/fonts/Fixedsys_8x15.bff deleted file mode 100644 index a1d2353cf29b6d12c0b71d0401cf7a42f8db4341..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 33044 zcmeHJS(f8S4$J=Qzqvvmb#69y>I2jp0whRAD74tQIIB{6DRBcp24%bIfB(My_4fAP zx3{;y?fwt!KY#!5%a(9o#~b+d>$v`>SN;6I{`fWMoNsUR>=715QG3~}B6cUk203v> z4C)x#!ui3=VkMAA#8Mb0cKU?`tLcj;PRfnv2j1@Z6Bt%Xv+bB;pG-W$@pF0D(i9eN0nx6NG_Zfo%>G{qLB8i+=?t4WUMJ&)*=#avW~BlWS!{Vh)EpI&u3A1DJEqu?kb(LS*uWhhV-cSKffp+Ler0Xju38+@@7_ zRKf$8aSo?`vRUu})L=?yml{(It5b3Xf>lzs*StP%&F3n##SWlBluk$?j%+zW%7U{v zkL1)>P@g75b8f|ZHrd%>M5-=3RxMfp<76TWTyCM=c_OKE$4jj+pH06ZY@YzZt-FE(--_>W#>ilS?9_e!e zPrI8>LRUI-F9&Lx)ft7z8WYOmE$e=ypE^QkzLmi1R1GJC?~i6H1BfoC*;D*(0b0e% z%L3EogTu7fSY;D_3@sU$UCRPw!&%^6WU3E@qK_UTzkHHm9=s)Wb?d#Amz4ld)EMGW zCXay@2>9ogHL%qWj^c3wX%2QcKZzWPaz$sCUhui&>67s3gZK2y6&?ICW4o!B{Aez9c0O%GDFcSHY zbae3WyFS~*A24E53%6xHK>rgYK6JpX*f#SCXZSXf@ioYK#uyQIKY@2zcy7%kB*`d{lrEj^f)z`v%z;B|8}k?TeTZZxAhhVWrzfoXZY||(2JOjX@icd| zUCipdj&rOSdHzUb_2T*Kyqv75z-_l)J`u_rhjBbJ><)A{=Z}3z$3=R-*jE%f&QoG| z=Rjv$t6n@mrn5@|Aqz9zetvJ4HAm^`Le!(AJeLn?CMWGs9eXA)v^uACq^vz?l}C&W zl4rN31g@)0Jc%VN9SAU3JD$~o5uML8%OURf+)y>;E&h=6TT@6=Ry}5mvifeVsuJ>; zx;#_rtB)rH_bgmrv(W(SO(sgIFFxs zYSxLnlb%o!c5wIC=)>$pS2){4jfaX-o=7|C2^C=ncYlpO%5K<^7|oHwBQ<<{S0A69 z^saOl>HaQZT{vj_4%Kz9J9}^7kJ$jeIQWLV+S)?ni^_3cKF?S0Bae@ha~YW6_3!1Y z_P~?+x9W$V-@gW5wfFDRXZ}I`E^~d=9QXOh4Sdz!ze}I-^gri!U;BU6`RBfOd~e|1 zz^8A(zxMuLolkG}dpEFEed7aQxOWYRPr~8(PRfVenk`h$nweT5`&`I+WvnZYW3Uot zZ!E%^u=t606*O~Hn5?6)$)TF~UKLa}VWl^FPRDa~OF*??7pW$hg%J-pB|MpMg|b=~w=46rgF%3;e8R<=twYITmn4)1J?9Ch zqGDMr0{-^$tZ>38=DA3U%6Li>#i?9d+-(m+{IMyft}25J0>5?saR9FhBMHXTu}9E# ze5MN+>Byo9T_-^&5=HLs)Lw!;`3 zlqG^7p5qa<%;sFZKH^vzn=)#sohlJrd zuorNmvD|o@J&lSL&0YzPb8K-@4}uvcI0FNZb>89=fi#>5s#>W5Cx9m#3vLT{aVnhI zuD8(L&;xIVf21hz!I&yutSzQSWLK5zG|G-;!aE)?L7U757qz{-sHjVCAuE_{>rQ3l zgBI~D!Uhc{rHw6Oc^lA&Cwi~$=dq4DIw4PpO&~SsRP{*7Y7&!o0{@_LpSAlr(1U%T zG3t!bzFgog?`vP_fyyx46!dT1bxF-%V(wKwemY`L%Fi8k_(-#KR+paXldyxg+BlDR zvO7Gaqf`iSXq9%0XWZy0KkYz0=0{)G)fBU)^eoSQ!pS!LFpqd;&-$odjE6kyZtM61 zFCFWu#e3ohg9HQ$S2oaioy5eM<;W%LLLZl}c`z7h8rLWB zAw7qT;_{Rktwl`e0ek6YlZ)6%Gv-svYyCpQz#CpaFN=?zKl*!vOJ^U?!-1~za{kRZ zE@~w2=-dPWz|-y9>S><;#XgSTt%2BrlyM)I_|fVrw&U2D&3QV_v9>4YPc1)(e;J^C zc1srmXIRutFwCqi{sZ>(t!ldc_b$XZ`vd3C^IYSs`^~$!6mRx;bV~Kzv;F*d={>&Y zU*o7h*5)6FOJ`lpv*Ew<{HgcQ`PuaP8S4BXUgs^|fp0MPSfOLb*v`cB?b#~lP>1-` z;VE#AWBtNQ)`=E*B6J=%@1#H8@Vha7_5$K#_uXE~JW{-ub^5-n0T za0~~&0FAY*k2w4&WtRc(LDob|yT?m_j?@x#dp{&h$hz2_fAI32=`45>F!2lTS+A_> z$hCeudO3_{aawzx_bG%oj8;m!#nWyaMT>Bp@1-@AyX2EoiojL`Pd6O=5rAjlWCNG= zR0FPIDK4u?wZebIlFdo-C7s_;|OOx&(43w->>K1p4y*u zxqf``Aa}tMWI2l906;Jpp^z*q7iU#U&k{EPWKd35{qNtmzuw;d z`}X$scf0=s`_JD${Ax?Muj38;`gL6Y)2llFuRnebKIhvTz4izTq0M{0uT>vbQsU>1T1}sq$AHYTL7R_ zEyH}M-0@L}{uM@KsI`3e5;SC^-uqYB!WX_hgOU1nXj$*gF{aMv^Xt7Jse_9^0kMttDM`pHpMNB zjLcLv%b*q~T*uxcm|5U*Gf@#pMuE1+%C@H$AZxO1kg=w8S&PWH$qL_3l6@vz4(Blm z1n5{l%a}^g`eX`;#Td#B_Y1nZ=2t*Jh4O>=d0iv^%Tluk$?j%;^=lm)Rk zkLBFgP)!q}Ik)3Io9yf`B3-u~t1Vg%a9`E; zGtP2r-W#|#@G%?s;lB&huQz|q`E#zlFvg+-XSi{;y&nI-8Az&fQ1rHG+rzf=8*%El zi9-j#dLyW@{1_w+#M@P3;Np^NB4J~XRw72g@jRkAXT*ljRu-wY^7s6zK4VtrM>F?G zpA#r8H=l&Abmm?HdYaW4jmR1k&f+cmex{#0LTA36!0U7kCxfp?u{{HbFVWi5{AvMO z#m?ITQ{{uhv}&xf3BQId8JJzm0%XHk;3YEE2STTh9wJ?uWS9qU$z5gD+j(0H@I-}S z4rTHfXn}wqS=PXIKRAxZ39LET;rt|WB+7LIdUN8Weeu>)Rsx|q<7+7t^S-$4%qaAteQSDrJTYho!{geHOxB%aey&5{%rJGdUPC(=nEUM(DT$_&IZ4E_`kz?vQ@hwHw6A)$9A|5 z>)sZ1B6FE;;$U0g&vgC>b1g1A(PIrA`MJ!+HUzq=v!4<$zT;X3icv^j#&Eh`_0gcl z@`ZQz$@1loI2}hLtozg+Y{+p(Z0{q4InKA(t6$7KXyti18H5)7_VkQ(->s!wo56ch zY@X+iwu@QCt2klJ$n!@ct0&Lj&&$b*3fyx0qw;bi+x3* z;*>H&odcb1TlM7mFhesf?>JWMcI^9vv+E?OyMo)=``U>T?{ zaf+`zJ?q5XNl&N^KmkOE*6(;K_Y;ve3zE%yjO<32PJ<;)8-4<{y*qziTnS~J# zI46`$xI^14(81};{<0WZ)M}l6d(1X@vlH^EQDWulGs)f-nzt+Svx7l^?fHb8HCsW+ zVwWUz4SM1k=b~dKMtU( zF_vIVo%RU2kI!@mMmn-+LRTc{M55EH0MFl00c^5CG%qZ10WQ6Zes43prPUk*V4TbF z7zC|6?reuKHmH^ef_cItDw)l>YJJ49GB#yYP&-v3xX1-yO0f$T)Eu6`JjWB>r!fx} zSC1i}T+K%&w!vP&nZ|PAZT2)O_GtFH;5f$?7xf@C!vtqwpxEc_d?JvB6G5-`)POTU z$-;tL!d;vTk8IUj=x*qNZ-yUI9B446Ixp51QzL3uFZa_pJC+Hrc)$!TG8!_m$c|vRgsX?b#kCa-?V)h=u zKd4-1t$q&lWFKgZI%Bji7r4{=+E;p_G7L8b^{?){N0>wFv}qD(5js+=+JSn^&q2i5=tn)P z?C0@qOYdQx>vL?Gr!uYkwLi2|>MsQOSZ6K17yM$7fWYC(1{$xE_}TV!TY&|zjb2#t za$&$NzNbeya>+W;NAi6h3`UyA)g&5HIbF+253LJtqXxiSk#+fm|5HWC+x$w>go31yAk8;Pne_APl0nB>vz0mMQo80q4T_XC;j<`-;MFJ7Z6{& z@AgvedF~B7vw`w8&L2|n72sdWxLTq_&IXR*z&D_vH}0;z90&C9DC7HI3gr@l_8w=oKWQIrbdS zT50t@&+;$g8x73)6#MahrR!Xo#kzQDSNIn>(M{d0akLN5xo55MthL^=ycyq?hZREZ zlm&>ufRm>MP-cz+Q_rsz0LhJ1TVXm^5GweOEQ86E+u zK&M^6($irM*zxCkScDdel_6C7u3w0$EN)Q~gXkls?^nIlL2A((qLmOaK z%mPv(x^Tp9nS@rvuQ=^kMKxEyYVU~qR78%UmP?T(A}5=Th!t9DEV%5#vPUhz7*=jO z3%I2SH6sHXnL^~a2)IHc%j3-PAQUMr%KJe~XDz!^5JF00wcDW=iDn5H?5NOkM-@f! z0@#d8L?g6q3?gWXT>TuCW}H&)-2?S7Q|uR7@>{q;d66_f37)4k4zS5(mk|Zj5|LdI zy153`1%~#RRnP(%^8@DqWhb6e6PO6Lm5)-0&_6j<4Ewna%-{QhgN&4`nnD6<;|7rH zW&%pZ5n!gRN4cYTlm1S4Z@G!@XY1G4683Yrlg@IT_rdr{+W6opU-qvPc%8uO1a6+d z_;px2e#OUkeSX;^8Ikbq90h_^s^akP7DikFas%)|PI>>`8(sLyc1|Nsazc;>kfA8l zVO4HQmWWVo7Sl=%Hk%I6QP6hHd1A5O_&8_Jqe13ZPRgQzNCx5!5nuQz6iJ2mVDw!% z=sN4sFxKkJA8|Zp+^U0WYIRPNUjKk2B7v2OO0H!rK|16eIc`Q~$l|t|FoLvLWtbr) z4CJ5R(Uyn#IRn)Y(N@Jj?Axf`pe`5Lm5bf;U+g2Mvq}c2a|-9#I5A5(JIW$!!c?5! zDDJ^eY@@+7!k+0ns8kEiRX*tIAzPA#cfwY{X@$dNDl-_T*!z_Vjil70EYK2OQi^&0 zR4QF^RPlWH=E4#glXJR&mz%gx5#Q$AiQpZqePnc5IosyKk6nYYNQ0EjZ5v)0>9$Cf zF}ou=;o7>%Zs3b2+iQe}Wzsf2cKDe+y3 z*&~L1u#=Po1i+ys*|hK)sS;2sxcG_4UdoIrXou?Tn;h<2Elp6bp1AiJbL~= z{s105xR>sA0*{}-@?*zu^v5l~lCplysO#lKlz9-8VW9`Dj%98g_6=~jTB+}mrKu?} zZDBD-=~xwr+VAKTNjht!cmTL*7z?;bmdZPKY0lW~QhVkUowj4GsYc^AIFat&nw9^# z6(h?w!L$u)#SRPc>G&GXX59daDFPqoc#3O@ggigWf;^}iIsMA9t2|*fwOq5DpYz+=%1es$|+cQ**N9ISpu_snh4F#OX!UaOT zxj8e~H$Y11yOLW?6ctA)i+sfVd_UNnw@S=)GdV)8&i6l8*FxpMQ$4b%P%F4WW^tF6 zbCw9N43Ew#6}3cWaTufc!IF-dB<6Y`c~AJ*`Z#k~Z;%X|L&=iZ$#$_t_*mfB`Z#k~ zX^;$?L&=ih+ggb^k}v6l_GRlYuw6Y+_&8IX6%B5~X63#juM>Ekzz;ovcYim~U|r+4 zF239HH!!}-d13W-b{qW}bBlL`8 zYvg$3Y@37jArJq$Zu3$<&mZQffWuPZCjnRIx6yJ+oslUqx5j6nQehuk=$~Y4wGj<+ z0L|7x{@2woEcoN%PKZn}5?_6O^dBSUm>O1~&0jG;3`=~e`J-Pno)?xM8`$r*?+;u z&^}p=TA4(<`Q?Q=;(P*V{izK+KkPA(UQy1$l@Ag7H~}5Qm^6w;N_xL5^_ieG(B}83 zy2uBrCz>PiaGcdV{QuyDm;3nyW>;wI+$#hX~FimLy9ZI?dKy5-atYptZp{vhDG)l17fQATy7+XdWL9 zK(k39pwwpqRkt?Tb*|aP@U-=g3}B?F`R?5K6@D@_&wt(?&&pU0o@<^vTk~J(6GQv* zP3FIE4i0_asa-kQpUTNE4xZ~%okD90P>-{mOQisO323+MqepNM zk2iPe2&4YvHK3FW!Ml(3QuD2E=d*Z*eK$sM$d(p$BDiufO1n%YUQ6L6lJ8Qw%d0Jw zKLOE@$>*Zk3ht?w3#$zQ21BxBV01oyj_KM_A3KEyK;JfiCbaMYYEl54Sf7-^P5-xSEITTU?W^D(V)|O8zC=; z99P*;B(gFVNfCi-Gon(yjnKUyee#Zq-Xpvc#OMd}2N!1umlUi0JLk7CP+Y@l*kj<5 zQFbws)k4}ju0kI4({}$(D7Ys+lNZFBG zlU$5AO|A}iS3Q#@dy*12o?aHZKEL`mnTY=wX(;Nv$=W%D<#}6R6_pa@I zxK}#x-`U3C_2oD1kpS|TeVd^x936z8ZU~N5@gjJdABh_{mUmTSHSIl64ghi&;4zr% z2?sTe!S@T~ttvUK#M<(iyf?BcqtW_NoBBcNt?c^*b$adiBWAb!7qi-7;5?3jKhQkQ zW6&~j`f0-qa|obx)^D9Z%+$)A;Ia8NBPO|0^v2kEe76n=hMdfO{x zERQ<*06_FwUMKK6f!7KA>=WSE$n zJG0Yz+_Co-)F>BJWd+!w7ieawM+~hkjH^y3y{Vcke9wF8P62 zkDb7Hdby!t$`gES6FAOvQ9KrZB8NVmJ(bXtl->zJx(fEsA9dt!dm2WH8$~xj;v3+y z;aXHL=bE|}!J&&xLl49SV9UVK<^eh*~!x5<%e04@&F35XJ|stzDJbCxRVr94Yj z&%udaqx?W(31wD8IZpsnPth;8%`y5g9iNSJm3QXx$8#8>&C=jmcYMpvIM1Hr+n+yl N-fcymz4uS(@BhLsE@A)x diff --git a/lib/VGA_ctrl/src/fonts/System_16x16.bff b/lib/VGA_ctrl/src/fonts/System_16x16.bff deleted file mode 100644 index 4ca2523ea9769b9bf3e5a1084b2b998d5935b133..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 65812 zcmeHN3v%qZ4ct`O`^J8oRF07QUm|zP0k%Q_BGKKXMaeVc&zP$BEHuz)e5e_DKmYyT zAOHB{5BvM?a&xrQ<@NRH*UROv*8&V({#BfX z{d{@8Tz*|HCGF|y*VA8?{A}pejHl;klia;tyyDa4`StnN<>}S3i|VhZlKkuU@84TD z|9r8_gkIw+4cYaw#s4ZjSPQNHGE`h;3F}%LSR1Gt`1|i_`Q0G93hEq?^7j^GP7*pl zI~ZA7?@6)uSQ9-78)R2O@h}OTGrq(Hg3!Co>m)T>@uaPjbUC|;_zlARbPNP_0L6opYg~7h ze@AQF5uQem?-kV4Dkn6TIFw$oV zBhye1V}4>d*5|66@iAwFeU9x1a>Kqb48Z#KrwMyyEa4&iZkI_7J6#ht#i+xKG~ z?_5}XOj8Eoz8-~(qGIusFfz>E!yFBS{E}R*@gO7b5iWCj)O(;32R(o;vk@BsaUaL% zV1CK>f_pz$F4o8U>li3^q(9`Fje>q$TuKOzoLKEI?D9+T4}$-q-A@s-INPf!qB4-4xA3fn_|-o=`4_zP&Vjs zAc5(OiuqoVQMmv1f^3v#fFAhF6xdF9y*+g5iSrt`_aY6CNG7ilj+Ck5s zYy~GP?crpl75ws(T+$u~oqX;5rC=)^>uAf=W*W{Gt-nMyKLs&n-r%PXTUTzl8?&kViN)y0bbN2PPLP7Co zQwVNmo*HT>dlnSb*-5GiF7&eArfgu1gW(q`yhaiqIla5d$2&AyZHlpyG zzc$uj&-eO|h0Xh17s4h(A0`E;T1X5;(OMhh|ycm!2kzuxdqO(&K zj3`vVblz1VQE-4kXJ}fra4_J1BZ{I&kcUPlebysQ;N2tZhBeJkV zVeh9D+w#*JR^q-W$2vZ3w`2!SZ%JSUfxAK4bl=+E;9E@Oy?8cP^^@gRLLUgrLZ;XYpi?EzRE+(8v)_mRku6k3c|j5or9)%eSbC321wC=IG*~`R31_ zZwHp%%|Zu6O*TVO1hdC+@OJVdXkvbac3(})Yd1CTQSRM*;t=>KW4AfF`NScxi3b+tXF-p z{fao(yjp*RGkcVe-Hqa0W2DatSS=dF_$VJUj>Kntt*3m(a5yD^xyGygRDZ=)Lvi)j zyT(Vja_xR3KI5B4z0fvakJ-a0`>B4rSG(#Vu665u#(z(|YLDuV^pr1{+9yzmRj>Lh zt{RG~zun~vQ=k>7(vhMBi8HyR2w(eA{s^NFZEMJI{fpRazoftF{>Z!byjS}ScTeZ5 z#PDp6^z>-+cb}jAB|O~t`{Sj4@D{ezzlG$!h7=U2 z3$XvV2ESd#?*{t?&P7@MT<*KrQc$4I-<9b3-Gazb0PWBA2@Xc3ngxLnW;&|H_ljz2 zVlM}OAz!>q-XEtM)cGKrL7m@s+W!jkDU;KNL{CQXHaPcIP1SCXfB9-SfGg*N3k>RmgiWwxYuc*IeS`(o`-s!3Sja2`=0sQDHg`6%h0U{+k>0#Em@`JX-is2^T8 zGZ>v7pQRUC8(16oQ5%r&kM0X(#rbhq`&j$H4Xoz@x6%LZxc0O5gBw`S18!q|UOxMI z;L})WZD4I+ZQuuQK)#R#KKx>2UV)D{{@DSQ|7du2!jCqu&a>v<-+=Dx(eVECkN?jr zYySNWJlgZF^XyN*o`2ofcgM5yUh%bowSl#P2iZXU?^ODw{UF2LVvOl(2LE>(Hd zpffvxgvCZ!0&zmXNb_Bm>P>K{;I1x8k)Q^W?0UjL%M*(KOZwrFPDoRwj zv;5#|7E~#rohT5)oa#wNr(G6MMsAlu#4XSa4l^pGS-uz8uh2>zF|O6?1~^hQIaj8q z&^NW#{NME8R@-X>M>a5f9URg4M9!>z{r*xseHq*P=fr$Uo@Q?eEpLXUVgLQ;?f&$a z4aK6?3)%Q5=I_Xp{_NKYE81#wI6^HBRBv{spUN>C2!%s_S{ym0AB4j0p^}gF2U%|J zU@6&m2f2mIX#ShD@iFH^=I4UcfIqMpr|x7K4uwpRq({lFjww1n#zq1fm-8uMVW?+@ zHD8+WeouU0CB2)!IH+L)ntTB3cqPRoQC2A&N9M5JlrYSyPA=x&s|0y_MX#u_U{uT_ zGXhdL&bhT~yw4fPRy(SZ_c}q6dUJgHr~J60TGrees__k0_Ra4D{p{uXYDJ6X9KmNS zqRAP>Guk&~QhV_}gFTU7x9zcOce)hr(IgtfI4_0|M9`?m97 ztwZO3?Y#5+!TdS%*?w=$x7R_QM(OM3INlhw?|QEru=SzuJg!P{M=kRl!N@WD-WWT^ zT1Wf6bw2j+^X9+y`8%8Mr`(PZcmE0JALX-&yWo^B6B+;qn7)$_#!)Vd-UY{ZTK$$C zJufw8tMLn-j~Q;%ckPd}KLq8rKcw8(EAq1!P@dy}t4(c?$F&@cZt$zJFtZs^<6o0eNVOzHZMKoQb`@<|p@^77H@+?!@)Z zGA)he7|rVmzp0K5+a_j&%^pPYhC(gQpT{xRY;T}F;aXpDpB);TzqVTM`tWq^IkB-l z>^-$Q7K3=V|FiKX3>|}hnCUo)Yht}q>sHYMEx2Ly#AzlYtlQyj>UMKwcmi)-kDsou zIe+XtR&wq9dcfO$Y2Q)9UA`VZe^W?CShvNg=9LRfPgw8ArkL5=WZ)ULP#Gv)ZRolsPIe?4lpf|T<~06NzBaD&(Oqxo3NMvhw9k@C;tIPWrJtuRX&M@e)oCEYUBObp_J6P%mg@G;EA}(U8~pSbGOvG4W#w$IJAA1;JC$* ze;#jp-EO9Kou20N$gJ&?sf!z0Xl-C^U~S;1Y(Tz!{rj9|Kl^ogl7C(O>#}`L?N_k8 zUL59c2i^O$dp*)FM?mWF>#KXc8XGgvHg&<$efM8C`;<MNApYjgCM%*|9)UNG&)gEhx2BTU^Zd~5-U}dUofR(BX_Ysw%U>5s3SXlI{w>Z zUaJ(e;@H4R9H}5Mkks%by=(oo*p1_Acew}xQzx{cy0oDfA2G$1F2G$1F z2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2G$1F2L2D3 CZx);Y diff --git a/lib/VGA_ctrl/src/fonts/char_rom_c64.vhd b/lib/VGA_ctrl/src/fonts/char_rom_c64.vhd deleted file mode 100644 index 5a544d0..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_c64.vhd +++ /dev/null @@ -1,540 +0,0 @@ --- generated with romgen v3.0 by MikeJ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := ( - x"3C",x"66",x"6E",x"6E",x"60",x"62",x"3C",x"00", -- 0x0000 - x"18",x"3C",x"66",x"7E",x"66",x"66",x"66",x"00", -- 0x0008 - x"7C",x"66",x"66",x"7C",x"66",x"66",x"7C",x"00", -- 0x0010 - x"3C",x"66",x"60",x"60",x"60",x"66",x"3C",x"00", -- 0x0018 - x"78",x"6C",x"66",x"66",x"66",x"6C",x"78",x"00", -- 0x0020 - x"7E",x"60",x"60",x"78",x"60",x"60",x"7E",x"00", -- 0x0028 - x"7E",x"60",x"60",x"78",x"60",x"60",x"60",x"00", -- 0x0030 - x"3C",x"66",x"60",x"6E",x"66",x"66",x"3C",x"00", -- 0x0038 - x"66",x"66",x"66",x"7E",x"66",x"66",x"66",x"00", -- 0x0040 - x"3C",x"18",x"18",x"18",x"18",x"18",x"3C",x"00", -- 0x0048 - x"1E",x"0C",x"0C",x"0C",x"0C",x"6C",x"38",x"00", -- 0x0050 - x"66",x"6C",x"78",x"70",x"78",x"6C",x"66",x"00", -- 0x0058 - x"60",x"60",x"60",x"60",x"60",x"60",x"7E",x"00", -- 0x0060 - x"63",x"77",x"7F",x"6B",x"63",x"63",x"63",x"00", -- 0x0068 - x"66",x"76",x"7E",x"7E",x"6E",x"66",x"66",x"00", -- 0x0070 - x"3C",x"66",x"66",x"66",x"66",x"66",x"3C",x"00", -- 0x0078 - x"7C",x"66",x"66",x"7C",x"60",x"60",x"60",x"00", -- 0x0080 - x"3C",x"66",x"66",x"66",x"66",x"3C",x"0E",x"00", -- 0x0088 - x"7C",x"66",x"66",x"7C",x"78",x"6C",x"66",x"00", -- 0x0090 - x"3C",x"66",x"60",x"3C",x"06",x"66",x"3C",x"00", -- 0x0098 - x"7E",x"18",x"18",x"18",x"18",x"18",x"18",x"00", -- 0x00A0 - x"66",x"66",x"66",x"66",x"66",x"66",x"3C",x"00", -- 0x00A8 - x"66",x"66",x"66",x"66",x"66",x"3C",x"18",x"00", -- 0x00B0 - x"63",x"63",x"63",x"6B",x"7F",x"77",x"63",x"00", -- 0x00B8 - x"66",x"66",x"3C",x"18",x"3C",x"66",x"66",x"00", -- 0x00C0 - x"66",x"66",x"66",x"3C",x"18",x"18",x"18",x"00", -- 0x00C8 - x"7E",x"06",x"0C",x"18",x"30",x"60",x"7E",x"00", -- 0x00D0 - x"3C",x"30",x"30",x"30",x"30",x"30",x"3C",x"00", -- 0x00D8 - x"0C",x"12",x"30",x"7C",x"30",x"62",x"FC",x"00", -- 0x00E0 - x"3C",x"0C",x"0C",x"0C",x"0C",x"0C",x"3C",x"00", -- 0x00E8 - x"00",x"18",x"3C",x"7E",x"18",x"18",x"18",x"18", -- 0x00F0 - x"00",x"10",x"30",x"7F",x"7F",x"30",x"10",x"00", -- 0x00F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0100 - x"18",x"18",x"18",x"18",x"00",x"00",x"18",x"00", -- 0x0108 - x"66",x"66",x"66",x"00",x"00",x"00",x"00",x"00", -- 0x0110 - x"66",x"66",x"FF",x"66",x"FF",x"66",x"66",x"00", -- 0x0118 - x"18",x"3E",x"60",x"3C",x"06",x"7C",x"18",x"00", -- 0x0120 - x"62",x"66",x"0C",x"18",x"30",x"66",x"46",x"00", -- 0x0128 - x"3C",x"66",x"3C",x"38",x"67",x"66",x"3F",x"00", -- 0x0130 - x"06",x"0C",x"18",x"00",x"00",x"00",x"00",x"00", -- 0x0138 - x"0C",x"18",x"30",x"30",x"30",x"18",x"0C",x"00", -- 0x0140 - x"30",x"18",x"0C",x"0C",x"0C",x"18",x"30",x"00", -- 0x0148 - x"00",x"66",x"3C",x"FF",x"3C",x"66",x"00",x"00", -- 0x0150 - x"00",x"18",x"18",x"7E",x"18",x"18",x"00",x"00", -- 0x0158 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"30", -- 0x0160 - x"00",x"00",x"00",x"7E",x"00",x"00",x"00",x"00", -- 0x0168 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"00", -- 0x0170 - x"00",x"03",x"06",x"0C",x"18",x"30",x"60",x"00", -- 0x0178 - x"3C",x"66",x"6E",x"76",x"66",x"66",x"3C",x"00", -- 0x0180 - x"18",x"18",x"38",x"18",x"18",x"18",x"7E",x"00", -- 0x0188 - x"3C",x"66",x"06",x"0C",x"30",x"60",x"7E",x"00", -- 0x0190 - x"3C",x"66",x"06",x"1C",x"06",x"66",x"3C",x"00", -- 0x0198 - x"06",x"0E",x"1E",x"66",x"7F",x"06",x"06",x"00", -- 0x01A0 - x"7E",x"60",x"7C",x"06",x"06",x"66",x"3C",x"00", -- 0x01A8 - x"3C",x"66",x"60",x"7C",x"66",x"66",x"3C",x"00", -- 0x01B0 - x"7E",x"66",x"0C",x"18",x"18",x"18",x"18",x"00", -- 0x01B8 - x"3C",x"66",x"66",x"3C",x"66",x"66",x"3C",x"00", -- 0x01C0 - x"3C",x"66",x"66",x"3E",x"06",x"66",x"3C",x"00", -- 0x01C8 - x"00",x"00",x"18",x"00",x"00",x"18",x"00",x"00", -- 0x01D0 - x"00",x"00",x"18",x"00",x"00",x"18",x"18",x"30", -- 0x01D8 - x"0E",x"18",x"30",x"60",x"30",x"18",x"0E",x"00", -- 0x01E0 - x"00",x"00",x"7E",x"00",x"7E",x"00",x"00",x"00", -- 0x01E8 - x"70",x"18",x"0C",x"06",x"0C",x"18",x"70",x"00", -- 0x01F0 - x"3C",x"66",x"06",x"0C",x"18",x"00",x"18",x"00", -- 0x01F8 - x"00",x"00",x"00",x"FF",x"FF",x"00",x"00",x"00", -- 0x0200 - x"08",x"1C",x"3E",x"7F",x"7F",x"1C",x"3E",x"00", -- 0x0208 - x"18",x"18",x"18",x"18",x"18",x"18",x"18",x"18", -- 0x0210 - x"00",x"00",x"00",x"FF",x"FF",x"00",x"00",x"00", -- 0x0218 - x"00",x"00",x"FF",x"FF",x"00",x"00",x"00",x"00", -- 0x0220 - x"00",x"FF",x"FF",x"00",x"00",x"00",x"00",x"00", -- 0x0228 - x"00",x"00",x"00",x"00",x"FF",x"FF",x"00",x"00", -- 0x0230 - x"30",x"30",x"30",x"30",x"30",x"30",x"30",x"30", -- 0x0238 - x"0C",x"0C",x"0C",x"0C",x"0C",x"0C",x"0C",x"0C", -- 0x0240 - x"00",x"00",x"00",x"E0",x"F0",x"38",x"18",x"18", -- 0x0248 - x"18",x"18",x"1C",x"0F",x"07",x"00",x"00",x"00", -- 0x0250 - x"18",x"18",x"38",x"F0",x"E0",x"00",x"00",x"00", -- 0x0258 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"FF",x"FF", -- 0x0260 - x"C0",x"E0",x"70",x"38",x"1C",x"0E",x"07",x"03", -- 0x0268 - x"03",x"07",x"0E",x"1C",x"38",x"70",x"E0",x"C0", -- 0x0270 - x"FF",x"FF",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x0278 - x"FF",x"FF",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0280 - x"00",x"3C",x"7E",x"7E",x"7E",x"7E",x"3C",x"00", -- 0x0288 - x"00",x"00",x"00",x"00",x"00",x"FF",x"FF",x"00", -- 0x0290 - x"36",x"7F",x"7F",x"7F",x"3E",x"1C",x"08",x"00", -- 0x0298 - x"60",x"60",x"60",x"60",x"60",x"60",x"60",x"60", -- 0x02A0 - x"00",x"00",x"00",x"07",x"0F",x"1C",x"18",x"18", -- 0x02A8 - x"C3",x"E7",x"7E",x"3C",x"3C",x"7E",x"E7",x"C3", -- 0x02B0 - x"00",x"3C",x"7E",x"66",x"66",x"7E",x"3C",x"00", -- 0x02B8 - x"18",x"18",x"66",x"66",x"18",x"18",x"3C",x"00", -- 0x02C0 - x"06",x"06",x"06",x"06",x"06",x"06",x"06",x"06", -- 0x02C8 - x"08",x"1C",x"3E",x"7F",x"3E",x"1C",x"08",x"00", -- 0x02D0 - x"18",x"18",x"18",x"FF",x"FF",x"18",x"18",x"18", -- 0x02D8 - x"C0",x"C0",x"30",x"30",x"C0",x"C0",x"30",x"30", -- 0x02E0 - x"18",x"18",x"18",x"18",x"18",x"18",x"18",x"18", -- 0x02E8 - x"00",x"00",x"03",x"3E",x"76",x"36",x"36",x"00", -- 0x02F0 - x"FF",x"7F",x"3F",x"1F",x"0F",x"07",x"03",x"01", -- 0x02F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0300 - x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0", -- 0x0308 - x"00",x"00",x"00",x"00",x"FF",x"FF",x"FF",x"FF", -- 0x0310 - x"FF",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0318 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"FF", -- 0x0320 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x0328 - x"CC",x"CC",x"33",x"33",x"CC",x"CC",x"33",x"33", -- 0x0330 - x"03",x"03",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0338 - x"00",x"00",x"00",x"00",x"CC",x"CC",x"33",x"33", -- 0x0340 - x"FF",x"FE",x"FC",x"F8",x"F0",x"E0",x"C0",x"80", -- 0x0348 - x"03",x"03",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0350 - x"18",x"18",x"18",x"1F",x"1F",x"18",x"18",x"18", -- 0x0358 - x"00",x"00",x"00",x"00",x"0F",x"0F",x"0F",x"0F", -- 0x0360 - x"18",x"18",x"18",x"1F",x"1F",x"00",x"00",x"00", -- 0x0368 - x"00",x"00",x"00",x"F8",x"F8",x"18",x"18",x"18", -- 0x0370 - x"00",x"00",x"00",x"00",x"00",x"00",x"FF",x"FF", -- 0x0378 - x"00",x"00",x"00",x"1F",x"1F",x"18",x"18",x"18", -- 0x0380 - x"18",x"18",x"18",x"FF",x"FF",x"00",x"00",x"00", -- 0x0388 - x"00",x"00",x"00",x"FF",x"FF",x"18",x"18",x"18", -- 0x0390 - x"18",x"18",x"18",x"F8",x"F8",x"18",x"18",x"18", -- 0x0398 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x03A0 - x"E0",x"E0",x"E0",x"E0",x"E0",x"E0",x"E0",x"E0", -- 0x03A8 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x03B0 - x"FF",x"FF",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B8 - x"FF",x"FF",x"FF",x"00",x"00",x"00",x"00",x"00", -- 0x03C0 - x"00",x"00",x"00",x"00",x"00",x"FF",x"FF",x"FF", -- 0x03C8 - x"03",x"03",x"03",x"03",x"03",x"03",x"FF",x"FF", -- 0x03D0 - x"00",x"00",x"00",x"00",x"F0",x"F0",x"F0",x"F0", -- 0x03D8 - x"0F",x"0F",x"0F",x"0F",x"00",x"00",x"00",x"00", -- 0x03E0 - x"18",x"18",x"18",x"F8",x"F8",x"00",x"00",x"00", -- 0x03E8 - x"F0",x"F0",x"F0",x"F0",x"00",x"00",x"00",x"00", -- 0x03F0 - x"F0",x"F0",x"F0",x"F0",x"0F",x"0F",x"0F",x"0F", -- 0x03F8 - x"C3",x"99",x"91",x"91",x"9F",x"99",x"C3",x"FF", -- 0x0400 - x"E7",x"C3",x"99",x"81",x"99",x"99",x"99",x"FF", -- 0x0408 - x"83",x"99",x"99",x"83",x"99",x"99",x"83",x"FF", -- 0x0410 - x"C3",x"99",x"9F",x"9F",x"9F",x"99",x"C3",x"FF", -- 0x0418 - x"87",x"93",x"99",x"99",x"99",x"93",x"87",x"FF", -- 0x0420 - x"81",x"9F",x"9F",x"87",x"9F",x"9F",x"81",x"FF", -- 0x0428 - x"81",x"9F",x"9F",x"87",x"9F",x"9F",x"9F",x"FF", -- 0x0430 - x"C3",x"99",x"9F",x"91",x"99",x"99",x"C3",x"FF", -- 0x0438 - x"99",x"99",x"99",x"81",x"99",x"99",x"99",x"FF", -- 0x0440 - x"C3",x"E7",x"E7",x"E7",x"E7",x"E7",x"C3",x"FF", -- 0x0448 - x"E1",x"F3",x"F3",x"F3",x"F3",x"93",x"C7",x"FF", -- 0x0450 - x"99",x"93",x"87",x"8F",x"87",x"93",x"99",x"FF", -- 0x0458 - x"9F",x"9F",x"9F",x"9F",x"9F",x"9F",x"81",x"FF", -- 0x0460 - x"9C",x"88",x"80",x"94",x"9C",x"9C",x"9C",x"FF", -- 0x0468 - x"99",x"89",x"81",x"81",x"91",x"99",x"99",x"FF", -- 0x0470 - x"C3",x"99",x"99",x"99",x"99",x"99",x"C3",x"FF", -- 0x0478 - x"83",x"99",x"99",x"83",x"9F",x"9F",x"9F",x"FF", -- 0x0480 - x"C3",x"99",x"99",x"99",x"99",x"C3",x"F1",x"FF", -- 0x0488 - x"83",x"99",x"99",x"83",x"87",x"93",x"99",x"FF", -- 0x0490 - x"C3",x"99",x"9F",x"C3",x"F9",x"99",x"C3",x"FF", -- 0x0498 - x"81",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"FF", -- 0x04A0 - x"99",x"99",x"99",x"99",x"99",x"99",x"C3",x"FF", -- 0x04A8 - x"99",x"99",x"99",x"99",x"99",x"C3",x"E7",x"FF", -- 0x04B0 - x"9C",x"9C",x"9C",x"94",x"80",x"88",x"9C",x"FF", -- 0x04B8 - x"99",x"99",x"C3",x"E7",x"C3",x"99",x"99",x"FF", -- 0x04C0 - x"99",x"99",x"99",x"C3",x"E7",x"E7",x"E7",x"FF", -- 0x04C8 - x"81",x"F9",x"F3",x"E7",x"CF",x"9F",x"81",x"FF", -- 0x04D0 - x"C3",x"CF",x"CF",x"CF",x"CF",x"CF",x"C3",x"FF", -- 0x04D8 - x"F3",x"ED",x"CF",x"83",x"CF",x"9D",x"03",x"FF", -- 0x04E0 - x"C3",x"F3",x"F3",x"F3",x"F3",x"F3",x"C3",x"FF", -- 0x04E8 - x"FF",x"E7",x"C3",x"81",x"E7",x"E7",x"E7",x"E7", -- 0x04F0 - x"FF",x"EF",x"CF",x"80",x"80",x"CF",x"EF",x"FF", -- 0x04F8 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0500 - x"E7",x"E7",x"E7",x"E7",x"FF",x"FF",x"E7",x"FF", -- 0x0508 - x"99",x"99",x"99",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0510 - x"99",x"99",x"00",x"99",x"00",x"99",x"99",x"FF", -- 0x0518 - x"E7",x"C1",x"9F",x"C3",x"F9",x"83",x"E7",x"FF", -- 0x0520 - x"9D",x"99",x"F3",x"E7",x"CF",x"99",x"B9",x"FF", -- 0x0528 - x"C3",x"99",x"C3",x"C7",x"98",x"99",x"C0",x"FF", -- 0x0530 - x"F9",x"F3",x"E7",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0538 - x"F3",x"E7",x"CF",x"CF",x"CF",x"E7",x"F3",x"FF", -- 0x0540 - x"CF",x"E7",x"F3",x"F3",x"F3",x"E7",x"CF",x"FF", -- 0x0548 - x"FF",x"99",x"C3",x"00",x"C3",x"99",x"FF",x"FF", -- 0x0550 - x"FF",x"E7",x"E7",x"81",x"E7",x"E7",x"FF",x"FF", -- 0x0558 - x"FF",x"FF",x"FF",x"FF",x"FF",x"E7",x"E7",x"CF", -- 0x0560 - x"FF",x"FF",x"FF",x"81",x"FF",x"FF",x"FF",x"FF", -- 0x0568 - x"FF",x"FF",x"FF",x"FF",x"FF",x"E7",x"E7",x"FF", -- 0x0570 - x"FF",x"FC",x"F9",x"F3",x"E7",x"CF",x"9F",x"FF", -- 0x0578 - x"C3",x"99",x"91",x"89",x"99",x"99",x"C3",x"FF", -- 0x0580 - x"E7",x"E7",x"C7",x"E7",x"E7",x"E7",x"81",x"FF", -- 0x0588 - x"C3",x"99",x"F9",x"F3",x"CF",x"9F",x"81",x"FF", -- 0x0590 - x"C3",x"99",x"F9",x"E3",x"F9",x"99",x"C3",x"FF", -- 0x0598 - x"F9",x"F1",x"E1",x"99",x"80",x"F9",x"F9",x"FF", -- 0x05A0 - x"81",x"9F",x"83",x"F9",x"F9",x"99",x"C3",x"FF", -- 0x05A8 - x"C3",x"99",x"9F",x"83",x"99",x"99",x"C3",x"FF", -- 0x05B0 - x"81",x"99",x"F3",x"E7",x"E7",x"E7",x"E7",x"FF", -- 0x05B8 - x"C3",x"99",x"99",x"C3",x"99",x"99",x"C3",x"FF", -- 0x05C0 - x"C3",x"99",x"99",x"C1",x"F9",x"99",x"C3",x"FF", -- 0x05C8 - x"FF",x"FF",x"E7",x"FF",x"FF",x"E7",x"FF",x"FF", -- 0x05D0 - x"FF",x"FF",x"E7",x"FF",x"FF",x"E7",x"E7",x"CF", -- 0x05D8 - x"F1",x"E7",x"CF",x"9F",x"CF",x"E7",x"F1",x"FF", -- 0x05E0 - x"FF",x"FF",x"81",x"FF",x"81",x"FF",x"FF",x"FF", -- 0x05E8 - x"8F",x"E7",x"F3",x"F9",x"F3",x"E7",x"8F",x"FF", -- 0x05F0 - x"C3",x"99",x"F9",x"F3",x"E7",x"FF",x"E7",x"FF", -- 0x05F8 - x"FF",x"FF",x"FF",x"00",x"00",x"FF",x"FF",x"FF", -- 0x0600 - x"F7",x"E3",x"C1",x"80",x"80",x"E3",x"C1",x"FF", -- 0x0608 - x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7", -- 0x0610 - x"FF",x"FF",x"FF",x"00",x"00",x"FF",x"FF",x"FF", -- 0x0618 - x"FF",x"FF",x"00",x"00",x"FF",x"FF",x"FF",x"FF", -- 0x0620 - x"FF",x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0628 - x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"FF",x"FF", -- 0x0630 - x"CF",x"CF",x"CF",x"CF",x"CF",x"CF",x"CF",x"CF", -- 0x0638 - x"F3",x"F3",x"F3",x"F3",x"F3",x"F3",x"F3",x"F3", -- 0x0640 - x"FF",x"FF",x"FF",x"1F",x"0F",x"C7",x"E7",x"E7", -- 0x0648 - x"E7",x"E7",x"E3",x"F0",x"F8",x"FF",x"FF",x"FF", -- 0x0650 - x"E7",x"E7",x"C7",x"0F",x"1F",x"FF",x"FF",x"FF", -- 0x0658 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"00",x"00", -- 0x0660 - x"3F",x"1F",x"8F",x"C7",x"E3",x"F1",x"F8",x"FC", -- 0x0668 - x"FC",x"F8",x"F1",x"E3",x"C7",x"8F",x"1F",x"3F", -- 0x0670 - x"00",x"00",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x0678 - x"00",x"00",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0680 - x"FF",x"C3",x"81",x"81",x"81",x"81",x"C3",x"FF", -- 0x0688 - x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"FF", -- 0x0690 - x"C9",x"80",x"80",x"80",x"C1",x"E3",x"F7",x"FF", -- 0x0698 - x"9F",x"9F",x"9F",x"9F",x"9F",x"9F",x"9F",x"9F", -- 0x06A0 - x"FF",x"FF",x"FF",x"F8",x"F0",x"E3",x"E7",x"E7", -- 0x06A8 - x"3C",x"18",x"81",x"C3",x"C3",x"81",x"18",x"3C", -- 0x06B0 - x"FF",x"C3",x"81",x"99",x"99",x"81",x"C3",x"FF", -- 0x06B8 - x"E7",x"E7",x"99",x"99",x"E7",x"E7",x"C3",x"FF", -- 0x06C0 - x"F9",x"F9",x"F9",x"F9",x"F9",x"F9",x"F9",x"F9", -- 0x06C8 - x"F7",x"E3",x"C1",x"80",x"C1",x"E3",x"F7",x"FF", -- 0x06D0 - x"E7",x"E7",x"E7",x"00",x"00",x"E7",x"E7",x"E7", -- 0x06D8 - x"3F",x"3F",x"CF",x"CF",x"3F",x"3F",x"CF",x"CF", -- 0x06E0 - x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7", -- 0x06E8 - x"FF",x"FF",x"FC",x"C1",x"89",x"C9",x"C9",x"FF", -- 0x06F0 - x"00",x"80",x"C0",x"E0",x"F0",x"F8",x"FC",x"FE", -- 0x06F8 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0700 - x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F", -- 0x0708 - x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"00",x"00", -- 0x0710 - x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0718 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00", -- 0x0720 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x0728 - x"33",x"33",x"CC",x"CC",x"33",x"33",x"CC",x"CC", -- 0x0730 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0738 - x"FF",x"FF",x"FF",x"FF",x"33",x"33",x"CC",x"CC", -- 0x0740 - x"00",x"01",x"03",x"07",x"0F",x"1F",x"3F",x"7F", -- 0x0748 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0750 - x"E7",x"E7",x"E7",x"E0",x"E0",x"E7",x"E7",x"E7", -- 0x0758 - x"FF",x"FF",x"FF",x"FF",x"F0",x"F0",x"F0",x"F0", -- 0x0760 - x"E7",x"E7",x"E7",x"E0",x"E0",x"FF",x"FF",x"FF", -- 0x0768 - x"FF",x"FF",x"FF",x"07",x"07",x"E7",x"E7",x"E7", -- 0x0770 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00", -- 0x0778 - x"FF",x"FF",x"FF",x"E0",x"E0",x"E7",x"E7",x"E7", -- 0x0780 - x"E7",x"E7",x"E7",x"00",x"00",x"FF",x"FF",x"FF", -- 0x0788 - x"FF",x"FF",x"FF",x"00",x"00",x"E7",x"E7",x"E7", -- 0x0790 - x"E7",x"E7",x"E7",x"07",x"07",x"E7",x"E7",x"E7", -- 0x0798 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x07A0 - x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F", -- 0x07A8 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x07B0 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x07B8 - x"00",x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x07C0 - x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"00", -- 0x07C8 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"00",x"00", -- 0x07D0 - x"FF",x"FF",x"FF",x"FF",x"0F",x"0F",x"0F",x"0F", -- 0x07D8 - x"F0",x"F0",x"F0",x"F0",x"FF",x"FF",x"FF",x"FF", -- 0x07E0 - x"E7",x"E7",x"E7",x"07",x"07",x"FF",x"FF",x"FF", -- 0x07E8 - x"0F",x"0F",x"0F",x"0F",x"FF",x"FF",x"FF",x"FF", -- 0x07F0 - x"0F",x"0F",x"0F",x"0F",x"F0",x"F0",x"F0",x"F0", -- 0x07F8 - x"3C",x"66",x"6E",x"6E",x"60",x"62",x"3C",x"00", -- 0x0800 - x"00",x"00",x"3C",x"06",x"3E",x"66",x"3E",x"00", -- 0x0808 - x"00",x"60",x"60",x"7C",x"66",x"66",x"7C",x"00", -- 0x0810 - x"00",x"00",x"3C",x"60",x"60",x"60",x"3C",x"00", -- 0x0818 - x"00",x"06",x"06",x"3E",x"66",x"66",x"3E",x"00", -- 0x0820 - x"00",x"00",x"3C",x"66",x"7E",x"60",x"3C",x"00", -- 0x0828 - x"00",x"0E",x"18",x"3E",x"18",x"18",x"18",x"00", -- 0x0830 - x"00",x"00",x"3E",x"66",x"66",x"3E",x"06",x"7C", -- 0x0838 - x"00",x"60",x"60",x"7C",x"66",x"66",x"66",x"00", -- 0x0840 - x"00",x"18",x"00",x"38",x"18",x"18",x"3C",x"00", -- 0x0848 - x"00",x"06",x"00",x"06",x"06",x"06",x"06",x"3C", -- 0x0850 - x"00",x"60",x"60",x"6C",x"78",x"6C",x"66",x"00", -- 0x0858 - x"00",x"38",x"18",x"18",x"18",x"18",x"3C",x"00", -- 0x0860 - x"00",x"00",x"66",x"7F",x"7F",x"6B",x"63",x"00", -- 0x0868 - x"00",x"00",x"7C",x"66",x"66",x"66",x"66",x"00", -- 0x0870 - x"00",x"00",x"3C",x"66",x"66",x"66",x"3C",x"00", -- 0x0878 - x"00",x"00",x"7C",x"66",x"66",x"7C",x"60",x"60", -- 0x0880 - x"00",x"00",x"3E",x"66",x"66",x"3E",x"06",x"06", -- 0x0888 - x"00",x"00",x"7C",x"66",x"60",x"60",x"60",x"00", -- 0x0890 - x"00",x"00",x"3E",x"60",x"3C",x"06",x"7C",x"00", -- 0x0898 - x"00",x"18",x"7E",x"18",x"18",x"18",x"0E",x"00", -- 0x08A0 - x"00",x"00",x"66",x"66",x"66",x"66",x"3E",x"00", -- 0x08A8 - x"00",x"00",x"66",x"66",x"66",x"3C",x"18",x"00", -- 0x08B0 - x"00",x"00",x"63",x"6B",x"7F",x"3E",x"36",x"00", -- 0x08B8 - x"00",x"00",x"66",x"3C",x"18",x"3C",x"66",x"00", -- 0x08C0 - x"00",x"00",x"66",x"66",x"66",x"3E",x"0C",x"78", -- 0x08C8 - x"00",x"00",x"7E",x"0C",x"18",x"30",x"7E",x"00", -- 0x08D0 - x"3C",x"30",x"30",x"30",x"30",x"30",x"3C",x"00", -- 0x08D8 - x"0C",x"12",x"30",x"7C",x"30",x"62",x"FC",x"00", -- 0x08E0 - x"3C",x"0C",x"0C",x"0C",x"0C",x"0C",x"3C",x"00", -- 0x08E8 - x"00",x"18",x"3C",x"7E",x"18",x"18",x"18",x"18", -- 0x08F0 - x"00",x"10",x"30",x"7F",x"7F",x"30",x"10",x"00", -- 0x08F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0900 - x"18",x"18",x"18",x"18",x"00",x"00",x"18",x"00", -- 0x0908 - x"66",x"66",x"66",x"00",x"00",x"00",x"00",x"00", -- 0x0910 - x"66",x"66",x"FF",x"66",x"FF",x"66",x"66",x"00", -- 0x0918 - x"18",x"3E",x"60",x"3C",x"06",x"7C",x"18",x"00", -- 0x0920 - x"62",x"66",x"0C",x"18",x"30",x"66",x"46",x"00", -- 0x0928 - x"3C",x"66",x"3C",x"38",x"67",x"66",x"3F",x"00", -- 0x0930 - x"06",x"0C",x"18",x"00",x"00",x"00",x"00",x"00", -- 0x0938 - x"0C",x"18",x"30",x"30",x"30",x"18",x"0C",x"00", -- 0x0940 - x"30",x"18",x"0C",x"0C",x"0C",x"18",x"30",x"00", -- 0x0948 - x"00",x"66",x"3C",x"FF",x"3C",x"66",x"00",x"00", -- 0x0950 - x"00",x"18",x"18",x"7E",x"18",x"18",x"00",x"00", -- 0x0958 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"30", -- 0x0960 - x"00",x"00",x"00",x"7E",x"00",x"00",x"00",x"00", -- 0x0968 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"00", -- 0x0970 - x"00",x"03",x"06",x"0C",x"18",x"30",x"60",x"00", -- 0x0978 - x"3C",x"66",x"6E",x"76",x"66",x"66",x"3C",x"00", -- 0x0980 - x"18",x"18",x"38",x"18",x"18",x"18",x"7E",x"00", -- 0x0988 - x"3C",x"66",x"06",x"0C",x"30",x"60",x"7E",x"00", -- 0x0990 - x"3C",x"66",x"06",x"1C",x"06",x"66",x"3C",x"00", -- 0x0998 - x"06",x"0E",x"1E",x"66",x"7F",x"06",x"06",x"00", -- 0x09A0 - x"7E",x"60",x"7C",x"06",x"06",x"66",x"3C",x"00", -- 0x09A8 - x"3C",x"66",x"60",x"7C",x"66",x"66",x"3C",x"00", -- 0x09B0 - x"7E",x"66",x"0C",x"18",x"18",x"18",x"18",x"00", -- 0x09B8 - x"3C",x"66",x"66",x"3C",x"66",x"66",x"3C",x"00", -- 0x09C0 - x"3C",x"66",x"66",x"3E",x"06",x"66",x"3C",x"00", -- 0x09C8 - x"00",x"00",x"18",x"00",x"00",x"18",x"00",x"00", -- 0x09D0 - x"00",x"00",x"18",x"00",x"00",x"18",x"18",x"30", -- 0x09D8 - x"0E",x"18",x"30",x"60",x"30",x"18",x"0E",x"00", -- 0x09E0 - x"00",x"00",x"7E",x"00",x"7E",x"00",x"00",x"00", -- 0x09E8 - x"70",x"18",x"0C",x"06",x"0C",x"18",x"70",x"00", -- 0x09F0 - x"3C",x"66",x"06",x"0C",x"18",x"00",x"18",x"00", -- 0x09F8 - x"00",x"00",x"00",x"FF",x"FF",x"00",x"00",x"00", -- 0x0A00 - x"18",x"3C",x"66",x"7E",x"66",x"66",x"66",x"00", -- 0x0A08 - x"7C",x"66",x"66",x"7C",x"66",x"66",x"7C",x"00", -- 0x0A10 - x"3C",x"66",x"60",x"60",x"60",x"66",x"3C",x"00", -- 0x0A18 - x"78",x"6C",x"66",x"66",x"66",x"6C",x"78",x"00", -- 0x0A20 - x"7E",x"60",x"60",x"78",x"60",x"60",x"7E",x"00", -- 0x0A28 - x"7E",x"60",x"60",x"78",x"60",x"60",x"60",x"00", -- 0x0A30 - x"3C",x"66",x"60",x"6E",x"66",x"66",x"3C",x"00", -- 0x0A38 - x"66",x"66",x"66",x"7E",x"66",x"66",x"66",x"00", -- 0x0A40 - x"3C",x"18",x"18",x"18",x"18",x"18",x"3C",x"00", -- 0x0A48 - x"1E",x"0C",x"0C",x"0C",x"0C",x"6C",x"38",x"00", -- 0x0A50 - x"66",x"6C",x"78",x"70",x"78",x"6C",x"66",x"00", -- 0x0A58 - x"60",x"60",x"60",x"60",x"60",x"60",x"7E",x"00", -- 0x0A60 - x"63",x"77",x"7F",x"6B",x"63",x"63",x"63",x"00", -- 0x0A68 - x"66",x"76",x"7E",x"7E",x"6E",x"66",x"66",x"00", -- 0x0A70 - x"3C",x"66",x"66",x"66",x"66",x"66",x"3C",x"00", -- 0x0A78 - x"7C",x"66",x"66",x"7C",x"60",x"60",x"60",x"00", -- 0x0A80 - x"3C",x"66",x"66",x"66",x"66",x"3C",x"0E",x"00", -- 0x0A88 - x"7C",x"66",x"66",x"7C",x"78",x"6C",x"66",x"00", -- 0x0A90 - x"3C",x"66",x"60",x"3C",x"06",x"66",x"3C",x"00", -- 0x0A98 - x"7E",x"18",x"18",x"18",x"18",x"18",x"18",x"00", -- 0x0AA0 - x"66",x"66",x"66",x"66",x"66",x"66",x"3C",x"00", -- 0x0AA8 - x"66",x"66",x"66",x"66",x"66",x"3C",x"18",x"00", -- 0x0AB0 - x"63",x"63",x"63",x"6B",x"7F",x"77",x"63",x"00", -- 0x0AB8 - x"66",x"66",x"3C",x"18",x"3C",x"66",x"66",x"00", -- 0x0AC0 - x"66",x"66",x"66",x"3C",x"18",x"18",x"18",x"00", -- 0x0AC8 - x"7E",x"06",x"0C",x"18",x"30",x"60",x"7E",x"00", -- 0x0AD0 - x"18",x"18",x"18",x"FF",x"FF",x"18",x"18",x"18", -- 0x0AD8 - x"C0",x"C0",x"30",x"30",x"C0",x"C0",x"30",x"30", -- 0x0AE0 - x"18",x"18",x"18",x"18",x"18",x"18",x"18",x"18", -- 0x0AE8 - x"33",x"33",x"CC",x"CC",x"33",x"33",x"CC",x"CC", -- 0x0AF0 - x"33",x"99",x"CC",x"66",x"33",x"99",x"CC",x"66", -- 0x0AF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B00 - x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0", -- 0x0B08 - x"00",x"00",x"00",x"00",x"FF",x"FF",x"FF",x"FF", -- 0x0B10 - x"FF",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"FF", -- 0x0B20 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x0B28 - x"CC",x"CC",x"33",x"33",x"CC",x"CC",x"33",x"33", -- 0x0B30 - x"03",x"03",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0B38 - x"00",x"00",x"00",x"00",x"CC",x"CC",x"33",x"33", -- 0x0B40 - x"CC",x"99",x"33",x"66",x"CC",x"99",x"33",x"66", -- 0x0B48 - x"03",x"03",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0B50 - x"18",x"18",x"18",x"1F",x"1F",x"18",x"18",x"18", -- 0x0B58 - x"00",x"00",x"00",x"00",x"0F",x"0F",x"0F",x"0F", -- 0x0B60 - x"18",x"18",x"18",x"1F",x"1F",x"00",x"00",x"00", -- 0x0B68 - x"00",x"00",x"00",x"F8",x"F8",x"18",x"18",x"18", -- 0x0B70 - x"00",x"00",x"00",x"00",x"00",x"00",x"FF",x"FF", -- 0x0B78 - x"00",x"00",x"00",x"1F",x"1F",x"18",x"18",x"18", -- 0x0B80 - x"18",x"18",x"18",x"FF",x"FF",x"00",x"00",x"00", -- 0x0B88 - x"00",x"00",x"00",x"FF",x"FF",x"18",x"18",x"18", -- 0x0B90 - x"18",x"18",x"18",x"F8",x"F8",x"18",x"18",x"18", -- 0x0B98 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x0BA0 - x"E0",x"E0",x"E0",x"E0",x"E0",x"E0",x"E0",x"E0", -- 0x0BA8 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x0BB0 - x"FF",x"FF",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB8 - x"FF",x"FF",x"FF",x"00",x"00",x"00",x"00",x"00", -- 0x0BC0 - x"00",x"00",x"00",x"00",x"00",x"FF",x"FF",x"FF", -- 0x0BC8 - x"01",x"03",x"06",x"6C",x"78",x"70",x"60",x"00", -- 0x0BD0 - x"00",x"00",x"00",x"00",x"F0",x"F0",x"F0",x"F0", -- 0x0BD8 - x"0F",x"0F",x"0F",x"0F",x"00",x"00",x"00",x"00", -- 0x0BE0 - x"18",x"18",x"18",x"F8",x"F8",x"00",x"00",x"00", -- 0x0BE8 - x"F0",x"F0",x"F0",x"F0",x"00",x"00",x"00",x"00", -- 0x0BF0 - x"F0",x"F0",x"F0",x"F0",x"0F",x"0F",x"0F",x"0F", -- 0x0BF8 - x"C3",x"99",x"91",x"91",x"9F",x"99",x"C3",x"FF", -- 0x0C00 - x"FF",x"FF",x"C3",x"F9",x"C1",x"99",x"C1",x"FF", -- 0x0C08 - x"FF",x"9F",x"9F",x"83",x"99",x"99",x"83",x"FF", -- 0x0C10 - x"FF",x"FF",x"C3",x"9F",x"9F",x"9F",x"C3",x"FF", -- 0x0C18 - x"FF",x"F9",x"F9",x"C1",x"99",x"99",x"C1",x"FF", -- 0x0C20 - x"FF",x"FF",x"C3",x"99",x"81",x"9F",x"C3",x"FF", -- 0x0C28 - x"FF",x"F1",x"E7",x"C1",x"E7",x"E7",x"E7",x"FF", -- 0x0C30 - x"FF",x"FF",x"C1",x"99",x"99",x"C1",x"F9",x"83", -- 0x0C38 - x"FF",x"9F",x"9F",x"83",x"99",x"99",x"99",x"FF", -- 0x0C40 - x"FF",x"E7",x"FF",x"C7",x"E7",x"E7",x"C3",x"FF", -- 0x0C48 - x"FF",x"F9",x"FF",x"F9",x"F9",x"F9",x"F9",x"C3", -- 0x0C50 - x"FF",x"9F",x"9F",x"93",x"87",x"93",x"99",x"FF", -- 0x0C58 - x"FF",x"C7",x"E7",x"E7",x"E7",x"E7",x"C3",x"FF", -- 0x0C60 - x"FF",x"FF",x"99",x"80",x"80",x"94",x"9C",x"FF", -- 0x0C68 - x"FF",x"FF",x"83",x"99",x"99",x"99",x"99",x"FF", -- 0x0C70 - x"FF",x"FF",x"C3",x"99",x"99",x"99",x"C3",x"FF", -- 0x0C78 - x"FF",x"FF",x"83",x"99",x"99",x"83",x"9F",x"9F", -- 0x0C80 - x"FF",x"FF",x"C1",x"99",x"99",x"C1",x"F9",x"F9", -- 0x0C88 - x"FF",x"FF",x"83",x"99",x"9F",x"9F",x"9F",x"FF", -- 0x0C90 - x"FF",x"FF",x"C1",x"9F",x"C3",x"F9",x"83",x"FF", -- 0x0C98 - x"FF",x"E7",x"81",x"E7",x"E7",x"E7",x"F1",x"FF", -- 0x0CA0 - x"FF",x"FF",x"99",x"99",x"99",x"99",x"C1",x"FF", -- 0x0CA8 - x"FF",x"FF",x"99",x"99",x"99",x"C3",x"E7",x"FF", -- 0x0CB0 - x"FF",x"FF",x"9C",x"94",x"80",x"C1",x"C9",x"FF", -- 0x0CB8 - x"FF",x"FF",x"99",x"C3",x"E7",x"C3",x"99",x"FF", -- 0x0CC0 - x"FF",x"FF",x"99",x"99",x"99",x"C1",x"F3",x"87", -- 0x0CC8 - x"FF",x"FF",x"81",x"F3",x"E7",x"CF",x"81",x"FF", -- 0x0CD0 - x"C3",x"CF",x"CF",x"CF",x"CF",x"CF",x"C3",x"FF", -- 0x0CD8 - x"F3",x"ED",x"CF",x"83",x"CF",x"9D",x"03",x"FF", -- 0x0CE0 - x"C3",x"F3",x"F3",x"F3",x"F3",x"F3",x"C3",x"FF", -- 0x0CE8 - x"FF",x"E7",x"C3",x"81",x"E7",x"E7",x"E7",x"E7", -- 0x0CF0 - x"FF",x"EF",x"CF",x"80",x"80",x"CF",x"EF",x"FF", -- 0x0CF8 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0D00 - x"E7",x"E7",x"E7",x"E7",x"FF",x"FF",x"E7",x"FF", -- 0x0D08 - x"99",x"99",x"99",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0D10 - x"99",x"99",x"00",x"99",x"00",x"99",x"99",x"FF", -- 0x0D18 - x"E7",x"C1",x"9F",x"C3",x"F9",x"83",x"E7",x"FF", -- 0x0D20 - x"9D",x"99",x"F3",x"E7",x"CF",x"99",x"B9",x"FF", -- 0x0D28 - x"C3",x"99",x"C3",x"C7",x"98",x"99",x"C0",x"FF", -- 0x0D30 - x"F9",x"F3",x"E7",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0D38 - x"F3",x"E7",x"CF",x"CF",x"CF",x"E7",x"F3",x"FF", -- 0x0D40 - x"CF",x"E7",x"F3",x"F3",x"F3",x"E7",x"CF",x"FF", -- 0x0D48 - x"FF",x"99",x"C3",x"00",x"C3",x"99",x"FF",x"FF", -- 0x0D50 - x"FF",x"E7",x"E7",x"81",x"E7",x"E7",x"FF",x"FF", -- 0x0D58 - x"FF",x"FF",x"FF",x"FF",x"FF",x"E7",x"E7",x"CF", -- 0x0D60 - x"FF",x"FF",x"FF",x"81",x"FF",x"FF",x"FF",x"FF", -- 0x0D68 - x"FF",x"FF",x"FF",x"FF",x"FF",x"E7",x"E7",x"FF", -- 0x0D70 - x"FF",x"FC",x"F9",x"F3",x"E7",x"CF",x"9F",x"FF", -- 0x0D78 - x"C3",x"99",x"91",x"89",x"99",x"99",x"C3",x"FF", -- 0x0D80 - x"E7",x"E7",x"C7",x"E7",x"E7",x"E7",x"81",x"FF", -- 0x0D88 - x"C3",x"99",x"F9",x"F3",x"CF",x"9F",x"81",x"FF", -- 0x0D90 - x"C3",x"99",x"F9",x"E3",x"F9",x"99",x"C3",x"FF", -- 0x0D98 - x"F9",x"F1",x"E1",x"99",x"80",x"F9",x"F9",x"FF", -- 0x0DA0 - x"81",x"9F",x"83",x"F9",x"F9",x"99",x"C3",x"FF", -- 0x0DA8 - x"C3",x"99",x"9F",x"83",x"99",x"99",x"C3",x"FF", -- 0x0DB0 - x"81",x"99",x"F3",x"E7",x"E7",x"E7",x"E7",x"FF", -- 0x0DB8 - x"C3",x"99",x"99",x"C3",x"99",x"99",x"C3",x"FF", -- 0x0DC0 - x"C3",x"99",x"99",x"C1",x"F9",x"99",x"C3",x"FF", -- 0x0DC8 - x"FF",x"FF",x"E7",x"FF",x"FF",x"E7",x"FF",x"FF", -- 0x0DD0 - x"FF",x"FF",x"E7",x"FF",x"FF",x"E7",x"E7",x"CF", -- 0x0DD8 - x"F1",x"E7",x"CF",x"9F",x"CF",x"E7",x"F1",x"FF", -- 0x0DE0 - x"FF",x"FF",x"81",x"FF",x"81",x"FF",x"FF",x"FF", -- 0x0DE8 - x"8F",x"E7",x"F3",x"F9",x"F3",x"E7",x"8F",x"FF", -- 0x0DF0 - x"C3",x"99",x"F9",x"F3",x"E7",x"FF",x"E7",x"FF", -- 0x0DF8 - x"FF",x"FF",x"FF",x"00",x"00",x"FF",x"FF",x"FF", -- 0x0E00 - x"E7",x"C3",x"99",x"81",x"99",x"99",x"99",x"FF", -- 0x0E08 - x"83",x"99",x"99",x"83",x"99",x"99",x"83",x"FF", -- 0x0E10 - x"C3",x"99",x"9F",x"9F",x"9F",x"99",x"C3",x"FF", -- 0x0E18 - x"87",x"93",x"99",x"99",x"99",x"93",x"87",x"FF", -- 0x0E20 - x"81",x"9F",x"9F",x"87",x"9F",x"9F",x"81",x"FF", -- 0x0E28 - x"81",x"9F",x"9F",x"87",x"9F",x"9F",x"9F",x"FF", -- 0x0E30 - x"C3",x"99",x"9F",x"91",x"99",x"99",x"C3",x"FF", -- 0x0E38 - x"99",x"99",x"99",x"81",x"99",x"99",x"99",x"FF", -- 0x0E40 - x"C3",x"E7",x"E7",x"E7",x"E7",x"E7",x"C3",x"FF", -- 0x0E48 - x"E1",x"F3",x"F3",x"F3",x"F3",x"93",x"C7",x"FF", -- 0x0E50 - x"99",x"93",x"87",x"8F",x"87",x"93",x"99",x"FF", -- 0x0E58 - x"9F",x"9F",x"9F",x"9F",x"9F",x"9F",x"81",x"FF", -- 0x0E60 - x"9C",x"88",x"80",x"94",x"9C",x"9C",x"9C",x"FF", -- 0x0E68 - x"99",x"89",x"81",x"81",x"91",x"99",x"99",x"FF", -- 0x0E70 - x"C3",x"99",x"99",x"99",x"99",x"99",x"C3",x"FF", -- 0x0E78 - x"83",x"99",x"99",x"83",x"9F",x"9F",x"9F",x"FF", -- 0x0E80 - x"C3",x"99",x"99",x"99",x"99",x"C3",x"F1",x"FF", -- 0x0E88 - x"83",x"99",x"99",x"83",x"87",x"93",x"99",x"FF", -- 0x0E90 - x"C3",x"99",x"9F",x"C3",x"F9",x"99",x"C3",x"FF", -- 0x0E98 - x"81",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"FF", -- 0x0EA0 - x"99",x"99",x"99",x"99",x"99",x"99",x"C3",x"FF", -- 0x0EA8 - x"99",x"99",x"99",x"99",x"99",x"C3",x"E7",x"FF", -- 0x0EB0 - x"9C",x"9C",x"9C",x"94",x"80",x"88",x"9C",x"FF", -- 0x0EB8 - x"99",x"99",x"C3",x"E7",x"C3",x"99",x"99",x"FF", -- 0x0EC0 - x"99",x"99",x"99",x"C3",x"E7",x"E7",x"E7",x"FF", -- 0x0EC8 - x"81",x"F9",x"F3",x"E7",x"CF",x"9F",x"81",x"FF", -- 0x0ED0 - x"E7",x"E7",x"E7",x"00",x"00",x"E7",x"E7",x"E7", -- 0x0ED8 - x"3F",x"3F",x"CF",x"CF",x"3F",x"3F",x"CF",x"CF", -- 0x0EE0 - x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7",x"E7", -- 0x0EE8 - x"CC",x"CC",x"33",x"33",x"CC",x"CC",x"33",x"33", -- 0x0EF0 - x"CC",x"66",x"33",x"99",x"CC",x"66",x"33",x"99", -- 0x0EF8 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0F00 - x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F", -- 0x0F08 - x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"00",x"00", -- 0x0F10 - x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0F18 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00", -- 0x0F20 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x0F28 - x"33",x"33",x"CC",x"CC",x"33",x"33",x"CC",x"CC", -- 0x0F30 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0F38 - x"FF",x"FF",x"FF",x"FF",x"33",x"33",x"CC",x"CC", -- 0x0F40 - x"33",x"66",x"CC",x"99",x"33",x"66",x"CC",x"99", -- 0x0F48 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0F50 - x"E7",x"E7",x"E7",x"E0",x"E0",x"E7",x"E7",x"E7", -- 0x0F58 - x"FF",x"FF",x"FF",x"FF",x"F0",x"F0",x"F0",x"F0", -- 0x0F60 - x"E7",x"E7",x"E7",x"E0",x"E0",x"FF",x"FF",x"FF", -- 0x0F68 - x"FF",x"FF",x"FF",x"07",x"07",x"E7",x"E7",x"E7", -- 0x0F70 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00", -- 0x0F78 - x"FF",x"FF",x"FF",x"E0",x"E0",x"E7",x"E7",x"E7", -- 0x0F80 - x"E7",x"E7",x"E7",x"00",x"00",x"FF",x"FF",x"FF", -- 0x0F88 - x"FF",x"FF",x"FF",x"00",x"00",x"E7",x"E7",x"E7", -- 0x0F90 - x"E7",x"E7",x"E7",x"07",x"07",x"E7",x"E7",x"E7", -- 0x0F98 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x0FA0 - x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F", -- 0x0FA8 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x0FB0 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0FB8 - x"00",x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0FC0 - x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"00", -- 0x0FC8 - x"FE",x"FC",x"F9",x"93",x"87",x"8F",x"9F",x"FF", -- 0x0FD0 - x"FF",x"FF",x"FF",x"FF",x"0F",x"0F",x"0F",x"0F", -- 0x0FD8 - x"F0",x"F0",x"F0",x"F0",x"FF",x"FF",x"FF",x"FF", -- 0x0FE0 - x"E7",x"E7",x"E7",x"07",x"07",x"FF",x"FF",x"FF", -- 0x0FE8 - x"0F",x"0F",x"0F",x"0F",x"FF",x"FF",x"FF",x"FF", -- 0x0FF0 - x"0F",x"0F",x"0F",x"0F",x"F0",x"F0",x"F0",x"F0" -- 0x0FF8 - ); - -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; -end RTL; diff --git a/lib/VGA_ctrl/src/fonts/char_rom_data.vhd b/lib/VGA_ctrl/src/fonts/char_rom_data.vhd deleted file mode 100644 index c52e7f7..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_data.vhd +++ /dev/null @@ -1,539 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := ( - x"7C",x"40",x"7C",x"44",x"7C",x"0C",x"0C",x"7C", -- 0x0000 - x"3C",x"24",x"7E",x"62",x"62",x"62",x"62",x"00", -- 0x0008 - x"7C",x"24",x"3E",x"32",x"32",x"32",x"7E",x"00", -- 0x0010 - x"7E",x"42",x"40",x"60",x"60",x"62",x"7E",x"00", -- 0x0018 - x"7E",x"22",x"22",x"32",x"32",x"32",x"7E",x"00", -- 0x0020 - x"7E",x"40",x"40",x"78",x"60",x"60",x"7E",x"00", -- 0x0028 - x"7E",x"40",x"40",x"78",x"60",x"60",x"60",x"00", -- 0x0030 - x"7E",x"42",x"40",x"6E",x"62",x"62",x"7E",x"00", -- 0x0038 - x"42",x"42",x"42",x"7E",x"62",x"62",x"62",x"00", -- 0x0040 - x"10",x"10",x"10",x"18",x"18",x"18",x"18",x"00", -- 0x0048 - x"02",x"02",x"02",x"06",x"06",x"46",x"3C",x"00", -- 0x0050 - x"42",x"44",x"48",x"7E",x"62",x"62",x"62",x"00", -- 0x0058 - x"40",x"40",x"40",x"60",x"60",x"60",x"7E",x"00", -- 0x0060 - x"66",x"5A",x"42",x"62",x"62",x"62",x"62",x"00", -- 0x0068 - x"72",x"4A",x"4A",x"6A",x"6A",x"6A",x"66",x"00", -- 0x0070 - x"7E",x"42",x"42",x"62",x"62",x"62",x"7E",x"00", -- 0x0078 - x"7E",x"42",x"42",x"7E",x"60",x"60",x"60",x"00", -- 0x0080 - x"7E",x"42",x"42",x"62",x"6A",x"64",x"7A",x"00", -- 0x0088 - x"7E",x"42",x"42",x"7E",x"64",x"62",x"62",x"00", -- 0x0090 - x"7E",x"42",x"40",x"7E",x"06",x"46",x"7E",x"00", -- 0x0098 - x"7C",x"10",x"10",x"18",x"18",x"18",x"18",x"00", -- 0x00A0 - x"42",x"42",x"42",x"62",x"62",x"62",x"7E",x"00", -- 0x00A8 - x"42",x"42",x"42",x"24",x"24",x"18",x"18",x"00", -- 0x00B0 - x"62",x"62",x"62",x"62",x"42",x"5A",x"66",x"00", -- 0x00B8 - x"42",x"24",x"18",x"7C",x"62",x"62",x"62",x"00", -- 0x00C0 - x"42",x"42",x"42",x"3C",x"18",x"18",x"18",x"00", -- 0x00C8 - x"7E",x"02",x"1C",x"60",x"60",x"60",x"7E",x"00", -- 0x00D0 - x"3C",x"20",x"20",x"30",x"30",x"30",x"3C",x"00", -- 0x00D8 - x"18",x"20",x"20",x"78",x"60",x"60",x"7C",x"00", -- 0x00E0 - x"3C",x"04",x"04",x"0C",x"0C",x"0C",x"3C",x"00", -- 0x00E8 - x"08",x"1C",x"2A",x"08",x"08",x"08",x"08",x"00", -- 0x00F0 - x"00",x"20",x"40",x"FE",x"40",x"20",x"00",x"00", -- 0x00F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0100 - x"18",x"18",x"1C",x"1C",x"1C",x"00",x"1C",x"00", -- 0x0108 - x"36",x"36",x"12",x"12",x"00",x"00",x"00",x"00", -- 0x0110 - x"24",x"24",x"7E",x"34",x"7E",x"34",x"34",x"00", -- 0x0118 - x"08",x"3E",x"28",x"3E",x"1A",x"3E",x"18",x"00", -- 0x0120 - x"70",x"52",x"74",x"08",x"1E",x"2A",x"4E",x"00", -- 0x0128 - x"78",x"48",x"30",x"70",x"6A",x"64",x"7A",x"00", -- 0x0130 - x"38",x"38",x"08",x"08",x"00",x"00",x"00",x"00", -- 0x0138 - x"0C",x"10",x"20",x"30",x"30",x"10",x"0C",x"00", -- 0x0140 - x"30",x"08",x"04",x"0C",x"0C",x"08",x"30",x"00", -- 0x0148 - x"08",x"2A",x"1C",x"3E",x"1C",x"2A",x"08",x"00", -- 0x0150 - x"00",x"08",x"08",x"3E",x"3E",x"0C",x"0C",x"00", -- 0x0158 - x"00",x"00",x"00",x"00",x"1C",x"1C",x"04",x"04", -- 0x0160 - x"00",x"00",x"00",x"7E",x"7E",x"00",x"00",x"00", -- 0x0168 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"00", -- 0x0170 - x"00",x"02",x"04",x"08",x"10",x"20",x"40",x"00", -- 0x0178 - x"7E",x"42",x"46",x"6A",x"72",x"62",x"7E",x"00", -- 0x0180 - x"38",x"08",x"08",x"18",x"18",x"18",x"3C",x"00", -- 0x0188 - x"7E",x"42",x"02",x"7E",x"60",x"60",x"7E",x"00", -- 0x0190 - x"3E",x"02",x"02",x"1E",x"06",x"06",x"7E",x"00", -- 0x0198 - x"40",x"40",x"44",x"44",x"7E",x"0C",x"0C",x"00", -- 0x01A0 - x"3E",x"20",x"20",x"3E",x"06",x"46",x"7E",x"00", -- 0x01A8 - x"7E",x"40",x"40",x"7E",x"62",x"62",x"7E",x"00", -- 0x01B0 - x"7E",x"42",x"04",x"08",x"18",x"18",x"18",x"00", -- 0x01B8 - x"3C",x"24",x"24",x"7E",x"62",x"62",x"7E",x"00", -- 0x01C0 - x"7E",x"42",x"42",x"7E",x"06",x"06",x"7E",x"00", -- 0x01C8 - x"00",x"00",x"18",x"00",x"18",x"18",x"00",x"00", -- 0x01D0 - x"00",x"00",x"1C",x"00",x"1C",x"1C",x"04",x"04", -- 0x01D8 - x"0E",x"18",x"30",x"60",x"30",x"18",x"0E",x"00", -- 0x01E0 - x"00",x"00",x"7E",x"00",x"7E",x"7E",x"00",x"00", -- 0x01E8 - x"70",x"18",x"0C",x"06",x"0C",x"18",x"70",x"00", -- 0x01F0 - x"7E",x"42",x"02",x"3E",x"30",x"00",x"30",x"00", -- 0x01F8 - x"00",x"00",x"00",x"00",x"FF",x"00",x"00",x"00", -- 0x0200 - x"18",x"3C",x"7E",x"7E",x"18",x"18",x"7E",x"00", -- 0x0208 - x"10",x"10",x"10",x"10",x"10",x"10",x"10",x"10", -- 0x0210 - x"00",x"00",x"00",x"FF",x"00",x"00",x"00",x"00", -- 0x0218 - x"00",x"00",x"FF",x"00",x"00",x"00",x"00",x"00", -- 0x0220 - x"00",x"FF",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0228 - x"00",x"00",x"00",x"00",x"00",x"FF",x"00",x"00", -- 0x0230 - x"20",x"20",x"20",x"20",x"20",x"20",x"20",x"20", -- 0x0238 - x"04",x"04",x"04",x"04",x"04",x"04",x"04",x"04", -- 0x0240 - x"00",x"00",x"00",x"C0",x"30",x"10",x"08",x"08", -- 0x0248 - x"10",x"10",x"08",x"0C",x"03",x"00",x"00",x"00", -- 0x0250 - x"08",x"08",x"10",x"30",x"C0",x"00",x"00",x"00", -- 0x0258 - x"80",x"80",x"80",x"80",x"80",x"80",x"80",x"FF", -- 0x0260 - x"80",x"40",x"20",x"10",x"08",x"04",x"02",x"01", -- 0x0268 - x"01",x"02",x"04",x"08",x"10",x"20",x"40",x"80", -- 0x0270 - x"FF",x"80",x"80",x"80",x"80",x"80",x"80",x"80", -- 0x0278 - x"FF",x"01",x"01",x"01",x"01",x"01",x"01",x"01", -- 0x0280 - x"3C",x"7E",x"7E",x"7E",x"7E",x"7E",x"3C",x"00", -- 0x0288 - x"00",x"00",x"00",x"00",x"00",x"00",x"FF",x"00", -- 0x0290 - x"24",x"7E",x"7E",x"7E",x"3C",x"18",x"18",x"00", -- 0x0298 - x"40",x"40",x"40",x"40",x"40",x"40",x"40",x"40", -- 0x02A0 - x"00",x"00",x"00",x"03",x"0C",x"08",x"10",x"10", -- 0x02A8 - x"81",x"42",x"24",x"18",x"18",x"24",x"42",x"81", -- 0x02B0 - x"3C",x"7E",x"66",x"42",x"66",x"7E",x"3C",x"00", -- 0x02B8 - x"18",x"18",x"7E",x"7E",x"18",x"18",x"7E",x"00", -- 0x02C0 - x"02",x"02",x"02",x"02",x"02",x"02",x"02",x"02", -- 0x02C8 - x"00",x"18",x"3C",x"7E",x"7E",x"3C",x"18",x"00", -- 0x02D0 - x"08",x"08",x"08",x"FF",x"08",x"08",x"08",x"08", -- 0x02D8 - x"C0",x"30",x"C0",x"30",x"C0",x"30",x"C0",x"30", -- 0x02E0 - x"08",x"08",x"08",x"08",x"08",x"08",x"08",x"08", -- 0x02E8 - x"00",x"00",x"7C",x"24",x"64",x"64",x"66",x"00", -- 0x02F0 - x"FF",x"7F",x"3F",x"1F",x"0F",x"07",x"03",x"01", -- 0x02F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0300 - x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0", -- 0x0308 - x"00",x"00",x"00",x"00",x"FF",x"FF",x"FF",x"FF", -- 0x0310 - x"FF",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0318 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"FF", -- 0x0320 - x"80",x"80",x"80",x"80",x"80",x"80",x"80",x"80", -- 0x0328 - x"CC",x"33",x"CC",x"33",x"CC",x"33",x"CC",x"33", -- 0x0330 - x"01",x"01",x"01",x"01",x"01",x"01",x"01",x"01", -- 0x0338 - x"00",x"00",x"00",x"00",x"CC",x"33",x"CC",x"33", -- 0x0340 - x"FF",x"FE",x"FC",x"F8",x"F0",x"E0",x"C0",x"80", -- 0x0348 - x"03",x"03",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0350 - x"08",x"08",x"08",x"0F",x"08",x"08",x"08",x"08", -- 0x0358 - x"00",x"00",x"00",x"00",x"0F",x"0F",x"0F",x"0F", -- 0x0360 - x"08",x"08",x"08",x"0F",x"00",x"00",x"00",x"00", -- 0x0368 - x"00",x"00",x"00",x"F8",x"08",x"08",x"08",x"08", -- 0x0370 - x"00",x"00",x"00",x"00",x"00",x"00",x"FF",x"FF", -- 0x0378 - x"00",x"00",x"00",x"0F",x"08",x"08",x"08",x"08", -- 0x0380 - x"08",x"08",x"08",x"FF",x"00",x"00",x"00",x"00", -- 0x0388 - x"00",x"00",x"00",x"FF",x"08",x"08",x"08",x"08", -- 0x0390 - x"08",x"08",x"08",x"F8",x"08",x"08",x"08",x"08", -- 0x0398 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x03A0 - x"E0",x"E0",x"E0",x"E0",x"E0",x"E0",x"E0",x"E0", -- 0x03A8 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x03B0 - x"FF",x"FF",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B8 - x"FF",x"FF",x"FF",x"00",x"00",x"00",x"00",x"00", -- 0x03C0 - x"00",x"00",x"00",x"00",x"00",x"FF",x"FF",x"FF", -- 0x03C8 - x"01",x"01",x"01",x"01",x"01",x"01",x"01",x"FF", -- 0x03D0 - x"00",x"00",x"00",x"00",x"F0",x"F0",x"F0",x"F0", -- 0x03D8 - x"0F",x"0F",x"0F",x"0F",x"00",x"00",x"00",x"00", -- 0x03E0 - x"08",x"08",x"08",x"F8",x"00",x"00",x"00",x"00", -- 0x03E8 - x"F0",x"F0",x"F0",x"F0",x"00",x"00",x"00",x"00", -- 0x03F0 - x"F0",x"F0",x"F0",x"F0",x"0F",x"0F",x"0F",x"0F", -- 0x03F8 - x"83",x"BF",x"83",x"BB",x"83",x"F3",x"F3",x"83", -- 0x0400 - x"C3",x"DB",x"81",x"9D",x"9D",x"9D",x"9D",x"FF", -- 0x0408 - x"83",x"DB",x"C1",x"CD",x"CD",x"CD",x"81",x"FF", -- 0x0410 - x"81",x"BD",x"BF",x"9F",x"9F",x"9D",x"81",x"FF", -- 0x0418 - x"81",x"DD",x"DD",x"CD",x"CD",x"CD",x"81",x"FF", -- 0x0420 - x"81",x"BF",x"BF",x"87",x"9F",x"9F",x"81",x"FF", -- 0x0428 - x"81",x"BF",x"BF",x"87",x"9F",x"9F",x"9F",x"FF", -- 0x0430 - x"81",x"BD",x"BF",x"91",x"9D",x"9D",x"81",x"FF", -- 0x0438 - x"BD",x"BD",x"BD",x"81",x"9D",x"9D",x"9D",x"FF", -- 0x0440 - x"EF",x"EF",x"EF",x"E7",x"E7",x"E7",x"E7",x"FF", -- 0x0448 - x"FD",x"FD",x"FD",x"F9",x"F9",x"B9",x"C3",x"FF", -- 0x0450 - x"BD",x"BB",x"B7",x"81",x"9D",x"9D",x"9D",x"FF", -- 0x0458 - x"BF",x"BF",x"BF",x"9F",x"9F",x"9F",x"81",x"FF", -- 0x0460 - x"99",x"A5",x"BD",x"9D",x"9D",x"9D",x"9D",x"FF", -- 0x0468 - x"8D",x"B5",x"B5",x"95",x"95",x"95",x"99",x"FF", -- 0x0470 - x"81",x"BD",x"BD",x"9D",x"9D",x"9D",x"81",x"FF", -- 0x0478 - x"81",x"BD",x"BD",x"81",x"9F",x"9F",x"9F",x"FF", -- 0x0480 - x"81",x"BD",x"BD",x"9D",x"95",x"9B",x"85",x"FF", -- 0x0488 - x"81",x"BD",x"BD",x"81",x"9B",x"9D",x"9D",x"FF", -- 0x0490 - x"81",x"BD",x"BF",x"81",x"F9",x"B9",x"81",x"FF", -- 0x0498 - x"83",x"EF",x"EF",x"E7",x"E7",x"E7",x"E7",x"FF", -- 0x04A0 - x"BD",x"BD",x"BD",x"9D",x"9D",x"9D",x"81",x"FF", -- 0x04A8 - x"BD",x"BD",x"BD",x"DB",x"DB",x"E7",x"E7",x"FF", -- 0x04B0 - x"9D",x"9D",x"9D",x"9D",x"BD",x"A5",x"99",x"FF", -- 0x04B8 - x"BD",x"DB",x"E7",x"83",x"9D",x"9D",x"9D",x"FF", -- 0x04C0 - x"BD",x"BD",x"BD",x"C3",x"E7",x"E7",x"E7",x"FF", -- 0x04C8 - x"81",x"FD",x"E3",x"9F",x"9F",x"9F",x"81",x"FF", -- 0x04D0 - x"C3",x"DF",x"DF",x"CF",x"CF",x"CF",x"C3",x"FF", -- 0x04D8 - x"E7",x"DF",x"DF",x"87",x"9F",x"9F",x"83",x"FF", -- 0x04E0 - x"C3",x"FB",x"FB",x"F3",x"F3",x"F3",x"C3",x"FF", -- 0x04E8 - x"F7",x"E3",x"D5",x"F7",x"F7",x"F7",x"F7",x"FF", -- 0x04F0 - x"FF",x"DF",x"BF",x"01",x"BF",x"DF",x"FF",x"FF", -- 0x04F8 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0500 - x"E7",x"E7",x"E3",x"E3",x"E3",x"FF",x"E3",x"FF", -- 0x0508 - x"C9",x"C9",x"ED",x"ED",x"FF",x"FF",x"FF",x"FF", -- 0x0510 - x"DB",x"DB",x"81",x"CB",x"81",x"CB",x"CB",x"FF", -- 0x0518 - x"F7",x"C1",x"D7",x"C1",x"E5",x"C1",x"E7",x"FF", -- 0x0520 - x"8F",x"AD",x"8B",x"F7",x"E1",x"D5",x"B1",x"FF", -- 0x0528 - x"87",x"B7",x"CF",x"8F",x"95",x"9B",x"85",x"FF", -- 0x0530 - x"C7",x"C7",x"F7",x"F7",x"FF",x"FF",x"FF",x"FF", -- 0x0538 - x"F3",x"EF",x"DF",x"CF",x"CF",x"EF",x"F3",x"FF", -- 0x0540 - x"CF",x"F7",x"FB",x"F3",x"F3",x"F7",x"CF",x"FF", -- 0x0548 - x"F7",x"D5",x"E3",x"C1",x"E3",x"D5",x"F7",x"FF", -- 0x0550 - x"FF",x"F7",x"F7",x"C1",x"C1",x"F3",x"F3",x"FF", -- 0x0558 - x"FF",x"FF",x"FF",x"FF",x"E3",x"E3",x"FB",x"FB", -- 0x0560 - x"FF",x"FF",x"FF",x"81",x"81",x"FF",x"FF",x"FF", -- 0x0568 - x"FF",x"FF",x"FF",x"FF",x"FF",x"E7",x"E7",x"FF", -- 0x0570 - x"FF",x"FD",x"FB",x"F7",x"EF",x"DF",x"BF",x"FF", -- 0x0578 - x"81",x"BD",x"B9",x"95",x"8D",x"9D",x"81",x"FF", -- 0x0580 - x"C7",x"F7",x"F7",x"E7",x"E7",x"E7",x"C3",x"FF", -- 0x0588 - x"81",x"BD",x"FD",x"81",x"9F",x"9F",x"81",x"FF", -- 0x0590 - x"C1",x"FD",x"FD",x"E1",x"F9",x"F9",x"81",x"FF", -- 0x0598 - x"BF",x"BF",x"BB",x"BB",x"81",x"F3",x"F3",x"FF", -- 0x05A0 - x"C1",x"DF",x"DF",x"C1",x"F9",x"B9",x"81",x"FF", -- 0x05A8 - x"81",x"BF",x"BF",x"81",x"9D",x"9D",x"81",x"FF", -- 0x05B0 - x"81",x"BD",x"FB",x"F7",x"E7",x"E7",x"E7",x"FF", -- 0x05B8 - x"C3",x"DB",x"DB",x"81",x"9D",x"9D",x"81",x"FF", -- 0x05C0 - x"81",x"BD",x"BD",x"81",x"F9",x"F9",x"81",x"FF", -- 0x05C8 - x"FF",x"FF",x"E7",x"FF",x"E7",x"E7",x"FF",x"FF", -- 0x05D0 - x"FF",x"FF",x"E3",x"FF",x"E3",x"E3",x"FB",x"FB", -- 0x05D8 - x"F1",x"E7",x"CF",x"9F",x"CF",x"E7",x"F1",x"FF", -- 0x05E0 - x"FF",x"FF",x"81",x"FF",x"81",x"81",x"FF",x"FF", -- 0x05E8 - x"8F",x"E7",x"F3",x"F9",x"F3",x"E7",x"8F",x"FF", -- 0x05F0 - x"81",x"BD",x"FD",x"C1",x"CF",x"FF",x"CF",x"FF", -- 0x05F8 - x"FF",x"FF",x"FF",x"FF",x"00",x"FF",x"FF",x"FF", -- 0x0600 - x"E7",x"C3",x"81",x"81",x"E7",x"E7",x"81",x"FF", -- 0x0608 - x"EF",x"EF",x"EF",x"EF",x"EF",x"EF",x"EF",x"EF", -- 0x0610 - x"FF",x"FF",x"FF",x"00",x"FF",x"FF",x"FF",x"FF", -- 0x0618 - x"FF",x"FF",x"00",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0620 - x"FF",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0628 - x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"FF",x"FF", -- 0x0630 - x"DF",x"DF",x"DF",x"DF",x"DF",x"DF",x"DF",x"DF", -- 0x0638 - x"FB",x"FB",x"FB",x"FB",x"FB",x"FB",x"FB",x"FB", -- 0x0640 - x"FF",x"FF",x"FF",x"3F",x"CF",x"EF",x"F7",x"F7", -- 0x0648 - x"EF",x"EF",x"F7",x"F3",x"FC",x"FF",x"FF",x"FF", -- 0x0650 - x"F7",x"F7",x"EF",x"CF",x"3F",x"FF",x"FF",x"FF", -- 0x0658 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"00", -- 0x0660 - x"7F",x"BF",x"DF",x"EF",x"F7",x"FB",x"FD",x"FE", -- 0x0668 - x"FE",x"FD",x"FB",x"F7",x"EF",x"DF",x"BF",x"7F", -- 0x0670 - x"00",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0678 - x"00",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE", -- 0x0680 - x"C3",x"81",x"81",x"81",x"81",x"81",x"C3",x"FF", -- 0x0688 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"FF", -- 0x0690 - x"DB",x"81",x"81",x"81",x"C3",x"E7",x"E7",x"FF", -- 0x0698 - x"BF",x"BF",x"BF",x"BF",x"BF",x"BF",x"BF",x"BF", -- 0x06A0 - x"FF",x"FF",x"FF",x"FC",x"F3",x"F7",x"EF",x"EF", -- 0x06A8 - x"7E",x"BD",x"DB",x"E7",x"E7",x"DB",x"BD",x"7E", -- 0x06B0 - x"C3",x"81",x"99",x"BD",x"99",x"81",x"C3",x"FF", -- 0x06B8 - x"E7",x"E7",x"81",x"81",x"E7",x"E7",x"81",x"FF", -- 0x06C0 - x"FD",x"FD",x"FD",x"FD",x"FD",x"FD",x"FD",x"FD", -- 0x06C8 - x"FF",x"E7",x"C3",x"81",x"81",x"C3",x"E7",x"FF", -- 0x06D0 - x"F7",x"F7",x"F7",x"00",x"F7",x"F7",x"F7",x"F7", -- 0x06D8 - x"3F",x"CF",x"3F",x"CF",x"3F",x"CF",x"3F",x"CF", -- 0x06E0 - x"F7",x"F7",x"F7",x"F7",x"F7",x"F7",x"F7",x"F7", -- 0x06E8 - x"FF",x"FF",x"83",x"DB",x"9B",x"9B",x"99",x"FF", -- 0x06F0 - x"00",x"80",x"C0",x"E0",x"F0",x"F8",x"FC",x"FE", -- 0x06F8 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0700 - x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F", -- 0x0708 - x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"00",x"00", -- 0x0710 - x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0718 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00", -- 0x0720 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0728 - x"33",x"CC",x"33",x"CC",x"33",x"CC",x"33",x"CC", -- 0x0730 - x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE", -- 0x0738 - x"FF",x"FF",x"FF",x"FF",x"33",x"CC",x"33",x"CC", -- 0x0740 - x"00",x"01",x"03",x"07",x"0F",x"1F",x"3F",x"7F", -- 0x0748 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0750 - x"F7",x"F7",x"F7",x"F0",x"F7",x"F7",x"F7",x"F7", -- 0x0758 - x"FF",x"FF",x"FF",x"FF",x"F0",x"F0",x"F0",x"F0", -- 0x0760 - x"F7",x"F7",x"F7",x"F0",x"FF",x"FF",x"FF",x"FF", -- 0x0768 - x"FF",x"FF",x"FF",x"07",x"F7",x"F7",x"F7",x"F7", -- 0x0770 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00", -- 0x0778 - x"FF",x"FF",x"FF",x"F0",x"F7",x"F7",x"F7",x"F7", -- 0x0780 - x"F7",x"F7",x"F7",x"00",x"FF",x"FF",x"FF",x"FF", -- 0x0788 - x"FF",x"FF",x"FF",x"00",x"F7",x"F7",x"F7",x"F7", -- 0x0790 - x"F7",x"F7",x"F7",x"07",x"F7",x"F7",x"F7",x"F7", -- 0x0798 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x07A0 - x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F", -- 0x07A8 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x07B0 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x07B8 - x"00",x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x07C0 - x"FF",x"FF",x"FF",x"FF",x"FF",x"00",x"00",x"00", -- 0x07C8 - x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"00", -- 0x07D0 - x"FF",x"FF",x"FF",x"FF",x"0F",x"0F",x"0F",x"0F", -- 0x07D8 - x"F0",x"F0",x"F0",x"F0",x"FF",x"FF",x"FF",x"FF", -- 0x07E0 - x"F7",x"F7",x"F7",x"07",x"FF",x"FF",x"FF",x"FF", -- 0x07E8 - x"0F",x"0F",x"0F",x"0F",x"FF",x"FF",x"FF",x"FF", -- 0x07F0 - x"0F",x"0F",x"0F",x"0F",x"F0",x"F0",x"F0",x"00", -- 0x07F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0800 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0808 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0810 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0818 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0820 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0828 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0830 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0838 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0840 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0848 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0850 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0858 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0860 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0868 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0870 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0878 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0880 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0888 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0890 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0898 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0900 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0908 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0910 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0918 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0920 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0928 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0930 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0938 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0940 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0948 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0950 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0958 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0960 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0968 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0970 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0978 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0980 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0988 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0990 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0998 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00" -- 0x0FF8 - ); - -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; -end RTL; diff --git a/lib/VGA_ctrl/src/fonts/char_rom_datasoft.vhd b/lib/VGA_ctrl/src/fonts/char_rom_datasoft.vhd deleted file mode 100644 index 95a9bd1..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_datasoft.vhd +++ /dev/null @@ -1,539 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := ( - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0000 - x"08",x"14",x"14",x"22",x"3E",x"41",x"41",x"80", -- 0x0008 - x"FC",x"42",x"42",x"7C",x"42",x"42",x"42",x"FC", -- 0x0010 - x"3C",x"46",x"40",x"40",x"40",x"40",x"46",x"3C", -- 0x0018 - x"FC",x"42",x"42",x"42",x"42",x"42",x"42",x"FC", -- 0x0020 - x"FC",x"46",x"50",x"70",x"50",x"40",x"46",x"FC", -- 0x0028 - x"FC",x"46",x"50",x"70",x"50",x"40",x"40",x"E0", -- 0x0030 - x"3C",x"46",x"40",x"4E",x"44",x"44",x"44",x"3C", -- 0x0038 - x"EE",x"44",x"44",x"7C",x"44",x"44",x"44",x"EE", -- 0x0040 - x"1C",x"08",x"08",x"08",x"08",x"08",x"08",x"1C", -- 0x0048 - x"1C",x"08",x"08",x"08",x"08",x"08",x"C8",x"70", -- 0x0050 - x"E6",x"48",x"50",x"60",x"50",x"48",x"44",x"EE", -- 0x0058 - x"E0",x"40",x"40",x"40",x"40",x"40",x"46",x"FC", -- 0x0060 - x"C6",x"6C",x"6C",x"54",x"54",x"44",x"44",x"EE", -- 0x0068 - x"CE",x"64",x"64",x"54",x"54",x"4C",x"4C",x"E6", -- 0x0070 - x"3C",x"42",x"42",x"42",x"42",x"42",x"42",x"3C", -- 0x0078 - x"FC",x"42",x"42",x"7C",x"40",x"40",x"40",x"E0", -- 0x0080 - x"3C",x"42",x"42",x"42",x"42",x"4A",x"46",x"3D", -- 0x0088 - x"FC",x"42",x"42",x"7C",x"50",x"48",x"44",x"EE", -- 0x0090 - x"3C",x"42",x"40",x"20",x"1C",x"02",x"C2",x"7C", -- 0x0098 - x"FE",x"92",x"10",x"10",x"10",x"10",x"10",x"38", -- 0x00A0 - x"E7",x"42",x"42",x"42",x"42",x"42",x"42",x"3C", -- 0x00A8 - x"E7",x"42",x"42",x"42",x"42",x"42",x"24",x"18", -- 0x00B0 - x"C3",x"41",x"5D",x"49",x"49",x"55",x"63",x"41", -- 0x00B8 - x"EE",x"44",x"28",x"10",x"10",x"28",x"44",x"EE", -- 0x00C0 - x"EE",x"44",x"44",x"28",x"10",x"10",x"10",x"38", -- 0x00C8 - x"FE",x"84",x"08",x"7C",x"24",x"40",x"82",x"FE", -- 0x00D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0100 - x"10",x"10",x"10",x"10",x"10",x"00",x"10",x"10", -- 0x0108 - x"CC",x"44",x"44",x"22",x"00",x"00",x"00",x"00", -- 0x0110 - x"77",x"22",x"FF",x"22",x"22",x"FF",x"22",x"77", -- 0x0118 - x"10",x"3E",x"50",x"3C",x"12",x"12",x"7C",x"10", -- 0x0120 - x"87",x"42",x"04",x"08",x"10",x"20",x"44",x"E2", -- 0x0128 - x"3C",x"66",x"3C",x"38",x"67",x"66",x"3F",x"00", -- 0x0130 - x"1E",x"08",x"3C",x"00",x"00",x"00",x"00",x"00", -- 0x0138 - x"0E",x"12",x"60",x"40",x"40",x"60",x"12",x"0E", -- 0x0140 - x"70",x"48",x"06",x"02",x"02",x"06",x"48",x"70", -- 0x0148 - x"42",x"24",x"99",x"7E",x"99",x"24",x"42",x"00", -- 0x0150 - x"08",x"08",x"08",x"7F",x"08",x"08",x"08",x"00", -- 0x0158 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"30", -- 0x0160 - x"00",x"00",x"00",x"7E",x"00",x"00",x"00",x"00", -- 0x0168 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"00", -- 0x0170 - x"00",x"03",x"06",x"0C",x"18",x"30",x"60",x"00", -- 0x0178 - x"7C",x"82",x"82",x"82",x"82",x"82",x"82",x"7C", -- 0x0180 - x"10",x"30",x"50",x"10",x"10",x"10",x"10",x"7C", -- 0x0188 - x"7C",x"C2",x"02",x"1C",x"60",x"80",x"86",x"FC", -- 0x0190 - x"7C",x"C2",x"02",x"1C",x"02",x"02",x"C2",x"7C", -- 0x0198 - x"08",x"18",x"28",x"48",x"FE",x"08",x"08",x"3E", -- 0x01A0 - x"FE",x"80",x"80",x"FC",x"02",x"02",x"C2",x"7C", -- 0x01A8 - x"7C",x"86",x"80",x"FC",x"82",x"82",x"82",x"7C", -- 0x01B0 - x"7E",x"C2",x"04",x"08",x"10",x"10",x"10",x"7C", -- 0x01B8 - x"7C",x"82",x"82",x"7C",x"82",x"82",x"82",x"7C", -- 0x01C0 - x"7C",x"82",x"82",x"7E",x"02",x"02",x"C2",x"7C", -- 0x01C8 - x"00",x"00",x"18",x"00",x"00",x"18",x"00",x"00", -- 0x01D0 - x"00",x"00",x"18",x"00",x"00",x"18",x"18",x"30", -- 0x01D8 - x"0E",x"18",x"30",x"60",x"30",x"18",x"0E",x"00", -- 0x01E0 - x"00",x"00",x"7E",x"00",x"7E",x"00",x"00",x"00", -- 0x01E8 - x"70",x"18",x"0C",x"06",x"0C",x"18",x"70",x"00", -- 0x01F0 - x"3C",x"62",x"02",x"04",x"08",x"08",x"00",x"08", -- 0x01F8 - x"3C",x"66",x"6E",x"6E",x"60",x"62",x"3C",x"00", -- 0x0200 - x"FE",x"FE",x"C6",x"FE",x"C6",x"C6",x"C6",x"C6", -- 0x0208 - x"FE",x"FE",x"C6",x"FC",x"C6",x"C6",x"FE",x"FE", -- 0x0210 - x"FE",x"FE",x"C0",x"C0",x"C0",x"C0",x"FE",x"FE", -- 0x0218 - x"FE",x"FE",x"C6",x"C6",x"C6",x"C6",x"FE",x"FE", -- 0x0220 - x"FE",x"FE",x"C0",x"FE",x"C0",x"C0",x"FE",x"FE", -- 0x0228 - x"FE",x"FE",x"C0",x"FE",x"C0",x"C0",x"C0",x"C0", -- 0x0230 - x"FE",x"FE",x"C0",x"DE",x"C6",x"C6",x"FE",x"FE", -- 0x0238 - x"C6",x"C6",x"C6",x"FE",x"C6",x"C6",x"C6",x"C6", -- 0x0240 - x"18",x"18",x"18",x"18",x"18",x"18",x"18",x"18", -- 0x0248 - x"18",x"18",x"18",x"18",x"18",x"18",x"78",x"78", -- 0x0250 - x"C6",x"C6",x"DC",x"F0",x"D8",x"CC",x"C6",x"C6", -- 0x0258 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"FE",x"FE", -- 0x0260 - x"FE",x"FE",x"D6",x"D6",x"D6",x"D6",x"D6",x"D6", -- 0x0268 - x"E6",x"E6",x"F6",x"D6",x"D6",x"DE",x"CE",x"CE", -- 0x0270 - x"FE",x"FE",x"C6",x"C6",x"C6",x"C6",x"FE",x"FE", -- 0x0278 - x"FE",x"FE",x"C6",x"FE",x"C0",x"C0",x"C0",x"C0", -- 0x0280 - x"FE",x"FE",x"C6",x"C6",x"C6",x"CE",x"FE",x"FF", -- 0x0288 - x"FE",x"FE",x"C6",x"FE",x"D8",x"D8",x"C6",x"C6", -- 0x0290 - x"FE",x"FE",x"C0",x"FE",x"06",x"06",x"FE",x"FE", -- 0x0298 - x"FE",x"FE",x"18",x"18",x"18",x"18",x"18",x"18", -- 0x02A0 - x"C6",x"C6",x"C6",x"C6",x"C6",x"C6",x"FE",x"FE", -- 0x02A8 - x"C6",x"C6",x"C6",x"C6",x"C6",x"C6",x"FE",x"7C", -- 0x02B0 - x"D6",x"D6",x"D6",x"D6",x"D6",x"D6",x"FE",x"FE", -- 0x02B8 - x"C6",x"C6",x"6C",x"38",x"38",x"6C",x"C6",x"C6", -- 0x02C0 - x"C6",x"C6",x"C6",x"FE",x"06",x"06",x"FE",x"FE", -- 0x02C8 - x"FE",x"FE",x"0E",x"18",x"30",x"E0",x"FE",x"FE", -- 0x02D0 - x"3C",x"30",x"30",x"30",x"30",x"30",x"3C",x"00", -- 0x02D8 - x"0C",x"12",x"30",x"7C",x"30",x"62",x"FC",x"00", -- 0x02E0 - x"3C",x"0C",x"0C",x"0C",x"0C",x"0C",x"3C",x"00", -- 0x02E8 - x"00",x"18",x"3C",x"7E",x"18",x"18",x"18",x"18", -- 0x02F0 - x"00",x"10",x"30",x"7F",x"7F",x"30",x"10",x"00", -- 0x02F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0300 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0308 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0310 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0318 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0320 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0328 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0330 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0338 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0340 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0348 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0350 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0358 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0360 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0368 - x"00",x"00",x"00",x"07",x"1F",x"3F",x"3F",x"7F", -- 0x0370 - x"00",x"00",x"00",x"E0",x"E0",x"E0",x"E0",x"E0", -- 0x0378 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0380 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0388 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0390 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0398 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0400 - x"03",x"1F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0408 - x"FC",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"0F", -- 0x0410 - x"00",x"80",x"E0",x"F8",x"F8",x"FE",x"FE",x"FE", -- 0x0418 - x"00",x"00",x"00",x"00",x"00",x"00",x"07",x"07", -- 0x0420 - x"00",x"00",x"00",x"00",x"00",x"00",x"F8",x"FE", -- 0x0428 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x0430 - x"00",x"00",x"00",x"00",x"00",x"00",x"F0",x"F0", -- 0x0438 - x"00",x"00",x"00",x"00",x"00",x"00",x"7F",x"7F", -- 0x0440 - x"00",x"00",x"00",x"00",x"00",x"00",x"80",x"E0", -- 0x0448 - x"00",x"00",x"00",x"00",x"00",x"00",x"0F",x"3F", -- 0x0450 - x"00",x"00",x"00",x"00",x"00",x"00",x"C0",x"C0", -- 0x0458 - x"00",x"00",x"00",x"00",x"00",x"00",x"1F",x"7F", -- 0x0460 - x"00",x"00",x"00",x"00",x"00",x"00",x"E0",x"F8", -- 0x0468 - x"7E",x"7E",x"7E",x"7E",x"7E",x"7E",x"7F",x"7F", -- 0x0470 - x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"FF",x"FF", -- 0x0478 - x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"FC",x"FC", -- 0x0480 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x0488 - x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F1", -- 0x0490 - x"00",x"00",x"00",x"00",x"00",x"00",x"7F",x"FF", -- 0x0498 - x"00",x"00",x"00",x"00",x"00",x"00",x"80",x"E0", -- 0x04A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"0F",x"3F", -- 0x04A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"F0",x"F0", -- 0x04B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0500 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0508 - x"03",x"01",x"01",x"01",x"01",x"01",x"01",x"01", -- 0x0510 - x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE", -- 0x0518 - x"07",x"07",x"07",x"00",x"00",x"07",x"0F",x"3F", -- 0x0520 - x"FE",x"FF",x"FF",x"7F",x"3F",x"FF",x"FF",x"FF", -- 0x0528 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F", -- 0x0530 - x"F0",x"F0",x"F0",x"00",x"00",x"00",x"00",x"03", -- 0x0538 - x"7F",x"7F",x"7F",x"07",x"03",x"7F",x"FF",x"FF", -- 0x0540 - x"E0",x"F0",x"F1",x"F1",x"F3",x"F3",x"F3",x"F1", -- 0x0548 - x"7F",x"FF",x"FF",x"FC",x"F0",x"F0",x"F0",x"F8", -- 0x0550 - x"C0",x"C1",x"C1",x"03",x"03",x"03",x"03",x"03", -- 0x0558 - x"FF",x"FF",x"FF",x"FF",x"F8",x"F0",x"F0",x"F0", -- 0x0560 - x"FC",x"FE",x"FE",x"FF",x"7F",x"3F",x"3F",x"3F", -- 0x0568 - x"7F",x"7F",x"7F",x"7E",x"7E",x"7E",x"7E",x"7E", -- 0x0570 - x"FF",x"FF",x"FF",x"0F",x"0F",x"0F",x"0F",x"0F", -- 0x0578 - x"FC",x"FC",x"FC",x"C0",x"C0",x"C0",x"C0",x"C0", -- 0x0580 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x0588 - x"F3",x"F3",x"F3",x"F3",x"F3",x"F3",x"F3",x"F3", -- 0x0590 - x"FF",x"FF",x"FF",x"F3",x"F1",x"F1",x"F1",x"F1", -- 0x0598 - x"F0",x"F0",x"F8",x"F9",x"F9",x"F9",x"F9",x"F9", -- 0x05A0 - x"7F",x"FF",x"FF",x"FC",x"F8",x"F8",x"F8",x"F8", -- 0x05A8 - x"F0",x"F0",x"F0",x"00",x"00",x"00",x"00",x"00", -- 0x05B0 - x"3C",x"42",x"B9",x"A5",x"B9",x"A9",x"A5",x"42", -- 0x05B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0600 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0608 - x"01",x"01",x"03",x"0F",x"7F",x"7F",x"7F",x"7F", -- 0x0610 - x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FC",x"FC", -- 0x0618 - x"3F",x"7F",x"7E",x"7C",x"7E",x"7F",x"3F",x"3F", -- 0x0620 - x"FF",x"FF",x"3F",x"3F",x"3F",x"BF",x"BF",x"BF", -- 0x0628 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"1F", -- 0x0630 - x"03",x"07",x"07",x"07",x"07",x"F7",x"F3",x"F3", -- 0x0638 - x"FF",x"FF",x"E3",x"C3",x"E3",x"FB",x"FB",x"FB", -- 0x0640 - x"F1",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0",x"F0", -- 0x0648 - x"FC",x"FE",x"7F",x"3F",x"1F",x"0F",x"07",x"03", -- 0x0650 - x"03",x"03",x"83",x"C3",x"E3",x"F1",x"F1",x"F0", -- 0x0658 - x"F0",x"F0",x"F0",x"F0",x"F8",x"FF",x"FF",x"FF", -- 0x0660 - x"3F",x"3F",x"3F",x"3F",x"7F",x"FE",x"FE",x"FC", -- 0x0668 - x"7E",x"7E",x"7E",x"7E",x"7E",x"7E",x"7E",x"7E", -- 0x0670 - x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"0F",x"07", -- 0x0678 - x"C0",x"C0",x"C0",x"C0",x"C0",x"FC",x"FC",x"FC", -- 0x0680 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x0688 - x"F3",x"F3",x"F3",x"F3",x"F3",x"F3",x"F3",x"F3", -- 0x0690 - x"F1",x"F1",x"F1",x"F1",x"F1",x"F1",x"F1",x"F1", -- 0x0698 - x"F9",x"F9",x"F9",x"F9",x"F9",x"F8",x"F8",x"F8", -- 0x06A0 - x"F8",x"F8",x"F8",x"F8",x"FC",x"FF",x"FF",x"7F", -- 0x06A8 - x"00",x"00",x"00",x"00",x"00",x"FC",x"FC",x"FC", -- 0x06B0 - x"3C",x"00",x"00",x"00",x"78",x"FC",x"FC",x"FC", -- 0x06B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0700 - x"7F",x"7F",x"7F",x"00",x"00",x"00",x"00",x"00", -- 0x0708 - x"7F",x"7F",x"7F",x"00",x"00",x"00",x"00",x"00", -- 0x0710 - x"F0",x"E0",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0718 - x"0F",x"07",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0720 - x"BF",x"BF",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0728 - x"1F",x"07",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0730 - x"F0",x"F0",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0738 - x"FB",x"7B",x"03",x"01",x"00",x"00",x"00",x"00", -- 0x0740 - x"F0",x"F8",x"FE",x"FF",x"FF",x"FF",x"3F",x"07", -- 0x0748 - x"03",x"07",x"1F",x"FF",x"FF",x"FF",x"FE",x"F0", -- 0x0750 - x"F0",x"F0",x"E0",x"E0",x"C0",x"80",x"00",x"00", -- 0x0758 - x"7F",x"1F",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0760 - x"F8",x"E0",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0768 - x"7E",x"7E",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0770 - x"07",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0778 - x"FC",x"FC",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0780 - x"07",x"07",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0788 - x"F3",x"F3",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0790 - x"F1",x"F1",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0798 - x"F8",x"F8",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07A0 - x"3F",x"0F",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07A8 - x"FC",x"FC",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07B0 - x"FC",x"78",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0800 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0808 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0810 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0818 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0820 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0828 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0830 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0838 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0840 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0848 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0850 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0858 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0860 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0868 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0870 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0878 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0880 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0888 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0890 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0898 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0900 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0908 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0910 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0918 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0920 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0928 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0930 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0938 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0940 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0948 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0950 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0958 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0960 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0968 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0970 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0978 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0980 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0988 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0990 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0998 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00" -- 0x0FF8 - ); - -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; -end RTL; diff --git a/lib/VGA_ctrl/src/fonts/char_rom_demo_maker_m.vhd b/lib/VGA_ctrl/src/fonts/char_rom_demo_maker_m.vhd deleted file mode 100644 index ce977b6..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_demo_maker_m.vhd +++ /dev/null @@ -1,539 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := ( - x"3C",x"66",x"6E",x"6A",x"6E",x"60",x"3C",x"00", -- 0x0000 - x"00",x"00",x"3C",x"06",x"3E",x"66",x"3E",x"00", -- 0x0008 - x"60",x"60",x"7C",x"66",x"66",x"66",x"7C",x"00", -- 0x0010 - x"00",x"00",x"3C",x"66",x"60",x"66",x"3C",x"00", -- 0x0018 - x"06",x"06",x"3E",x"66",x"66",x"66",x"3E",x"00", -- 0x0020 - x"00",x"00",x"3C",x"66",x"7E",x"60",x"3C",x"00", -- 0x0028 - x"1C",x"30",x"30",x"7C",x"30",x"30",x"30",x"00", -- 0x0030 - x"00",x"00",x"3E",x"66",x"66",x"3E",x"06",x"3C", -- 0x0038 - x"60",x"60",x"7C",x"66",x"66",x"66",x"66",x"00", -- 0x0040 - x"18",x"00",x"38",x"18",x"18",x"18",x"3C",x"00", -- 0x0048 - x"18",x"00",x"38",x"18",x"18",x"18",x"18",x"70", -- 0x0050 - x"60",x"60",x"66",x"6C",x"78",x"6C",x"66",x"00", -- 0x0058 - x"38",x"18",x"18",x"18",x"18",x"18",x"3C",x"00", -- 0x0060 - x"00",x"00",x"36",x"7F",x"6B",x"6B",x"63",x"00", -- 0x0068 - x"00",x"00",x"7C",x"66",x"66",x"66",x"66",x"00", -- 0x0070 - x"00",x"00",x"3C",x"66",x"66",x"66",x"3C",x"00", -- 0x0078 - x"00",x"00",x"7C",x"66",x"66",x"7C",x"60",x"60", -- 0x0080 - x"00",x"00",x"3E",x"66",x"66",x"3E",x"06",x"07", -- 0x0088 - x"00",x"00",x"6C",x"76",x"60",x"60",x"60",x"00", -- 0x0090 - x"00",x"00",x"3E",x"60",x"3C",x"06",x"7C",x"00", -- 0x0098 - x"30",x"30",x"7C",x"30",x"30",x"30",x"1C",x"00", -- 0x00A0 - x"00",x"00",x"66",x"66",x"66",x"66",x"3E",x"00", -- 0x00A8 - x"00",x"00",x"66",x"66",x"66",x"3C",x"18",x"00", -- 0x00B0 - x"00",x"00",x"63",x"6B",x"6B",x"7F",x"36",x"00", -- 0x00B8 - x"00",x"00",x"66",x"3C",x"18",x"3C",x"66",x"00", -- 0x00C0 - x"00",x"00",x"66",x"66",x"66",x"3E",x"06",x"3C", -- 0x00C8 - x"00",x"00",x"7E",x"0C",x"18",x"30",x"7E",x"00", -- 0x00D0 - x"7C",x"60",x"60",x"60",x"60",x"60",x"7C",x"00", -- 0x00D8 - x"1C",x"36",x"30",x"7C",x"30",x"30",x"7E",x"00", -- 0x00E0 - x"3E",x"06",x"06",x"06",x"06",x"06",x"3E",x"00", -- 0x00E8 - x"00",x"18",x"3C",x"7E",x"18",x"18",x"18",x"18", -- 0x00F0 - x"00",x"10",x"30",x"7F",x"7F",x"30",x"10",x"00", -- 0x00F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0100 - x"18",x"18",x"18",x"18",x"18",x"00",x"18",x"00", -- 0x0108 - x"6C",x"6C",x"6C",x"00",x"00",x"00",x"00",x"00", -- 0x0110 - x"36",x"36",x"7F",x"36",x"7F",x"36",x"36",x"00", -- 0x0118 - x"0C",x"3F",x"68",x"3E",x"0B",x"7E",x"18",x"00", -- 0x0120 - x"60",x"66",x"0C",x"18",x"30",x"66",x"06",x"00", -- 0x0128 - x"38",x"6C",x"6C",x"38",x"6D",x"66",x"3B",x"00", -- 0x0130 - x"0C",x"18",x"30",x"00",x"00",x"00",x"00",x"00", -- 0x0138 - x"0C",x"18",x"30",x"30",x"30",x"18",x"0C",x"00", -- 0x0140 - x"30",x"18",x"0C",x"0C",x"0C",x"18",x"30",x"00", -- 0x0148 - x"00",x"18",x"7E",x"3C",x"7E",x"18",x"00",x"00", -- 0x0150 - x"00",x"18",x"18",x"7E",x"18",x"18",x"00",x"00", -- 0x0158 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"30", -- 0x0160 - x"00",x"00",x"00",x"7E",x"00",x"00",x"00",x"00", -- 0x0168 - x"00",x"00",x"00",x"00",x"00",x"18",x"18",x"00", -- 0x0170 - x"00",x"06",x"0C",x"18",x"30",x"60",x"00",x"00", -- 0x0178 - x"3C",x"66",x"6E",x"7E",x"76",x"66",x"3C",x"00", -- 0x0180 - x"18",x"38",x"18",x"18",x"18",x"18",x"7E",x"00", -- 0x0188 - x"3C",x"66",x"06",x"0C",x"18",x"30",x"7E",x"00", -- 0x0190 - x"3C",x"66",x"06",x"1C",x"06",x"66",x"3C",x"00", -- 0x0198 - x"0C",x"1C",x"3C",x"6C",x"7E",x"0C",x"0C",x"00", -- 0x01A0 - x"7E",x"60",x"7C",x"06",x"06",x"66",x"3C",x"00", -- 0x01A8 - x"1C",x"30",x"60",x"7C",x"66",x"66",x"3C",x"00", -- 0x01B0 - x"7E",x"06",x"0C",x"18",x"30",x"30",x"30",x"00", -- 0x01B8 - x"3C",x"66",x"66",x"3C",x"66",x"66",x"3C",x"00", -- 0x01C0 - x"3C",x"66",x"66",x"3E",x"06",x"0C",x"38",x"00", -- 0x01C8 - x"00",x"00",x"18",x"18",x"00",x"18",x"18",x"00", -- 0x01D0 - x"00",x"00",x"18",x"18",x"00",x"18",x"18",x"30", -- 0x01D8 - x"0C",x"18",x"30",x"60",x"30",x"18",x"0C",x"00", -- 0x01E0 - x"00",x"00",x"7E",x"00",x"7E",x"00",x"00",x"00", -- 0x01E8 - x"30",x"18",x"0C",x"06",x"0C",x"18",x"30",x"00", -- 0x01F0 - x"3C",x"66",x"0C",x"18",x"18",x"00",x"18",x"00", -- 0x01F8 - x"00",x"00",x"00",x"FF",x"FF",x"00",x"00",x"00", -- 0x0200 - x"3C",x"66",x"66",x"7E",x"66",x"66",x"66",x"00", -- 0x0208 - x"7C",x"66",x"66",x"7C",x"66",x"66",x"7C",x"00", -- 0x0210 - x"3C",x"66",x"60",x"60",x"60",x"66",x"3C",x"00", -- 0x0218 - x"78",x"6C",x"66",x"66",x"66",x"6C",x"78",x"00", -- 0x0220 - x"7E",x"60",x"60",x"7C",x"60",x"60",x"7E",x"00", -- 0x0228 - x"7E",x"60",x"60",x"7C",x"60",x"60",x"60",x"00", -- 0x0230 - x"3C",x"66",x"60",x"6E",x"66",x"66",x"3C",x"00", -- 0x0238 - x"66",x"66",x"66",x"7E",x"66",x"66",x"66",x"00", -- 0x0240 - x"7E",x"18",x"18",x"18",x"18",x"18",x"7E",x"00", -- 0x0248 - x"3E",x"0C",x"0C",x"0C",x"0C",x"6C",x"38",x"00", -- 0x0250 - x"66",x"6C",x"78",x"70",x"78",x"6C",x"66",x"00", -- 0x0258 - x"60",x"60",x"60",x"60",x"60",x"60",x"7E",x"00", -- 0x0260 - x"63",x"77",x"7F",x"6B",x"6B",x"63",x"63",x"00", -- 0x0268 - x"66",x"66",x"76",x"7E",x"6E",x"66",x"66",x"00", -- 0x0270 - x"3C",x"66",x"66",x"66",x"66",x"66",x"3C",x"00", -- 0x0278 - x"7C",x"66",x"66",x"7C",x"60",x"60",x"60",x"00", -- 0x0280 - x"3C",x"66",x"66",x"66",x"6A",x"6C",x"36",x"00", -- 0x0288 - x"7C",x"66",x"66",x"7C",x"6C",x"66",x"66",x"00", -- 0x0290 - x"3C",x"66",x"60",x"3C",x"06",x"66",x"3C",x"00", -- 0x0298 - x"7E",x"18",x"18",x"18",x"18",x"18",x"18",x"00", -- 0x02A0 - x"66",x"66",x"66",x"66",x"66",x"66",x"3C",x"00", -- 0x02A8 - x"66",x"66",x"66",x"66",x"66",x"3C",x"18",x"00", -- 0x02B0 - x"63",x"63",x"6B",x"00",x"00",x"00",x"00",x"00", -- 0x02B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0300 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0308 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0310 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0318 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0320 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0328 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0330 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0338 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0340 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0348 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0350 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0358 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0360 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0368 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0370 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0378 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0380 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0388 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0390 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0398 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0400 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0408 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0410 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0418 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0420 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0428 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0430 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0438 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0440 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0448 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0450 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0458 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0460 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0468 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0470 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0478 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0480 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0488 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0490 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0498 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0500 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0508 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0510 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0518 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0520 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0528 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0530 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0538 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0540 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0548 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0550 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0558 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0560 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0568 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0570 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0578 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0580 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0588 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0590 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0598 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0600 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0608 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0610 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0618 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0620 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0628 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0630 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0638 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0640 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0648 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0650 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0658 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0660 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0668 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0670 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0678 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0680 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0688 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0690 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0698 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0700 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0708 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0710 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0718 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0720 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0728 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0730 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0738 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0740 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0748 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0750 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0758 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0760 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0768 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0770 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0778 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0780 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0788 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0790 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0798 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0800 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0808 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0810 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0818 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0820 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0828 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0830 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0838 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0840 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0848 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0850 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0858 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0860 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0868 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0870 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0878 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0880 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0888 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0890 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0898 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0900 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0908 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0910 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0918 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0920 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0928 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0930 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0938 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0940 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0948 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0950 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0958 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0960 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0968 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0970 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0978 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0980 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0988 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0990 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0998 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00" -- 0x0FF8 - ); - -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; -end RTL; diff --git a/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x15.vhd b/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x15.vhd deleted file mode 100644 index 3b60051..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x15.vhd +++ /dev/null @@ -1,4383 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port - ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := - ( - -- ASCII 032 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 033 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "00111100", -- | #### | 05 - "00111100", -- | #### | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00000000", -- | | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 034 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 035 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110110", -- | ## ## | 03 - "00110110", -- | ## ## | 04 - "01111111", -- | #######| 05 - "00110110", -- | ## ## | 06 - "00110110", -- | ## ## | 07 - "00110110", -- | ## ## | 08 - "01111111", -- | #######| 09 - "00110110", -- | ## ## | 10 - "00110110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 036 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00011000", -- | ## | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "00110000", -- | ## | 06 - "00011000", -- | ## | 07 - "00001100", -- | ## | 08 - "00000110", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00011000", -- | ## | 12 - "00011000", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 037 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01110000", -- | ### | 02 - "11011000", -- |## ## | 03 - "11011010", -- |## ## # | 04 - "01110110", -- | ### ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00110000", -- | ## | 08 - "01101110", -- | ## ### | 09 - "01011011", -- | # ## ##| 10 - "00011011", -- | ## ##| 11 - "00001110", -- | ### | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 038 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "11111111", -- |########| 13 - "00000000", -- | | 14 - -- ASCII 039 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 040 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00110000", -- | ## | 06 - "00110000", -- | ## | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 041 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00110000", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 042 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00110110", -- | ## ## | 05 - "00011100", -- | ### | 06 - "01111111", -- | #######| 07 - "00011100", -- | ### | 08 - "00110110", -- | ## ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 043 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "01111110", -- | ###### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 044 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 045 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 046 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 047 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00000110", -- | ## | 04 - "00001100", -- | ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "01100000", -- | ## | 11 - "01100000", -- | ## | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 048 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011110", -- | #### | 03 - "00110011", -- | ## ##| 04 - "00110111", -- | ## ###| 05 - "00110111", -- | ## ###| 06 - "00110011", -- | ## ##| 07 - "00111011", -- | ### ##| 08 - "00111011", -- | ### ##| 09 - "00110011", -- | ## ##| 10 - "00011110", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 049 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011100", -- | ### | 04 - "01111100", -- | ##### | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00001100", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 050 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00000110", -- | ## | 06 - "00001100", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 051 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00000110", -- | ## | 06 - "00011100", -- | ### | 07 - "00000110", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 052 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00110000", -- | ## | 04 - "00110110", -- | ## ## | 05 - "00110110", -- | ## ## | 06 - "00110110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01111111", -- | #######| 09 - "00000110", -- | ## | 10 - "00000110", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 053 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "00000110", -- | ## | 08 - "00000110", -- | ## | 09 - "00001100", -- | ## | 10 - "01111000", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 054 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011100", -- | ### | 03 - "00011000", -- | ## | 04 - "00110000", -- | ## | 05 - "01111100", -- | ##### | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 055 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "00000110", -- | ## | 04 - "00001100", -- | ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00110000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 056 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01110110", -- | ### ## | 06 - "00111100", -- | #### | 07 - "01101110", -- | ## ### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 057 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "00111110", -- | ##### | 08 - "00001100", -- | ## | 09 - "00011000", -- | ## | 10 - "00111000", -- | ### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 058 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011100", -- | ### | 05 - "00011100", -- | ### | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 059 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011100", -- | ### | 05 - "00011100", -- | ### | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 060 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00001100", -- | ## | 04 - "00011000", -- | ## | 05 - "00110000", -- | ## | 06 - "01100000", -- | ## | 07 - "00110000", -- | ## | 08 - "00011000", -- | ## | 09 - "00001100", -- | ## | 10 - "00000110", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 061 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "01111110", -- | ###### | 06 - "00000000", -- | | 07 - "01111110", -- | ###### | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 062 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "00110000", -- | ## | 04 - "00011000", -- | ## | 05 - "00001100", -- | ## | 06 - "00000110", -- | ## | 07 - "00001100", -- | ## | 08 - "00011000", -- | ## | 09 - "00110000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 063 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00000000", -- | | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 064 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "11000011", -- |## ##| 04 - "11000011", -- |## ##| 05 - "11001111", -- |## ####| 06 - "11011011", -- |## ## ##| 07 - "11011011", -- |## ## ##| 08 - "11001111", -- |## ####| 09 - "11000000", -- |## | 10 - "01111111", -- | #######| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 065 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 066 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111100", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111100", -- | ##### | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 067 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 068 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111000", -- | #### | 03 - "01101100", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01101100", -- | ## ## | 10 - "01111000", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 069 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 070 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 071 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01101110", -- | ## ### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 072 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111110", -- | ###### | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 073 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 074 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00000110", -- | ## | 04 - "00000110", -- | ## | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00000110", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 075 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01101100", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "01111000", -- | #### | 07 - "01101100", -- | ## ## | 08 - "01101100", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 076 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 077 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01110111", -- | ### ###| 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "01100011", -- | ## ##| 09 - "01100011", -- | ## ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 078 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01110011", -- | ### ##| 05 - "01111011", -- | #### ##| 06 - "01101111", -- | ## ####| 07 - "01100111", -- | ## ###| 08 - "01100011", -- | ## ##| 09 - "01100011", -- | ## ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 079 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 080 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111100", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 081 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00000110", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 082 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111100", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111100", -- | ##### | 07 - "01101100", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 083 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "00110000", -- | ## | 06 - "00011000", -- | ## | 07 - "00001100", -- | ## | 08 - "00000110", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 084 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 085 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 086 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 087 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01100011", -- | ## ##| 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "00110110", -- | ## ## | 09 - "00110110", -- | ## ## | 10 - "00110110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 088 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "00110100", -- | ## # | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00101100", -- | # ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 089 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 090 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "00000110", -- | ## | 04 - "00000110", -- | ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00110000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 091 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00110000", -- | ## | 04 - "00110000", -- | ## | 05 - "00110000", -- | ## | 06 - "00110000", -- | ## | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00110000", -- | ## | 11 - "00110000", -- | ## | 12 - "00110000", -- | ## | 13 - "00111100", -- | #### | 14 - -- ASCII 092 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "00110000", -- | ## | 05 - "00110000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00000110", -- | ## | 11 - "00000110", -- | ## | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 093 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00001100", -- | ## | 04 - "00001100", -- | ## | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00001100", -- | ## | 11 - "00001100", -- | ## | 12 - "00001100", -- | ## | 13 - "00111100", -- | #### | 14 - -- ASCII 094 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 095 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "11111111", -- |########| 14 - -- ASCII 096 --------------- - "00000000", -- | | 00 - "00111000", -- | ### | 01 - "00011000", -- | ## | 02 - "00001100", -- | ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 097 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 098 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 099 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 100 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00000110", -- | ## | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 101 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 102 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011110", -- | #### | 03 - "00110000", -- | ## | 04 - "00110000", -- | ## | 05 - "00110000", -- | ## | 06 - "01111110", -- | ###### | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00110000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 103 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000110", -- | ## | 12 - "00000110", -- | ## | 13 - "01111100", -- | ##### | 14 - -- ASCII 104 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 105 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00011000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 106 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00001100", -- | ## | 02 - "00001100", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00001100", -- | ## | 11 - "00001100", -- | ## | 12 - "00001100", -- | ## | 13 - "01111000", -- | #### | 14 - -- ASCII 107 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01101100", -- | ## ## | 07 - "01111000", -- | #### | 08 - "01101100", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 108 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111000", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 109 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111110", -- | ###### | 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "01101011", -- | ## # ##| 09 - "01101011", -- | ## # ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 110 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 111 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 112 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "01100000", -- | ## | 12 - "01100000", -- | ## | 13 - "01100000", -- | ## | 14 - -- ASCII 113 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000110", -- | ## | 12 - "00000110", -- | ## | 13 - "00000110", -- | ## | 14 - -- ASCII 114 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01101110", -- | ## ### | 06 - "01110000", -- | ### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 115 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "00111100", -- | #### | 08 - "00000110", -- | ## | 09 - "00000110", -- | ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 116 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00110000", -- | ## | 04 - "01111110", -- | ###### | 05 - "00110000", -- | ## | 06 - "00110000", -- | ## | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00011110", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 117 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 118 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 119 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100011", -- | ## ##| 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "01101011", -- | ## # ##| 09 - "00110110", -- | ## ## | 10 - "00110110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 120 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00011000", -- | ## | 08 - "00111100", -- | #### | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 121 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "11110000", -- |#### | 14 - -- ASCII 122 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111110", -- | ###### | 05 - "00000110", -- | ## | 06 - "00001100", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 123 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00110000", -- | ## | 07 - "01100000", -- | ## | 08 - "00110000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 124 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00011000", -- | ## | 13 - "00011000", -- | ## | 14 - -- ASCII 125 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00001100", -- | ## | 07 - "00000110", -- | ## | 08 - "00001100", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00110000", -- | ## | 13 - "00000000", -- | | 14 - -- ASCII 126 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01110001", -- | ### #| 03 - "11011011", -- |## ## ##| 04 - "10001110", -- |# ### | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 127 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 128 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 129 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 130 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 131 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 132 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 133 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 134 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 135 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 136 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 137 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 138 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 139 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 140 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 141 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 142 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 143 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 144 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 145 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011000", -- | ## | 04 - "00011100", -- | ### | 05 - "00011100", -- | ### | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 146 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011100", -- | ### | 03 - "00011100", -- | ### | 04 - "00001100", -- | ## | 05 - "00011000", -- | ## | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 147 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 148 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 149 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 150 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 151 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 152 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 153 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 154 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 155 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 156 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 157 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 158 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 159 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 160 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 161 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00111100", -- | #### | 12 - "00111100", -- | #### | 13 - "00011000", -- | ## | 14 - -- ASCII 162 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 163 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "11111100", -- |###### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "11000000", -- |## | 10 - "11111110", -- |####### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 164 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "01100110", -- | ## ## | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "00111100", -- | #### | 08 - "01100110", -- | ## ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 165 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00111100", -- | #### | 06 - "01111110", -- | ###### | 07 - "00011000", -- | ## | 08 - "01111110", -- | ###### | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 166 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00011000", -- | ## | 13 - "00011000", -- | ## | 14 - -- ASCII 167 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "00111000", -- | ### | 06 - "00111100", -- | #### | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011100", -- | ### | 11 - "00000110", -- | ## | 12 - "01100110", -- | ## ## | 13 - "00111100", -- | #### | 14 - -- ASCII 168 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 169 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "11000011", -- |## ##| 04 - "10011001", -- |# ## #| 05 - "10100101", -- |# # # #| 06 - "10100001", -- |# # #| 07 - "10100101", -- |# # # #| 08 - "10011001", -- |# ## #| 09 - "11000011", -- |## ##| 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 170 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00000110", -- | ## | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "00111110", -- | ##### | 07 - "00000000", -- | | 08 - "01111110", -- | ###### | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 171 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00110011", -- | ## ##| 07 - "01100110", -- | ## ## | 08 - "11001100", -- |## ## | 09 - "01100110", -- | ## ## | 10 - "00110011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 172 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000110", -- | ## | 08 - "00000110", -- | ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 173 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 174 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "11000011", -- |## ##| 04 - "10111001", -- |# ### #| 05 - "10100101", -- |# # # #| 06 - "10100101", -- |# # # #| 07 - "10111001", -- |# ### #| 08 - "10100101", -- |# # # #| 09 - "11000011", -- |## ##| 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 175 --------------- - "11111111", -- |########| 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 176 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "00111100", -- | #### | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 177 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "01111110", -- | ###### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00000000", -- | | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 178 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111000", -- | ### | 03 - "00001100", -- | ## | 04 - "00011000", -- | ## | 05 - "00110000", -- | ## | 06 - "00111100", -- | #### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 179 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111000", -- | ### | 03 - "00001100", -- | ## | 04 - "00011000", -- | ## | 05 - "00001100", -- | ## | 06 - "00111000", -- | ### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 180 --------------- - "00000000", -- | | 00 - "00011100", -- | ### | 01 - "00011000", -- | ## | 02 - "00110000", -- | ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 181 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111011", -- | #### ##| 11 - "01100000", -- | ## | 12 - "01100000", -- | ## | 13 - "11000000", -- |## | 14 - -- ASCII 182 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011111", -- | #####| 03 - "00111110", -- | ##### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "00111110", -- | ##### | 08 - "00011110", -- | #### | 09 - "00000110", -- | ## | 10 - "00000110", -- | ## | 11 - "00000110", -- | ## | 12 - "00000110", -- | ## | 13 - "00000110", -- | ## | 14 - -- ASCII 183 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00011100", -- | ### | 06 - "00011100", -- | ### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 184 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00111000", -- | ### | 14 - -- ASCII 185 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111000", -- | ### | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 186 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00000000", -- | | 08 - "01111110", -- | ###### | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 187 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "11001100", -- |## ## | 07 - "01100110", -- | ## ## | 08 - "00110011", -- | ## ##| 09 - "01100110", -- | ## ## | 10 - "11001100", -- |## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 188 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100000", -- | ## | 02 - "11100000", -- |### | 03 - "01100011", -- | ## ##| 04 - "01100110", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "00011000", -- | ## | 07 - "00110111", -- | ## ###| 08 - "01101111", -- | ## ####| 09 - "11011011", -- |## ## ##| 10 - "00011111", -- | #####| 11 - "00000011", -- | ##| 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 189 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100000", -- | ## | 02 - "11100000", -- |### | 03 - "01100011", -- | ## ##| 04 - "01100110", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "00011000", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100011", -- | ## ##| 09 - "11000110", -- |## ## | 10 - "00001100", -- | ## | 11 - "00001111", -- | ####| 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 190 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "11100000", -- |### | 02 - "00110000", -- | ## | 03 - "01100011", -- | ## ##| 04 - "00110110", -- | ## ## | 05 - "11101100", -- |### ## | 06 - "00011000", -- | ## | 07 - "00110111", -- | ## ###| 08 - "01101111", -- | ## ####| 09 - "11011011", -- |## ## ##| 10 - "00011111", -- | #####| 11 - "00000011", -- | ##| 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 191 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00110000", -- | ## | 11 - "01100110", -- | ## ## | 12 - "01100110", -- | ## ## | 13 - "00111100", -- | #### | 14 - -- ASCII 192 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 193 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 194 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 195 --------------- - "00111011", -- | ### ##| 00 - "01101110", -- | ## ### | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 196 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 197 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00111100", -- | #### | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 198 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001111", -- | ####| 03 - "00011100", -- | ### | 04 - "00111100", -- | #### | 05 - "01101100", -- | ## ## | 06 - "01101111", -- | ## ####| 07 - "01111100", -- | ##### | 08 - "01101100", -- | ## ## | 09 - "01101100", -- | ## ## | 10 - "01101111", -- | ## ####| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 199 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00111000", -- | ### | 14 - -- ASCII 200 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 201 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 202 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 203 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 204 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 205 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 206 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 207 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 208 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111000", -- | #### | 03 - "01101100", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "11110110", -- |#### ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01101100", -- | ## ## | 10 - "01111000", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 209 --------------- - "00111011", -- | ### ##| 00 - "01101110", -- | ## ### | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01110011", -- | ### ##| 05 - "01111011", -- | #### ##| 06 - "01101111", -- | ## ####| 07 - "01100111", -- | ## ###| 08 - "01100011", -- | ## ##| 09 - "01100011", -- | ## ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 210 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 211 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 212 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 213 --------------- - "00111011", -- | ### ##| 00 - "01101110", -- | ## ### | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 214 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 215 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "01000010", -- | # # | 04 - "01100110", -- | ## ## | 05 - "00111100", -- | #### | 06 - "00011000", -- | ## | 07 - "00111100", -- | #### | 08 - "01100110", -- | ## ## | 09 - "01000010", -- | # # | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 216 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111110", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01101110", -- | ## ### | 05 - "01101110", -- | ## ### | 06 - "01111110", -- | ###### | 07 - "01110110", -- | ### ## | 08 - "01110110", -- | ### ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 217 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 218 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 219 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 220 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 221 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 222 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01111100", -- | ##### | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 223 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111000", -- | ### | 03 - "01101100", -- | ## ## | 04 - "01101100", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01101100", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 224 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 225 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 226 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 227 --------------- - "00000000", -- | | 00 - "01110001", -- | ### #| 01 - "11011011", -- |## ## ##| 02 - "10001110", -- |# ### | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 228 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 229 --------------- - "00000000", -- | | 00 - "00111100", -- | #### | 01 - "01100110", -- | ## ## | 02 - "00111100", -- | #### | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 230 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01101110", -- | ## ### | 05 - "00011011", -- | ## ##| 06 - "00011011", -- | ## ##| 07 - "01111111", -- | #######| 08 - "11011000", -- |## ## | 09 - "11011000", -- |## ## | 10 - "01110111", -- | ### ###| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 231 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00111000", -- | ### | 14 - -- ASCII 232 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 233 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 234 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 235 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 236 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 237 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 238 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 239 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 240 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110110", -- | ## ## | 03 - "00011000", -- | ## | 04 - "01101100", -- | ## ## | 05 - "00011110", -- | #### | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 241 --------------- - "00000000", -- | | 00 - "01110001", -- | ### #| 01 - "11011011", -- |## ## ##| 02 - "10001110", -- |# ### | 03 - "00000000", -- | | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 242 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 243 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 244 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 245 --------------- - "00000000", -- | | 00 - "01110001", -- | ### #| 01 - "11011011", -- |## ## ##| 02 - "10001110", -- |# ### | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 246 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 247 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000000", -- | | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 248 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01101110", -- | ## ### | 07 - "01111110", -- | ###### | 08 - "01110110", -- | ### ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 249 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 250 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 251 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 252 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 253 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "11110000", -- |#### | 14 - -- ASCII 254 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01111100", -- | ##### | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "01100000", -- | ## | 12 - "01100000", -- | ## | 13 - "01100000", -- | ## | 14 - -- ASCII 255 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "11110000", -- |#### | 14 - -- ASCII 256 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 257 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 258 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 259 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 260 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 261 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 262 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 263 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 264 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 265 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 266 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 267 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 268 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 269 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 270 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 271 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 272 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 273 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 274 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 275 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 276 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 277 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 278 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 279 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 280 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 281 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 282 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 283 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 284 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 285 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 286 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- ASCII 287 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - -- Padding --------------- - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000", -- Padded - "00000000" -- Padded - ); -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; - -end RTL; - diff --git a/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd b/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd deleted file mode 100644 index e46151c..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd +++ /dev/null @@ -1,4382 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port - ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := - ( - -- ASCII 032 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 033 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "00111100", -- | #### | 05 - "00111100", -- | #### | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00000000", -- | | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 034 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 035 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110110", -- | ## ## | 03 - "00110110", -- | ## ## | 04 - "01111111", -- | #######| 05 - "00110110", -- | ## ## | 06 - "00110110", -- | ## ## | 07 - "00110110", -- | ## ## | 08 - "01111111", -- | #######| 09 - "00110110", -- | ## ## | 10 - "00110110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 036 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00011000", -- | ## | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "00110000", -- | ## | 06 - "00011000", -- | ## | 07 - "00001100", -- | ## | 08 - "00000110", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00011000", -- | ## | 12 - "00011000", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 037 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01110000", -- | ### | 02 - "11011000", -- |## ## | 03 - "11011010", -- |## ## # | 04 - "01110110", -- | ### ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00110000", -- | ## | 08 - "01101110", -- | ## ### | 09 - "01011011", -- | # ## ##| 10 - "00011011", -- | ## ##| 11 - "00001110", -- | ### | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 038 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "11111111", -- |########| 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 039 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 040 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00110000", -- | ## | 06 - "00110000", -- | ## | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 041 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00110000", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 042 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00110110", -- | ## ## | 05 - "00011100", -- | ### | 06 - "01111111", -- | #######| 07 - "00011100", -- | ### | 08 - "00110110", -- | ## ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 043 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "01111110", -- | ###### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 044 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 045 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 046 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 047 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00000110", -- | ## | 04 - "00001100", -- | ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "01100000", -- | ## | 11 - "01100000", -- | ## | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 048 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011110", -- | #### | 03 - "00110011", -- | ## ##| 04 - "00110111", -- | ## ###| 05 - "00110111", -- | ## ###| 06 - "00110011", -- | ## ##| 07 - "00111011", -- | ### ##| 08 - "00111011", -- | ### ##| 09 - "00110011", -- | ## ##| 10 - "00011110", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 049 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011100", -- | ### | 04 - "01111100", -- | ##### | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00001100", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 050 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00000110", -- | ## | 06 - "00001100", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 051 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00000110", -- | ## | 06 - "00011100", -- | ### | 07 - "00000110", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 052 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00110000", -- | ## | 04 - "00110110", -- | ## ## | 05 - "00110110", -- | ## ## | 06 - "00110110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01111111", -- | #######| 09 - "00000110", -- | ## | 10 - "00000110", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 053 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "00000110", -- | ## | 08 - "00000110", -- | ## | 09 - "00001100", -- | ## | 10 - "01111000", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 054 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011100", -- | ### | 03 - "00011000", -- | ## | 04 - "00110000", -- | ## | 05 - "01111100", -- | ##### | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 055 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "00000110", -- | ## | 04 - "00001100", -- | ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00110000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 056 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01110110", -- | ### ## | 06 - "00111100", -- | #### | 07 - "01101110", -- | ## ### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 057 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "00111110", -- | ##### | 08 - "00001100", -- | ## | 09 - "00011000", -- | ## | 10 - "00111000", -- | ### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 058 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011100", -- | ### | 05 - "00011100", -- | ### | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 059 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011100", -- | ### | 05 - "00011100", -- | ### | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011100", -- | ### | 10 - "00011100", -- | ### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 060 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00001100", -- | ## | 04 - "00011000", -- | ## | 05 - "00110000", -- | ## | 06 - "01100000", -- | ## | 07 - "00110000", -- | ## | 08 - "00011000", -- | ## | 09 - "00001100", -- | ## | 10 - "00000110", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 061 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "01111110", -- | ###### | 06 - "00000000", -- | | 07 - "01111110", -- | ###### | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 062 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "00110000", -- | ## | 04 - "00011000", -- | ## | 05 - "00001100", -- | ## | 06 - "00000110", -- | ## | 07 - "00001100", -- | ## | 08 - "00011000", -- | ## | 09 - "00110000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 063 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00000000", -- | | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 064 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "11000011", -- |## ##| 04 - "11000011", -- |## ##| 05 - "11001111", -- |## ####| 06 - "11011011", -- |## ## ##| 07 - "11011011", -- |## ## ##| 08 - "11001111", -- |## ####| 09 - "11000000", -- |## | 10 - "01111111", -- | #######| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 065 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 066 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111100", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111100", -- | ##### | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 067 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 068 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111000", -- | #### | 03 - "01101100", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01101100", -- | ## ## | 10 - "01111000", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 069 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 070 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 071 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01101110", -- | ## ### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 072 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111110", -- | ###### | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 073 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 074 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00000110", -- | ## | 04 - "00000110", -- | ## | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00000110", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 075 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01101100", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "01111000", -- | #### | 07 - "01101100", -- | ## ## | 08 - "01101100", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 076 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 077 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01110111", -- | ### ###| 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "01100011", -- | ## ##| 09 - "01100011", -- | ## ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 078 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01110011", -- | ### ##| 05 - "01111011", -- | #### ##| 06 - "01101111", -- | ## ####| 07 - "01100111", -- | ## ###| 08 - "01100011", -- | ## ##| 09 - "01100011", -- | ## ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 079 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 080 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111100", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 081 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00000110", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 082 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111100", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01111100", -- | ##### | 07 - "01101100", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 083 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "00110000", -- | ## | 06 - "00011000", -- | ## | 07 - "00001100", -- | ## | 08 - "00000110", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 084 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 085 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 086 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 087 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01100011", -- | ## ##| 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "00110110", -- | ## ## | 09 - "00110110", -- | ## ## | 10 - "00110110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 088 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "00110100", -- | ## # | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00101100", -- | # ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 089 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 090 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "00000110", -- | ## | 04 - "00000110", -- | ## | 05 - "00001100", -- | ## | 06 - "00011000", -- | ## | 07 - "00110000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 091 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00110000", -- | ## | 04 - "00110000", -- | ## | 05 - "00110000", -- | ## | 06 - "00110000", -- | ## | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00110000", -- | ## | 11 - "00110000", -- | ## | 12 - "00110000", -- | ## | 13 - "00111100", -- | #### | 14 - "00000000", -- | | 15 - -- ASCII 092 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "00110000", -- | ## | 05 - "00110000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00000110", -- | ## | 11 - "00000110", -- | ## | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 093 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00001100", -- | ## | 04 - "00001100", -- | ## | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00001100", -- | ## | 11 - "00001100", -- | ## | 12 - "00001100", -- | ## | 13 - "00111100", -- | #### | 14 - "00000000", -- | | 15 - -- ASCII 094 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 095 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "11111111", -- |########| 14 - "00000000", -- | | 15 - -- ASCII 096 --------------- - "00000000", -- | | 00 - "00111000", -- | ### | 01 - "00011000", -- | ## | 02 - "00001100", -- | ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 097 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 098 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 099 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 100 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000110", -- | ## | 03 - "00000110", -- | ## | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 101 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 102 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011110", -- | #### | 03 - "00110000", -- | ## | 04 - "00110000", -- | ## | 05 - "00110000", -- | ## | 06 - "01111110", -- | ###### | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00110000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 103 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000110", -- | ## | 12 - "00000110", -- | ## | 13 - "01111100", -- | ##### | 14 - "00000000", -- | | 15 - -- ASCII 104 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 105 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00011000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 106 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00001100", -- | ## | 02 - "00001100", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00001100", -- | ## | 06 - "00001100", -- | ## | 07 - "00001100", -- | ## | 08 - "00001100", -- | ## | 09 - "00001100", -- | ## | 10 - "00001100", -- | ## | 11 - "00001100", -- | ## | 12 - "00001100", -- | ## | 13 - "01111000", -- | #### | 14 - "00000000", -- | | 15 - -- ASCII 107 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01101100", -- | ## ## | 07 - "01111000", -- | #### | 08 - "01101100", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 108 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111000", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 109 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111110", -- | ###### | 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "01101011", -- | ## # ##| 09 - "01101011", -- | ## # ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 110 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 111 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 112 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "01100000", -- | ## | 12 - "01100000", -- | ## | 13 - "01100000", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 113 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000110", -- | ## | 12 - "00000110", -- | ## | 13 - "00000110", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 114 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01101110", -- | ## ### | 06 - "01110000", -- | ### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 115 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "00111100", -- | #### | 08 - "00000110", -- | ## | 09 - "00000110", -- | ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 116 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00110000", -- | ## | 04 - "01111110", -- | ###### | 05 - "00110000", -- | ## | 06 - "00110000", -- | ## | 07 - "00110000", -- | ## | 08 - "00110000", -- | ## | 09 - "00110000", -- | ## | 10 - "00011110", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 117 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 118 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 119 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100011", -- | ## ##| 05 - "01101011", -- | ## # ##| 06 - "01101011", -- | ## # ##| 07 - "01101011", -- | ## # ##| 08 - "01101011", -- | ## # ##| 09 - "00110110", -- | ## ## | 10 - "00110110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 120 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00011000", -- | ## | 08 - "00111100", -- | #### | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 121 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "11110000", -- |#### | 14 - "00000000", -- | | 15 - -- ASCII 122 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01111110", -- | ###### | 05 - "00000110", -- | ## | 06 - "00001100", -- | ## | 07 - "00011000", -- | ## | 08 - "00110000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 123 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00110000", -- | ## | 07 - "01100000", -- | ## | 08 - "00110000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 124 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00011000", -- | ## | 13 - "00011000", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 125 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00001100", -- | ## | 07 - "00000110", -- | ## | 08 - "00001100", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00110000", -- | ## | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 126 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01110001", -- | ### #| 03 - "11011011", -- |## ## ##| 04 - "10001110", -- |# ### | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 127 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 128 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 129 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 130 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 131 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 132 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 133 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 134 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 135 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 136 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 137 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 138 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 139 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 140 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 141 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 142 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 143 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 144 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 145 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001100", -- | ## | 03 - "00011000", -- | ## | 04 - "00011100", -- | ### | 05 - "00011100", -- | ### | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 146 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011100", -- | ### | 03 - "00011100", -- | ### | 04 - "00001100", -- | ## | 05 - "00011000", -- | ## | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 147 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 148 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 149 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 150 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 151 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 152 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 153 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 154 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 155 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 156 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 157 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 158 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 159 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01111110", -- | ###### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "01111110", -- | ###### | 08 - "01111110", -- | ###### | 09 - "01111110", -- | ###### | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 160 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 161 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00111100", -- | #### | 12 - "00111100", -- | #### | 13 - "00011000", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 162 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 163 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "11111100", -- |###### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "11000000", -- |## | 10 - "11111110", -- |####### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 164 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "01100110", -- | ## ## | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "00111100", -- | #### | 08 - "01100110", -- | ## ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 165 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "00111100", -- | #### | 06 - "01111110", -- | ###### | 07 - "00011000", -- | ## | 08 - "01111110", -- | ###### | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 166 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00011000", -- | ## | 12 - "00011000", -- | ## | 13 - "00011000", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 167 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100000", -- | ## | 05 - "00111000", -- | ### | 06 - "00111100", -- | #### | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "00111100", -- | #### | 10 - "00011100", -- | ### | 11 - "00000110", -- | ## | 12 - "01100110", -- | ## ## | 13 - "00111100", -- | #### | 14 - "00000000", -- | | 15 - -- ASCII 168 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 169 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "11000011", -- |## ##| 04 - "10011001", -- |# ## #| 05 - "10100101", -- |# # # #| 06 - "10100001", -- |# # #| 07 - "10100101", -- |# # # #| 08 - "10011001", -- |# ## #| 09 - "11000011", -- |## ##| 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 170 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00000110", -- | ## | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "00111110", -- | ##### | 07 - "00000000", -- | | 08 - "01111110", -- | ###### | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 171 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00110011", -- | ## ##| 07 - "01100110", -- | ## ## | 08 - "11001100", -- |## ## | 09 - "01100110", -- | ## ## | 10 - "00110011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 172 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000110", -- | ## | 08 - "00000110", -- | ## | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 173 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 174 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "11000011", -- |## ##| 04 - "10111001", -- |# ### #| 05 - "10100101", -- |# # # #| 06 - "10100101", -- |# # # #| 07 - "10111001", -- |# ### #| 08 - "10100101", -- |# # # #| 09 - "11000011", -- |## ##| 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 175 --------------- - "11111111", -- |########| 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 176 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "00111100", -- | #### | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 177 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "01111110", -- | ###### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00000000", -- | | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 178 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111000", -- | ### | 03 - "00001100", -- | ## | 04 - "00011000", -- | ## | 05 - "00110000", -- | ## | 06 - "00111100", -- | #### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 179 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111000", -- | ### | 03 - "00001100", -- | ## | 04 - "00011000", -- | ## | 05 - "00001100", -- | ## | 06 - "00111000", -- | ### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 180 --------------- - "00000000", -- | | 00 - "00011100", -- | ### | 01 - "00011000", -- | ## | 02 - "00110000", -- | ## | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 181 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111011", -- | #### ##| 11 - "01100000", -- | ## | 12 - "01100000", -- | ## | 13 - "11000000", -- |## | 14 - "00000000", -- | | 15 - -- ASCII 182 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011111", -- | #####| 03 - "00111110", -- | ##### | 04 - "01111110", -- | ###### | 05 - "01111110", -- | ###### | 06 - "01111110", -- | ###### | 07 - "00111110", -- | ##### | 08 - "00011110", -- | #### | 09 - "00000110", -- | ## | 10 - "00000110", -- | ## | 11 - "00000110", -- | ## | 12 - "00000110", -- | ## | 13 - "00000110", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 183 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00011100", -- | ### | 06 - "00011100", -- | ### | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 184 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00111000", -- | ### | 14 - "00000000", -- | | 15 - -- ASCII 185 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111000", -- | ### | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 186 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00000000", -- | | 08 - "01111110", -- | ###### | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 187 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "11001100", -- |## ## | 07 - "01100110", -- | ## ## | 08 - "00110011", -- | ## ##| 09 - "01100110", -- | ## ## | 10 - "11001100", -- |## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 188 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100000", -- | ## | 02 - "11100000", -- |### | 03 - "01100011", -- | ## ##| 04 - "01100110", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "00011000", -- | ## | 07 - "00110111", -- | ## ###| 08 - "01101111", -- | ## ####| 09 - "11011011", -- |## ## ##| 10 - "00011111", -- | #####| 11 - "00000011", -- | ##| 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 189 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100000", -- | ## | 02 - "11100000", -- |### | 03 - "01100011", -- | ## ##| 04 - "01100110", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "00011000", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100011", -- | ## ##| 09 - "11000110", -- |## ## | 10 - "00001100", -- | ## | 11 - "00001111", -- | ####| 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 190 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "11100000", -- |### | 02 - "00110000", -- | ## | 03 - "01100011", -- | ## ##| 04 - "00110110", -- | ## ## | 05 - "11101100", -- |### ## | 06 - "00011000", -- | ## | 07 - "00110111", -- | ## ###| 08 - "01101111", -- | ## ####| 09 - "11011011", -- |## ## ##| 10 - "00011111", -- | #####| 11 - "00000011", -- | ##| 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 191 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00000000", -- | | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00110000", -- | ## | 11 - "01100110", -- | ## ## | 12 - "01100110", -- | ## ## | 13 - "00111100", -- | #### | 14 - "00000000", -- | | 15 - -- ASCII 192 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 193 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 194 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 195 --------------- - "00111011", -- | ### ##| 00 - "01101110", -- | ## ### | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 196 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 197 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00111100", -- | #### | 02 - "00011000", -- | ## | 03 - "00111100", -- | #### | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 198 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00001111", -- | ####| 03 - "00011100", -- | ### | 04 - "00111100", -- | #### | 05 - "01101100", -- | ## ## | 06 - "01101111", -- | ## ####| 07 - "01111100", -- | ##### | 08 - "01101100", -- | ## ## | 09 - "01101100", -- | ## ## | 10 - "01101111", -- | ## ####| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 199 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100000", -- | ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00111000", -- | ### | 14 - "00000000", -- | | 15 - -- ASCII 200 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 201 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 202 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 203 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01111110", -- | ###### | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01100000", -- | ## | 06 - "01111100", -- | ##### | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 204 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 205 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 206 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 207 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 208 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01111000", -- | #### | 03 - "01101100", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "11110110", -- |#### ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01101100", -- | ## ## | 10 - "01111000", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 209 --------------- - "00111011", -- | ### ##| 00 - "01101110", -- | ## ### | 01 - "00000000", -- | | 02 - "01100011", -- | ## ##| 03 - "01100011", -- | ## ##| 04 - "01110011", -- | ### ##| 05 - "01111011", -- | #### ##| 06 - "01101111", -- | ## ####| 07 - "01100111", -- | ## ###| 08 - "01100011", -- | ## ##| 09 - "01100011", -- | ## ##| 10 - "01100011", -- | ## ##| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 210 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 211 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 212 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 213 --------------- - "00111011", -- | ### ##| 00 - "01101110", -- | ## ### | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 214 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "00111100", -- | #### | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 215 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "01000010", -- | # # | 04 - "01100110", -- | ## ## | 05 - "00111100", -- | #### | 06 - "00011000", -- | ## | 07 - "00111100", -- | #### | 08 - "01100110", -- | ## ## | 09 - "01000010", -- | # # | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 216 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111110", -- | ##### | 03 - "01100110", -- | ## ## | 04 - "01101110", -- | ## ### | 05 - "01101110", -- | ## ### | 06 - "01111110", -- | ###### | 07 - "01110110", -- | ### ## | 08 - "01110110", -- | ### ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 217 --------------- - "00110000", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 218 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 219 --------------- - "00111100", -- | #### | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 220 --------------- - "01100110", -- | ## ## | 00 - "01100110", -- | ## ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 221 --------------- - "00001100", -- | ## | 00 - "00011000", -- | ## | 01 - "00000000", -- | | 02 - "01100110", -- | ## ## | 03 - "01100110", -- | ## ## | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "00111100", -- | #### | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00011000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 222 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01111100", -- | ##### | 09 - "01100000", -- | ## | 10 - "01100000", -- | ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 223 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00111000", -- | ### | 03 - "01101100", -- | ## ## | 04 - "01101100", -- | ## ## | 05 - "01101100", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01101100", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 224 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 225 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 226 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 227 --------------- - "00000000", -- | | 00 - "01110001", -- | ### #| 01 - "11011011", -- |## ## ##| 02 - "10001110", -- |# ### | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 228 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 229 --------------- - "00000000", -- | | 00 - "00111100", -- | #### | 01 - "01100110", -- | ## ## | 02 - "00111100", -- | #### | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "00000110", -- | ## | 06 - "00000110", -- | ## | 07 - "00111110", -- | ##### | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 230 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "01101110", -- | ## ### | 05 - "00011011", -- | ## ##| 06 - "00011011", -- | ## ##| 07 - "01111111", -- | #######| 08 - "11011000", -- |## ## | 09 - "11011000", -- |## ## | 10 - "01110111", -- | ### ###| 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 231 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100000", -- | ## | 07 - "01100000", -- | ## | 08 - "01100000", -- | ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00011000", -- | ## | 12 - "00001100", -- | ## | 13 - "00111000", -- | ### | 14 - "00000000", -- | | 15 - -- ASCII 232 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 233 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 234 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 235 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01111110", -- | ###### | 08 - "01100000", -- | ## | 09 - "01100000", -- | ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 236 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 237 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 238 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 239 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01111000", -- | #### | 05 - "00011000", -- | ## | 06 - "00011000", -- | ## | 07 - "00011000", -- | ## | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "01111110", -- | ###### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 240 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00110110", -- | ## ## | 03 - "00011000", -- | ## | 04 - "01101100", -- | ## ## | 05 - "00011110", -- | #### | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 241 --------------- - "00000000", -- | | 00 - "01110001", -- | ### #| 01 - "11011011", -- |## ## ##| 02 - "10001110", -- |# ### | 03 - "00000000", -- | | 04 - "01111100", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01100110", -- | ## ## | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 242 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 243 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 244 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 245 --------------- - "00000000", -- | | 00 - "01110001", -- | ### #| 01 - "11011011", -- |## ## ##| 02 - "10001110", -- |# ### | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 246 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "00111100", -- | #### | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 247 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00011000", -- | ## | 04 - "00011000", -- | ## | 05 - "00000000", -- | | 06 - "01111110", -- | ###### | 07 - "00000000", -- | | 08 - "00011000", -- | ## | 09 - "00011000", -- | ## | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 248 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00111110", -- | ##### | 05 - "01100110", -- | ## ## | 06 - "01101110", -- | ## ### | 07 - "01111110", -- | ###### | 08 - "01110110", -- | ### ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 249 --------------- - "00000000", -- | | 00 - "01110000", -- | ### | 01 - "00110000", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 250 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 251 --------------- - "00000000", -- | | 00 - "00011000", -- | ## | 01 - "00111100", -- | #### | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 252 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111110", -- | ##### | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 253 --------------- - "00000000", -- | | 00 - "00001110", -- | ### | 01 - "00001100", -- | ## | 02 - "00011000", -- | ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "11110000", -- |#### | 14 - "00000000", -- | | 15 - -- ASCII 254 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "01100000", -- | ## | 03 - "01100000", -- | ## | 04 - "01100000", -- | ## | 05 - "01111100", -- | ##### | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "01111100", -- | ##### | 11 - "01100000", -- | ## | 12 - "01100000", -- | ## | 13 - "01100000", -- | ## | 14 - "00000000", -- | | 15 - -- ASCII 255 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "01100110", -- | ## ## | 02 - "01100110", -- | ## ## | 03 - "00000000", -- | | 04 - "01100110", -- | ## ## | 05 - "01100110", -- | ## ## | 06 - "01100110", -- | ## ## | 07 - "01100110", -- | ## ## | 08 - "01100110", -- | ## ## | 09 - "01100110", -- | ## ## | 10 - "00111100", -- | #### | 11 - "00001100", -- | ## | 12 - "00011000", -- | ## | 13 - "11110000", -- |#### | 14 - "00000000", -- | | 15 - -- ASCII 256 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 257 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 258 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 259 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 260 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 261 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 262 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 263 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 264 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 265 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 266 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 267 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 268 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 269 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 270 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 271 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 272 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 273 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 274 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 275 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 276 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 277 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 278 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 279 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 280 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 281 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 282 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 283 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 284 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 285 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 286 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "00000000", -- | | 12 - "00000000", -- | | 13 - "00000000", -- | | 14 - "00000000", -- | | 15 - -- ASCII 287 --------------- - "00000000", -- | | 00 - "00000000", -- | | 01 - "00000000", -- | | 02 - "00000000", -- | | 03 - "00000000", -- | | 04 - "00000000", -- | | 05 - "00000000", -- | | 06 - "00000000", -- | | 07 - "00000000", -- | | 08 - "00000000", -- | | 09 - "00000000", -- | | 10 - "00000000", -- | | 11 - "11111111", -- |########| 12 - "11111111", -- |########| 13 - "11111111", -- |########| 14 - "00000000" -- | | 15 - ); -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; - -end RTL; - diff --git a/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_9x16.vhd b/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_9x16.vhd deleted file mode 100644 index 9b32d16..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_fixedsys_9x16.vhd +++ /dev/null @@ -1,4351 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port - ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(8 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(8 downto 0); - constant ROM : ROM_ARRAY := - ( - -- ASCII 032 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 033 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "001111000", -- | #### | 05 - "001111000", -- | #### | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000000000", -- | | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 034 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 035 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001101100", -- | ## ## | 03 - "001101100", -- | ## ## | 04 - "011111110", -- | ####### | 05 - "001101100", -- | ## ## | 06 - "001101100", -- | ## ## | 07 - "001101100", -- | ## ## | 08 - "011111110", -- | ####### | 09 - "001101100", -- | ## ## | 10 - "001101100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 036 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "000110000", -- | ## | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011000000", -- | ## | 05 - "001100000", -- | ## | 06 - "000110000", -- | ## | 07 - "000011000", -- | ## | 08 - "000001100", -- | ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000110000", -- | ## | 12 - "000110000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 037 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011100000", -- | ### | 02 - "110110000", -- |## ## | 03 - "110110100", -- |## ## # | 04 - "011101100", -- | ### ## | 05 - "000011000", -- | ## | 06 - "000110000", -- | ## | 07 - "001100000", -- | ## | 08 - "011011100", -- | ## ### | 09 - "010110110", -- | # ## ## | 10 - "000110110", -- | ## ## | 11 - "000011100", -- | ### | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 038 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "111111110", -- |######## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 039 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 040 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000011000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "001100000", -- | ## | 06 - "001100000", -- | ## | 07 - "001100000", -- | ## | 08 - "001100000", -- | ## | 09 - "001100000", -- | ## | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "000011000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 041 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001100000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000011000", -- | ## | 06 - "000011000", -- | ## | 07 - "000011000", -- | ## | 08 - "000011000", -- | ## | 09 - "000011000", -- | ## | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "001100000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 042 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001101100", -- | ## ## | 05 - "000111000", -- | ### | 06 - "011111110", -- | ####### | 07 - "000111000", -- | ### | 08 - "001101100", -- | ## ## | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 043 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "011111100", -- | ###### | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 044 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000111000", -- | ### | 10 - "000111000", -- | ### | 11 - "000011000", -- | ## | 12 - "000110000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 045 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "011111100", -- | ###### | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 046 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000111000", -- | ### | 10 - "000111000", -- | ### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 047 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000001100", -- | ## | 03 - "000001100", -- | ## | 04 - "000011000", -- | ## | 05 - "000011000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "001100000", -- | ## | 09 - "001100000", -- | ## | 10 - "011000000", -- | ## | 11 - "011000000", -- | ## | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 048 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000111100", -- | #### | 03 - "001100110", -- | ## ## | 04 - "001101110", -- | ## ### | 05 - "001101110", -- | ## ### | 06 - "001100110", -- | ## ## | 07 - "001110110", -- | ### ## | 08 - "001110110", -- | ### ## | 09 - "001100110", -- | ## ## | 10 - "000111100", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 049 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000011000", -- | ## | 03 - "000111000", -- | ### | 04 - "011111000", -- | ##### | 05 - "000011000", -- | ## | 06 - "000011000", -- | ## | 07 - "000011000", -- | ## | 08 - "000011000", -- | ## | 09 - "000011000", -- | ## | 10 - "000011000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 050 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "000001100", -- | ## | 06 - "000011000", -- | ## | 07 - "000110000", -- | ## | 08 - "001100000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 051 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "000001100", -- | ## | 06 - "000111000", -- | ### | 07 - "000001100", -- | ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 052 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001100000", -- | ## | 03 - "001100000", -- | ## | 04 - "001101100", -- | ## ## | 05 - "001101100", -- | ## ## | 06 - "001101100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011111110", -- | ####### | 09 - "000001100", -- | ## | 10 - "000001100", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 053 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "000001100", -- | ## | 08 - "000001100", -- | ## | 09 - "000011000", -- | ## | 10 - "011110000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 054 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000111000", -- | ### | 03 - "000110000", -- | ## | 04 - "001100000", -- | ## | 05 - "011111000", -- | ##### | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 055 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "000001100", -- | ## | 04 - "000011000", -- | ## | 05 - "000011000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "001100000", -- | ## | 09 - "001100000", -- | ## | 10 - "001100000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 056 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011101100", -- | ### ## | 06 - "001111000", -- | #### | 07 - "011011100", -- | ## ### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 057 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "001111100", -- | ##### | 08 - "000011000", -- | ## | 09 - "000110000", -- | ## | 10 - "001110000", -- | ### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 058 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000111000", -- | ### | 05 - "000111000", -- | ### | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000111000", -- | ### | 10 - "000111000", -- | ### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 059 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000111000", -- | ### | 05 - "000111000", -- | ### | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000111000", -- | ### | 10 - "000111000", -- | ### | 11 - "000011000", -- | ## | 12 - "000110000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 060 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000001100", -- | ## | 03 - "000011000", -- | ## | 04 - "000110000", -- | ## | 05 - "001100000", -- | ## | 06 - "011000000", -- | ## | 07 - "001100000", -- | ## | 08 - "000110000", -- | ## | 09 - "000011000", -- | ## | 10 - "000001100", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 061 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "011111100", -- | ###### | 06 - "000000000", -- | | 07 - "011111100", -- | ###### | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 062 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "001100000", -- | ## | 04 - "000110000", -- | ## | 05 - "000011000", -- | ## | 06 - "000001100", -- | ## | 07 - "000011000", -- | ## | 08 - "000110000", -- | ## | 09 - "001100000", -- | ## | 10 - "011000000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 063 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "000011000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000000000", -- | | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 064 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "110000110", -- |## ## | 04 - "110000110", -- |## ## | 05 - "110011110", -- |## #### | 06 - "110110110", -- |## ## ## | 07 - "110110110", -- |## ## ## | 08 - "110011110", -- |## #### | 09 - "110000000", -- |## | 10 - "011111110", -- | ####### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 065 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 066 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111000", -- | ##### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011111000", -- | ##### | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011111000", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 067 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011000000", -- | ## | 06 - "011000000", -- | ## | 07 - "011000000", -- | ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 068 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011110000", -- | #### | 03 - "011011000", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011011000", -- | ## ## | 10 - "011110000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 069 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 070 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011000000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 071 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011000000", -- | ## | 06 - "011000000", -- | ## | 07 - "011011100", -- | ## ### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 072 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011111100", -- | ###### | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 073 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 074 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000001100", -- | ## | 03 - "000001100", -- | ## | 04 - "000001100", -- | ## | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "000001100", -- | ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 075 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011011000", -- | ## ## | 05 - "011011000", -- | ## ## | 06 - "011110000", -- | #### | 07 - "011011000", -- | ## ## | 08 - "011011000", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 076 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011000000", -- | ## | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 077 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000110", -- | ## ## | 03 - "011000110", -- | ## ## | 04 - "011101110", -- | ### ### | 05 - "011010110", -- | ## # ## | 06 - "011010110", -- | ## # ## | 07 - "011010110", -- | ## # ## | 08 - "011000110", -- | ## ## | 09 - "011000110", -- | ## ## | 10 - "011000110", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 078 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000110", -- | ## ## | 03 - "011000110", -- | ## ## | 04 - "011100110", -- | ### ## | 05 - "011110110", -- | #### ## | 06 - "011011110", -- | ## #### | 07 - "011001110", -- | ## ### | 08 - "011000110", -- | ## ## | 09 - "011000110", -- | ## ## | 10 - "011000110", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 079 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 080 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111000", -- | ##### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011000000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 081 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000011000", -- | ## | 12 - "000001100", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 082 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111000", -- | ##### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011111000", -- | ##### | 07 - "011011000", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 083 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011000000", -- | ## | 05 - "001100000", -- | ## | 06 - "000110000", -- | ## | 07 - "000011000", -- | ## | 08 - "000001100", -- | ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 084 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 085 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 086 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "001111000", -- | #### | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 087 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000110", -- | ## ## | 03 - "011000110", -- | ## ## | 04 - "011000110", -- | ## ## | 05 - "011010110", -- | ## # ## | 06 - "011010110", -- | ## # ## | 07 - "011010110", -- | ## # ## | 08 - "001101100", -- | ## ## | 09 - "001101100", -- | ## ## | 10 - "001101100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 088 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "001101000", -- | ## # | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "001011000", -- | # ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 089 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "001111000", -- | #### | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 090 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "000001100", -- | ## | 04 - "000001100", -- | ## | 05 - "000011000", -- | ## | 06 - "000110000", -- | ## | 07 - "001100000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 091 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "001100000", -- | ## | 04 - "001100000", -- | ## | 05 - "001100000", -- | ## | 06 - "001100000", -- | ## | 07 - "001100000", -- | ## | 08 - "001100000", -- | ## | 09 - "001100000", -- | ## | 10 - "001100000", -- | ## | 11 - "001100000", -- | ## | 12 - "001100000", -- | ## | 13 - "001111000", -- | #### | 14 - "000000000", -- | | 15 - -- ASCII 092 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "001100000", -- | ## | 05 - "001100000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000011000", -- | ## | 09 - "000011000", -- | ## | 10 - "000001100", -- | ## | 11 - "000001100", -- | ## | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 093 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000011000", -- | ## | 04 - "000011000", -- | ## | 05 - "000011000", -- | ## | 06 - "000011000", -- | ## | 07 - "000011000", -- | ## | 08 - "000011000", -- | ## | 09 - "000011000", -- | ## | 10 - "000011000", -- | ## | 11 - "000011000", -- | ## | 12 - "000011000", -- | ## | 13 - "001111000", -- | #### | 14 - "000000000", -- | | 15 - -- ASCII 094 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 095 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "111111110", -- |######## | 14 - "000000000", -- | | 15 - -- ASCII 096 --------------- - "000000000", -- | | 00 - "001110000", -- | ### | 01 - "000110000", -- | ## | 02 - "000011000", -- | ## | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 097 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 098 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "011111000", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011111000", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 099 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011000000", -- | ## | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 100 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000001100", -- | ## | 03 - "000001100", -- | ## | 04 - "001111100", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 101 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 102 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000111100", -- | #### | 03 - "001100000", -- | ## | 04 - "001100000", -- | ## | 05 - "001100000", -- | ## | 06 - "011111100", -- | ###### | 07 - "001100000", -- | ## | 08 - "001100000", -- | ## | 09 - "001100000", -- | ## | 10 - "001100000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 103 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111100", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000001100", -- | ## | 12 - "000001100", -- | ## | 13 - "011111000", -- | ##### | 14 - "000000000", -- | | 15 - -- ASCII 104 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "011111000", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 105 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000110000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "011110000", -- | #### | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 106 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000011000", -- | ## | 02 - "000011000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000011000", -- | ## | 06 - "000011000", -- | ## | 07 - "000011000", -- | ## | 08 - "000011000", -- | ## | 09 - "000011000", -- | ## | 10 - "000011000", -- | ## | 11 - "000011000", -- | ## | 12 - "000011000", -- | ## | 13 - "011110000", -- | #### | 14 - "000000000", -- | | 15 - -- ASCII 107 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011011000", -- | ## ## | 07 - "011110000", -- | #### | 08 - "011011000", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 108 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011110000", -- | #### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 109 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011111100", -- | ###### | 05 - "011010110", -- | ## # ## | 06 - "011010110", -- | ## # ## | 07 - "011010110", -- | ## # ## | 08 - "011010110", -- | ## # ## | 09 - "011010110", -- | ## # ## | 10 - "011000110", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 110 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011111000", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 111 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 112 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011111000", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011111000", -- | ##### | 11 - "011000000", -- | ## | 12 - "011000000", -- | ## | 13 - "011000000", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 113 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111100", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000001100", -- | ## | 12 - "000001100", -- | ## | 13 - "000001100", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 114 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011011100", -- | ## ### | 06 - "011100000", -- | ### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011000000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 115 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111100", -- | ##### | 05 - "011000000", -- | ## | 06 - "011000000", -- | ## | 07 - "001111000", -- | #### | 08 - "000001100", -- | ## | 09 - "000001100", -- | ## | 10 - "011111000", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 116 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001100000", -- | ## | 03 - "001100000", -- | ## | 04 - "011111100", -- | ###### | 05 - "001100000", -- | ## | 06 - "001100000", -- | ## | 07 - "001100000", -- | ## | 08 - "001100000", -- | ## | 09 - "001100000", -- | ## | 10 - "000111100", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 117 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 118 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "001111000", -- | #### | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 119 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011000110", -- | ## ## | 05 - "011010110", -- | ## # ## | 06 - "011010110", -- | ## # ## | 07 - "011010110", -- | ## # ## | 08 - "011010110", -- | ## # ## | 09 - "001101100", -- | ## ## | 10 - "001101100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 120 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "001111000", -- | #### | 07 - "000110000", -- | ## | 08 - "001111000", -- | #### | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 121 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000011000", -- | ## | 12 - "000110000", -- | ## | 13 - "111100000", -- |#### | 14 - "000000000", -- | | 15 - -- ASCII 122 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011111100", -- | ###### | 05 - "000001100", -- | ## | 06 - "000011000", -- | ## | 07 - "000110000", -- | ## | 08 - "001100000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 123 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000011000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "001100000", -- | ## | 07 - "011000000", -- | ## | 08 - "001100000", -- | ## | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "000011000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 124 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "000110000", -- | ## | 13 - "000110000", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 125 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001100000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000011000", -- | ## | 07 - "000001100", -- | ## | 08 - "000011000", -- | ## | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "001100000", -- | ## | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 126 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011100010", -- | ### # | 03 - "110110110", -- |## ## ## | 04 - "100011100", -- |# ### | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 127 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 128 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 129 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 130 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 131 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 132 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 133 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 134 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 135 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 136 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 137 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 138 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 139 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 140 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 141 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 142 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 143 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 144 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 145 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000011000", -- | ## | 03 - "000110000", -- | ## | 04 - "000111000", -- | ### | 05 - "000111000", -- | ### | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 146 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000111000", -- | ### | 03 - "000111000", -- | ### | 04 - "000011000", -- | ## | 05 - "000110000", -- | ## | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 147 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 148 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 149 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 150 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 151 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 152 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 153 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 154 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 155 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 156 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 157 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 158 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 159 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011111100", -- | ###### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "011111100", -- | ###### | 08 - "011111100", -- | ###### | 09 - "011111100", -- | ###### | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 160 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 161 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000000000", -- | | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001111000", -- | #### | 11 - "001111000", -- | #### | 12 - "001111000", -- | #### | 13 - "000110000", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 162 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "000110000", -- | ## | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011000000", -- | ## | 07 - "011000000", -- | ## | 08 - "011001100", -- | ## ## | 09 - "001111000", -- | #### | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 163 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "111111000", -- |###### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "110000000", -- |## | 10 - "111111100", -- |####### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 164 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "011001100", -- | ## ## | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "001111000", -- | #### | 08 - "011001100", -- | ## ## | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 165 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "001111000", -- | #### | 06 - "011111100", -- | ###### | 07 - "000110000", -- | ## | 08 - "011111100", -- | ###### | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 166 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000110000", -- | ## | 12 - "000110000", -- | ## | 13 - "000110000", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 167 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011000000", -- | ## | 05 - "001110000", -- | ### | 06 - "001111000", -- | #### | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "001111000", -- | #### | 10 - "000111000", -- | ### | 11 - "000001100", -- | ## | 12 - "011001100", -- | ## ## | 13 - "001111000", -- | #### | 14 - "000000000", -- | | 15 - -- ASCII 168 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 169 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "110000110", -- |## ## | 04 - "100110010", -- |# ## # | 05 - "101001010", -- |# # # # | 06 - "101000010", -- |# # # | 07 - "101001010", -- |# # # # | 08 - "100110010", -- |# ## # | 09 - "110000110", -- |## ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 170 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000001100", -- | ## | 04 - "001111100", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "001111100", -- | ##### | 07 - "000000000", -- | | 08 - "011111100", -- | ###### | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 171 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "001100110", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "110011000", -- |## ## | 09 - "011001100", -- | ## ## | 10 - "001100110", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 172 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "011111100", -- | ###### | 07 - "000001100", -- | ## | 08 - "000001100", -- | ## | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 173 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "011111100", -- | ###### | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 174 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "110000110", -- |## ## | 04 - "101110010", -- |# ### # | 05 - "101001010", -- |# # # # | 06 - "101001010", -- |# # # # | 07 - "101110010", -- |# ### # | 08 - "101001010", -- |# # # # | 09 - "110000110", -- |## ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 175 --------------- - "111111110", -- |######## | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 176 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "001111000", -- | #### | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 177 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "011111100", -- | ###### | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000000000", -- | | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 178 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001110000", -- | ### | 03 - "000011000", -- | ## | 04 - "000110000", -- | ## | 05 - "001100000", -- | ## | 06 - "001111000", -- | #### | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 179 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001110000", -- | ### | 03 - "000011000", -- | ## | 04 - "000110000", -- | ## | 05 - "000011000", -- | ## | 06 - "001110000", -- | ### | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 180 --------------- - "000000000", -- | | 00 - "000111000", -- | ### | 01 - "000110000", -- | ## | 02 - "001100000", -- | ## | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 181 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011110110", -- | #### ## | 11 - "011000000", -- | ## | 12 - "011000000", -- | ## | 13 - "110000000", -- |## | 14 - "000000000", -- | | 15 - -- ASCII 182 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000111110", -- | ##### | 03 - "001111100", -- | ##### | 04 - "011111100", -- | ###### | 05 - "011111100", -- | ###### | 06 - "011111100", -- | ###### | 07 - "001111100", -- | ##### | 08 - "000111100", -- | #### | 09 - "000001100", -- | ## | 10 - "000001100", -- | ## | 11 - "000001100", -- | ## | 12 - "000001100", -- | ## | 13 - "000001100", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 183 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000111000", -- | ### | 06 - "000111000", -- | ### | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 184 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "000000000", -- | | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000110000", -- | ## | 12 - "000011000", -- | ## | 13 - "001110000", -- | ### | 14 - "000000000", -- | | 15 - -- ASCII 185 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001110000", -- | ### | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000000000", -- | | 08 - "000000000", -- | | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 186 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "001111000", -- | #### | 07 - "000000000", -- | | 08 - "011111100", -- | ###### | 09 - "000000000", -- | | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 187 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000000000", -- | | 06 - "110011000", -- |## ## | 07 - "011001100", -- | ## ## | 08 - "001100110", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "110011000", -- |## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 188 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011000000", -- | ## | 02 - "111000000", -- |### | 03 - "011000110", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011011000", -- | ## ## | 06 - "000110000", -- | ## | 07 - "001101110", -- | ## ### | 08 - "011011110", -- | ## #### | 09 - "110110110", -- |## ## ## | 10 - "000111110", -- | ##### | 11 - "000000110", -- | ## | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 189 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011000000", -- | ## | 02 - "111000000", -- |### | 03 - "011000110", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011011000", -- | ## ## | 06 - "000110000", -- | ## | 07 - "001111100", -- | ##### | 08 - "011000110", -- | ## ## | 09 - "110001100", -- |## ## | 10 - "000011000", -- | ## | 11 - "000011110", -- | #### | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 190 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "111000000", -- |### | 02 - "001100000", -- | ## | 03 - "011000110", -- | ## ## | 04 - "001101100", -- | ## ## | 05 - "111011000", -- |### ## | 06 - "000110000", -- | ## | 07 - "001101110", -- | ## ### | 08 - "011011110", -- | ## #### | 09 - "110110110", -- |## ## ## | 10 - "000111110", -- | ##### | 11 - "000000110", -- | ## | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 191 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "000000000", -- | | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000000000", -- | | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001100000", -- | ## | 11 - "011001100", -- | ## ## | 12 - "011001100", -- | ## ## | 13 - "001111000", -- | #### | 14 - "000000000", -- | | 15 - -- ASCII 192 --------------- - "001100000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 193 --------------- - "000011000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 194 --------------- - "001111000", -- | #### | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 195 --------------- - "001110110", -- | ### ## | 00 - "011011100", -- | ## ### | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 196 --------------- - "011001100", -- | ## ## | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 197 --------------- - "001111000", -- | #### | 00 - "011001100", -- | ## ## | 01 - "001111000", -- | #### | 02 - "000110000", -- | ## | 03 - "001111000", -- | #### | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 198 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000011110", -- | #### | 03 - "000111000", -- | ### | 04 - "001111000", -- | #### | 05 - "011011000", -- | ## ## | 06 - "011011110", -- | ## #### | 07 - "011111000", -- | ##### | 08 - "011011000", -- | ## ## | 09 - "011011000", -- | ## ## | 10 - "011011110", -- | ## #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 199 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011000000", -- | ## | 06 - "011000000", -- | ## | 07 - "011000000", -- | ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000110000", -- | ## | 12 - "000011000", -- | ## | 13 - "001110000", -- | ### | 14 - "000000000", -- | | 15 - -- ASCII 200 --------------- - "001100000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 201 --------------- - "000011000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 202 --------------- - "001111000", -- | #### | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 203 --------------- - "011001100", -- | ## ## | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "011111100", -- | ###### | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011000000", -- | ## | 06 - "011111000", -- | ##### | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 204 --------------- - "001100000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 205 --------------- - "000011000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 206 --------------- - "001111000", -- | #### | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 207 --------------- - "011001100", -- | ## ## | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 208 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011110000", -- | #### | 03 - "011011000", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "111101100", -- |#### ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011011000", -- | ## ## | 10 - "011110000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 209 --------------- - "001110110", -- | ### ## | 00 - "011011100", -- | ## ### | 01 - "000000000", -- | | 02 - "011000110", -- | ## ## | 03 - "011000110", -- | ## ## | 04 - "011100110", -- | ### ## | 05 - "011110110", -- | #### ## | 06 - "011011110", -- | ## #### | 07 - "011001110", -- | ## ### | 08 - "011000110", -- | ## ## | 09 - "011000110", -- | ## ## | 10 - "011000110", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 210 --------------- - "001100000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 211 --------------- - "000011000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 212 --------------- - "001111000", -- | #### | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 213 --------------- - "001110110", -- | ### ## | 00 - "011011100", -- | ## ### | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 214 --------------- - "011001100", -- | ## ## | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "001111000", -- | #### | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 215 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "010000100", -- | # # | 04 - "011001100", -- | ## ## | 05 - "001111000", -- | #### | 06 - "000110000", -- | ## | 07 - "001111000", -- | #### | 08 - "011001100", -- | ## ## | 09 - "010000100", -- | # # | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 216 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001111100", -- | ##### | 03 - "011001100", -- | ## ## | 04 - "011011100", -- | ## ### | 05 - "011011100", -- | ## ### | 06 - "011111100", -- | ###### | 07 - "011101100", -- | ### ## | 08 - "011101100", -- | ### ## | 09 - "011001100", -- | ## ## | 10 - "011111000", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 217 --------------- - "001100000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 218 --------------- - "000011000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 219 --------------- - "001111000", -- | #### | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 220 --------------- - "011001100", -- | ## ## | 00 - "011001100", -- | ## ## | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 221 --------------- - "000011000", -- | ## | 00 - "000110000", -- | ## | 01 - "000000000", -- | | 02 - "011001100", -- | ## ## | 03 - "011001100", -- | ## ## | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "001111000", -- | #### | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "000110000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 222 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "011111000", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011111000", -- | ##### | 09 - "011000000", -- | ## | 10 - "011000000", -- | ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 223 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001110000", -- | ### | 03 - "011011000", -- | ## ## | 04 - "011011000", -- | ## ## | 05 - "011011000", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011011000", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 224 --------------- - "000000000", -- | | 00 - "011100000", -- | ### | 01 - "001100000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 225 --------------- - "000000000", -- | | 00 - "000011100", -- | ### | 01 - "000011000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 226 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 227 --------------- - "000000000", -- | | 00 - "011100010", -- | ### # | 01 - "110110110", -- |## ## ## | 02 - "100011100", -- |# ### | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 228 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 229 --------------- - "000000000", -- | | 00 - "001111000", -- | #### | 01 - "011001100", -- | ## ## | 02 - "001111000", -- | #### | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "000001100", -- | ## | 06 - "000001100", -- | ## | 07 - "001111100", -- | ##### | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 230 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "011011100", -- | ## ### | 05 - "000110110", -- | ## ## | 06 - "000110110", -- | ## ## | 07 - "011111110", -- | ####### | 08 - "110110000", -- |## ## | 09 - "110110000", -- |## ## | 10 - "011101110", -- | ### ### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 231 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011000000", -- | ## | 07 - "011000000", -- | ## | 08 - "011000000", -- | ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000110000", -- | ## | 12 - "000011000", -- | ## | 13 - "001110000", -- | ### | 14 - "000000000", -- | | 15 - -- ASCII 232 --------------- - "000000000", -- | | 00 - "011100000", -- | ### | 01 - "001100000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 233 --------------- - "000000000", -- | | 00 - "000011100", -- | ### | 01 - "000011000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 234 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 235 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011111100", -- | ###### | 08 - "011000000", -- | ## | 09 - "011000000", -- | ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 236 --------------- - "000000000", -- | | 00 - "011100000", -- | ### | 01 - "001100000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "011110000", -- | #### | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 237 --------------- - "000000000", -- | | 00 - "000011100", -- | ### | 01 - "000011000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "011110000", -- | #### | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 238 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "011110000", -- | #### | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 239 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "011110000", -- | #### | 05 - "000110000", -- | ## | 06 - "000110000", -- | ## | 07 - "000110000", -- | ## | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "011111100", -- | ###### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 240 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "001101100", -- | ## ## | 03 - "000110000", -- | ## | 04 - "011011000", -- | ## ## | 05 - "000111100", -- | #### | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 241 --------------- - "000000000", -- | | 00 - "011100010", -- | ### # | 01 - "110110110", -- |## ## ## | 02 - "100011100", -- |# ### | 03 - "000000000", -- | | 04 - "011111000", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011001100", -- | ## ## | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 242 --------------- - "000000000", -- | | 00 - "011100000", -- | ### | 01 - "001100000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 243 --------------- - "000000000", -- | | 00 - "000011100", -- | ### | 01 - "000011000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 244 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 245 --------------- - "000000000", -- | | 00 - "011100010", -- | ### # | 01 - "110110110", -- |## ## ## | 02 - "100011100", -- |# ### | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 246 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "001111000", -- | #### | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 247 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000110000", -- | ## | 04 - "000110000", -- | ## | 05 - "000000000", -- | | 06 - "011111100", -- | ###### | 07 - "000000000", -- | | 08 - "000110000", -- | ## | 09 - "000110000", -- | ## | 10 - "000000000", -- | | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 248 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "000000000", -- | | 03 - "000000000", -- | | 04 - "001111100", -- | ##### | 05 - "011001100", -- | ## ## | 06 - "011011100", -- | ## ### | 07 - "011111100", -- | ###### | 08 - "011101100", -- | ### ## | 09 - "011001100", -- | ## ## | 10 - "011111000", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 249 --------------- - "000000000", -- | | 00 - "011100000", -- | ### | 01 - "001100000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 250 --------------- - "000000000", -- | | 00 - "000011100", -- | ### | 01 - "000011000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 251 --------------- - "000000000", -- | | 00 - "000110000", -- | ## | 01 - "001111000", -- | #### | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 252 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111100", -- | ##### | 11 - "000000000", -- | | 12 - "000000000", -- | | 13 - "000000000", -- | | 14 - "000000000", -- | | 15 - -- ASCII 253 --------------- - "000000000", -- | | 00 - "000011100", -- | ### | 01 - "000011000", -- | ## | 02 - "000110000", -- | ## | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000011000", -- | ## | 12 - "000110000", -- | ## | 13 - "111100000", -- |#### | 14 - "000000000", -- | | 15 - -- ASCII 254 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "000000000", -- | | 02 - "011000000", -- | ## | 03 - "011000000", -- | ## | 04 - "011000000", -- | ## | 05 - "011111000", -- | ##### | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "011111000", -- | ##### | 11 - "011000000", -- | ## | 12 - "011000000", -- | ## | 13 - "011000000", -- | ## | 14 - "000000000", -- | | 15 - -- ASCII 255 --------------- - "000000000", -- | | 00 - "000000000", -- | | 01 - "011001100", -- | ## ## | 02 - "011001100", -- | ## ## | 03 - "000000000", -- | | 04 - "011001100", -- | ## ## | 05 - "011001100", -- | ## ## | 06 - "011001100", -- | ## ## | 07 - "011001100", -- | ## ## | 08 - "011001100", -- | ## ## | 09 - "011001100", -- | ## ## | 10 - "001111000", -- | #### | 11 - "000011000", -- | ## | 12 - "000110000", -- | ## | 13 - "111100000", -- |#### | 14 - "000000000", -- | | 15 - -- Padding --------------- - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000", -- Padded - "000000000" -- Padded - ); -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; - -end RTL; - diff --git a/lib/VGA_ctrl/src/fonts/char_rom_system_16x16.vhd b/lib/VGA_ctrl/src/fonts/char_rom_system_16x16.vhd deleted file mode 100644 index d50d36f..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_system_16x16.vhd +++ /dev/null @@ -1,4382 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port - ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(15 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(15 downto 0); - constant ROM : ROM_ARRAY := - ( - -- ASCII 032 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 033 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0000000000000000", -- | | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 034 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100110000000000", -- |## ## | 03 - "1100110000000000", -- |## ## | 04 - "1100110000000000", -- |## ## | 05 - "1100110000000000", -- |## ## | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 035 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011011000000000", -- | ## ## | 03 - "0011011000000000", -- | ## ## | 04 - "0111111100000000", -- | ####### | 05 - "0011011000000000", -- | ## ## | 06 - "0011011000000000", -- | ## ## | 07 - "0110110000000000", -- | ## ## | 08 - "0110110000000000", -- | ## ## | 09 - "1111111000000000", -- |####### | 10 - "0110110000000000", -- | ## ## | 11 - "0110110000000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 036 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0011110000000000", -- | #### | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110000000000000", -- | ## | 07 - "0011110000000000", -- | #### | 08 - "0000011000000000", -- | ## | 09 - "0000011000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0001100000000000", -- | ## | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 037 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111000001100000", -- | ### ## | 03 - "1101100011000000", -- |## ## ## | 04 - "1101100110000000", -- |## ## ## | 05 - "1101101100000000", -- |## ## ## | 06 - "0111011000000000", -- | ### ## | 07 - "0000110111000000", -- | ## ### | 08 - "0001101101100000", -- | ## ## ## | 09 - "0011001101100000", -- | ## ## ## | 10 - "0110001101100000", -- | ## ## ## | 11 - "1100000111000000", -- |## ### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 038 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "1111000000000000", -- |#### | 14 - "0000000000000000", -- | | 15 - -- ASCII 039 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 040 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0011000000000000", -- | ## | 15 - -- ASCII 041 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100000000000000", -- |## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "1100000000000000", -- |## | 15 - -- ASCII 042 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000000000000", -- | ## | 03 - "1111110000000000", -- |###### | 04 - "0011000000000000", -- | ## | 05 - "0111100000000000", -- | #### | 06 - "0100100000000000", -- | # # | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 043 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0001100000000000", -- | ## | 05 - "0001100000000000", -- | ## | 06 - "0001100000000000", -- | ## | 07 - "0111111000000000", -- | ###### | 08 - "0001100000000000", -- | ## | 09 - "0001100000000000", -- | ## | 10 - "0001100000000000", -- | ## | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 044 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "1100000000000000", -- |## | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 045 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "1111000000000000", -- |#### | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 046 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 047 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0011000000000000", -- | ## | 05 - "0011000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "1100000000000000", -- |## | 11 - "1100000000000000", -- |## | 12 - "1100000000000000", -- |## | 13 - "1100000000000000", -- |## | 14 - "0000000000000000", -- | | 15 - -- ASCII 048 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 049 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0111100000000000", -- | #### | 04 - "0001100000000000", -- | ## | 05 - "0001100000000000", -- | ## | 06 - "0001100000000000", -- | ## | 07 - "0001100000000000", -- | ## | 08 - "0001100000000000", -- | ## | 09 - "0001100000000000", -- | ## | 10 - "0001100000000000", -- | ## | 11 - "0001100000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 050 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0000011000000000", -- | ## | 06 - "0000110000000000", -- | ## | 07 - "0001100000000000", -- | ## | 08 - "0011000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111000000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 051 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0000011000000000", -- | ## | 05 - "0000011000000000", -- | ## | 06 - "0001110000000000", -- | ### | 07 - "0000011000000000", -- | ## | 08 - "0000011000000000", -- | ## | 09 - "0000011000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 052 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000011000000000", -- | ## | 03 - "0000111000000000", -- | ### | 04 - "0001111000000000", -- | #### | 05 - "0001111000000000", -- | #### | 06 - "0011011000000000", -- | ## ## | 07 - "0011011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "0000011000000000", -- | ## | 11 - "0000011000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 053 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111000000000", -- | ###### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111110000000000", -- | ##### | 07 - "0110011000000000", -- | ## ## | 08 - "0000011000000000", -- | ## | 09 - "0000011000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 054 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111110000000000", -- | ##### | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 055 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111000000000", -- | ###### | 03 - "0000011000000000", -- | ## | 04 - "0000110000000000", -- | ## | 05 - "0000110000000000", -- | ## | 06 - "0001100000000000", -- | ## | 07 - "0001100000000000", -- | ## | 08 - "0001100000000000", -- | ## | 09 - "0011000000000000", -- | ## | 10 - "0011000000000000", -- | ## | 11 - "0011000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 056 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0011110000000000", -- | #### | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 057 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0011111000000000", -- | ##### | 08 - "0000011000000000", -- | ## | 09 - "0000011000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 058 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 059 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "1100000000000000", -- |## | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 060 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000011000000000", -- | ## | 04 - "0000110000000000", -- | ## | 05 - "0001100000000000", -- | ## | 06 - "0011000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0011000000000000", -- | ## | 09 - "0001100000000000", -- | ## | 10 - "0000110000000000", -- | ## | 11 - "0000011000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 061 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0111111000000000", -- | ###### | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0111111000000000", -- | ###### | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 062 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0011000000000000", -- | ## | 05 - "0001100000000000", -- | ## | 06 - "0000110000000000", -- | ## | 07 - "0000011000000000", -- | ## | 08 - "0000110000000000", -- | ## | 09 - "0001100000000000", -- | ## | 10 - "0011000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 063 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0000011000000000", -- | ## | 06 - "0000110000000000", -- | ## | 07 - "0001100000000000", -- | ## | 08 - "0001100000000000", -- | ## | 09 - "0000000000000000", -- | | 10 - "0001100000000000", -- | ## | 11 - "0001100000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 064 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000011110000000", -- | #### | 02 - "0001110011100000", -- | ### ### | 03 - "0011000000110000", -- | ## ## | 04 - "0011001110110000", -- | ## ### ## | 05 - "0110011011011000", -- | ## ## ## ## | 06 - "0110011011011000", -- | ## ## ## ## | 07 - "0110110011011000", -- | ## ## ## ## | 08 - "0110110110011000", -- | ## ## ## ## | 09 - "0110110110011000", -- | ## ## ## ## | 10 - "0011011011110000", -- | ## ## #### | 11 - "0011000000000000", -- | ## | 12 - "0001110001110000", -- | ### ### | 13 - "0000011111000000", -- | ##### | 14 - "0000000000000000", -- | | 15 - -- ASCII 065 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0011110000000000", -- | #### | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 066 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111100000000", -- | ####### | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0111111100000000", -- | ####### | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0110000110000000", -- | ## ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 067 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000100000000", -- | ## # | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000100000000", -- | ## # | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 068 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111000000000", -- | ###### | 03 - "0110001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0110001100000000", -- | ## ## | 11 - "0111111000000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 069 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111100000000", -- | ####### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111111000000000", -- | ###### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 070 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111100000000", -- | ####### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111111000000000", -- | ###### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 071 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111100000000", -- | ##### | 03 - "0011000110000000", -- | ## ## | 04 - "0110000010000000", -- | ## # | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110011110000000", -- | ## #### | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011000110000000", -- | ## ## | 11 - "0001111010000000", -- | #### # | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 072 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000110000000", -- | ## ## | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0111111110000000", -- | ######## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0110000110000000", -- | ## ## | 11 - "0110000110000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 073 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 074 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000110000000000", -- | ## | 03 - "0000110000000000", -- | ## | 04 - "0000110000000000", -- | ## | 05 - "0000110000000000", -- | ## | 06 - "0000110000000000", -- | ## | 07 - "0000110000000000", -- | ## | 08 - "0000110000000000", -- | ## | 09 - "1100110000000000", -- |## ## | 10 - "1100110000000000", -- |## ## | 11 - "0111100000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 075 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110001100000000", -- | ## ## | 03 - "0110011000000000", -- | ## ## | 04 - "0110110000000000", -- | ## ## | 05 - "0111100000000000", -- | #### | 06 - "0111000000000000", -- | ### | 07 - "0111100000000000", -- | #### | 08 - "0110110000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110001100000000", -- | ## ## | 11 - "0110000110000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 076 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 077 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000001100000", -- | ## ## | 03 - "0110000001100000", -- | ## ## | 04 - "0111000011100000", -- | ### ### | 05 - "0111000011100000", -- | ### ### | 06 - "0111100111100000", -- | #### #### | 07 - "0111100111100000", -- | #### #### | 08 - "0110111101100000", -- | ## #### ## | 09 - "0110111101100000", -- | ## #### ## | 10 - "0110011001100000", -- | ## ## ## | 11 - "0110011001100000", -- | ## ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 078 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000110000000", -- | ## ## | 03 - "0111000110000000", -- | ### ## | 04 - "0111100110000000", -- | #### ## | 05 - "0111100110000000", -- | #### ## | 06 - "0110110110000000", -- | ## ## ## | 07 - "0110110110000000", -- | ## ## ## | 08 - "0110011110000000", -- | ## #### | 09 - "0110011110000000", -- | ## #### | 10 - "0110001110000000", -- | ## ### | 11 - "0110000110000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 079 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 080 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111100000000", -- | ####### | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0111111100000000", -- | ####### | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 081 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110011110000000", -- | ## #### | 10 - "0011001100000000", -- | ## ## | 11 - "0001111110000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 082 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111100000000", -- | ####### | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0111111100000000", -- | ####### | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0110000110000000", -- | ## ## | 11 - "0110000011000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 083 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011111000000000", -- | ##### | 03 - "0110001100000000", -- | ## ## | 04 - "0110001100000000", -- | ## ## | 05 - "0110000000000000", -- | ## | 06 - "0011100000000000", -- | ### | 07 - "0000111000000000", -- | ### | 08 - "0000001100000000", -- | ## | 09 - "0110001100000000", -- | ## ## | 10 - "0110001100000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 084 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1111111100000000", -- |######## | 03 - "0001100000000000", -- | ## | 04 - "0001100000000000", -- | ## | 05 - "0001100000000000", -- | ## | 06 - "0001100000000000", -- | ## | 07 - "0001100000000000", -- | ## | 08 - "0001100000000000", -- | ## | 09 - "0001100000000000", -- | ## | 10 - "0001100000000000", -- | ## | 11 - "0001100000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 085 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000110000000", -- | ## ## | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 086 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100001100000000", -- |## ## | 03 - "1100001100000000", -- |## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0010010000000000", -- | # # | 08 - "0011110000000000", -- | #### | 09 - "0011110000000000", -- | #### | 10 - "0001100000000000", -- | ## | 11 - "0001100000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 087 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100001100001100", -- |## ## ## | 03 - "1100001100001100", -- |## ## ## | 04 - "1100001100001100", -- |## ## ## | 05 - "0110011110011000", -- | ## #### ## | 06 - "0110011110011000", -- | ## #### ## | 07 - "0011010010110000", -- | ## # # ## | 08 - "0011110011110000", -- | #### #### | 09 - "0001100001100000", -- | ## ## | 10 - "0001100001100000", -- | ## ## | 11 - "0001100001100000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 088 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100000110000000", -- |## ## | 03 - "1100000110000000", -- |## ## | 04 - "0110001100000000", -- | ## ## | 05 - "0011011000000000", -- | ## ## | 06 - "0001110000000000", -- | ### | 07 - "0001110000000000", -- | ### | 08 - "0011011000000000", -- | ## ## | 09 - "0110001100000000", -- | ## ## | 10 - "1100000110000000", -- |## ## | 11 - "1100000110000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 089 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100000011000000", -- |## ## | 03 - "1100000011000000", -- |## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0011001100000000", -- | ## ## | 06 - "0001111000000000", -- | #### | 07 - "0000110000000000", -- | ## | 08 - "0000110000000000", -- | ## | 09 - "0000110000000000", -- | ## | 10 - "0000110000000000", -- | ## | 11 - "0000110000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 090 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1111111110000000", -- |######### | 03 - "0000000110000000", -- | ## | 04 - "0000001100000000", -- | ## | 05 - "0000011000000000", -- | ## | 06 - "0000110000000000", -- | ## | 07 - "0001100000000000", -- | ## | 08 - "0011000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "1100000000000000", -- |## | 11 - "1111111110000000", -- |######### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 091 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111000000000000", -- | ### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0111000000000000", -- | ### | 15 - -- ASCII 092 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100000000000000", -- |## | 03 - "1100000000000000", -- |## | 04 - "1100000000000000", -- |## | 05 - "1100000000000000", -- |## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0011000000000000", -- | ## | 11 - "0011000000000000", -- | ## | 12 - "0011000000000000", -- | ## | 13 - "0011000000000000", -- | ## | 14 - "0000000000000000", -- | | 15 - -- ASCII 093 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1110000000000000", -- |### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "1110000000000000", -- |### | 15 - -- ASCII 094 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0010000000000000", -- | # | 03 - "0111000000000000", -- | ### | 04 - "1101100000000000", -- |## ## | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 095 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "1111111100000000", -- |######## | 15 - -- ASCII 096 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0111000000000000", -- | ### | 02 - "0011000000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 097 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 098 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0111110000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0111110000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 099 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 100 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000011000000000", -- | ## | 03 - "0000011000000000", -- | ## | 04 - "0000011000000000", -- | ## | 05 - "0011111000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 101 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0111111000000000", -- | ###### | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 102 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "1111000000000000", -- |#### | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 103 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011111000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000011000000000", -- | ## | 13 - "0110011000000000", -- | ## ## | 14 - "0011110000000000", -- | #### | 15 - -- ASCII 104 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0111110000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0110011000000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 105 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 106 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "1100000000000000", -- |## | 15 - -- ASCII 107 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110110000000000", -- | ## ## | 07 - "0111100000000000", -- | #### | 08 - "0111000000000000", -- | ### | 09 - "0111100000000000", -- | #### | 10 - "0110110000000000", -- | ## ## | 11 - "0110011000000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 108 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 109 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0111111111000000", -- | ######### | 06 - "0110011001100000", -- | ## ## ## | 07 - "0110011001100000", -- | ## ## ## | 08 - "0110011001100000", -- | ## ## ## | 09 - "0110011001100000", -- | ## ## ## | 10 - "0110011001100000", -- | ## ## ## | 11 - "0110011001100000", -- | ## ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 110 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0111110000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0110011000000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 111 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 112 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0111110000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0111110000000000", -- | ##### | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 113 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011111000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000011000000000", -- | ## | 13 - "0000011000000000", -- | ## | 14 - "0000011000000000", -- | ## | 15 - -- ASCII 114 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0111100000000000", -- | #### | 06 - "0111000000000000", -- | ### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 115 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110000000000000", -- | ## | 08 - "0011110000000000", -- | #### | 09 - "0000011000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 116 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "1111000000000000", -- |#### | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0011000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 117 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 118 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "1100001100000000", -- |## ## | 06 - "1100001100000000", -- |## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0011110000000000", -- | #### | 10 - "0001100000000000", -- | ## | 11 - "0001100000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 119 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "1100000011000000", -- |## ## | 06 - "1100110011000000", -- |## ## ## | 07 - "0110110110000000", -- | ## ## ## | 08 - "0110110110000000", -- | ## ## ## | 09 - "0111111110000000", -- | ######## | 10 - "0011001100000000", -- | ## ## | 11 - "0011001100000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 120 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "1100001100000000", -- |## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0011110000000000", -- | #### | 08 - "0001100000000000", -- | ## | 09 - "0011110000000000", -- | #### | 10 - "0110011000000000", -- | ## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 121 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "1100001100000000", -- |## ## | 06 - "1100001100000000", -- |## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0011110000000000", -- | #### | 10 - "0011110000000000", -- | #### | 11 - "0001100000000000", -- | ## | 12 - "0001100000000000", -- | ## | 13 - "0011000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 122 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0111111000000000", -- | ###### | 06 - "0000011000000000", -- | ## | 07 - "0000110000000000", -- | ## | 08 - "0001100000000000", -- | ## | 09 - "0011000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111000000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 123 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0011000000000000", -- | ## | 05 - "0011000000000000", -- | ## | 06 - "0011000000000000", -- | ## | 07 - "0011000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0011000000000000", -- | ## | 10 - "0011000000000000", -- | ## | 11 - "0011000000000000", -- | ## | 12 - "0011000000000000", -- | ## | 13 - "0011000000000000", -- | ## | 14 - "0001100000000000", -- | ## | 15 - -- ASCII 124 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 125 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100000000000000", -- |## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0011000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "1100000000000000", -- |## | 15 - -- ASCII 126 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1110100000000000", -- |### # | 03 - "1011100000000000", -- |# ### | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 127 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 128 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 129 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 130 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 131 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 132 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 133 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 134 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 135 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 136 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 137 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 138 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 139 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 140 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 141 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 142 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 143 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 144 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 145 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0011000000000000", -- | ## | 02 - "0110000000000000", -- | ## | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 146 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0110000000000000", -- | ## | 02 - "1100000000000000", -- |## | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 147 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 148 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 149 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 150 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 151 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 152 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 153 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 154 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 155 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 156 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 157 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 158 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 159 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 160 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 161 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 162 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000110000000000", -- | ## | 05 - "0011110000000000", -- | #### | 06 - "0110111000000000", -- | ## ### | 07 - "0110100000000000", -- | ## # | 08 - "0110100000000000", -- | ## # | 09 - "0111000000000000", -- | ### | 10 - "0111011000000000", -- | ### ## | 11 - "0011110000000000", -- | #### | 12 - "0011000000000000", -- | ## | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 163 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011100000000000", -- | ### | 03 - "0110110000000000", -- | ## ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0011000000000000", -- | ## | 07 - "0111100000000000", -- | #### | 08 - "0011000000000000", -- | ## | 09 - "0011000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0111110000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 164 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110011000000000", -- | ## ## | 03 - "0011110000000000", -- | #### | 04 - "0010010000000000", -- | # # | 05 - "0010010000000000", -- | # # | 06 - "0011110000000000", -- | #### | 07 - "0110011000000000", -- | ## ## | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 165 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1100001100000000", -- |## ## | 03 - "1100001100000000", -- |## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "1111111100000000", -- |######## | 07 - "0001100000000000", -- | ## | 08 - "1111111100000000", -- |######## | 09 - "0001100000000000", -- | ## | 10 - "0001100000000000", -- | ## | 11 - "0001100000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 166 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0000000000000000", -- | | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 167 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0011100000000000", -- | ### | 05 - "0011100000000000", -- | ### | 06 - "0110110000000000", -- | ## ## | 07 - "0011011000000000", -- | ## ## | 08 - "0001110000000000", -- | ### | 09 - "0001110000000000", -- | ### | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 168 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1101100000000000", -- |## ## | 03 - "1101100000000000", -- |## ## | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 169 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011111100000000", -- | ###### | 03 - "0110000110000000", -- | ## ## | 04 - "1100110011000000", -- |## ## ## | 05 - "1101001011000000", -- |## # # ## | 06 - "1101000011000000", -- |## # ## | 07 - "1101000011000000", -- |## # ## | 08 - "1101001011000000", -- |## # # ## | 09 - "1100110011000000", -- |## ## ## | 10 - "0110000110000000", -- | ## ## | 11 - "0011111100000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 170 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0010000000000000", -- | # | 03 - "0001000000000000", -- | # | 04 - "0011000000000000", -- | ## | 05 - "0101000000000000", -- | # # | 06 - "0011000000000000", -- | ## | 07 - "0000000000000000", -- | | 08 - "0111000000000000", -- | ### | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 171 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0011011000000000", -- | ## ## | 07 - "0110110000000000", -- | ## ## | 08 - "1101100000000000", -- |## ## | 09 - "0110110000000000", -- | ## ## | 10 - "0011011000000000", -- | ## ## | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 172 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0111111000000000", -- | ###### | 07 - "0000011000000000", -- | ## | 08 - "0000011000000000", -- | ## | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 173 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "1111000000000000", -- |#### | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 174 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011111100000000", -- | ###### | 03 - "0110000110000000", -- | ## ## | 04 - "1101110011000000", -- |## ### ## | 05 - "1101001011000000", -- |## # # ## | 06 - "1101001011000000", -- |## # # ## | 07 - "1101110011000000", -- |## ### ## | 08 - "1101010011000000", -- |## # # ## | 09 - "1101001011000000", -- |## # # ## | 10 - "0110000110000000", -- | ## ## | 11 - "0011111100000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 175 --------------- - "0000000000000000", -- | | 00 - "1111111100000000", -- |######## | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 176 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111000000000000", -- | ### | 03 - "0101000000000000", -- | # # | 04 - "0101000000000000", -- | # # | 05 - "0111000000000000", -- | ### | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 177 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0001100000000000", -- | ## | 06 - "0001100000000000", -- | ## | 07 - "0111111000000000", -- | ###### | 08 - "0001100000000000", -- | ## | 09 - "0001100000000000", -- | ## | 10 - "0000000000000000", -- | | 11 - "0111111000000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 178 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "1011000000000000", -- |# ## | 04 - "0011000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "1111000000000000", -- |#### | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 179 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "1011000000000000", -- |# ## | 04 - "0110000000000000", -- | ## | 05 - "1011000000000000", -- |# ## | 06 - "0110000000000000", -- | ## | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 180 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0011100000000000", -- | ### | 02 - "0011000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 181 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0111111100000000", -- | ####### | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 182 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0111110000000000", -- | ##### | 04 - "0111110000000000", -- | ##### | 05 - "0111110000000000", -- | ##### | 06 - "0111110000000000", -- | ##### | 07 - "0011110000000000", -- | #### | 08 - "0000110000000000", -- | ## | 09 - "0000110000000000", -- | ## | 10 - "0000110000000000", -- | ## | 11 - "0000110000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 183 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 184 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0011000000000000", -- | ## | 13 - "0001100000000000", -- | ## | 14 - "0111000000000000", -- | ### | 15 - -- ASCII 185 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "1110000000000000", -- |### | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 186 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111000000000000", -- | ### | 03 - "0101000000000000", -- | # # | 04 - "0101000000000000", -- | # # | 05 - "0101000000000000", -- | # # | 06 - "0111000000000000", -- | ### | 07 - "0000000000000000", -- | | 08 - "0111000000000000", -- | ### | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 187 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "1101100000000000", -- |## ## | 07 - "0110110000000000", -- | ## ## | 08 - "0011011000000000", -- | ## ## | 09 - "0110110000000000", -- | ## ## | 10 - "1101100000000000", -- |## ## | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 188 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000001100000", -- | ## ## | 03 - "0111000011000000", -- | ### ## | 04 - "0011000110000000", -- | ## ## | 05 - "0011001100000000", -- | ## ## | 06 - "0011011000000000", -- | ## ## | 07 - "0000110011000000", -- | ## ## | 08 - "0001100111000000", -- | ## ### | 09 - "0011001101000000", -- | ## ## # | 10 - "0110001111000000", -- | ## #### | 11 - "1100000011000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 189 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000001100000", -- | ## ## | 03 - "0111000011000000", -- | ### ## | 04 - "0011000110000000", -- | ## ## | 05 - "0011001100000000", -- | ## ## | 06 - "0011011000000000", -- | ## ## | 07 - "0000110110000000", -- | ## ## | 08 - "0001101011000000", -- | ## # ## | 09 - "0011000011000000", -- | ## ## | 10 - "0110000110000000", -- | ## ## | 11 - "1100001111000000", -- |## #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 190 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011000001100000", -- | ## ## | 03 - "0101100011000000", -- | # ## ## | 04 - "0011000110000000", -- | ## ## | 05 - "0101101100000000", -- | # ## ## | 06 - "0011011000000000", -- | ## ## | 07 - "0000110011000000", -- | ## ## | 08 - "0001100111000000", -- | ## ### | 09 - "0011001101000000", -- | ## ## # | 10 - "0110001111000000", -- | ## #### | 11 - "1100000011000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 191 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0001100000000000", -- | ## | 06 - "0001100000000000", -- | ## | 07 - "0011000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 192 --------------- - "0011100000000000", -- | ### | 00 - "0001100000000000", -- | ## | 01 - "0000110000000000", -- | ## | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0011110000000000", -- | #### | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 193 --------------- - "0001110000000000", -- | ### | 00 - "0001100000000000", -- | ## | 01 - "0011000000000000", -- | ## | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0011110000000000", -- | #### | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 194 --------------- - "0001100000000000", -- | ## | 00 - "0011110000000000", -- | #### | 01 - "0110011000000000", -- | ## ## | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0011110000000000", -- | #### | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 195 --------------- - "0111101000000000", -- | #### # | 00 - "0101111000000000", -- | # #### | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0011110000000000", -- | #### | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 196 --------------- - "0110011000000000", -- | ## ## | 00 - "0110011000000000", -- | ## ## | 01 - "0000000000000000", -- | | 02 - "0001100000000000", -- | ## | 03 - "0001100000000000", -- | ## | 04 - "0011110000000000", -- | #### | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 197 --------------- - "0001100000000000", -- | ## | 00 - "0011110000000000", -- | #### | 01 - "0001100000000000", -- | ## | 02 - "0000000000000000", -- | | 03 - "0001100000000000", -- | ## | 04 - "0001100000000000", -- | ## | 05 - "0011110000000000", -- | #### | 06 - "0010010000000000", -- | # # | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100001100000000", -- |## ## | 11 - "1100001100000000", -- |## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 198 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111111110000", -- | ######### | 03 - "0001111000000000", -- | #### | 04 - "0011011000000000", -- | ## ## | 05 - "0011011000000000", -- | ## ## | 06 - "0011011111100000", -- | ## ###### | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "1100011000000000", -- |## ## | 11 - "1100011111110000", -- |## ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 199 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000100000000", -- | ## # | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000100000000", -- | ## # | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000110000000000", -- | ## | 13 - "0000011000000000", -- | ## | 14 - "0001110000000000", -- | ### | 15 - -- ASCII 200 --------------- - "0001110000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0000011000000000", -- | ## | 02 - "0111111100000000", -- | ####### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111111000000000", -- | ###### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 201 --------------- - "0000111000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0001100000000000", -- | ## | 02 - "0111111100000000", -- | ####### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111111000000000", -- | ###### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 202 --------------- - "0000110000000000", -- | ## | 00 - "0001111000000000", -- | #### | 01 - "0011001100000000", -- | ## ## | 02 - "0111111100000000", -- | ####### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111111000000000", -- | ###### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 203 --------------- - "0011001100000000", -- | ## ## | 00 - "0011001100000000", -- | ## ## | 01 - "0000000000000000", -- | | 02 - "0111111100000000", -- | ####### | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0111111000000000", -- | ###### | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0111111100000000", -- | ####### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 204 --------------- - "1100000000000000", -- |## | 00 - "0110000000000000", -- | ## | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 205 --------------- - "0011000000000000", -- | ## | 00 - "0110000000000000", -- | ## | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 206 --------------- - "0110000000000000", -- | ## | 00 - "1001000000000000", -- |# # | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 207 --------------- - "1001000000000000", -- |# # | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 208 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111111000000000", -- | ###### | 03 - "0110001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "1111100110000000", -- |##### ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0110001100000000", -- | ## ## | 11 - "0111111000000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 209 --------------- - "0011110100000000", -- | #### # | 00 - "0010111100000000", -- | # #### | 01 - "0000000000000000", -- | | 02 - "0110000110000000", -- | ## ## | 03 - "0111000110000000", -- | ### ## | 04 - "0111100110000000", -- | #### ## | 05 - "0111100110000000", -- | #### ## | 06 - "0110110110000000", -- | ## ## ## | 07 - "0110110110000000", -- | ## ## ## | 08 - "0110011110000000", -- | ## #### | 09 - "0110011110000000", -- | ## #### | 10 - "0110001110000000", -- | ## ### | 11 - "0110000110000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 210 --------------- - "0001110000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0000011000000000", -- | ## | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 211 --------------- - "0000111000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0001100000000000", -- | ## | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 212 --------------- - "0000110000000000", -- | ## | 00 - "0001111000000000", -- | #### | 01 - "0011001100000000", -- | ## ## | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 213 --------------- - "0011110100000000", -- | #### # | 00 - "0010111100000000", -- | # #### | 01 - "0000000000000000", -- | | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 214 --------------- - "0011001100000000", -- | ## ## | 00 - "0011001100000000", -- | ## ## | 01 - "0000000000000000", -- | | 02 - "0001111000000000", -- | #### | 03 - "0011001100000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 215 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0110011000000000", -- | ## ## | 07 - "0011110000000000", -- | #### | 08 - "0001100000000000", -- | ## | 09 - "0011110000000000", -- | #### | 10 - "0110011000000000", -- | ## ## | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 216 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0001111110000000", -- | ###### | 03 - "0011001100000000", -- | ## ## | 04 - "0110001110000000", -- | ## ### | 05 - "0110011110000000", -- | ## #### | 06 - "0110110110000000", -- | ## ## ## | 07 - "0110110110000000", -- | ## ## ## | 08 - "0111100110000000", -- | #### ## | 09 - "0111000110000000", -- | ### ## | 10 - "0011001100000000", -- | ## ## | 11 - "0111111000000000", -- | ###### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 217 --------------- - "0001110000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0000011000000000", -- | ## | 02 - "0110000110000000", -- | ## ## | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 218 --------------- - "0000111000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0001100000000000", -- | ## | 02 - "0110000110000000", -- | ## ## | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 219 --------------- - "0000110000000000", -- | ## | 00 - "0001111000000000", -- | #### | 01 - "0011001100000000", -- | ## ## | 02 - "0000000000000000", -- | | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 220 --------------- - "0011001100000000", -- | ## ## | 00 - "0011001100000000", -- | ## ## | 01 - "0000000000000000", -- | | 02 - "0110000110000000", -- | ## ## | 03 - "0110000110000000", -- | ## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0110000110000000", -- | ## ## | 06 - "0110000110000000", -- | ## ## | 07 - "0110000110000000", -- | ## ## | 08 - "0110000110000000", -- | ## ## | 09 - "0110000110000000", -- | ## ## | 10 - "0011001100000000", -- | ## ## | 11 - "0001111000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 221 --------------- - "0000111000000000", -- | ### | 00 - "0000110000000000", -- | ## | 01 - "0001100000000000", -- | ## | 02 - "1100000011000000", -- |## ## | 03 - "1100000011000000", -- |## ## | 04 - "0110000110000000", -- | ## ## | 05 - "0011001100000000", -- | ## ## | 06 - "0001111000000000", -- | #### | 07 - "0000110000000000", -- | ## | 08 - "0000110000000000", -- | ## | 09 - "0000110000000000", -- | ## | 10 - "0000110000000000", -- | ## | 11 - "0000110000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 222 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0111111000000000", -- | ###### | 05 - "0110001100000000", -- | ## ## | 06 - "0110001100000000", -- | ## ## | 07 - "0110001100000000", -- | ## ## | 08 - "0110001100000000", -- | ## ## | 09 - "0111111000000000", -- | ###### | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 223 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0110011000000000", -- | ## ## | 05 - "0110011000000000", -- | ## ## | 06 - "0110110000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0110110000000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 224 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0011100000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0000110000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 225 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001110000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 226 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001100000000000", -- | ## | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 227 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111101000000000", -- | #### # | 03 - "0101111000000000", -- | # #### | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 228 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110011000000000", -- | ## ## | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 229 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001100000000000", -- | ## | 02 - "0011110000000000", -- | #### | 03 - "0001100000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0001111000000000", -- | #### | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 230 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011111111000000", -- | ######## | 06 - "0110011001100000", -- | ## ## ## | 07 - "0001111111100000", -- | ######## | 08 - "0011011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011001100000", -- | ## ## ## | 11 - "0011111111000000", -- | ######## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 231 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0001100000000000", -- | ## | 13 - "0000110000000000", -- | ## | 14 - "0011100000000000", -- | ### | 15 - -- ASCII 232 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0011100000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0000110000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0111111000000000", -- | ###### | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 233 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001110000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0111111000000000", -- | ###### | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 234 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001100000000000", -- | ## | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0111111000000000", -- | ###### | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 235 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110011000000000", -- | ## ## | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0111111000000000", -- | ###### | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 236 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "1110000000000000", -- |### | 02 - "0110000000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 237 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0111000000000000", -- | ### | 02 - "0110000000000000", -- | ## | 03 - "1100000000000000", -- |## | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 238 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0110000000000000", -- | ## | 02 - "1111000000000000", -- |#### | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 239 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "1001000000000000", -- |# # | 03 - "1001000000000000", -- |# # | 04 - "0000000000000000", -- | | 05 - "0110000000000000", -- | ## | 06 - "0110000000000000", -- | ## | 07 - "0110000000000000", -- | ## | 08 - "0110000000000000", -- | ## | 09 - "0110000000000000", -- | ## | 10 - "0110000000000000", -- | ## | 11 - "0110000000000000", -- | ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 240 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111011000000000", -- | ### ## | 03 - "0001100000000000", -- | ## | 04 - "0110110000000000", -- | ## ## | 05 - "0000110000000000", -- | ## | 06 - "0011111000000000", -- | ##### | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 241 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111101000000000", -- | #### # | 03 - "0101111000000000", -- | # #### | 04 - "0000000000000000", -- | | 05 - "0111110000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0110011000000000", -- | ## ## | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 242 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0011100000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0000110000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 243 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001110000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 244 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001100000000000", -- | ## | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 245 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0111101000000000", -- | #### # | 03 - "0101111000000000", -- | # #### | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 246 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110011000000000", -- | ## ## | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0011110000000000", -- | #### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011110000000000", -- | #### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 247 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0011000000000000", -- | ## | 05 - "0011000000000000", -- | ## | 06 - "0000000000000000", -- | | 07 - "0111100000000000", -- | #### | 08 - "0000000000000000", -- | | 09 - "0011000000000000", -- | ## | 10 - "0011000000000000", -- | ## | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 248 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0011111000000000", -- | ##### | 06 - "0110111000000000", -- | ## ### | 07 - "0110111000000000", -- | ## ### | 08 - "0110011000000000", -- | ## ## | 09 - "0111011000000000", -- | ### ## | 10 - "0111011000000000", -- | ### ## | 11 - "0111110000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 249 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0011100000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0000110000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 250 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001110000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 251 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001100000000000", -- | ## | 02 - "0011110000000000", -- | #### | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 252 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110011000000000", -- | ## ## | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "0110011000000000", -- | ## ## | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0011111000000000", -- | ##### | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 253 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0001110000000000", -- | ### | 02 - "0001100000000000", -- | ## | 03 - "0011000000000000", -- | ## | 04 - "0000000000000000", -- | | 05 - "1100001100000000", -- |## ## | 06 - "1100001100000000", -- |## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0011110000000000", -- | #### | 10 - "0011110000000000", -- | #### | 11 - "0001100000000000", -- | ## | 12 - "0001100000000000", -- | ## | 13 - "0011000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 254 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110000000000000", -- | ## | 03 - "0110000000000000", -- | ## | 04 - "0110000000000000", -- | ## | 05 - "0111110000000000", -- | ##### | 06 - "0110011000000000", -- | ## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0110011000000000", -- | ## ## | 10 - "0110011000000000", -- | ## ## | 11 - "0111110000000000", -- | ##### | 12 - "0110000000000000", -- | ## | 13 - "0110000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 255 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0110011000000000", -- | ## ## | 03 - "0110011000000000", -- | ## ## | 04 - "0000000000000000", -- | | 05 - "1100001100000000", -- |## ## | 06 - "1100001100000000", -- |## ## | 07 - "0110011000000000", -- | ## ## | 08 - "0110011000000000", -- | ## ## | 09 - "0011110000000000", -- | #### | 10 - "0011110000000000", -- | #### | 11 - "0001100000000000", -- | ## | 12 - "0001100000000000", -- | ## | 13 - "0011000000000000", -- | ## | 14 - "0110000000000000", -- | ## | 15 - -- ASCII 256 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 257 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 258 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 259 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 260 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 261 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 262 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 263 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 264 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 265 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 266 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 267 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 268 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 269 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 270 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 271 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 272 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 273 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 274 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 275 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 276 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 277 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 278 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 279 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 280 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 281 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 282 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 283 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 284 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 285 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 286 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000", -- | | 15 - -- ASCII 287 --------------- - "0000000000000000", -- | | 00 - "0000000000000000", -- | | 01 - "0000000000000000", -- | | 02 - "0000000000000000", -- | | 03 - "0000000000000000", -- | | 04 - "0000000000000000", -- | | 05 - "0000000000000000", -- | | 06 - "0000000000000000", -- | | 07 - "0000000000000000", -- | | 08 - "0000000000000000", -- | | 09 - "0000000000000000", -- | | 10 - "0000000000000000", -- | | 11 - "0000000000000000", -- | | 12 - "0000000000000000", -- | | 13 - "0000000000000000", -- | | 14 - "0000000000000000" -- | | 15 - ); -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; - -end RTL; - diff --git a/lib/VGA_ctrl/src/fonts/char_rom_the_goonies.vhd b/lib/VGA_ctrl/src/fonts/char_rom_the_goonies.vhd deleted file mode 100644 index f5bbcc5..0000000 --- a/lib/VGA_ctrl/src/fonts/char_rom_the_goonies.vhd +++ /dev/null @@ -1,539 +0,0 @@ -library ieee; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -entity char_rom is - port ( - CLK : in std_logic; - ADDR : in unsigned(11 downto 0); - DATA : out unsigned(7 downto 0) - ); -end; - -architecture RTL of char_rom is - - - type ROM_ARRAY is array(0 to 4095) of unsigned(7 downto 0); - constant ROM : ROM_ARRAY := ( - x"00",x"00",x"01",x"03",x"07",x"0F",x"0F",x"0F", -- 0x0000 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0008 - x"00",x"00",x"E0",x"F0",x"F8",x"FC",x"FC",x"FC", -- 0x0010 - x"00",x"00",x"01",x"07",x"1F",x"3F",x"7F",x"7F", -- 0x0018 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0020 - x"00",x"00",x"E0",x"F0",x"F8",x"F8",x"F8",x"F8", -- 0x0028 - x"00",x"00",x"07",x"1F",x"7F",x"FF",x"FF",x"FF", -- 0x0030 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"8F", -- 0x0038 - x"00",x"00",x"C3",x"E3",x"F1",x"F1",x"F1",x"F1", -- 0x0040 - x"00",x"00",x"F8",x"FC",x"FE",x"FE",x"FE",x"FE", -- 0x0048 - x"00",x"00",x"1F",x"1F",x"0F",x"0F",x"0F",x"0F", -- 0x0050 - x"00",x"00",x"81",x"C3",x"E2",x"E2",x"E2",x"E2", -- 0x0058 - x"00",x"00",x"FC",x"06",x"FA",x"72",x"DA",x"FA", -- 0x0060 - x"00",x"00",x"03",x"0F",x"3F",x"7F",x"7F",x"7F", -- 0x0068 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"C7", -- 0x0070 - x"00",x"00",x"E0",x"F0",x"F8",x"F8",x"F8",x"F8", -- 0x0078 - x"00",x"00",x"07",x"1F",x"7F",x"FF",x"FF",x"FF", -- 0x0080 - x"00",x"00",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0088 - x"00",x"00",x"80",x"C0",x"C0",x"E0",x"E0",x"F0", -- 0x0090 - x"00",x"00",x"3F",x"3F",x"06",x"06",x"06",x"06", -- 0x0098 - x"00",x"00",x"D8",x"D8",x"18",x"1F",x"1F",x"18", -- 0x00A0 - x"00",x"00",x"DF",x"DF",x"D8",x"DE",x"DE",x"D8", -- 0x00A8 - x"00",x"00",x"80",x"80",x"00",x"00",x"00",x"00", -- 0x00B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x00F8 - x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"1F",x"3F", -- 0x0100 - x"C1",x"C0",x"C0",x"C0",x"C0",x"C0",x"C0",x"80", -- 0x0108 - x"FC",x"F8",x"F0",x"00",x"00",x"00",x"00",x"00", -- 0x0110 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0118 - x"FF",x"C3",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0120 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x0128 - x"FF",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE", -- 0x0130 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"07", -- 0x0138 - x"F1",x"F1",x"F1",x"F1",x"F1",x"F1",x"F1",x"F1", -- 0x0140 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0148 - x"0F",x"0F",x"0F",x"8F",x"8F",x"8F",x"DF",x"FF", -- 0x0150 - x"E3",x"E3",x"E1",x"E0",x"E1",x"E1",x"E1",x"E3", -- 0x0158 - x"56",x"8E",x"FC",x"00",x"FF",x"FE",x"FE",x"FC", -- 0x0160 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0168 - x"83",x"03",x"03",x"0F",x"3F",x"FF",x"FF",x"FC", -- 0x0170 - x"F8",x"F8",x"F8",x"F8",x"F0",x"C0",x"00",x"00", -- 0x0178 - x"FF",x"FF",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE", -- 0x0180 - x"E7",x"87",x"07",x"07",x"07",x"00",x"00",x"FF", -- 0x0188 - x"F0",x"F0",x"F0",x"E0",x"80",x"00",x"00",x"80", -- 0x0190 - x"06",x"06",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0198 - x"18",x"18",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01A0 - x"DF",x"DF",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01A8 - x"80",x"80",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x01F8 - x"3F",x"3F",x"3F",x"3F",x"3F",x"3F",x"7F",x"7F", -- 0x0200 - x"80",x"80",x"80",x"83",x"87",x"87",x"07",x"06", -- 0x0208 - x"00",x"1C",x"7C",x"FC",x"FC",x"FC",x"F0",x"F0", -- 0x0210 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0218 - x"03",x"03",x"03",x"03",x"03",x"03",x"03",x"03", -- 0x0220 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x0228 - x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE",x"FE", -- 0x0230 - x"07",x"07",x"07",x"07",x"07",x"07",x"07",x"0F", -- 0x0238 - x"F1",x"F1",x"F1",x"F1",x"F1",x"F1",x"F1",x"F1", -- 0x0240 - x"FF",x"FF",x"FF",x"FF",x"FE",x"FC",x"FC",x"FC", -- 0x0248 - x"FF",x"FF",x"FF",x"FF",x"FF",x"7F",x"7F",x"7F", -- 0x0250 - x"E3",x"E3",x"E3",x"E3",x"E3",x"E3",x"E3",x"E3", -- 0x0258 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FC", -- 0x0260 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0268 - x"F0",x"C0",x"03",x"07",x"07",x"07",x"03",x"01", -- 0x0270 - x"18",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x0278 - x"FF",x"FF",x"FF",x"FC",x"E0",x"06",x"1E",x"FE", -- 0x0280 - x"FF",x"FF",x"FF",x"0F",x"07",x"07",x"07",x"07", -- 0x0288 - x"C0",x"C0",x"E0",x"E0",x"F0",x"F0",x"F0",x"F0", -- 0x0290 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0298 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x02F8 - x"7F",x"7F",x"7F",x"7F",x"7F",x"3F",x"1F",x"0F", -- 0x0300 - x"00",x"00",x"00",x"80",x"FF",x"FF",x"FF",x"FF", -- 0x0308 - x"F0",x"78",x"7C",x"FC",x"FC",x"F8",x"F0",x"E0", -- 0x0310 - x"7F",x"7F",x"7F",x"7F",x"3F",x"1F",x"0F",x"07", -- 0x0318 - x"8F",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0320 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F0",x"E0",x"C0", -- 0x0328 - x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"7F",x"3F", -- 0x0330 - x"1F",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0338 - x"F1",x"F1",x"F1",x"F1",x"E1",x"C1",x"81",x"03", -- 0x0340 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"FE",x"FF", -- 0x0348 - x"7F",x"3F",x"3F",x"3F",x"3F",x"1F",x"1F",x"1F", -- 0x0350 - x"E3",x"E3",x"E3",x"E3",x"E3",x"E3",x"E3",x"C7", -- 0x0358 - x"FC",x"FC",x"FC",x"FC",x"FC",x"FC",x"F8",x"F0", -- 0x0360 - x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F",x"7F", -- 0x0368 - x"01",x"03",x"07",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0370 - x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8",x"F8", -- 0x0378 - x"FE",x"FE",x"FE",x"FF",x"FF",x"7F",x"1F",x"07", -- 0x0380 - x"07",x"07",x"0F",x"FF",x"FF",x"FF",x"FF",x"FF", -- 0x0388 - x"F0",x"F0",x"F0",x"F0",x"FF",x"EF",x"C3",x"83", -- 0x0390 - x"00",x"00",x"00",x"00",x"DB",x"DF",x"1F",x"1B", -- 0x0398 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x03F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0400 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0408 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0410 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0418 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0420 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0428 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0430 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0438 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0440 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0448 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0450 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0458 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0460 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0468 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0470 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0478 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0480 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0488 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0490 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0498 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x04F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0500 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0508 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0510 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0518 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0520 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0528 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0530 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0538 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0540 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0548 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0550 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0558 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0560 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0568 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0570 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0578 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0580 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0588 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0590 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0598 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x05F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0600 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0608 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0610 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0618 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0620 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0628 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0630 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0638 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0640 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0648 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0650 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0658 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0660 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0668 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0670 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0678 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0680 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0688 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0690 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0698 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x06F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0700 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0708 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0710 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0718 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0720 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0728 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0730 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0738 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0740 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0748 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0750 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0758 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0760 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0768 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0770 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0778 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0780 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0788 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0790 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0798 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x07F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0800 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0808 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0810 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0818 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0820 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0828 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0830 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0838 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0840 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0848 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0850 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0858 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0860 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0868 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0870 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0878 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0880 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0888 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0890 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0898 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x08F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0900 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0908 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0910 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0918 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0920 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0928 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0930 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0938 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0940 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0948 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0950 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0958 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0960 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0968 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0970 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0978 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0980 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0988 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0990 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0998 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09A8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09B8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09C8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09D8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09E8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x09F8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0A98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0AF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0B98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0BF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0C98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0CF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0D98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0DF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0E98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0ED8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0EF8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F00 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F08 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F10 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F18 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F20 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F28 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F30 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F38 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F40 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F48 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F50 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F58 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F60 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F68 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F70 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F78 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F80 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F88 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F90 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0F98 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FA8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FB8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FC8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FD8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FE8 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00", -- 0x0FF0 - x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00" -- 0x0FF8 - ); - -begin - - p_rom : process - begin - wait until rising_edge(CLK); - DATA <= ROM(to_integer(unsigned(ADDR))); - end process; -end RTL; diff --git a/lib/VGA_ctrl/src/fonts/make_rom.bat b/lib/VGA_ctrl/src/fonts/make_rom.bat deleted file mode 100644 index 9cfa61b..0000000 --- a/lib/VGA_ctrl/src/fonts/make_rom.bat +++ /dev/null @@ -1,6 +0,0 @@ -@echo off - -bff2rom fixedsys_8x15.bff y >char_rom_fixedsys_8x15.vhd -bff2rom fixedsys_8x16.bff y >char_rom_fixedsys_8x16.vhd -bff2rom fixedsys_9x16.bff y >char_rom_fixedsys_9x16.vhd -bff2rom System_16x16.bff y >char_rom_system_16x16.vhd diff --git a/lib/VGA_ctrl/src/tb_vga_frontend.vhd b/lib/VGA_ctrl/src/tb_vga_frontend.vhd deleted file mode 100644 index a89f7a4..0000000 --- a/lib/VGA_ctrl/src/tb_vga_frontend.vhd +++ /dev/null @@ -1,322 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: testbench for system test using Xilinx ML-402 - --- Copyright (C) 2007 J. Ahrensfeld - --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. - --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. - --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - --- For questions and ideas, please contact the author at jens@jayfield.org - ------------------------------------------------------------------------ - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -use work.vga_types.all; - -ENTITY tb_vga_frontend IS -END tb_vga_frontend; - -ARCHITECTURE behavior OF tb_vga_frontend IS - - constant tsvga : vga_timespec_t := ts_vga_testbench; - constant CLK_PERIOD : time := 10 ns; - constant VGA_CLK_PERIOD : time := (integer(1E9) / tsvga.f_pxl_clk) * 1 ns; - signal CLK_O : std_logic := '1'; - signal RST_O : std_logic := '1'; - - -- Master - signal CYC_O : std_logic; - signal STB_O : std_logic; - signal WE_O : std_logic; - signal SEL_O : unsigned(3 downto 0) := (others => '1'); - signal ACK_I : std_logic := '0'; - signal MRDY_O : std_logic := '1'; - signal SRDY_I : std_logic := '0'; - signal ADDR_O : unsigned(31 downto 0) := (others => '-'); - signal MDAT_I : unsigned(31 downto 0) := (others => '-'); - signal MDAT_O : unsigned(31 downto 0) := (others => '-'); - - -- Slave - signal CYC_I : std_logic := '0'; - signal STB_I : std_logic := '0'; - signal WE_I : std_logic := '0'; - signal SEL_I : unsigned(3 downto 0); - signal ACK_O : std_logic; - signal MRDY_I : std_logic; - signal SRDY_O : std_logic; - signal ADDR_I : unsigned(31 downto 0) := (others => '-'); - signal SDAT_I : unsigned(31 downto 0) := (others => '-'); - signal SDAT_O : unsigned(31 downto 0) := (others => '-'); - - -- VGA signals - signal vga_clk : std_logic := '1'; - signal vga_red : unsigned(7 downto 0); - signal vga_green : unsigned(7 downto 0); - signal vga_blue : unsigned(7 downto 0); - signal vga_blank_n : std_logic; - signal vga_sync_n : std_logic; - signal vga_hsync : std_logic; - signal vga_vsync : std_logic; - signal vga_en : std_logic; - - -BEGIN - -inst_vga_frontend : entity work.vga_frontend - GENERIC MAP - ( - fifo_depth => 256, - fifo_almost_full_thresh => 240, - fifo_almost_empty_thresh => 16, - tsvga => tsvga - ) - PORT MAP - ( - -- System signals - RST_I => RST_O, - CLK_I => CLK_O, - - -- JBUS Master signals - CYC_O => CYC_I, - STB_O => STB_I, - WE_O => WE_I, - SEL_O => SEL_I, - ACK_I => ACK_O, - SRDY_I => SRDY_O, - MRDY_O => MRDY_I, - ADDR_O => ADDR_I, - MDAT_I => MDAT_O, - MDAT_O => MDAT_I, - - -- JBUS Slave signals - CYC_I => CYC_O, - STB_I => STB_O, - WE_I => WE_O, - SEL_I => SEL_O, - ACK_O => ACK_I, - SRDY_O => SRDY_I, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - SDAT_I => SDAT_O, - SDAT_O => SDAT_I, - - -- VGA signals - vga_clk_in => vga_clk, - vga_clk_ce => vga_en, - vga_red => vga_red, - vga_green => vga_green, - vga_blue => vga_blue, - vga_blank_n => vga_blank_n, - vga_sync_n => vga_sync_n, - vga_hsync => vga_hsync, - vga_vsync => vga_vsync - ); - - vga_en <= not RST_O; - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - CLK_O <= not CLK_O; - end process; - -VGA_CLK_GEN: process - begin - wait for VGA_CLK_PERIOD/2; - vga_clk <= not vga_clk after 3 ns; - end process; - --- Slave - SRDY_O <= CYC_I; - - process(CLK_O) - begin - if rising_edge(CLK_O) then - if RST_O = '1' then - MDAT_O <= X"00000000"; - elsif (CYC_I and STB_I) = '1' then - MDAT_O <= MDAT_O + 1; - ACK_O <= '1'; - else - ACK_O <= '0'; - end if; - end if; - end process; - --- Master -STIMULUS: process - - begin - - wait for 6*CLK_PERIOD; - RST_O <= '0'; - wait for 60*CLK_PERIOD; - - -- Enable master - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0002"; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read status - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read resolution X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0018"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read resolution Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_001C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Write char 1 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0035"; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read char 1 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Write char 2 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0045"; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read char 2 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Set Cursor X - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0012"; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Set Cursor Y - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0014"; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - - - wait; - - end process; - -END; diff --git a/lib/VGA_ctrl/src/tb_vga_frontend64.vhd b/lib/VGA_ctrl/src/tb_vga_frontend64.vhd deleted file mode 100644 index ac7ec08..0000000 --- a/lib/VGA_ctrl/src/tb_vga_frontend64.vhd +++ /dev/null @@ -1,459 +0,0 @@ -------------------------------------------------------------------------- --- Project: JCPU, a portable 8-bit RISC CPU written in VHDL --- This file: testbench for system test using Xilinx ML-402 - --- Copyright (C) 2007 J. Ahrensfeld - --- This library is free software; you can redistribute it and/or --- modify it under the terms of the GNU Lesser General Public --- License as published by the Free Software Foundation; either --- version 2.1 of the License, or (at your option) any later version. - --- This library is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --- Lesser General Public License for more details. - --- You should have received a copy of the GNU Lesser General Public --- License along with this library; if not, write to the Free Software --- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - --- For questions and ideas, please contact the author at jens@jayfield.org - ------------------------------------------------------------------------ - -LIBRARY ieee; -use IEEE.STD_LOGIC_1164.ALL; -USE ieee.numeric_std.ALL; - -use work.vga_types.all; - -ENTITY tb_vga_frontend64 IS -END tb_vga_frontend64; - -ARCHITECTURE behavior OF tb_vga_frontend64 IS - - constant tsvga : vga_timespec_t := ts_vga_testbench; - constant CLK_PERIOD : time := 10 ns; - constant VGA_CLK_PERIOD : time := (integer(1E9) / tsvga.f_pxl_clk) * 1 ns; - signal CLK_O : std_logic := '1'; - signal RST_O : std_logic := '1'; - - -- Master - signal INT_O : std_logic; - signal CYC_O : std_logic; - signal STB_O : std_logic; - signal WE_O : std_logic; - signal SEL_O : unsigned(3 downto 0) := (others => '1'); - signal ACK_I : std_logic := '0'; - signal MRDY_O : std_logic := '1'; - signal SRDY_I : std_logic := '0'; - signal ADDR_O : unsigned(31 downto 0) := (others => '-'); - signal MDAT_I : unsigned(63 downto 0) := (others => '-'); - signal MDAT_O : unsigned(63 downto 0) := (others => '-'); - - -- Slave - signal CYC_I : std_logic := '0'; - signal STB_I : std_logic := '0'; - signal WE_I : std_logic := '0'; - signal SEL_I : unsigned(7 downto 0); - signal ACK_O : std_logic; - signal MRDY_I : std_logic; - signal SRDY_O : std_logic; - signal ADDR_I : unsigned(31 downto 0) := (others => '-'); - signal SDAT_I : unsigned(31 downto 0) := (others => '-'); - signal SDAT_O : unsigned(31 downto 0) := (others => '-'); - signal rdy : std_logic := '0'; - - signal read_reg : unsigned(31 downto 0) := (others => '-'); - - -- VGA signals - signal vga_clk : std_logic := '1'; - signal vga_red : unsigned(7 downto 0); - signal vga_green : unsigned(7 downto 0); - signal vga_blue : unsigned(7 downto 0); - signal vga_blank_n : std_logic; - signal vga_sync_n : std_logic; - signal vga_hsync : std_logic; - signal vga_vsync : std_logic; - signal vga_en : std_logic; - -BEGIN - -inst_vga_frontend64 : entity work.vga_frontend64 - GENERIC MAP - ( - fifo_depth => 2048, - fifo_almost_full_thresh => 2048-128, - fifo_almost_empty_thresh => 512, - tsvga => tsvga - ) - PORT MAP - ( - -- System signals - RST_I => RST_O, - CLK_I => CLK_O, - - -- JBUS Master signals - CYC_O => CYC_I, - STB_O => STB_I, - WE_O => WE_I, - SEL_O => SEL_I, - ACK_I => ACK_O, - SRDY_I => SRDY_O, - MRDY_O => MRDY_I, - ADDR_O => ADDR_I, - MDAT_I => MDAT_O, - MDAT_O => MDAT_I, - - -- JBUS Slave signals - INT_O => INT_O, - CYC_I => CYC_O, - STB_I => STB_O, - WE_I => WE_O, - SEL_I => SEL_O, - ACK_O => ACK_I, - SRDY_O => SRDY_I, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - SDAT_I => SDAT_O, - SDAT_O => SDAT_I, - - -- VGA signals - vga_clk_in => vga_clk, - vga_clk_ce => vga_en, - vga_red => vga_red, - vga_green => vga_green, - vga_blue => vga_blue, - vga_blank_n => vga_blank_n, - vga_sync_n => vga_sync_n, - vga_hsync => vga_hsync, - vga_vsync => vga_vsync - ); - - vga_en <= not RST_O; - -rdy_GEN: process - begin - wait for 3*CLK_PERIOD/2; - wait until rising_edge(CLK_O); - rdy <= not rdy; - end process; - -CLK_GEN: process - begin - wait for CLK_PERIOD/2; - CLK_O <= not CLK_O; - end process; - -VGA_CLK_GEN: process - begin - wait for VGA_CLK_PERIOD/2; - vga_clk <= not vga_clk after 3 ns; - end process; - --- Slave - SRDY_O <= CYC_I and rdy; - - process(CLK_O) - variable ack_v : unsigned(11 downto 0); - type arr64_t is array (11 downto 0) of unsigned(63 downto 0); - variable dat_v : arr64_t; - variable res: unsigned(63 downto 0); - variable scan_count: unsigned(31 downto 0); - variable blit_count: unsigned(31 downto 0); - begin - if rising_edge(CLK_O) then - if RST_O = '1' then - scan_count := X"00000000"; - blit_count := X"00000000"; - for i in 0 to 11 loop - dat_v(i) := X"FFFFFFFF_FFFFFFFF"; - ack_v(i) := '0'; - end loop; - else - if (CYC_I and STB_I) = '1' and rdy = '1' and WE_I = '0' then - if ADDR_I(24) = '0' then - res := ADDR_I & scan_count; - scan_count := scan_count + 8; - else - res := ADDR_I & blit_count; - blit_count := blit_count + 8; - end if; - dat_v := dat_v(10 downto 0) & res; - ack_v := ack_v(10 downto 0) & '1'; - else - dat_v := dat_v(10 downto 0) & X"FFFFFFFF_FFFFFFFF"; - ack_v := ack_v(10 downto 0) & '0'; - end if; - MDAT_O <= dat_v(dat_v'left); - ACK_O <= ack_v(ack_v'left); - end if; - end if; - end process; - - process(CLK_O) - begin - if rising_edge(CLK_O) then - if RST_O = '1' then - read_reg <= X"00000000"; - elsif ACK_I = '1' then - read_reg <= SDAT_I; - end if; - end if; - end process; - --- Master -STIMULUS: process - - begin - - wait for 6*CLK_PERIOD; - RST_O <= '0'; - wait for 60*CLK_PERIOD; - - -- Enable master - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0002"; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read status - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read resolution - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0014"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Write char 1 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0035"; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read char 1 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Write char 2 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0045"; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read char 2 - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0004"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Set Cursor X - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0012"; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Set Cursor Y - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0014"; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor X - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0008"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - -- Read Cursor Y - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_000C"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - - wait until rising_edge(CLK_O); - CYC_O <= '0'; - - wait for 60000*CLK_PERIOD; - - for i in 0 to 99 loop - - -- BLIT test - -- Read status - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '0'; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - wait until rising_edge(CLK_O) and ACK_I = '1'; - -- set src addr first - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"4100_0000"; - ADDR_O <= X"0000_0020"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set src addr last - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"4100_0000" + to_unsigned(4*(80*4-1), 32); - ADDR_O <= X"0000_0024"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set src dim-x - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= to_unsigned(4*80, 32); - ADDR_O <= X"0000_0028"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set dst addr first - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"4200_0000"; - ADDR_O <= X"0000_0050"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set dst addr last - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"4200_0000" + to_unsigned(4*(80*4-1), 32); - ADDR_O <= X"0000_0054"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set dst dim-x - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= to_unsigned(4*80, 32); - ADDR_O <= X"0000_0058"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set nx - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= to_unsigned(80-1, 32); - ADDR_O <= X"0000_0060"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set ny - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= X"0000_0003"; - ADDR_O <= X"0000_0064"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - -- set blit request - CYC_O <= '1'; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '1'; - WE_O <= '1'; - SDAT_O <= read_reg or X"0000_0100"; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O) and SRDY_I = '1'; - STB_O <= '0'; - CYC_O <= '0'; - WE_O <= '0'; - - wait for 100000*CLK_PERIOD; - - - end loop; - - wait; - - end process; - -END; diff --git a/lib/VGA_ctrl/src/vga_backend.vhd b/lib/VGA_ctrl/src/vga_backend.vhd deleted file mode 100644 index ed741ec..0000000 --- a/lib/VGA_ctrl/src/vga_backend.vhd +++ /dev/null @@ -1,177 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:25:45 10/15/05 --- Design Name: --- Module Name: vga_backend - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -use work.vga_types.all; - -entity vga_backend is - Generic - ( - tsvga : vga_timespec_t := ts_vga_800_600_72 - ); - Port - ( - -- System signals - sys_rst : in std_logic; - sys_clk : in std_logic; - - -- Color channels - color_in : in color_array_t; - color_op : in color_op_t; - color_en : unsigned (VGA_NUM_CH-1 downto 0); - - -- Control signals - ctrl_scan_en : in std_logic; - - -- Status signals - stat_vga_rdy : out std_logic; - stat_scan : out std_logic; - stat_hsync : out std_logic; - stat_vsync : out std_logic; - stat_hready : out std_logic; - stat_vready : out std_logic; - stat_hscan : out std_logic; - stat_vscan : out std_logic; - stat_hpos : out natural range 0 to tsvga.ts_h.ncyc_scan-1; - stat_vpos : out natural range 0 to tsvga.ts_v.ncyc_scan-1; - - -- VGA domain signals - vga_clk_in : in std_logic; - vga_clk_ce : in std_logic; - vga_red : out unsigned(7 downto 0); - vga_green : out unsigned(7 downto 0); - vga_blue : out unsigned(7 downto 0); - vga_blank_n : out std_logic; - vga_sync_n : out std_logic; - vga_hsync : out std_logic; - vga_vsync : out std_logic - ); -end vga_backend; - -architecture Behavioral of vga_backend is - - signal scan_enable : std_logic; - signal is_scan : std_logic; - signal is_hscan : std_logic; - signal is_vscan : std_logic; - signal hsync : std_logic; - signal vsync : std_logic; - signal hready : std_logic; - signal vready : std_logic; - signal rst : std_logic; - -begin - -inst_vga_timing: entity work.vga_timing - GENERIC MAP - ( - tsvga => tsvga - ) - PORT MAP - ( - sys_rst => sys_rst, - vga_clk => vga_clk_in, - vga_ce => vga_clk_ce, - sync_h => hsync, - sync_v => vsync, - scan_pos_h => stat_hpos, - scan_pos_v => stat_vpos, - is_scan_h => is_hscan, - is_scan_v => is_vscan, - scan_rdy_h => hready, - scan_rdy_v => vready - ); - - --------------------------------------------------------------------------------------------- - rst <= not vga_clk_ce; - stat_vga_rdy <= vga_clk_ce; - stat_hsync <= hsync; - stat_vsync <= vsync; - stat_hscan <= is_hscan; - stat_vscan <= is_vscan; - stat_hready <= hready; - stat_vready <= vready; - stat_scan <= is_scan; - - vga_blank_n <= '1'; - vga_sync_n <= '0'; - is_scan <= is_hscan and is_vscan and scan_enable; - - --------------------------------------------------------------------------------------------- - proc_vga_start: - process (rst, vga_clk_in) - begin - if rst = '1' then - scan_enable <= '0'; - elsif rising_edge(vga_clk_in) then - if vsync = '1' then - if ctrl_scan_en = '1' then - scan_enable <= '1'; - else - scan_enable <= '0'; - end if; - end if; - end if; - end process; - - proc_vga_color_out: - process (vga_clk_in) - variable do_scan : std_logic; - variable color : color_t; - begin - if rising_edge(vga_clk_in) then - vga_red <= X"00"; - vga_green <= X"00"; - vga_blue <= X"00"; - if is_scan = '1' then - for i in 0 to VGA_NUM_CH-1 loop - color := color_in(i); - if color_en(i) = '1' then - vga_red <= color(r); -- ToDo: color_op over channels - vga_green <= color(g); -- ToDo: color_op over channels - vga_blue <= color(b); -- ToDo: color_op over channels - end if; - end loop; - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - proc_vga_sync_out: - process (rst, vga_clk_in) - variable hsync_r : std_logic; - variable vsync_r : std_logic; - begin - if rst = '1' then - vga_hsync <= tsvga.ts_h.sync_polarity; - vga_vsync <= tsvga.ts_v.sync_polarity; - hsync_r := tsvga.ts_h.sync_polarity; - vsync_r := tsvga.ts_v.sync_polarity; - elsif rising_edge(vga_clk_in) then - vga_hsync <= hsync_r; - vga_vsync <= vsync_r; - hsync_r := hsync xor (not tsvga.ts_h.sync_polarity); - vsync_r := vsync xor (not tsvga.ts_v.sync_polarity); - end if; - end process; - -end Behavioral; diff --git a/lib/VGA_ctrl/src/vga_frontend.vhd b/lib/VGA_ctrl/src/vga_frontend.vhd deleted file mode 100644 index 8e1f6a6..0000000 --- a/lib/VGA_ctrl/src/vga_frontend.vhd +++ /dev/null @@ -1,495 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:25:45 10/15/05 --- Design Name: --- Module Name: vga_backend - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -use work.utils_pkg.all; -use work.vga_types.all; - -entity vga_frontend is - Generic - ( - fifo_depth : integer := 2048; - fifo_almost_full_thresh : natural := 2000; - fifo_almost_empty_thresh : natural := 48; - tsvga : vga_timespec_t := ts_vga_800_600_72 - ); - Port - ( - -- System signals - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - - -- JBUS Master signals - CYC_O : out STD_LOGIC; - STB_O : out STD_LOGIC; - WE_O : out STD_LOGIC; - SEL_O : out unsigned(3 downto 0); - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - MRDY_O : out STD_LOGIC; - ADDR_O : out unsigned(31 downto 0); - MDAT_I : in unsigned(31 downto 0); - MDAT_O : out unsigned(31 downto 0); - - -- JBUS Slave signals - CYC_I : in STD_LOGIC; - STB_I : in STD_LOGIC; - WE_I : in STD_LOGIC; - SEL_I : in unsigned(3 downto 0); - ACK_O : out STD_LOGIC; - SRDY_O : out STD_LOGIC; - MRDY_I : in STD_LOGIC; - ADDR_I : in unsigned(31 downto 0); - SDAT_I : in unsigned(31 downto 0); - SDAT_O : out unsigned(31 downto 0); - - -- VGA signals - vga_clk_in : in std_logic; - vga_clk_ce : in std_logic; - vga_red : out unsigned(7 downto 0); - vga_green : out unsigned(7 downto 0); - vga_blue : out unsigned(7 downto 0); - vga_blank_n : out std_logic; - vga_sync_n : out std_logic; - vga_hsync : out std_logic; - vga_vsync : out std_logic - ); -end vga_frontend; - -architecture Behavioral of vga_frontend is - - signal vga_clk : std_logic; - - -- Color FIFO signals - signal fifo_full : std_logic; - signal fifo_empty : std_logic; - signal fifo_almost_empty : std_logic; - signal fifo_almost_full : std_logic; - signal fifo_color_re : std_logic; - signal fifo_color_we : std_logic; - signal fifo_color_out : unsigned(31 downto 0); - signal fifo_color_in : unsigned(31 downto 0); - - -- Backend signals - signal scan_rdy : std_logic; - signal ctrl_scan_en : std_logic; - signal color_in : color_array_t; - signal color_op : color_op_t; - signal color_en : unsigned (VGA_NUM_CH-1 downto 0); - - signal stat_vga_rdy : std_logic; - signal stat_hready : std_logic; - signal stat_vready : std_logic; - signal stat_scan : std_logic; - signal stat_hscan : std_logic; - signal stat_vscan : std_logic; - signal stat_hsync : std_logic; - signal stat_vsync : std_logic; - signal stat_hpos : natural range 0 to tsvga.ts_h.ncyc_scan-1; - signal stat_vpos : natural range 0 to tsvga.ts_v.ncyc_scan-1; - - -- CG signals - signal cg_en : std_logic; - signal cg_rdy : std_logic; - signal cg_draw : std_logic; - signal cg_clr_screen : std_logic; - signal cg_clr_line : std_logic; - signal cg_din : unsigned(7 downto 0); - signal cg_dout : unsigned(7 downto 0); - signal cg_ascii_we : std_logic; - signal cg_posy_we : std_logic; - signal cg_posx_we : std_logic; - signal cg_color : color_t; - signal cg_csr_pos_x : natural range 0 to 80-1; - signal cg_csr_pos_y : natural range 0 to 32-1; - - -- Bus master signals - constant MAX_REQUEST_CNT : natural := tsvga.ts_h.ncyc_scan*tsvga.ts_v.ncyc_scan; - - signal vga_mem_offset : unsigned(31 downto 0); - signal vga_scan_rdy : std_logic; - signal vga_master_en : std_logic; - signal request_cnt_rst : std_logic; - signal request_cnt_en : std_logic; - signal pixel_cnt_rst : std_logic; - signal read_bus_en : std_logic; - signal request_cnt : natural range 0 to MAX_REQUEST_CNT-1; - signal read_cnt : natural range 0 to MAX_REQUEST_CNT-1; - - type vm_state_t is (init, idle, rdy, bus_request, bus_access, bus_data); - signal s, sn : vm_state_t; - -begin - -inst_vga_backend : entity work.vga_backend - GENERIC MAP - ( - tsvga => tsvga - ) - PORT MAP - ( - -- System signals - sys_rst => RST_I, - sys_clk => CLK_I, - - -- Color channels - color_in => color_in, - color_op => color_op, - color_en => color_en, - - -- Control signals - ctrl_scan_en => ctrl_scan_en, - - -- Status signals - stat_vga_rdy => stat_vga_rdy, - stat_scan => stat_scan, - stat_hsync => stat_hsync, - stat_vsync => stat_vsync, - stat_hready => stat_hready, - stat_vready => stat_vready, - stat_hscan => stat_hscan, - stat_vscan => stat_vscan, - stat_hpos => stat_hpos, - stat_vpos => stat_vpos, - - -- VGA domain signals - vga_clk_in => vga_clk_in, - vga_clk_ce => vga_clk_ce, - vga_red => vga_red, - vga_green => vga_green, - vga_blue => vga_blue, - vga_blank_n => vga_blank_n, - vga_sync_n => vga_sync_n, - vga_hsync => vga_hsync, - vga_vsync => vga_vsync - ); - - ctrl_scan_en <= '1'; - color_en(0) <= not fifo_empty; - color_en(1) <= cg_draw; - color_in(0) <= to_color_t(fifo_color_out); - color_in(1) <= cg_color; --(X"FF", X"FF", X"FF", X"FF"); -- white opaque - color_op <= op_over; - vga_scan_rdy <= stat_hready and stat_vready; - -inst_linefifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => NextExpBaseTwo(fifo_depth), - data_width => 32, - almost_full_thresh => fifo_almost_full_thresh, - almost_empty_thresh => fifo_almost_empty_thresh - ) - PORT MAP - ( - rst => RST_I, - clk_w => CLK_I, - clk_r => vga_clk_in, - we => fifo_color_we, - re => fifo_color_re, - data_w => fifo_color_in, - data_r => fifo_color_out, - fifo_full => fifo_full, - fifo_empty => fifo_empty, - fifo_afull => fifo_almost_full, - fifo_aempty => fifo_almost_empty - - ); - - fifo_color_in <= MDAT_I; - fifo_color_re <= stat_scan; - fifo_color_we <= ACK_I and read_bus_en; -- TODO: - MRDY_O <= not fifo_full; - SEL_O <= (others => '0'); - WE_O <= '0'; - -vga_master_next: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - s <= init; - else - s <= sn; - end if; - end if; - end process; - -vga_master: - process(s, stat_vga_rdy, vga_master_en, vga_scan_rdy, fifo_almost_empty, fifo_almost_full, SRDY_I, ACK_I, read_cnt, request_cnt) - begin - - CYC_O <= '0'; - STB_O <= '0'; - pixel_cnt_rst <= '0'; - request_cnt_rst <= '0'; - request_cnt_en <= '0'; - read_bus_en <= '0'; - sn <= s; - - case s is - when init => - if stat_vga_rdy = '1' then - sn <= idle; - end if; - - when idle => - pixel_cnt_rst <= '1'; - if vga_master_en = '1' and vga_scan_rdy = '1' then - sn <= rdy; - end if; - - when rdy => --- pixel_cnt_rst <= '1'; - if fifo_almost_empty = '1' then - sn <= bus_request; - end if; - - when bus_request => - CYC_O <= '1'; - request_cnt_rst <= '1'; - if SRDY_I = '1' then - sn <= bus_access; - end if; - - when bus_access => - CYC_O <= '1'; - STB_O <= '1'; - request_cnt_en <= '1'; - read_bus_en <= '1'; - if fifo_almost_full = '1' then - sn <= bus_data; - end if; - when bus_data => - CYC_O <= '1'; - read_bus_en <= '1'; - if read_cnt = request_cnt then - sn <= rdy; - if vga_master_en = '0' then - sn <= idle; - end if; - end if; - when others => - sn <= idle; - - end case; - end process; - -request_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_cnt_rst = '1' then - request_cnt <= 0; - elsif request_cnt_en = '1' and SRDY_I = '1' then - if request_cnt /= MAX_REQUEST_CNT-1 then - request_cnt <= request_cnt + 1; - end if; - end if; - end if; - end process; - -read_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_cnt_rst = '1' then - read_cnt <= 0; - elsif read_bus_en = '1' and ACK_I = '1' then - if read_cnt /= MAX_REQUEST_CNT-1 then - read_cnt <= read_cnt + 1; - end if; - end if; - end if; - end process; - -pixel_counter: - process(CLK_I) - variable pixel_cnt : natural range 0 to MAX_REQUEST_CNT-1; - begin - if rising_edge(CLK_I) then - if pixel_cnt_rst = '1' then - pixel_cnt := 0; - elsif request_cnt_en = '1' and SRDY_I = '1' then - if pixel_cnt /= MAX_REQUEST_CNT-1 then - pixel_cnt := pixel_cnt + 1; - else - pixel_cnt := 0; - end if; - end if; - ADDR_O <= vga_mem_offset + (to_unsigned(pixel_cnt, 30) & "00"); - end if; - end process; - -inst_char_gen : entity work.char_gen - GENERIC MAP - ( - tsvga => tsvga, - CHARACTER_SCALE => 1, - CHAR_ROM_SIZE_X => 8, -- Pixels - CHAR_ROM_SIZE_Y => 16, -- Pixels - CHAR_ROM_DEPTH => 256, -- Chars - MAX_CHAR_PER_LINE => 80, -- Chars - MAX_LINE_PER_FRAME => 32, -- Chars - CHAR_SPACING_X => 0, -- Pixels - CHAR_SPACING_Y => 0, -- Pixels - SCREEN_OFFSET_X => 16, -- Pixels - SCREEN_OFFSET_Y => 16 -- Pixels - ) - PORT MAP - ( - rst => RST_I, - sys_clk => CLK_I, - vga_clk => vga_clk_in, - ce => cg_en, - frame_pulse => scan_rdy, - clr_screen => cg_clr_screen, - clr_line => cg_clr_line, - din => cg_din, - dout => cg_dout, - ascii_we => cg_ascii_we, - posy_we => cg_posy_we, - posx_we => cg_posx_we, - ready => cg_rdy, - scan_pos_x_in => stat_hpos, - scan_pos_y_in => stat_vpos, - csr_pos_x_out => cg_csr_pos_x, - csr_pos_y_out => cg_csr_pos_y, - char_draw_en => cg_draw - ); - SRDY_O <= CYC_I; -- and cg_rdy; --- SDAT_O <= X"0000000" & "000" & cg_rdy; - MDAT_O <= (others => '-'); - scan_rdy <= stat_hready and stat_vready; - cg_en <= stat_scan; - - -registers_read: - process(CLK_I) - begin - if rising_edge(CLK_I) then - ACK_O <= '0'; - if (STB_I and CYC_I) = '1' then - ACK_O <= not WE_I; - SDAT_O <= (others => '0'); - case ADDR_I(5 downto 2) is - - -- sys_vga_ctrl 0 - when "0000" => - SDAT_O(0) <= cg_rdy; - SDAT_O(1) <= vga_master_en; - - -- sys_vga_ascii 4 - when "0001" => - SDAT_O(7 downto 0) <= cg_dout; - - -- sys_vga_posx 8 - when "0010" => - SDAT_O(7 downto 0) <= to_unsigned(cg_csr_pos_x, 8); - - -- sys_vga_posy 12 - when "0011" => - SDAT_O(7 downto 0) <= to_unsigned(cg_csr_pos_y, 8); - - -- sys_vga_cgcol 16 - when "0100" => - SDAT_O <= to_unsigned(cg_color); - - -- sys_vga_moffs 20 - when "0101" => - SDAT_O <= vga_mem_offset; - - -- sys_vga_resx 24 - when "0110" => - SDAT_O(15 downto 0) <= to_unsigned(tsvga.ts_h.ncyc_scan, 16); - - -- sys_vga_resy 28 - when "0111" => - SDAT_O(15 downto 0) <= to_unsigned(tsvga.ts_v.ncyc_scan, 16); - - -- sys_vga_fps 32 - when "1000" => - SDAT_O(15 downto 0) <= to_unsigned(tsvga.nfps, 16); - - when others => null; - end case; - end if; - end if; - end process; - - -registers_write: - process(CLK_I) - begin - if rising_edge(CLK_I) then - cg_ascii_we <= '0'; - cg_posy_we <= '0'; - cg_posx_we <= '0'; - cg_clr_screen <= '0'; - cg_clr_line <= '0'; - if RST_I = '1' then - cg_din <= (others => '0'); - vga_master_en <= '0'; - vga_mem_offset <= X"40000000"; - cg_color <= (X"FF", X"FF", X"FF", X"FF"); - elsif (STB_I and CYC_I and WE_I) = '1' then - case ADDR_I(5 downto 2) is - - -- sys_vga_ctrl 0 - when "0000" => - vga_master_en <= SDAT_I(1); - cg_clr_screen <= SDAT_I(4); - cg_clr_line <= SDAT_I(5); - - -- sys_vga_ascii 4 - when "0001" => - cg_ascii_we <= '1'; - cg_din <= SDAT_I(7 downto 0); - - -- sys_vga_posx 8 - when "0010" => - cg_posx_we <= '1'; - cg_din <= SDAT_I(7 downto 0); - - -- sys_vga_posy 12 - when "0011" => - cg_posy_we <= '1'; - cg_din <= SDAT_I(7 downto 0); - - -- sys_vga_cgcol 16 - when "0100" => - cg_color <= to_color_t(SDAT_I(31 downto 0)); - - -- sys_vga_moffs 20 - when "0101" => - vga_mem_offset <= SDAT_I(31 downto 2) & "00"; - - when others => null; - end case; - - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - -end Behavioral; diff --git a/lib/VGA_ctrl/src/vga_frontend64.vhd b/lib/VGA_ctrl/src/vga_frontend64.vhd deleted file mode 100644 index 5ec6ed9..0000000 --- a/lib/VGA_ctrl/src/vga_frontend64.vhd +++ /dev/null @@ -1,917 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:25:45 10/15/05 --- Design Name: --- Module Name: vga_backend - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -use work.utils_pkg.all; -use work.vga_types.all; - -entity vga_frontend64 is - Generic - ( - fifo_depth : integer := 2048; - fifo_almost_full_thresh : natural := 2000; - fifo_almost_empty_thresh : natural := 48; - tsvga : vga_timespec_t := ts_vga_800_600_72 - ); - Port - ( - -- System signals - RST_I : in STD_LOGIC; - CLK_I : in STD_LOGIC; - - -- JBUS Master signals - CYC_O : out STD_LOGIC; - STB_O : out STD_LOGIC; - WE_O : out STD_LOGIC; - SEL_O : out unsigned(7 downto 0); - ACK_I : in STD_LOGIC; - SRDY_I : in STD_LOGIC; - MRDY_O : out STD_LOGIC; - ADDR_O : out unsigned(31 downto 0); - MDAT_I : in unsigned(63 downto 0); - MDAT_O : out unsigned(63 downto 0); - - -- JBUS Slave signals - INT_O : out STD_LOGIC; - CYC_I : in STD_LOGIC; - STB_I : in STD_LOGIC; - WE_I : in STD_LOGIC; - SEL_I : in unsigned(3 downto 0); - ACK_O : out STD_LOGIC; - SRDY_O : out STD_LOGIC; - MRDY_I : in STD_LOGIC; - ADDR_I : in unsigned(31 downto 0); - SDAT_I : in unsigned(31 downto 0); - SDAT_O : out unsigned(31 downto 0); - - -- VGA signals - vga_clk_in : in std_logic; - vga_clk_ce : in std_logic; - vga_red : out unsigned(7 downto 0); - vga_green : out unsigned(7 downto 0); - vga_blue : out unsigned(7 downto 0); - vga_blank_n : out std_logic; - vga_sync_n : out std_logic; - vga_hsync : out std_logic; - vga_vsync : out std_logic - ); -end vga_frontend64; - -architecture Behavioral of vga_frontend64 is - - -- Color FIFO signals - signal fifo_full : std_logic; - signal fifo_empty : std_logic; - signal fifo_almost_empty : std_logic; - signal fifo_almost_full : std_logic; - signal fifo_color_re : std_logic; - signal fifo_color_we : std_logic; - signal fifo_color_out : unsigned(63 downto 0); - signal fifo_color_in : unsigned(63 downto 0); - - -- Backend signals - signal scan_rdy : std_logic; - signal ctrl_scan_en : std_logic; - signal color_in : color_array_t; - signal color_op : color_op_t; - signal color_en : unsigned (VGA_NUM_CH-1 downto 0); - - signal stat_vga_rdy : std_logic; - signal stat_hready : std_logic; - signal stat_vready : std_logic; - signal stat_scan : std_logic; - signal stat_hscan : std_logic; - signal stat_vscan : std_logic; - signal stat_hsync : std_logic; - signal stat_vsync : std_logic; - signal stat_hpos : natural range 0 to tsvga.ts_h.ncyc_scan-1; - signal stat_vpos : natural range 0 to tsvga.ts_v.ncyc_scan-1; - - -- CG signals - signal cg_en : std_logic; - signal cg_rdy : std_logic; - signal cg_draw : std_logic; - signal cg_clr_screen : std_logic; - signal cg_clr_line : std_logic; - signal cg_din : unsigned(7 downto 0); - signal cg_dout : unsigned(7 downto 0); - signal cg_ascii_we : std_logic; - signal cg_posy_we : std_logic; - signal cg_posx_we : std_logic; - signal cg_color : color_t; - signal cg_csr_pos_x : natural range 0 to 80-1; - signal cg_csr_pos_y : natural range 0 to 32-1; - - -- Bus master signals - constant MAX_REQUEST_CNT : natural := tsvga.ts_h.ncyc_scan*tsvga.ts_v.ncyc_scan; - - signal bufchg : std_logic; - signal bufchg_irq_en : std_logic; - signal bufchg_flag : std_logic; - signal bufchg_flag_ack : std_logic; - signal vga_fb_back : unsigned(31 downto 0); - signal vga_fb_front : unsigned(31 downto 0); - signal host_fb_front : unsigned(31 downto 0); - signal host_fb_back : unsigned(31 downto 0); - signal blit_addr_src_0 : unsigned(31 downto 0); - signal blit_addr_src_1 : unsigned(31 downto 0); - signal blit_addr_dst : unsigned(31 downto 0); - signal blit_dimx_src_0 : unsigned(31 downto 0); - signal blit_dimx_src_1 : unsigned(31 downto 0); - signal blit_dimx_dst : unsigned(31 downto 0); - signal host_blit_nx : unsigned(31 downto 0); - signal blit_nx : unsigned(31 downto 0); - signal blit_ny : unsigned(31 downto 0); - signal blit_func_sel : unsigned(3 downto 0); - signal blit_comb_sel : unsigned(3 downto 0); - signal blit_request : std_logic; - signal blit_request_set : std_logic; - signal blit_complete : std_logic; - signal blit_complete_ack : std_logic; - signal blit_complete_inten : std_logic; - signal blit_reset : std_logic; - signal vga_scan_rdy : std_logic; - signal vga_scan_dma_en : std_logic; - signal vga_scan_dma_en2 : std_logic; - signal request_cnt_rst : std_logic; - signal request_en : std_logic; - signal read_bus_en : std_logic; - signal request_cnt : unsigned(28 downto 0); - signal read_cnt : unsigned(28 downto 0); - signal bus_read_fin : std_logic; - - signal CYC_O_scan : std_logic; - signal STB_O_scan : std_logic; - signal ADDR_O_scan : unsigned(31 downto 0); - signal pixel_cnt : natural range 0 to MAX_REQUEST_CNT/2-1; - signal front : unsigned(31 downto 0); - signal back : unsigned(31 downto 0); - - -- Blitter vars - constant BLIT_CHUNK_SIZE : natural := 512; - signal blit_chunk_cnt : natural range 0 to BLIT_CHUNK_SIZE-1; - - -- Blitter FIFO signals - signal blitfifo_full : std_logic; - signal blitfifo_empty : std_logic; - signal blitfifo_color_re : std_logic; - signal blitfifo_color_we : std_logic; - signal blitfifo_color_out : unsigned(63 downto 0); - signal blitfifo_color_in : unsigned(63 downto 0); - - signal blit_src_cnt_x : unsigned(31 downto 0); - signal blit_src_cnt_y : unsigned(31 downto 0); - signal blit_src_off_y : unsigned(31 downto 0); - signal blit_src_offset : unsigned(31 downto 0); - signal blit_src_finish : std_logic; - signal CYC_O_blit_src : std_logic; - signal STB_O_blit_src : std_logic; - signal ADDR_O_blit_src : unsigned(31 downto 0); - - signal blit_dst_cnt_x : unsigned(31 downto 0); - signal blit_dst_cnt_y : unsigned(31 downto 0); - signal blit_dst_off_y : unsigned(31 downto 0); - signal blit_dst_offset : unsigned(31 downto 0); - signal blit_dst_finish : std_logic; - signal CYC_O_blit_dst : std_logic; - signal STB_O_blit_dst : std_logic; - signal ADDR_O_blit_dst : unsigned(31 downto 0); - - signal odd_pixel : unsigned(NextExpBaseTwo(tsvga.ts_h.ncyc_scan)-1 downto 0); - - -- Bus FIFO - signal bus_fifo_din : unsigned(104 downto 0); - signal bus_fifo_dout : unsigned(104 downto 0); - signal bus_fifo_re : std_logic; - signal bus_fifo_we : std_logic; - signal bus_fifo_full : std_logic; - signal bus_fifo_empty : std_logic; - signal bus_rdy : std_logic; - - alias bus_fifo_addr_in is bus_fifo_din(31 downto 0); - alias bus_fifo_data_in is bus_fifo_din(95 downto 32); - alias bus_fifo_sel_in is bus_fifo_din(103 downto 96); - alias bus_fifo_we_in is bus_fifo_din(104); - - alias bus_fifo_addr_out is bus_fifo_dout(31 downto 0); - alias bus_fifo_data_out is bus_fifo_dout(95 downto 32); - alias bus_fifo_sel_out is bus_fifo_dout(103 downto 96); - alias bus_fifo_we_out is bus_fifo_dout(104); - - type vm_state_t is (init, rdy, scan_bus_request, scan_bus_read, blit_src_bus_request, blit_src_bus_read, blit_dst_bus_request, blit_dst_bus_fin); - signal s, sn : vm_state_t; - -begin - - -proc_synced_vga_scan_en: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - vga_scan_dma_en2 <= '0'; - elsif vga_scan_rdy = '1' then - vga_scan_dma_en2 <= vga_scan_dma_en; - end if; - end if; - end process; - -proc_bufchg_irq: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if vga_scan_dma_en2 = '0' or bufchg_flag_ack = '1' then - bufchg_flag <= '0'; - elsif bufchg = '1' then - bufchg_flag <= '1'; - end if; - INT_O <= (bufchg_flag and bufchg_irq_en) - or (blit_complete and blit_complete_inten); - end if; - end process; - -proc_blit_request_flags: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - blit_request <= '0'; - elsif blit_request_set = '1' then - blit_request <= '1'; - elsif blit_dst_finish = '1' and blitfifo_empty = '1' then - blit_request <= '0'; - end if; - end if; - end process; - -proc_blit_complete_flag: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' or blit_request_set = '1' or blit_complete_ack = '1' then - blit_complete <= '0'; - elsif blit_dst_finish = '1' and blitfifo_empty = '1' and blit_request = '1' then - blit_complete <= '1'; - end if; - end if; - end process; - -inst_vga_backend : entity work.vga_backend - GENERIC MAP - ( - tsvga => tsvga - ) - PORT MAP - ( - -- System signals - sys_rst => RST_I, - sys_clk => CLK_I, - - -- Color channels - color_in => color_in, - color_op => color_op, - color_en => color_en, - - -- Control signals - ctrl_scan_en => ctrl_scan_en, - - -- Status signals - stat_vga_rdy => stat_vga_rdy, - stat_scan => stat_scan, - stat_hsync => stat_hsync, - stat_vsync => stat_vsync, - stat_hready => stat_hready, - stat_vready => stat_vready, - stat_hscan => stat_hscan, - stat_vscan => stat_vscan, - stat_hpos => stat_hpos, - stat_vpos => stat_vpos, - - -- VGA domain signals - vga_clk_in => vga_clk_in, - vga_clk_ce => vga_clk_ce, - vga_red => vga_red, - vga_green => vga_green, - vga_blue => vga_blue, - vga_blank_n => vga_blank_n, - vga_sync_n => vga_sync_n, - vga_hsync => vga_hsync, - vga_vsync => vga_vsync - ); - - SRDY_O <= CYC_I; -- and cg_rdy; - MRDY_O <= not fifo_full; - STB_O <= not bus_fifo_empty; - ADDR_O <= bus_fifo_addr_out; - MDAT_O <= bus_fifo_data_out; - SEL_O <= bus_fifo_sel_out; - WE_O <= bus_fifo_we_out; - - odd_pixel <= to_unsigned(stat_hpos, odd_pixel'length); - ctrl_scan_en <= '1'; - color_en(0) <= not fifo_empty; - color_en(1) <= cg_draw; - color_in(0) <= to_color_t(fifo_color_out(31 downto 0)) when odd_pixel(0) = '0' else to_color_t(fifo_color_out(63 downto 32)); - color_in(1) <= cg_color; --(X"FF", X"FF", X"FF", X"FF"); -- white opaque - color_op <= op_over; - vga_scan_rdy <= stat_hready and stat_vready; - -inst_linefifo: entity work.fifo_async - GENERIC MAP - ( - addr_width => NextExpBaseTwo(fifo_depth), - data_width => 64, - almost_full_thresh => fifo_almost_full_thresh, - almost_empty_thresh => fifo_almost_empty_thresh - ) - PORT MAP - ( - rst => RST_I, - clk_w => CLK_I, - clk_r => vga_clk_in, - we => fifo_color_we, - re => fifo_color_re, - data_w => fifo_color_in, - data_r => fifo_color_out, - fifo_full => fifo_full, - fifo_empty => fifo_empty, - fifo_afull => fifo_almost_full, - fifo_aempty => fifo_almost_empty - - ); - - fifo_color_in <= MDAT_I; - fifo_color_re <= stat_scan and odd_pixel(0); - fifo_color_we <= ACK_I and read_bus_en and CYC_O_scan; -- TODO: - -inst_blitfifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => NextExpBaseTwo(BLIT_CHUNK_SIZE), - data_width => 64 - ) - PORT MAP - ( - rst => blit_reset, - clk => CLK_I, - we => blitfifo_color_we, - re => blitfifo_color_re, - data_w => blitfifo_color_in, - data_r => blitfifo_color_out, - fifo_full => blitfifo_full, - fifo_empty => blitfifo_empty, - fifo_afull => open, - fifo_aempty => open - - ); - - blitfifo_color_in <= MDAT_I; - blitfifo_color_re <= STB_O_blit_dst and bus_rdy; - blitfifo_color_we <= ACK_I and read_bus_en and CYC_O_blit_src; -- TODO: - --- Instantiate synchronous FIFO -inst_bus_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => 2, - data_width => 105, - do_last_read_update => false - ) - PORT MAP - ( - rst => RST_I, - clk => CLK_I, - we => bus_fifo_we, - re => bus_fifo_re, - fifo_full => bus_fifo_full, - fifo_empty => bus_fifo_empty, - fifo_afull => open, - fifo_aempty => open, - data_w => bus_fifo_din, - data_r => bus_fifo_dout - ); - bus_rdy <= not bus_fifo_full; - bus_fifo_re <= not bus_fifo_empty and SRDY_I; - bus_fifo_we <= STB_O_scan or STB_O_blit_src or STB_O_blit_dst; - bus_fifo_data_in <= blitfifo_color_out; - bus_fifo_addr_in <= ADDR_O_blit_src when CYC_O_blit_src = '1' else - ADDR_O_blit_dst when CYC_O_blit_dst = '1' else - ADDR_O_scan; - bus_fifo_sel_in <= (others => '1'); - bus_fifo_we_in <= CYC_O_blit_dst; - - CYC_O <= CYC_O_scan or CYC_O_blit_src or CYC_O_blit_dst; - -vga_master_next: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - s <= init; - else - s <= sn; - end if; - end if; - end process; - -vga_master: - process(s, stat_vga_rdy, vga_scan_dma_en2, fifo_almost_empty, fifo_almost_full, SRDY_I, ACK_I, bus_read_fin, bus_fifo_empty, blit_chunk_cnt, blitfifo_empty, blit_src_finish) - begin - - CYC_O_scan <= '0'; - STB_O_scan <= '0'; - CYC_O_blit_src <= '0'; - STB_O_blit_src <= '0'; - CYC_O_blit_dst <= '0'; - STB_O_blit_dst <= '0'; - request_cnt_rst <= '0'; - request_en <= '0'; - read_bus_en <= '0'; - sn <= s; - - case s is - when init => - if stat_vga_rdy = '1' then - sn <= rdy; - end if; - - when rdy => - request_cnt_rst <= '1'; - if fifo_almost_empty = '1' and vga_scan_dma_en2 = '1' then - sn <= scan_bus_request; - elsif blit_request = '1' then - if blitfifo_empty = '1' then - sn <= blit_src_bus_request; - else - sn <= blit_dst_bus_request; - end if; - end if; - - when scan_bus_request => - CYC_O_scan <= '1'; - STB_O_scan <= '1'; - request_en <= '1'; - read_bus_en <= '1'; - if fifo_almost_full = '1' then - sn <= scan_bus_read; - end if; - - when scan_bus_read => - CYC_O_scan <= '1'; - read_bus_en <= '1'; - if bus_read_fin = '1' then - sn <= rdy; - end if; - - when blit_src_bus_request => - CYC_O_blit_src <= '1'; - STB_O_blit_src <= '1'; - request_en <= '1'; - read_bus_en <= '1'; - if blit_chunk_cnt = 0 or blit_src_finish = '1' then - sn <= blit_src_bus_read; - end if; - - when blit_src_bus_read => - CYC_O_blit_src <= '1'; - read_bus_en <= '1'; - if bus_read_fin = '1' then - sn <= rdy; - end if; - - when blit_dst_bus_request => - CYC_O_blit_dst <= '1'; - STB_O_blit_dst <= '1'; - if blitfifo_empty = '1' then - STB_O_blit_dst <= '0'; - sn <= blit_dst_bus_fin; - end if; - - when blit_dst_bus_fin => - CYC_O_blit_dst <= '1'; - if bus_fifo_empty = '1' then - sn <= rdy; - end if; - - when others => - sn <= rdy; - - end case; - end process; - -proc_bus_request_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_cnt_rst = '1' then - request_cnt <= (others => '0'); - elsif request_en = '1' and bus_rdy = '1' then - request_cnt <= request_cnt + 1; - end if; - end if; - end process; - -proc_bus_read_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if request_cnt_rst = '1' then - read_cnt <= (others => '0'); - elsif read_bus_en = '1' and ACK_I = '1' then - read_cnt <= read_cnt + 1; - end if; - end if; - end process; - -proc_bus_read_finish: - process(CLK_I) - begin - if rising_edge(CLK_I) then - bus_read_fin <= '0'; - if read_cnt = request_cnt then - bus_read_fin <= '1'; - end if; - end if; - end process; - -proc_blit_chunk_counter: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if STB_O_blit_src = '1' then - if blit_chunk_cnt /= 0 and bus_rdy = '1' then - blit_chunk_cnt <= blit_chunk_cnt - 1; - end if; - else - blit_chunk_cnt <= BLIT_CHUNK_SIZE-1; - end if; - end if; - end process; - - blit_reset <= RST_I or (blit_request_set and not blit_request); - - ADDR_O_scan <= front + (to_unsigned(pixel_cnt, 29) & "000"); - -proc_scan_addr: - process(CLK_I) - begin - if rising_edge(CLK_I) then - bufchg <= '0'; - if vga_scan_dma_en2 = '0' then - pixel_cnt <= 0; - front <= host_fb_front; - elsif STB_O_scan = '1' and bus_rdy = '1' then - if pixel_cnt /= MAX_REQUEST_CNT/2-1 then - pixel_cnt <= pixel_cnt + 1; - else - pixel_cnt <= 0; - front <= host_fb_back; - bufchg <= '1'; - end if; - end if; - vga_fb_front <= front; - vga_fb_back <= back; - end if; - end process; - - ADDR_O_blit_src <= blit_addr_src_0 + blit_src_offset; - -proc_blit_addr_src: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if blit_reset = '1' then - blit_src_cnt_x <= (others => '0'); - blit_src_cnt_y <= (others => '0'); - blit_src_offset <= (others => '0'); - blit_src_off_y <= blit_dimx_src_0; - blit_src_finish <= '0'; - elsif STB_O_blit_src = '1' and bus_rdy = '1' then - if blit_src_cnt_x /= blit_nx then - blit_src_cnt_x <= blit_src_cnt_x + 1; - blit_src_offset <= blit_src_offset + 8; - else - if blit_src_cnt_y /= blit_ny then - blit_src_cnt_x <= (others => '0'); - blit_src_offset <= blit_src_off_y; - blit_src_cnt_y <= blit_src_cnt_y + 1; - blit_src_off_y <= blit_src_off_y + blit_dimx_src_0; - else - blit_src_finish <= '1'; - end if; - end if; - end if; - end if; - end process; - - ADDR_O_blit_dst <= blit_addr_dst + blit_dst_offset; - -proc_blit_addr_dst: - process(CLK_I) - begin - if rising_edge(CLK_I) then - if blit_reset = '1' then - blit_dst_cnt_x <= (others => '0'); - blit_dst_cnt_y <= (others => '0'); - blit_dst_offset <= (others => '0'); - blit_dst_off_y <= blit_dimx_dst; - blit_dst_finish <= '0'; - elsif STB_O_blit_dst = '1' and bus_rdy = '1' then - if blit_dst_cnt_x /= blit_nx then - blit_dst_cnt_x <= blit_dst_cnt_x + 1; - blit_dst_offset <= blit_dst_offset + 8; - else - if blit_dst_cnt_y /= blit_ny then - blit_dst_cnt_x <= (others => '0'); - blit_dst_offset <= blit_dst_off_y; - blit_dst_cnt_y <= blit_dst_cnt_y + 1; - blit_dst_off_y <= blit_dst_off_y + blit_dimx_dst; - else - blit_dst_finish <= '1'; - end if; - end if; - end if; - end if; - end process; - -inst_char_gen : entity work.char_gen - GENERIC MAP - ( - tsvga => tsvga, - CHARACTER_SCALE => 1, - CHAR_ROM_SIZE_X => 8, -- Pixels - CHAR_ROM_SIZE_Y => 16, -- Pixels - CHAR_ROM_DEPTH => 256, -- Chars - MAX_CHAR_PER_LINE => 80, -- Chars - MAX_LINE_PER_FRAME => 32, -- Chars - CHAR_SPACING_X => 0, -- Pixels - CHAR_SPACING_Y => 0, -- Pixels - SCREEN_OFFSET_X => 16, -- Pixels - SCREEN_OFFSET_Y => 16 -- Pixels - ) - PORT MAP - ( - rst => RST_I, - sys_clk => CLK_I, - vga_clk => vga_clk_in, - ce => cg_en, - frame_pulse => scan_rdy, - clr_screen => cg_clr_screen, - clr_line => cg_clr_line, - din => cg_din, - dout => cg_dout, - ascii_we => cg_ascii_we, - posy_we => cg_posy_we, - posx_we => cg_posx_we, - ready => cg_rdy, - scan_pos_x_in => stat_hpos, - scan_pos_y_in => stat_vpos, - csr_pos_x_out => cg_csr_pos_x, - csr_pos_y_out => cg_csr_pos_y, - char_draw_en => cg_draw - ); - scan_rdy <= stat_hready and stat_vready; - cg_en <= stat_scan; - - -registers_read: - process(CLK_I) - begin - if rising_edge(CLK_I) then - ACK_O <= '0'; - if (STB_I and CYC_I) = '1' then - ACK_O <= not WE_I; - SDAT_O <= (others => '0'); - case ADDR_I(6 downto 2) is - - -- sys_vga_ctrl - -- 0x00 - when "00000" => - SDAT_O(0) <= cg_rdy; - SDAT_O(1) <= vga_scan_dma_en; - SDAT_O(2) <= bufchg_irq_en; - SDAT_O(3) <= bufchg_flag; - SDAT_O(8) <= blit_request; - SDAT_O(9) <= blit_complete; - SDAT_O(10) <= blit_complete_inten; - SDAT_O(23 downto 20) <= blit_comb_sel; - SDAT_O(19 downto 16) <= blit_func_sel; - - -- sys_vga_ascii - -- 0x04 - when "00001" => - SDAT_O(7 downto 0) <= cg_dout; - - -- sys_vga_posx - -- 0x08 - when "00010" => - SDAT_O(7 downto 0) <= to_unsigned(cg_csr_pos_x, 8); - - -- sys_vga_posy - -- 0x0C - when "00011" => - SDAT_O(7 downto 0) <= to_unsigned(cg_csr_pos_y, 8); - - -- sys_vga_cgcol - -- 0x10 - when "00100" => - SDAT_O <= to_unsigned(cg_color); - - -- sys_vga_res - -- 0x14 - when "00101" => - SDAT_O <= to_unsigned(tsvga.nfps, 8) & to_unsigned(tsvga.ts_v.ncyc_scan, 12) & to_unsigned(tsvga.ts_h.ncyc_scan, 12); - - -- sys_vga_fb_front - -- 0x18 - when "00110" => - SDAT_O <= vga_fb_front; - - -- sys_vga_fb_back - -- 0x1C - when "00111" => - SDAT_O <= vga_fb_back; - - -- sys_blit_descr_src_0 - -- 0x20 - when "01000" => - SDAT_O <= blit_addr_src_0; - - -- 0x28 - when "01010" => - SDAT_O <= blit_dimx_src_0; - - -- sys_blit_descr_src_1 - -- 0x30 - when "01100" => - SDAT_O <= blit_addr_src_1; - - -- 0x38 - when "01110" => - SDAT_O <= blit_dimx_src_1; - - -- sys_blit_descr_dst - -- 0x50 - when "10100" => - SDAT_O <= blit_addr_dst; - - -- 0x58 - when "10110" => - SDAT_O <= blit_dimx_dst; - - -- sys_blit_nx - -- 0x60 - when "11000" => - SDAT_O <= host_blit_nx; - - -- sys_blit_ny - -- 0x64 - when "11001" => - SDAT_O <= blit_ny; - - when others => null; - end case; - end if; - end if; - end process; - -registers_write: - process(CLK_I) - begin - if rising_edge(CLK_I) then - cg_ascii_we <= '0'; - cg_posy_we <= '0'; - cg_posx_we <= '0'; - cg_clr_screen <= '0'; - cg_clr_line <= '0'; - bufchg_flag_ack <= '0'; - blit_request_set <= '0'; - blit_complete_ack <= '0'; - if RST_I = '1' then - cg_din <= (others => '0'); - vga_scan_dma_en <= '0'; - bufchg_irq_en <= '0'; - blit_complete_inten <= '0'; - blit_func_sel <= (others => '0'); - blit_comb_sel <= (others => '0'); - host_fb_front <= X"40000000"; - host_fb_back <= X"40010000"; - cg_color <= (X"FF", X"FF", X"FF", X"FF"); - elsif (STB_I and CYC_I and WE_I) = '1' then - case ADDR_I(6 downto 2) is - - -- sys_vga_ctrl - -- 0x00 - when "00000" => - vga_scan_dma_en <= SDAT_I(1); - bufchg_irq_en <= SDAT_I(2); - bufchg_flag_ack <= SDAT_I(3); - cg_clr_screen <= SDAT_I(4); - cg_clr_line <= SDAT_I(5); - blit_request_set <= SDAT_I(8); - blit_complete_ack <= SDAT_I(9); - blit_complete_inten <= SDAT_I(10); - blit_func_sel <= SDAT_I(19 downto 16); - blit_comb_sel <= SDAT_I(23 downto 20); - - -- sys_vga_ascii - -- 0x04 - when "00001" => - cg_ascii_we <= '1'; - cg_din <= SDAT_I(7 downto 0); - - -- sys_vga_posx - -- 0x08 - when "00010" => - cg_posx_we <= '1'; - cg_din <= SDAT_I(7 downto 0); - - -- sys_vga_posy - -- 0x0C - when "00011" => - cg_posy_we <= '1'; - cg_din <= SDAT_I(7 downto 0); - - -- sys_vga_cgcol - -- 0x10 - when "00100" => - cg_color <= to_color_t(SDAT_I(31 downto 0)); - - -- sys_vga_fb_front - -- 0x18 - when "00110" => - host_fb_front <= SDAT_I(31 downto 3) & "000"; - - -- sys_vga_fb_back - -- 0x1C - when "00111" => - bufchg_flag_ack <= '1'; - host_fb_back <= SDAT_I(31 downto 3) & "000"; - - -- sys_blit_descr_src_0 - -- 0x20 - when "01000" => - blit_addr_src_0 <= SDAT_I(31 downto 3) & "000"; - - -- 0x28 - when "01010" => - blit_dimx_src_0 <= SDAT_I(31 downto 3) & "000"; - - -- sys_blit_descr_src_1 - -- 0x30 - when "01100" => - blit_addr_src_1 <= SDAT_I(31 downto 3) & "000"; - - -- 0x38 - when "01110" => - blit_dimx_src_1 <= SDAT_I(31 downto 3) & "000"; - - -- sys_blit_descr_dst - -- 0x50 - when "10100" => - blit_addr_dst <= SDAT_I(31 downto 3) & "000"; - - -- 0x58 - when "10110" => - blit_dimx_dst <= SDAT_I(31 downto 3) & "000"; - - -- sys_blit_nx - -- 0x60 - when "11000" => - host_blit_nx <= SDAT_I; - blit_nx <= '0' & SDAT_I(31 downto 1); - - -- sys_blit_ny - -- 0x64 - when "11001" => - blit_ny <= SDAT_I; - - when others => null; - end case; - - end if; - end if; - end process; - - --------------------------------------------------------------------------------------------- - -end Behavioral; diff --git a/lib/VGA_ctrl/src/vga_sync.vhd b/lib/VGA_ctrl/src/vga_sync.vhd deleted file mode 100644 index 56e4384..0000000 --- a/lib/VGA_ctrl/src/vga_sync.vhd +++ /dev/null @@ -1,127 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:15:39 10/21/05 --- Design Name: --- Module Name: fsm_scan - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -use work.vga_types.all; - -entity vga_sync is - Generic - ( - ts : scan_timespec_t := (4,2,1,3,'0') - ); - Port - ( - rst : in std_logic; - clk : in std_logic; - ce : in std_logic; - pos : out natural range 0 to ts.ncyc_scan-1; - sync : out std_logic; - is_scan : out std_logic; - rdy_scan : out std_logic - ); - end vga_sync; - -architecture Behavioral of vga_sync is - - type timing_state_t is (st_init, st_scan, st_front, st_sync, st_back); - - -- Counter - signal state, next_state : timing_state_t; - signal count_srst : std_logic; - signal count : natural range 0 to ts.ncyc_scan-1; - -begin - - pos <= count; - ---------------------------------------------------------------------------------------------- -counter: - process (clk) - begin - if rising_edge(clk) then - if ce = '1' then - if count_srst = '1' then - count <= 0; - else - count <= count + 1; - end if; - end if; - end if; - end process; - ---------------------------------------------------------------------------------------------- -SYNC_TIMING: -process (state, count) - begin - count_srst <= '0'; - rdy_scan <= '0'; - is_scan <= '0'; - sync <= '0'; - - next_state <= state; --default is to stay in current state - - case (state) is - - when st_init => - count_srst <= '1'; - next_state <= st_front; - when st_front => - if count = ts.ncyc_porch_front - 1 then - count_srst <= '1'; - next_state <= st_sync; - end if; - when st_sync => - sync <= '1'; - if count = ts.ncyc_sync_pulse - 1 then - count_srst <= '1'; - next_state <= st_back; - end if; - when st_back => - if count = ts.ncyc_porch_back - 1 then - count_srst <= '1'; - next_state <= st_scan; - end if; - when st_scan => - is_scan <= '1'; - if count = ts.ncyc_scan - 1 then - count_srst <= '1'; - rdy_scan <= '1'; - next_state <= st_front; - end if; - when others => - next_state <= st_init; - - end case; - end process; - -SYNC_TIMING_NEXT: - process (rst, clk) - begin - if rst = '1' then - state <= st_init; - elsif rising_edge(clk) and ce = '1' then - state <= next_state; - end if; - end process; - ---------------------------------------------------------------------------------------------- -end Behavioral; diff --git a/lib/VGA_ctrl/src/vga_timing.vhd b/lib/VGA_ctrl/src/vga_timing.vhd deleted file mode 100644 index c110652..0000000 --- a/lib/VGA_ctrl/src/vga_timing.vhd +++ /dev/null @@ -1,102 +0,0 @@ --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 11:25:45 10/15/05 --- Design Name: --- Module Name: vga_ctrl_core - Behavioral --- Project Name: --- Target Device: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - -use work.vga_types.all; - -entity vga_timing is - Generic - ( - tsvga : vga_timespec_t := ts_vga_800_600_72 - ); - Port - ( - sys_rst : in std_logic; - vga_clk : in std_logic; - vga_ce : in std_logic; - sync_h : out std_logic; - sync_v : out std_logic; - scan_pos_h : out natural range 0 to tsvga.ts_h.ncyc_scan-1; - scan_pos_v : out natural range 0 to tsvga.ts_v.ncyc_scan-1; - is_scan_h : out std_logic; - is_scan_v : out std_logic; - scan_rdy_h : out std_logic; - scan_rdy_v : out std_logic - ); -end vga_timing; - -architecture Behavioral of vga_timing is - - --------------------------------------------------------------------------------------------- - signal is_scan_h_i : std_logic; - signal is_scan_v_i : std_logic; - signal scan_rdy_h_i : std_logic; - signal scan_rdy_v_i : std_logic; - signal sync_h_i : std_logic; - signal sync_v_i : std_logic; - - --------------------------------------------------------------------------------------------- -begin - - is_scan_h <= is_scan_h_i; - is_scan_v <= is_scan_v_i; - scan_rdy_h <= scan_rdy_h_i; - scan_rdy_v <= scan_rdy_v_i; - sync_h <= sync_h_i; - sync_v <= sync_v_i; - - --------------------------------------------------------------------------------------------- - inst_vga_sync_h: entity work.vga_sync - GENERIC MAP - ( - ts => tsvga.ts_h - ) - PORT MAP - ( - rst => sys_rst, - clk => vga_clk, - ce => vga_ce, - pos => scan_pos_h, - sync => sync_h_i, - is_scan => is_scan_h_i, - rdy_scan => scan_rdy_h_i - ); - - inst_vga_sync_v: entity work.vga_sync - GENERIC MAP - ( - ts => tsvga.ts_v - ) - PORT MAP - ( - rst => sys_rst, - clk => vga_clk, - ce => scan_rdy_h_i, - pos => scan_pos_v, - sync => sync_v_i, - is_scan => is_scan_v_i, - rdy_scan => scan_rdy_v_i - ); - ---------------------------------------------------------------------------------------------- - -end Behavioral; diff --git a/lib/VGA_ctrl/src/vga_types.vhd b/lib/VGA_ctrl/src/vga_types.vhd deleted file mode 100644 index e8fa93e..0000000 --- a/lib/VGA_ctrl/src/vga_types.vhd +++ /dev/null @@ -1,158 +0,0 @@ --- Package File Template --- --- Purpose: This package defines supplemental types, subtypes, --- constants, and functions - - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; -use IEEE.MATH_REAL.ALL; - -package vga_types is - - -- Constants - constant VGA_NUM_CH : natural := 2; - - -- Types - type color_range_t is (r, g, b, a); - type color_t is array (color_range_t) of unsigned(7 downto 0); - type color_array_t is array (0 to VGA_NUM_CH-1) of color_t; - - type color_op_t is (op_over, op_xor, op_alpha); - - type scan_timespec_t is - record - ncyc_scan : integer; - ncyc_porch_front : integer; - ncyc_sync_pulse : integer; - ncyc_porch_back : integer; - sync_polarity : std_logic; - end record; - - type vga_timespec_t is - record - f_pxl_clk : integer; - nfps : integer; - ts_h : scan_timespec_t; - ts_v : scan_timespec_t; - end record; - - ----------------------------------------------------------------------- - -- Common timimg specifications - ----------------------------------------------------------------------- - -- For test bench (not for H/W use) - constant ts_vga_testbench : vga_timespec_t := - ( - f_pxl_clk => 40E6, - nfps => 6, - ts_h => (80,5,2,3,'0'), - ts_v => (60,4,2,3,'0') - ); - - -- 640 x 480 @ 60 Hz (not recommended) - constant ts_vga_640_480_60 : vga_timespec_t := - ( - f_pxl_clk => 25175000, - nfps => 60, - ts_h => (640,16,96,48,'0'), - ts_v => (480,11,2,31,'0') - ); - - -- 640 x 480 @ 72 Hz (not recommended) - constant ts_vga_640_480_72 : vga_timespec_t := - ( - f_pxl_clk => 31500000, - nfps => 72, - ts_h => (640,24,40,128,'0'), - ts_v => (480,9,3,28,'0') - ); - - -- 800 x 600 @ 60 Hz (OK) - constant ts_vga_800_600_60 : vga_timespec_t := - ( - f_pxl_clk => 40000000, - nfps => 60, - ts_h => (800,40,128,88,'0'), - ts_v => (600,1,4,23,'0') - ); - - -- 800 x 600 @ 72 Hz (OK) - constant ts_vga_800_600_72 : vga_timespec_t := - ( - f_pxl_clk => 50000000, - nfps => 72, - ts_h => (800,56,120,64,'0'), - ts_v => (600,37,6,23,'0') - ); - - -- 1024 x 768 @ 60 Hz (Noisy) - constant ts_vga_1024_768_60 : vga_timespec_t := - ( - f_pxl_clk => 65000000, - nfps => 60, - ts_h => (1024,24,136,160,'0'), - ts_v => (768,3,6,29,'0') - ); - - -- 1024 x 768 @ 70 Hz (OK) - constant ts_vga_1024_768_70 : vga_timespec_t := - ( - f_pxl_clk => 75000000, - nfps => 70, - ts_h => (1024,24,136,144,'0'), - ts_v => (768,3,6,29,'0') - ); - - -- 1280 x 1024 @ 70 Hz (Noisy) - constant ts_vga_1280_1024_70 : vga_timespec_t := - ( - f_pxl_clk => 125000000, - nfps => 70, - ts_h => (1280,16,176,192,'0'), - ts_v => (1024,3,3,42,'0') - ); - - -- 1280 x 1024 @ 72 Hz (OK) - constant ts_vga_1280_1024_72 : vga_timespec_t := - ( - f_pxl_clk => 130000000, - nfps => 72, - ts_h => (1280,32,160,224,'0'), - ts_v => (1024,2,2,33,'0') - ); - - -- Functions - function to_color_t(x : unsigned) return color_t; - function to_unsigned(x : color_t) return unsigned; - -end vga_types; - - -package body vga_types is - - function to_color_t(x : unsigned) return color_t is - variable result : color_t; - begin - result(r) := x(x'right+7 downto x'right+0); - result(g) := x(x'right+15 downto x'right+8); - result(b) := x(x'right+23 downto x'right+16); - result(a) := x(x'right+31 downto x'right+24); - - return result; - end to_color_t; - - function to_unsigned(x : color_t) return unsigned is - variable result : unsigned(31 downto 0); - begin - result(7 downto 0) := x(r); - result(15 downto 8) := x(g); - result(23 downto 16) := x(b); - result(31 downto 24) := x(a); - - return result; - end to_unsigned; - -end vga_types; - - diff --git a/lib/VGA_ctrl/todo.txt b/lib/VGA_ctrl/todo.txt deleted file mode 100644 index e20e96d..0000000 --- a/lib/VGA_ctrl/todo.txt +++ /dev/null @@ -1,21 +0,0 @@ -2009-11-04 -- char_gen.vhdl: add csr_posx_out, csr_posy_out to port. Make it register readable (done 2009-11-04) -- several async. resets recognized. Sync. resets better? -- Make screen width, screen height and FPS register readable (done 2009-11-04) - -2009-11-08 -- Double-buffering to reduce artifacts on buffer write by host and buffer read by VGA master. - currently double-buffer can only be updatetd if msten = 0. Buffer updates should be always possible - for large screen change, which need more time than one frame. (done 2009-11-08) -- VGA-INT every n-th buffer change? - -2009-11-11 -- adding a blitter for blockcopy of whole frame or box region. (done 2009-11-22) -- Adding blitter capability to read from three sources (image 1, image 2 and mask), manipulate and store back of whole frame or box region - -2009-11-25 -- Adding blitter capability to read/write single 32-Bit words (and even bytes) -- Adding blitter capability to blit constant color -- Increase BLIT_CHUNKSIZE to LINEFIFO_DEPTH/2 for more performance (needs modification to FSM) - - diff --git a/lib/ac97_ctrl/sim/tb_ac97_wb.fdo b/lib/ac97_ctrl/sim/tb_ac97_wb.fdo deleted file mode 100644 index bbdc249..0000000 --- a/lib/ac97_ctrl/sim/tb_ac97_wb.fdo +++ /dev/null @@ -1,20 +0,0 @@ -## NOTE: Do not edit this file. -## Autogenerated by ProjNav (creatfdo.tcl) on Tue Jun 05 17:37:16 Westeuropäische Normalzeit 2007 -## -vlib work -vcom -explicit -93 "../../FIFO/src/fifo_ctrl_pkg.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_sync_ctrl.vhd" -vcom -explicit -93 "../../misc/dpram_1w1r_dist.vhd" -vcom -explicit -93 "../../FIFO/src/fifo_sync_dist.vhd" -vcom -explicit -93 "../../misc/singleshot.vhd" -vcom -explicit -93 "../src/core/ac_out.vhd" -vcom -explicit -93 "../src/core/ac_in.vhd" -vcom -explicit -93 "../src/core/ac_io.vhd" -vcom -explicit -93 "../src/core/ac97_wb.vhd" -vcom -explicit -93 "../src/tb_ac97_wb.vhd" -vsim -t 1ps -lib work tb_ac97_wb -do {tb_ac97_wb.wdo} -view wave -view structure -view signals -run 700us diff --git a/lib/ac97_ctrl/sim/tb_ac97_wb.wdo b/lib/ac97_ctrl/sim/tb_ac97_wb.wdo deleted file mode 100644 index f7e1885..0000000 --- a/lib/ac97_ctrl/sim/tb_ac97_wb.wdo +++ /dev/null @@ -1,77 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_ac97_wb/clk_o -add wave -noupdate -format Logic /tb_ac97_wb/rst_o -add wave -noupdate -format Logic /tb_ac97_wb/int_i -add wave -noupdate -format Logic /tb_ac97_wb/cyc_o -add wave -noupdate -format Logic /tb_ac97_wb/stb_o -add wave -noupdate -format Logic /tb_ac97_wb/we_o -add wave -noupdate -format Logic /tb_ac97_wb/ack_i -add wave -noupdate -format Logic /tb_ac97_wb/mrdy_o -add wave -noupdate -format Logic /tb_ac97_wb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/dat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/dat_o -add wave -noupdate -format Logic /tb_ac97_wb/dout_rst -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/dout_reg -add wave -noupdate -format Literal /tb_ac97_wb/dout_cnt -add wave -noupdate -format Logic /tb_ac97_wb/ac97_bit_clk -add wave -noupdate -format Logic /tb_ac97_wb/ac97_reset_n -add wave -noupdate -format Logic /tb_ac97_wb/ac97_sdata_out -add wave -noupdate -format Logic /tb_ac97_wb/ac97_ssync -add wave -noupdate -format Logic /tb_ac97_wb/ac97_sdata_in -add wave -noupdate -divider UUT -add wave -noupdate -format Logic /tb_ac97_wb/uut/cmd_reg_we -add wave -noupdate -format Logic /tb_ac97_wb/uut/cmd_pending -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/ac_cmd_data -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/ac_cmd_addr -add wave -noupdate -format Logic /tb_ac97_wb/uut/ac_cmd_we -add wave -noupdate -format Logic /tb_ac97_wb/uut/ac_tx_pcm_we -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/stat_reg -add wave -noupdate -format Logic /tb_ac97_wb/uut/stat_reg_re -add wave -noupdate -format Logic /tb_ac97_wb/uut/stat_pending -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/ac_stat_data -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/ac_stat_addr -add wave -noupdate -format Literal /tb_ac97_wb/uut/ac_tx_pcm_addr -add wave -noupdate -format Literal /tb_ac97_wb/uut/ac_rx_pcm_addr -add wave -noupdate -format Literal /tb_ac97_wb/uut/ac_sync_strobe -add wave -noupdate -format Literal /tb_ac97_wb/uut/ac_slot_valid -add wave -noupdate -format Logic /tb_ac97_wb/uut/ac_ready -add wave -noupdate -format Logic /tb_ac97_wb/uut/tx_data_start -add wave -noupdate -format Logic /tb_ac97_wb/clk_o -add wave -noupdate -format Logic /tb_ac97_wb/uut/sync_status -add wave -noupdate -format Logic /tb_ac97_wb/uut/sync_frame -add wave -noupdate -format Logic /tb_ac97_wb/uut/rx_frame_valid -add wave -noupdate -format Logic /tb_ac97_wb/uut/sync_tx -add wave -noupdate -format Literal /tb_ac97_wb/uut/request -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/tx_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/tx_fifo_dout -add wave -noupdate -format Logic /tb_ac97_wb/uut/tx_fifo_re -add wave -noupdate -format Logic /tb_ac97_wb/uut/tx_fifo_we -add wave -noupdate -format Logic /tb_ac97_wb/uut/tx_fifo_full -add wave -noupdate -format Logic /tb_ac97_wb/uut/tx_fifo_empty -add wave -noupdate -format Logic /tb_ac97_wb/uut/rx_data_start -add wave -noupdate -format Logic /tb_ac97_wb/clk_o -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/rx_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/rx_fifo_dout -add wave -noupdate -format Logic /tb_ac97_wb/uut/rx_fifo_re -add wave -noupdate -format Logic /tb_ac97_wb/uut/rx_fifo_we -add wave -noupdate -format Logic /tb_ac97_wb/uut/rx_fifo_full -add wave -noupdate -format Logic /tb_ac97_wb/uut/rx_fifo_empty -add wave -noupdate -format Literal -radix hexadecimal /tb_ac97_wb/uut/ac97_stat -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 4} {200000401 ps} 0} {{Cursor 2} {699514236 ps} 0} {{Cursor 4} {4999959266 ps} 0} -configure wave -namecolwidth 173 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {699260742 ps} {700038909 ps} diff --git a/lib/ac97_ctrl/sim/tb_ac_in.fdo b/lib/ac97_ctrl/sim/tb_ac_in.fdo deleted file mode 100644 index fd7fb1f..0000000 --- a/lib/ac97_ctrl/sim/tb_ac_in.fdo +++ /dev/null @@ -1,14 +0,0 @@ -## NOTE: Do not edit this file. -## Autogenerated by ProjNav (creatfdo.tcl) on Tue Jun 05 17:37:16 Westeuropäische Normalzeit 2007 -## -vlib work -vcom -explicit -93 "../../../lib/src/misc/singleshot.vhd" -vcom -explicit -93 "../src/core/ac_out.vhd" -vcom -explicit -93 "../src/core/ac_in.vhd" -vcom -explicit -93 "../src/tb_ac_in.vhd" -vsim -t 1ps -lib work tb_ac_in -do {tb_ac_in.wdo} -view wave -view structure -view signals -run 700us diff --git a/lib/ac97_ctrl/sim/tb_ac_in.wdo b/lib/ac97_ctrl/sim/tb_ac_in.wdo deleted file mode 100644 index a7d0e35..0000000 --- a/lib/ac97_ctrl/sim/tb_ac_in.wdo +++ /dev/null @@ -1,43 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_ac_in/uut/rst -add wave -noupdate -format Logic /tb_ac_in/uut/clk -add wave -noupdate -format Logic /tb_ac_in/uut/sync_frame -add wave -noupdate -format Logic /tb_ac_in/uut/sync_status -add wave -noupdate -divider {AC97 lines} -add wave -noupdate -format Logic /tb_ac_in/uut/ac_reset -add wave -noupdate -format Logic /tb_ac_in/uut/ac_bit_clk -add wave -noupdate -format Logic /tb_ac_in/uut/ac_sdata_in -add wave -noupdate -format Logic /tb_ac_in/uut/ac_ssync -add wave -noupdate -divider Debug -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_in/uut/stat_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_in/uut/stat_data -add wave -noupdate -format Literal /tb_ac_in/uut/pcm_out_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_in/uut/pcm_out_data -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_ac_in/uut/data_array -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_in/uut/tag -add wave -noupdate -format Literal /tb_ac_in/uut/sac -add wave -noupdate -format Literal /tb_ac_in/uut/bitcnt -add wave -noupdate -format Literal /tb_ac_in/uut/slotcnt -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_in/uut/rx_reg -add wave -noupdate -format Logic /tb_ac_in/uut/stat_read -add wave -noupdate -format Logic /tb_ac_in/uut/host_update -add wave -noupdate -format Logic /tb_ac_in/uut/slot_end -add wave -noupdate -format Logic /tb_ac_in/uut/sync_end -add wave -noupdate -format Logic /tb_ac_in/uut/last_slot -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {53431686 ps} 0} {{Cursor 2} {44308511 ps} 0} {{Cursor 4} {677821715 ps} 0} -configure wave -namecolwidth 173 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {52190046 ps} {56168939 ps} diff --git a/lib/ac97_ctrl/sim/tb_ac_io.fdo b/lib/ac97_ctrl/sim/tb_ac_io.fdo deleted file mode 100644 index 4b0180f..0000000 --- a/lib/ac97_ctrl/sim/tb_ac_io.fdo +++ /dev/null @@ -1,15 +0,0 @@ -## NOTE: Do not edit this file. -## Autogenerated by ProjNav (creatfdo.tcl) on Tue Jun 05 17:37:16 Westeuropäische Normalzeit 2007 -## -vlib work -vcom -explicit -93 "../../../lib/misc/singleshot.vhd" -vcom -explicit -93 "../src/core/ac_out.vhd" -vcom -explicit -93 "../src/core/ac_in.vhd" -vcom -explicit -93 "../src/core/ac_io.vhd" -vcom -explicit -93 "../src/tb_ac_io.vhd" -vsim -t 1ps -lib work tb_ac_io -do {tb_ac_io.wdo} -view wave -view structure -view signals -run 700us diff --git a/lib/ac97_ctrl/sim/tb_ac_io.wdo b/lib/ac97_ctrl/sim/tb_ac_io.wdo deleted file mode 100644 index b445bdb..0000000 --- a/lib/ac97_ctrl/sim/tb_ac_io.wdo +++ /dev/null @@ -1,51 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_ac_io/uut/rst -add wave -noupdate -format Logic /tb_ac_io/uut/clk -add wave -noupdate -format Logic /tb_ac_io/uut/ready -add wave -noupdate -format Literal /tb_ac_io/uut/slot_valid -add wave -noupdate -format Logic /tb_ac_io/uut/sync_strobe -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/stat_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/stat_data -add wave -noupdate -format Literal /tb_ac_io/uut/rx_pcm_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/rx_pcm_data -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/cmd_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/cmd_data -add wave -noupdate -format Logic /tb_ac_io/uut/cmd_we -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/tx_pcm_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/tx_pcm_data -add wave -noupdate -format Logic /tb_ac_io/uut/tx_pcm_we -add wave -noupdate -divider {AC97 lines} -add wave -noupdate -format Logic /tb_ac_io/uut/ac_sdata_in -add wave -noupdate -format Logic /tb_ac_io/uut/ac_bit_clk -add wave -noupdate -format Logic /tb_ac_io/uut/ac_reset_n -add wave -noupdate -format Logic /tb_ac_io/uut/ac_sdata_out -add wave -noupdate -format Logic /tb_ac_io/uut/ac_ssync -add wave -noupdate -divider Debug -add wave -noupdate -format Logic /tb_ac_io/uut/inst_ac_in/stat_read -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/inst_ac_in/rx_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/inst_ac_out/tx_reg -add wave -noupdate -format Literal /tb_ac_io/uut/inst_ac_in/bitcnt -add wave -noupdate -format Literal /tb_ac_io/uut/inst_ac_in/sac -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_io/uut/inst_ac_in/tag -add wave -noupdate -format Literal /tb_ac_io/uut/inst_ac_in/data_array -add wave -noupdate -format Literal /tb_ac_io/uut/inst_ac_out/bitcnt -add wave -noupdate -format Literal /tb_ac_io/uut/inst_ac_out/slotcnt -add wave -noupdate -format Logic /tb_ac_io/uut/inst_ac_out/ssync -add wave -noupdate -format Literal /tb_ac_io/uut/inst_ac_out/slot_valid -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 4} {0 ps} 0} {{Cursor 2} {292930000 ps} 0} {{Cursor 4} {4999959266 ps} 0} -configure wave -namecolwidth 173 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {0 ps} {735 us} diff --git a/lib/ac97_ctrl/sim/tb_ac_out.fdo b/lib/ac97_ctrl/sim/tb_ac_out.fdo deleted file mode 100644 index ac9d3c4..0000000 --- a/lib/ac97_ctrl/sim/tb_ac_out.fdo +++ /dev/null @@ -1,13 +0,0 @@ -## NOTE: Do not edit this file. -## Autogenerated by ProjNav (creatfdo.tcl) on Tue Jun 05 17:37:16 Westeuropäische Normalzeit 2007 -## -vlib work -vcom -explicit -93 "../../../lib/src/misc/singleshot.vhd" -vcom -explicit -93 "../src/core/ac_out.vhd" -vcom -explicit -93 "../src/tb_ac_out.vhd" -vsim -t 1ps -lib work tb_ac_out -do {tb_ac_out.wdo} -view wave -view structure -view signals -run 600us diff --git a/lib/ac97_ctrl/sim/tb_ac_out.wdo b/lib/ac97_ctrl/sim/tb_ac_out.wdo deleted file mode 100644 index b9d9a25..0000000 --- a/lib/ac97_ctrl/sim/tb_ac_out.wdo +++ /dev/null @@ -1,41 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_ac_out/rst -add wave -noupdate -format Logic /tb_ac_out/clk -add wave -noupdate -format Logic /tb_ac_out/ce -add wave -noupdate -divider {Host hand shake} -add wave -noupdate -format Logic /tb_ac_out/sync_tx -add wave -noupdate -divider {Command I/F} -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_out/cmd_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_out/cmd_data -add wave -noupdate -format Logic /tb_ac_out/uut/cmd_we -add wave -noupdate -divider {PCM I/F} -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_out/pcm_in_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_out/pcm_in_data -add wave -noupdate -format Logic /tb_ac_out/pcm_in_we -add wave -noupdate -divider {AC97 I/F} -add wave -noupdate -format Logic /tb_ac_out/ac_bit_clk -add wave -noupdate -format Logic /tb_ac_out/ac_reset -add wave -noupdate -format Logic /tb_ac_out/ac_sdata_out -add wave -noupdate -format Logic /tb_ac_out/ac_ssync -add wave -noupdate -divider Debug -add wave -noupdate -format Literal -radix hexadecimal /tb_ac_out/uut/tx_reg -add wave -noupdate -format Literal /tb_ac_out/uut/sac -add wave -noupdate -format Literal /tb_ac_out/uut/bitcnt -add wave -noupdate -format Literal /tb_ac_out/uut/slotcnt -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {544839100 ps} 0} -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {532851785 ps} {556826415 ps} diff --git a/lib/ac97_ctrl/src/core/ac97_wb.vhd b/lib/ac97_ctrl/src/core/ac97_wb.vhd deleted file mode 100644 index 1b4fb57..0000000 --- a/lib/ac97_ctrl/src/core/ac97_wb.vhd +++ /dev/null @@ -1,330 +0,0 @@ -LIBRARY IEEE; -USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.NUMERIC_STD.ALL; - -ENTITY ac97_wb IS - Generic - ( - fifo_depth : natural := 8 - ); - Port - ( - -- J-Bus domain - CLK_I : in STD_LOGIC; - RST_I : in STD_LOGIC; - CYC_I : in STD_LOGIC; - STB_I : in STD_LOGIC; - WE_I : in STD_LOGIC; - ACK_O : out STD_LOGIC; - SRDY_O : out STD_LOGIC; - MRDY_I : in STD_LOGIC; - ADDR_I : in unsigned(31 downto 0); - DAT_I : in unsigned(31 downto 0); - DAT_O : out unsigned(31 downto 0); - INT_O : out STD_LOGIC; - - -- AC97 domain - ac97_sdata_in : in std_logic; - ac97_bit_clk : in std_logic; - ac97_reset_n : out std_logic; - ac97_sdata_out : out std_logic; - ac97_ssync : out std_logic - ); -END ac97_wb; - -ARCHITECTURE behavior OF ac97_wb IS - - constant ac_data_width : natural := 20; - constant pcm_data_width : natural := 18; - constant stat_data_width : natural := 16; - signal cmd_reg_we : std_logic; - signal cmd_pending : std_logic; - signal ac_cmd_data : unsigned(ac_data_width-1 downto 0); - signal ac_cmd_addr : unsigned(ac_data_width-1 downto 0); - signal ac_cmd_we : std_logic; - signal ac_tx_pcm_we : std_logic; - - signal stat_reg : unsigned(stat_data_width-1 downto 0); - signal stat_reg_re : std_logic; - signal stat_valid : std_logic; - signal stat_pending : std_logic; - signal ac_stat_data : unsigned(ac_data_width-1 downto 0); - signal ac_stat_addr : unsigned(ac_data_width-1 downto 0); - signal ac_stat_read : std_logic; - signal ac_stat_valid : std_logic; - - signal ac_tx_pcm_data : unsigned(ac_data_width-1 downto 0); - signal ac_tx_pcm_addr : unsigned (3 downto 0); - signal ac_rx_pcm_data : unsigned(ac_data_width-1 downto 0); - signal ac_rx_pcm_addr : unsigned (3 downto 0); - signal ac_sync_strobe : unsigned(0 to 2); - signal ac_slot_valid : unsigned(0 to 12); - signal ac_ready : std_logic; - signal rx_frame_valid : std_logic; - signal sync_frame : std_logic; - signal sync_tx : std_logic; - signal sync_status : std_logic; - signal request : unsigned(3 to 12); - - signal tx_data_start : std_logic; - signal tx_fifo_din : unsigned(pcm_data_width-1 downto 0); - signal tx_fifo_dout : unsigned(pcm_data_width-1 downto 0); - signal tx_fifo_re : std_logic; - signal tx_fifo_we : std_logic; - signal tx_fifo_full : std_logic; - signal tx_fifo_empty : std_logic; - signal tx_fifo_almost_full : std_logic; - signal tx_fifo_almost_empty : std_logic; - - signal rx_data_irq : std_logic; - signal rx_data_ack : std_logic; - - signal ac97_stat : unsigned(31 downto 0); - signal addr_reg : unsigned(31 downto 0); - signal data_reg : unsigned(31 downto 0); - signal int_en_frame_sync : std_logic; - signal int_en_rx : std_logic; - signal int_en_tx : std_logic; - signal rx_en : std_logic; - signal tx_en : std_logic; - signal rx_fifo_rst : std_logic; - signal tx_fifo_rst : std_logic; - - function GetRequest(slot1 : unsigned) return unsigned is - variable res : unsigned(3 to 12); - begin - res := (others => '0'); - for i in res'range loop - res(i) := not slot1(14-i); - end loop; - return res; - - end GetRequest; - - type ac_state_t is (reset, idle, pcm_3, pcm_4); - signal rx_state, rx_state_n : ac_state_t; - -begin - - SRDY_O <= CYC_I; - INT_O <= (rx_data_irq and int_en_rx) or (not tx_fifo_full and int_en_tx) or (sync_frame and int_en_frame_sync) ; - - rx_frame_valid <= ac_slot_valid(0); - sync_frame <= ac_sync_strobe(0); - sync_status <= ac_sync_strobe(1); - sync_tx <= ac_sync_strobe(2); - request <= GetRequest(ac_stat_addr); - - ac_stat_read <= not addr_reg(9); - ac_stat_valid <= '1' when (sync_status = '1' and ac_slot_valid(0 to 2) = "111") else '0'; - ac97_stat <= ac_ready & '0' & X"00000" & '0' & int_en_rx & int_en_tx & int_en_frame_sync & '0' & tx_fifo_full & rx_data_irq & tx_fifo_almost_full & stat_valid & cmd_pending; - -command_logic: - process (CLK_I) - begin - - if rising_edge(CLK_I) then - ac_cmd_we <= '0'; - if RST_I = '1' then - cmd_pending <= '0'; - elsif cmd_reg_we = '1' and cmd_pending = '0' then - cmd_pending <= '1'; - elsif (rx_frame_valid and sync_tx) = '1' and cmd_pending = '1' then - ac_cmd_we <= '1'; - cmd_pending <= '0'; - end if; - end if; - end process; - -status_logic: - process (CLK_I) - begin - - if rising_edge(CLK_I) then - if RST_I = '1' then - stat_pending <= '0'; - elsif cmd_reg_we = '1' and cmd_pending = '0' then - stat_pending <= ac_stat_read; - elsif ac_stat_valid = '1' then - stat_pending <= '0'; - end if; - end if; - end process; - -command_register: - process (CLK_I) - begin - if rising_edge(CLK_I) then - if cmd_reg_we = '1' and cmd_pending = '0' then - ac_cmd_addr <= ac_stat_read & addr_reg(8 downto 2) & X"000"; - ac_cmd_data <= data_reg(stat_data_width-1 downto 0) & X"0"; - end if; - end if; - end process; - -status_register: - process (CLK_I) - begin - - if rising_edge(CLK_I) then - if RST_I = '1' then - stat_valid <= '0'; - elsif stat_pending = '1' and ac_stat_valid = '1' then - stat_reg <= ac_stat_data(ac_data_width-1 downto ac_data_width-stat_data_width); - stat_valid <= '1'; - elsif stat_reg_re = '1' then - stat_valid <= '0'; - end if; - end if; - end process; - - -- Instantiate synchronous FIFO -inst_tx_fifo: entity work.fifo_sync - GENERIC MAP - ( - addr_width => fifo_depth, - data_width => pcm_data_width, - almost_full_thresh => 90*(2**fifo_depth)/100, - almost_empty_thresh => 10*(2**fifo_depth)/100 - ) - PORT MAP - ( - rst => tx_fifo_rst, - clk => CLK_I, - we => tx_fifo_we, - re => tx_fifo_re, - fifo_full => tx_fifo_full, - fifo_empty => tx_fifo_empty, - fifo_afull => tx_fifo_almost_full, - fifo_aempty => tx_fifo_almost_empty, - data_w => tx_fifo_din, - data_r => tx_fifo_dout - ); - tx_fifo_rst <= not tx_en or RST_I; - -tx_logic: - process (CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' or tx_en = '0' then - ac_tx_pcm_addr <= "0011"; - tx_data_start <= '0'; - elsif sync_tx = '1' and (request(3) and request(4)) = '1' then - ac_tx_pcm_addr <= "0011"; - tx_data_start <= '1'; - elsif ac_tx_pcm_addr /= "0100" then - ac_tx_pcm_addr <= ac_tx_pcm_addr + 1; - else - tx_data_start <= '0'; - end if; - end if; - end process; - - ac_tx_pcm_we <= not tx_fifo_empty and tx_data_start; - tx_fifo_re <= ac_tx_pcm_we; - - tx_fifo_din <= data_reg(pcm_data_width-1 downto 0); - - ac_rx_pcm_addr <= addr_reg(5 downto 2); - -rx_logic: - process (CLK_I) - begin - if rising_edge(CLK_I) then - if RST_I = '1' then - rx_data_irq <= '0'; - elsif rx_frame_valid = '1' and sync_frame = '1' then - if ac_slot_valid(3) = '1' and ac_slot_valid(4) = '1' then - rx_data_irq <= rx_en; - end if; - elsif rx_data_ack = '1' then - rx_data_irq <= '0'; - end if; - end if; - end process; - -inst_ac_io : entity work.ac_io - PORT MAP - ( - rst => RST_I, - clk => CLK_I, - ready => ac_ready, - sync_strobe => ac_sync_strobe, - slot_valid => ac_slot_valid, - stat_addr => ac_stat_addr, - stat_data => ac_stat_data, - rx_pcm_addr => ac_rx_pcm_addr, - rx_pcm_data => ac_rx_pcm_data, - cmd_addr => ac_cmd_addr, - cmd_data => ac_cmd_data, - cmd_we => ac_cmd_we, - tx_pcm_addr => ac_tx_pcm_addr, - tx_pcm_data => ac_tx_pcm_data, - tx_pcm_we => ac_tx_pcm_we, - ac_sdata_in => ac97_sdata_in, - ac_bit_clk => ac97_bit_clk, - ac_reset_n => ac97_reset_n, - ac_sdata_out => ac97_sdata_out, - ac_ssync => ac97_ssync - ); - - ac_tx_pcm_data <= tx_fifo_dout & (ac_data_width-pcm_data_width-1 downto 0 => '0'); - -slave_data_out: - process (CLK_I) - begin - - if rising_edge(CLK_I) then - tx_fifo_we <= '0'; - stat_reg_re <= '0'; - cmd_reg_we <= '0'; - rx_data_ack <= '0'; - ACK_O <= '0'; - if RST_I = '1' then - addr_reg <= (others => '0'); - int_en_frame_sync <= '0'; - int_en_rx <= '0'; - int_en_tx <= '0'; - tx_en <= '0'; - rx_en <= '0'; - else --- DAT_O <= (others => '-'); - - if (STB_I and CYC_I) = '1' then - ACK_O <= not WE_I; - - case ADDR_I(11 downto 10) is - - when "00" => - DAT_O <= ac97_stat; - if WE_I = '1' then - int_en_frame_sync <= DAT_I(0); - int_en_tx <= DAT_I(1); - int_en_rx <= DAT_I(2); - tx_en <= DAT_I(4); - rx_en <= DAT_I(5); - end if; - when "01" => - addr_reg <= ADDR_I; - data_reg <= DAT_I; - stat_reg_re <= not WE_I; - cmd_reg_we <= WE_I; - DAT_O <= (31 downto stat_data_width => '0') & stat_reg; - - when "10" => - rx_data_ack <= not WE_I; - addr_reg <= ADDR_I; - data_reg <= DAT_I; - tx_fifo_we <= WE_I; - DAT_O <= (31 downto pcm_data_width => ac_rx_pcm_data(ac_data_width-1)) & ac_rx_pcm_data(ac_data_width-1 downto ac_data_width-pcm_data_width); - - when others => null; - - end case; - end if; - end if; - end if; - - end process; - -end behavior; diff --git a/lib/ac97_ctrl/src/core/ac_in.vhd b/lib/ac97_ctrl/src/core/ac_in.vhd deleted file mode 100644 index a072a9b..0000000 --- a/lib/ac97_ctrl/src/core/ac_in.vhd +++ /dev/null @@ -1,309 +0,0 @@ ----------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 08:27:43 08/26/2006 --- Design Name: --- Module Name: ac_out - Behavioral --- Project Name: --- Target Devices: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- ----------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - ----- Uncomment the following library declaration if instantiating ----- any Xilinx primitives in this code. ---library UNISIM; ---use UNISIM.VComponents.all; - -entity ac_in is - Port ( - rst : in std_logic; - clk : in std_logic; - sync_frame : out std_logic; - sync_status : out std_logic; - slot_valid : out unsigned(0 to 12); - stat_addr : out unsigned (19 downto 0); - stat_data : out unsigned (19 downto 0); - pcm_out_addr : in unsigned (3 downto 0); - pcm_out_data : out unsigned (19 downto 0); - ac_reset : in std_logic; - ac_bit_clk : in std_logic; - ac_sdata_in : in std_logic; - ac_ssync : in std_logic - ); -end ac_in; - -architecture Behavioral of ac_in is - ------------------------------------------------------------------- -COMPONENT singleshot -GENERIC (mode : integer); -PORT( - rst : IN std_logic; - clk : IN std_logic; - input : IN std_logic; - output : OUT std_logic - ); -END COMPONENT; - ------------------------------------------------------------------- -type sac_t is (ac_idle, ac_tag, ac_data); -subtype bitcnt_t is integer range 0 to 19; -subtype slotcnt_t is integer range 0 to 12; -subtype slot_valid_t is UNSIGNED(0 to 12); -subtype tag_t is UNSIGNED(15 downto 0); -subtype slot_t is UNSIGNED(19 downto 0); -type slot_array_t is array (natural range <>) of slot_t; - -signal data_array : slot_array_t (1 to 12); -signal tag : tag_t; - -signal sac, snac : sac_t; -signal bitcnt : bitcnt_t; -signal bitcnt_rst, bitcnt_en : STD_LOGIC; -signal slotcnt : slotcnt_t; -signal slotcnt_rst, slotcnt_en : STD_LOGIC; - -signal rx_reg : slot_t; -signal stat_read, host_update : STD_LOGIC; -signal sync_end, slot_end, last_slot, start_of_frame : STD_LOGIC; - ------------------------------------------------------------------- -function GetSlotValid(data : tag_t) return slot_valid_t is -variable res : slot_valid_t := (others => '0'); -begin - res := (others => '0'); - for i in slot_valid_t'range loop - res(i) := data(data'left-i); - end loop; - return res; - -end GetSlotValid; - ------------------------------------------------------------------- -begin - -------------------------------------------------------------- --- proc_status_flags -------------------------------------------------------------- -proc_status_flags: -process (rst, clk, host_update, tag, data_array) -begin - if rising_edge(clk) then - sync_status <= '0'; - if rst = '1' then - slot_valid <= (others => '0'); - stat_addr <= (others => '0'); - stat_data <= (others => '0'); - elsif host_update = '1' then - sync_status <= '1'; - slot_valid <= GetSlotValid(tag); - stat_addr <= data_array(1); - stat_data <= data_array(2); - end if; - end if; -end process; - -------------------------------------------------------------- --- proc_pcm_data -------------------------------------------------------------- -proc_pcm_data: -process (clk, pcm_out_addr, data_array) -variable slot_id : integer range 0 to 12; -begin - pcm_out_data <= (others => '-'); - slot_id := to_integer(pcm_out_addr); - if (slot_id > 2) then - pcm_out_data <= data_array(slot_id); - end if; -end process; - -------------------------------------------------------------- --- proc_read_data -------------------------------------------------------------- -proc_read_data : -process (ac_reset, ac_bit_clk, slot_end, slotcnt) -begin - - if ac_reset = '1' then - stat_read <= '0'; - elsif rising_edge(ac_bit_clk) then - stat_read <= '0'; - if slot_end = '1' and slotcnt /= 0 then - data_array(slotcnt) <= rx_reg; - if slotcnt = 2 then - stat_read <= '1'; - end if; - end if; - end if; -end process; - -------------------------------------------------------------- --- proc_read_stat -------------------------------------------------------------- -proc_read_tag : -process (ac_reset, ac_bit_clk, sync_end) -begin - - if ac_reset = '1' then - tag <= (others => '0'); - elsif rising_edge(ac_bit_clk) then - if sync_end = '1' then - tag <= rx_reg(15 downto 0); - end if; - end if; - -end process; - -------------------------------------------------------------- --- proc_slot_count -------------------------------------------------------------- -proc_slot_count: -process (slotcnt_rst, ac_bit_clk, slotcnt_en, slotcnt) -begin - if rising_edge(ac_bit_clk) then - if slotcnt_rst = '1' then - slotcnt <= slotcnt_t'low; - elsif slotcnt_en = '1' then - if slotcnt /= slotcnt_t'high then - slotcnt <= slotcnt + 1; - else - slotcnt <= slotcnt_t'low; - end if; - end if; - end if; -end process; - -------------------------------------------------------------- --- proc_bit_count -------------------------------------------------------------- -proc_bit_count: -process (bitcnt_rst, ac_bit_clk, bitcnt_en, bitcnt) -begin - if rising_edge(ac_bit_clk) then - if bitcnt_rst = '1' then - bitcnt <= bitcnt_t'low; - elsif bitcnt_en = '1' then - if bitcnt /= bitcnt_t'high then - bitcnt <= bitcnt + 1; - else - bitcnt <= bitcnt_t'low; - end if; - end if; - end if; -end process; - ------------------------------------------------------------------- -proc_ac_fsm: -process (bitcnt, slotcnt, sac, ac_ssync) -begin - snac <= sac; - bitcnt_rst <= '0'; - bitcnt_en <= '1'; - slotcnt_rst <= '0'; - slotcnt_en <= '0'; - slot_end <= '0'; - sync_end <= '0'; - last_slot <= '0'; - start_of_frame <= '0'; - - if bitcnt = 19 then - slot_end <= '1'; - end if; - if slotcnt = 12 and bitcnt = 19 then - last_slot <= '1'; - end if; - - case sac is - - when ac_idle => - bitcnt_rst <= '1'; - slotcnt_rst <= '1'; - if (ac_ssync = '1') then - snac <= ac_tag; - end if; - - when ac_tag => - if (bitcnt = 0) then - start_of_frame <= '1'; - elsif (bitcnt = 15) then - slotcnt_en <= '1'; - bitcnt_rst <= '1'; - sync_end <= '1'; - if (ac_ssync = '0') then - snac <= ac_data; - else - snac <= ac_idle; - end if; - end if; - - when ac_data => - if bitcnt = 19 then - slotcnt_en <= '1'; - if slotcnt = 12 then - slotcnt_rst <= '1'; - snac <= ac_tag; - end if; - end if; - when others => null; - end case; -end process; - -proc_ac_fsm_next: -process (ac_reset, ac_bit_clk, snac) -begin - if ac_reset = '1' then - sac <= ac_idle; - elsif rising_edge(ac_bit_clk) then - sac <= snac; - end if; -end process; - -------------------------------------------------------------- --- Receive Shift Register -------------------------------------------------------------- -process (ac_reset, ac_bit_clk, ac_sdata_in) -begin - if ac_reset = '1' then - rx_reg <= (others => '0'); - elsif falling_edge(ac_bit_clk) then - rx_reg <= rx_reg(rx_reg'left-1 downto 0) & ac_sdata_in; - end if; -end process; - ------------------------------------------------------------------- -singleshot_inst1: singleshot -GENERIC MAP ( - mode => 0) -PORT MAP( - rst => rst, - clk => clk, - input => stat_read, - output => host_update -); - -singleshot_inst2: singleshot -GENERIC MAP ( - mode => 1) -PORT MAP( - rst => rst, - clk => clk, - input => start_of_frame, - output => sync_frame -); - -------------------------------------------------------------- - -end Behavioral; - diff --git a/lib/ac97_ctrl/src/core/ac_io.vhd b/lib/ac97_ctrl/src/core/ac_io.vhd deleted file mode 100644 index 211a5ef..0000000 --- a/lib/ac97_ctrl/src/core/ac_io.vhd +++ /dev/null @@ -1,189 +0,0 @@ ----------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 18:29:55 08/26/2006 --- Design Name: --- Module Name: ac_io - Behavioral --- Project Name: --- Target Devices: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- ----------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - ----- Uncomment the following library declaration if instantiating ----- any Xilinx primitives in this code. ---library UNISIM; ---use UNISIM.VComponents.all; - -entity ac_io is - Port - ( - rst : in std_logic; - clk : in std_logic; - ready : out std_logic; - sync_strobe : out unsigned(0 to 2); - slot_valid : out unsigned(0 to 12); - stat_addr : out unsigned (19 downto 0); - stat_data : out unsigned (19 downto 0); - rx_pcm_addr : in unsigned (3 downto 0); - rx_pcm_data : out unsigned (19 downto 0); - cmd_addr : in unsigned(19 downto 0); - cmd_data : in unsigned(19 downto 0); - cmd_we : in std_logic; - tx_pcm_addr : in unsigned(3 downto 0); - tx_pcm_data : in unsigned(19 downto 0); - tx_pcm_we : in std_logic; - ac_sdata_in : in std_logic; - ac_bit_clk : in std_logic; - ac_reset_n : out std_logic; - ac_sdata_out : out std_logic; - ac_ssync : out std_logic - ); -end ac_io; - -architecture Behavioral of ac_io is - - COMPONENT ac_in - Port - ( - rst : in std_logic; - clk : in std_logic; - sync_frame : out std_logic; - sync_status : out std_logic; - slot_valid : out unsigned(0 to 12); - stat_addr : out unsigned (19 downto 0); - stat_data : out unsigned (19 downto 0); - pcm_out_addr : in unsigned (3 downto 0); - pcm_out_data : out unsigned (19 downto 0); - ac_reset : in std_logic; - ac_bit_clk : in std_logic; - ac_sdata_in : in std_logic; - ac_ssync : in std_logic - ); - END COMPONENT; - - COMPONENT ac_out - PORT - ( - rst : in std_logic; - clk : in std_logic; - sync_tx : out std_logic; - cmd_addr : in unsigned(19 downto 0); - cmd_data : in unsigned(19 downto 0); - cmd_we : in std_logic; - pcm_in_addr : in unsigned(3 downto 0); - pcm_in_data : in unsigned(19 downto 0); - pcm_in_we : in std_logic; - ac_bit_clk : in std_logic; - ac_reset : in std_logic; - ac_sdata_out : out std_logic; - ac_ssync : out std_logic - ); - END COMPONENT; - - SIGNAL ac_reset : std_logic; - SIGNAL ssync_rx : std_logic; - SIGNAL ssync_tx : std_logic; - SIGNAL sync_frame : std_logic; - SIGNAL sync_status : std_logic; - SIGNAL sync_tx : std_logic; - -begin - -inst_ac_in: ac_in - PORT MAP - ( - rst => rst, - clk => clk, - sync_frame => sync_frame, - sync_status => sync_status, - slot_valid => slot_valid, - stat_addr => stat_addr, - stat_data => stat_data, - pcm_out_addr => rx_pcm_addr, - pcm_out_data => rx_pcm_data, - ac_reset => ac_reset, - ac_bit_clk => ac_bit_clk, - ac_sdata_in => ac_sdata_in, - ac_ssync => ssync_rx - ); - -inst_ac_out: ac_out - PORT MAP - ( - rst => rst, - clk => clk, - sync_tx => sync_tx, - cmd_addr => cmd_addr, - cmd_data => cmd_data, - cmd_we => cmd_we, - pcm_in_addr => tx_pcm_addr, - pcm_in_data => tx_pcm_data, - pcm_in_we => tx_pcm_we, - ac_reset => ac_reset, - ac_bit_clk => ac_bit_clk, - ac_sdata_out => ac_sdata_out, - ac_ssync => ssync_tx - ); - - ------------------------------------------------------------------ - ready <= not ac_reset; - ac_ssync <= ssync_tx; - ssync_rx <= ssync_tx; - sync_strobe <= sync_frame & sync_status & sync_tx; - - ------------------------------------------------------------------ - proc_reset_gen: - process (rst, clk, ac_bit_clk) - type rstate_t is (s0, s1); - variable rstate, rstaten : rstate_t; - subtype cnt_t is integer range 0 to 999; - variable cnt : cnt_t; - begin - if rising_edge(clk) then - if rst = '1' then - rstate := s0; - cnt := cnt_t'high; - ac_reset <= '1'; - ac_reset_n <= '0'; - else - rstaten := rstate; - case rstate is - when s0 => - if cnt /= 0 then - cnt := cnt - 1; - else - ac_reset_n <= '1'; - if ac_bit_clk = '1' then - rstaten := s1; - cnt := cnt_t'high; - end if; - end if; - - when s1 => - if cnt /= 0 then - cnt := cnt - 1; - else - ac_reset <= '0'; - end if; - end case; - rstate := rstaten; - end if; - end if; - end process; - - ------------------------------------------------------------------ - -end Behavioral; - diff --git a/lib/ac97_ctrl/src/core/ac_out.vhd b/lib/ac97_ctrl/src/core/ac_out.vhd deleted file mode 100644 index a770495..0000000 --- a/lib/ac97_ctrl/src/core/ac_out.vhd +++ /dev/null @@ -1,276 +0,0 @@ ----------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 15:41:12 06/05/2007 --- Design Name: --- Module Name: ac_out - Behavioral --- Project Name: --- Target Devices: --- Tool versions: --- Description: --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- ----------------------------------------------------------------------------------- -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.NUMERIC_STD.ALL; - ----- Uncomment the following library declaration if instantiating ----- any Xilinx primitives in this code. ---library UNISIM; ---use UNISIM.VComponents.all; - -entity ac_out is - Port ( - rst : in std_logic; - clk : in std_logic; - sync_tx : out std_logic; - cmd_addr : in unsigned (19 downto 0); - cmd_data : in unsigned (19 downto 0); - cmd_we : in std_logic; - pcm_in_addr : in unsigned (3 downto 0); - pcm_in_data : in unsigned (19 downto 0); - pcm_in_we : in std_logic; - ac_reset : in std_logic; - ac_bit_clk : in std_logic; - ac_sdata_out : out std_logic; - ac_ssync : out std_logic - ); -end ac_out; - -architecture Behavioral of ac_out is - ------------------------------------------------------------------- -COMPONENT singleshot -GENERIC (mode : integer); -PORT( - rst : IN std_logic; - clk : IN std_logic; - input : IN std_logic; - output : OUT std_logic - ); -END COMPONENT; - ------------------------------------------------------------------- -subtype tag_t is UNSIGNED(15 downto 0); -subtype slot_valid_t is UNSIGNED(1 to 12); -signal slot_valid : slot_valid_t; -subtype slot_t is UNSIGNED(19 downto 0); -type slot_array_t is array (natural range <>) of slot_t; -signal data_array : slot_array_t (1 to 12); - signal tx_reg : UNSIGNED(19 downto 0); -signal last_slot, ssync : STD_LOGIC; - -type sac_t is (ac_idle, ac_tag, ac_data); -signal sac, snac : sac_t; - -subtype bitcnt_t is integer range 0 to 19; -subtype slotcnt_t is integer range 0 to 12; - -signal bitcnt : bitcnt_t; -signal bitcnt_rst, bitcnt_en : STD_LOGIC; -signal slotcnt : slotcnt_t; -signal slotcnt_rst, slotcnt_en : STD_LOGIC; - -signal slot_start : STD_LOGIC; - ------------------------------------------------------------------- -function CreateTag(slot_valid : slot_valid_t) return tag_t is -variable tag : tag_t := (others => '0'); -begin - tag := (others => '0'); - for i in slot_valid_t'range loop - tag(15-i) := slot_valid(i); - if slot_valid(i) = '1' then - tag(15) := '1'; - end if; - end loop; - tag(0) := '0'; -- ID0 - tag(1) := '0'; -- ID1 - tag(2) := '0'; -- Reserved --- tag(15) := '1'; -- Frame is valid - return tag; - -end CreateTag; - -begin - ------------------------------------------------------------------- -proc_slot_reg: -process (clk, cmd_addr, cmd_data, cmd_we, pcm_in_data, pcm_in_we, pcm_in_addr, last_slot) -variable slot_id : integer range 0 to 12; -begin - slot_id := to_integer(pcm_in_addr); - if rising_edge(clk) then - if rst = '1' then - for i in data_array'range(1) loop - data_array(i) <= (others => '0'); - end loop; - slot_valid <= (others => '0'); - elsif last_slot = '1' then - slot_valid <= (others => '0'); - else - if cmd_we = '1' then - slot_valid(1) <= '1'; - slot_valid(2) <= '1'; - data_array(1) <= cmd_addr; - data_array(2) <= cmd_data; - end if; - if pcm_in_we = '1' then - if (slot_id > 2) then - data_array(slot_id) <= pcm_in_data; - slot_valid(slot_id) <= '1'; - end if; - end if; - end if; - end if; -end process; - -------------------------------------------------------------- --- proc_slot_count -------------------------------------------------------------- -proc_slot_count: -process (slotcnt_rst, ac_bit_clk, slotcnt_en, slotcnt) -begin - if rising_edge(ac_bit_clk) then - if slotcnt_rst = '1' then - slotcnt <= slotcnt_t'low; - elsif slotcnt_en = '1' then - if slotcnt /= slotcnt_t'high then - slotcnt <= slotcnt + 1; - else - slotcnt <= slotcnt_t'low; - end if; - end if; - end if; -end process; - ------------------------------------------------------------------- --- proc_bit_count ------------------------------------------------------------------- -proc_bit_count: -process (bitcnt_rst, ac_bit_clk, bitcnt_en, bitcnt) -begin - if rising_edge(ac_bit_clk) then - if bitcnt_rst = '1' then - bitcnt <= bitcnt_t'low; - elsif bitcnt_en = '1' then - if bitcnt /= bitcnt_t'high then - bitcnt <= bitcnt + 1; - else - bitcnt <= bitcnt_t'low; - end if; - end if; - end if; -end process; - ------------------------------------------------------------------- -proc_ac_fsm: -process (bitcnt, slotcnt, sac) -begin - snac <= sac; - bitcnt_rst <= '0'; - bitcnt_en <= '1'; - slotcnt_rst <= '0'; - slotcnt_en <= '0'; - slot_start <= '0'; - ssync <= '0'; - - if bitcnt = 0 then - slot_start <= '1'; - end if; - - case sac is - - when ac_idle => - bitcnt_rst <= '1'; - slotcnt_rst <= '1'; - snac <= ac_tag; - - when ac_tag => - ssync <= '1'; - if (bitcnt = 15) then - slotcnt_en <= '1'; - bitcnt_rst <= '1'; - snac <= ac_data; - end if; - - when ac_data => - if bitcnt = 19 then - slotcnt_en <= '1'; - if slotcnt = 12 then - slotcnt_rst <= '1'; - snac <= ac_tag; - end if; - end if; - when others => null; - end case; -end process; - -proc_ac_fsm_next: -process (ac_reset, ac_bit_clk, snac) -begin - if ac_reset = '1' then - sac <= ac_idle; - elsif rising_edge(ac_bit_clk) then - sac <= snac; - end if; -end process; - ------------------------------------------------------------------- -proc_tx_shift_reg: -process (ac_reset, ac_bit_clk, tx_reg, ssync, slot_valid, data_array) -begin - - if ac_reset = '1' then - tx_reg <= (others => '0'); - elsif rising_edge(ac_bit_clk) then - last_slot <= '0'; - if slot_start = '1' then - if ssync = '1' then - tx_reg <= CreateTag(slot_valid) & "0000"; - else - if slotcnt /= 0 then - tx_reg <= data_array(slotcnt); - if slotcnt = 12 then - last_slot <= '1'; - end if; - end if; - end if; - else - tx_reg <= tx_reg(tx_reg'left-1 downto 0) & '0'; - end if; - end if; -end process; - ------------------------------------------------------------------- -proc_ac_sync_out: -process (ac_reset, ac_bit_clk, ssync, tx_reg) -begin - if ac_reset = '1' then - ac_ssync <= '0'; - ac_sdata_out <= '0'; - elsif rising_edge(ac_bit_clk) then - ac_ssync <= ssync; - ac_sdata_out <= tx_reg(tx_reg'left); - end if; -end process; - ------------------------------------------------------------------- -singleshot_inst1: singleshot -GENERIC MAP ( - mode => 0) -PORT MAP( - rst => rst, - clk => clk, - input => last_slot, - output => sync_tx -); - -end Behavioral; diff --git a/lib/ac97_ctrl/src/tb_ac97_wb.vhd b/lib/ac97_ctrl/src/tb_ac97_wb.vhd deleted file mode 100644 index 7ab47a4..0000000 --- a/lib/ac97_ctrl/src/tb_ac97_wb.vhd +++ /dev/null @@ -1,152 +0,0 @@ - --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 17:33:47 06/05/2007 --- Design Name: eval_ac --- Module Name: E:/work/VHDL/eval_ac/tb_eval_ac.vhd --- Project Name: ac_out --- Target Device: --- Tool versions: --- Description: --- --- VHDL Test Bench Created by ISE for module: ac_out --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --- Notes: --- This testbench has been automatically generated using types std_logic and --- std_logic_vector for the ports of the unit under test. Xilinx recommends --- that these types always be used for the top-level I/O of a design in order --- to guarantee that the testbench will bind correctly to the post-implementation --- simulation model. --------------------------------------------------------------------------------- -LIBRARY ieee; -USE ieee.std_logic_1164.ALL; -USE ieee.numeric_std.ALL; - -ENTITY tb_ac97_wb IS -END tb_ac97_wb; - -ARCHITECTURE behavior OF tb_ac97_wb IS - - constant SYS_CLK_PERIOD : time := 10 ns; - CONSTANT BIT_CLK_PERIOD : time := 100 ns; --- constant BIT_CLK_PERIOD : time := 81.38 ns; - - signal CLK_O : std_logic := '1'; - signal RST_O : std_logic := '1'; - signal CYC_O : std_logic := '0'; - signal STB_O : std_logic := '0'; - signal WE_O : std_logic := '0'; - signal ACK_I : std_logic; - signal MRDY_O : std_logic := '1'; - signal SRDY_I : std_logic; - signal INT_I : std_logic; - signal ADDR_O : unsigned(31 downto 0) := (others => '-'); - signal DAT_I : unsigned(31 downto 0); - signal DAT_O : unsigned(31 downto 0) := (others => '-'); - - signal dout_rst : std_logic := '0'; - signal dout_reg : unsigned(31 downto 0); - signal dout_cnt : natural range 0 to 255; - - SIGNAL ac97_bit_clk : std_logic := '0'; - SIGNAL ac97_reset_n : std_logic; - SIGNAL ac97_sdata_out : std_logic; - SIGNAL ac97_ssync : std_logic; - SIGNAL ac97_sdata_in : std_logic; - -BEGIN - - -- Instantiate the Unit Under Test (UUT) -uut : entity work.ac97_wb - GENERIC MAP - ( - fifo_depth => 4 - ) - PORT MAP - ( - -- J-Bus domain - CLK_I => CLK_O, - RST_I => RST_O, - CYC_I => CYC_O, - STB_I => STB_O, - WE_I => WE_O, - ACK_O => ACK_I, - SRDY_O => SRDY_I, - MRDY_I => MRDY_O, - ADDR_I => ADDR_O, - DAT_I => DAT_O, - DAT_O => DAT_I, - INT_O => INT_I, - - -- AC97 domain - ac97_sdata_in => ac97_sdata_in, - ac97_bit_clk => ac97_bit_clk, - ac97_reset_n => ac97_reset_n, - ac97_sdata_out => ac97_sdata_out, - ac97_ssync => ac97_ssync - ); - - - ac97_sdata_in <= ac97_sdata_out; - -CLK_GEN: process - begin - wait for SYS_CLK_PERIOD/2; - CLK_O <= not CLK_O; - end process; - - bit_clk_gen : PROCESS - begin - if (ac97_reset_n = '0') then - ac97_bit_clk <= '0'; - wait until ac97_reset_n = '1'; - wait for 150 us; - end if; - wait for BIT_CLK_PERIOD/2; - ac97_bit_clk <= not ac97_bit_clk; - END PROCESS; - -STIMULUS: process - - begin - - wait for 3*SYS_CLK_PERIOD; - RST_O <= '0'; - - wait for 200 us; - wait until rising_edge(CLK_O); - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '0'; - DAT_O <= X"0000_0000"; - ADDR_O <= X"0000_0000"; - wait until rising_edge(CLK_O); - STB_O <= '0'; - wait until rising_edge(CLK_O) and ACK_I = '1'; - CYC_O <= '0'; - - wait until rising_edge(CLK_O); - - CYC_O <= '1'; - STB_O <= '1'; - WE_O <= '1'; - DAT_O <= X"5555_1000"; - ADDR_O <= X"0000_0800"; - wait until rising_edge(CLK_O); - DAT_O <= X"5555_1001"; - wait until rising_edge(CLK_O); - STB_O <= '0'; - CYC_O <= '0'; - - WAIT; - END PROCESS; -END; diff --git a/lib/ac97_ctrl/src/tb_ac_in.vhd b/lib/ac97_ctrl/src/tb_ac_in.vhd deleted file mode 100644 index 359e79b..0000000 --- a/lib/ac97_ctrl/src/tb_ac_in.vhd +++ /dev/null @@ -1,203 +0,0 @@ - --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 17:33:47 06/05/2007 --- Design Name: eval_ac --- Module Name: E:/work/VHDL/eval_ac/tb_eval_ac.vhd --- Project Name: ac_out --- Target Device: --- Tool versions: --- Description: --- --- VHDL Test Bench Created by ISE for module: ac_out --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --- Notes: --- This testbench has been automatically generated using types std_logic and --- std_logic_vector for the ports of the unit under test. Xilinx recommends --- that these types always be used for the top-level I/O of a design in order --- to guarantee that the testbench will bind correctly to the post-implementation --- simulation model. --------------------------------------------------------------------------------- -LIBRARY ieee; -USE ieee.std_logic_1164.ALL; -USE ieee.numeric_std.ALL; - -ENTITY tb_ac_in IS -END tb_ac_in; - -ARCHITECTURE behavior OF tb_ac_in IS - - -- Component Declaration for the Unit Under Test (UUT) - COMPONENT ac_in - Port ( - rst : in std_logic; - clk : in std_logic; - sync_frame : out std_logic; - sync_status : out std_logic; - slot_valid : out unsigned(0 to 12); - stat_addr : out unsigned (19 downto 0); - stat_data : out unsigned (19 downto 0); - pcm_out_addr : in unsigned (3 downto 0); - pcm_out_data : out unsigned (19 downto 0); - ac_reset : in std_logic; - ac_bit_clk : in std_logic; - ac_sdata_in : in std_logic; - ac_ssync : in std_logic - ); - END COMPONENT; - - COMPONENT ac_out - PORT( - rst : in std_logic; - clk : in std_logic; - sync_tx : out std_logic; - cmd_addr : in unsigned(19 downto 0); - cmd_data : in unsigned(19 downto 0); - cmd_we : in std_logic; - pcm_in_addr : in unsigned(3 downto 0); - pcm_in_data : in unsigned(19 downto 0); - pcm_in_we : in std_logic; - ac_bit_clk : in std_logic; - ac_reset : in std_logic; - ac_sdata_out : out std_logic; - ac_ssync : out std_logic - ); - END COMPONENT; - - constant SYS_CLK_PERIOD : time := 10 ns; - constant BIT_CLK_PERIOD : time := 81.38 ns; - - --Inputs - SIGNAL rst : std_logic := '1'; - SIGNAL clk : std_logic := '0'; - SIGNAL cmd_we : std_logic := '0'; - SIGNAL pcm_in_we : std_logic := '0'; - SIGNAL ac_bit_clk : std_logic := '0'; - SIGNAL cmd_addr : unsigned(19 downto 0) := (others=>'0'); - SIGNAL cmd_data : unsigned(19 downto 0) := (others=>'0'); - SIGNAL pcm_in_addr : unsigned(3 downto 0) := "0011"; - SIGNAL pcm_in_data : unsigned(19 downto 0) := (others=>'0'); - SIGNAL ac_sdata_in : std_logic; - SIGNAL pcm_out_addr : unsigned(3 downto 0) := "0101"; - SIGNAL ac_reset : std_logic := '1'; - - --Outputs - SIGNAL sync_frame : std_logic; - SIGNAL sync_status : std_logic; - SIGNAL sync_tx : std_logic; - SIGNAL ac_sdata_out : std_logic; - SIGNAL ac_ssync : std_logic; - SIGNAL stat_addr : unsigned(19 downto 0); - SIGNAL stat_data : unsigned(19 downto 0); - SIGNAL stat_valid : std_logic; - SIGNAL pcm_out_data : unsigned(19 downto 0); - SIGNAL pcm_out_valid : std_logic; - SIGNAL pcm_out_avail : std_logic; - -BEGIN - - -- Instantiate the Unit Under Test (UUT) - uut: ac_in PORT MAP( - rst => rst, - clk => clk, - sync_frame => sync_frame, - sync_status => sync_status, - stat_addr => stat_addr, - stat_data => stat_data, - pcm_out_addr => pcm_out_addr, - pcm_out_data => pcm_out_data, - ac_reset => ac_reset, - ac_bit_clk => ac_bit_clk, - ac_sdata_in => ac_sdata_in, - ac_ssync => ac_ssync - ); - - inst_ac_out: ac_out PORT MAP( - rst => rst, - clk => clk, - sync_tx => sync_tx, - cmd_addr => cmd_addr, - cmd_data => cmd_data, - cmd_we => cmd_we, - pcm_in_addr => pcm_in_addr, - pcm_in_data => pcm_in_data, - pcm_in_we => pcm_in_we, - ac_reset => ac_reset, - ac_bit_clk => ac_bit_clk, - ac_sdata_out => ac_sdata_out, - ac_ssync => ac_ssync - ); - - ac_sdata_in <= ac_sdata_out; - - sys_clk_gen : - PROCESS - BEGIN - wait for SYS_CLK_PERIOD; - clk <= not clk; - END PROCESS; - - bit_clk_gen : - PROCESS - BEGIN - wait for BIT_CLK_PERIOD; - ac_bit_clk <= not ac_bit_clk; - END PROCESS; - - tb_out : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 100*SYS_CLK_PERIOD; - rst <= '0'; - - wait for 100*SYS_CLK_PERIOD; - ac_reset <= '0'; - - wait until rising_edge(clk) and sync_tx = '1'; - wait for 100*SYS_CLK_PERIOD; - cmd_data <= X"12340"; - cmd_addr <= X"8B930"; - - wait until rising_edge(clk); - cmd_we <= '1'; - wait until rising_edge(clk); - cmd_we <= '0'; - - for k in 1 to 10 loop - pcm_in_we <= '0'; - wait until rising_edge(clk) and sync_tx = '1'; - wait for 100*SYS_CLK_PERIOD; - for i in 3 to 12 loop - pcm_in_addr <= to_unsigned(i, 4); - pcm_in_data <= to_unsigned(2048*k + integer(i), 20); - pcm_in_we <= '1'; - wait until rising_edge(clk); - end loop; - end loop; - pcm_in_we <= '0'; - - -- Place stimulus here - - wait; -- will wait forever - END PROCESS; - - tb_in : PROCESS(clk, pcm_out_addr, sync_status) - BEGIN - if rising_edge(clk) then - if sync_status = '1' then - pcm_out_addr <= "0011"; - elsif pcm_out_addr /= "1100" then - pcm_out_addr <= pcm_out_addr + 1; - end if; - end if; - END PROCESS; -END; diff --git a/lib/ac97_ctrl/src/tb_ac_io.vhd b/lib/ac97_ctrl/src/tb_ac_io.vhd deleted file mode 100644 index 6f25c1d..0000000 --- a/lib/ac97_ctrl/src/tb_ac_io.vhd +++ /dev/null @@ -1,186 +0,0 @@ - --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 17:33:47 06/05/2007 --- Design Name: eval_ac --- Module Name: E:/work/VHDL/eval_ac/tb_eval_ac.vhd --- Project Name: ac_out --- Target Device: --- Tool versions: --- Description: --- --- VHDL Test Bench Created by ISE for module: ac_out --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --- Notes: --- This testbench has been automatically generated using types std_logic and --- std_logic_vector for the ports of the unit under test. Xilinx recommends --- that these types always be used for the top-level I/O of a design in order --- to guarantee that the testbench will bind correctly to the post-implementation --- simulation model. --------------------------------------------------------------------------------- -LIBRARY ieee; -USE ieee.std_logic_1164.ALL; -USE ieee.numeric_std.ALL; - -ENTITY tb_ac_io IS -END tb_ac_io; - -ARCHITECTURE behavior OF tb_ac_io IS - - -- Component Declaration for the Unit Under Test (UUT) - COMPONENT ac_io - Port ( - rst : in std_logic; - clk : in std_logic; - ready : out std_logic; - sync_strobe : out unsigned(0 to 2); - slot_valid : out unsigned(0 to 12); - stat_addr : out unsigned (19 downto 0); - stat_data : out unsigned (19 downto 0); - rx_pcm_addr : in unsigned (3 downto 0); - rx_pcm_data : out unsigned (19 downto 0); - cmd_addr : in unsigned(19 downto 0); - cmd_data : in unsigned(19 downto 0); - cmd_we : in std_logic; - tx_pcm_addr : in unsigned(3 downto 0); - tx_pcm_data : in unsigned(19 downto 0); - tx_pcm_we : in std_logic; - ac_sdata_in : in std_logic; - ac_bit_clk : in std_logic; - ac_reset_n : out std_logic; - ac_sdata_out : out std_logic; - ac_ssync : out std_logic - ); - END COMPONENT; - - constant SYS_CLK_PERIOD : time := 10 ns; - CONSTANT BIT_CLK_PERIOD : time := 100 ns; --- constant BIT_CLK_PERIOD : time := 81.38 ns; - - --Inputs - SIGNAL rst : std_logic := '1'; - SIGNAL clk : std_logic := '0'; - SIGNAL acio_ready : std_logic; - SIGNAL cmd_we : std_logic := '0'; - SIGNAL tx_pcm_we : std_logic := '0'; - SIGNAL ac_bit_clk : std_logic := '0'; - SIGNAL cmd_addr : unsigned(19 downto 0) := (others=>'0'); - SIGNAL cmd_data : unsigned(19 downto 0) := (others=>'0'); - SIGNAL tx_pcm_addr : unsigned(3 downto 0) := "0011"; - SIGNAL tx_pcm_data : unsigned(19 downto 0) := (others=>'0'); - SIGNAL ac_sdata_in : std_logic; - SIGNAL rx_pcm_addr : unsigned(3 downto 0) := "0101"; - - --Outputs - SIGNAL slot_valid : unsigned(0 to 12); - SIGNAL sync_strobe : unsigned(0 to 2); - SIGNAL ac_reset_n : std_logic; - SIGNAL ac_sdata_out : std_logic; - SIGNAL ac_ssync : std_logic; - SIGNAL stat_addr : unsigned(19 downto 0); - SIGNAL stat_data : unsigned(19 downto 0); - SIGNAL rx_pcm_data : unsigned(19 downto 0); - -BEGIN - - -- Instantiate the Unit Under Test (UUT) - uut: ac_io PORT MAP( - rst => rst, - clk => clk, - ready => acio_ready, - sync_strobe => sync_strobe, - slot_valid => slot_valid, - stat_addr => stat_addr, - stat_data => stat_data, - rx_pcm_addr => rx_pcm_addr, - rx_pcm_data => rx_pcm_data, - cmd_addr => cmd_addr, - cmd_data => cmd_data, - cmd_we => cmd_we, - tx_pcm_addr => tx_pcm_addr, - tx_pcm_data => tx_pcm_data, - tx_pcm_we => tx_pcm_we, - ac_sdata_in => ac_sdata_in, - ac_bit_clk => ac_bit_clk, - ac_reset_n => ac_reset_n, - ac_sdata_out => ac_sdata_out, - ac_ssync => ac_ssync - ); - - ac_sdata_in <= ac_sdata_out; - - sys_clk_gen : - PROCESS - BEGIN - wait for SYS_CLK_PERIOD; - clk <= not clk; - END PROCESS; - - bit_clk_gen : PROCESS - begin - if (ac_reset_n = '0') then - ac_bit_clk <= '0'; - wait until ac_reset_n = '1'; - wait for 150 us; - end if; - wait for BIT_CLK_PERIOD/2; - ac_bit_clk <= not ac_bit_clk; - END PROCESS; - - tb_out : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 100*SYS_CLK_PERIOD; - rst <= '0'; - - wait until (ac_reset_n = '1'); - - wait until rising_edge(clk) and sync_strobe(2) = '1'; - wait for 100*SYS_CLK_PERIOD; - cmd_data <= X"12340"; - cmd_addr <= X"8B930"; - - wait until rising_edge(clk); - cmd_we <= '1'; - wait until rising_edge(clk); - cmd_we <= '0'; - - for k in 1 to 10 loop - tx_pcm_we <= '0'; - wait until rising_edge(clk) and sync_strobe(2) = '1'; - wait for 10*BIT_CLK_PERIOD; - for i in 3 to 12 loop - tx_pcm_addr <= to_unsigned(i, 4); - tx_pcm_data <= to_unsigned(2048*k + integer(i), 20); - tx_pcm_we <= '1'; - wait until rising_edge(clk); - end loop; - end loop; - tx_pcm_we <= '0'; - - -- Place stimulus here - - wait; -- will wait forever - END PROCESS; - - tb_in : PROCESS(clk, rx_pcm_addr, sync_strobe) - BEGIN - if rising_edge(clk) then - if sync_strobe(1) = '1' then - rx_pcm_addr <= "0011"; - elsif rx_pcm_addr /= "1100" then - rx_pcm_addr <= rx_pcm_addr + 1; - end if; - end if; - END PROCESS; - -END; diff --git a/lib/ac97_ctrl/src/tb_ac_out.vhd b/lib/ac97_ctrl/src/tb_ac_out.vhd deleted file mode 100644 index 6f6cb42..0000000 --- a/lib/ac97_ctrl/src/tb_ac_out.vhd +++ /dev/null @@ -1,149 +0,0 @@ - --------------------------------------------------------------------------------- --- Company: --- Engineer: --- --- Create Date: 17:33:47 06/05/2007 --- Design Name: eval_ac --- Module Name: E:/work/VHDL/eval_ac/tb_eval_ac.vhd --- Project Name: ac_out --- Target Device: --- Tool versions: --- Description: --- --- VHDL Test Bench Created by ISE for module: ac_out --- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Additional Comments: --- --- Notes: --- This testbench has been automatically generated using types std_logic and --- std_logic_vector for the ports of the unit under test. Xilinx recommends --- that these types always be used for the top-level I/O of a design in order --- to guarantee that the testbench will bind correctly to the post-implementation --- simulation model. --------------------------------------------------------------------------------- -LIBRARY ieee; -USE ieee.std_logic_1164.ALL; -USE ieee.numeric_std.ALL; - -ENTITY tb_ac_out IS -END tb_ac_out; - -ARCHITECTURE behavior OF tb_ac_out IS - - -- Component Declaration for the Unit Under Test (UUT) - COMPONENT ac_out - PORT( - rst : IN std_logic; - clk : IN std_logic; - sync_tx : OUT std_logic; - cmd_addr : IN unsigned(19 downto 0); - cmd_data : IN unsigned(19 downto 0); - cmd_we : IN std_logic; - pcm_in_addr : IN unsigned(3 downto 0); - pcm_in_data : IN unsigned(19 downto 0); - pcm_in_we : IN std_logic; - ac_bit_clk : IN std_logic; - ac_reset : in std_logic; - ac_sdata_out : OUT std_logic; - ac_ssync : OUT std_logic - ); - END COMPONENT; - - constant SYS_CLK_PERIOD : time := 10 ns; - constant BIT_CLK_PERIOD : time := 81.38 ns; - - --Inputs - SIGNAL rst : std_logic := '1'; - SIGNAL clk : std_logic := '0'; - SIGNAL ce : std_logic := '0'; - SIGNAL cmd_we : std_logic := '0'; - SIGNAL pcm_in_we : std_logic := '0'; - SIGNAL ac_bit_clk : std_logic := '0'; - SIGNAL cmd_addr : unsigned(19 downto 0) := (others=>'0'); - SIGNAL cmd_data : unsigned(19 downto 0) := (others=>'0'); - SIGNAL pcm_in_addr : unsigned(3 downto 0) := (others=>'0'); - SIGNAL pcm_in_data : unsigned(19 downto 0) := (others=>'0'); - - --Outputs - SIGNAL sync_tx : std_logic; - SIGNAL ac_reset : std_logic; - SIGNAL ac_sdata_out : std_logic; - SIGNAL ac_ssync : std_logic; - -BEGIN - - -- Instantiate the Unit Under Test (UUT) - uut: ac_out PORT MAP( - rst => rst, - clk => clk, - sync_tx => sync_tx, - cmd_addr => cmd_addr, - cmd_data => cmd_data, - cmd_we => cmd_we, - pcm_in_addr => pcm_in_addr, - pcm_in_data => pcm_in_data, - pcm_in_we => pcm_in_we, - ac_reset => ac_reset, - ac_bit_clk => ac_bit_clk, - ac_sdata_out => ac_sdata_out, - ac_ssync => ac_ssync - ); - - sys_clk_gen : - PROCESS - BEGIN - wait for SYS_CLK_PERIOD; - clk <= not clk; - END PROCESS; - - bit_clk_gen : - PROCESS - BEGIN - wait for BIT_CLK_PERIOD; - ac_bit_clk <= not ac_bit_clk; - END PROCESS; - - tb : PROCESS - BEGIN - - -- Wait 100 ns for global reset to finish - wait for 100*SYS_CLK_PERIOD; - rst <= '0'; - - wait for 100*SYS_CLK_PERIOD; - ac_reset <= '0'; - - wait until rising_edge(clk) and sync_tx = '1'; - wait for 100*SYS_CLK_PERIOD; - cmd_data <= X"aaaa0"; - cmd_addr <= X"1DFC0"; - - wait until rising_edge(clk); - cmd_we <= '1'; - wait until rising_edge(clk); - cmd_we <= '0'; - - for k in 1 to 10 loop - pcm_in_we <= '0'; - wait until rising_edge(clk) and sync_tx = '1'; - wait for 100*SYS_CLK_PERIOD; - for i in 3 to 12 loop - pcm_in_addr <= to_unsigned(i, 4); - pcm_in_data <= to_unsigned(2048*k + integer(i), 20); - pcm_in_we <= '1'; - wait until rising_edge(clk); - end loop; - end loop; - pcm_in_we <= '0'; - - -- Place stimulus here - - wait; -- will wait forever - END PROCESS; - -END; diff --git a/lib/filter/sim/eval_lowpass.m b/lib/filter/sim/eval_lowpass.m deleted file mode 100644 index ccac021..0000000 --- a/lib/filter/sim/eval_lowpass.m +++ /dev/null @@ -1,37 +0,0 @@ -function eval_filter(N) -omega_lp = 0.15 -omega_hp = 0.05 - -omega_bp_m = 0.02; -bw2_bp = 0.02; - -lp = lowpass(N, omega_lp, 1.0); -coef_lp = hann(N)'.*lp./sum(lp.^2); - -hp = lowpass(N, 0.5-omega_hp, 1.0).*cos(pi*(0:N-1)); -coef_hp = hp./sum(hp.^2).*hann(N)'; - -bp = lowpass(N, bw2_bp/2, 1.0).*cos(2*pi*omega_bp_m*(0:N-1)); -coef_bp = bp./sum(bp.^2).*hann(N)'; - -abs_lp = 20*log10(abs(fft(coef_lp))); -abs_hp = 20*log10(abs(fft(coef_hp))); -abs_bp = 20*log10(abs(fft(coef_bp))); - -close all; -plot((0:N/2)/N, abs_lp(1:N/2+1));grid; -figure -plot((0:N/2)/N, abs_hp(1:N/2+1));grid; -figure -plot((0:N/2)/N, abs_bp(1:N/2+1));grid; - -figure -plot((0:N-1), coef_lp);grid; -figure -plot((0:N-1), coef_hp);grid; -figure -plot((0:N-1), coef_bp);grid; - -mean_lp = mean(coef_lp-mean(coef_lp)) -mean_hp = mean(coef_hp) -mean_bp = mean(coef_bp) diff --git a/lib/filter/sim/lowpass.m b/lib/filter/sim/lowpass.m deleted file mode 100644 index 292964d..0000000 --- a/lib/filter/sim/lowpass.m +++ /dev/null @@ -1,20 +0,0 @@ -function coef = lowpass(N, omega, scale) - -phi = 0; -dphi = 2*omega; -if (mod(N, 2) == 0) - M = N/2; - for i=0:M-1, - phi = phi + dphi; - coef(M+i+1) = scale*sinc(phi); - coef(M-i-1+1) = coef(M+i+1); - end; -else - M = (N-1)/2; - for i=1:M, - phi = phi + dphi; - coef(M+i+1) = scale*sinc(phi); - coef(M-i+1) = coef(M+i+1); - end; - coef(M+1) = scale*Sinc(0.0); -end; diff --git a/lib/filter/sim/tb_fir_iterative.fdo b/lib/filter/sim/tb_fir_iterative.fdo deleted file mode 100644 index 5260669..0000000 --- a/lib/filter/sim/tb_fir_iterative.fdo +++ /dev/null @@ -1,18 +0,0 @@ -vmap ieee_proposed ../../../Common/sim/ieee_proposed - -vlib work -vcom -explicit -93 "../../../lib/misc/utils_pkg.vhd" -vcom -explicit -93 "../../../lib/fixed/fixed_util_pkg.vhd" -vcom -explicit -93 "../../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd" -vcom -explicit -93 "../../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd" -vcom -explicit -93 "../src/filter_pkg.vhd" -vcom -explicit -93 "../src/fir_pkg.vhd" -vcom -explicit -93 "../src/fir_stage.vhd" -vcom -explicit -93 "../src/fir_iterative.vhd" -vcom -explicit -93 "../src/tb_fir_iterative.vhd" -vsim -t 1ps -lib work tb_fir_iterative -do {tb_fir_iterative.wdo} -view wave -view structure -view signals -run 20us diff --git a/lib/filter/sim/tb_fir_iterative.wdo b/lib/filter/sim/tb_fir_iterative.wdo deleted file mode 100644 index cb193af..0000000 --- a/lib/filter/sim/tb_fir_iterative.wdo +++ /dev/null @@ -1,144 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/srst -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/clk -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/h_addr -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/ready -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_din -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/s -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/xo -add wave -noupdate -format Literal /tb_fir_iterative/coeffs -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_w -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_r -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/htap_cnt -add wave -noupdate -format Literal /tb_fir_iterative/xi -add wave -noupdate -format Literal /tb_fir_iterative/yo -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/stage_en -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/fir_stage_clr -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/fir_stage_en -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/cnt_reset -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/x_valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/y_valid -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/y_dout -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/new_round -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_stage -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/h_din -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/ymem -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xmem -add wave -noupdate -divider {Xmem Dual} -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/srst -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/clk -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/h_addr -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/ready -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_din -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/s -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/xo -add wave -noupdate -format Literal /tb_fir_iterative/coeffs -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_w -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_r -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/htap_cnt -add wave -noupdate -format Analog-Step -scale 10.0 /tb_fir_iterative/xi -add wave -noupdate -format Analog-Step -scale 10.0 /tb_fir_iterative/yo -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/stage_en -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/y_valid -add wave -noupdate -format Logic /tb_fir_iterative/y_valid -add wave -noupdate -format Analog-Step -radix decimal -scale 0.00061037000000000005 /tb_fir_iterative/uut_fir_iterative/y_dout -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/x_valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/new_round -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_stage -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/h_din -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/y_stage -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/ymem -add wave -noupdate -divider {FIR Stage} -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/clk -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/x_in -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/h_in -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/y_in -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/xin -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/hin -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/yin -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/prod -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/x_out -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/y_out -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/s -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/srst -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/clk -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/h_addr -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/ready -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_din -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/s -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/xo -add wave -noupdate -format Literal /tb_fir_iterative/coeffs -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_w -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_r -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/htap_cnt -add wave -noupdate -format Literal /tb_fir_iterative/xi -add wave -noupdate -format Literal /tb_fir_iterative/yo -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/stage_en -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/fir_stage_clr -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/fir_stage_en -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/cnt_reset -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/x_valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/y_valid -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/y_dout -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/new_round -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_stage -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/h_din -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/ymem -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xmem -add wave -noupdate -divider {Xmem Dual} -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/srst -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/clk -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/h_addr -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/ready -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_din -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/s -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/xo -add wave -noupdate -format Literal /tb_fir_iterative/coeffs -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_w -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/xtap_cnt_r -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/htap_cnt -add wave -noupdate -format Analog-Step -scale 10.0 /tb_fir_iterative/xi -add wave -noupdate -format Analog-Step -scale 10.0 /tb_fir_iterative/yo -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/stage_en -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/y_valid -add wave -noupdate -format Logic /tb_fir_iterative/y_valid -add wave -noupdate -format Analog-Step -radix decimal -scale 0.00061037000000000005 /tb_fir_iterative/uut_fir_iterative/y_dout -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/x_valid -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/new_round -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/x_stage -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/h_din -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/y_stage -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/ymem -add wave -noupdate -divider {FIR Stage} -add wave -noupdate -format Logic /tb_fir_iterative/uut_fir_iterative/clk -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/x_in -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/h_in -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/y_in -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/xin -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/hin -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/yin -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/prod -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/x_out -add wave -noupdate -format Literal -radix hexadecimal /tb_fir_iterative/uut_fir_iterative/inst_fir_stage/y_out -add wave -noupdate -format Literal /tb_fir_iterative/uut_fir_iterative/s -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {5100000 ps} 0} -configure wave -namecolwidth 140 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {0 ps} {42 us} diff --git a/lib/filter/sim/tb_fir_parallel b/lib/filter/sim/tb_fir_parallel deleted file mode 100644 index f784c1a898ebf425293acc60146ab6ba80a1f4cd..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1354927 zcmeEv4PabFwf`nfOVB`rR4rJvV1f2Qu}H<%6b#ra1zTL8fhu5I`auinhiw7{8wjS0 z*=|>&CRikDN`pqNkMJk>@=B^piA}($L8=BU5H;!z2@*9tq6YH+{mz-Wdv~*G(k}!h z?cO^x_s-0jGv{-@?(NRpkEf-j1?*pXU{rvys;^{ZPRD)PJ;%wT>4AxXqXUxzrv=_0 z7=si(n_i4}@SBJX{EbFh27aUPn~(VXJ2Eo)J05ZV_zcPN!z~a%Uj8QEkCO3Y{y?@q zm$VNZn>iW3_M-xU<_`y?UOrF9YqRkFEIi|{9dZ5$7wh0}1u9yBy7`-kIDht8@DBw` z7gZk}STyO_O#aTqGyd%J%kUi0L4N>4-YI@(#VnJ`(Oe;|M5bsxxIIyHag>cS0Y ztzUE22Q?j_OWQBHG*7a#9fbL4{62=?r|{$76?zMtjC;_8KZ^V1_+4h=AICk%gx`(( z`|vvkzYm$TOU#|OOMT%J5oV8`YSPZZeGYyX;+JXC0B&G5eplkR0KZS*$G=bNEpWEE z6Xx^qI}N`X_|3=f6#UM|?``1UWJyDADH+%lG4W}#Tm^qX(!=6(S&&$?+Y_H$rlI7$sfqT`+E;Uq%G2p z|L=4YAzzR#-izNmP1*;{ojmpt6DFNZGvQ-#pJ~G9;yw<)x8p~?y8yo_`0;Nle(%C> z0)BJx`!D?Xcd_15UT-t0>{H_D%cfEHoA_!IXFu}!I3W8Q-_8;qe+RI3GUBuD&&nh% zFh0e+UuoX|JnsA>{W1Spct5QwEAwY~kMDn(5AjF1`TUQJ;I9ck#_z$8JdYdb_%8#q zkbm;MS(y(Z&ioNmpDlkKU&P-n_%T0m#lJHA7=OvUf3k^RVB%A8=kqxzzixY0W~s!p z0yiU#e?|E5`IUIyUXhhK2L#9Z=a~G9&GV3nFOmF#z(TzLAn?ULyZC4M^)~Z9bq(wL6ylS8 z^!p+69ONj^>rI?`P2e~251RNM#2bNM<%eSfJIwR{#hvf3$B%zj{=E$NF88&M`qTbR zMBq{rxeIsZKMF#)4D#;*DK9HQk4?mL>O1~f`Xt=^TZSL=2Vgra%~zvgY5uZx>(;Cb zEX`kk%c{V_OKw_t`LgR*t}j@&?qm6j*RNl;KCp1%^{dvbUbwzs@w$SA3-RKbwaZqs zh*d1%+(7=C>jUdQyRIOxWZBC6!1DYxC~a}U;?*CN>x#g#4Qm67*RNb1SiEG-`W12w z6s#*;y@X}l$}-LlTz{(+x^VWVF1=vh#UBeST)BE>0aBObuUWq=uy8q|h~2zyWx+Ds z*A^B?<|P(@)z{y!YHeWsE$f%8S-m{4zF_H^!h%5I>g$)`z4a@vU$$y(!7b~T6$Dl- zTeWJsQ{oEU+Ar^?Y&3+FJt4m#tYIShYAm ze~py0IKKc`SaM@v`SSciG-cJQ#c0}fYuI*{#G290b;~pd3n5r5uV0MEYgPxA7k?6+f(jQFu3xqk z-2`+lG2OIkG2lSi`RJ*emYc?+df;-|Qgja9zHa?`eHlrsmj-THyK>>GB}*4d6^sC) zh0-V+xoL5J;WBxTk5IUT0p!B?ll4m$qeA3fXNYJaIt6%Ul7WIjLb7npbvGlUN?8NSI^){4ceLBn2#)r-*&d`Ht4UUv&`5H;_;6&XQ&As@-k1hNl$kB$x7^1gAe5nn}DLkX_hNiGI`YU>+4X8D!&BrDjw{qn%v<}~m zqOuXsmiXwv$t)UweE-L|^I81;F-h-_N_d~Tlkf9S%g;!9KizwO!nwz0j=3@*Ho|Ba zp|lM~!s z9gfZp-l05dd52P|;~h>`J@4lR0u8*wNRROjhpdtJS@2hRKR*y?;T_IfEAP3`&%9p{ z2(#w1?P z_;|)^CEmdJM8>Nm9%Fnm<7E@Ng?_hi_;{l1gjBjAPr=RWbX1tj3c8T{eUdni@ z#CsVpV>~ADKE}5)UMul_#;X{wk~leYMGfO+5+{eQsAarZ;^fp7^^C8TI5~DjjPXT? zpZ(%z!oMx)=n2lhe8nQztt)y?IVSV6D_3Ow@a>uILUdqnSs8fy3U+Yd>N_60;=ZE; zmq$uiQYcoCKG3@0>c<}|i~p${C_e8@`alI)T@y-T8QUkL%7I^O<1LaM`bA;ap3!`s zhMfBTwi$4_QQpa<(*OeFn=&Rb&26~xpRYv4iHQD)&sZ7qJpLFicXXE`W!sK#ACpMP_}c_#Mu-MW*`;`Y8Y39vm_l?gtH}#E5hR>jBDoR z;CO^fc}4gH3FC_Ji4w*Y;rB=wSA-`>7*~W(k}$3)b0WfFUJ;%oVO$ZOEMZ&`o+e>l zOJZk+oze*Y=VnB5vmR|vm&X0!R&CsFJVC?Eds~oMGL%J}EzH1%m1)kIy9})j|a$x={DWn|pvBhJ?FxY7Zq zvg>&Pb%ub-Ye{T+*r|%(e*&lH7P*N3%bv3FrZcw)LN5) zpzdgL>J-$v9A^hXt&5;UfLbS@)(WU~2Gm>umDiHktgurb!T$tM?^2wEfz^5gD&A`l zP!Whl5H_I3Qh<78&^^b3+CWg7O$LJ6*yOY*s4Y28BSCG6phSS$BA_-4s4WK6*#auA zAcnaT=Cvd?C+xIF@IL|UHm#Ikw;HhV-d+J4fwl<32JE&JU@r)|8*erk-b=9CO$LI! zugU39usd>`eFVEBf)W9Chk)HKV0Rd>=L@L3mc)W#$Bp2B0;p5tpt=TByw@$DBG3~- z*nrxT0@P0h-6wA{pmr0~K9hl<_BJ{F3Tl6j(@RkMBPbD|_6w+e0&0KP^WdO?!cFeo zSDKPG1>OJo=fFToV@66ra*HD8-&2rODmqC!2PsH$3k@2Nv>^G5Rzy$_Qjk;>7*LP2 zAo+M4)PocxFRVA9zMg{QF2&Cw2$FLw*hgBBbZA8c^&kaF={keqLlz|SE;l7XkgR@X zXhAZ~!2EA%kzAqZJOn}V%36cQBP~d3J}VU+f*_e|K|RufOHHF8NKXA*T#%G>k8g75Leu?;ixBI_tt6IZYxv6lNex}&<3O$WGD--#-?`Di)z@_=;o9hf>s$Yj zTwSuO193%T;p+eiyq3grQ+YXm zRRGvPktzD#UTGjQv<>0q*d|;Qbnm{wu-75VlsN(_t^hkIVO~pOb5nUdIdQOEdOZ4G zw}6cdJwtdr7VL|I?(-`R*oP=z>fF2DXG*G*L4^Cn>B%9moLt zSiGi8_p5&!&0&?K)SVas@}*X_o_}m6L{HY9(F~=zzkY2r25WS9#}t&Vz$B#}n+TJ6 zw`-07F7HA2J!#_%lUV-}V?roa(oLq_;P4 z?1|4ZPnKs0Wo6qC19%^4<1l5Qq4AJG8k*p}HxWrp+mkyLhk?a4h&W2ftF@)${+ zk|s^*cdz=Z;7?+G?&mS4CU}!^tdedKKE?sg@*LnXdz_a7U6+#J#G6LTJjvXbo?kT}+!5~aiuhM3Y z)3Xk!>VZP(LQA^E%{EE_Rrjtt1&Mg60Fd*36RLPVz3XCJ16?1(HLdGB53G#zQs*@v zWTno)X6Ln!I0FUa^loy$U2+SU_iT2aH(){#dY}Q!Yzs12sAm)*b4!ZcKp{rovf1=Z za$9ypM*E-zI$uR^0qZwpyQlnIsEIm~I-)mxVFs@lOvvk_J8>a|THl`B%z%{lPDGkG zcz-(s&|@fvs79g^g*yl0r@y4AKdtB(RuFJsSf+f&;`*g@gI_!jy4!!I)kBa8jBHdG z!zt(lNY-|atYA0;k~s@;ywqOOopIUaLHFI)X{pk3jLc{TywDxZNEZRP&t%NjjBO_4 zbBiUTLE~E_Mglz|B*x(vE4KT&)LL}W=Jdd5KfAk!PNLEz`w>iyhO=+8;E zCX;}#$Q%@dy^5h;$e#5RBJ;q~y^KaJswpMy~BYz!rT~#elZxy?(fc>X7@dP0^x` z$9=ds#1#8T|>q;n6& z+Qi7b9wVK{p?nq0J(SJQ(du%#y)h2F-o5@t3~Au4JsH^n4pDTXf>+vnRd{dHCWWjV zQ56uNd~a-0*+y{)Xi zp%%NRw9+pDmOvUdIh==yKp8CSg5@NnG-W8t6SC=E*JcQ{>*sb2!dpi2>tG~*?a?G& zIUqlbRIooIIp8i?Amxi!H`ooEU}}dNI3PEyY`&Iyz;4)8n$hseTNL&>P}qzg9Z3pH zbJNTcg4Ax<&L3*+2TEaQ+4)2caU6)F|MF#0p-`Bt!;%3vkJ60Wg+j3yC}~Uy^&FWo zB@_%vtriEuP&^zadc%z=DVRE@q+pI@OsO3*h!$X``?H2&C=JNRm{PiqDZ$3-+Y_J} zwI??%(Dg2fil0v{3v~-Eej%J!^(5gSW7sI))UZEl%1AM6)c#3<3_5Z@)Fc^`hK;_h z8I$Ez3M#tEK+4$wV_SL@_G$Z!)+Zpq5S7dn99C+ZVd}LWlC1=kCtb>P?OUy!=FbR* z3|}+do9(`|^N4k?nB^W~q^s{Rwe6>?nTz9u#O2_j!tQy)_c=@8fT1ZNsq??9C78}% zu*Z2M-hU;1X=6hV0XN#CvM`Qa8^%&Lr)6_4NB-Z&b!`~hXzarDV~ad&j5v+5EG@n2ApK}1v3iW9@PEdR10J;p@wVJ?;|nW=uu zqZns*BY7R1R2>z?;Ey)Ih50@92Qit~?Lfb8E?$HdmpYFK@EJ3meFa#5+OB|Mv}<4I zhcR9~FmGSy2XNc$JW}dBu-SP)I`c{lf#pV=38S2GXk3)2g;z$g9Ok%pkB)nH2MS?o z_tRBL~v{@{y*wwJldWyr7^sW z#NZ`>OoTR?{fiAJ6r2(%Y>r%u2J578N6=kZB)tp2C*!>XPDj_TnjBe*EdJE^f)C;z z$;$?|;Kxo(%LxQp`v>J9i1NfzKsEh?N&#Kb?#pwvZ=8{X zR-6plX!ikI%E&=uDfh*bEBA9o@~K_-JS&xJi~SSKGNC zqwP3NQ!PU))#M+mjlfSx#kDkyW!6xQ5IAL#yi)TVQfzm@yR7tD@i6KLx_|kEpfMWC zm&$6ep4nDrG#D$Zk;-bcGF5S?2B}$*&<4p^PK}59wni$L;OW1FD!G(C=-y_lyhd{F zh+ti{ncMQUZ--R5BdL8zMU^WgV*i+~ltHujQ`AFcjBu zRO#?f9fyB>uoz6BE$7r1&pakG9GZ_BnnDY3ZA2V13M&e5zhP8Vo&??B=?rq`&6u-` zhP0s#W-&v(tYJ_caFy>lg%b5gJ%<@uAjd=tL9xUvDeR*PwQoRBb?E$^k@(cEGo5xT z@#8(sy$eD2s7s8hYNuAr+lxi^80HsBZYwEjJ9=GmhF@K5GGG|2)e;C~t*mhtAj$C} zJ^Bm?Jpw}SP#|owB|=p}a=KXDZ$ZGAP4{3Bt}q$$T1DEVwTczh8krY^dfr?{F^EpX zkd-bAnd#IQKp)k2eh2g1wxdBNRpHQFbd~9d5Vu-IC56*mGDmycgVI*gx{g`)(}rLS zcROJ;+A#<*hNT!!v;8^IH|81h_Jbi{EMW=>C0u@4&~2P81&A!Yqnq1JqS&0_95@F! zW!N`iIDBg)ugs&?1a{ja{XSMnF&ZjBvt>U+tz|bKht~?b)h2N`Qo-lNVQj@v_O6QL z6{qHHs_CG6-$l~GXlSWa29~O`mHGGyD{nIJB#F0?3f^8T8LJ`6l6jk57?E!C@pe3s zdpk_-`X+}fO9G&Z9FPQf8@yMeyxp)L-fkD(Cbu?)7U4SSBg)%*4R7;F&>f>>&^cXr zR~st43-JfKY^3=?`)-`?IoX+<8zXOn_4ewLBXGD-Kszlf`xtEDibd!euA;>_)9Dz@ zRjq>avp#Of65?QABo9Ku>pg~TrT&q#tyb_;OZQ+~j1{-3<~MVNRm#C)EVf1F zHN(2Lj9DX$34Fk0jFB;8o!!EiULV(}BsJtB@>C_L$C!WkzBF$CjG2Fd!GNDJzvs^h z-0qJt&(H!4W2*L5y;cS3k%EG&go3M*C>W_=7jSf`;ms|w7tBz80&hMoUAJBZLe%Ia zQoXIr$D0YNUeZ~OsCvWHWrjV=BNgQG)ExSZR2i^UQhCXKC{N-0I5a`wOFFAmg|8I9 z6=asoq13zk)xMPxBN(ugsutjYLu;{4?*iT0H@ zI!3I0e=lecUua0w)4p4*>PyzXnqh&>pxReW9?Ql8!pPZJOB`cM^t5le1tD4cYKC7L zwo2B%P`%=Ti0#l4nFrz8vbl_QE&5P+p6f+tI(6jvy3Vf&&wEr;84k@sFGYphtzu@1 z$Mb*r&IovZ!+9xq{(t;AhvE4TYXJ$$7@DpIWNvwIWDMbKp_#4bc6lUkOKN5Of{?-I za|Pcb>$NXCKPC*V4Hbq4!-G0Gf+H&V{l4eqaq8R#GJLBH`m~7A-590C({5CC08b>Wa#5Kx9*M1gH+pVxwTrj z73cxCHjrBzI-eD8%@FwKb)z$E_dx)(E)uiJ2+5^=N-i^u+!&bXW^W z(9p^Xex>On=me$d5ws}Hk@?4*Wyk){S%zU1BYx@NW7q_B=`pOT%MF4oSnI?4#~c6- zx}ULCUL!gEGQ!us1R3GAPi4fv(mxL5B>Km>h|@prH4ID78N21RJKq@oF^_-=x_|nJ zAyH3559uFkh9B4rhrvJA5|`Q%Jq_(y^2r)nGn`{GBx`8nA9ED#@c74{xo-qa{)Z2x zVDd@+oWn4AwHA<|l3`6BI0uZ(KR#Ca{iPX(!;h?gJXR|Eyshj_=^rl=-lkYm|G3KV zb`W=3-+U5u|ERtA2Jnx$jUwnC`(ZVq@i(OI{rksrKWG5-`^OP~&S4ny?OH&B_Eo(`t1yMRe8~PWkDLs;S12jHKK?OJ zqYS$3(*;+?Jvj(>z<9V@|0Vu$OgNPGnfk{WvsC-m8V*(ec(!)u8^b?7L(snR97Cd> z_8rnc)(kUjhQr_=Yl(lfT;ge8&uCB9zMA1-lOb9A(my7LA1VL%$*+xo=NFung6F^L z&p8awzgr7PP{#0!{1&j!98Iu*J#$nn;F0;q9~3gU?rg(-YeB+^n%`$`C)mE8xqZO? zF^?4vx-U&LRlX_x~ZT6@Q>gBRcY(~HS~A?%OJ$Bp*!#PajEirTjiV5KQ0!Ar59}Gj}5~X7=~5<_&)8-w zNkMzl8HPkX4LziPtQqdM84iPgtR>F2C3+g#v*eRCv}QQoWJuP~#y>7TZ2s~2U-7Xj zCpS~gAOH9?gF!!&XZUjt!{nQ^fCQC%1pVVHrQd%(#c=qM^^ds{BIsUcD|=J=$L+$~ zasPPId1n6D@V5HLd$bqd0RHhJ!TFz0H)QE4V~?v2)j!q>qPBum$~dKetc-a${NwxY z8UbUT`Ti7)d80q)FpSxCiWHEbeUGevyk5HQ93`dK$3NzYJV7^hsxL2HVBNOJ2 z4Tnz0JwAUtN$KH@;U5VZ6<782n=`agXH^Py2dCd$RV`3>79r zvi7BaOb$O%{_%qm!PWjP?iueh2=y!DoBcV5;rUnID+MGd<0I%FZxS-NPz8;hL-db~ z`^@db8dNN~Nv)=hn^dF$nQ<>*HVWQqTNFE$s!vzV;yS7RZI#tZIKeAnFT?$G>m#x_+_&f=o+u|xBP&jT=0dgrmO0=A zXs)nn0#^!VZavBLr>9G5hgyrI87{UNy16uR9+psc*hLKWvWNljV-Z6O7csPS z&LWBo{_1g(vNX0-mRgzxztND7c7}4;#+{IY>aOtT9ER$i8ZQMTP+iqQ(ZUW{xg%6p z7s(R>l+A4kRCk}?_PrCN(kLfEvDl+A1=TeQ)iowj9a2Gc;EH+>$^lay*4ZE{_SD4B z9d9Ppfwmfy>RL#30E+8hNp+w;oD{ArbM6zW!$Z5uu9Z~RVOQCK_S&LY$1NubaMg}H z9y!&0OE8mRrHD$sZmdDJROd$Kf!5>JjZ;d(@L6Z?fi_;lwzj=OFX41TcTV{ zVrXh+$p~mF_O28(HSl>~&S7Zkb}c|?%6Ebr#vD`-y|vr+d4ro79!g|iof=3PN<$;q zj@b^9chMc%JwqO^1>_&vZrj(26A6G_Ddg`vq%GBM+jZj%HL-ERJj{T-2mV9a zQth^#sTtp*BAy30vU31|Ur3CDr=k;YKhjiGf7`)P(V6c!NGkfXz#`& zO-1WW4YC&s%4npr=#OI$l8U~s84VR>Y<92>^|j)n*G3hb!t2eMxTY6mcb$m)m;%O* zD#+~0+T#oa^bY?9rR#y*b*VG>sJl+J4JkXCM=#JLCZ25lc* z9ttZ2%QeN;8hUe8I=&Z&{ol$tb{SFJ8<5&+SX+%(8~0E8Ytz~BV%c3aXeT2b(}+yp z`mFqTqI~)WSyOJLFxwchk-`E-i!OQh!z9>5ViMCei3HBTfynWV56x!p5tmNSbQ%Zm zJsP9!R{@|KC1jfw$Bs)w3juxcE?!3!%r}9X->!l5f_HW0Yj8|~Njs|GtgZzX*jDjM z1RmIA7{8*yNGFB1q_i#mF8vY%yK5I|ci4SUd^fG@Oj~XbJr-?epY>P7666V3Rhyk` z9A!m3*}V(%>N@vvHMH3Phh2nR1Z+x^75sME(-?p=Zc*M8&Kb(7_)(T&6Td6_+6G@v z5RG|8O+IKB;cZ%gu*)6YN1oENrKg*fNi8n_gD9O}0S~&($C_?yFUTC#Z4>gb*Mtvmh zu0Krx_=>WsNLh$re^v5*je4)D`lPDr#TSPr+7WSfB>UoA->=)7eYzo@C_@Fv+R)_0 z(9i(Hdk(gDz!!(4uhl&_G5X@rj~EkbrebL1-T2}>m?Y`|J5~^b4QSTGnHKG{S0QBNryap)y8AvNQqbn%DSYeL(1`Bfnp5Ar3yl5pkUQCqa zJiV4Lj*{lUd2fXCKCiKJDlx{f2cWYyEQ4oKP_f-wZzT9l>qkJ>uZ~GU*R%XNhoS2R zEx-_?4n|f>ANVPxk;K^OQ3ywC{KTlEHMNF@(S`N0iPDsiFfMeCbjg^v3E0xJ=yrcq z&8(`~tExGvs%9ZZ&^@GHLozYOM;?8|7*CYZE@W+Ka=4oq#MqjHVLA|FE9g>*v6aLK zdLxmM7@_amEHU!i;&DaP`Ym@C-n?D zKc^YKV>9^Y=O&%Y{f7rNKlkFw5l~&ht0}1NA%D(csO}ss;Ps-qC4$@A0!D6Ojy3j% znHB!mQr-1}nWa{WKy(d5b(-NEo8d4~-ObmJfa+fRM+&Mt&!2M`s@tUn2-V?pQhM4S zzqjH)0Bf~i_5hDr8krNjPGI<%GKu(0^0IvDC+4Clq(Bu#&+-=KdaR^QaF`Ef7S z);N?OJ0i|^rPBW_f-I4yUub2|n~xyhbKM9C^1hc-5ae$c`*IFLkc+hdD_dpA@WtYy7iGxs z#k7KByTy|EB!?XT)^9I*5>%X`asHgc z5OcW}@On{QmEiVy<)F8y&PR3Cf|(!p8sRj&d8!%8ZHB`{b#2#-fa(_Zq!6Ls@aG(c z>fWmbSP`1qJpGcLshW{*U;2~-HbSq%qeAd7*pB@1z zm%o^Tl%M*PFXu3%e1#V9dJ$xU^vXAsfBv%wGA2#m{*vjiHy=T6yvj#bLuvF;T`36i zLVwO-2y*ueQh=4M2Wg%*3$lBSkU(0udVfLkg-JxXhPx7^=Hn3$P+IwR!3aM#k9&dZVZ0sn^RI z=oT2tl*|6JtbrbBdWFh|k*xuGV~w7!{-lo}hq4A<{#^=Ep6<^%3@O)X0k0Q9{#|-y zK>6oCiy&W>re|2$^X4;8pPf4bf?V33f*`m1a}Gn0@7DsXY&}Txbo3}Ln7vGiJJ~$N zgckT5&lMLvmwEH?(2dVUGD5xB>psxF z$9X=jYl;AkEoOzcqwDOv}fg ze@HFQC@#uWG-d*gvrJ(FX^N!_b2v6EGnxQoJh0Oy4l33D{hL6LI zcJ~6i_8X~pbhm+C>K9#rvqbJyIr>@4#9Ft^DsQ1GeX~ zaz5O~kgYt;RL(S8d6UU83u*E)9LTOye|bw383FF=Q)0%2duYTlr5-j=4yamrdndQoVZ{Q%&VhJfkgdm&(hVoUJ`lc{x@S zYUQ6dMJ+(4oqV{BAzS%o%`a)T@}S8vpOy1vQ+bP2&Qw$RJX3k#LK57TCZ{YLA@QJE zwer!Xs71)MlMlBsWGg?$RL(S8`BTp+uC76vylg7xaRR%yG1XMw`n0xuqEx=A$tj&C zm170zUah>;6tx1GcJkpihHT|!nqSgv9OEwb+9^KA@S5RNe*FwKJS)U(?De5A?C1_Z8O-o1^fw*76|{zU=; z&roZU@5!tcDD+IVeG0|xrpyhLU`1WGt-pS|N7_v~L87P=$p=dHWHX==4Hc;@3r@OZ? z)j-ksYsE#CK(SPy;I@TYfr4?USA}A|DYF#0ck=l*hAb4H(}E<;LSZD^_DzI>FB>R2 z1PZ1aD9$%f!~}|K1PY%0+A2^m4t1(fyr?|Cy$rc`^7%G~EEF&QN}3~S7K%qqjxBi4 zKAW#qWdlX8K*3Z4#c2kLT!CViK#_}UP@rHOMx8?OOO*)QYms{=pKoKx zLh1yc3An!?Aw()s8=vck=e_Px)3;u!0rG9%+7^ZLTgPqwEuKiZz2)*Rmb z=L~UAiP;#TOnQo!0tfd-yTQXWvU}j*bhVzCfD1GMcZTFyv-K z#YqZ;Vz+1@TK2txf!n~yboZj!^wcj|s&yH?K7d`hlazDEu6N?S6w(ehjU^Wegz9y%C8bavX6)yW73+wuV z?!Z$j%+Z~e)7u2CPM|>>em|-FqMt0TWW6b=plebFjux*79Xzqi;!3Wgzjy0m48_xJ1zSs7q1mv)9G|ofFe0jYgB+ z4%DHDXRmGUI{Mkst_JbOKBxKVqF*hKIKQgPS`IVk=~a7wb8YL>tA2&0h{4}vOo}d@ zlz{?SP;rM-+?zYLg6=N7;XuKe^|dGm=xcI%S`i}Bt8piqx`XcKUkK8Pruwd_zkyTS zor&W5o}Dnsy$$=hfvSD;VAObtQ?4@jtAEz1H~3p1-P9&n+=mk_WTW3W04lh9`f&?b zf3AnXv_c@ZH8o=U1z;j}yrTg37=VG;r=RoyuI>Ca5bNt7M~c@`0ARQkZ6b#26EM6M zWdilY@CFUyjeSn+>7t(j!#@)Yw>-V7azt3=@!Irqyqey2(H&|*% zt03#y(X~iRVuY$I2Q$J9Kfg&wVo(Ad*#TZj>?laCFB=}NO zTQ2Sf?~nX+2wc45vSDz+CZaAC71S?N>tkL`uBmBjyr#>Bs;N0eO)IJzUyIPio!Q)L0uT8A~#2IKBt-M$D>rp?Ix#fvQ)m;^IQx?Z*O7ce7KDv zTX~MDoN2c5G*fvq(&S}h8>;8RR8#qDj|=4WGofoeaN(v54SO7 zE5E>0&NN&3Q6@(l(&S}Rx%w$gHI-+W$~Q>m++JTQl{a|qNrRHv_6}s)$%oq*vXwVB zYo9aCR=(NfXh)j7Y${jxgsGd$ zoefK_FURR$#~0GNrt$??#C@By(wSX?8R;_~g(;$Jtp$x9aQeD_jCJ3p(n-F8u|3?> zEBns7bDW-a&}0wtGK6~o-Uv>->!*z)ZuV;Zv=N#T$wS+E!xzHO=%ovo z2RFk5?m>t039jE(o*C+*h!RuBW7^$Gnr~UT@#wgdB!+;EF=< zq75As5M#fo!nN=c*fP1)S4Dj$Yr1=;&Duv6&vP*z;=T_9GKl&_#wa(#zK6v;ZdVOT zGVMe&x(Po#X5OR$J$@L_nw~U24Bd$^WVkhrrdv@d&I0R64Z~=+*uDoCdI&?ez;NXi zcXVf?$ttO!#^!`W(;yC`p^3Qa_XZ*r99NA_FvsS!DIMUtVF^bV=_BnFF` z^#fleyEr}^xFt(J?Z>uu9ivCYy2np~}h-M-n3yO!i=f@;tsi za0xwu%o{ca-RG6WqoHic%<=F@gfSnK|*q zaA=NX)nW<|);S|q9g*3i9Qkf(!T3nU26>b3%UL?|wCkD8&bZRhCne)XTs5Phz$wHD;BRHj;IA1=0&HVj^&mt$S2_IV zWz!{Eqj6Cv1DY+yN=7D_IPb`vl7Np`d*1M+VAvtW~g3x-z?E38zOa z;ci?_k**ZkJyelvZIRF}F`iH+{joU<-O=Fhj>{mKz;YNMDSa%GS8rZR?5Q8>3*kMH zygGkguPeWH`ZK1`72{ zm?G7-o^)}Z^Me%VLf)d>lC#yCAg*uJoZ zQNrcG%PK7(x~%W&&-`2HBP?_>l>9|uj=8%8Lx$i~zr2A}QXG69UKVtt4F>$Tw9@OQ zmC6P4$3J3N>u_i#Eiz`g^>AnxZO(xK_dzA*{lVhRUcRLk+n4 z3y=h8I=OoWI^R+QUEVj3sYH!q)QA^KcJV3(dW-@5(J^8o40I+%DkQsv#Xzq_VmMUA zM{-Rz(2HN?6JC7=dOR^4s+O!;Of$kwp%z?ObwolrA*RwmXL>~5R|B2#u4kg5V%)=_ zRzCH{6OCm6lwy$oT|FeMOr9hzuMs(X-9ru|iX17$JoX`{4KI}J;#H8dmjQzuCIUH3 zid0B;2@7(zATb=O;Ul>wBWIH!hgTnR;)&tV4#}#;>_fOI)Q+nnhoPJhQ;8hLBJ#c> zhjAijE$-n^2cKHx2p*V1Jn-(}ff2!jzKVfidCo&iLmQbPREw+efa@5nV6s=To|S4W zj%@%l=su&=-xR9Hi%2Q1Z~FwsXF@9wZ3^Y%x({)8CB8}&4!MZJ6dNea#D^FW4n{+Z zcym|0z#h!jXgJi3#E4#X{5n*Ll$pE7hN7s#JPAZ9s*%d_9FkEc`Zl0S9W2a6vM*Mh3NzGwCkBjNQ$r6fplpLK}1^~eL%&^{RCXmi!ujn zkJCbmh(ih^S1f81lZEy-t+VfC%6oE!Gt-ZNILM(lN0a z;uCl)+G`0ij&(fyJOEj1kQ3pFa zQZbQ@ldK#?mt++Q@&KG7_qe>AjQ2}+@hT!=5(D_7yksIo0+VdH42wvZFOYET#met9 zC9DumV-^`~;?R}E0=AVh_!QzbtfNm7rf>MDd6oKORE3O8X&F39d+b+ZM>k{TeB73< z1(;aB{-DxNC=QV_jQV@gjP!6Q7rB031QBiIz0h3h25qoK(Ng%g|!b`Qsh zt^u^3bYVnM$`BhU_c%(IBKaW3x28+=vsk8(CE!Nb68LNhD~NOC9j35$iFxRqE6;c} z!;G?s)1X&gRrChqW$X{VzccI^@EfU@xnn2;*AqX79g{w`2qU)ZOu*Q2Q1CE!6I&y&D+jxLOY-H%|H%j*p`TN9|#}#3U0bau#12ZU9ccXkpk9 zn>>nQfm@DlavFr~kHRjETpqKE%ua)_dcRarYTAqwu1%$75oZfaD}!WK_)_`LK+!i>Q;YcXQKMNx}jpxI)e1sG^%DNeIsV4sv*Y1q=KGCb*2M?+d= zO~k2Yu{Cj2?1(t<-fD3*sHichKvMM(sQ7=<$7^;NRM=|yNr76yLo)y|b%t6H7WQId zFd8BUj(=Mv1e|#>oM#= zIAW*vQ4Knok8!J&dQR^ViK-ULdR8+U!c~<|NFo;|>!BB)@ zA^@NHNyk@Rtm1dJs!y?%oW2#XSR$$_DXJ0yQfUQ96$D776j3Pxgz_KaT0IWTs#J(V zu#QZEyRlp7>_(*xI0}-pI+9myz^V4YG2f~Z!2^lnfwQBeXorAPW5L-0aPVak6j3AK zmJczJHZC;18DSfoDc77wm(notqQM+`= zKHDMf=n#BYq78E|(jj85QEHY#T3H%&ZLQs$PeGYn`(_kv52jOum1R-|E$TKc0(ZOn zZP9VsB8tSkUhH-N$5yak+$riQ)g8JV$#^(P24pTwA`-%g4TIFYp_hC76UEQtK}HY1Dt15STD#y5cioS0`m z&W}%nEY||wxV-)|p|RVmrJa_L|8003z2k98>W_gOgfV)Axt=>cFxRHUZut*f4^9=i zg}chFH#o0rJ5JSh94N1!^^Ig+*W!Mq{B(f4K3%^uw0~ZIOP8GgyAT6Po9TpW0vgVRfbIHNsC~|kO>np zWFpSB5vvS~ke|kY4tYTH!$F>fgh&OGJsTv!6nI96aZ!~K591_1&F@HsTy+oy;4|id z&xnFAF9CeH$HAvbQL>9y0iPUY!Dk}CXOgW$7>>(tCL&RXBy_4h*>q?W^ORSg=@3t} zt6#Jj4v{p8Th6N0LC*;>l_QAauFEW#(NinU5VxL7)T2fRh7Re^*c{u&0ut+vVFb08dz_GWpS%>+gr4Szd zeyzCd@c8||L)Ag|^UAkT9iVrr`29Rf*9@|WVklN=Q>xgMDqmA-N{VWvDIAy%bfGCV zXbO~QRm7>5rf}Su=D6@176%zY0GHZS3d6OQ#nRt3_7&{YdimH)J^e!TW1X?D8u)JN zfedZXgO!F4zJiHcBSXp&j4X^hK%#AXV zF`Xz#_xJXcRu1_(jq;HN^BFj?d11_YR;LVWY&fZFl4r3gfY}P5_}17hVX>Ax<`H16 zG9blSg%-dQHSTg=M2{fNvY9unR-S+H0J6uwrJ^RevN*4DMlZnEVq!5+~FoR*4 z9E(Z{m%NIk`m=tS$dgp!3`-1MZY}0QQ;D^Tkrg!M&xzjJpT#^~3m8I+&H$ho=M`{8 zrx-QFbZSwiS(W1GiHB!Ok)LOJl$m_&=3}=leu%c-q6-${(JrjV> zmzaVc%UC);Z~U+2LqhVc+x0 zF4AhaB8F?pE?xr#6Lc2+91#fEVxAR=@};yWA4haLT}m(6MWZQDII;7i(085)($0u} zRp97k*I|GkSCur83UZ6rBPPazr~*VXXrIVy=o7ie`^2w6u_$^2GTJ`jBlHQAY%L5+ zpNwNbY&OhAFwAivfr>*mqC7XnMO>+P>2PyPjcV9rL>!W!V^fZC{{>(K-Mf{$Fcb@9 z@sr}lLY%=mjRG&H0x!2@=#;D0E2o$(_X+pPlA=n{dRwJ|(0Y~7dKk4ThfHe=O z_eDc((oFFxt?=G{mqTCPO&Fqj$_S*i(sM2J%)4`~c*5A#MBJ}?ujw)%}9{Gyt z|Bm>m5+R6)&4~V=#8D;F|8`*M;rXWj?~=^Eu_Y~Zxfa@mrMrHyNg~p9GN!*|p$eu& zq{T*G{_vkt=Kl4iqZNBPQS{{|e@@_MfBG^*3;4Ivm;VrAeZlgi2*m$TeR*nBi0EIa zFSRqSEfY9W=u7HGqc2r~sKstnqg5ksV$B)ANKVkbM)}ODu5xc@2Ims6NyC~5ZvuU( z4T^kGdX%ngYJCYWaY%jn#m$o0Dye#z=ocdbUSgagj3TM`KE(%@G4+URg6>oRUr^FF zUgD5z1CG4zOcMgQTEVfptIabJ4%-yW>!mNXJ&`S@{|`oAez8_2oOYVoxWEzMSvRIgGyC`vs{*^kqr+f+ziP4jDx+nu^>PXx(|I2o>61=ze{sE&i=P* z&Sq^6R+5#+q>HdAw-?4uRK~aU^iLgFZK4wu@W@&g7SmxQ8OW+FcwzQ2=s*{8F|a~R z(R@+Dye5xZ(X&(+$mh++6Lo;q6oX+~M}}iD1dFNjf_FsnHmM^ogW%4lu0PrX7)#-N zTA0nr6NDMF$K;Drg;pMrYLN<17YL{Y0uZmspwiBZi2LgUHJ)f(XDvpKj8&AC-wWGHJnj8t+K3$sDdAG8j}K%3J!S6&;-$jp^2R(Mj(P?xB4X8`&Iv| z+~|5h7hXt#Y!C{(f=MWlwM&6)912{i1)9!=p2hzFx2e}~6$D&gr-uGJR*YaY8LN@1 z?P{bGyUy~4E423K?o@gEc`tp6K($BHBMx@4R@#bcIY2BG=@>Ewmt_nY70JM{Q#W{R zkrsEeEv}9`Sg*zUksaFqvi%ezd5_LS6LnJ$(I;C?sqQ((%(Io*x@N9fqm*klt&2(P z8V6VUU($wjTWO3A*%dSyHpZID4+XYWwOJrpwCh|N4Lk!!Jxutf>O zw&B$oUK`kB(gu!BQRbVqH|-GqIz$#V6C?EaxJ{LEyTc;dg`}t4?x5UuMQ(Qp{ktN! zJ49|H9UOr4tf=mNhmH_J746Uymc*#pT0Tvx!Ac5L(`$JRdZLfj^s<^hsis$|>62=D zr5dE88l;PQkV1n|8RZMQqozuWMGQr*wP!KB>2=?kXG*hXrH#G&E$RA3m#){`mRh>b z6dCZ^9V*`rK)SwN3$(m=aMD$4FE+KurE9K0wL;SmUAk&o9B3K_z#h;_v7>D(1{|3taKf`uCpwPC{!4)x1SG%N*g9=E=vs9uKp zWw|9Mxa)H{zRn`*WT;&!~$h^6(9_D}iU%sYMsdaT>Us6E;Pa znsYHO=QMUEms~{e#+&t{&p(#?-%vL8zu`IqGp5+?hLHF1hM9j9@{c=}GCvI~f@7+7 z(lU07;Sn>?Do&;OCXwcZ;`I%};!KUi(++Oe0y_B(GuQpYX!v@tg0y$G>Pb25ezE#l zX&N?U0ZJ(7MZCFJjZWu|6TAMd1d)#maRKgTs59nFtKwdv1!jY_@vNF{zfTKW-e?G zRiZ!aES1z_rYwSjah!O@1uab-Nf;M5Itk;KZb*Ugs6S^S#(8W%rt;%US&q>HI@bVL zZ?&qLV+oD!kyWbQaLno8=XIb3Z1kwHp?lG0cNVIoe{M)n8>n-F+CUnH^tWZY6a7Uy z5PRE^SFp{fIP!f-{WY1ET0(zaeX}%K`m5J{<@XZvxfxdo+F!m^)4!hx5=>T1Qz}Ta zB+L|VYW@l>El%aB7PCHcQwp4);Ln+ebF+*+j`Mr80PDzR0APTXJ7mfpb#ys#DQSjv@fG>9se5bgis8|3e z{|ex5!`v*OX55~T#IT4@cBxtOrZOUF-z>*CbsoznMB|C(v?{Z@XcN9?!W!Xr=Qx|_ z8J9*x&ZsCYr4v7m6=FXWbcSspJZf|Fm$OCnfNZVW;?o1=B}L_;2g;;H&;#Yr17)Il z%0|?XOlb(OzJ|mT&8i5~kgZLQY-hmCa*nf=4Z#YkrO2xdsqFgWp3semj`FB5Sv5?? z(hp$08l)xA*U4%-td!NE( zySG*sm1$=utSYOc-iC)y_nru~dLV{=_4L4E;f$rq^qnj4npwZ5i!&u-ScYpX+f2Ya zb^^OWk^H~UB_X*X1(I{ur9krS{+x-DsUaE31D}-wIwwQ_S}VfPIL0AhPBf0aD<93V zm=OgVID;d!)Rc1A{9ZF!0nLlCnAX9=3(Eu_^9v2ESYgm?%cE+=(k_+<4bw5Qq#a$#UG2<4F@#cG~yZLKvAF1zIW_3Ow07h1DTt9FZyW3**da7bZagxcW!Yh7r9C8!S%Gz8%d&{t3dR41E0i0zK5g2Yoz|D#+wc zxtVK=LNA-Svb29fF|N0E9w{z*Bv5#q*KPjfv75v@$Pn*fJ}}!P*7jua4j9Kcqe`du zJd;Flsif0=t5Oi$Z=d$%1R8zb!650hSPSTUoGRc6WW;Ex2yqgXsDatI2i>&)5j7y% z!3^E$5Ma=q_Oj6sV&8CZm41vk2qYbK5a5Ml;awlnvvn{w=x%w~kMuLy5jy4@ zbRYSfLHcy0icF^~BS@z?KKD2U*s`8$9F%KVo{5$lnEHubAf|`Llm6?Vv zVMg30@a9hVjwl{8YHk-O&+|h{!b;@@?OmCojmP_QCbn^q7xWb^K)j&+>W&w_^_K1! zej~6)!*3|vp(9Jw6{u_{U!lTzCBUa)I0Ej!P8a!=XFw6fri|$O#o=2cSD{&~Ht}#aJrc z@t0*OkUq_yGZE>7bVscgpt|D(WE?_w++X8IdV=l<{pG-Q$4sr(=#F1LDXlmhx+5$| z|Jn*E&?sz=?}pbMFSkm@IMP$;j*UxGApH@4&P1dS(j7Tkfa;EFWIRH;V{J;^ahxC0 zp>)UAB`MnY>!16uli0>Vy5lM>z^vAp?CwHd89p?|EzF4EKw);&af9wX-?YTVD9uEt zC+L3SZ>ssY_ui~CzS0lCP@q41T?)`A_;U^edZiZNfu3$bH-3|X4j=*gbKkI_o5l#} zWq%z6`n~#b~q(%7e@0)4SR=P;oEcCobG1N|c89SZ9o-)2GgW1VNAaJ<)t_4c3o zx_v0DU#~SM8dTr%=Nty~(~>~ng1iEH3am$}Ea-l$U-`-)&`1SdBR6Cq_$Lc()piBL2X6;oQc#n z$WD6oS}CCOcl5EBBjXTu($~LjnS_&Y33gHo4vLXUow;J>HIBr`zEi6;cG4*d@ZqqN z9u$@RC*`37_pvX0JPGNk?4-x9NrCiCf6hdt53-X=wSdl5^s)caOr)puu_u4akMsmP z>8cKc^yz~1c3pM5e;@let=8B{-$%XDZQ@mPxh~ga=>p3G^s(y%>FX9MDIKtn{nMr- zq^Giz=3kux>0j~ZOho!1JLz~WppzdGb2lR60oq9!K(zI-GZB{AO(q77uk9ZDed&`M zMx}PXzj=>p6kW1rt&r9|NsUjX%CGu#ipJmV&zacxK?c;jw1DB2%BruvrBwcno$u=! zlc+6~Qt7-Z1+`7~=S-xwK}w}Y3s9wU95N22RKDhyZwX4J==Vmx9e`3fTdOrn<)@EH zD-MTJ*)8(z%gRFsu2f#!orLsMN~Pe+6i9!_pED8ZgOtiST7W8*N@N^Lsodj7dV*5P z{GCDi0VtJ*Jb~LNl?4j$;c&ixEJ#1;Q&RkaJKq}~O+tDqr7|!-1=7#==S)QUAf@s{ zEkKpZ>BxB4mC7e}N}mj+RGvwxR6Z9=YJ4iClAfyZ7x;4~Hhz#&dGrdY#q$qON8X|Q z!%=0H>iquU34^`z*pEg4`bAoEqJMa&Kj$!@k4XYOA9;uJ59i!vLHGNIpBe0xkM;vF zlz+J8@)RWZlOOsTJq+ld&;mTHKZv|TVZHWC7IZ(>`v$wVm-qn~3iKy0O96VeKj$!@ zmuUeW=>NBCXso~N5sV+}=M4t^E))VgcK>4`?@9%Fop#L%`wO9iRhPyZ2jU`;| zoUXMq;fQlbqS@81vo#gtVJJrAJuc~D%+7vGMAt;gOR&M^?oETs@m(dmxW+|RMsX^K z^VK}Bgo#)j#iWR-gJGE)-v=P{g9ZdOV7^&U!DJ8ige6^_B5}W`tPwRQf=rU4<*H{c z0er?h@EK9?*`U1$?ST3qBJ8 zK9g)6qB#kEgJ3_t;2?R1zYk~RVtoRxz8U^_qWxfk7BdSqG|8MWtJZ@da%8m^&s@u8 z{qm^;nf90W_~DHz0b#a4Cs(fn8S^l}h+;rq0tVzB$G}{?U=D@h2P@|wYB9h^zyOoX z@ktUE`r9GZ2lz-%cuK}VzhHn@9|q!yVL5-oo|+s)G4XF@>S=vBvILJ9m@k!N;Hns4 zoEXq^ix=>zUBpN^VFm$lmWk{a9xD)vf2}5;AnXS#d`_(J?qP)y z#foG%k9}AvzzYYl{B(<8B^#Ob{JLbUWC&Jx^w`@c_M`qJW zD~##JPNfybc|u|0I+>E6k+YgZA`+h&3-Lm;9<%*tl)U)Vrhmr0;TRJ6@K@4 z0jDfMoa-5M@@W;TWvA0W3Jbxg2WnZR840VgJ5Q_Sba1SvW%Fgh z3AQMgI`jafPK?XmFml@fo=6*T8o6zxAyScL z@kV(Cy#4$lCDr>CfJ(MNq?r9aPY@|q?9P`kQ?M*b`Qi5uN&dL4)|`SLZZMVDwPDDL zZ_@g6Ch|jbGCxew0y-CPO#92o$Yopdt%0z9jz~|#G~bqyZV1f=n2H%r$YI+8;<(M> z&8<>f)O?2q8)>q(`0S!jzR%&}|N5;3-Q@SI?G+5aQ5x~+OqEkz=LAq7}%&rV0!3R{)gY&YyUd8e4I z3Z027P^ll60VbIrw;8;-yMBp>+_%H1?&q}#B~1aLXUUECw0f;VKN3OmYvS4yEBkCdqSblU`kjW}d70G-I2d(lE84jC0MtIq;zdj4G9 zurjFUt7pdn?R9e%P^_6oPZylx1Nc?xnsW`n-yCrEb{>biQguN#(rp)vlQ2`f`RqGu zrN%gOrE>a@QLqv{=ehoz+1@jjG|1_1`IyvV93dCbd#V$TPY*%2_7&o^+3|f7f|=k5 z@x9m05$cxe`*8IZ1bf19N@Mtb_Bfm_T)kvK>m^!KT#K0mN^cS`MR|BK;yL2-(70gC zZ;CTcldBb_>5g^t#dg(!@TJaVdG_1!jHr3V5S4`7<3{InB$w>sRh*G&4B(HhAQNGV zGs)J$u+J47+7u`G<16in7>FlYQ+%JaVg^dZx3_Rr3^0@2QQcdqv@5*M%1E$kAMm$S?`EpK}Cze zk;z9X?Qb$V{Ayf%#1K!k_O})@7sWJ*7ow;LBAz3AsfY^3R57ak%{Wm}DSD^|zEEW|^1S-UbF>VsWf{F%#BOB4wM)xE^1+P9- z#1pO2t;H-tF-@|!MNzR7@f>lIhziF1MmOX3!-7;^vJ;|s7q>?Q3dcr-JCf7KZu%yQ zHk( BLdbX{V|xNe_QOXC*(){rL*y=`(y>!n{kU&NUw^TgPg<j zjLycRph8bUUfp9S`b3tgR{^-7``ssuE@9N1nre?hm5Eyl7^uGM%;BghZ0t{JO*ALu z+-cYSu7L0Ez}=pXj%~6WG7D{$TBqAu8P)w5J|p@VSR6sO{sJkb6Q3bQFKy)2m^b8j zfOMlt1xOiqik5k%bi;X)S3uf;XKtQ?WTZYV-GRLy^eW1X$xMErAP?6SKMZJi&1{ANIsM&Tt)E&62`8h`cxKr|3{=P zq~F3icPn6lVQP+?jR@7w!R#fxAvj6NCi?M0hPNtHc10}7H_I1{&cHYL#8r?@BmCwl zPb`AN0~5VvFqOSi$~w!6qZa!yJWJBnMBn`_Vr#E;sQq2L7A>`1TY#_~gj5MXPP%`E zyrUW@A7S9q`_L`(1EU*wbFXa0Lz?J}>h^al6xau9qGJ+rFbRHlW*nn?-H!ual;g8_ zwWYIFZghRy?YW;Vf;YmRN;J_IAjRs-YY-NZYCg(phX_iqGF`uj*?A_Nx7);YJxp}& zHW_51r}+Tg=YAbv08s7e1QY$;(luXE&gz1R-XJEr?QXhZaS7LB_oc|^ozUa1^mzB+ z9zQ{fon;u-+h{+?DQm4JetJ{&_#DAcj13RX#WfWUbLAcF@!1GVk24Wn&HT6pd2@gJ ztm$z^6Mda{kN2hO@%j(Pd%V}34|o%M{6uN#<;wJ3-%iz%8K~3J?kov2#q({xyIsnR zi=|Y)&Djb@qAp+S&xzhOA}ghD({rxW;>}N8iM&Hit$lF4kR7qB<)KC z{U6(WjUEQ{TeScW>+Q%p6xN?Fu%P>~{@K4M<@%Nx-{J>gD9{6`K>w&e=P;oEXnG>S zoN7T&f%Qoq=zgsKpl1;1KdkcMZYakg!=ChM;ljfzOD7&k&t(xyQlJNAf{@KSJ%VX)F_%g}FYRL9yUG zR40IczJUK83w{p;qB*@|Ewg&qXUqei5d~jf0{C)|gTDbUlZP^$&h76COV_3@ev>U;r} zS07g6iRJ_vo%>Jre*o$Z9T`zjckrmv#96zCii;jfF>5Eu3A1+ffB+x(#Z_nR7>5s{ zKG1phCJEp=QdZKyLE~BSQlbDJ<-DX#EAV3cP?X(hr293}&tD&E|kx;NZTcs2S496l~G z?V_`#9y4p_ZOJDy0anb~aZA2@XiH!ve*)Iae6Ysc7w?fWqGn{FH3DY~!mbBp*jc+a z?2)%8m9)rtrn68|+-LtuanVl_XYDQ$@M@+hcsgs>&JxwHK=~3gvx43P3{Ec52^I2u zQu*;Qfoo8Zeikj6E&e}y-veJ~QLLTP0tJGNTCoaxt5iiOTu{_P5F&E4LMsPopg`po zEK;>dfffp11Hm+s^dwRxl?c^F2@)h~l%Nq)2@sk9QKJTp5Hv!-H>OIIc!}Ohzvp>o z-+$+vv`tgE3Ag>F@1H&I?#|54?99&Y>@L(Vyhg+#Of2V=Opm}AY)cGTuQ`;T7^F`C zyOnH#Kw#Exh(3WWwrP{-#?AtCd(&*8le)tIP(ik2!)^Pt4n_OJ>?%Do1vZ$;!;#g> z9~$4B14);M#v`l}-@ujy`@$`eoN;-;Kq5YieWex9zksHQQxm3b*l6V%=)1-)tpIrO zE}Vq-{RL{GQu7yNBD*Sr>}r)0?X(uCoaOqa1y?9TJu?OT&CIwJ+pUZ@?=M%O*)VW) zGw#+;vq#OGakrs%FskYLN`yQkS$gLmo`tZtMsvmqn=xbaW-GwW*eu1QXwYq9hDM#Q z-_hfpT!#Q3T-`z7>ud0gewQgQmH6f>0lk>5p^rcV-2*+W&Z}e-`zqNQwS2%o+8RuR zt-+*}tAo!{&PhI$ie1gpTdc2`9KaqkmAG3)(i=2J$37Iw&)zb%URR+-@c9;i&ldw< z9|3&bL+~5%LCGdw1%3k`9QaHG_)PNa;IqIl;6v#W{$!TkQhmkbK&QsQFBJI4_~6e{ z{w8J8HK0D<0`U1_;OirRuX_l73qEkie{qVW8LvM0{0ZPQDYahN%>6>s=x8Lum(HJb zP4BI0w(=KVBfV9a2pd&dt(aCkx9R*pR&6H%=9e;+^8)SqlHW_G>pM=7Oh<|xU6`^J ze?bFw;Fo{`d@%~}iQT{MAqBdST(XH*HDD(n@Q?h*L{NZ9ejR*P1J2}wBp(Jap3^B% zD+=%$p+J}jPdrQ2EK<47Y-&^IU=--VZ~00k1^5QT8&{(M-${WfxcduBBNn6SA0XO` z-vc`EMRYKG2=%>v>I19@o`PZrB1l;8o@=0mAsZ$7Avb2(}(9aEh;ixJiO;? zSs`)ZTS}dy;lg*~GK4jLZuzO-(`ez{7W~fHF5UxN_+q&Dwx!wX#3hFrT+hA+&*`|- z3m0A^xP*zOMEqg~S*vCP43{Ci=gWQ|E__Q#=@>42CoX-$WthME#;0&$3UT2*z=bbq z?V|69%b*IXU_sJn>9{lq7hWT{D6x{)^2&9}YQ=12ts3AOE;&#?`BI|9g>NZ&{tXwt z6PGT5FonOy+Jz~^h4%m#zNEE_z7w;lpeg~xYdS8C!iCoeE@7fsmEc(wGnKV!nWN#t zadW=rYKaTqQnEq~7rqZXvAJ|3stpyJZEIEfdi+?tiPxN!(*qnce~e8nb^waD(oS4$ zYLV|Y*J&6Lub<4(W@wgi;91SY+D9W`Uy$wcah%aZ8 za?r304=^a(-zFqDXt;L1$hpO-Ykm{Mms{?-~>LK{+1-^a(_^XgA@K@jg;O`d!pRju0 ztW<&6`bluwa7R}NfzsTXgV6ioyf^NYgV}^(y{=Mz!4RPI2>epKiB}FZt_)@{FBB#x z%`!~hkKcWzSHQBg7J~Y0Iw6XzcyPxm+u8Zf#%!vf zNx$$K5z{cy9l-813WxVQT9G{u-#|JB3J*1=#aXDuvM1U zf))I2UHPfMPwQf2hQ)|qD@&{NO&zWlvrGY$qs~{IOIee)`XU{dFe~m#g{f@`d|(RC zgHQ^OgmB-Wi&iF{KVbkZ#Fy3u9Gnuo!H6huaHcs4Hon#HiVcc>zc!LN-UYCR^l{Po zR!09_Sl#P$=yHB%e!VmfU8P@mjjk|=Z!Ao4CXZlBaVB`ey9@xi4R&L;AHRdP6}e3^ z%J8hXXC^{sD|qwXaVJtaRk#|jSo>`0+F%V+|0o&B2*c!$rNy{9R~?rDl(E^gDgcdy z?bvWxr-M2wbWq1S9n?{wgF287Hxts)9#&CtN++XhmX~S}u7i9gLFCr~bTJt9D;Vsc zw}|HIu~vgP-uKFtV0vRx|F6+u1hRRFWb^i!`eNYL%F-nS9j-gcwiXR+0IwmjvUCA| zDqV^zR~HbO8rMklpVbnp8e&x|tZIZ+t+1*QR!9d{NC#F{O%>NHyZ+2!HPbC)PRFX? z5Cd^W0QzSHx@Y1vaIfoAuwyO$;=Ktb+_{%+LyAXh)ujsS%m{US@n-VHIc3f%#ctI% zhuOiv`6=YpIhD@EvzUU3N$j4*o0oToV~P{-iWziE*ZDTw2ELTZ*h`Qet@vJA5@{U4jT(~PmrN1|zJ?Yi+?<6MIc#%yC4%BY=`f+xB}{t!X6WTa zG_dI*O1(mS#bfAQEpk&o_(zWF{!l49?(0b!^l#Y6HI!7!Q=)W=kAGkMe zcaov7q7AV6hHW0$3o^ef9Dl=}Z2RDM0^lrXbJXE|%#@)0v4?#-32TIA6eNEN#4xEZeJLJZI z1lJ9CkB@dtb@ZqfgQ^$L=oTtVnTTqb8@DaIc@<5LWBF>Ut9_~yS1=M5C1a*PQ++kf z2pOr*TL1v#^WRsh4bF7ZdM6BT)iCG?hq-+mK%_(%YW%6R8&|G?rXUPEjfSG8@Dh@R99kJhTTv#*6Gv{zdC>5k*Kp#M;%eGBh1eG z+E7x|pgA5blHwds1Lkg;I}YQqM{w4oHA4F?V&;U2JX(WU8`~01fIkNdhw>AR zbhS32r`D(=(S&`02{BH|BE-#vxH*8h*&uEv#B{{_5Vw{TwF=@EmP?3R0dY&J5S>=b z_8_L~-B$QUAPy6CCK@1aZ%cHrWb~K$iFQKVkWMLO~CXq23C=g*6^jUFsxy}mcKP~E&JT6f^?Tb7%ht}!| zL_M(qcn7F+wsDRq!fTLRu4&0sB@@f%cc~4#+Y&uSksdC*2Ss|Y1|My>*S16tDbkfH zMgv19Zj##MzuEg%4W9-QlF2JJ!xl5;I;}mlip<)xN#O=(ODTu zpDj)!XroTPo}Bt60k=pUvEuR=z2Wx}vpt3qk+CcPC&2OwX| z(G{pSkmjih#(zkQoy76W*9(3LwC7!FFnPzQib0=DHSRzQl8MfAb+;TVXe&M$%1N*6 z59$n%$B4I(zuPG;N$)+MaIneT$E?P|fq7G+j&wikWBNaeTw-s!RKaxAY z;&sMjvG#rJx(H{)+c(3Vf0`8#p~@Oj`jwIEx0o_9oo29bc*2noVO6FzevSU1(CE=hf$p7Pas(UZo$$xbmbPa5AD z2rIX1L9WgO*@%p$BrH%x;UzX@J{zCgsL^`2eOE_#m;>w8EI(6cq^4yNfJgsdBy&sv zte7;l@lh+IAKtMXuK{^+1_1lGd&$RIaz6|Aq*r;GlT*HO%YQ8rVQ(Q>XHQ2AnGCaz z+@Mk@)fgZA@ihWUQd8^|8HnD8R9%@*V}9!&pOcGcpM~;VVO)vNbo3q5dGjisKrNgu zWK&z;q96P{y5GCd!F&jQ$6EP_px-1x-`_fb{{O`97!bSe&mqJ}M1|)jt@Lg8I%K9t zkSX&Tu62#z8v8i)0Mj-Qub5LJ-wotp_H@Gd5%Pm7 zALH)!^!~OHzobfejdV6)BF5-GbUkf}UJ^F|(r+ARs}GhG4GM}renlt-0YzVmXTErC zi7m>T*pi>{xOl1;2CUg=z1tF7u*}D;@c@h+<(f%z^=g(&zK0$FnZ!&JZ{A6{5+N{A z>JGLiSSe@4QB5rxF?J!LP1A3Ec!vNkt;d~_=lmtl@haA z*BMJHX1W4`6I&wVvCXia02j*%$77c%anE?{e{DRb{qr>*)7(>JJXW_N((W`aJG1E4 z|D2kIV?GzniQZv*XG+FGAj>nc@OdcqUU_6$8vZ#;o*z=gu)Od^*7TmwY#-{q#GX>)@8n_&f@g59D z_+o<*KEVR8Jb?wIS+`x-!RcsLW?q%7OTITy_h~zkhcZtGm$rlfZld58COHH>9{Aox4^L{dx)>mIZCvZ240wAUn>>o!r*njga9f4n zyuA#!pyxPFBQTBDQpH87_-O4O)&J~dl`&A_u(df>^sm*7D&XnY)h;4+9S19ks?7Mr zMisQd3R16Z=bjSWaI}_Mn@E)<7;25tT0OF0It9e!(9Q{LVnf=1WrLLM1{<(!;DBXA zD5yB)v#3@>g&GbDI8>-Dpi3Tym|~ukqqSj`zlNi=y0ASHb$-nl)@ib!9-~u#u0YeA znDT6Jqcw~VHCjUw<`lAy*6ua@_cHPDYjqn+BpNkZS}lG_X+3SED+&`aS>Z$1 z(U#~WaRVUJMr*w#MZNJcV=th9N4*Pyz;Tayk(s!I!>*(a z7n9x%IC~kL5BN282U&-kykTINGoMq59Jbj?)meClKrS6}14I6j^qzQW3Nw2JpQfFH zfniiPP$^kVz=!N4CihYBypSN#%NBE zDq`km3=H>m1q1`bS7-cRt2oNFn;*2YgnZ*RB$0J7ZsY$R7WfAn+xejn%LTr!d*c80 z#Q$+FG|8T3Py8QT$Ga*1?~`eLaMt+0|IX3}Pmbn{_raO*e^!8t|GS7fW!K~X{OwOT z6U0>sT6Q3FnwBk=u8bJ}_Ya{#TN7)bz6vm?;yxj8T6Q`9ugIx34uoL7M6BbVsZaap zKUM2!!X5@TLD(BxhV6GHjA7t$+y_|92wD%?Z6s!Y)ONR=Tb4mg$)(frF~+f(Us=S}<__ z-?I?*)@aT+VKW?5Z?*#5lC0|JN}IWE+nCU5mm0xZN`k5Am(=<)JY$BFDKM4z7Ifp~Bub3Q+2x8#(2>fGw@DEXbd6E3d8O0c>I|Y=y2T1V6Mw6Py z;oP>qA=gyz1-p|eJ&F&^-KpYya%}O#c1W;hQb?HeC2lT()Z2Y7>8rwF^^-3-19gd`W8;eMelT zGQ)P_3zrKQUL&}KiGF;c71PXG)yWtxEqKq@Ad|T8EgE0QcjB@|xNu|}u%z0BDa3{M z02jWbwTr$ZE$I(yv_&o#SsDFxxp1mJhP)O^YJ04>-qFHh70Bmz+T8#d z+FujecuZokGjHAztDI5RA)I=Fll^4Jm87)JfPF20hm%5Ib>eDH79#0(lkY=Ty>8)y z+vg29MRgl8F#lWv28YO-Li|Bs~4)XkpYq1cy@GSGU(RG zoA<(1j&8MhEq7}&_>;dc@K$6e-S~TDEG}u7zmRS@9JI^HtXF!IExM9)L8N5YtI%@{f;nCXy^*?)j68sZCgF->TeQj-hMjF{SZzzp}CQm8;oI~_0am`wL7$>({ z9oI5^h>k1hyEx!prC)drlF=mxiEg83r?HMkeQk2sTbFh$-t*-GSG zNM__OWJaZu2bI7FridAtB4)I2z>M|{n2}Z5grRkpFPs(W@mPrFVlunStN&zp#Rd;Q zjAo8^mntT$yL_*e(SHqg;q^I`10Y-CNZg_vx=_FHYRi=Uq0l_0Yb9VT9;%Uxsd?&{ zg(dpYY)e!MIoYil)oM^I?G))3i5kmAdVR^RU>UOb;4N2nT>&0{A?fu_VkvHDi&Jb6b-cO6v+M@pAPbMb=Ren?$mTRh&7;{*WE%>ZV7_M_I!}+l)po-0k zaj81LsUqEA8Lg8u155P zNQC_Jr_!0YVqQ%6H~E#yg9Ox@h<~&2Zxa5^!oNxQBOUl7-Pn(XCNcZLoA+AmB`x-w z!b%wa$Mi7#kI7iBx0Mhmo@~tFe^ya_N=rW@T5jbrOv<9(_If7ZtCe-$*H0Hy#Unxg zt|s~FbJkR~pbi0M+#l&}yW(PF3nW@d87vJvW1dXZ?D47DJKDHEtESTyc|~ynH!1Ef zT~)vT>2z)y66n7-*3;j1iVBC26-+!}d9jErMdzQ*JJh({#uj|EGH zi5U!}mfnzq`n*K|5G)^&=wY?Nc}~*rtSsH28U`IvT-+ZMp*s1KHr2s|sn}=OK|lJq zKdZ*Y{arRMu7lxAL}#8hUit4o2$NveP~N-uMRVo_zcKF?Xb!A-o|-~<-;^`Yz+Sah zfO9foIhG&y_l~!Uy3FLpXNddT_bp7soGVQToC1TZe?|dQu+B-E8ND9w!7!9B8ip#F zog!0+jPhA?X0R}= zwVKH%?`^#lvpgJT#5{?0krCn)xPg=2{U){jXW@75ybuQ#p(N|5IN4NDU>|uh?Di_W zivc7m3EJ;C3AGj{Z7eR@7+;*Ux2m0M)iRVse4n5_1ENDuBb0*yCG~D`Qf-Qhlj<@T zC+(wxw*B67CGHnFiRaZ7R0EkP*BRFR?q&SX3wl%#SqByA1g*f+Mj+&SfP8nVu#59-M4qk?+qnU~M9@)i$lR{} zgV!LrTz);<5e{L;K6Jfp2?dD+K>Cg2pcpDC8WI$q55*9m@UZ--Jh7!MG00S?(EP*} zhLZHbU_v*8aNoXdi9v>v1Tc1*Kg-oCmz0K49)L_%%EOZMhJFW4#uY=ir0!sQf|a;p zXt9itUL>^1Z&v1349&%zo;UuI^y;1vdwQ=)P>zS=a!jeR?dN#=wvyS zidIQ_Z+g4yUb>MQOd{QMN?I3~ZI$yu-A+*4svzn2!f4LCn10WgM0)(UD!>mcJ%!#l z-=7~WWIpa7^*30^{LVMQ`*^9Xl_iT@WAd}z)@NDwBDUBP=(Po@-DoF+S8 zDJp97r1$J=9cPaLDb96WA+TlMYy&nBqln_< zaiVd>d624|X4Qs@vu4yWm~T`;n@yadcKsMkc1NM&%o2l{hYu8k=@jSgj=`iA<6}m&ERf!JJ|E|Hk@5+ix2l9y=S&#b8oXyJ{7?Tj>`6A_mhTzq?~FrwDoI z`-~XO(8i9)WtgZK%wg$+Fb2~BnMbySCE*n3SYt2)7!iXxs1{PanplwHWFka})Ju9l z!GWSuoQT0>d-^e$Qk+z=ZPK`&Q=HXKaZ34mm;GAJ<2{Z;g0$2&D#xZcsRMmE?!j{) zMy5FVGhi`2+>7n3WC!y#SZaH=oj|0auy_~h59n~9H&2M%w;K5<~EdpIyu&$)?L zt!3cALk1L5j#3{v5*zcm@{+j7Y<-hP2m;gCN;$9Bs=G6h7-0 z!=`J~pj}p)p7OP~1m{8);#XViZ39ETb8LJV?ru9kp9G7T1RQw}NWd2(0iQ?$-9r*A zL2}6^UPXe%e84}hMqwgIz@*fAWz(~)+8vRgRwUpxLV_^SKPtkCS&ACkG-x*xaQL1t zHvmbX!Mx^Ej0Aj79~*B(Mt2G#l~$W#q-?sH?|$eFhsReQAGZx{ZUF>IbN{^fvn*Wx z{%GbHms>GugXDXxjQ(#j2Ivsvwcs8pYcj6J$un?=A$y>cN5019BisO#q~iQ!9Z+=> z5EzFRAXUYkz*5fiK4djg_usn$N!}C3nfm`a?*8mWwDDMgO~(36HN}c_*1jx~sVv;< z^ml1se(O^7gQs>htlUd z)DS{xHGcE`^$a250oD@XxD>r#d5Z2S@$2{)}x+*FphvAF2QAoPbSfJ1R7rsa=7A>SwB!VYRq?}Y2{i!I2C z^gv;v=3l50G0gT4ANPUu8^;+5eI-SG@iBfMpy<{@+Q7g_^yVjeRv`38Ju{ra_yabs zs37!bh}+u1nVlGN{I-SUP7G%9+icPM7{3=nz>t^14qkyQYv?%naYg?k%h5iKO zXz_>9LeZ_(nHmh9&7}AOBA#TA+?cw9tOKs)Kz`=O8T!+X1Y34A7w-`FrNho1;V((= z508oyyaWym(?CAjt5AmheM3YL4I~3{Sm)8ia%?GR(!1jT*LiS!6%6Dz9~%sa8AG&2mg3i_ zLB{tnL?l0ZOq{`ksf#pgr1m7-2B>(oI5H}*?Ew>YrfAH z_~j3%vHighm7RZD=uA8_N{DHJF~}D)2K6b7LES@RkSb-*iKJU7bm z4l6Rq3ln`elZx4MA}KuvT!7jkswP2C^K+(Cb%ChLYlNy{qCfAYV*b}oB)$8ck)D)m zZL>urzvsRzeemVcobf(5BO>{4KUM)2k$fI9jv*rXNB%ZH4W$2QB9cFAP|%J>MDo4{ zzxUWX2u{ncMkF8RgTv8LJR*QKZbar}k?iF*SnBB5-Cz75c@D6g|y-FgIZ~T$5>aIp4-*#x4JY<`?dAqA5 zW|LeP%^8=644dSSKXg37#SZ2Kl=s!&OsWjb;VZ!kJX=_k--XlR@xOE;>G^xP;bOG& zBWGJcr@5i9+EDN>#WnCjo&5GR!e;Y9J#w$LUW~9)qdDV*&G12$Spjab=v1t#3%q4> zu^gPF^w*Z)Jy&2_e4sk!_0~P}JK7q23v3O(n606YAbz@sw#FiSP_l_v%>gas1O9Oi zh=~P$tg*6Lcpay~rr@`7oqR=5;Z2y1gw%Q_2e8LNdY4FUFR%`xQXz$K`6!dF78ncg z`4)iB7Xx1(0esy<@Yz}=n|KxYOZecxXClC7Qfj@j=~=GhAuaNr!Jj}`fPaX-Vsb$0 z82A?p{Ea3;aBV9;83uDyyxMYdfX}x8e7+d?`Uv3b9)iCDA7FJVt^$8K9~}5h1o%wy z>)^9_zE%B9{-i@S)0KG6R{p|kM2Uxq2m@2rJ{7YH&sd#`E33AkRjf|MJAGbEw?p6D z>QuaQ60%)+i}|Yp<)Df1O#Wk9KmooO1@tK>pnFJxGJH_7iC0lz4Idl@m&t(XctwpfH zVyaoI_MkLeHsC#9Vfn;`Z)o|fEaj6psHT>1@X?7;UUMnhy0&~i|Y*ayWSdijN z({afaF1$u?2@^51uB=u}EuME2VbAXkmpVKVmui7f&vIhz!W6a(??JopC9Pfb9g(V4 zK?N*Gr#GhKk|$hvjo_lhN?yw=Pf=DYrh&EYAi|#C8!nA_A}(bDp^4?h+Jz~^h4%m# zz8Ee+yXZSHn+lrCf=YQ!$7Q;3;WdIwnCSM!aM8TYtaS$w_VWmgmh`vaiBaii;T|eB z7nRR6Zw&}ZKauO%y@aC;Q z&iS19>P};}Gnw6lc^}fb6u?d-?F8XCZ$1lmddlyei3cnNc)vkKL;T(jBzeDhlSty- zjJpN!BLZ4g%wQ2NT4^y-eBHbR&kjN+1Hz@ec`wXy5c1VR@FTwU<LD(uw7m5&hDuSQJ!`k^Pjt0^< zi*Us;bo>$ms2F%(-5jFqx`K{c`+~dP8Az)HJ}^bGv`kUBuYH3q+P=y40pfIzbphoE zrF8-PDa-uvfex>j?LIG>Io<`Rn6xh7k-LmX_C0`+*5XF3L9#e|4tb*-I-7tfp1oY_ z1z^7*rCbYcQ|sw4G;@nQg6P%LG1&5+!dXV;ijfD`i>#D$`wnxTBDd9h0-m+_kcp7l z0^Yov--A>Jz8sBLn=G}TqAS^G2J?5U{nb~;;u=P%J4f6Jj*K>cZC4;j{~Yy^X0_R7 zO5g)i)Obu$AUsqz-^VKGlbwgRmk4JU(ims7gu{nM}b4#>cuP+n0KdP6`px| zjj$au#vb^dZ>ld=;kp9MXs@+YzwqjO?{?6ytrlFrNWc2M7C7>w^vefc+$f0SF3FnT8F`K z{BG8ZV}EUnE*Fl^M37G)_23$u3+!l$wkpaNAnhpg2*9;RJ5C7Yz}# zcYu~_!KqsBVh9>=Ut2JBP0PyHasgdoeXuNVU>cXo6*dG3SeU0XC+pn8E-d21!mirP zg_MVvrIZHG)HE9C08rWcPhifz5 zaTHMoS=QkK%0$qDxpAxE&HJt$vS6=T57^{)yDSwvk9`7~$nfc=z!TpL z7=C4=cNG8xY5U&=%z_TLL}*_AE#skDpYHb;7u`Q;WnnhB%K(%QcLkoCI)rdB9%1R@ z+KG2{BTNDo%#idhzTHh1vuM!lankI2IND3T@l5h8M=rmb6?o3Zp-c6Rap*EUi-b%> zt;~U4@cdv#kmxPCh%VQV%L-tvu*ge~5C0WV3|7u8v%BH>ZixeV0WP!{VI z-Ix{#_Ryb>doS(*pZ4NJPoFKj$)`OyJ}O8^Auf^omUlZo?G&GOW%B74RC|MU0$Nqj z!HV;6;8e(`j};d^HbQeQ27!D!FTrzDubOiq9@|P6;o9dnCzC)?W=MKp`G#vw7LDda z%tVgYo6F|x%hptLk;@+>&%<*z&MMG1)=`{-XEi4iQ7iM~mgLRba1wr`k;K>dz6Y*3 z{qv5~C8B*}*qnXd62OacBKscPC~97GyNLt#J(!~!23=p~_B~)CmXPwN(i3n^h5H@| z`qA%uVAZ&N53W8yV1?@zu=+G(MEug%1!J&e62^4W`(QL@Uho@B%Gmc{lNI1x*$ctZ z9K_+g<0GF^7tBmYd%)xy;?|aZF z67U)!L73=I4;u+qi3F>0wE-xfUY>mqZk?LO+zc>CclW$)Ll)*<9L*VL?u>m8dT&z! zcFg9-ka2{458jD@aP=gIu{B}c;m;`s5{CYdji3mVpp+mXV4jK3<9j3A ztnTY}lWcd)=DIjSJZ3ZN-U#2hRU{KK72e0(0cL&|5DD?zSe(8$LY1nWZPkV$o=}CO z+#6xN3VP;iuJw0*Z-g9?;^o^LAy?&VZ-iz@lxsttOJX&*?4G?5zGC=0?pFjS!(Lp7 zr|pd}tol{0W_IBPL<)@sKg4r)?~O2|@?lnVq<6DT_{Ch?kv=9&)ZPdN-OIfuB$0Yaue;h=FW4J_?dkSL$T^)M72QZ^(^;Lf@D2f7Is_Al{$Kur zV{pGJ_VoTfnR1?WZ-jPy=*xKro&!y4;>@1`OQ(wacdrv?z6R6TSE6tTd1wPh9OH2-Ce7{ptD9AZSp)gV>u=^j zK2|)%EZmdc42!gKK@FolbbFcAA_ZFPO*Ig`j%`y=9o$AyZl(Qzz| z?MK%+Yao8;c7dz`s62Fv)ci}FHE=BMvS$Z?ql5W;qu3wg+NejfH4(MN#|Mc{`ND60&NUfK9MybKbD5M(&T=W8$J}R6$V0y z?jr9XLn#>RYfyvc@@0BmRZNL0Ed$8h7BJYA90;Wi|moD z5O*xwd)yA@3I=akH+)$11wj(bLLe(P$d2ZW_0%XMZP<3O72ta(vTyj%^pNkJSf(d9 zaM%y}f$1FK?b+}lB*8-J05=U27-UR*Ic8~&W@Rq$geGFT`>+N)wG%sVSusmcz>a2V zIL407(gXumZOu$izT19^gXQfVK|l1ocsF41kv4o-Rg#6re-zCebEPsAYUQ1AM5so>kC4IiGnA;gV{c-Q~cHIbHDW3`9+hY^mT|C#E) z$m$=-zj?EWrF?kZ20g}sWVIB8$Pti zENPWlLKCFVnI(j;Zvr>Ti70%BZjy(KTz?RC zlT3-`jCI+WZjv>wfWS?{wG)ArgRs8^=yrlp5Z>X9-S+KglDe z7r*0(CDiLr@(hyB1`d+}&Jb_jDLy!S#iV(}Ao{a};+IAOcj`FS0vfDr7Ql)ae=ILV z0H_Zu?H<7T!DYi}9CjiuGprL-~4hoyL&At)fQF+#``7rwPq zd@&bywk3Z_dQ+|yLOx%#f;GJh`q&Vdlb7h3^RJX`XpvO@sF3b_wW@U^T`UjhV5!(k zO|_)#=n*G7gtJ_G7x|m5QPo9?ke0(?P%7eZD?;lIl;W3t)qiWSS~57PEP>qMp<(Y2 z&j^jRiEU-#@U^-|mgNOPHU3r0KgAA*TEmPZ)$%XFl``24dZV~%Ir5%8swLF#6J52m zs0#^I%dqQ0YF!s%s^x)|u`WcaL4|?+|a36ze zdHy8_PNr(v8@pE|y{oQLJ)=}D#aD!|c6f&vth-mW>?81gYc15jyHv}}GiY*zs$~J* z(Ty*iihHP9?y{zcsg}vVAG2z?1ZOXSH^!n`W?2!Ls^xhY7brWXTGrShOW9RRlT1=) zn9W5nO(pl(Zb=nlEn_|H&z8XcY%%+@h4yDl#QtnADQcJfN!_bmuiFbKIxM1<_9ugF z8qECXQB!q6*BdkZU$2(_i_yFir<}r)D(rAjbOcaz7!)0Zq9X!DS4mNqpup-KgQ5#i zV6#IM(J3gZEovs+_|>el=AI+QZczZN$c`b8d+@sbj7*aTF7s}D!elQ|4V17}8e3%3#!h;l`nE|_!kW0*9dgW*au?$R ziOC`(on;t;;hiofpFrtIlbEn!)~b1&1vY-ff*QvrCdaD9reCIVASN|LIwB@r4)roa-HFNU zOZB~v{Z~UV>8Q&hCI^-jP0g9MQ9KJ#S@hcxMCF3fiptmioGB{rLFqdX73Xq#c{K_h zT~4E9b8&rGgul%QIRQn*;ba;m=PX}T=HQ9ON?#}{+ddOx7HO1oA0M@-JUBQ?jdJ}` z)vNxy*E<+Bj!jhNsm1zD03j-iiF8C%svPQbai^WefjeT;~HloO0IY9H?xSzYhZ;j?AWQ45oP6XI4CHqth_Li ztelF07vv%~NcjUw8Btay*whNf(il=7YRoo{{9jiKu9UGsU}LBGzpxrZ5x(XVorMmT zv1gbRv8bLsQ!5i`YNc2mL+Jl%avj4G*D*N%*F~;lu&I^bacbq@pHZrJd1_^q=eo$z z`@a?o7~lWZp*ODr_c8dt`v2s>$@G6=uAKg_PpY2L`oI1wgcbfTgLU`%zpyF@;QiKG zXt(*ldc_x^|7&`o8>u_K;4ewVobmbk6EjXBfauv!S!B)YXrUW_*eJnl~>QaN&)(d z=#>2`*MH2yod&1rl}|5{?D_qN^vXk<$D~)@`P{DRm9BHczPi<04lvLMdB+NzU7oVP z<=GMS3U)7mu)g&Zs%MmX<**2>9bW6hDr5KR73|Ug@UFKO+HHEJMtl+Kl`h8@WsWaQ zubgq75c2s#dgbocG3%9Sw~bk^bYM`#k;xXgmSa=)$Nefzuly(A^~WnTn_~0zuwm@Mqb@Lq`dr+@vHeSD$FRS}AKOp$F1}fu z8=q9c*nVm_wqNEQi4&2cWB6cZCHG4vQ#(Dga>CEk1Z5vPY-zktt2`vKUuH}+(FLW2 zJY!BU$1SzSEfkbrFNm><1m(#4M=dBDem_bjdTbpXzN4f`ZW&G}tB+KRUtA zi3`dCyvqrOdnhQ6pB2MCA}A|w+6h6K0g3?Q*BN}D;LO1v~)ZL^?eKLmqSA30<>%G1*5R`CI1@n)&!TjU0 z5uL@Y_r>KWm{_?T`{VnTS8S?&0EY_Thfq%LMG?N`HNrgoc#xA9MD@2C4^4DADFBO@ zoUC%pG7ER~s+5z@e>}!1l9QgMQOn6`-J_I~z2>Q2CnsM=jbpRCwyMRJne;(UYKU}1 zPP!cGWrn(wlQr{W*hl1KR{5^W$%Y?|ASYiRNltEgI89C}QN)OHGQm7w*l-tJ*e{LL zf-6zN@_QF-StT=zKY8I>nKB4E@{wt80q40H?L@d9VpJzqa};AGCI;7lC|#jI0R z&nP`#M@3-m@E-kv%J79|_XMjPEbvOLg?5|gYq9tu^n6u2zLdpUMVTwqgP%%Gb%0WKSI5-)%72BuKzH-@|6O>XpwI z2pFeV-U=|NSDvmXIJ>M@5eDD}#3P6}b|@U8%ifOYrkmG=w0BOQ3V zEmGw?+8d!>S%`Pq8@afLdS#n6h0hn7Q8^dBf4Zv1pjS5CAl?{@Ub)ta$kZ!|pQeph zp8B>LCHqYM_?c1pu$uWJA2JSN@Wez8Qz3WB|JCgHYN_#+{9h*uM}Gyn9K};`64EGV zR4#3G9n8+os2qNR>h=9!c7V|s{9p6bVpY}y(EmlGBjfrR=bK1%80xw_`uBaY(N zUn|bt{*20#cbfG1D~N*`mHVzXncC?YmAUt&2}&c1_6@KR9AM)ip6h&({Vm2s6VL$` zn|dq&kC>pWcHD9p?#=;rLw<}^Bq&ebF=|0M_2E$p%B16>g7P)gNTtRuY1gJ6m#D=) zYvM--7?F+$O1DG3!ccdDQgVC@`-q?%deu${$`5Ks5R}Hz3d##VN)wb6ir#^sj0aEg zl_L9)k#WKaN=Z?D&Nat0c1_CnbnUrh45to}_ zCgt4AMI~8Wv6+-@+S(v8lk!;D~(QfEv;ORK>6)VH)G zAGdBCwS4S%|0w07lQwTj>&8|~e>N*AUbRBuL>lADTMSHT`cq>JEmuFD=?seVc zsAo{Bj}$P@({(JsK)2uxf0f|uvZt%i2Pf0h^#cjT(?)_(db+mE4q@%^$^aw#blc#I zN09D@?Y{02cprA)?JiGOulOSLbj`TH4a*&0*bK@WjuJw?rwhJ?9PhGf>*~kg>AG&E zcw;P{u6!#Z)6@0tJET`);f{m12#xH{t_h}E9uPYmYYj7wRLg^cYlF$|2&(18OZKRi zSI;C$0lJLnT{R}va??G#s#-qyE&=0I%kOU1oA))` z$Dmqrd~h;V%g-bfHy*BfMyXo9^v)304(~{Vb@!^4p9?(CT4=XT&ew=9LeP6YwPOm$4Q{_ZPiG4dRb)wU1HrP2{UlMW(#tZr8``>^#cTZx6+_*Siii zj%{?`rxu%ModCUGL^|sIa;VS4JsjOHnH9r6vX9YYi^aV0d6cw$jHm>{D{g6BK)t7kP}^0TF5o#2y^^WXZ%7@`GB!(OjN#9F=|oC zsUM}N{OCWTqH-2$9Gj?YRg1mtP?bYR*y6aTEX2DUVYr8)a@^bWy^noFRDQQ;$D;D- z)Ci*T+0ly1JjH6q_h&f?rSCvg#=~670sC<6VVx0j0*Z>Gq1!}~Tw}BIj$f7M zBg)DIbA+9!<~hQcZ5%nmP7+)<8yf^8m-xP4?_0pOaopsO>G#aBOwc)&oQv2ogmWx& z@UBs*>ln-t_Q*l5V~9kl9C`z#dY9)|igB0@?E#&zGO8n0j-4)GoFlBWSZ`hx?qhI- z{mr%nu@hF}N2;7Ep}6jis%Mmru(H>Ouy%N}3|3!gcF!EkX#(#L)#xIhHps5^s!Uj^(%KhpHvEKg+w;O0|ShDmPuH zCd%#wn_zn7T=BxMtyRX6UO7*2L8Fu|gt?NHbuUwud z+4K7kMX5Y??U?k+QMNJDF6fn>1H-<$)msHHpr5=G1kNtc-EV|%Mrtl|g5_cf#XDcC zdPb>Nj*h_E;dNZ2GIp6MwEq`eX9l?8aGy)hN{P_LZ(8X@HKh4jij ztH!KX-gx?$^-9;rN6;%@Uz4U+J^*zK;+{aQyq*acUSsYW%s(q{Yj*x4%OJ8_uGn*CI-8{5xBjqDJ1eewNj zwb)+`8~VYBbYyHleTj)wyP@vJ_WK+V!~Vru2XBjY$gB_)clHVRI387TmJn2fA)j4}&%-~Tl=#wC)G zAR|?3u}4kv=>HoV{N(~l zNk(3?Dou~vi6TankqPGK`i+`pz{os~{9L~kTxS_vBlx-gaXcHw^|bzweb4;K1f4%A zR)-M!xtd&uu*7u;=I1K^_hibR`7o}oe{%W%#P~unDvw=kUHus5Po6kgjWL$_lUuBa%!R~%S}wg3i&2>e zkbTvX;p&=Ts^xEDhjrF4<4CpqU2qMXJdB`PZasF7YI*fcp%kFYh)&I~a$U$Q+-Yl? zYB}n~SQnxgm9h)Rq*?}wcU84~bttM@-Ul$KTK>71;Ow$$S>%J0sapOmp?JnfFiO?( zmlr}C-717^oEHu%@q=g(~4lu_nwZW~;?+FyW&E?9*{ES%7yrz;F-6JFlwxv>&B;4nSz^3GFV6VjzZnASSuq@7@)N zNyc0Xw8@BbDPJs%i%&3@a_Kunq0F$9H(r=2ChnxN@jm5vmWckW5pkl6NdY*-#AKD@ zm07r>OQo26%-GdJxSY{-`&pwFlh<82N-=rlxu}?2j2g!#CX3W!@BOn%g_zV3>4=zg zIn>JxbtfjLc_WF*z@fV)CYPK!f|z`IBr&=Ff=n?fL@6U^laei~0v`=R^rlr-!cuIS za^h>y#vN^m&cjYUaB5|uqdd_CH|%Hfyv8$Blp-z4lT%WOt`r;@5907W+@W7TlXqs) z%YRmMu*6hBF0v-QYoj^yg5Q|8E0t6J08?^M!kK3zy?^zofd13C^y!nxSf1#vOf<`M z&vi?gkk(w8s4q{nq_8duKqR~r7CG_34@L6IQO}kX!Sn>|mbJ;LcrN1=>A6Y=cvH5m zgzeFstW2~fy`xVO1uGM^<%vP0lqZH#_(OfQm5HkIL|rN|sA`6p%=)&b@Q12~S>IOG zH>~=$s=i^>hji43^jwwPWAt2-OrvKHOH8BZz%yCsd3ZEuoSr@D^!&CJ@W?}j<_K{;_NjmPK>MAO1Ajnwjkh@Y4IyQo<`4XE&k6xW@+&` z(VTI5X0&*d6|kKa-#d`;IcYN9IX?};Y%P9HHVD5G%^8OMvFiF zA9KwtiFR%iv#qUDKSF*)hPkRMh{M#Q%qi41jKjw)n zExtUOGfvNp79afGj#_+VJw7#B&q%iVO;$m?#ebfN;1-84qs2dN1z3y!2pM0=7XRkS zuV9Neof4r6>6xv?PwLLn;@3rU#_5^S;xGMn*IWFcXgwpf_}8q0c#HSgAwQKq4nnsz3v~NtgU+2vl#MI5 zrbD;6D<(G)D!yHyc1Eb!p7i?u?%-?>d>h>b5n7BSJ^y9Z#HHu!(VTHAW=PLlt$_ZI z)3=y(tR6Em5DldIL7MRNF`kRR3@6>-e^gB|9svdUL*HLOX%LHsZ6YclVj}e z4V3KM8>J_uku+PEnfvQ3jCoo#XPl%N0`%CgqD>zapm(8^3;}xauNeaL)QM?uW)q+# zR!zL=Z;$4T!8fIomV z0ZNif|A>R5u+;?E2fPY*A)1%U4{0rxi3Y9>MKT>>h)+}lTd*PO>!nAmPad&edBpnU z5$lyl4C(NQAwBTGwSYw-n`i&UkpL3lA;o$0P+wgoXP@igw^MzCbmOsNdFW8pAnO}a zeS@lRNc9b>KBS{Qq@y22$groXLfpD&PSoorKv+_S)E{OASkr$A z88e!GUD8YXj0rJxedj6BI!0>x$9|Coy8WX$G(A0vT2}FD?DgN z`8QglIpfe}Q1KKiAPW_1P)bHObofw4H*|KiHnw&)Dn9kIEUkS=G-n*n3@UE00*s1# z3$#osUiXiTZm8+FouJ}L*`T{Fnllbv1{GiG5PDgtcpgg0pyJ;%t)aYVZ6i_f7ON)S z+P|3-!7vVI1{Ke?0*s3HBV&d{!y3BCm*|ieuZY$$l0^UWu`F#oCz>-3T?Q4Ktbi<3 zoGwt)Y|3>nWbopnb~@4aCHjnPaITByjKi5h#XKv(sCW%BW}{+`-`|8(oE@!WBr4wX zXcj8|{rw}haRwEyumVKI8@9B=?hW{5Zh4}tvUC;JmX#-JQiV0CL|OS>sYFd1EINHx zv$3=eP$~UXV((r*cw-)f!GzCC~Kcw~Nc5F1D>~_47msbF z^Kh+pR5=BAV!~gN-sVRHPFteK2-{O$Dyop(e5m?plz}|Gnla5S8P2)t`cz`WIRcg&&f>+4rmQd8XoXuGDw9{vL~#YwzeQVJ zVf%aE@C)0D!fdYgxJ2)Yy|>Np9k?Mie}gq&O5i$?^9VE-h1CX9P?_9DK>;(@1}t7{ zEG`3#HeM}kJS{yzH5<}-cLvCmD&;l8yI~^5nMP(^TLOD7lQrw}6Ln%HIjh)d~~Q5wmDZR+qA;vJPQoq{|0j=v z)X4QC#NYKVDZO$*+`k3w;=On@o5b^Zr>4C06jaE1BwcE%N~I+$C4))tii_le)Pf~S zC4N}IoA(Xv6P8yge&$$P>A`SY$(5zE@ojl&0j^^mcSB;WuB12rpTg|LZfL13>X^bDWUD;tPIFkQu@IZd8eilO_Z;uK)#wxzM9yGO<+c!omxtYTBJhM#Z#BH z6wqlw#%h)>tJ7$$K3xV^6W>x^BQh8!LMosZ(S5fi+9@ySbMq6eltHjcgUMh!We`JA zsIk2Gx|OQ7M76D3!D@{Tc4T?p)}ta?pY}or(MVfoQSzWzI23KJTX`^=6Zl6)c^&9O zA7F~VZslYvp#KqYJ{Hdy=%6b2y)!@2HSMOq3z^1}-btk`E6)|hdo+|jf}%iHwods0 z??1`_90t?5=pv`x+_GQinwE(6zfdB2vk5+V9|Q2hZlld!1LvsVEgT%9n?}Jy7)gKw zadib_)Qo}$GYh^*1t0GhJV;?EgglVwlT(F_<((*DQs*zx>kpR{4ZFVm0Po>eM>_m~ z9*fwnn7S>|+5Z~0F$|4qRV@g`0}}6ODrSF@sAx;9t9L!gQtL?)6-jU3hg?C%ISuGk zg-sdOmj&awqmE2#&1~bjdt0)!=Fsd&&UkBPSbr<50Ex(1H*Bdw+X)ERYLt=eI;fU1 zQX7$xdL1VVd#{e{KpClrjMSwHYsuoY_tupssD!bpEz_-l{#j6lB}KX5B>+1az!tpN4R`~?5$z6*1@p0G+D!w(w8jMJ zd^HEU1XyH8aCulKIFB|}f?P@gY8Rh(Wb*lH@%fp)z<1D8oZkwwZf#;?*_8bUE>Y2t zsBTwuucQpZ+Utsj#|t9VlUek2D*D9-9Cdmq{-2<;2}LKpQ&;|*-g^R9T{e9N^ms(1 zY79+EPILboBsn!X)7H0?CH_=g^rxJa?-NuKY|wU%-wg-iJ?M)o4azx*jbYXmM>X|Q z>>_G>>ZPW}n@#wf8o$wRRpZKPr+!hHbg!?UhmBG0cy}733}@+9XK%{FD4&hyj5Eq` zI-?9UTLGWg>eST?S{Bm3h7foL^`b#&910QWFGJN0$Mj-aOrOF&wD0&JV_yaa3(B#P zM`}HjgOX!|uP>^Jr(6Hv6ue9$^$a#D1OTg0fUiUKA^_||_j9D9C@v`~&bcPHO`=GN z9@syXC@v`1dulxkGnL6sL*_`i21hAf(={w(5L2bRMtYAhv0Nh(SB&gd)`+oVeqzmv z*QE-}tmi?mzt^@z*}!w|OK`2DG?sb(W06R35-y+A^*54x$^QBD+>IjrCHT> zUwDl)vl1(LEuUZIw{dka)ZUPvsGhdw>uPVdrbbt4R@lA`DQGX;p+sue7EE2!vhuYY za1=K9olX6~G?)W41>A799vY1bEm7}!Mrc3ujCGkk<5wg$PdRC(fmefJADadAs98IG zFKEHC>FE46^q&n}@s?W8R^dqJUSf~I&L2P%nz46~CMBDeAr-Tw&#Oa_Ep6i(t;nWB zW;YnIa%}kB-wCJ?%EB4$P%uy&fF2sirw7yz)JZ3XkLFkv}bsURWAEG7Njv zY0MDtT`9R%U~jrU6q78jN~ji(#lmp((HZ2F2`$J$ht3v<4wAg>qBG=+L0_tHXc83j zaB4jvFdq?yva?e2ktCA_vrAL@T+RbcohyEiC_GP3=ChQ-zdIQlA>|cmxj>E2E(qNzLU_X0r!Y*h-g9F`W z<=Zh*s4SIYGf&WZa$-u)WKIKixzATZQD3O}vW#R`3D;C_GFA|1l}G zUfIlAB>$;Pao!sfgw^=Wft4sW8;zZ4aoCBjkypPASJ#OayG|5#7ITl#kJd@->hE=G zp$RR-IRV2OgFjTV&c`>g&eXy>RxPW<>F4T_qH3uH4q!C^t%h2tN)@hyf>n3Ws&Xq* zwv!JXy)yt4v~y*tRap!5%wlO7_|q72&_MUsIgF_FspXJ_>5i;g&d_2rt9E(#6C*T!op|`=<`(|)Lpc$;(QY&}h`<11h5Nh-Z)kxkT zN|nh;FlMwcpwXz+NVMo*_3>&hDQXtAxMzc?)eLIEEe3#yg<0MN?!t~CrPK4t%(%FTHv_muq zz#z0O(M^lk}p6DSL z_5@tmV|3-2?6wxf@k?JxQJ?7AOCV^R^ntFusX`8^Mb|!-YyMVKFf>c7vfX5s+%0;3 z;s=I~<91je(tFzLJupg)`-XfgHtd9)fDJJp*g4Set$Y(b@LiRO z8oB@BxatLiK#tHGx#el_iek*t$7DWu&Svc+@SfKG^hv}$t^MiK+8?9?bfjag(Nq+k z#1bIPS$s*(m`Y5UCbno%(4gkFB6GVHktIe!*xxX@dx-T7tG*%CH>~=GR3Fk&AJTJG zxEx9FP>6oeWTkYN%ej;)Y^B+|vIS$C$@OYwsLpLGyS$Av#27xoTipl*3$CP#DoyM8 z3xy80ufys3Y_{z;@6N(Te|%$v0fEx?*yutlVBp}O@BN`lV> zEc?_#z++9~F$^dhFv?8lF)9I@AB^x=n5a=JvNpH5Dd9v*exjK?28L}k9%})Qy%rdA z3`c(I0CeU!B#*7DOccu-+acEK0+;GR?FZU)vCX^H=3Q#@Znb%r+8pUrNt<3$$i^eT;FS|X; z+*9*L!`y48MU0D)*6AH!6$HJrd^8nzld1ufVuOmfJo2%dog#DNzDXd?iQRT z^y;*^*RC43%>DSSQRcpU-_bDlU-pTx=tySC3acQ_-1kIt?tr=9YXwA@dqB+nq%nPz zxyP|b?wP&G+^>*FuDQtgZJc=IF0T%GtjjwPl+Y4dbAj%_BUe6UCwMH+Dv0yg>Cv1! z;IUual5QOgiN~(KP3ch{YahQJx$ALo(W|oqP0b&-9cb11khxpEqxTw32UtM=$jOp8CQZqrA`{932ewFszr=LD< znfr;GqRf5O*3mHc-~UHnZ=boZu?phM-4xBa1LmG%1w@!TSIpgOOg}-G+xyq6mASus z{X#P4RgQ2zTQ4_Z?FpD%>CqWL@ai|+~->X5$2vQ=AOJxWlRv}J^&cM zI&JQA7LQxzp1C&4+|Bnx|wdxrM&bHC0foMF!yy=Kh$8WystmTc$hxK<}VdClyS=lK6c#C!Wt4xXS+x>wWAutao+4o#+3C zd=AWM-+K^CS=tiAaKK>I*KmGf>lG|$(!i1Y1~3n=%|)z=;$Vi?PT6bD13|c~Rk-)I z#PGnwYZK3FaaGBdIj-IixLj4T1q+U}6bF^-p}^7yvBYOGBEM~Shm{BOSCWd$new!p zX)2a8^}hu8(0YiM?y&QtxHzbADpv%Zj1mz;Je(@TDj`p=!>6aVCv1q(dWp)13FH|(p%AkFo%Ru|8#+?jqBkF5^1Uxeh96$fM{FRhjp?< z6EQW6TEN%6SYC7nR?a`N#xVww*1|#N#0Oijf>XN*^r!?Z9rR1cvk$m=AxpT?N^tbe z+no5HoM}Gp=a2C4`x-Vo%AMPSSmpMJw6OsmweAi2@6$uS{oYE(^J z-i(@*&N`5aYlY&pNIUEVQ&{1C=VI+hZ25fE^Z~0W00vP6Uq>A3Pl}6vlEaWNS7S7J z#qmuAh$$`CLN^OzT;*a+XW-7QB35AmU(!3YRIRnS^fJ8W^#5KVG8+hd1t2-TsYa!6 z*?pUqI`+6y%3LY@CFwn7E#{X}%@8oRqOZdu*APG1L0nq~_HzOMTDgh^g8Hx%tNZlf z3Vhhf58L@+r&x%K+MqxbklQ-#ruX`#_j1`OShV@wSh?;|6u5rRR{6YO>Lv6yc)zy#v z!chP4NcCUj7l$Z)+peYFuYa(lXfU(>V_b&9E{VXT&dCf0!?MUO<9-Y2-_Nzdz#ENR z7Qg&6ta7#=CaqOVzfz*|Dbe~WV~>|rR4!3Xxqj#4MmTrlO z%J2=_7nQ{-B@~qnu9UgBQ{YTgeh@EZe2dCeBI=Jm?|Sq;e{YKsMa43F!Ot*OQL*Aa z;1{=JQLzmBxC|3YREkCG(~Lb{R#CY@HT|*Jwd$xurA16m-CJ^;Llx6|3ns)%3%ntfKNzanVCr3@|0HIHswXOr9ui zORQ;f?7hs`J5ikU?*4x<3HiG0u3Fk%RkFK!nK@#;9kSdcq}_^e*4xGLQWnZG0^wy9 zXvYAUQ(b{M)fF|T6pzr25Q@O=!u~1^tPOL|7Kn}{y$rq=!g(a&YGn>2lIVW`~t$8nst!>i_? zsXB<;ss`_2v=tct)#5!Ek82QsnjTZ5NVn~6ayMHbXb%R4P6?+)cs-m1W;2DFCjPz`0nabxt<0?*sek0LhqmY*Lfna;NK7th9>{rn=09yYF0eiy;LK)Piit`@<~cXSFi7H)Z3pHfaZ zN=C>lS(zAKIzSZI3yy8SW@o=#tmJ2;9e zY&B-tYv5@ATlNAD_FfE}Ogh+$6rv*`V@)2I0;-JUqF66*-|y2JyDm#F@S!WRG+U*zzolaY;01oG~(bfj?cQ0-S$x zMokWmZ^Y(Imu%jfPm{dK-}(18C7MfSZ?6kIRa;_^I=d|~#2aj!{KOzscVcLBF^`7B z)?P#0f?0m)w!~KZXls6Am>+H3T+Dp}@zK_S{zo2Kw@!zL&hWl*@#LJ_r{b5U;mc`k z4kPE3D-N7`pRymwU!W8#6T`_f&+vZtX@Tu6W2RhYnvPFlCjq9J%mnK(Cv_lyQKms= zsX>H<}%8Q52zu^C~_x|y5 z9@V|@%9ay3QIL{2!2}l!nBtHhnBulJGQCRh7E|nY6XMow9b&))H#O7^Qewb@4bnrj zT5n&yw_0kz0nsW&1wqte7rmh6DnVF+>Md%c7A44uLIio16+|t92rAJ1e!pkt*+)N| zq~%`T_m8WOKC?4tX3jHn&Y77rXMWuxilYSU-0)2`-t{(6OOT_KC>?fjxY2>+C{ufm zcK%XD=?%=o0e|moX7ryXD_~DvmD_-^4dee3Xk`V8_r_GX3jD)n)2Lwh3|0YVOP_2@ zma^_9yz)W-zYMLI=5LIFcINk482n!W@|%+L&4)~i&uQ>SwPD?_GK2qR2n;2#7Y{-; z2fdSAEY%4phQjh+&tVd`Ki7Qh0sK_eeBACZ)y2|@Fz?y}R}<#7njqaMRUMH>3RKdS zN~#xH2noM*VW6Ca3KhwW)P7;0_pobsq)fCh06t7dAChVgZ3HU>i%~6EA$XgiaxHMz zP;wHLM%$X=4>*YlNsf99*bs6qF`Z4|FmwmXWS0_5vws0#;6=Rq>zDh&cd;RiwA`&Ar=HVX7C|JeZ3rI*C6)I>zkuP z$+1KOA9luE$~_^q%hKvV{48k&BI52`Q*LkjV@JgiDpv=x;uq^AmL(?aOy#P?g3^^9 z##ID>WP;;xa{<$2f_C_`=7M>Qfv8xRln@|Q*<2vm5;ZM7=xlO9J(C6HOK%)`^9Es3 zb}&j{lvM=r$rDkQ*RnJh=!&wu?Z#7?%Znod24M=>_CUj>ef2gn-S&o5_yyN=6i+c`2DC1_OD7l*61tgSF!FQWcfX+| zPaat9ZdFp=_=QZ1KJ`20R;s(dvgX=#4gu?iJ8^!+K{-}gz1Y(AZGS@!>yNvF>fbK0 zDqR+@PU$uS{#BY!+XZ;H2VC2t;*YTSY6aIrMhQaKP;M7~q`eYfQ!Kegk12XbjKroV^Y+l*zwl+4A9RT9)SGtpEMQj&NM8}z2cM-8?3?>lt6_`{M zAz~%up`yl#tNP=mx2*E+cXbRTg7tsC3G^GDGpH_xVp9K;osw zo^~}`y0HsX%D_x8tuO3QNoL><>GmjV)UycJ1%$FuGn7?&%+)t8C|&8{Y|b!T}0>|J|f%~0Qc+}dV zUGmQ!gc-^Lw^2ywW^_kjHlW`LoW5WJXE$Rh@5%y)PhI3bg?n^#i>2LV$x)MrJ=P69 z$geu6dJxr4!a@9AI9PuO$Isp(;V6FNeA@C{pLjY+l*z@-X%q8&sG>a6R+3 zF`2!FLs8m+pf7X1q6iW57+lIckl>51eb}=QU>-A+3%XNC=(;OJb!nPop1xqr+og2M zyE60esg(N^nYUZ%W~mM#=&5m7QG|&3 z3@&9p)aEa}Rn^VvDmAuTW+*fNh>*~A*Hg-L?wGGH81oyHPI*^mK0fuv=u@c3(xIY5 zLj~Q~P*DcjI#D(-N*u%2@RR^a2lHv2uD9Yf;%U1|QzJw&U3xs5JF0StN)jTL(+d&l z2_c$)lTqMa(zWiJt?eys>Dc-M_UaZ)l%ZX-3tp`KtZ%_QrBAe& zdc568lL`6(&E@%ds8(>jdi;B?kOF%3c(u>f7p12vwsi62l5AcH_?!^*;bdp&JFf5G zn_`U83t-2=eVl`Zb6mA)MFk_(_w`bJXOy-pi?@)BEPK1qBq)~9c#~Zc{bZMN$L{WY z#wRI)dEyO@0Ff_Pui4?TSda_st9@MDf)bnTTPnrBmkQ?&7!R>Nf%4VD0-+X?XFEsLVNKkOhN~|OtB7- zsqXzMPfRZb(l;8?(tWvLQiL4#h>yQ1Ib?uHn-C*19s$w^q7>n2-~3s`f#O`*Ny_D&1x%<8~C<+e9n~QM{^d`$UTE^0NsR< zo7*hWG8Rs=4j}jTKU_*~jNnt&WJ>qRgfT0Ffs6?+^UR&~CJb626jfc0G82aK&UvYP zdW%9g$UT(oBGsFlx-M+Eh)rVWnjD&3SLu5gnDB;*yA|KBZtguXq#pkQky5n{CmepBmExcQy5M z^zx>*MLFN@bM|8sC$95vOMbC+=VdwG4cxG%SczU(Pq5r*#T(GWPAXnyShTi-MzyGT z!_7^@@#2BQtNcfXt(B74+~N$Yl3p$ug|Wys3b0ogW!E;Q)-sB&&9B+b!bplz@bdmy zXIiAiT1(nmq?dWh$+tZ)hu3vv!)Du>2X(Pa87Su1wz!x_8(S^yU2gS!l5&f0$Jz;6 z7uE>TTBcmL#KysP0uVP1uhcCaO@$YG((o&IC@GiB;YMQ(-R@%=o);R|VXZOc9v%ZJ zQsG*A<5&cl7I9{1xkIU@NtPLrWg290_Qri_ypYpyyNEe1!yUSaad){SGUyuKN#&YA zuD*?^FBW8nk|Ueo^98``%E+4vv(w-=9|Hr1DPdzr!LLv8>t?XTZK;)|Bl;pr2tiCwIFK*Qr`|xbfj`$bdv*XY6U!0aT5ZIos?ZU9_46C>{xPlFL3bOP# z8tzo-d$8g|%JBqV*p{q@5I^pVh{`-|5p&7MvDXB~&)x9?j)ElPm@$D9W0Tgb#Ua``CDBK3#9--8R4>$Qc^eIvAuZ?=X4fkY|JznR59~YV9 zBYf%<!wPZ4s+5@o}y*6Pw0O*#sEkx#H1>j3G7wFs2 zaJhRUsb$U8j9Ji3t@N0^c!ZK6AwQCM_obk5F1H!}+pY;mVb=hun+u$f$MAdGs+?kQ{^5<{=#ahiaeWP!Oo$SHeN^a$7C*!cyY+>PD z=UawE+da(Jde1unOc&_Fw5!+U&h_zX|M6~Q%;bCEy6L#Sles_h;8PDZKbUyxo0(iM zliYI(?wR0Ya4WJ3Y`=%Oj=jXJ(A#B@fB$o`c_!a3!~7j6A2TG{a{Ot{v1DxlT`i?H zCd z=)VQb$lfE{!9D%R+gzZVc=vfvDQG79)wTsr8j3wlMn&X-y9y2b0x)>3?s9J%IrLpX zQ{kVP7+9XxfJbT~akFz5sc=6Y)BxK}C;f0#+o=8(|Bw}PpL(p~!OX)~>T-mSnQzqG_v4D6fe!zg`S%Py!(6Y@r}ddvmeVi6`3i?qX{{G2euKSg)buxo z{{mA6*bwz8n4F|Lv_FAQg}6Jx(>5~Pam-!@*@e64o10pza5Ttw=-j7~3O{s%>(E=d zTWxPkw4R-9--O*1+4M%ZtOBVWqttT@uRU_dqk8yY<#w~!R4wSY)Z$EHct6ngAK>*s z^-1%WfH_Wv#X2G(~``{Hfvw6!x6b?azu>WJ5E z4I;7rm2!2%erdiFiV8#BJD%Os9@Vm9cnvFvxp4H2RM=pjh_H7yH+9CbpC|15J@!tU z|FNsa%a444+V9O+5&Pv!uyYO<$9}%B|IA1LEd<&DUj0NSVDHNA>0SZ*j*Sg(ib~tp z+|(DxS0#L(_4xWQ<-=Q_hOalf2XC>uog^!kmJd&{&2!xD&$&lH24sDa9zs2X8vLM? zr2!~uIjuTjLI9=0saEz}6<^%uWB{%ySX0U~RaUU3o13O(;*e&}Y1niw(h*RQu#nJ zo6c(9y(auqpL`yvG8Jx{#5Qyy(s{<`(c@C*nSjTcIqquess}9^Q2eelEo*k8MlyCh zF%;~AA5n=uRD9tJ3ky%ez*i4gCchIdo=iqu8V|6dQ|g2_aW>!w9{T>n#YZQ9G?;8y zReFh98uLJn$>Mz}kjbT*JbMq}rS(`PWwG)sQyl+Uee0p`KlD}NOHU=!^YuVkZQo54 z`5K{16PCZY6VWU#Hn%^;gSsh>1XOG`)x&&!q4C?YJ@VCud`7<=ta10ko)e`nyHC(O z)p%kNg0C5Y9fE&5yJibIH7ntd2G>Mru>`{`cl`ByRX+4j)b32{+h@5!Z&RY;0!)RD{;# z=h97|t7zPcy!Fjt%`&3>>u$-QqqVpJ?xL=i6WzLf6`P@x-KC(+^0$R2Y*^KEQkRz_ zt_k075l`KG!sO=^!l;U94dZWJvaja&Cs8{X$of8${pKNB#j49zvD_F1I2eIT)e$>R z;DhOnfJ}ZAZgYWdqG6rIHP2iS47~gN=77)(vN`@__VnxJCbgZl;jjLdYiel490lwZ zT{}F3`S-_LlV5I2ez`UIK)UIHMB@eSg=!aWuyKn7UTEwL|C&)L$-RDfF&p!)6OI@yA3@HAJ*SE#d_m+afAF>~;THQIrS5Xa z`e9JdOm!6L@0N)V{#)vySO z`C#d58Zt(5!5qoT8R*m5>_R1?O~?-!>}Yf&gOGA2<3_u*g){%FWx1cnTf zC>6fuAva`zP}81nGf!*I+m_jb2f1vc=$^4`MfQeD%*!)-Cm#C#+2pwOfNRh}UU+uR zHdOxX&6B0IXV=u57bzx^lMgk0|JH2s`=_dJ#aADC$MiREo_pvW--qc&69)`H7x*cI z+Qj+ci(VHSe!dBgB*)Gse0RqV{uN*o1~1yZ9FFn&wxY zrpVY%9JwC%MN4tlwCqBujMtc3yDDr%_T~azSN#ja-}a~pU0i+W0>Li>nl8|-s0qG^ zdPlfuvAU~3cS(`IE^=)5c$p%;t;ZMH$ni4fFVKyXV=KaUX(P>wxX)hinJU~{;M&WR z9=DN$Sla@+@p>d0%4FY$xaI;~M~~|8H#}}ajUJ^Jt3Rp^-}$ThF7{sIz6!RYiW002 zYEHRe9m0M$4J~DUFeB-+dA4Zo(q#+>HF-3y$;a7{dHm=mE5Lu@Vcv}@#twW2g~l%3 zzq9&)1Bl4wSxRiAf{W&&V~3-!al|B$mIF4{V?NiWC_U#;vh87qHLybzAPe-F#g7~M zEHPoWOP4-u=wo+K4{t7D0(+n_s~tz|RTzU=q=iWa0aBGi+8Dym3~9R-ec0qH4Eu$x zTK)s@n^}t36!Lu(lZmo|#`>t5man1j&ACkqhlGKyqq? zv^D&)I`WX3-2=YAQw|V>dCGcDT9)+|xHdI5i;>NaTU_FmC&-5Wt%g1qXukn=mB6^- zwv8OmMg&V9H;v6Uog6QJp0*lI@@0?VB)?4(uTWck}&Tu$I4^Igs=(CMrK0G&LCRlq9!PLJ{guwi|p z8(S54qBhUM8W*vn;XrmzkK>+FwfGGUHE!*;*a-A)Z#cHDsH3?an^@SS7Ii&~FOce${e@dyoH9+*kyvv|Uju9U zz?xH7=f{*otf46&Bg=@?`+nFr#F_#B^+DK!#G1jSteKE({<7<7U@!t}2Fl+a)=fzx za2;#7wnc*tKm+GsjiG#ShlmOTjO2!vA1{w%R)4MPjhQ^!P61vl;3_?VE0a{|abM{P zR2s|hKs2sOhr){$-$|+%{yS5cF0c-<<^PaoDy?d{I-GNxOu5Ng9cru&P#sOL;e*CA zV5EeLM2B!)o82=*dP}mR*L7zQ3CVg63_8$p(glq~jemm2Wxb)-zVMkkB`AH$NV3|! zF+AJcH0#E_i^AWuG|=C@j%6)yPRyp3%?d9$cT>FmM+*ziszhrcluAe=X*r~a)y-EO z!D^jPL&8o8E+hT0NeI5;20|#BIQmo`7j`jLowyx^eHv6ttY_8Jc8s=#3jMCkC<%x)r94Ywpnit+drl*5kzxNdJd zY-rvf$$rK?IFAL*Rj&R_%@`>i^w>bA#6B)+5E`1A3x|6f=0sESYPKR6M0T-Y{uY~jz2U_%1t92_0IRXW~21%2Q-A*HEt}6^|5t= zmQN9I>@=l=J{}F)%ED<2RnAP;rW=?GT2eV6O{E)<5(3bMy-7JWaOUMMAtzxXCp|_^ zB_k4fqW&e_+>{m}IU0+QxGNwHDr$5#aKSsfYC|1tt1A+R+g5e3$Cq}n z|E>=9E5B|siG*kmtr1(b>s61^w!6;hxa(j$m~7<%-%#G}P}**F+eVJXBK1QZ90#3E z+-SxD$5B3c!mQ%l)uu6AkGo=^t=85Th-`KS97@+I8fdqGYt45X0$=~GoSiqK%F#`JbV1tSgOtFFw%a5X^puL(m)+Y( zlYFez;;ncl<$XgH_#p;tbd6q_AJG0fY+KW|5vo!H7`pm}r(fbUAj~~RfKMBpZJ$Ff z&#&5vEZ-u(`bt;*VMe*?H~L(IQF>NCIXILYR$ELC*ChwBP1_ENC5LS{@-TNJtNkT= zb2{TiO#=U@0~HhaShZeM5c4KVJ=SG7*e@o)hzKxZ1kkn?tlmTf7;A1C)7U+#h6MtQ zfdHezGb#dXRC}uT?P(liI`eZ)#y&ckO-`siO)hOu|DpEOxYf0%|N36P@?dW$U+hro zw2V!QSS+=tQ0=J)q;>@idgV7tLOWoTZBRo!)Sh@y7aYN6C$*=V@cq_QuzF@OY)@{Z z?R3$IXFIy0nxB1JcQ!)K z>Uks@DRJEJDGXX%tV8-K<)tP^%u|%q*gnQL3IDWSy`KSr9qo{4hAGWF&3%l(zsvCV zrou^RNWzcwIK$lgOq&ANr<>PBl=7EjR z#{S7g=T!JNu6-xxVgH2jvo-l-3CkGRfcRwjQs6_Vq6RentOdgc$RgLrVCC3CZdC@t zgI#6VMvR6#OoCwv*740Yu(P!~zO^QY(oI9Ub<7x6ZCgPM+)%CWu1yqIq1}nhqm%_U zRNN81=Ed@Mrw}0_!Os)`nb$$}Zd7zl@4I=MYV-=6PvWK$a2rP+Mm=*!$ZhoZV-Y~>Ov7*;w+F@T;pN<> zF|)xPZo7f z5FE(gtL}4^?KR!UcZg~k+Y z?>tr90U_gRERTj0G}|u7;+o~LPSZ9{la2@#Cp+3ytm#wf;WNS80YSA@HmG(o zKQ?R2pfe5BhF4u>?L=`lO?8IpM(en%DvEE$g1zUs!|ABR8BueAu0wcn_^{F4W=rne zrRyWom>;3l+XRUl%dDHY7@EK9CR%UC;Ock(Ek+g5s0)<-wLEpi?Me89IH7(UhRSW^Kq*!-Y#RUgu zv)-hW^AL`b-JTZcTX`cGI@n})L<`I=PWh_$k`^%Q^+fmQ^n~xcnP|zA?Yq zePd8lntq$5Q*cXf@!uFVZ87@BxcXF#7UQlS-1W6RIkx;8ck3G`{5Qtj>_e6Sd;`m6 zZ1eR{9AqApW_?NcQlEapNvw=8yP##_%!L!}OT&eixsp#>L-Bl>!YLG&XkGZQPc-F> zCI#Aa5)Ic<_%Vn``WrSPWGuYUHdPkqp+_v_XgetW8&wL+RufFIy-RaL*=cF=eF~d< zMm9O$XYC*cK{S^5E(wFmqKU+1;jj5J`knz?3n5wev#;Qwmf4_p_oF~^}e$FSpv7T%bJ`brstrZ)48!y8ngiBx#`;^7TB&+(nM9TKqfJHTHHx&H5oYW9EW0x?zA+}(v>&EE@ewle5JSr#UN3d>B&DVJy) z6ePNg?j(Zkj1YXHMKKJSh+UC2P(IDXW**liN8FG{ST@fr@fe6UA$BK{{MPX78)$oq zS>F8m)%>3KQWG5|vV+2~G4ey`H;&+!UCKr+YyUAq=>pwEP4KwMdM0RPT60;|b_K1f zC*>CeRqc#IQB?)XGnuc@3HVu6Wz91_9+TCLNEy3FNq$#VeS=l)K#t{AEvTy3nt-?~ znsfz`D>$lp92qf^bar7E_cl&)TLad#O>S#&8~o`4UDW*%U-vGA?YM=cr$<4nd!PJ* zpzi%qD5|?ac_#BUJOw}NuB>^+$7AfEL`Jp<^Siq18?1XTaxAa=msIy(aXo|*`74%G zeAK-g8Oi3gsx~XxrV6Xs)wFzRt(sCMc3Y9ED+`s~vZDpF=xQOmUq?rIqUw$VYc@Xy z*H>y3epZ*TY@YG)7&G#@V?Z+ax#~K**mhao7y8KWNTP3$BvpuCPLh8RNnX9tk%Wo-Qj&@f zk|Y50Bsu^4Mv~jr2Fle=G*la1Ru%sqi#+LqMh_)=KC-6^bmO$yfUvu)hvGtmyr&Jv z<*Y$Ko2^kO5*LB;Oy((YHTX1EMpc|(RwH|i|4r#MfL6e)5 z{DOcsH$|a{HUjBZ7*B!SNJQEws~tRZ62%y=f$fU?jyC!RX~UT1w0TgpS@i-(8zyr0 zVOw>9+|&c+Y4deEY`mjUv?*6RlAG1V_hC*JmzzIC_H==6oHqLrcKc^Yn}Z4(ZH~w< z2x!v~g(BJrq^YH+&0!=WZIm_7_;`%1BKny#(>mJd8>G!4z?ReIUqqYlY;d$;B0u+4 z@j)A^x}G+lv-8M14vRMBYC~>5hAEZF&FbQtGznw7ik}t(ZT{BxH^+d~G*#KHDbUv)q&&3uCmGFoMmBOOGgC2+*EVN<5pwNVKF;tU0&C3s;)nIzSR}C zw_r|S(_u`s(!PqLMQa*wQx)Hfa@v8qM8kX8Q*!m~CiaV3eY2CvoT#0orMgpA^^>qv z)Ang?wGVC?@Kq`2U_0iXoJV^ zf02dyJF3yQp66<`$U^OE^u;G)LZRZKMm?SZn4s;JNX$Ibe94IfQ{y6*?>LdL37Vle z$HZxoNF+*I{UiocT1r_1PTd~FuaO3`S^|r|j2YlUPTuFk>nC}_RrT}P4{!T-SN8C~ zYWyD2%#SxdOuCuhfSdW@4vc#)7c*Rm*W1d>tlyx{i-~7x{fHgOx;%X3xsHMJZo*h) z6UHH&aXnLsQl}P&V7J%JIjc)qta>z{{UkCl6gb|Y2 zTZ5m0=IH`mSeV|fMr(n)r_mn*r`Hg+5)p?48$F5FZ`2V4-`cHjF%%660_Arxu^SXQ z?r}&UEUP2I@fh3S<3~ECbwh%_!6AX8-tum;28B(94;lyDrct{w&lDUC3EPlSM!E%6 zneH_WZ%Y^CxpT95HrBNKK;tB#S2euaplfSd&H`GjQy0LfEj1swHVSONW2>d>tZ6yT zbeAH^_)}5r0>GGr@8j?}$zD6UB#pp0f#P5WvcLqzEk z8p?2B+1n|El`;NKIr?2yg_Ko23fS_hV(NmbX4ko@GLh{#a>Ybdsmrjc;TFtP@5b3d zF_MPhR;dN;j(;3$+u8kh;@1j~0j)D;cRs-Z4VLLnS8|%JG15YfIN{WScBus&%gc#* zG|Kt-rLOmY`T97&j{)ttXTu%;VQj$a1A7m?b1IML$c1R^u74@+GVaKP+of9c_*(R3 zVGTwt`tcjpf*VVGp--_EuqpRP04><{!gaOiQ7w9x*8+BQ)Z&+XEns+ta?!5qhJD#!-sQDuTooRU$~GQb0~}@9uu3@Y%QlKZT1(WUu5809+sN{=U9Ga+ zb%~?!hz!;=V`Kf%3Hmy-AiCLAo>VR$&J(Tu>57YOzICO5Mc&?HfC>YoeHABiI>({C z3K-I%KuqzAlho6uq^C`KJ&hf(rA~!y|LO)d!rU+wk(zYp8S|)ePEtV|NOF*2fk;ZRS+IW#`ssw_U zD#r*Gh_Fx?pRFT`#%i7y1coZZz+IP*Vp&Ctim1w5PBG`S1g8rca~tql!7?Ip&lQ0Q zH~#NJ(2e5pMNcd*fH6=&L^g7U?3odJrj0$Z6?@o|zvFkLn9_p$=hC+JPN04ntk_R3 zUa?P+(8-aZKVfA75IS!LImlR@e38|H- z{8{r+7J@@ai8WQa7$T`mx{%X#PF!S$@>>vdUd`Qm5rmMd<*b#(|G1ET@)MRz(zl`*0%WW@hjreFds4-3 zrwbN#Mj`8XV5t-67hs+Lkcivvx&xW;?Ja>N)_K?YKX+DrZt9zrn{o#?Ri3?P3yN-a zUsasOxpQClE>%e`1*=CvtGi6>20`8X6~p+b?gIS+tn(*T_l^r)U)qZ@oWnZr)Sg>o z%pFj<<+6gq3R(rn7q|+JsDgv#f}`ayGzr-(zaSvZ)ln#t z5P|Yc=1H>&ev(F6b#r_?#*|8LLuXn?8hwML(M;ga?d7EMX5`O`H2L!#X{5+X5q0Y% zAj5hf)41}KB!n(T2fk*UE-j>zu_qHmBOj9D%#y&_1tyWmkkC|bBA4AP?wvY038j+svyk^*Y72@&SeNMCQ3 z6o1*DHk>>+JhjFZX15B%gv9`wG_L!D7si_hwFbhmx3YLR9`OZ4c;cs!8Fv^Vkzd^) z#M>SA!H+3}X7f->&Gx`uYd0~GGZ0gD4F#^N{hAttJAow2fX9A-xSsiVO^(B6xB*2h zUJ@(kLFJaqR&&^bD)v$N1%Z$pi$al*2&B_AUPu~{h(e;QdB(?M%)H>I`AqACMBkv0 z906>(kUStExuw$ag^9eGMg<1}4*{lDb3TfmF3{axbN7|tjs>>7>(|V4Rl{@4b4|m= z#kGjHu4GN|FQJf|2J958HO2pnI=YQNuzTPi6vEu!`deBLc+`isgjOR7tPa@i7Og$B zb54xaiD*AuyRJ=z{XoZou(1br3@k<*UtZ&{s>bhFZ8hc+Mhm}>2~3M`3W<^=0__@g zwMv{!5w2JW94^0iO#JySgQQ}khjY^C?X}yj~$sU%tH@0i7C(B*euod(er;wi| z?p|KvQI+_Mt6Yh@WsNz>5_hu1X2bci<{mpJUEC?hox9uu?20!+vjd7Zir=VsJXqq3 zH_YPU#7eXkc^Kx1XScuYpH;jKzIcN)v*by+vK`^eED*}u??n{3D^%C z0Yl!(@P+wRG7?x4XJxq6=c{EtA4My}G~@*s2nPmQ8Q$#?n3T=9_gl`j3)|5b9b&>i z&4?ExD>HlMvRFsBz8bUditL`bw(Bm&F3@YUH_v5XTeZT4X0Nsq;&8~>1n$z=J9qYq z(#w%AdmYUHi!VQWj!S#<+}YKnw`1QG@VB90&(gbzeGv=hIyg$$>{31gDCg>ZxGCl0?9&wXBYgzlayS54Y^YU5GZ zlZ4SclOKc|%YnI&z1E#pz+iyGKa1Q+%=wG=^sr8){(M}f(JKzSzf zBXlMF9J`e@&-i!@cJ&aV=Yh=c#%_IsV|N1a%g2S^MDLIa|H`*YCc^RLa=|fnGo-Qm zgYcvabhqF6`{vnF(|i`vVS%e^TK)wDbAdabYo4_YZ#NHax9+~$|c{~$9leRl3x(;eRC9w_%4ucjPcy% zphUhaYo77(7}%}}QI~Fh$9H{$eBXfh<$V7G@%__3aosr+xqjb@55BYC$5^}LnnrA{ zXB&m$MUqw&f5-2|yBbNb20@oK-KwBTc)k3Bpr$*cP*hWa@=WII!y$n+RaRY|8ISRr z`!=CsT31tjgEeK$@|xbFn%-}`#Ofy!;lVK>QNdADhN7CXBXBi6ulP3Xy)&^ozvk|> z7sthFpTtTG-z98vNrseyMuz?J3j#76h(Zw=1j;j+uk1efNd{%jGd>>UULn#1$^4EC z`Uc5x6LKsk!ykzZUzl?YXCh3m;9{>QY8=1n0DeI!G z*^I&ThH2d{Z~7gD^bJy|0kGv1dWR@<;weWVCh|MSReTWSFklpvEx5nAHD1+*^AtKu;5Qk%pyuwcJSQ$gN6RwQ3e?N?Z5xG7Dyp3>DAXB+A_@ug3$P3y z6NT>hk)u!tN^%a%@DAI6bvII^3v}bc(4`v4r7-j;XjSc#Ul3HaKMF-v73ddW2)3$b zf9R^(i;|qf5WGWoyaw^Awmgbu0b~D~;)^l08PZ;D3=%d#460soNq`XrjR52F3jzX6 zM4^ZP0xjB}J%&VV4a%Blyl*Fru?^ksh6io#cCA6*U~3pfs^zWW1LAettRnyuIg_^T zl{YgnJBeY$_)g-62h>Tlw)_$`G^4=U;zno)cA+EYF-CzYl}s)vFs-0bV9xw>L4o-w z6j4ARy&&rAIg3Q3fU@QpACIy79^Dm9vOhZt=&Pi_400@|0F6qiu=NLy0!-v~g5NU< zzda>O3WNxG3jEIf%PDYyAN{GB7B2x2?51~+#i&t<2}11Q)oKNe8tdg31k~6Ng(7MQ zlxH$u=XLOt8p@hyd_2Z1nce`+w2m732B}dC*m7!QM2+|SyQ2mZxn<>h67aj?gBn!` zd1_oYu$&qfmR@Jd)Q(j+w^!$SNv}j>;>?P3;!GXes)>m+fyKX`1@4@@ABERkGosUt|K{k#XnWr@e)ZEfK-C*)b9pwmm8q6qI?rdUnGm-(vNgF= zFy)h#*mK!T2~s&xp4~`mw$gZcKCALPFyqR@M7FDJNTy=8NL*nKsM=<}9=>dDCsVCd z9wuB~p0}ygvfZb${jx6`qsu|f zWkn#9WZYcDB$lKtpc^MjqNZgns2nk@0r7UGI9|5DQ`s)|Wn&^|lC>S>o(PLxqlitg zZCZ^Jj}+fs*d~q3mg4xiF)tPV?f0$jc%Mnu;2{~1t-42%F{|^G%c@I?H&)xsngUb0 z!2HUn88S_DoGIgf`vXmQ6N8iR3Qfvka#83?3vKXi3vHfdZ9p^UZ}B7Zq#m24op=h` zWe{g;T`esO!cK+Lsh#hx!{HVUQ^B=H*7fjgR>LBc5LQn7=~#^){|7f1k$@B zny@k-=bVXV>J}MeJ22eAew*yDJ`cv~uGo&aleDd3&s>-5%Vj>6ar>n8-#~=UJ9%Px z&;6hnJ}~VVj*WHg{5bg3u4(<)2?lJt9dpy z{6P`8UE*sR-eh1*=|2Q$@t>k7P3f5xQ~EkU+X4pMl>Spp`_d>ar}TfJkc>Jt!M7OS z2d7PD9y@`Gqd<(VD1ICfeJz^Q_W&>y^uq0Mllr4>QqP!FnE0;fP{i$m8hm-g8~gIW z37Fl%i2-caBPRy&8*u`g?FT&J`^kxc*mnGW*ra7Ix3?mhpPcAh&WXpxiC-%@PW0)i z$sTf|H=0!>Kb>y+bfOU#^3woyp$uxc6b3_?#b949n89hMj*qM4qbfP<+oLS`Bz~ik zPr?Z3OFqt$Ph|H_Mu2C1HhfAYKW4O(H65z~cDs!q>udfQ%p9z>N08V=qGrTLkO;6x zkSbKAi)ABR{OAu`oolPFerj1;^}PO^WYLMmKOoT8E5>&r_mG}59&n8Ba*St8Dm*_l z#=jQ*R$Pc~?VC{klgi%-ciQD2b@>^S3WuJs{Hu|_uL=`4oO@N46L8lfOas!q%fgsc z*x|D9DlT;cxCo`C0hffh1u0w-(o*~$wx=%aX(@gizv+T(p$#v{ib%LW40zD5{d3}} zhar zbjkfF-W=aNy(?zvjSBg58My;n+4;GR+`Z(IjNF5cKVA5BM((G+Eq=P=2E*2Ep(g6((#FUjvaj2u_JRmN|w%W$U${a z`gO%l|6vR&ox0DBtBTtmXejS@;Bs>+yccI^wDVItj(LNh`)W7#AL|Z`ZjLcn&*AbS zFQ7%Ai3>JXd@;yS-sn+Uv3TDw)>C_QlN;4M|8yZWtDJ45=Siq)QjpJA_R_--*adFu z!!H@P$~UqAT`#brQ003UHei(STUbxwm==($V?L!_+x_HCA1U82^4dj$5f`XDSe{gP z{ij?*K+XY=2qVHEQ4A2ppim5eX~l1g$I=ejB?}=^43~L)6?u%7IV>IzQ*K=EIgEOG zYL7NIjq2vU5zpgM@EGf)hZDHji;XH;1k9oLyv!o*k#Fcm?#tQZ~O( zZ2r=eqs};MF;Qmoq^<*-g6r5k;n)n2ZU&2xwe0u{gjMF<&lvKE{ z+i`kYyPgR==f+~Up?TYX@t%ziJBPrX&b&qnTh!-QzCL)_JsXqi$9T`itn0_dTt9|= z(XV(+q;Q2h)LDzi+gb){g6E)5I`+Hw8tr+NuTKgn)l^a1I?7sgngF^P3X~F@^omXA%Z}Y z_~6HY=CfD+3(!mp%}n3rLNnvh{KLf4&}J5j0nr?K8PI%h@Q1HNSZL<@o+mVO9!*Px zrf&mcFwGfCc3%yjU8ZKc54M{e|5Xbl_6v;s1bswNi+uyv84AHDsC9<`R$Nzcv{5f_3 z)FtO{XM&0n-(6=9I@eacirM9@T(#|f9GJECWr*Vi0QiI z%=9be?($o|m*%gip`j{$fjnhq{#b4t(O#Ri)R%O_W{>x1#i#s92S&@CbIS zWUa{sJc<44+ISKI*%-SkX|-TI-+foW^SQU14)mm}q=HqfqrK z4s*2{4XZdBejkN4hJMQ)uHg-PIAeno8P`|R%u(MFJ{%>P8%m&CdOtmC zv+2?c1O&!3GVHpB9`>5dKQD9|Y@ImV?!JfdLWLrMb#$l-^1xZq6o)la7&xe~%~3kO z^N@txs;X^5%zy;b9K^VJNaG{up6R2><@e#nwT|_4LtVvzqUWy=Du6* zMC~KK(;(b>4}+thn|T%;2(J-k2eL8z#PvTXvlFGOeFuUuF5CqIG&jw=`{okiZLZ-j z=}uVgGSM{BJlB=vX~clJ(7~vx%lnuQ;Hr*ik_TcyPvbEx>1^r^!~YQs2u3SzjRZCS z>m$q43PweEgKNFdEEqqt_h>j;oNLT^dcpW3+;8*q3C7C|gAiyI}aeehPf22=@4X_MOpGmhO>8gd~bg4L$oUugql45ce8VVE5 zo=Imc(JT{5MHx!+;cQ@Ig-JvLd_FFGx#ce%Vgi)}LcRko zpTf*XKsGN|I2`e{u7`a5jfl^H5nrWr(J|uF5b|su7E^W|ns`>k?-%ju#)w}A`lCrk z{05d-YiAOE`Ra5*1BrhWv35G&h|e&IUx{Bktl?ijH>DdxL>VwD(Fa}J&VWQBnmpdzbX*3dR!Jt#Wgmw@sWq#EA233TCbcTi z7P!7Z?XHwunrf$t&y^`}ht$OkC*8#i80Wa^M2jFm?eOAW`@gW~E-&qyd>?J%RkvN1 z3Saxr>gB?J!&5d`?4seBZ&7lmMk>7ElNj&^Yb_Yvyr3JQSva5!K8OlrVSS{%PshMu z~<&ogH1?lO~Uq^_{PA!9YA(lMNV5$ zQaNoC!EW{2e#$is3&IkLC!}JvdI#3F5LI(Xe?W9a^PCImTF@sHCF#B*F+JxsYHumi!dOd_i4(5mxtsqcQA8GCFc!ll!K&Hj(xeHo{Z6fP0QoVgKz;<`~pUnlx38)x)5UzHO%GMEF|w zIj79ZAj#V{P+sV0K+m^$KJgD_uJ(qnv8Ts84W_+k4(e#s*5}BO88T!}44J_YoK0Ls zBfvbyP--`vF5{l8(0Y=#%Gw>PYdWZFwA$0ZcTM-jM%7-{#UA5vqvHf1cI9N$u?vI_ zTD!*3u`3LDuzNpUKHJ|!*Te^Xi$KUX4j=~vg_(~4yD!wXnz@dB6kv8){Pj|$fOS~} zv&+&i(6~{RTdA&3BECQ%;s#~{@f9W!3CL=r9ERHU2#|FAjY!9U zk&Zr+PQPW+Z3eixKv$$=SMNzjAV^10R{Qj9XO85yN97)Y>&tyLlKJ{@WV4pfFDm2* zV$(|HI(=AvTfecS8kh6i$~ac;PhW=hzptt93g3uFlH9g7H$b02$x`8^f9X0)2IHza zdrEYf+QEwv?_i{}W0W35THC+o2WnOmJ>{KeqMq{f4wNpe#b-6hS`*qO3Yh;Um7cCO zg)2&%qcIQ#pZ=;)72g>pLzgP`oBUN~@^`nQi5K0gEkU{a#r6T_FQiY&zmut413nP* zAEsZLWF$`l;d=)W#qTN1?-5`cv%ktqn2_|SVi+v{} zKUo}a<>am1W#Yy5I3P}eYK0f$Y&(C#&%VVePz+L?)hS&G4G}_U_7Vg&X&6DNN$kI& zCZz_;VsZ=x3yby$QTQ4BVr4$3Lj+JJT@iQ+);;YI*OabIg=dC@snpE-I+3-DLvFW* zT^2fDs}$_NL2T)NL8 z0NporR>A8&gr{;kT!D=&M_hAG3k5XyNcTC(7R_&)?o$!I&V4Sf`*1OTk?wQv0}-nl zTf*yJq2}y$Q0RE3$&Nt1w6+6fbcBo;BqK(|2q=7mTGQ4EV<^4l6UI2k7(Hclj%&<@ zvE#{F0XAl#_{r#Pqq6*84f+3y$v+PzLoHPo!&mRj6T(6ml`mxZCRx5v<(s6|3Gl)%fz%@|K4$zt(?wO6#OrGwS2=(O$gaLCJ?|hxH?F^7?$b>GRk< zdly73XV*YsfkCLWrHbNvxaV^ch zlnOU@RIn@FvC4{qb(^;2=UZ3FwshBYD;8yQIxh!B2it~BaQvCW1gqiA01SYHIy)#u zhhg@ObIhj~qA}JI37eh-LsuHQ1v zk0Jpc^nxpzH_(GWb}j^h<^*}X^gk<_9~aH(#%Nv!;sUD}&5r@=kcN4qc^ct5sS2by zLzuWDz0sUuzIFC(KyX}*SKs013I2HEw<-(Wi1-45Y%Rg2CEiQ_}8yYE@Mlz?tjXMuq1q(i1KkrChv(XD)RqkIA( zU#H8bF!K>$uj+AqMwO3llusb!8*up)WB^xjvd>38M>Wi<1_Oc}?@Q<7U#;jLegY(OPdapsuCNkuitV#cG0y8?lj^GHS} zC`@7!;Hy!qd~~CH0wG@lK;~1J`3Mjb=vg>TG~x6+A||jnWgT-JlGq8zh`Ry-aV4UN zSYaY2z!ym79vOY2d;%d~mCL6v^AVr|(X()xXu|g_DG;TCB{QiI$siT_1q#QcjYL$S zE2-E(kCO@l>%HYl*<{6%RO}ZUW`W(aVG~k&_H2gVEKr;b=&U2Egk9m~sS*GL0M@1FowAO~RFOOfyLdnLlg}yI?r%*rUQzrz*v})A5=!&o&nrRc zgSp@+@|tnYPkMH!I&wjhZLB_i6(&Okpob7qmk`djTpF0lEDby@!afbxbEzJQ{a1Iw zZ`L&7VQ?vz{uuVJzju{&@mT1=$r0s6xrnda;&&lb!jU^c5vx=YLmBHx#!0fQ_JJPpD= z1J`qEKN9<|9)RDO&d6v6mvZU|4is3)qj=+#@}gYCSLW0~gvcpD5vx=Yrx@#vi-#h= zDW`z>M#EhC zg3~TtgR5yd$jdOA*5Ni4z6XJ)LDu1ho_Xkmc&X9NkSPH+2gV)>_U>6qa0G}Ljh2_=?h8~mtRPQX-7`SJ5QfK%bG zpGD+gZJUCvQksh&LLGeZ8b~~|j>yibfui9enK#YyTY|wwmlQfXFmuo%eH6bsYt-V6 zt;YzFao4|4%=TgHf5D6JQM_^pfS;?em&05ht{<NlU7xj^=KMQcF=4_OQH_9!sK}sEuEb-v$}^JTC;mw zjl-@=zb(wQ_!P{u9&>LN$0BJ^Y5?Y5V(up9USaOe?(K%?Wv%pRvv&+uz*OFY~VMDdjcx{q;OP#GHK^SvRPF$Nd)v za)A|j5cW!98;lyU&Sq*EUr+nOTsnvmkmlVHrj57A%Y6@bs11XADtzwWx=!7FEvu8t zFqEogR-p*)vq3fdGTsrG3jgU&*B~0-y_oeT9(*O&i$?+(7N;@sn2n{GgJ0r7U<$i4 z?B{%a>*WtS@nF!2M@D_IT3d3=eTmzyC&ff=L6{^H$H|pRaRqi>oEN$(IiA7RNgg_! zfSHy17xs=?6L#Y93SeGbT&q$TEABM>i_=(@CSz%);8&FhM3tByKR@74_Iu7ETb~jn7ce_M zHLUoXcFnUZ=^Gd30l;wG9NcMym5Csq8q%grFSJaEKh%kIoI_j0wV#o|XhTUDK41?i zrJL5niu^;A-;I?GzuTrht2Oy#y6MS8<8N5cZYSx@`h~|#@g+Zmo`PS}MPMp?SEKK4 z`7GFzIM!e^N*824sAk41G!jgKI%{m-Pr844CE05>(+3tB!2h-TMD@o za|RRD)jU&Cgn#)I^@X3Zc5|;4Al^TkBy{7$z5(>ePYCw}>-Ni6*_%nWl@q!FZ0P74 zxY+`~pt_EseBp2GBW{DRokRJtJqTnuYb}FXJ8@{O1P2O$f%`<>Z3z5s&G1p=h3Ou# z3ytd*8f$aOFcq%(6|K;qTy4n>skY?$6v5oZlAK9}M?wnfM);$$-x)8#xyt^t?iI@Z znt0AjxgRd?ilr|cM zFlB&iHX4R$BwdGJ7{D0oCfXg4#n5k==v_$AT%aqWchcjCP9TU*kjG2Eh`y1Y zU~^fD0YpRyX7Zup0S9=Jwy`sxBgNpyxVO@eDgXP88<#4mbC#yV>C z(;v`{s3j1nbqYXIOJP!rfNWm5B-Vp}Z@rp&5Z6_pib= zn$uSo5K5Xegy|<-qdCK6nvXHo(R@-V=|(gc2-F&9CeU1AQi}k*ajhKmmuWsF7~P2G z0s+eefW)FOu@K;~&@Y-3snJ~ML390}xmc}S0=If0-#K^`yt&x+q4wSE%602aEF3fxJGmO>I5at8NxynT%$R|Tn$L!7s~)Q*w2mj^G5!79?TeE~l=)rSgxS|E_5rnDGY``xS8pfo;o4edV zWs3q;7^Sh@3~t0Mf$+Hmfc%`o{2T$ksa7i=-6)?x$XDs|Da?EXU^^b%I{CFIKoa;4 zcD)kNjp{5AkktanLMTjR1o%R1P(Hd*K7o*Loy(^%^AP~v!L5^DivnbTFT^G$a6SGO zC8ir876^zp1IPj?OvD7hga;R+kNm=fq&uRJ(FivW3zTOvZ-?9pKQ|;PYo77(7>t61 z1Xsf~KaCMEnx%m4 zTfiPhsXGKvrvd@LmVpaPW5{Gdhc<^?rJ+=Tk{h z6#W8)vsxcU0^GO;S3Tb$dhkcJiokkki}>*srC&W?f?N)6g6m6v1W}%*4a^b{LeWqt zvWOj399?K^k>6Rwl+-L@7AG7l&%eJRiTsOCh^M*Wq`27vjJ`x2!cI5hra+))D}dyK z!lWkwFm@^j{bg>R5R7hwMIc}~4j{28Oe_TWub)&tx=}uXkgwh4Q<(V(5I5;rI88L+ zH*Si!$zq9{^cXi)QqWevWo~vM0rWMvrmxZCxJe+m*@+)tQToNrZqY8y;3SkEwNHkY zw%jho(2cd+G7wj;B9mvuF#JQo2wWDylO;qLyTjo|WDy8t83mB!RG4HTz&EOC<)a(r z6A1anTt0=Fj{yI@8RerJglHLqK~zbXJh_ufhpby0IB7$b zY&`5ll{4x@`-F!s*5@O?>qM2*I#G+`_s(I&w6ERhzqYvaTHqrJ*)osC_{0TqvKM=_iSqx(0qN2)md(kncT?>#&Cg3PzsX(^bjJ>5~2kvOM`VOO9Ri0ug`zDklMAHVM!U;?A@BC;_T(%Txy4=9#t?9;j*w+(rq( zDWBjwWXQWeZ1B&g3!3ZHwEVT~*kdAUJwN5_Ejv{cxu`K?$TEe=DFNsqL@XmjEVDG= zl%;`ZQrP#$Shfp^acoWS-SA^N?C~(Tlx2^JWu+62WiE-aOxaO1A}F&gg%DXLC}Nc= zVi{wx77G_jSmbvsQ&MA@#RLD7u2t#p@07)5UH_`rR5b8>3sxxeIT%ti+6) zKt)fNeef?%W6ancOOt|M%pee4V1E4E!k_Rld%~+tL1RX-3Lo}$Zb#X?|D?)HH>$rt zsDB55tiQsnKLN1q(nb9lg8nNQUF_VGpDt8)`tx#S!u9oE%lfmoYM#Ri4No@X=4u32 z)dX)-TwDk_^kDjmN_pDsgnuR4Y>TDY0l#QNAc(^J_;~|=!moVA2`Yn*Hq%w*Qeb%} z_$11nF3?TX1dpjd+>F#P-2mhX*T)KK!8;C$>*dQO!lrddhArEvU)_kpVhLYG-UL@GcLb)wH@-#6DsCCS&&RNr z1dH82W|CPX@x@4RKb;=Yii#l+iZO>|EQZ1?1_4VBxp*{{LPIx_c7cFq-l0*LXb6Cv zmhS)lLoQX|1ZJ7|m@jHA3h61aPQ@mK(ymY>?dugs*PS%c2@ogkN@~)+p^Rf?X+Iww z4fa2@J83VM$V)phNZMz?9$&OM_$BQGroy+~B5B{Tn!6yDccr0nnix;Rzc`JF@nkH` z6#Non0wKT5kDnj#Cw$L<6JrLQ7=J=rS?mLwSY9{QZ&B^(MvNB-jNc3(Bdjxm|Ek+_zDzbaowyLkD;W#NaOG?PGj{SiKQ8ZU-c&t6=#0@ zJj$Q&JvJG`ZQ2O>`r|5g8{hmQDSIl+)R4qW)-e2H8G)(r?{0Q1Q*Ts8(wu@{^&=1!V}AU6nLpu2zU27JpsOF}df}Bn zS_QuCKp7X~HyU>$wWo0x{40^;gwkvhX->i~auA5e`0!FRW-6@@pvQI{_Ko33e?vVs zii*ZbnQZVP^E}n0_!0XKl%5V2aGxQ>|)pD8s^ORw``z zp#a4(j6c!#r01%69zCw8(ntG_YcZ!CUmXfM;C3S%)*z>yT3Wg_rd6dKu`AIB6;9Vc z-v9x|DHxRBjxG6O98p%fQ85HUF%AL9VkpdF5PBLdg-3SCU zhY>|I3KIxQ7UOw44PJ@2=w~;MS7=I9YccV0$piUN9l1|6@m5G^N1ghmwstg zhgIX<2>PO?4>=;i#p=#4av^Dq?vZM=iq0nQ8 zn45E0$ND)%(#3>?gRnOv^#SB7GYCKQWw=pg1VUx{0c2$qW@QL~)(+P{ZbnQnMc8#O zI{ji|iS@=&M&(DC*h$tf{9JD&3}*5rG43$5yX}Q(DFW{N4>_)w&T1sp1H-M)LbXRCE7s95SF3?@lUU(+SQ)dJGu;RmwN>Mc-h1Va)ROa;@4+ zro~a4iSSY}kyv}7m+i&+5K^NppxYX(hMO+XjoQl=Nzc^)dHQUF-;TpX^brV^-hwF7 zM`6;3fUKTMLwg~Ta(me!G<2i(A`sAQ1(0YICK>|VU14@}4$o2(owXPGD82eEx0js& zHy7xtz0}j=+6#g8P`U8q@zSsMvO_hlM9|lGm;6SF-OQp(Bl$&zqV|$f99<|Hk>9l! zCAIcqam0F#_F^0y`heqLxkSFb5QEywW)wCTI3~fb_CjDPyv!EgT(?N3wu!;kM%vU; zT7z!27rKeYTfIGtwuL`LhID~$MdNj5^7Z@pXzs=QMW0?L|0e%w0-=7}Dw~rq;%E~- z`&^qoYFc?@X?+Kem&lxkV@P^Ix zSB~OvM{`rRj$cGi+;rFL1PQOn8A_gH#c{5rE_tHiGMyheib`vfPO^0&d9w6)yxuTU zBNkVJNxDn~Ho$)-sDXK96JGOI zh#agv6Z{9L20Z-1um%@zdOAGHOpwo&3uYJ!XZ})|Ex7nLBsWQWwT=rdpP^mLTi-b?Nl@4#dtny3A$I_}Z;DM#s}x!@GV0gvxEmh@$leG%jO$dX>N1Q#w= z@$Q=jtoR~ zo?#^>SP8p0XTqoAg^N*DXPHV@0L`kZlQ^5Q>ndDwiQW25bE?pkuh1MSG^GX)q2VBYMXTJ>@ zO^!&$m=iL_6!;nAPk6l3$ryvW3v?94*Nt0F#EwU{DiwZ)@V+PMAjPshx^uK(57>s3NSFaO>1#JB5_muwi1o$wrd?I z-!`DG$|LA>ZrA|2Di&Dvp%ZZI@#w-XEJ@1{4Oi5HHKzs{&z!2&PObQSuqWWuIhgTK zVKB(WIas#UZJc;$bR@}je%KI}*bZl6JItuFVAwdtFgb-*f;mp1lSMv&&1Iv36$0Bm zII)mpi`ceujFTK=DrTHprUD2@w1dGhjCRJ=G$xL5Exbe07;aNL6sJN_5$4GFhYz@B zV<9--5xZkiIl|UztWje!z{#1e3qQpULz=k@f3!45H@L&jteI0cxWE8pc7r~)KDG`6 zISOpQPxOk%X(vF#W#any>;iB>qYK>NNAB!hV4C3 zWdc0NxGoTkBzm0fW`OZ$XqZ95s|it{p(KDi*MZYB!7;(3v4QuMyhizygnYDah=!h- zj|pZtEf9=kVy{EP<6{c-YJLX<^oxwnRK5(!<-2&5LQTC{j1g18Oe}J{V!CZp`C1Cf za^ASz!&l%wgInH0#|fq(aZT||JzAo-;|&b006Se;TvWD3p)3Rjpv&@*-7k)+x1)FW z$SURcJ+g**xBY^Gs^q8)FJ4bBd3M<@-kiF);!1QBdpK!v#Yzadk>fcZao?P^(MA z9bIA6I9rG4$<}F1**cBBoR%85Pbt6BhNMmWszv44*7!|RrH$cvzMNA;0Sz&o(-$F` zy~y1f3aY%*@M&~qY51y2+f-?5_=D%gtHP1ss{-NIZH){FT-F|R63K2M35!7dLyO#_ zuX_1a7r*M&S6$F57H|oDT3ZZY$#;|mi@%|aFw20l^t*jLgP)dd`)OY3^L;tcFKi!s zl5B{Xw1^x#ZlVDPvF$xYy=5v{T)vA0oBGh9Q^^$NOiL6dUU6a-m@Li!EZLmUT5*;7 zGVDA}5VW}EOBp%)th#8!BJ)8d&D94T#uayf)R;2KusgSy%!w7~&rFa$<2G7SMYVYn zCepz*BHiX>I~8eW!S?mdIRx9E2Inr=-faM$6l~~N?8Z+DwtWZ!R<-5k$33#wz6tFBH6bK9dN z-8|4xP1|g(F>h`Q+&H+SkD*1LhE}d`2wJ$ff$31zk&Y`oB+zpkGtHxQ6ml{_W9CsR zQJX^{Yg&wX>MKa zWO=Bn(pzP~xD)1WvV_|&L2c~y+H4>9phx|BS;;?^KcdbJhM>WvEt;TZxwaX+Eb++;YmOq+!d>uglE5}airUp9zA+|o z4xj&a~H1ad$5EkTGA4@dM+4`=+XU?Augbn07n`jHfD?!nz(5a|Ox~fM9>o&^hBiXeWQo zJXYqt#ldz%S3cRIcur7breWRnW&!ZS8dQ%o<_GW4tC$tO-YyZgTqmh(l^kG`(9E{aecVYjHx(j;lfuGh18a1$+GPwc0DmK#@;|8fj zwmq}<_5^*#4f+a$UUGxJ8tmQ1qYQ&Sx|z!~yJ4N5W~KTwD>$G*+^<1Aph4WPL5%c# z4jEp_=8^&EHz+_Dg@gK%c4pe@$sTphkJwoDc4#S1tJZlCgCLx9JP(f^2_Qs*W7Q{O zP-<#u*mXLi9j7D1r2RUrK1_T`0Yl2k&tMG^TMGWii@i4?N;xa4lFp`IR@i zF=Y+iY_sL0s=QeUoQn_BpW7)zGmnxtc#!d7`ssL1)Mut)`fmnc^q7d18aZ#X(KB)k zQ1W9qdNj&F_g{YyYv}37eYF)CaWLrs--+j(1?R#T&ex3b z@MW*s%JFV{WX;W`?oOzcHag$hi)X_+2Rj|d*$#Hg1HlV5QZmTqT2waXTDAZltt7H7CJeU6MTs!ESnh=dK@<0+ zfU;8H!L`-|t&vvMO07z#jkQupP^WFI37VyZH<}XONFm+Gw~lD-<=fgtv^Gz)b`T9w zImp>2ifsTb>|8ltXos&=Clx;cq&nx|b-@ciw_F&Y2C~XPVozw1VT@$p zE(B7AxMeALuHIpBlUimqu8}_G5r5SBn3WdO$7K0XCBt%`NG03B*)zZLm+!x4j(qvjI9k*3HuW&;r6{8Ym^rx;xH zi8+eF&)piM=ya%`m<#ny@tm`u9$utUBGg}vyjkSFYWEz;{lItUfODx88TAqMpZ0jp zS#Ul*hVwOJm{o=tw82+|p5uhsOi>Z%;xkTHujA)nz7~$KL%DUI+A1=^PZS1Wd>wL5 zNtmc+ECQkEnNXNeo;Qg8rbE#$kr8;u%0*g$K~lv#MC5{JY3#O z4y@vh#kA|1DLIEQsb^=!#3W}b(N4B-Gn*2IJ+jwWv;{*HDwQz_m$7_>Qdmp^pS2II zP`DgdPya3YlGlh@N&>Yg=}9d;lUhtj6Dq5aU;_4(MJ8bNO)~Ka!a?zlV%D0Od@dHj zz&!($gks3-Sd5-ojJTgduT8^HqY#`m3hy8@EkZlhDAbFvx(!z~%2wXEMqwfvg-I6D z?ShRFpQhy%7GvX34a)p%Zv{hp(Xkoh;Dj^PEkz(yIqv{M9^@UU<+r)L0|^P|KidfK z6UcB7Qc^nMoTB5NL!EGb1c46}&h^nDr}d_Q)DtB|LO7fn%eOU30g)y}t*sFXNJC9A z%4kr>D?r5&9AQPm#p98Hd!R|)1qOVl`A`h!v;DAdVwsGOa79uFlOwCek)hd<0ooM8 z$#aJ68OYHK#cuozc6%h8TNSz20e#5U93>TvgYCuGXzomaPLFsOx8w&(oup8goF$!d zmUO8)opP2SJ)fV@Sz`0$ZFUv`)79?g1m-~nIR1FG3aa&jnK~2%^Hmo(eASH^u5330 zJ}M&332b$Iiq&!SdOEhin)_1m5`B!d!2bDt76oC^zS8zgZyNS(GzNu41CqYMF+$lx zC}ZS(E^v9G#a^eKkFncKx zY5;}uY}5yq9^6UX=>LLlB8R6T9XU*T;mBdnk4`7~EWAwX-~7Pmaz4C#5O>cvV>#1_%gG6xh_NWz6#sGqFmf3rd3XmhqEja614h4vn|+*K zO{5_N7jD}o-*3@l$JK!!rE)F*WdYzPl0kDK{Mxv58{DfihXARe-bH2m8=_FiiJe~M z>&C>+&R42xpwLw5p727eXpD{(qGMGusEDQrez`M7jp=l`OAT(+5v3P3#&f3Aac?Fa zml=SVUJY+3Mqan|{*mL*d;ZmW@W%EG%IE6AzdcVMrBnX+c+PanXZ7IE8360Shauy^ z?7@GVc(gtEFRzIA;E#R7)gGJ!Tp64oM-N_NAIOomgP?5kLIMb%Rw(&(!mI#lv&M1DhGy+fr z$JGl##@&OEW4lGQyY7X$oxFU-_`Cy=k6hjvg0fp$oGlTw;MN=2_k6aA47rw7eb}jW_wpxpM z4hc}E0tm4^SdOWcW$;%o#WWDM5J9$t&5R|&AKk|>w%kvYxvA%=ug1FebZq_Fm%HH= z*FAm^&pFGW2n>MZ+>;=^`u$Ss0$5%l500OZZ}g!>RH`GDFWa$M+;qMim;UqCn#bC4 z=}aB2DvHL%iQUz=(44?3GF+o%EX<4&Woe)ncJu_D90nM$g+T|WgE0>4Y`An{I@pC} zbomNFGwX}$-^c#jO_jG#8bfzYF+S|3mCrC>Q=IiR9pC-@x|d(~>m?Qg;p<*;i!S39 zvKPAe)^UqL25WKY61U8evwN_JLx(vBWH!-WwDqi+6j-9l@*1N+Dv|6=)+W^Eo?w{p zF?I@rArfI2R+$lD7!fkpe?^kVo0XV|-3X{Yc7kTR`nfw(NG}spJC`ASYA3r>Qfw;` z!Vd>+cey>Lt3_2XbJl1|7z=kbW^17meXdA-+^Ixo0}U}5!o2GN;{`#r0WJNYVScRr^E0GYJRYF3j67{IW?w6)2F&2IR=m7Kx9q|#)s2KFA5*v`CUkaBC zXRx6N=hFe*lqZE6v z{sMIB@a`|M<FuW9C8>1G1$mI>`YH!rBMjkM07|P$t}ukdb5&(sJZE}Uvb3?j zH7X^|WI#u6LgSHQU1&TiK-8R?=sRha@1#k-lV4beb3d0?BfbeLO zwcN>%`XE(|{ln?e2V2jx^=>*n!2kQA1d0u=nC*5>k52T$GlQ;dr^hcfBwuL*SJq*N zp(l+Bqyy`gUbP3mQQ=(d>dP8p;aEw#CrW@4C0EaoE1de+nZe+6h4=YEivt$>W3&lX zd2lTlwiq4wjmn>c$7c+T)0Gcn8Rd^nSN=L*KEGT1)u4YtFh)!+5GBxI`sw=#8tM3v zQ|?TJeIAWlLub)c&^GewN5HEtXd8J2etqwOXP`{22s@=L;$!dm{2a!_gJ#qBZe(i)zqv~kCaPGIoF+g4oi+po+mKwKfZ7>Ur(x?{2TWik0<>AH*Q5Dbdy_$=N_5 zs*sQd$xx(1V&WdxM&pUlgBnI zc^YiY1CfVqT-rS4S}Ao9aMB(n)X*W^f~({DoSr!|XvyaK6B^#HUG2J4i&GU)sU|S` zsvT3{;bpscT~+cfyLrLlil3u_?BTSMLq=YN-czgWB z7Q`vdp^k8~B3~eM3z(n2zyX?r6vhLNn0+EO26QGrkO1@=>0DejF5Trd?YaP+i} zE>Vh#y)C5M<0#eOD8)C4aQ=%O{^%ockknDyy0y`ewsj-ir+n&yx)JVlzFpn5e0&~G z;6AM*?;~spPFMA4b@~cCLyz4wLHP4*ekKuq?sS8{gTvY;RpEV;vniaoiOTO_Qk%#z zR#}s>a6>3adBTtFV8Tr7396M7u_3*;eA`|PX?j33r1xS-Q(=L*r14C16ZV9s{ID+y z8rCqO?ZE(X_BvD`7zR*fLbd~DBle&jcs@6hG>`SY#h>bWYA>puiiZW$m|7Y`!2@APNgcWy6@AnZn<2K{cdZQ?q zGEy|hkzu5~=moABou;Chg7?I8qP8(DhSMi$GcJE#B>;|NH;7|%R+E&)Mpi)9?iNOO ztc<1QySt>DQ(cZ{<1r$kn*;|-<_q7ddN7Wy@7?QE^Qu#o?^;RVAIR@fPh)uugJ2?N z+}ZhRb||~eo05myzLF__Q6>-HOubQC+{So#D$#GgXkb#qheg|DWTEV5hC!@i`C7Xz zmM&YGCuSZ^oNupWXt`&$w(o@aJ4kQgC6Fkx+-@HF*4T-a0ro6kLpD?SH+A9m7h3nR&_0VH0j_8h@>6c=c&au*WsQ>B zhSkNOn81?UbbE5Z>1i$&WTrSJko82CFO&e`9SqC9=iCtOE4T4e^Y5S z3o9qUXs3qDcBz*^Bo>JgbFbZ=%3fSII!1gtekl_9CK3MI^VP&7XGtV7FGOM=%`PrpH z+f`@>u6tae?JN}XlW!8?TU?<#@>!_BoY=n>htT1%Y?nC9;)<7}?QDy-qt#1P+HjNxh&gS=q>fp)C0t9k6g>?n{dG zZLYru9lj_yfeu8xv{mO#zQ4HAYIZDP8!9*#CkFuqSFCpTmdBcjiDYFff5IPsT|3{~ zqg+$H=ymc~vqj(*{tt!wFuKSfGsuaqL^<#gU3Bb;BB-43ZQ=jy&{NDwYP{|+HpNQ*O7l=Mf=fQjv|Tt&Fw-yDWpWN*bwP3l9rT=Qq6%HT z7=E{QzyD1ejmVNx24pwptpQmue9!NX=5-ud!cn>0u88jQ|k_zWgNC- zDqa+CGcNONRo1?qKzkFy8CV$f(WBd6gRMm6(e0NCvfKXVk-H|)dTie z$LA-QHEET5y#*6G`Oi}WgdhC4b#yv@hXLKsL09?dTnHJ3g#@8?`5UW&WdJ&aB+-~m z^H2u)n4H?7oZ3i7<&lm>PK)4;Okm+-BK)fzMPakY=tEj#3Ik<=Y78|Gw<^*EV=912 zh7P=q_(PeKEO@U9o>akmRq&(=Mmh>cdcH4Z$a?C#uaEUN&PETh9WzXa$rU+z>KXBz zC^}|33<2>p)8ShN;K`o)=z8h}>ZvdBd?KT#zU2h#sr?^2Xg&2+CpdY-UU`svYR^aK z&{JQ1e2$))jOU!Crygzq)KkmHmWJ;|UQGsKD>sZ-%&dJ(Gi#VW&e!9+UZSLk5slnLt)YF*6ju)!aUn1J1Y-nKpP7-4Tkk`2}s@ zJpTna)39c26vPX5VPU=W;q8ru=1$Ou2hYe}XUBm3xIh{0iVBu6Mot=xXY0~$Q$PK< z=Mv+Z{a++*sNMcckB_h~5~CePT+!XnRa5N_2Jg9T_oahEAMT}Lx|jBtK!ST|c;v9=R@~ZF2Ru%41yX$J?emo-@5|vijS(24F7z?Gx&6KR?cun9<)JI@+br)Zb2u zV>Vq-t+Cx3HYt(pMyrMU$7{+ zwBVa%qB)d#2LWXnAxF){FKxSg7quHXlzx*gwcdwliHAe zO;~&G)rbb_6^N>CiV`?I2`5z0;Cys-l798sdPS2u=1Yvr&|AeAKl(v~T9ba4x%StR z{M3Y5n_^X3adjoMsD#$+5_s|^;=cS~gO%4@Q`~GODCqlwsiY_;?mY- znvR?O_L+_^#<|(?@to+V?i~&4EN=EW1K_yXRy0;p2iw_%pba#TLfmX2(F42UZ^X^` zVBCy%w_U&Eh-zw<+!5Fzh0g~&@(d*lVQJD&1pcN6X|sbl+a zVh?L!+|3S1vnvR~H>BG#eu0*>1l}-(4icr%N8-Lg{gsJRP<^UFDtIH45cK)k$&WEY zC^0E_U~;cMFfhweU}}oePF^e26ekI>f(UAnC2Z`{UbWtSoG{CA(_F?ZLV=8tP?;!8Hd75r;^g< zGtb3q&c3bX$2<7mOK`ri8Bl-z08@;$n8*cp(QwaZFx_G>KXSw{o)FE-f(WYtNxW=v z`P`bNCL$*y|OdxwTTB^rE_jm8gz#>+h#{K!pi?nnp}#}~TE zsZ&W7HkBk9r$p}X``cjoN*R#xo1fHip$K|^r;BZG5_*>lj;?OLfSnZc1(#R=27IDB z*m-Gn?BoD|;qm7JF+3W~JE?7iH7JWVbEP%oCZzR9C*mkI)v8d>+m?^uShiF|{Et<^ zw=7ZikrL$dBboP>lhcXj@Pxd=yd2+Hhgib(@Wo}m!LP=P(Pwb+dvQfP&Ce!o6-a*N zsIM|eeZI-2{!fJ54~}$o<40~v*mh3QAk~4qrI)!LK((ZnDuCLastr_?I$WJZtCd8n z%P#AuD(m&GEQVTD>6kLtz>sK!7$+q)5E6RiM|k0jr)8Wf9&Ybu>0`~V_(m1qlwJIQ ziog3AR#gOBbIpE(ogQi$2#fCtT2P>8uuxKbtSvku?bIf86j-}7kT$P*wG;-ei)$B1 zsBykjDiQ2cC?}oLS{{Sw=|NTJFkhW6A8y5toY7!VP2f%S4F>fF>Izh(S!1N{QV}gr zcN80>e+82dUV`}s3s`-sAT1*gtDV|J0>otx+exQfMKtUM`M#fRY)>j)86VU@_h(h zWsd6l{VL*WUxZiJMVA+->Tvh=(cSAT8n}D=Mjk{*n!2EGg$n-~|T7R3BbV(m}K;2~eoS5Q?4&g$W)C@2k&&QcIv_5ePi; z>lfcU|HgWJP`-;-Sp-xk*l%eOFcC_cGz^Cw?`093!kd_?moYSMX=h_893?eC^k|8G z%OL|peI^y_ZRT5{R3R$D8}ZiEO;d#VJbHKewt~FUOF<`hx~j!$In{+=p}IWJVz#Kd zoQ@Q!E~{_@)#Z#uYQ&M};i%VWUEWtwajbtkOs_^;S;XS%Pa!e3Y99wV!|Sn2vusNa$yX?y&6D; z4#68DMs{XUusC@MzD&xF@{8E551G2dYt$2!gbHmzBKwe@*@u`=3uI3wg zJ))kdBtR)~Q1nbFOz=>6ub#LWH`Wt*N841tQBMq}4Yt>JF4%q3NkZea*rO(m}}E|p4z zE6wAyrzZ#vkAk(F{dH%zjxmj8^6b_zO~;M*1QYhV;pQ>d`BloIHM>L7rL1`^tPP-pgFgIgPzjiIx)$K9fA&Yyg}*u97^af^X4>o_~R8 zXlh;~E~q5%FA8sRK|PayF`;G$iRr@7BQAJ~(s+%ypppP(1riBG&xFDR4~6&Qf&^+@ zP~gD@^&53(xmC({k-U<}6j$nFkjG3cazfW($JgrPi+Cd+o_X>z<#7cFQd7xmtf!|E z{ay(MhTWt`ih??_?h3_pDUa9St!=en@|e#IU_T1K5uwiIM^1Dkl!4cX^hyHJ)*_Ka z(=&<21k;SXmqd{8=|;WblaU@?ASLbCfTXxKLoX21Omm38@s8hh0<|7j=KxR{bO7*8 zwpIKzupsPzWTVDMh)Zch4bgZQa+-Np(M2S7QA|5X(p2*@lxQObX)sDGciVg zfHac=5&5inqJOe-fCWA}&4dU2g8BznF&P$~QcP-b>l&Z&(^iA&6%(uQx;!T!4uoQ2 zARn|&UE>sv2I3S`OiYvsI|fw_?4OF$FKG~|I1xrzxJM7O zE2Xj-_o5OLJ$cMGln9@ByrWVBUZ$%y9A0Uv4H;ETwc)^nYV)T56Z<5)D(wv)dYg5f zTiEeps*Ux6zdWpOsoIbadhtoX)s=O~;Rdn`yJt!?A^0kTJhN)^zYnT_NPUrN^YnPm zg6JI~WlacPZvdWjH9V1B4Sjz%iGF-sqVJSMfA>Sy1LLlSBQMV_(b+{4Vbvep2(cc! z35m|BknZ}3Npz}>(lAyL!bRa4!zU%tfALn6=-0$0`f(CA{WhFp5?uoQbrR?{Q2uEJ z`ZAE~v2`^p7mYXDAoq4U0%Ho!cQU#$vVNyK>7luNTeGa+CaUVRM4MrWGTMfY2+rLv zWHsV`fvjC~D4}Mwf?GUpsoe%?1rL>P8&cU?dcm@XPh865EL;Cc-fMKsL(6}}&5snwdEvIch%q`6JMBXa6s9lgQcVgpwN01(* zTL7zk9yso>)3(~Xi06;c&rTMa~(*ha|$QvG@Wv`3`(9!7c)1* zm)}H;?EH{H;|MtHb zC)^h|!>w-=;)C*Cyvof$tyByIZU!b6S%ip(E2WjpWHa8uIKvfN@Z*}PZPsGlD&k*o zjky_8iEs@otAT05eUByu#3^)FsJTkI8QS$Fzc)7npLtwB0>9PLs*UCt6f|m-!oVJK zGtV~lV17e-L**mmdrsFJxbIQ$k=3OO z&xLZtvMzjr^Bh;J3!hVU>E>JcN_<_I!n*J`stX@7>Z0%FQkQzwh1XbJQi;`-WyHae zq?e`2im|%%;ki)0KGua#HTvG_!e_dFuEp>C+bgf*Px$IfsKoT+-Upp5#eE_?;zvlK z?~;$zG5~Ar>RN}?gqr_)mx`GZVkY&4Z3OjY+XE3-*~tRJXQ3=I7UyjmLYlu1d9Tnh z8%M{Eo*Yf~oGRh_$3F?$$on8A?Mn{TVdUc=Q+^IICOB(R&R7eHuReqSX;iCuC{0W(bbk8*|`+1z4x-c^Cd)3HF$6yP_`D*1oQ@Cd8KvgHXS3lWdxph?hoD4McH~uY1Ye}ClIIZ2^iVFxrwI8K z4(GCT?V`esMdw@SV8n&_)+DRG1EKYslC10SLHRCTC0W<<2LCvr&cq_;uNi8^aN#=sjN`bz9q|Rk|oGfqmaYx;`dbxpEf1%Q&=(Z3sf+wgt_!FqLJdU$=CfP zP}e3MlE@U^I98?#(yq9Q^hVG^P-S9Hv$>e2ji&mhI}4CG?I6H~LSQ}6^oqg;-K$VH zg}@ZD$Bq2;inoOi=<4@qxeV`33AazBhr1(y1Op>A$JFPG)zLmR>PBe_BNJs7O=h6qcUg*4y&YZ&S0GHAxqsuW-}r7%x{N ze_VjB`Mprncwt%LFD`bPIeT5%E=uqP*k&24%~GKeR;$}=sEyVpD_4=y3~aP%<|de% zCPdJknn2c|fvX~$*m}{qKVH8Lnrr;Farm0sfCP>Fx>;Yt00!7b^@Qop7lOm2Ri-ER zIFQ-fTEqx+ZV0N9MhW_snQ8V0lk<2NtLs3~VjSp%N z$m+Y}0PfKk+^dDjXxBmhgg-7j(pwdyYB+A}ZZ-6i!joLCr9@zLcGgIeNG31RX&OQTo{tG`|l|0>AE8N9Z+{ z(93q~C9K(I|B=&X|4$))&YdeF;#3%ibjX!00LTq&9Xz@jw2AbX4Sl>b`+J<<<{t59 zsw3QD!z#Qu!HzJIt0Q!%B@;rZ6Zg4VyG`F%Yq#TGoPdc5OeNS)7k|Q6T<=<&k6O(= z>06ssMr&iI7p&Z)eQvEi?pwPK@6p;X`faMUC&Hh;My(z5l3Ts*_?f=LqQ$Gip(fZ6up4Z4SR?_~DhciBi;ByKZg0=`z_n{prd`<>!Vu39cON8}4aiL2ApXb*} zMIa=?ypI`McMVf-8ZNu1)J6?%>a{+D?dyUaysmYHNm5V~!50+PIFsNPZrt-xtZE$f zA(szoG3fn)1oag8rFGEP*Zn#*%*Vp;RmRjGLOVyc@GHc@erw}s^ef@V@DX^JC%{S- z-14n70xVbJCww9Zpp>MHC}6uv@28TP1Xzl65rEc?2*4DdA*nEvMEK@PSIgCSna15z z%avkn5cg3n-*!)`mJ{K8t7VLttyLBCTov2=P(h0nc!ZYl#sVmPl)5`pY-R>Fx;qC0 zJL&wnGq5iifV2oE_6iGu3FiTnDWxfPL$Y8`|96W@e$6m@gv|!oV1bgWB;=;DOAA-e z=>AHO3V1o*gzm_l8U@psY78b<^-2~@?J`xcHEZn_SMce0=fXx6vtis01>*yGJ=u3z zu%1~k6I3wahOb8vbl$jv`I0P9!^h054M+kbw2&SEFhMO=UcPH9UdqfOza{IUnZ?8+ zABC#yvQf;;!n^pskeQs4%ChNgF;1CEbURqelAFd%!c+&=DXm92#yHDHf9u&;EqYzV z#%jsNs>sG_#gD4Ww^ikF!_45ivTfJRD_!Ne7*tx@T$fy|p1JCnt6sTe5-t8Lb8Qc< zs|v0y+jeb?ab~OKl5M7z>yS?6y`gN|4Y3kiphQP_D#*2&C7MLkjFa%ZVS8|cD{*l} z2N~z<&LiJw^@9kCcD@!wU^TQGXKwdM4mHhffDvP6qeFFpu<4@6>tx{PTu#uWi$i)Y z>{`klmcld`OMIg+9GkX~(CSqw{g5>*Mf(EwYj>wmn!lqBVV<8><6zSO31DuUO z6ILtyECuq3@U%}ljeT9LOR?F_Tj&-L%XKFh!v;f{9j^>Oa-D_|-gD*Ua>8}|Gkm_^ z*O$!KGzp+DWu66s(?hgErKs7#GRX#aCYb-CaN}JmPS_ew2FCC2K>I}ee!ZCCUxxJI zXmj{ke1ti>q^+Li#xQ6%3SCmPOB8JrMd@&cxD_EGK;3p{6t1A?9=2O3itZ6bLs4{( zD2jAY6zTa%Eir|BMF)5C3#GKElm?a3s#3;O$^_@{D6c2U@=<`c6`WKl6Dnm=rA(+4 zq@xt1Te}e`D9Re(r#?M6e+z8KW2_j~co zM=c?vF%xgM(`4ynw_Ed_sdgI(i_TTM#U$8k)o5q`${OtpJ`Rzs?gJaEP^PZ{O}eDp z&Ctc;e)8opnKa${m}3o%NaY5vPJ|odInfA_{XiD!yxa-XhbO|2kXx(g$fqsmvn=$lsn?s4o z>{Q|$t()*OIDJgg#Ed9thSVLTs#1Gu`V4l7+WyQ>wrcU>3`JSa4Ht`Khx4$sl1oAho3bxYl@*Q zwt{C|BA}fqpk;~h3Jn0f-I$t2FqJF{Y3j{M5oa0XSU? z`@eUHDyncw3+sQ#Xcg0Q-W11aIz8uieK~6L+<4AeYIBPLaBAby@Gy_?ELzxYc2LmF zv|gJFyX)dPXTk0%Y1nNF{~z)~U?+LbHAXDVC746n^s_g~2)@3UafEpTh^#S&Euxe; zZwHNfqgi?r$)F#q*Ci$>xwpVLQX~Q=$eP=d+@_;FW+qLjyuDP-QQjn#3GDW~khf|* zDHB<{Kojy1`rwrX;XCcPpcF}E@IlvSPep&x5to1cQH};bJ)Se2q(eX!@r;XVc;xd% zn0{zC0ItC|g-0Xr!6fPDFFS}NJ;n}~nwg}Z`(X}}-uvQd)qyOMzS#gcl5P!qkoPeq zsd=_w38GCUGJ>{5_{u}HcQKN%sVcg!>%#xH!OYQ zRAaBt)rDW!n}go(j^~`E3;(G{03v$74tWngz4soPlis&qdJySd_@X(``+K+Np!d9Z z&ROVvjR6q7uNhlSTi8N2u>X^rf3EYpPSRUiM+PY$Yn^x^_EN%!RjK*sdhc6hoVa|e zwJG0ft-eNJ3A#^(si76*s1=0e)KK|Qd17~iyw8Y%Z!A*41IlTT$C+;KxQ9GbAEo!G z#zG~#7T*>wylogx@>HVpW6KK8CMvFDT3bd$;2RGYKy{TX`q?^VQ~Jv#Te>AY%Ys=ZGEfz9UCd6ob*wR0;< zgz~%e`x>dT%DTgLltoSTmLbq9e2+@r<0l8H{wBhj8>BX-_aSx%TUF3`)Oy`NqSrwa!lkI|Bf{1yMCbR zkMyvAFa*RLxE#tP+)vaoF`;ay_K9#ZI4%l*eOrofd%~+uGs4;EwK*`Gi_$6$$GqG| z81z_0?t@V~2Pma4>}A)_P{H0~g+(p`SrA`~=fs$C)&=ustuK6m0f^PV)9T-C_0L0v zpJcW*PcqwoU1qz4%=W`4&CG0n{owvE+b{1*@r>^9Jd~AUwuh+X3})Ngu>Z`q<>G%l zv*i{NiEwk*zB1eQbfyTmCp_ZBePy;ETB)2fGuuO~u!y0G*`6EEISaGx{*JJXG233N z|E*U47_+4^sRJo`!-XgTItAUTr_y^Ev?Rh8ueJ7v-&J!4k*^jmEVv%1!E(|Ow-Vq3 z;a~pUNaLa}!>{5Qrcw%MQz9Hb&jD?=d4R}Qt9UB~YuR+KKOp6%7|@x6G{f?3p;Wa! zsF$L3!y-CNh|V6WYMAnue>hV=qrkO5=9qq#O4Mu(vgSPdqucaMoc$4YJ&)D(;Y{>) zKe9oUb-`Q#T-9Sf1x9Nbj8=CN*HfV*VKm}HxEYb$fK3XDl~*?FBqybvE3q@>N}QxC zk-FJbX&1DqAN^0NpH75t12*#eS*5#8<7RU!&fa?|-JI=j>`#QNsX)HnOB)2CdC*Nj!jy!Yc<}QGKYy!@d|M?W*6RoV^z#UJ>`V>*f$%?% zcY}XU^9c7nXAXjCvlWm&_`e*_Im_Tb*#N`_|F1Ooe~y?gFsjtx=R86Q0H@C*eEnik zMcl3+isr~Mk8o5RCwZbNq%v%po7z=qdTn+ukI`Y4+FWV?oKJ3L_{v@q z=a>D=*K?5cuH#}k(@C1;2YO4ctGoAg&h>gQW^1~RjS*%#lAiaq z93;Iqo^uwG9%=v_Nw_`WaQ#7~_plxBGc{@*$1{rPy# zS?K*d10Z@|Gqyof3km1|&j0Ra7s}v7Hf!r}+|eny72k})f+?dc(~~&`Eet(1(}4Ma z3NxvYvw}J49c4~UC+NxNl;0Gy4ssRB{jEEA!0i_$x#@@6@@=)Utg5_aRa?ZxwL3}x zoHHHtgKtzdE@O&C-)BU`w8;z3Ys|_@CHnQS0u$8r1obQn(iyjCa8I24$m zu_tIURGSKeMxxqe#-yRzL{v=`ZB9qEnW#2LGZ4)-1JTSGh-NmkBmT6DPyx;@LREFP z@H*_aWtI~-vsxXh7O$~tr4l*G?=Vd*(TdGO^p|hzS1;&hbvYH%k6zHtK&T+KWm6xH z03#8)Fe7905M9__pYsrFA~f;J&I@woX*XLw1+36EE><+ ztT_Drvsm(gcjTwXt!Gach*87uuy1keKH%DVC(*P6jGP%GFTQ9%M}ER^!cRUv#CoPz z8pqUn0NFlFPX#)1hmWLfh-tfy?DyOTAwpopwECm40bL?|xK;EVc^}@JpGd*!9Nnq8 z4aP!gsk>T&tOIV01z$|H#6b92e;QGoy&&EXROwS?jC*n>Gim2$`9)QWEoX|M=bGF2 zWJ?Z){);6sRR^PSrn!w`0}!kKQmg-$t^P50+mqb>NpAlnx5vOe1;cj+Zm+qJ_u{Cd znYjJWhxdouf3`WrW7@+)cdU|e`v-C4&=Z5(_dX7|{R!fBi@#vp?$LAmXWpD@3B?~f0AciAc7-WbGA>xl$tK+Pb7oEM7ZI3lKd2;oW2=E>M-_keGRl6E+-m> zGJx75>T>e%SaoT~k5SjmaF2cXzj6@jyYZaqVv###rbS(zZ2+8IxiV}JS23_{Kg2wNluQM*#}w$IG0~H}bbXsJ!T!jH}7V1h_sOzL}Nh6gqWLBlc zS(%+$U=K7nH{)Y2#l9N9>{?1N%ZFzxW?Hs1TT+%SpEzB%lQ&a42`jw+wdxkAw@fx# zP1MMEI%B4>OM5hB?3#5-3r0IZ+2PZrFpR6>CUupNq=Bu1c{8<>S;LDm3P%4E24*XZ z9H_T`QG_$srrSMghmp@VklFz7{;UZqwwab%NUd2KddyNwCHljt1SY6=VS%u23xj&v zUJYh}n*rKD15_=@UHpx5ZLq+s;Si9RwPT2HEQGjmW7&!>206BaW{CX5q_4u`f@V^y zv>B@y!dDji2C_Z>t&C`S4}%_Ib74tPYI%=~8`QFFo)lEk#jiT~l@LQ3h@=uR<>wI@?g=!*j#>4>V3_;2z}6iyTYnD` z8HyQo4w2J5B19nk#??jpX;uQ+ss}!w1!oiDqWP+-X@8#@+_dtnaOkU z0%Fc2nygJW5v|QybOk2E+RUWTj?aifvirmE1wafEDE#Z8L~uMELDNG{0ZfnJD%@uy z$S*YCqcF-uxCa;u!PD^qNt!a`5s~mz7`)QR`q;j@RirQ(^9?a4l5WZ~rv4WE9x##AbjGwIX}!4b*`G4*`{+f|xt~x@VLu)Y zPw6Ra#xLx@bg42|k@Ql(-QB*3r1_RPTO|FcEJGxnZn)+WNyQ?{iJvs0WQe5lv87@6 zBdVYDRmAYYn4SLu$x)@i;zi2Y4=N=k1HX?<5Va`KS)SPP0s1aCFag2zaoP(A&PCxB ze>S+|^RnL!O-}y~(I}Mb<+<{GIQ`u3?=NdT3qQy*_L7W(pOmq=W$Z=g`38FI zWb9905i8?K89PTA+m#e!`NzxHGdv=av7ddAOft+R1ZdQG)1nCX*;ZAi+4oVbTHANC z@1|N&$jR8305KX)k4zH517!C7;WUR}w%NB`;^gj+snmTi`-W>$*pG)-18ZVmB<%N5 z#=Zb19)P5`&0NjC35!_Gma)(J_Y4`^Z^sAalCd=+$`3wjM9Gk`j}MV_**TsY9b}Qz z`?BCMbfQBo=%UQNLmvw<4KV;N0D^ubsE?Ic#+h6twTg2DgQ4AP$Zpy(*B5~ z!wfMelD=T)fQ9eC?*S7@Up#SIk@QJ%-}9=C`#yTJ?}AF@bY|bkpY#-d1;6`j_N|3| zxX&W#Fw2}Rl798P43Tt};hIY%eM&@mVU-ajLnP7cy8~we`Dslv`wp`ccxN*E`s^T~ zl-aj5tc<}iWAXdPtMbGjwj&L{znO8DG9N3_;XFP>q4b|UiM;$=K3BIhU~pH?P5^N$yi*L>I^A`v-)GlmYB)i(H?{SlGjhlH3DkrhCU zcF$TNcz~?7GdzOXR@>Jl4OVt!BI&g_KL(k`thQq8U=3A5Dbq~WJu52E&ATlPe~M#%y!B_f z4v*kWYqk9ZnNU>9`m;$t&F%fi40C&5nPF~^F*Za$*W6xWhIa*frq6fX{nNjDWPJK} zC;cho-G(F=h#@e*0x^fNE-DHt)TS?Khiox|V2JA(2ctE7gSIeEd)8~i85e0e?S3x+ zVf(%GE6Cc)9TOVk2m{l`wBx{G_4i7i6>Z73;7~4GdWGXN2o^(_DffeOg-!6h51tM( z;ZE#B=r#_fSWt{4#Np;VqtihC#l{%o^BgvLjNqN**_=2Tk+kVba%UR16U&BS^^a7P zZ?0uazkaViN)Kc|E}j$EGYnHm=Gc<$CIjHQa@0hFJ$dLZ2tvzfD+Xsy*H+xO^58Vl zA~n&??{jrO5KUwt6CUK;nrP=eb7-P9@5#|bSH*MA(nJrvTL3bfD5GT+xjfzmTUDS<8GLy=bBpeqaILA-6*>5ZIrYq( zN=PjHul%!*pt=NH2qF=_KQ9fJW+Zy(ErO^kAn^?$>X{IgKwOIWrm|Hz4VO0M)D=1S zhB@`joJv5uZ&tgn#_OKSHMm~QcJCZyySL*}?asH>?yGngKIN&gc2|-ifF6-vlMa0D zaqGl=O{K2DgKvnBo{5hVT)VU2a5HdFyRYP@?qIboy6?udrczgc=wcdv^-NGoz>TdE z(K_)OT}@%brvn6l8usFsi+uFVMLtYmH<{YWI~*^EYa+a=Agz7+qF3>~r`enNhN$%8 zmxl;g0^4Uf-&77Nr&VHz-`HNu$iX+vsZ{1vLSiA2xpJlDPlW${WEvvF0%xH22%N3} z!#4z{XM$4#5n0MNT9e}k=a_QpiX5TKsb}U?0&Z*+5giU9g2BnFi_`EKN1`ubLQr)D zRK6iTdL~pQ5T63R(aI8!&tB!!6*(qdPCYZH5*%SpwET&1NBU@{`sYC}q$a5Ckl8|f zLqwEHa7rK|i-gD`<=most_iTiZQ~Au5#+l|WqbRQ^)sG+bcaBd4y&!8gpQXXaD_Msux3^CXUy?x_SCQ;i(W4-9ZL zFGn7YX1=x2JkGoD%tK$Iz*SGH`&cKBfX@C|FV2EQ83N?`j8s}kobr?t;oexn13n3HdqQ>mlg? z`LT&;`si6Fa0WUdaJm8v-w>Rh2~G(_WKf8#S58A@gL3MM9DKu^dS*@~cxuA3a>JQ$ z65%HfOQXz2fwdwo6IfjVj&BH7&jhOkBGfO0E>})NXp?g4iX42yoO)(XC8UNk^C!aF zk4Qsgv%neXEdr-2!0-*h>6ze^Kty_lNQrV9B3qSHSLEOu=F~HDDj{t+6GS4s8{w2kv!!DlB{u#ccx@omBJj-~siyG%p%5X}Af#G7Qf*x6iCnF$N}F=EB3DeOVunO` z!r#+K(Vna{KpkAgiL5#}p+ouGkv~~kr*b-dIbB$1$?r1G*X`(2YgOUnp2}KWhuB)R zKP5%Dhi$TwudKDoco*J1^?&R?Mi?boS&8s}(^2g8IP~$XLloW1D)tG*UQd|ra6QTr zVYUK1&P((N58xyP=IUpz0p;rVxe#^%riffE27ruw*IpMou7QRQ{4dc65t1v?%O#U^kRYK$!AT4)9 z){yzfls{BCoAi3zmqY&*%Ngf)6Z&pEy&PspgwIVcXA;JT0PUrDhOCp!pE~F1u`{d2 z)LkxvJU6pyFT2a7IE!osv#RCcSdZC2ox+<{O=;DVt+cOZ)#1QF-6$blqZU_3qH^lH2|vuYWh z!z+Hwc5g>wPP3}*p;)`G!dGZ_B9I7M(reOzM2}l1?jMa=^-SQPc3+8%|5&qX#ey^` z-=|s`TK%e(uAna8kji={m6gEuS*}V9D(4p658?V~&8pYgnNYrohXu|+%YZU73JCBG z5qXTws>9N~C*#6rDa$qk%C5kJZ-~zXe#s0Ev{`j_`e@FR?o%K{7UKS(npGG5F>N## z2$w~|Wr=Xn6~y2h5=GA>iW1mc^7Qpm<+R?iOgVK$4!&VdJu{~gFq%)%Xr6=!F|%q7 zNAss}p4kj$)o=bD8_naCO5UuxJG~|=gpc92Quyc!JotwA=$ZH^A#PTk2OKn-Ly9-q zO1>Ab5-42(;uHr;&jh6e+#E2o>a|m8?XwyMn#Fan&8q73(X&p742wPq(L`6!gl|Y* zJ(DI%U`H9$*XxzjI?4v+)D=1ShB@`joJ#Q2%rvXkJd#G4jRI>$$bd343gGyLU>_^9 z>Rt2F817~v(yzL1!M!u1fB@eR5v8(zN+4x=^>vAI8fCUBr>@AsH_WML=2SwOCP)y8 zuzWO)C|3)jpdTQ!YMsVx2MRN@Y9q(&Z@*7PJ-1o)f{ECGZ6lK2tUA#)Qg$P2u4dJj zQI^JL3u!jHS#_Rp%P^~+{j%xIs`@kn&eg1XmPe{VNIhz^s&6FTY{3CDt2V2(s?=IE ztFC5iz4&` zzL0*yPhszM)T+Bs4eXIt*vRg3Xcq=0^wi6}U)#X$MM{lrU4$x4@;!c)N=B)KlnBYEl@1O>IEnB< z?sFcqf4szZ$tbT5AZ&{MkT-Z`eLcB`Qi_`_uwZwVc+z zudG#0U6JElms8Kosf3h&oB0!Ap7%x?BI}UJgH8yXt^mh3L`2U7rvxHWAw@VPvO&nDrcEAZeO;-hEcqlA=u zoB0#r@6$)~W`Q%%TLey5fZ-d0(=)*-frKd$A|=XcgxRW`x*`YPFsGiGQweFKnIID3 zL-(c;V%|wCjZIwT*d%I6V_HumOqv(Vo4%th-ozlbj%Es$PVf4lOW8+mx z$x4=$2>zc(smvX6o}Q~hx_lws*yEnxb@97yeb?A7h@{(@=`*;UPuJ^VU!y&4 zT)#pud;PaVHNjByEzk79?)B)NL;7}*9(zn3m~qcd{P*ySVgBOy`N_P+*M1WU*l3>r z0)!Y=TqrkEg<~AyrP|H%>GYBpPe$RRm|jKnXz|`C0fb?MxW$tqAXGu5!T91&bUn2n zJ8q@|Q!5p&^_2@W7U{sp4jMoYJu%$AaQ>PFB`c>cK;?kn!ZWcQHyXhD7dCPV23-RTx(4WS4FF0kQg_KO3>IxW6alw-+MDb3hq7L;R&MlF zV2SI$ocV~KFnD@BXD9@u?p@5nDO z9?G`;EwAM5W!wIqSMoyQa4&)0d(VTIHFNW2Ve=glPWIx5_~@S7c3(ONMj*s{gI0m zfQBvxHl%}YDkzI8q9FMS3zF9t995Vg&v#0cDM7ksZu+_mMVZ$&w&`ms(Va?Ux>!)v z6L2F{u)f;Dpo;qp*P3=@`wZ8P{_gh5tB8AqX!+#4ZTXfsf8^^6^76vQuTg!e^E2S9 z@OdKq@*6ZQ?+>4;r&8kfK&2LV=J!g^WD@p2r7niPXxl?$f7?6HRY%lxd|min0EfO} z)kfJRM~`lZ;`<-cD1O^oeKOkUsoH2$^|sroi}i1=!PI)tR1-8o>CtY=EO-0Df-2Q- zBt#IYFJ%7W%8!619$cGEvYSKFf$N}x0o?>M=Ru4Au+vnJv~s(3luj4*3}{Qmtw!DL z`2{?+RC*|I0O>AFgg<{!UC$x(x(K0UVqSGWRw&Ht|JfuWn1u&d8mKp64iEJJi?7+S z0XH^Jj?-~XIX(w`xz~D8FQrQ_+Q3Vz=;)t5b^w3$PoIv~?bD{plr#QhSpo+$^2LEq zX?`82y?A(FT0@c(LvA$%)^%t##W26ky_#bFQ@B9mmRGnoP8H~np&C|2SE6uNvMfaO z4MZa%F%e$BS3ajI4YZ^gZ4gB|3+Q|ZB8;dV8}TJ?C8dlSnxCh5_1KSEeqgh-lE$X!`IoQ(`7w#*2y1p>Z zo=yeuX|<@+)TGN_`p?0hR{rT2IKUfP)RL)CLVh7p!I#2H$^ybJ+Ex^I3@BH8P=Z48=g(Y{1esZ zEEKptIf3#s48|*HqNGg4)Zw4013{LR9A8t~TXQLN;e1ta50(M_r(vI0weYy9V9)3; zdjhG>P?rmXr6n)KZ%uIlyjgI3ElzVn6XDJ9B7#0u z3zAn%Uh+m~e=iMBy*ZQ6Z#XKA(9iv=e@uis|6tr8BKir){lq2up_}%H=x<5Sos;OF z%1!hRoc)#FyYKVcB3SQ!>K`+D_qUPbiA(4k-?l%5elR_EPC`%9yI<3kN$9JW`0gw= z()0)ah*4ydL#Z7!0_1+;5`EM zE}?II>;4e>n9I|0=Opwrz5Crb6)ByK-1PJ`LKjTfIB@Qc}J95#)H{68hfD_J`1Cy*Vv+PC`%9yFc-n zOhT_p@7*9PNGlKyNhr^;Gqe<^Dnsm_xqo<%EJ**=t8Lnjv#J0V8A2^)w^TPg>f-h)$1>E_o zZyR2KFB0Lk*Bb&Lgs>zrt1<5i3V~k@Ga3jn4f#JX`1wf0m&2Imzwn|&_}3K%T?A0H z3v=OvF@V<|dV>}k6agr(_k#{Vy8&=iU6j^kZay!g%iPkQ(Pb`t{X=#*+r`(6Edfax zY@?k|7;j^Hp#)3a`M$w2J73pMQms}*t;N+k+7;)YpNg~9Ym(iP*m9P`&kSqszI+!a zr1L(I-=jzYl4$gBo7OL?w&2|zoC$a5_Q3g9$(Rbz#-g5U6#Jav#k*w!jvHJ1nDXUW zsJ^aPek+iKgq^K$#S&~>)j+x{RBFj{Yi?wEO_JYt;J=G2T6kCW`nwiR>C@3Wu#OjR zK)k#TLijc>7Oq{rgHG4ohpa}3(NL0Z%H20IM1kJD;dzx^iz^RfWJ7U&DyBgJ!sWX* z5#l!Wzy7Kr$_}k|?Y_CQE zF2d%<65P{Ux|0N%+DSaZ&*y8);-MrLI9QDN?q!1xJwy#FZo#T|V!vX7c&@n%I;rEH z6+tboh8VsFRzYnxN+%@3ghMH)Rao*0l+MT(#f3zbM?wU>NwG1AooRB=8w9;EC-gu2 zA>3GvD4t6zYKrTvHpwOZHS=pOT4?>J+Io$Z>YAwHHE91S;W2U%semDr>I*o7d|R{Y z1@ptTzL;iPH`x&lyOoA_F;HpRuSM@>2&|p*X={PSDFdXhdK3*IbGN*868_ zRS~}g5s@t;A4WrZTp$G)UZXZTv0svoqK)ib<4LmN%plB0;gm%9>Ej)hLyD10Au<-F zI1FUR6;I7Y<#1^Y)wl61PDv(Ktu;5E1uR7h#E3iH8pm?Fv$DhW;2hB5>=BaHB<+pc zg%70@WiZ2hAnEvoU%_0acIgo(!tk<$|`D%uz%)qQ!@S2ZlNKdV!=kPex{`-g@}8U}|M1za;_NTK#wt+iUuMylg-F@p+hZb^PHV z_hXbi&zGE|A0JY{ivKXPKi__%`tx1k9QyE{x%ABFya zfKq+98O-S*^J1yu(z#>2IF)$ddGXSj`|zvwvkw<1!fzez8tCBiVw8NAFF8jazLD04 zVjIMZpLT=e#mlX0AF`6a_gWVR7ar`ww|*JK?$5Z7SLx#+nIc0;LY#qZ@0?4QKkg&3 zUOS!oamzDvclmpv7DMXUc$rI=-{=6jE?+*j61-ljTRsG(7vkeDg`+`>Ov1Y!NO?ad zic05?9wicvO_he>Q8xUCN<*x^fU|)MrLa7xc+c)&II`Sp;i!QJ=-As2;oZFO)zW3HB+=W^yRjdx5Z{WcCkstx+b5D_;Tw`g zsicMyc*7Ktg()J7eFL=Y8{Dj5Zd*C6Yi8Ze>gF}ZPL(KwygF%q7l8@NdV&g5M=J`0 zGOmrOFn5lvjj0&@ow@U5lGj4_=BnRX=z>~OI07qoG%x({hiI78`7fb5Lzi#i0u>~; z;y2Pcu{xy1tC-EyIa{z?Buc0WnzekT+3B2((m9(_I_GNe9t^%Kk4}Weo*y*9INyHw zXRbPY(e`6MjVrMLAE-|*`JRk)e1GA^Q>8FrlG=_S5gz>$xAkEGDJk=SHVfOHM8UG1 z3t%yD*$ycMt7U3u0ykK;v;65|Hn5teO6$VTZH^_GstpUAW;cx(n%E%F`;Q*^9ArsH z4DFlXj03wGt#O?Xt9NZFZx!|ZZm7IkxY+F|&?yRZWm8~TBD~l@Y1K`Kf#YzbP0=Q! zp_kaegy@aPKUh;d;HlkD@(u}%_;zAmDUixwt{>vj>-TBetuLd0p zXx#&irK0Jua2SKRK^(>ppxNPR2?AW?ageCHprfXE$olT~B^X>B;Z;k}9nct9-`K|W zjqOGWSQKp|S7CrmUC=i2UWq7lX?#@0k7}cjsz#oJjcKMXs2ce<{Q4G~pnZ(aLMu7W zhghKBZo^ntK2nmls|JH6^RHYUzVIs1Ev4Q~qF_DYm!|e|nA-nygd?tO5Ef;|2uqV^ zdhCNSDCq1tz9Y;@5I@cIzRUqm$-eOW0Hw*dg;S+VFiesGA{WOSv~3jd;UoPA4DS5W zgBT5P9&jnI4t-f3zBP^r7#P+LXIJO`!)K|^v2iHVS7&c#b*?wSk)W-M1TF98g*_|Ok8(66 zu<+&v+;$A=%YmL?a7bT56AWQa`jQ>=<}QA@Mqjq}1Z_q7vQ^8!&?+}~>r1x%&Aqtwy393W zy^t+Zuj-TZ(Kg7b0{M_@m*I}GBx_gE6IAu#4xMik;XaNp$)LgpM{Oef;3au^*L2sZ zzV(n|s&8{m&`e>}#7VAZO>#BK!G?OaByHblIe5+W#ZNPKIqn!DQKVV)NClXD+>?e( zLrx|DV100gvmb&c@e{oG6JBnVeD)jIacVq67hgh(v&ZD^`FCDiL6! z-}}C2X7}z&vJD@73eWS)CoseFt|YTs@f`ZKT;DNt$fc0q)B>XX&b6@qdlC66STzuGEP;TkSdNt6*KE4Jq~ni zrEbHYi}XmcNpGj5_v=>_qz8T{J^Si(!83QsqWh(hnp7L4yy#pUnHts*0Bv#_2dn^? zMl92=$3&@;v!^p#B(p7&*;f2+{d18SNj900%~ziLB>MS9JAF+WI)iuL;0Hr80i0mk8sE|;;E2?XU7M{AkNnB2 zn@j)+Hf1A|v0%scg0OmI0*v|7m;kv0PGbTlB%vLW5PO5UKY0mhRAbxhO-5uh7Hqht zAR{vY#{M5{0yuG1^vNkqK>2%UK-rNEs{5$-j$W&itf8UDWwTG7HuE1|3cR7BS<({7>t895o^pOx{2s}L$ zedKx3`T8pR>q?)m(h7jP{ZRCw(f~N{4>IW-!atFDCIN60u&(qK;B?c!w^=@BZgt>o zVE`P2j{vyk*fEI!IG)pWBCK;I>d?n+lc$wLSDZ6?Bq9U6|+M|JS12|CknKZ9^ox zvNP5qXd4vkOtt7W4g)++OU6kqrbYMv_7Bve+pXXqRf|#;xA+#HD!XOV@6#8-yyW{L zGROpMCiG30Oo}w?B1ugQ&$fs>@=$RR?%hLS& zF6+tiebH?0kJlG5a@6{wci3*v-%E>d_!YHieeQXDh^z;Yc@V3~d-*ZY&pJW-#9{ip8);8)<{laY|OsXy_x{ z))ohebs;W+JtlWBvkUHGF5B&o1s}2ol>3PC&vFqZaw)q=jyKKoOjYKQ4r4sHF8cX+ zw$4I#D*xO#vXM&#%f&(p@F*9c!izl`|x{d?McXiS_lH z@cSGb7x=uqjBkns&zlq2se_ORAZ>-{DX({1^23-J4d*U)NOKhkH%9fvr#`3V(YF<~ zHyE8ZWukSeY`sm@3$ZO$T_@dQAr=&{SUBew3or2m?MNPg*j5pq? z>b@i#6xYmZWL0# z{yYeM=PyMGhwfO#Vdngw0MX5OTfls(ZUVvE6U%Wp;RNa;!)#L8*`~(X^WIY6wG$s= z!BOAXXVoju9NMyCv?cmbyz!yx`Wnm=nu7I}cSE1J8zo%&Ln?jHmv+q|RhEbxx}ba+ zb)cB}L(vB}KMRdQt^D}I-$~XDbG!i(hv6}H5?QO(%mK)5K+)PAdN!>(BHE>%(^%}t zL7a~k`sRXVw<^vDJCh*wajHS?FEb4bvVA8V&W2owzeRpFLTK;;-1Up#e(M6Di6WrF zO`wDx0*VS^%3yS+On+ugS7&OXvj^)lOuN)pC>u|fh3e)@_z(-8_}@+sC0%y%rX>%= z8y}D!KH&6l#y6Xol~@*?rXG$z3Se?om}vqX`nkj5$E`HP z7Yiog!c0Dx1b5gGA%aL$BwgjkX)Wx6TRgYX7VCmr*b}yJPU<&@G&Qy<;=5J6A>z9Y zl5b7bwP4v^{K$PDiWw^9=OkVIx`Lz7Yuk++`nB^$-E{=f_Q7Ze5y7Ed6K!X3jN4lR ze%8-NJ90nrN56LF2Y@umo#du7&rPRsqd5W%N~gl7HcRsR@#}@s<)L-Mijehg*iy%N z4?<6)}7!i>O|JjkWP#@ zHI7RsxGbSv0OQaJM!Im_i#one2u8e^Cp=1+2rY?WT;s(YppVtCT4C=HGq?Cr%+t)f zxR}2!hQBytVz%(Hy6I&Ya?Kd-rn$0)$6@$5-!KzwvctEw!kEH#JnF{Bp?7t|qrC>` zpaIH#p(K5`L%=PN!>KF#(ZwHXL*!Grh0ZC|1yzEvPajsbuI!t-MXDZd;B1OXMd<%9SV&OZny^Lk>(NYyj_4Lq*y$oD%$!UeP#Dbr-=&QZbq-pEsHbBI{#)ip@ zg@tfK$=7pEG0h`|L$~0Ox+q){O5nZ`(t_}h_Zk3aY_>YPfaAlK)n9-<`NWnLxyU@a z?VqA?!faz`kdYahFtbb@ijHSmWQH)Tg$W#kXLKfbx$zT;Yxrt=F|9b)hO9WBYGg%NoNp*z!Tj@j%Z(3ednt3< z3N_7rVVh*rv3VXo%7y?43qH67cARP6aRBA)f|2l+mz=;dkwqM0Q~yK|*R zcD1tgv-uR*?1RW+wzWDmpjeJlvEZv1jG%(tCE#XcB`s_OMKDWKV{>?jXJu}8WpLOz zj}?_+j>Zqgw?aKznlD}lbg9Fnv#@2*KpHdkj}6m`E&SR%Gj$~j;Q9#`OAJ5;gNY&h zwo*?M6-w<_Y8JnpRL`O9RL>UZcG@nTN~>HftqW_>789;*_o0Lf0EO{juV2ggU~4Lp zK1^w|b=0DDEW_b=kcD)oCHNq~^R2Neq9gs^7jJxD1ap~{sH=RpJq-f++%;}-8UpD>w%A?3v@gUX?`I>Ky=TPsAcLTex6#H34?lNdqN9Wm8`*-Eqke_FRc zCv`8B6oiS;42dG0i1RJ@uUqo{7~{`eGS`s2I}uwdt{shaEm-9opt5Gn9ygfF( z+b%Zv_Xl!^yb``yBIYmlcjFf^=J=Ho{uS87_(ekJC$EIN`5e6KW~YSP@hWfZtlL7r z++ttPQh>j9RnKbNG;4Z@kW~m9-WIQib`}DrG;j-;9-f3A&fz);Ob?}pyM%(Vj>GCi z4CN#TMG!wDd!0%Lf54~-o97_u_x#xPo(>nbB&K!OGxcyA@Vjf35-~hWBus=JN*Z=U zQ7rhoc!?fvu}r*LC>FfTzWSSnW=s!1`SOr9Q8bL5EY-vHKUhQ$-yAMktcNqDdieA2 z3xG4M8^JTiBDLwm^j%Qd>5%w}e-`lJF{IfP^_L z$Dft_6P$CCQ#-zLH@w|+K~qpgQ_xOR@G^WOQ&nK;;0?P?g&`B|H?j!^4O+goCKh6|%omXTE%7Phqf@qoHky9Bn1z!Ln zf2%?FM*?->90I5d@8-Ot8(p{|>$axTt)>(1cbgh})rHe5r7pY|O$S>Ux;abZl!Jj* zHf}()tjT?&B-h6d4@fxYa;=9`DjI-j#`WUp5!H($3A43Dr*{8G;=0Ol7($n-!;Fd* z&jwUZzU;aPjQ|cwrCJj6XcuYy+L<7OIuJy?Pv15wLRN~v;?RJI{h3u`dgP!}1ioSt zXN_qmNhjh>UEL~O+WS)K5;i`RrBxidG>LrpGsZu`zrDlh5?}K( zo|Pz7q)Vk+3OGQx?YoQU(l@UNm4r}2y0l>Kc&!0&9Wza!#Vp(Caxg;WLO%>Omh>>< zRQ+{W{pDRbNUcak;~41U=Au$x6Wfnnsv7b&6%w_T3KP>#^lHQ-NbtzKk?#@sv>>?o zhGul8pM(n(BJmV*WVj7VfUb&l-&Lslo-_3lH9R5rocu8SC93^0s2-3^y$Mw3KfO$! zrd-RVn~naV^x?N46TAB5pzeH6-7X}WkEuj{=@_DEj!1xi@L3Kn6ucFtuT;*Q+@#dO zh2&gFgkAGaDD$YE{^;_NAb&CB3p$;@P4ybKrQBJ-60NQ32JuPF=**4{4 z!HzSvc?E9AB#L1lxLp7?qCw>-eqHMvcC8ahLrb(ybdeY;?S9ayd<$G#XpwMn*`+^{ z4E%qIyTlhfU$o=%4Xvn~H-E=z4l67iH!d)S2yGI9o9Cd3T2|GjkUU>H{b!n~a%VtZ?v1vA$@ihhTq<4spStuLgcN z6wUV^D2nYJ;gW@Kw0P`$izXkxfhUqJ>0_`{nb$2Lh}-KW&gN`o^ZgJ3R(8lI`tvsV z4flbWrn&Pg6Ys}I?94h8T}j`R_4~2lU+t`BZwA~sF5lQv!X6go7O=O|s4Hgg1L2az z>~YFa#NOi_dz@93)La&|NzONe`poVnIREgCc}04|5?Kyf7An%-C9=FSpM{E4+5BND zf1#6Tvw^Qy5)Oa8+ZP6jy3liZiLkULRx%NNHhky{bm2|mlEuPWu;cD$-!zHbM)I7Y zXz@N+4iSjaqxP9F zOL}tXyU7?t>7m#jx^L(bw~MtMg2Ug^K05=GpGxpI)MpnGlj>7pfc^1j`w7X6q+qkZ zOR38B1$%Yb3A5k3i|Ekx)qg{h_bgG?HaR*7jdCZV`DHXec#@~jx$@wd)2sE<=Ge1= z6h07IxVJ8{r@Pc&_qk?Li>&!(vRj{ScTLb;+7_2deKGQRlbRWIv~NJ74K7M5LMF9Y zc8fPCLbsYVrfe>ln%1VqR@to<$Vqmq6?O~O17npI*)5WGs>MJ03sZ6phAOF$Xq&G5 ziCAsux)!mmZKAQwXlxUWZ3P-Tni@MqW4ouZ12ne7gwg9q+saI5YpM(%aXz4-#Miy%4ODVk>#EplWMAzS(_QO?p9+YO zTVdkZzlg>9m-{5#;*M_W`Js|fg3w@}W49uU^>+qfYBPcZGVfhNV&(skH^?xC=nAdv zW#K+-M-jO3sB2im^tv{rWlW6mhTKpNlV0f>lCn$a+CFRl*1S!PFh*nym?8lNwWv;X z!KL7j{z=MOQ*T>7vWZmiHY1j@)(TS5{3>{*eYNQp=fg61pW7Ug7>$ZnQA-To3q}@^ zbz`_>v8+c+W&OLa3Bc3{2S43Q$h!0I^Rh-S9SL3l1RT(69f+Y6YHGzp4zXmraQtHg<~0UIW5EZ)C5t(vpR-7t9`88(*}@i;#ZWFk{`vS4 z%zya$JoAil3|<7>+OKE|$LOmbDcm1pW`BbeZmrSf6>e5*{N=H9ViY}mEa?9}dNcN3 zeASGd1EhC9uSA-Q4UjJU&qeg*%5ceIX)YKbef6s*vMzS5MZ*Tos^kpzHhcu+nR__z zE%-j1J4GGHVk4!$GaSWL-V-iaOyq)*(pm%H*GEArwtidSnYYWK{-;MKug6TD(mAz9 zDtc5nKfw=m_Q;+F^*^ zH7s$8yd#6rz9DJSAMA208rR^s6Bx>Ir~Ws9TUsHauWRL zD@KQJmVqR7SuV?Pv~UnanMb8m z!W$)F{)Wafg+#1@xw(RZ=lnn>RI9@xZP-W~7HPu;W1uCWw_`O0{il&O3erYWbub1a zB8_8eYz|e;jCov|dPDif3Xmq~@xz2SI^oR9xHBtA8e77w#3laAd|T{5_#?+Jfj?@O zV&V9OiwK;s)^$l?I-xLEe%UF^Ew*4~i~Jd=jlTqVnm$JKqiUR)G4*OO%8`?9K491~ z9einz8@Bv1^PMHKeB82>M}HY_{AC2Hb!}dMjDee7Ul0Y*P+h`*Pe(=CbjMc0c{wr@ zG3>ZsotK@RJJkV6WX6{u;Autxf~0DS!E+$&!EeDcY=ZNA1Sh^822WRV=D{VvpV;j> z_WH}X=zzsGiyW9czu~cfINvZEyy6>SXgO3zi3nW#%?)HGmcX*B1k0Sqvdm$b3(opx z7)xRymQ~hE0L%B6!19~ddtP2BUQQOUTq0gh29FJ639af|UEXC4J~wEmXoCh!n>ItX z>O}Kh@up}6mTg?ennA7;iJOoKT8gGu4$WE_e3cb4z%yKQj7w!=2OM~Q>shm9)ag^4 z`>=Oy&YyS0iG&}nweq~9Hk{#{Pk<{?KG;?^G>n6q*}9@F3qzQD)x3USEk%c0#fcy7 zHjaIZEu#34ep?bR2et8I{C!$w^S`2?z3i-CG4&J-iHuw=HkBuF>{)@$AHleRO*n)S zZ&OBYnNVLwNyyl6qQm1t{z&I(6(R*cBL(>N>k;H}6Y*I7Sg`+14joF3cp&h!jPlcU)cM18lKfPiGov#bLN3oKFD2h1da0&4N|KK=AsW}hiBppa7K1b9iMf;qrSrO`~ zmXoe^S_Jcn#AN`926;LE49YvKW{k>r9kNEO>X1`P2_H)bg!%%Uc32%b*z8hJtEM*3# z*FoOCr+K}Qg?gHESLAyd3v^aq?~`I>lWwZEJJGO~2R%N{`G*egCr!4>E6-SNl?85D z6n6NF^QyVPWeydrPcp3Nmh@#|&-4v7+$&DVhFkbt;XFo2gYF5nU{>WJRcKT2td_*j z(b>e0@%P1*?|wG=)5^P*hRp_(un6-LCa7g5oV<2UeGMf%7;R!O3#YjA@RI8TqU$qX zbaWl0Ak2lPn-dDVDg4a?w#h*gVH)64ysrRWHH^56aN~koT)lS-HM^Ob-6GAVQ!M!D zvpA<}wQC6uNrPcas?2kQaE3`W(4x=oo57C-&$!k#Bw%UtNMT&siLQ<4+J%n(Eg8ht zpchEhxfM670qgeBr+P ze_!Wl2bLa>6n3MRwD%BQuh3yiVzhS$GwT+mz1-7_I<{61A@k5Nul@XcR{#N_cJ z9@?u7@XoB$T8LOVRK(g%>}ub^orF%~P`wOgRqbsB6SaSC30slm8ATR*F>@-@ zu#j;%k%HJYj&ZXO2Iye zsop&yO#3cEL%$z9q?N5uAAIu#6gOAglZg&w!ax+i$warFm4ZIFC;w)HKlH&$I?Qao zr)BUW`(PD4%24AVTkBo!cs8K$1sA*=1hVu!qz1@Tv@oGK_GR)*=4a&J>^{yG=sVS>jM zXiUP8$sXhgw7HK@!eqdW_O~Nv(=q;PH)f0v_>WhhF%g1il5O&^>5+Vddxd{JKRJuH z0neVUjZBwUSVx5O6`Hv5cxcPtbEPPoj=CCD32;g%1>!af4u37q$NVzX#Cz=~B=|wF zW_q|*`BWCFxyS}X!}gVX9JXTWdD)$oan!YJ2WOs-9eC!{)ndD2R$;N=u9s?P;_GY+ zu=~2Cr_ZK1GEXHpYO?yd)tNVSTPZ;I;v`M1s zem_2y*8THT_s@qDO|6$%C@n%M)O|hQEKbelV|sRVuOe3W2b51`7q5H6_O;JBY{k^8 z?g>J5zX6;%$t5=8+3KFDsC!lgPQ2b)RQCs2RG+v(3je?d(>QgBbLwJmeAt0xxBcw= zdA&`o21t`39eUc%QrX<1ieHCMn$M}$wG;!`rSmyVnUt?Db(j^~bbPsUYjG5+#=&=B zkM>!0_h~xSmlrdZw;TJlQbCudRx0{y=_0G^W3V?@D%J`^hpX#or^nev_Z}UCU8VK= zeAVxDcbmkcT_l_yK^I2eor-qLOZa<)J{ZXJ9LO+Dx~j5A)mH^d9d(ISc(&?eDyokH zjRn7Xak%;rBdT<_-xy?;9BQoDQ#PHbKw)hJ&f2D6ax}m?9+ErV-gfUDQBZ8q-8(9I&z;L&av1;3GSTzU)0z7?tt^dXpew*rs z&X_4e<#C0_8KKIcz0cJGw)q@H_Nfm&%yz}crtESHCU==v25$|F843H ztd9yd`>f+G>x;u#Cz={3T-J+%NBOK1E^7v}?hpwKDR-G49ZX_Bqr^4oGN}}N zby=%|dwkZwW!=TBobO`hSq28Rd-l{$NjdPCHx@j!rD(!w0G66?7Aop~<8IN4y4!#A z73F58I}qM6n22HUgUXBJEK7Sr8hRJisC`AP!uHf64IW7RVkJq>JMfDRg}>-;_=Pq= z@9b%mz(y~}d}6P1^Vf!h$f_ia6n7#Ks}1(fc`FmR;&vAwbT}%p$AVAINQ*rIyO8J! z+l^-!ApQa}zmOQclNcq)yRNe^>2-O@OSNQUizLlIT?O5xr*@x!ZXkffeu7g9yq0>_ zF97ok5$K%=l)wkd6TVse%6~#p!If44FD##euTF^t5A^^N?Gv;I&rnGI0y4i4gWd^P z349=I42bZH#RA99s^GvCVRoMA*@+_?!d_LR8NaCnQ!ozHvwneuUx-Za#G!-&JL~a% zzG0OK-q<0?Snx>T*fFTBNc7m+@Qgt%e*u|ah(YfJtOPy~b}2ingHLV^v-9%DxY}t) zW^}G9(t%&N3-sKnXZ->RzYv+;i9-nmcGlqge8cK6I|LaEp6%H&s9i|(*t+oyR|tOr znO}%O?*yy_J`i>(JJrE=UJ_;}eu-nJ2bt4}l`7JUUwC2kd_>Rs1rmNCGQAUr5(@0B z!uR=x>M%P584Gs(*wv0f?L(r+mccUuO8E=O{6Y+RCtxM;fv`*2SreRJ#Lj0fcI@;c zGdevL$>JBmka`}_vwneuUx-Za#G!-&I~Djo->@dk4nf9(fBKPQ$Dj@&(PJCNb1I=< zK;{=>&^rMufe(aT%Ffzg^NYi^^ZhEv&WI4qon(NxVH6NYU<81xIs{6Y+RCtxM;fv`*2Sr`06G|bMUJv);^ zFfDchAz%u&D(P9jK*BFXrg!2{LV=xGl%H={7iNbbW5F*cUF{gu8Nk6lCSjWu2K@pu zzYv4o30MhyAna0h)(0Qj5@u)1qh0OH3BiPloD>44V22*;C?vyQAmJAx(>rk}p}>L8LbwAAr)C81WbXOLC^XH5`G~vy%UEL3ha!CosD63 z2oiVATL@k%VNllrPC8-O)(eAv0hwQjLGJ{t1U?XUDLb2k=Uf)9oo}sl>}(K%eihj$ z1WbXQ*Ry_sgkOkE@5G^m0y_g@XLFbxg2erY-*dHNP-_7voiJ=$gh9W6%rC^CcLG)d z9|*gYo!a1aFAB3$?%CNY1V>b4n-DMs#r3RTAmJAx(>rk}p}UO|MCk)#TVbCui^9wQPoq(0V2f{98XG`$D+AuqtDqZdD6oPIQ*(C%_LA<@5^$R5Y zLS%X;4kZ-W=@mO$!t4-aEO@ME$Dr;7oOHsl?Gpz50y4i4gWd^P349>zQg*fm11}7- zbNz*mo&7@4p(6D{z!WS9>sh}*!Y@Rocj8b&ft@a~vo*{PLB@iYKICf0pdJLAbi%O3 zg+af7%rC^CcLG)d9|*gYoo&H?zaY%c2ec4{5p}Z=w5mvp5HQ6%$6J{KB>X~TdM6Gg z6xeAOJKMtS5G3ZP4?1=XY8&9B6Naswux)J#kokoeluE!#-~(ZovJ(rQUc}BYmz+33 z=n#UqigXGAQ<7Q@gJhTjB>X~TdM6Gg6xeAIJFzf31Q`o@zw6jBsNH~*P8hZx!nSof zK;{=>P$~f{fe(aT%Fg!S70(aX&hO55?DPsjy^0(W0;ag7BU?ZM5`H1FKIR|}B^1~> zD0a4o*&)bS@ZE98jzP_!JX{mP)=yZr&IQQ)LJUeJU?uQ@uuIw55wvU$v-6jpovaY- zRgnQ9V2WRv8)6EO@C%XYoj8{51i2KUs2*?Fzj-k@xwLazQg(I)KY3o5owjqGvIRmA zQ;}&QU`kRusQd=WeMmOFM%3c(f?iGU_MDKTkFVD<|n{6b`9%t0JVD6q2) z<>woAhuI-WoNxAR#}4uM<0%YVg|O)tkjotgy%Vq!_(0gD?CcG;Z3@@UFSx+Po^2(- zU;(RO5jzL|IZ1Cd>+Xlk2RU|;>7h+H<0V{zIgk8$c{@~Nk4YRYI>wB!7jY3eZ zBAbPPDSk<+mMK8OFGQwy;!r|?owX=G->^T-4ng87oo~6?F{oRR4LgAG$$}S8znlcg zDR&Gru7YE#K6vQ=gxN_bL=fz36M`x$f@fPLEQ)ai8!>z#JKLESHm zLy)mxk40O1s5_7in+An#Ct)S@3&{LJ40GGLkR_T%7Ajd z;b52@f{X=&qfXg~2WwV{3?nK=DK> zotP2CR>hyUF_ax3TM4&~lE-6#&N*bovWfiMTcN(@;Us`qu-cKzJDS@))DA=>5?(vu z6>e{XK_Sv&-|St@r1RT<9j5aptW8mExQ@k;T}3x`E_oN4_bN||PQnX|lmKvogKfOP z8kd3?4Qemel1OJs5F;$=B6M=!bMTxZI={sg9nyIuofs3HeWwau_jFE(PQnY*NdU26 z_P@cAu5XB+AK-gClqz8guB=U6(C6`kXXWSm$cTHdWD42e#{3)4vevEbl+ zPM!$5pY%|JC4%P@gkY+T)1a%LC-yOHqlC#pe zqYw+x`0cW`R=VqreZN_N(5|;aqSlKm+};g$1W^|^igkb#?&84S!X9lE>&8~Gr?iW1 z?O^NINjh9fvlVQ&D$acy_+qQ#c@mKd65DM5VkwC`MIwJgBo-32h>W7#hYf6z+$z6g z>iQiBhQ_%X5VH;(K?A9YX6q|cbpvSAcI5a#Zb}jz#-cEm%6atkFi6$q^#mtgd?Og* z73|R8ac)J9j$3FJcS&Pc(AdJDtc=#iJ_E7>ii!&GPxMA+;3%KXx$`LfALv8)IKm$DKjAzh~GoFWdbLo&Bv=VtQPwY7e z2@Xc%Wq9$jKH}^i!sBJhf^R+&fe`FOE?TOXUBin%w5qY7`q^sS_L|>g`!1A%kPDmi z7u#dI;=N7|2!3abgj&Ita7l>7eIuj=du#{(NdW##+QKD9?Vn6rcx5cO+?wbAN?SOt zws7zJ{#b3n;N9Tioq1cR3b%z-r)mpd{_UyTLe;v(+QM5<>a=a)*S9Xx7B+@Uo~A8i z48WgBTR6|C{gY`6ufkQ@);#}L+QP8f!d)2MKvDh(cERB7@$k;PEvyZ|QD3;#ZM z>b6k+%*EQm8&K-BZQ-Y>McTr;aLLoO1srfdEUqnZV3OwUsSJiEi;R&n8i2U7xAOxK zq+$SK;c-2s0}#z!HG>TeKnjT(wP1|I5f4q9AQi?){Tw6pYK+u_G14Q4L~WY0t1Kn~ zi;$QViSCSpJc&pJi5UDHfuS!Yk=EH}z9A9|i5fAY=m5^RE*T@eIu=}N&C|67oLf4; zF%m{XeKtlK;ur}M9bwEIh6flcjrcLrMPn2xCjAJgPa_~uhY`>)M?k|< zuYqVXo2lu#WV}{tZer}SQ4i}vqod$k|6NdX&g^4p+~sZi{xLs#y3=ub8uDYGTTtY* zI(}}_@fRNZYz>!$S8+nArv{Sjz8@m7t!(E;gYA(@kyLRQP6Ry5ND3) zZE#r%7Kd<>^BB7>^d&XXQQqG&hWlHN<9PG2T<%2l>(%IbI3d$DYReifxVdo{x#N|G zaa{y&R*Tf1gIv#g_&UIwFnA302fT@z=wxNj}B-U zTZ?fZI|0GpcKgGP&B;2Qr&oU=-kWC5OJv_())Z|$FLh;W^2*tgYv2szXRVpI2_U<* z8F$6UmWz+4t^}dYZ+ycW-T=Sg!&CSEW_fbx-nl3FVD8~2@W*rBNjCL~=+|4Kcc!Cv!fN2GA04{<%b9%rM~|R`%i#a+Sn%Q}Tg^w0!$&t5?b?mv zFk0zor@mw28VjD{^Pu~52T?Ww+G$neJUH->Dc{9u>UTxBWZ~PQQ@<}Y6;z{XdSj+V zTu$SLw^lq=-c3EBkvJ6RL>MQ~rlUW=bb2rvh~-F#wJjsM4D!8O&6WjK-?JAFSt z19obRnqqd|5iWTec7Ah9F*}`kcDhQ~VT)hD&U1juP12(wcAB5GfSn)y>e*w_qQh(!6!g9j^MaFnqd%7CSra{+mU9F=dYm zmn^1i!P#N|WB{hvnPdh;3{OuR5-~x(*8lydXCS8NV#G9uOBNHez<*I@05nde5|8DD zGmfW2(TbMnkJHf~qk92~(%Y?o?khTg&d%Wfahyf>1Xs}*EjhhCIei8kG{qMY=kajK z({ON^0q`8;>jgtSbgIiBNG#aln~XD@f?y| z=NX-tdNn#vm}bY?)-*f#31qP0IXWzEJzs%LuCtra7@c?N(t>Dxh35detv2-BX?M>g zc-QWppjPfZfSly+9v&D2Mv@`3O890vLuM#Hhs;LDkf~&Y zlL%)Z8y;yYF)zM3%Rv5>2kEKNrk*)&>WL1BsG&5^({W06+fU9w$)5PGMU?Eia7j>q zs-f<88wJ4C#43#eP=zZYr{KAOg9brgf8F%;k-fE-RYq{w|9fv;PWys2ST&O1^Vk!E zcl9@p_6MfUfcDoJ>O6h2Qy&SJJPqwnE~34>YZ#XvLFJxsVg;X;1$Vr8eqM>%gHgXC zz)~B|yJ~BzOa2hlcddW^h1`LU^T$>M6CeJ~d{=)c;lrOnLIiMpj{7QpH{Z1~lo0lar_tybmTPR@`hxd22h7#WK#uAEn4vcT$$q8vGY75u0SLSDy&m2hZ8G{Pv6KwV; z6-M4&vc-7ViK-fmo@5h1^R9``-T2tlm1yQ@_PD6N?GS`HgZbKg^knWK$$Y2tAaAv| z{B4ir$=EjJwWi#ZjX@PqHN22ExboGHu&Td%9Zu34(Oj@R74HK^j9spRYFyf5>bS=@ z?TrPdcK;qs9rR2c_kK%3Q5iTCU)MuGOl5cBe&bsoOj}x8{%(}7|Dgr@KR2q(~vKUsuT=kolYIrBiI;*>*mJCVCJAxC9|ojHlBf2)dDw2 z?t8=++k)R@+njQ%g@OgNu0-J>smWwbbe#OzI@y@`n-G7K z#$Q|9I7_yb8Of>IQ#L=cxKAurI2OzCSN%*tdTT2@i%+(yAd7*qXgR0FB6^1z+T;R@ z2Z~t4+z~8(;T?`e4Swca0kSw7?j~o+qIHuqVsTC^p3Hqu{qi;F*@SfSA#`$BE&kTC zG#sqFd&H7qNYL@E`G7-Kp4z%DwPQUO4CcyQd6!KhFXL8(W{MU6*{Y^3Iv$w<_=a^|D7E{@${0CVyeL-el#E5`}1}we&7q zpFnh9ml?fgm20SaOSXtCypSkS%GO+W5wxCyVWX1Rj2c%foVMDz|UBtk?iC zwUGyN6PB(Aoe@pt^7;;(v80_k46F_caK9zF{Qz&4iLtdyX8% zAk->%i&gFyEH`P8a#-r?A#SP?QfoJ>_P%W(g8ko%L@*YjY4M*fZI|XEb$RZg;G@Ve zwH$$;1wC@8b{MLAszAb->Cre~fsD+q576&RcgTJ`LCSl#GlZT*`Q3p>ybIV zXZF>vd95G#glK&C`$S_)G#78oEo*o*KgF9t$f3yQvvh4~?oc$>68%ZM@hARsJp7p- zaK_Ae%borueN#gO_I6wWH(Qvxl^g^ zAdaIOQ8#?UNFLf(9{gz5!fX_(I9R(b{?8qe!P@l{K(OvX;81X&k7Qiw9%?JDj_K?W zjAUcM<|l|D`_`1*;P0f^j;|K1NOo2RwQm(+=uQeDidy5r49%sXdnX&bUTotH%58bg zQUDCjIWVF460j6@M2Kt&Qw5Ue#alY%!s|$b{enln?_$7XaPxN^0tUKBF!!wLkOs%D zzACt)NnbPZ|0pY0Yav|`tS-H-T_1>v1(UJO_Fxd!7a*JyhQOxnAyk(_s0~BdR)Fxu zTb7{VL0gnB(6Ge|KZecbWN!aB>(0VB7044S)Exy9!_gkd7YmZVv9kdzDpnDhb~Xt* zv3%es<5Uz{O4yv1E1yn5VM+@|!d4PvU>6+9;1j#RK3D}>*kM^XEaohE(QVDA`H`cO z={Emio9g`R`VyJ%vhODIg9VAb@8%*@yL_OjL;%b_LWlZ|h|n6n-?%PyUEC^~>AsrY z{@y%Ng`ie-%tzz7FBxVv>E__v2iOc-9JR4(PxfjjV@5p3f~Wo3$#^TphdZ0`5B+yD zM>(x>Z1BKLJj*%JOmQ;3f>~k`WJ61E|96U5W5?r!wcBIO&wSj6z5c^qNipk;cD~?2 z`)*R~ElBaoco8b}j%^+iI>`3HD2xT=*HIH~hrzq9W1;Xi+u}cnM9di_*OB{L7~4<* z+e7I1Xh;^cw7Ir?1*oO9fviXvNKgRs{xFbmWBY6=5E>Q(;$}LX3UBR7MY{&^$$!Lo zw7N60OEuGFUZ^frR#(9>)YH`1BQI1pOXki&Xjv_z0P6s*J4r88XHyn_mEPc?F>1;Y zC&w6$Co`R_a+!yXThu5_wcK>hl*DFqdUjbc#lro2$ch;dvlcf^o7WlfanA9iT6?T>&Ff^_k-Q*H zyH;cJ3{Kgz{@kWA!B@XUiDaE1w&HVnhEl``I{U(_W8vqkun9u)xf6H$@T5+|ACe+F zG-a`qiLuWG;)M|0LB+VB0RL=|=V)#AjsPZ0iGw#)-k$Qh@P_ zC18BM6b7+4Y4qdqXe(gcbMn^n%2OYtPNR;m3GVuOh+OY3g7v;L9!{qtYs|@+zAXB< z0TEpb+{WWKJ}y-^!QnJV&nWxwsLIYqCvp#l@gE`n``%N8|8I)%lVrhocDx8by0%G= zA6*-l1q}amO*A0>X?T-8{~@y@RdLzBu(H63LE%5XMt}-Ujm0u?j>2_R-=H=dwc;IT!ug6ywb@j! z%$=}&)z!g@*M|rijB|>_!Kjx;t;7`x6DU8!jL(4TDj6z6TyC7KvIFMAnUBu->PppO zwtaWFxyry>7vTgTttL76sN~gR_WKdbT_+4Pgdk-K9DSNE5GAcCyTwv z+g~UrwS3fDi^^_h*|3lLx9=|j_N-E1=KxsONXP^Iwg`%Zebh08pC2vzkfs8u+I2Rs z{OUU;nWL+G`g%*h%hENE+29TdLx+eiaLDzj_E6Fhx*o6kp7n%RhbjMv8WN|$uQQPB z-^Pw^^Y|cpx>cefe6?;2-ud2Rhw{T2yoybqMA9;t^nU7B9#yCf+#fns* z4ie!_z=Wav!|-Nml~^c-4v#XGdI>q@9A&HoX%l5 zX&4SW3?0JY5_fyb=5oi}bQq>!C0t?hfX~7q#&J`H7Kw`7`?K{=k>3i{e*SOb?f)I>j-{clwM8`z5kNFuc<{uXdm{Q!WQz8{eI_?2!-6{b7Uo$t)uBA7 zkiEnK*XVZfvDc3?n6!gHAe6aO*)6u{(UfI}V>wS*Ze^idfb1$ajoRQ^2G@6k=O#7A zvL&9gNp=nkBy&@*Ko4;!`jC^|R@DfZlL}TDqw-jdpT)IB-8Mu|Q56wZaD-N+;b8?v zXj8m^g&o(*VBkNcWK`ff3>a{eI7a#tTB?M;j%tuN$>Al=wu>}e40|&e0VOx_p|*@_ zmRqMpKB55CSZkloNs!(n_}bSH2zWl85i;K1lr6&;PQBFg93|8(l3QWqrZ7;TE8s@% zjTr#Duz9RkHSr3%iiiDZ#{o>(yajU z`$Jpo{-vR=rA%y?syYa_ts&LFJ}=p}I1Qon;&D8w6mRG`JZfO%Yvu5fdlssEo^7|LhbDSFB>IGw6iz*mT<~; zMu3aAvnSaAaEW$yu7`f6?JR_-q@CSuLoSO?SkTV8O552E`d)jfY>^cK)ej?gywI7k z;A%B^EtiN}espG6rxxh0-yaKRcUj-Y?O;Pe=a&d{SQzMLzA*#0I7ATqS-DxW@_q;~c@7-CC$$HWmy$#jP)7 zwb&6_nTx>gVcLm?4mqXVI^mGaoU9wa7uLTqn+%ELhp&}5a-T+JaIGI}4Wn$sC;eIj zdP5FFVC^u-N}vzG=!RngTWc5&ZbctL&%mBu?;RdMMI9agm|NNABtUgmf#0MC&w2$8 zyvqN~8m-c6wa>gtuWRhpFIKPhueMnIO#f<&)qi2HC*qglfhbSJarudR!rd#5jCF#% z-ZFCygk)^+ubcI{(Z6odYpuPm*o?nPol0$IQ?pkstToJEXumWjkx!k9lx;m+9(WTYZdL%XB4xo*wW*dGy-yvf3Hh;1RPF?gOn+>Wynt zX};O%0;pDfOI6)s2NiIEQYpDFgSwPoh)=d{bqsG2!#f2*zeNlW7-?jfA8G!}ZL&J@ z5loqauDp9DW=nzmZXoF_w=)9JD$KiXivmJm&i+ApeT^l0glpt`hr8p0d|T)qe1iFa zNDkfg^mPbAE?dAW=QXHk23UW=lhRyO$SJ+BDh?rgEI7K;G~Ha_D1T5~`0}g@I(4yG zQ$*7h%=a6gop*lgUOBDc#c^B^OZ$fPD|3|48+?Lwaq59A7r=KSTe2cGZHhP~;$l^}x>|WCi)~h|NR`!(Lt^kK6U4zjc6KPLPw2SNPJ*hf$ zxNTZz@1`0@dt9i*R*7Z1iRFyOEEHzFO6_#Q+#zB1reJxBg!y%&kYgZuPs>-BAFrQ& z&B((Tzz@I&rro`L4;x98*{Jmp!(dAmanfWqjajg4=CqU9q+}K>lo>pkklA0q(#b5a(ZC8rJuaDz zOJ;EIVTw0_$k0>C%)m|VaNx!%vsqV$GAo&qLuR&WJ0Y3PN@jDAne))xJUs^FN2|Nd z@L_QbnjUeMP4Q%SR!l) zdrhM3h&Q5-Q>|nCrnX|2I{>dOh1jd_eq^(7hyx3mRn)Vog=Ix+(wBwGf#5nQ$0e_@ z+EgaHdeD>0SsR-jl24bzsKeRSnoy z*;zF-^=|q7lvQIWR(TWxh~^A4t4DQ7ex;ViAFZU>t<*j)b!D?I`w%X6hjBIS=G+6J zT7W^mYUw#JA_dtaLH5e7G-WG}YFxM) zgG0A$x6$Um3&(O--6({V7Q`AO-7Agw-=m{q-85yl%d#FRu8ng|JcNJ5*M`~hEYYwo z!uONIg(TZPed zIJrerR10o}jlym-tRPYTS__2yN97mqm;6U0|53B+zrO%?iFWu%$2i?qjr)#d$S9%! z$GiZ|um@g%K|yV>STinJze)8JvUsr+BWLt}W zU9Hzv|5~lrHhc9`+jjqIQ`^J-)uy)pY_BKcx8VVGjqvTY_-$$H@cA%p$LsC(>WqI| zr+-~9lwJOHvtGO1tFyi`G*TGqB-$hKcAhIv7Q`Oh8^`n)ftfLT>NsYX=QRZMFF>wE3=69?FIlc z!L%}kgYXKNBZyCv0VcTKdD1_zNbnk>@bbg9GZwhr%1=g|F5bQzJ{1G81!*Nq!76kU&r&J1^k zy|<=)S(pp;=2<5#^v{r1|3Yb)b18!FtGYx%G=;+ibAb zcvwd$sv%c^UE5MS4Eofyg?AXNI0)7kSm*cK)NP@4{_Nk2eACUgtcfob?*eZwtrd@C zMron0q^*q~xPznJa$s+Zlm39DKVt4zh|gP^*BE~U>~<+w&QZaqF33KG+@V5RWJQON z3sIggby6Rtq$cuHRmF%*A`3`9?Op{9Mv`qKj_P4i9WWldsJZpLEH9$KH87L(o+e1V2VOMnWB(S%Y%?l%Ts|>#`(LB;A`+S&_YME!_SpoJ#w+vr+HO# zA9mP>rfhvu$8-n(`Wf=mPdcm!!@Y|6>A=TWaN=u@pH93cb=9q1atjIPj{wgS4%x^s z6Cao&ewZSDED!jxJjM?R2!3m(Ok6} z{BI>tKvf|J;RvMSsFjZ8Y{gM`89dcBPdE=Yfx*0NR}sPKucgPR6BKJ>hHzL3O5g)iR2xiDZCD=EhUKx^AOXSIpe0lraS9~g zL!7cX8SQR(I!hvS%({=P>qk!aTx+YqBlenX>nVIH%C=vN#rbT#g=`8wm3}=sY87i& z3=5aIj?Lc{!T59jF0vZjAX5M@RvD5~x=uZ1N5S8c%|kVPoGj?$Ke#EX(`n}P_aRGw zaq^T*Q~>6n4sgdScwCA18l~QNFr^!p?NE3ujQE?Gt$19;SE=}F{9187)#!wGsx#jf zs} z+R^MZ6a+=hUP}yAXeIE0Dbj4FNV6>uRKW6>X0O55U>#`rf70w>$!;BqP(bryn$54$ zY(AJ~s{o1BLte8tAVbqJ{z|jg^8x=+vzZ9ZW>V^~O4%9m1YJ15oq z{EX5RkvaWg_Lf3o&54X-fdLt>ppZ{B^6yf!`Q{G0r)F={s}+x{cnm3nauHkc?JCYx zYBt{%YWAhOjB98%0ZOx(lbTJ0MVgHv-43J$|AHRG&5NzAF4XM(((EssaGG5&&EAE= z&ZP{ECMasQQmG?K-~&^n*-VjUTOMe(Hn}vm7_Y&oZgXPN=ah9zdVj-OpW}`rX8uexH&A?Nn=`XYJ}S3*;=iZ zxwR(R!fiaQ3$?Z(yd=#H39Y%Waoziaj>nULz}-R7wngd`JAa^L(Kgj4GU+AcwrFbX z(B7GLlEJ+*9kq00)B#+3-oUyY@ts)aMr2@eRABBl z808oXa_H3DzPqxyfpfsR?tFPzm}r+`4z)aOn!FrNgA<6kL^(S%=R86HgS|N%X#-e@ zTI@|lyLs{p{`Ms4d+wpL`~a%!o}qt5`1*A?fs*?lJ{oE*ZXF*Ef}RwMaK+ax;`d`Y zTA@h&&KrT1V|XJn-WyRA4)wzt1BxRNxRXe=?^f<@0v+Sj+yTAzW1^4e#XUG5 z?Vh5U1vaPssR!7jqaPx+6?-+s9>)@{JD$_nv9TNCy{IhXra9x%94`4fq48Q}Y0d;0 zq~=UQa}Zw(aEPyULos*;CIxv-qK_SWA)rb0KghE^(?bbf- z5N|HX?oxNdFPE>|+*vkzi}ndry%I70;e7&Mza9zUvuswJDA{!I(1j)Y1YSP!>-nQw zKJK;!R3nTG^T)f*J92b~PhVr{A9CsSK7FmF|D&bLce2jiKEWo0c0-M#v#Vz?ia8_O z=aHId&yCghv=T<$krZ%zhI59F?d*?@UTYQwt_8aEg4ZzHwp=0 zTS32`WWtWSWaGjM9EKTT2n_87p0df@ zF-bp0rN%#?nGJcPNgTRU_qN!2JIK?mh~h=3EqRl z)B`AyjCSE$Q}!T~8Nxc(!O#>XGx6lNyA1K3Py{XXWnAlZmCk z5hQB2;2j*jmS6ue_(A@UM4N-2Bl2gM@tqlZ2}gWEODb;zV19y}q4R+`BEsGTdpa1NCmLlwtpqEHE1tuTwP z6+M=4S`45;c>kPE@tD>YIv#*Q=}$`f)47KZUHtxc;y}I&ZpSaF+)*J~DF|54SUTE< z|2twq3ilpkzo*VCrmZ-&gl8meQv|;^jr%d3gs+SRAKQ?ZuugY?gvTl2IWOTkJLmy) zAcFRCiv!>eHjAJg4YqyINw~#_5<&gxyQ8&G8+K)@ex0L+MfW>@1)ujN<-!=0 zQ-B(0?tvPmGUPO(p{Rb%%b}W*H;0v_au#w5Sk_c_sIK;f+sRJz|2VG}Tgxuo|Ic4lO-+pTMq4BH{9&l4e8XY&~cpj7!qNM%c_JuG0mDTQN za3?pi)#%E)8#kJZh;w|Vx|%-BXLo;|Z&BA+=)}D8<&Mhy%3pQu2dvibU`?^ccC*GR zkZKp)kvMY=mQ>nSRT_Uol~zb}ZWEU70Xs?UQWP+bUz2h#3~E;=nZ-@U;;I_ItUA7> z4(rznTGdq{Syjg`R&{ZKQ|;NR4lyz5`F^n!+krIm=Bgrx!H6nyln=qf z-*y$r*P<)^@)ap8sLQ_)SH|R8((Ng*tMdlsdjPUBMpq(R&}{err0!r%=1;?MP6`ftUScJuj-Kt>Ec(&P zyU_tdazmh#Jyk4tvgKl`?`V@KKo!{wzyUYACGC|*;=ZJrM1)%3+|IozuI1%7sq@#dEF>(GT+GQ zqi~^mPzgDTpb|{=D#2$9Qp}spH@TUQ@;Q~*fNa4Hx4A~nnqv*_!{6W;NX>^PG-WsY z199Xif!TBmZby)Jq4B&U#$?@f9jd`XqOIJy^)nYg=O7hD+Jl1qAaPKR1FJ#05NhPz zU=8vuby&X^mtkGOJ|wFK`Q;31uovW_2K)FYsQjwgUcLIbi`_(&uR-6sdE}t)!VWM8 zU#$z{7|uo6hw5=xELim{tH)0jycGz(7kn7xxHri0y!*mz@}0K8ui$%i&^v)3xa+X1 zJJ#9M+0L%+$4l@Ae6lzPwm%>3mkeL6ys+hMM@hRlJXCLm#H4OscK0u1)MUUo5^7`k z1MqbWMq$s{b#&H5+c*yGOx1P5#oQ0i$*M{1Y z9bLBH2CZyN4Etlh8}3>6#Dd!|HSuGrfI$6jjx}3362jG3c5Yb@93=Thv&no=4BfYp zP;+n@>;EAWGUyN2C<7q)_(M3LZcs9p+*@Hr|2e>n&6U=#45?nEWC-9rgGugRqz>?>)$+0(@&vpWv_ES@@U?KT39e%mpPJA3JI@} z=wgX6SdVs#SF}|4MS4wK2+-}JxGX@o+li|~;_7uf4o^88M?{#-mu)Q0X&W@N4bVYN zo**1Ed`B(&YYheR$$s>}PYPuAox4rft!Iz+4MsCYZKfvLM`|;vx(r*SRc@!K&A6%d z8IM45*Qoi&^TSVC6b(OV#h?TD&x69Dv!H?aKq-%# zd;3$QKhmc5;NtfF>!I4mZeCXZxT*KSJ(8cF-hlg`pRRnl6u~)f%HGTJ6Ua&! zHhu9ENSoAaU>7vrN^OL141`dPN-KH`QEN~as^~(ZwnCxk0E&8NMOM$gCv#p2RJ83! zqAP-}IID^taTTpHHq{^%B8O?=sm2j~$mYjYEBcUNBP&%jZMx}5dzQm!$$pR9xJ-K!6=sj!{)Cc7QBCr2^#(IcujPS=1&JQjeGM4Z-e=@=?Hk9 zEymB|NP9DX{lVpFSEC#p7bXzHz+_W{v#re3tDPf8${|+?6lVh2@-&tZ52qihA&VRZ zhe~MZ^yXOb-KXY>*EvPckdtLX7d8!r&MYG7H*Hbg`RH`+J^^MAR525RLI=T(=8-+ z0wbc}t*N~JF7PYvX~tHPg7#|~H zHh_mn2aewq}jWZ2@C-GNO zR|2KZ6iJ;alDg%A)Gd!meF9&D_k)&#)cul&lW)DFuV~@JeLLXAbwIMe<%xOjRcS72 zlFugoxq|pB))nDwg@}`i0t}-wXZN67%~lCBfK?+GI4gl~3oGFVoAYD@$e>DKPG1Sm zWjTwa;O`T}JBP<5tDy%UV?p!BTs8FK)jZ}F`p0S@C|1Ks!lCq)zz3$N8knMLuso;+ z%VX6*0)j__mQXcxQzTyh%_nP`uEDh*D_KoA&nzXKiqlK0`uN4_ydbPTdho^gwE9@n zlWz_OZPw|f&zwmYSZGj1j{NL{a+)IpVA0oJqg2)h-xk)#HE#VJyhM;e^}(F^`mmv0 z1(JdXnuwSFS6?4h?x7YlJ#|K1U=ruPe8km9H(q^gVHL}v9teu{p?6k;68OLr)dy2l zAC?F8VR@`RNI=j8T0-@arAYGi(JS^%H2hLh9~!>8>f*EN<8_ZOsgHp?5UY>vh5DFY zTZEiBz5Bd?)K&xRTtj3)eN=<+8oByeAADO_A79v%Cu0>ds6Lp}*N4%vuRzN#qh%qa zw-+FhD0j1o*ft=|1t5=K3dn|1AhdK==_@!*JK6&v_Zap7{nXFwx`p{@rZ_*v`cp z6Zq};HTL-A&a?q|zPU4P9QaRJZ!|AAe*yduN=v}0aBsye+H%#KW1j-vC5Sut>jcdC z;-F@SMggadHQJp|0rSm8KRODY=_%l+JOxe@+KR<#tGMqhPBcw;LpV{ZJ9~vnzaW&Z zhT=`_`;fBGi_cUNTCe;nF2Bi3Q?z8>Mj{x0z8 zzwlW~^!1BHa-mP34CR`@GaPqC2btHeaxmJIGum;YYZTC}Xl%x_0)q2y zy77S7JoY$tF(M8#olY<0>@%E@yBTI@eLH(Vk@zwD=+d3`U35?-e4=UJ@51u;>yPNs zepr-FUm_MttyhCPu{RuM)l1TjFapu3)+enj1FZ6-^@ycDPbnEwgjGKtz+pcltN^B; z@mCH^{wUXe4@S|BM?0xT(di;J>Uw*KH#aZL244grjK?y<7phU4)aZM+J2h&T8VxZL z25OYWNB~c;{&?i?kklwEH9|Vnh_`w}-t!Fu!L3E|vQXN*(GSR@t0O+Ej#?irk_&2d zGL%ab%DkiB++zhbQqJgzsnLj6Bh4)}!v)jhZl=q*CHzzqfDJL@?CUX#d4jy>?(O@nCpjv^%LscQHL-45t}mV!mwb zV|=PvF^b=Jtq8sepy|t(H4T)#`noUR@MLAat~_`x(m%qS>9SgceV(;q$8+(#bvE_r zWNbEdd0FyBWvR={lP@aImz=+V*#!iX?~gElvTRMT=|2!mtkQspr@ct$ljh{i$Wpb% zM7=2dodpJ0Fc*srig5UR9Vk9E%`L}OgcW!aP(k#}RDFbu)~I~r+SJ8_mXa{iFFh|^ zcG0GxM%-DPJick{;LkqBtRG_z6*A77o=;994V7f(mH!@ze2nk8$0f4$mn65WDa$kZ zdjGBI`Qowu3BG96AoATulFQb-08WSC9As@8s4|Ir83?gR2wnu^D}bjR=2Nd2;od0QNVME_-!R-CV-Dd9mu|#jKmub#tkPlgVjcDX4!ZiE||I+(pH5 z{}MU|^OZDBR{>?>fp?u7{0kB{jWu49c^ODQx*I=`L~{F@vfx8#*b`6X)F5(s5Jzr4uHHq1V6;_o59}zX}YTR-tR9z>tbo%OJ@f!n+3}VL9a+& zRfbK~EmxJFc+t7bLiAQpE-!%WST~t=V(AKD`T0e-9_VhwB%(H$^IGH#lYgT2cafkU z*f)(eJSDdxSW7~B@sr5D>!L6x@dLk$)K7$2&GZmiCWP!3AhY{2nqbGGt)B;Ag%rpdY0f1cCRwdZCqO5Cl3jTn48_g>2B}i}5-61#0zN z`q%USwk(lt*hsN_8E?rGd_S-@xf7y7jx7Nh&4-2$3mPw`%#fd%Se%`>29`t zWC&Ic^#!Zhurj%)7rKc!#mkdpi3i@kB10mZvQKQ9n0e+vddr$8B?p^+Ji};FAUq(k z;{x?Py*w-+GIhaOsCpFNT9Not{bPL~-CLH=w`_Ud{H8D0pLJR8XD7DQ%txAj zdtSq4h`anea*xVf)^fT7u_@U6{Ix%_Iv|y zz5{Tf1F*jUU|9&jTL@tG9s_WQ02+@ht6$CEo63dkyximPcX|DVxr~ zTaDlUo4X`4L5YUj)r(hB&HK`2SLa)I{J_abJx<#GHcr~c@9R!PzZ1dr;8JC<_Vo9l z&Z0fwP7-6MIHmjNilL+q%q8Y4o4X-B3M8hQ7KQssZDryRzF>d@uoaZxB~Ad8HuQ2W z2n`;95Sr#LsXreSCacy2zdeajv=vF#uPLX%nVs;DAnT@?%H|D(YPr9P+*51;$vxf4 zFC>1oh#Ej2lF_ausDQVd>TyYHF%fSCSbPf8Ok$b!^T>++;C!c8+emI*5Bjf)kQ##F zJmm=5V7bqxAkyzpQK1@epO54@J{KU8Gs$oB8)`igx#H~?CXXkwF6T=RYzco$9)Eb` z-nl0|`S?pW-PiD>S@ygqdSH3s9@pzudPy7}{?!iePMLIyT z(Z8cb5UJe-=X&5`{n%0;oi775}vU;pr}k zK*+)-lH2QAY}IPDDg`UP=X<3}aYd>L&}>v{qfiYPY_zoAxT%eT5FpR|KA)L;ckgb( zzyA6D-h2MZ-aGfqnKNh3%$zxM=FFrlZF9q6RO5i^=}~Kpxt@1p;-*ZU6{KWrm=dFA z^NvYLWh^CvbyykLNynZau=-o@7xQO-1FPDChnMY>aOm*N~d-J2Kdl2(3Ca)OWPcolqEh zGq%eLax&CPyIQ07S2ohhg9cy35Q>ynkfI9$`Y$`L6o&d$VlF!)u!XejGtn}L{Ho{< zrHNrnP4?!cSlnOwj)0D7p|3F~^9)u>)aYU8m>wG&@4vqR5!;|B$*}?{7lMfTkKLD% z#9mP_8o!GLn`f=ngQyKI4o_LZe5tRQduUjfG5Ad#0W#(3r^^t4tk(f(0yC5y?N9sl z7f~Br#8A1_N@WYLL3!UpSnjywp$3A0Y&cmqSiRrs{Hpd0p+i!nbZTqr4@;W##?(vdP;ls|2E8xcvB{GfxERXA<_Xjw zbgg-65^9yeTHk@Ez+`^UGkw2;-?6{~z>)z0MhO7Hx9bT|L=2@S4BsSTc(|6I%40w6 z!6$};tJr6d(}I-1b%Zk$@d{FX-^RHw#-G}x`h!qi?)H5f@4mwKZG!un&@F-4%rW0o zs24dxHwA8C`kkiqJDFY_Sj6;dQ+hemFA8{L;U_bFRA3d;A2z{fB0ca}Z0ca7vVWA? zuU34SssXuLZcf2xvwN8{Xs zLbH5F6Wo`CN&}6=(Qd-=I|y@VW?&!Fdrj%TX8Pp;>wh9W9e<4G{~6QI3}iBWk}16& z>Fn zEhf^w;8H-28{Z|0I|*PGUUw{ty9nVmp?EQZ;$1xUC-WfzAm+Po3DA$s6j_Go`Z=hO zY-mmoZ#JNyw*-$TWhu+BP96$a9P1L3dWB7?Xjg)Vf_!sd4r9=vd)ndCgh2ytm`}kU z!?SN9E+Fcd*fOZuJ?hP;h)guFj;s;nC_Omp?6)Q>!T0;9mbN>7`2o;|UIMzPk=?X% z#BkE;)dwtJmoemo=l&TdT$it)ItpGAcXvvJ- z+FlNcDfJ&zk2$zC&K=+WHV*%ia9qyx{t>settIsN-nLNbp*_d>y!*@DZ}0u|j~#n= zKkGStN&4Qlz^iP{?WWfJPpo%#YoC0@gS`_p6^HxGLWji;CY(O)o&T^{yi?Z+Ja%Jc{uI98nGLA<@hmc?Ye_FdEOF0p znVrTFWd^2e@cdG2-WqJt{seRY5#RCcKJ&L=^tZqM+LZ4<@Quj+&6EL*=ftK@D%GIF zC?@*LO~w~pJ7%YzS9=(n8{I<5a2-Gs`#Nb;0?k(KBEXwX8+uQpvBVhEv@=L+n)f>} zr46maUvq^QY>E&bP02189JC7}cx-DXVMu1Z_To!m2b*=5sad&mZPdv-^#wM9$F4O2 zL31MC;-b-eBH)H}ONHjH6M~vyhnk8wrXpbX7ikfzir9?F&X8ib2@_q7T`hykl#0yh&942(p5eI^*^|9T z;@ozcO7>fv?|Cvqrz=M$?oqlYwlHPTR?jfnL&P^Le&e9F?vGsz>D)22L{6?oBbn90 zs?)-1VbJR1@F!KmFLjj=Z1|^Q(pA-9K9;eVAM(@rBNPr46a8`E)L=gBM5mU;K!lM) zST2+lrPSI_dk*3%wSf>z1N<>cJx&&*)NrK+h827;U_l`y!dsIXw^$lr1}4=252KDk zB9=e{Rdj$4x(vgKMjfMJ9{`Pjy%IjT%n(c@6nb7CP~i#Q z9y%&7o~H6o)Q(7)5>5hZm?KwUsJTE*BR*N>=pB(#Y>E7JEnyV_BeMCeR17V?siFdM zQ>5qxY>M#Rv?(GOf!fYAzWJt#igHs#W;Jh$4BH69;@9h_bw@TuBuo9%;?^>!l1552 zC#ozsfr?l$-sFn5k~<=>Lt}QeOHQXg=`*&pWOvsqoGdttjSsRU+_Ik;_AChS=EjZw!1r128s=>3NKk?aQ+vT1-`{M?C;sbf zz9Y$t(+&m6M3|5hlw=9lz*rGalK1y32VBF0?#YoqEGC1T7FOyqZofc5u=QSqt2h=nN; zBE}rK0s}YQh))$;p1u??JCZ1apz z3+?Lc6m@3G#P=^PwhwA@TVJt+E(Ca8qdN&lbuvSuRmOp5(4KE$m+yNXJ+?6Q6-#b$ zswe)HxR`Au)Sg-?Y@XCCJkTs;(GPfY?NxW<4OMfqYLb$4ostw#l3Q#?;}xdl7N@wU zfsTB@uo$c7^3WxCR%hGPnKn{t9n?ff=5VJ2a+Hn@X{?v1g(NK_O9d(VZtCo4ZjTMK zag28g)Kqnvjoh|DKN%c;j$*1!%Yjv1`vDXzF`!Ym$j?8RA3wqIc%$gjYckO(9Gmjv zvm8bjH_QpPwfrXXi52JqtU$5S!T}_uV!K)c%Tq;aL&aOl!i}$|g5TaFiHn^LtvN$p zXNS&18qo&9VmVe6OKpZ*STF>P4i*!GC6p4BA417`iZ%>} zb>Gx+sD{O}SU(5H&8am2hkRt|`klRk)jNOyDatl@-5~6alAz4Cq8`d@J8GcJP7M~ObJ-RwB!j%c!c6&=#kc0d zahB%7@nVy^q40v{!fe3h;0t~x$e&5_XR`dsoVSF)NB z(YaW>>cUg=)`_KO=?vu^-{IuNqx4yCn3|*%&hRfS_nqvtr+nh830T~a@PKa##3ezw z0sSKJF03B)vBefT%{w#O7D^M9K_|+04;Bel@9o)#w8ONbrwN^8(n@vVMy1mHA8_)?)CUoEqZ3c+VM`R$a5Dy8i)QIPh+>G;5niGUD zL&zb_Ab+0_a!m+%mk{!93i%kyYs?mxT3DV?SOhCbxo_zLi|3j^IjLM=qVoK85W>k% zgFJor|Klf+FqR2WF8&JTB5)h?JZ#Ey!BwcqRox}a}) zxy5r4XVx33%Sxk)zwCgv39l%PkEh>@<$Lj*U~xG`Jv2+bseHQJ+n6~ATjb7VD{PLs zI(%~Oqy@i=*oGpzT3nv56qoB*77`)1Pm1U0De?D7y!u$P{HGR6GkQwC6{zqdhcjbw zCWbS0lseO@l&31C>FV5af9iE~PnkQ%f6W19+5tF3DG%CAazzEz1$`#W0xCwB$b3tS zES~ejb?wz!jk@+~7u^Gz3QN%yMP0|Lg+=*FVUeJ?S9{T@Lt&|&awU0FSgKAhRc9Ab zii#fX4XZg3E3#dkSp>I1=T)*0Cu?Z>zj54vBG(U zHlxkLN+9=y@Jdf{L$V^~M06!=X?YB*^@9*FIO0%PwwQ$F_P-(TwF}f~>6d}k-XYUc z(OI?=s@nwh(U;s3#CBT`zoc)9bfe$ki(0TinV+gGN{=$r2&yF!xcs>SeTVx#7_rjx ztW~*kw#o#iDP`T5;zHB(-zmBB{Sy5bp>|+lKrF(Edj_=YOQ$>#J*X**%0AbLWJEbZ0<2q ze7gg8GUM~6jPLywqKks;#)d?=D6y-^^4u3_cMpWwZ(ZSBWOLgk?k^>L45As3Qbqs} z3vQ*NLn+&*mZd6X@T^Q%D=_c2Diye8sf*4Ysgyv3^1}(qtLG?XExd3YEwr8_x0y&j z10-YW9pY;Bj7L`Ak_i@13AXe^r=o=o;y(dnlXm-VE}y%Uf(ao+K`Yk$N2y zbD5aDtQ(2Y9xRXGys
    &t}KE$>O`PX z=xqxcud%`W!bqHsh7Zsa_*6UCSJPo}JhT<>;GomBZ&_w7%xbO9vW~^@6(XloUyJmG zUxmPF1GAd9LTOXJ&USU2fj!77n{#f;vgF!9&SLumR^?FWueqLfN8LlfjMXG|4W`6< zCQ)0Rg%)sZD!2gSV~RR0RlP2q8(U~5yIP#8&P~T)BdnrNLszYX1C?50Qy1HmDg>RQ zIi1s+cHQIL0(U1XZK(2M8%py0G;}6rrXj8l^zIChym_*T?!#Z0=|;2os$r`i704&x zohHCm0Q$DiFl0Z<+k%3NeTh`nldhJ}Q6L_mWD%%Tg7pWh&#gaLo9H`gS$sOWvyiOe zYbZ@J3cpnNEoeYGlE}GC?|1Cy;E&ZrOXk33oo-@p(L2f2h!z`Tv{pm%#kD?<+BBmCMc z+LUsnBT{ZE^zDj9juBWs%~%Q7X0By(uazxYFkp*bp;3bMOnRfO*+6lOh}oW z^TX5V2&jPQL!$!EP(sY}!{?t14T#OBeI>%89O!)=yRV3Dfq&GR1N#x@=|Hmu+a72E zcF`0t8|#?^{ab(&b_Uo={};K5-Jg;MsB8mMQfZ>(j^k2NxIjfb^?b^JB&O^DL_#VF z5CoF(I2LIUG6qt%bu}AaRP=Nf4ma?R#&9T@rhVOw>(4f|N+%3dm)Kbt%mFUjia%K} zB@Nmplo)u(px-d7_9tYD(hMN%f{&Xcm>rwS?B|K>EkJ3O+`kwOCa08Z3@8!uZXTl| z)q(tjVta#YzpU87l5CqN%~zY#=W$F<_6$LXP%UBhXkW{rS{tVK00wzcH` zkdUqgSt-YEyEe#ML@_;YdTY^Ja zBQ5lI2-V{VyYep+su$rrc1l8(d{Wf>eL{6Qi23ITl~42)L=G2wp}J6+2dT2IW5^Q* zf793$PcbS1Y^)fWh9x<|nTMl!ST7lpb6miuG2};R)P+Tm$;p>S2Ho+|JoY%F#-3Y@ zvFBd(gknM`Ij*&#>4xEd=RVzA`EZ(^rG!xuj|2^v!Mb>PVjG)aO4)3F$iHD;!Y zZD?bd>E9L)3IRWkBoso?8*pTamV^XK!c;23F$0R37BSbEC7}%Ks*{q0M`5=7XGy|s zhying0ppYT6^iDkP6Ta*PUk{f zfl`bmwxMW1!l|2Uxd1mBRL-^#IcodS3P}Z4c_#t(G%SYwT0KVZ7G3{Lp?0LJ^Q;rU zR+A^T4ccnfKPrv>_q|mosQ%g{djgp1Jb`bI|s4BQqRTE)%? zcMQ}?0q^n|iH=n(kOG@BOl7cnRJ}osP(M9bJVz}(;Cm4Ei%BXDU1Cj{Z;z}U9~c#A z;aacPWDU4&54d!-jd?t<3W-yk#dDmcJ+OdS0|3s$AH(c&1%PuayLgV^5ob-eJE^4e zyI5-Y%pS@ZTl7VyZ^?YxQHqGgY)5I>jUq9jOq;LESwx)_Q_kzGF*aG@y3U0amMM8j z_h;rMFHXs`dD4T4+;BXAjpxug^4WS7o<{|~&vF_})G8& z`s)$kjR01!!(K%`Zd-P28tk8zTKBelgjl0{564NX_YAN_)Ru}Ax_oAX>nIv1og$wJ z4>goSGaSs7v}BTrFlES}6#2vL1vERgCRA)Ox(RnTD^mS);`^`zjtvQ>-^BE-Vy`p9 zUz7rvRHezewbmuaYwK!n&Cwxl3?xVG?jbmFn?GZSGQT`@79Q+;7!}Aw)izHy)o&NL zCC?DQ5#G?j!XzxZ=|fNnIw1(1PT1aHg~JM2;1P47MP9Dd`2#$z6 z5&2PsDa1ivn95m;MW$N3uoJCh@lK9|2ZqA2yT=Jgl%&`A{L(*$7uq` zUcDA;xZS0ePrw$@kYN4h-6JH%f(dHz0a0G)a<#;+ z&P&Oi+gqEB9gE_g2eP#J=z8kh14iivtb|m6d~UCK=WS*$ou_)>JT)rtUlgK7lOWc= z4_q;7K6j%t^~;S!A-?Jf7I%sXXXi##2R;sBEN~sbPp#Ylko$s;Iz(sY9-w#0j6qck z9B*DTL+oeo?0BgWb`{U0^;fxz)%(kFSgpdOogqWQv^fY(q2{x1@;r-(XtCdYabXC1 zoVa3se&o{+(d#fkw8Ylv)mGGqu#=(xaWBbHe?J+9Nv;AxFEaIAbNcI**}M;qXW!aQ zB>PNkxfe*93&zKp>Z}xGD%WPMnap{=V3IPF4?^ICTACy0QDxyigyE5+Tk2|TbE(tH zajg7Am za9@l{TfNJieHM&PIO{$t@ZT&XeRE`%`SW`y4J)V7$Jv!otM&GlI*NxIDrn&i@V>M z7w^6-FTs6A=Wu)q%mIZ_Tf-&4gT8VfQ_a3p6OjtrMY5xQ18isB+8K7os?~S`YSwcL z;C;2I*JE3K2-q!0KCEO=ZjU{_p(MNWK>+(|7og|Dn1!eEI8QnEL4J!akG_DI99q0m z)8&W!pkkLGRnKi@?p)+1VZ2+Es0@yamWFM7tzl!V3m|2;vV1` zj)mn_gv)EQDmCql;(@O`uVXInUF2o;PL~6*2=f5 z*Q7XGY9}jOW$(*aeXuY)8NKXbGV&Sx0S+#^H0@oMR4C~z%$91;I}Exu&8}XTqEtNZ zY^}W-mljAwxN;?9HM^MWNhl6kZ?c1j>ju}Oq76b2l2EH$&y((i;?SomP*gnQPUP(@ zn{~v3x{L^QItB3!1_gg1Z=9$j+9FS8%7xSAY1rvaQfhYiT`gn+T@X5d2^yMRjnG=x zVGG$0r&oMg!7q>FOH|%KqEfR(4;peaAs!HUH{ilkP@K_iZhfZ zee7+3E4OUnY1z)*98&+H7TeUh7``4u^PZz@GulvQus%to1*m6kD^ z?pzcXF6NSc#aJ6eF{4pTU>ya{tXx;Ujlr+R9`C3-8}!Pa8;2*d5k0pX@FwPV_JZl= z_b$BqYUjhX=d;L{1igo`h18PyB)$$Lg6KgJ9^H%W5HqHq6Zp97N|5z1*tOj5?5RCl z@`@#yd6kCZ|j8^aA2Bgs{sVbprcm71f_U_a_t0dKRUkB zL<`pua9Z4ux}$yv z9y$vFr!ME@GhR$SP%tp5b3!LwYB7c#IsbfwVMn$?JKe}|=vH6ZtHnYnUc-0aat!)) zNkmx;e+9d`D8>1;}V6!YRwP@(KQHDb-I@VAdK_IQxp1kDyugtS8w&ghT;;JTv zMvE_MQEP8l`LwQ9^K(MynLdOo#t-($hx{Dfs{<~CHYn_gRkM6c;0=0?(Bm>_r1WG2 zZX9Immc_>t4tdM5wHvL5CSH7^D ztmvV42NQ`K?G4YJchJe2(a9e9Z@dbIc$ane40o*hCEmg3?jDSJ%TQ;@tQpq=Uh0zSB2dPwZw07JBH3H9ggU1w9XgHp__K7`U=O?wNaVYBm*Smw(6$H{9 zShXKvE`f7jJl#?ePP1Z1c1oZ13FjY$PKt|b(CsbiWr7k*{yFXz{_Bb4{x#H+{r27df9nBndFC*3`l6sm96I#>TklC8I@Gy}!pPXl?e3()&O628 zx1E))K$B>{KpnJiFy`a>Bvu3)_gKnHe{;CpRcwSWE3X3CfGe)D%McE5qc`t8c~Vk! z1$a(!Tf!KzE?U~-pY)!7P%=U^j*Rs9m-e3Ykr5zuy0*BJaF8OvtDsuJxgkD{Gn@9} z_aG5dDG~L3%O{Ezt6C|Vc!JV0zT21Qv$#jfRho*knMGTBhT~6fobxdCsCLmQnk~a| zIenanFe^kOXkE#6Hw4Z=f059ab@ZtJI(X++tn=mln8#V{Kc;iA^~dnFc799E`7>?S zcCc_8Y|iCkepYKb5D!H5PWx&O6rMAE@TzwY3Kry`%l9F$;DcDmq~aBCeW4+0K~8p( zYF(ui9a)YUm)@2Jm&u}iadxkofrpU9vrC^T^8ktVo2{S^1A29q z*nb&FZ61tWV&^9uD?Zg8=?@;OIerWamjV7dltt6R8GIIJ9jEiS#PhoW)ZJ zp(w!!)bHDPi-!jhvhgio*@9Ly+h_jkH(&)$ii{)$;ymmiJjG0g8PaCe?E0HUEiYFp zG*~6>Ds^_Tl4q(_Y3!LJz#O;M$Qg4 z(O+*z&*gB`4Wp7CUrb_^Ny_{KC^s(Gqp>&ra6_E8=5H2HcE}0~$ayGJonM5aMoYey zg0GJXzIr;GdpIEf4F;0PrmAs#rrC7}ila@v$u3q{Th*arTbP{0Q9IaAT!&=#E^o~t z3${YQq36ICt^sDIqI;xAx`$&^<)Mc8<7ML^)|heH#%$n~{Np}Qx_9X~Xs&;NL>e1i zZ40sV#cMu=$~dKD_ET3q-3fEcN6wrB2WO=;MKx`U2Gzy$mHocu*ry(%e4^fnlStTp z{zmt8o|m$0Ol@Lri5;g5MziJ3N5VF~f%*uaXmu9bri5)X&iM%z4d)41Q(tcYEVwL! z@#cZtP`vVqvRoSD<_wuuj-V`1;s$pDV~mMdU+##rzG54?P#j5s)yW2Po?T5)aTZcv znmBd{@8wFFSjeN1%B9LuE6zYh*;jE2Zgz%udUmFIV;-ow5LP%0P&p(zAAbyVJ2$g} zVtV*y420}PYyHQbohE4zwB-d|ZG!LeK0N(;(x7XXOl*-qT){w0d8kGzP%v39Yo!W! zHP&fD)rJb#fYRk>tkIUW^a}T19;o=(QFjI42J8=x`V4%cN#cj(U&$OF2J4a1zSMdv zN-dcql`1?aI0bB+y&j3vH8}b@J6$QUDf8@|A7ZWwl#&VaO-xw$I{G(87$0`y4a(JJ zt-UO73>1*MMn~N<$jNsH$`6xY1oHF6AUX}noz;Lb=T~V06TPLbQqSJ1k$fuaSdYOl zFUh(poYCOPeA&sidTY_wxSQdqJ6%WN2a3+2czH!H40%8Z)%Paa!>&%jNhWl^^OR;e zf#z*!*h$i_gOZA>Jl@!_$A&fRK8_W8>ppPQHL~3*G}^)LPr)*4w6e{t7-yhBxf1Kd zEv(ea=a2-dI?=VAFPhQq9D07m*-*nZ~K(=aI61|_=09f7zQ64x3dae}9HUjl+F(RpFtG}3o3n!9r+J{kDb z8CVBKrhnO*uQ2bwiPiLrcvN=kjDE5|Ldp+U)3t!ZYC2pcNWP@wcH%0Tui}gbPp??T zN)43kLuEVJal(}768XCxn3X6Nb=e{-&vo|AD{nwu`c>ySBB43fTrOj?fj2EZpe!_<`F@Jz+w85Z-o;{?b+);nI-VK`2Sv$w$h0K$~#~FAVQ1%@4 zT%53d%dra^C4WD<`B?I2Zj5;#pmPgl6gcd_;k}C8k{%}uTf|Wc+$4ejaMs4ugl99? zL&#-rLiJ`tEtw_N5~v<8LG}0!R1b42v5DQI`ZwtgXilVp2lS0Df@M3*6>QEtrj82S z%P!(I4RN83XjWHO=dB>gw>{4=w5e&_cnc=-FX*&DXPM%iS_F;J;y%Z_1Y36PaDDQ% z^{wTvcM0a04n2Xt&C|wPnx~DksMk%Z|G?86*+*K|h+W7UuYR`rMiLQ#;Jp^R1(<0d#bh0toA=x(o2znajq@$kKj{CZ|VVih4hf z91iDv`avbI6&j;|;T&ZG&iLtDeCLL)&=2y-Kmtb70M$d_Q>Ptx`_BgRUX|LOXRn+U z#)wkk{{~&%y(ApZuuJYNV%WvbB9uF9F5(osy2ys@z!I|*h696mCLsK%Zwd6ebX~7Y zBk=-(5j3_!M@yWGV3_H4y1KZb&=vBlg<_^@`;1JmsR)cW8ihr2hu(Zr(lG z{|cbR#v2&zUADE?;u$R#b$G?9KT8`8Mv%Anci{IZjMPIN^>j3eZ9Csm>{{QU&X$96 zGsMl*h-lbBRnr`APM;xE%$=Vd+RCkI_r+@Ae94jX2Ih#q>0dZO5u&0T_0_@^;3?ns z9796oY6+%b(KmFH5~m)FV8WzSjw;K3vj8R~oH2LQt-xoUTmKG!s*pSUUB#lpn0kdw zgyzd{u=S7|O9}2e4*2*e@C|4S^tQ{$b+g)7^DBKq(&=4eqW4KNy?R43*hME!_vr(L zFg)4S>J;aZ+FIp(Ik{vsn1Hb)za4uHCPMWIgqT9pP3dBGm|flgiIGAhAfl_$$y$#J z6tEiR9kWdv`ud7HeUJvzQcYjJK8pc`2C3@Xh3!hGaf9g2-@@e3^X)PONU6;XUBxzW zJN5QB9b#rCk3d zmmW^b(4QnNnRpXJJR1P}4bo`bZ3-}b;z)wt8XMP+0u9cx*}R8`Ri)_eEU#EzTD}|( zEh6fW4&k!pVEY{LdLr+z(i`u{^^YRtMfc+Rt3+0V!-ek8yzM^#fsa&1DFRSjIPcE3uVtQls&&t z_WZ(pQXDKS<&VE`Mswi|!-f%ks?})JWA(6;h}8)$hkF>F!%}FlR_75;K!aU^uYz6r zAI1@uOMZEBj$5yA!(bqcUFtMzc6@%=0gLnHIT$gNWGoTbBw8xp5R_biDox6^rlV)6 z@lTC!8okrk6zAJ%QQDq5^Z{Za<64j=<-M8JnbP?l(JZ8ue203PW0Q4AgLSa;J=&bR z)mc`U9?*HQKJ8b&s~wIh1Af>iy1#-G-wTbxM z-5tg%j|7QW7;p^oX_=cdOvrBqa%_00IFJv612!J5*lu8j51xm(Jh;hd;fBB{6sc^> zt_0LZ|FVQQ1y}G4aO;f-tY*F)rfiG9XlO9JUkRh)cg{cD*K9pA)3*(w4>tOXF73l* zf>mdU4Gibe+6l@YwK4#8a5Sz&x}>kbdBi;i;gIlUlyVsRA^5_}k|y?DLx+&7LtQ~v zBPEI+C>5ITi*fYsVtIO_9l?rSUAV#IFDE+0f-rB`FoG%39KY~qWC}Lpcnn5oN(-6t zX%?BXU0K)|;21)t0BZZOnQ}&drtAPyJ~A_91~?sN3a*hNQ(9t}(sE3u@JlRH7(fP0 z*(I2g9>bJB!;qjZY>Z{f-8hIP`Lg@Vy$lbuI0b%77YeiY?vA~c8$vdr9^xtJS_k|V zz_~Vv^I1#c-M2GT`Ud^H*5a`SNMaUbZFk~0{Ke0U+a~ zKUGRlVC;OhX|HR&sJ)ExesH@BTi~{L+-U~<`a<7PhvN|*F9^l&ZS&Qv!`emx4+V~e ze1C9|c)svZ<+^6qTDgf7_)qoYI}hEnuIUH{wsjb5m7U|aDZ85v;}WKc?*#6+{r1}r zea3+F@e>inMTu)vc8_o3?t7mVCXKlrokh@VfC^{nj5L zgKJ$0pqD=`hX$iRd5r#~&yIS3`ga&C47rKKsUI^L+9V(lYnV^DiIeabv1X5;e&$%S z7^S&0r1_A(hLC=1qqu5i4s>LHX*=&_Y)9xyj`LX2VVo~S6gxXYU?P?sv?!$@6&q+u z0fJ;^CW91-K;wR*qAoM8zjxPfApz;xHZ5Th&H=ThkF~_Rr9@##iH$sMcWmNwksBGS1j7DShihc^N0eZ zvng4$27<(rtgtk_Y)o%LjK<{So0K^|v{8Qw3k7rKuZ=1>N@$oNn8@!E0jYx(MMuS_*b6_y zbO@m#e6Gk(p&>R^)OY})A?R8{tl<;d#5YwCE+yvs*Fa+UZjup#uB}QiL zCo!V|8YM9#SCqPzrAA^8>wP>|P%EVcw@6~Zu}j9!c@n|>^m|(6%2Tgqvfw5fJ&LJa zMx(PGzmM5mw1D;mou(JOX${wp3Kpab@hG5G!W%5e zoFB=epQO`%gt-{_MJ3Q~i8y#7=)g$lx4s=7n|)fU zx7up)6w%kmTb*cepSfl=ge8A1|Eg&Z<8OAnn%00{#lA9>vBoRD@~@h$P#n^9KB%*TgMbdQ79ey6@;J01OZZ3`dyw z+`JusKqM=ro%S@OXvZqxj1A3Jp01SQ?z@;EEPADXiX6DDrFs;DXzn1=116+fe+nn> z{891RvqU`7;9e3Y5bx4a2~gY&o|yPpLfG<5-ExT?lQi`PD}IC{!c#>k5BGd}LZ+Ol zIx$0!OUz}G7^^lsikJuUQCzrXOs9e1$88+h#&v?ntLDc~!H1#`kv02qwFzHLdkAse z!;di1@9d1`LU5%4SR-8NzKVpzHlPtxU9aK=%u->K7Kkw-w&rDwtto=&iIxJtWQf=tER4bYh^@CHOEhaJhi9fN%ohfwnm;_%>5*YEUq^<4%$H{ar-dQN@cD zb%wULnKQ8R(F%-@eYMN%%Ll)ShrYM?W@>EZ@Wl5gb}JqY$CL&&IqEip%Frk?fN)(F ze!|*5#Dc+g9Gx*AW^HhG2|q%Spx5Gp)xA>9hr6rwW9)MKi&k>BkN1>2tL?SZ5dn3P z?SZ1mH^tTFtF~LJCu$eLN!wJY>SBS=Im>emqJLak#?Rg6Y(}u2IWz;!@*4jgD^EB^nT=QnZI;o-v=G0ZXY(or@Kc zvNboc2rrHwPC=#Dtm8nOvgUb?$~-^Wt=GIu`N%uadn>P%ogr2spKp5{*#2Oj1;y3ZJu-hkp4c$gVhn=%BM;SM18Te0&3 z*PxZ%9O|AVoO%4rht-TAxXp0V3ja-A&4pHU)NUwdy0TQXvR%w!IJyA)YuQQ;fk_qw z@+sa2a{K0XgwD{akV+s~7Q&RavnC(q0(Pp4HFwm#fvI2HzZrinB``k!`2lP;^Y$%M z;|ONw7<=N0+FZ;mG_ktRU&Gl?&V{<`d>Us*Txb_e)Jg zDb-11Ab?u$+qA_{rXBvBj?09S09h5ZojbI{s4u=PHqMl_# zY})o(R3#n>A|!F5Fe95bqs7uTn8?WjFj$yz!r+tkC+q}kli=Vg78I$%mz~r{zB>?W$=5*Mk)!=9yO_s^dVeyrI+y|oP>1m1${K^;%KN|CRZRI!zB37*Epg&KQF#&5RR;l=xjov zc?piXwfGf>)G@yK-4At{2f@e)SkDdYsEZ)H-?4T#bIL*ABiiLd8*piX$aFG64y(HpU)U zr8X`@HyXp$q3No4oMEA;vztvv57du)$TKWy9OTwg?^nmLP6KC4?U#)s=vpo&z=8X{ z=zoiyD4|(W{cXIX{yUV}FvD;U3HmEp7fj62pS)A2iis>yYdafLUL;1k@;M& z2zSqD~g0u?4Z7p(&6=xDc@RVP|^tOotmfPuDb(eTC;jd;|G&TBRa36ZXHO8 z5HJq}_@=V8Egr10Ng-F+q?xw|FEPH29EgDVC@ELe6q;NY+cKpwqD^jlBue$jO`8L7 z$HOiPojo_PoNo_Zfww?9a&68tW&I_y>hlWPcJC5MQUO{5ZXM9y;K5cJ8C7U7nSzje z+V|kc9oGG@MuG}Uw)>~Uu*wM0V%+ADGEBfPECjMHE3RZAh@rtkZ{5syp%UKmxbQ~I+u8J1@3V~T~R_#;bW z^m60gKmEQ`g!}JNukXco+}FWMsf8kz`VBXujSHcqg|B79a)!%4o|c0n_q+7X_7@1t zj#?nHbijSuyEJ5Rr$SINQFBJz;09nP&#J*GEoT(YO)mn&;RL+^4P*kl4`8A1BZ0!r zd^a)S1`|XX6RtKv5HUr%_a1y1P7Yw4*~O zHf- zp)-&zj3Wn!=;Oj~XUZp3bs4MrjH#;Ms2u+heF@hM;8!%~R&iyzud6z27vRMYwBWsr zRjN|irg+-@IJ$*k%V=aovNVS~5-Ksg4x6D@h>eL>$EMS~M^1Au#Gk5R-Xo*rl`Ne< zAq$SAGabw#Lx5238cx`}&P3uNFIs#~;%hh}7Ibao+=rbhU*}|@ON(9SmpSBqe<_s7 z`HoH7Af!ALfa-|!Su2p9Pu!-&DNM}n4}1>OM{?l+wH=C*!0=}b2(gQ0(MMx_B39{6RUIjmf9H>;m@})d#mVzSf#<8vaAhCuJs4}IPE5W#34XO-G2hdTXFcqO?^7t?!(1j{+qh} zCA4e7ED4<3v*C2yqFPsySGYlf2b@8P@|Bi=W)r^6+nv*_p0h~ic;F(LpTG_!z1snI zIn=EXE<rz=y1mc3c`Cx%vXPh=E{o zPy~iT#hlgdr6T{&O@2U25lc;T#oLJUA)AV|w&1aE0o4vK~XD>PQy!OGTZ+m@*ofGUxiv?8xcu-^<$aG{Y2RG zzS715hVCQ!HwQ(fqQhCy4r4kN8H>@(rbPl8bw$@RM636ojmqyal4AHD=2&$)bVE4> zv||uZ%Qhl#CJQ;NJpo;_b2vV$l^ZEX5Ai*Y@0edmI@~Hyqh>I%^9#tQvhaC$Lnsw5 ztGG?2Y`uEDeY#S)PKiEs++Sp#(M3irTZeJakQx{V9*dEh)dNUP3F0xyV+ztjUHP)k zR}RRe?j0~ztw0$(tIan(V`iyYwY$IAL;X!oG21xQhiIt5qbQ1-_u^^5R9 zdECvv;huOpdg9N-hyIXK%Ox@UyxU z95{|MvywHFT~;SP5GH<$AbzrtaduoO`-inJA%qRD2z~sq3Nm+2r+}d%o%)_X?nc04#uE`2Mlj;U)N+m zhl+O9mEPd`Q;f5(t6NluO3XewV#%myccFYZDo{M{fq^GtLemFcp@+7LdsB97CIW=_ zf_X;y5H4rrEe=uhNw@9?uqoEy3gR49y|{4+Un*MQ0l|#ECD^EY=+}@ZUbzI9gNjBq zZ}l{#qS1TRg^pFL@WHVu8S3AJCiH!ru3@*v{DcnBIS1u#gZ7JJIJ=ka&?+E5D5;az zzafZ@0gp)%HF+KIYP#~Re!7O6DNq(Ta@|SEb_F z{-Bm^QE}%VM>e$Vt%8c&nt-Ej59(7AYK|_oP%o8d^>UGI8uD zHH)*awsK^cYbyZ2*iVLjC65Q`qXV(AdP%5+(68DMbHF)wtYWgk&ttA) zhT-G?wpC0Cxc~on71Mq<8~mTJirFy(i2AQ$el3&DtC;lfqn43XOi;WIyo$LR)cxbD z7~9tWgR2;88Ci3ZtC%lm0$8qMHe&Sn*Q{c0keFjvF|T5y^?%PQ=0B%{Q>U^wQoh{6@lUl{(qZ0q% zD&|tpK&zOe$^X+=F-u|nh}FlAw~E2SUT(0^=ep9aFS5GDCDsXfiSAqT60r$kbUCVK8wfDBK_r2 zzTC?A#wKh}8`wH%W!9Jf*Gg>Ti0#SkX>c9F0y7f0rZ99p;s~6rJ)QwscEfBoJ5`+?KD@;W+=ID2bPe(zg1QNNjfiri zQ+Wt;Qs|<9Z5v3i+(SJhFoF3dneu%CKZnkVU{vI|vQWh{!U0|NMWfaWNbQv~L={D=tdM-nBp?5X zkB&{n7qGk~mxi^s+Dwx6C2rnXoucq7LK398=*+k4&yE;mpX*HMTxeJvYEf~XgPg3WSbA-?= z;8NfQ;=KibjMP~M-Yl)egmlp~;K;9f#4Gtv7TpgQX%K%8e% zppF0!n*f#rAWWw8u2*ptm2gdX0mi=2bi|&W^#(9lv_pUmJVp#pnlR*%=i-)^ z8@Xu&@)Db_z0*Z>A!(YSZe6! zhtaJ99X>v1Sl(Gx_sE@q04U>L3yp9v1zvkL+Tpsu^CWsbiDo+OWB9f=6W=ZmY~VM+ z64SRPemi~Od@taePD8|~B`sPa;F!bPIm~Ke$~2-M_=VSR0X!{<#1& zxMknBVBiT%-VO@PgGDDw&^|v6pt=cf2nGN#Fmv>hS^{EHi(P_s=(Sk2q_7;+4xhO> zWBBK4skj|-L%-ELxQAn|yi_Nd}llJ?$(2(Jff}6h~hL!$9i> zG-e=|u;wng1+dy?fFYiWQPKerfY9|e_|p~;-Yl;V6Fvt3CWi#HW5gdFCo^z6k!-}O zo1+@=T4fCRpj;;SkR~d}`I60otvLt~LZ*vm8JZv6ENcjhv#jQ}xe{JjY#Wo|Ez&S| z77oxb3GiCd-b({Zz>cKO9-}W{vUAz;5F7gjh=J?~Pomy|qF84A@Jx&c(*YE?hMz>2 z&>P*&PZRj*+Spvz^HUl>&EqFCH?QQUBNlwRfuGD{@VWf-M}E4QpUmxRbl$GO+=DYQ6H#dLF}o@4q=f#tENRx!Oe;ERR7kLec$ ze!z6|FgcIuqXIu-y1DvSAw9AQlA-Ow>2p00DK8i>uBs8i9RqhVS9ME5gvku?~{6UFXsY(VFyPKwNT{n*}>9M{~S2A&cU4!$P9=mJMiT%UaRqCnj8gyWfPutH8@qu;?6yP`S z8g#J#xml>$_o*|N*^jYnQ0(N#+G+I0for}x0v zlioE5Tn=ElYp{Htv1`z-`#zcE>>u)d%95C4cMWPTfnb!hs|)`}_&&w5HP-j3>QZp( z6m|`6x(x8M+I8Qj2rK_NzE1@cb>2mG4c^4KCU*_cV}yjA;G? zxId}a_QIQKGqHu8pb)zk3+E^=8aT~pSqU^jZ=)X+gKE=5s$zT4wS{@59~3oRxP1yg zs4dbDYK!oL^5cW_gId6GAZiEU(~D7b^bP{!-=L(p zhp71w6Z5i$m;KlfD!AZ4ZaD%QZS_95--2WExV7tcwLnv^6;8ESX4wEC4RvF|LX%-j zH?66K`seQqg{T$olWQJ5?R;3Bj8GT`Tn4PL&4v5p!iy(gSH$KqAX;eVEx`Si{~*1!8UO19Bmy7(iC(vIsAGga?;K z82F;y330*o^|(SKklKueZ5IBJO@g~}(aGqEqIK5L7$u5XE6h@9G)q-(TipkPTj+># zP+rZgJsr>Z&u;jQBRFfXT829vdJrSI_4Oe(Wq!A^s7tBVlsotNOZO?bH`c${qGIPp zMQhHUJFh}HM?Jgp=9_NZwpzrS5_?Mr6i<&*(~G^OzQkKlBnC)db&=JRsHNQ??rj*M zb;GWRG6(sl5+H8*+2E~>wWqH1{LSK&+7P^I8~)JK*BQi<`hZ>Aj9ic(S2yl1rw@BD zd+IH)1Us7@KiTU1*72jpL9OfK+^M;j-3Fu&Bx@yDuZI$~Gx4L2VcPUVJI~(lJo-SQ zHvhvO-awU1Lj!*apMGA`p@)AtDk9k3cU?RSm$+#6{2+6?qU@&n9@Cyuy zt;Ulzi;3DVi*yNMfD3IZ>baKO^OyH2?jS-33M?5=%l~1^6Qn;N#odcz$k8 z=2Sfx(wcGMr!3Gr&0)>Ow=|vWkA7`O%FS+#*E}bfIkZP2B-Yx5bmZwgtZ- z+Zw*&l4B)}4@S{Oejde(&Cdg+%+Fus-(}?IgUGLMfa<3n={&5CVPV)oy+rv)z0`Ll z0`B8Xlj=~)G(O*YbDCn2G%V&^0uG$)PUl0337}*FJpTnKdhl3j8GM6uX zhQ#&Uv**MXCJx%_IXiR)f;T9Y`}Vpz_PVs) zZ!=v4z4Rn4vEn6;`}W*b6xD%n8j757GRMc1S3p#%qkcI0VxHBpY7Z(ZiE99H>c|y{ zH_&HMlg{IhbE^jmf;G3;>Ztn!fUj6OcjMV8icJ4RL(1@FAQ|hQLG*7NnuA%xt~%8MoM-OFdFHc}qsoVfuX$Lt zz9$4zvA(CwdC%&s?B=y;f2Qo;bhA;Klz!u_ellMlymDsaU=8G`MI^lY ziGojuV@J=xLE1N{DJeY+KiV|$@c0&`=}kr+Ray>x$*UbJw&OHm(~)?k1rT~z(eX`6 z%daMkYigJ=<|E~Ogm_4p9{N3^K_yLZE*kUEh5k86u587vQ$#IJ$%Y+bKrI)zj5}*G zF|r~P1R-dZH-EQd#|{+#m!>ZgL=;mN#~7z$J~s;c6h(ZFh41kKCf_KEn4rf4l*VGL z0I1F*1aifex2O-)e^7n8uV#y-HqqB(S?oY~V%4+d(8s6EO`JBAM1&Le0P@45B`cbzxU6ir8XnHg4hEdgz0uBWIm0 zjQd3YIMB!Jp4+qyGA~IM&C~HtSm7}WLCk?kh)0hP$~Mg#QL($TR6roj+yqz6UJgmNXS&7N>2*Uf5swOGT>D#S`D=;`pfxd zXBtT(8;;9(ne~nn0oY+_Fj`P5sJb?Zg{%wS4dRH?2tGAY+2i}n;n?(} zb*OVgd0$h=dUgHVwSV!ux;Jk$u|X$e5=t>^-}L;!UGTj8c?+O7H=43gh^@4LoE~W5 zH#0hZ(~K&KewxD)a3tD%Cf~IWMo)`(P^;&hKx-^|p3(=Fp94$hgIF_C%fvlIHTx{p z=TQ1BDKG58uU!KQUE$O|xenbJf!RVizQ#D;2XZ|#0Nf@W&ez=M`=~EKREPd@*Czti z`*FMP`Xf{PsiS$7aOFN;1Tg4b&%D@DB}GQr-z83?QE^K-ybtV#1vhf zsc7s#$1$pN1d*RQ-^X|tTb=xAj>u%8_ub2NGR^HY5Ztin>JWt0;qQReG2@7?&i3+t z)#06afzOUnoorSoet_y|5XIQmxr4}K#BLzCt8_TMbqK=h@He(Pb0}&xI zJO_CS>^nwv7GP&8bh(Zrx>fIBzP}tJAFcqvco4qTO6XbPHETd)E=vmrQ@vex7We7P zV!5gf*zj@l3=_n!Vj<=b;%*bf4*{Xuzp!*~(}N!c6WjGC&New^dE*?bE>1KS7u%6P znD{&(IN=5p*M)Pf$CF@V;>+Q*4R{iglDILP7T^;*L*kZjS|gq?ztDUnpK61NE#b5s z;k4Fp+OBXK>6Up(H=b%cpTO!+63Lz&OQa+`nn+1_G?9|yac?s>mhLZykDbu2fl!QlfQW72}lBS9Oe~FZYM-wRtH;BYe)k_?1 zx0r_8%mQ6^%a2kv|u;EV9b7~x;vkM#l+;qAD`6F1lqKSFPb zJ9>mM2-_LjC+gdKF`$crqpDn?qI6zod^M65qSy{ zHs_mCKW1tvQ>#s>zh$bIsoPDdzhvqTrke3S#Z=q7NG-)5qq;t(mNRvkDfJ$v)-m;E zQ|dgXZe*&tv;wB~Fx527CRL&E0yrqrJ^^%ka@OM959iNQNYzK7IO{4pvxiK*pGU1mx>lc{w~Z8W9YnA*ZrGmE}Pz{)@`Q_Xy6M{0O2EtVTu z#!8U8fe2?aA$O6r_H-CKy^}LNBb27%-21JygO%>=cyC@@rn|e@^|_4s_XfKWETae; z253eLtLPx?T!hs^02k#@_7vRpH92QO9>WB&y=E=!O5uH&&L{@#ZjXIqmyUpbOJN@?}xjr=}$qVp1_GkvRjFx)DXtxcZ| z4i#r#>CMZ%M|{mKi~gD#8W*_u_h_jZ_+v=G-dyfH3sbhPGcL}A+rs?P1N_Y4hmP0mSv&hTR z>VU%cZM^4P$7{*A=O)fU6+Ne^eiot(B{izR+_?<9@4j!7JQ>vIlTZMDt#io`Ao)FR zvBu8ra3UHb5iKC1;o99;e#jceb&eJ&hIqyi1#O5#ag&bXVS&P9Z%)j^h#lA2g=M4f zTZiXj0y}izyL8~2CGg1RLzpZoBaG+*92ueES2E%@0e3#( zenSBr;do>}gqW>qkln2#e^elM)bGUiSFe)bBOQ-)fd-sd8i5|Cy^1AngR2d%Bl)^c zyzZ8ush+zqq(OG$TOo4EuioDI3UbOMt4vzd`CK?DNhaOf`EWSN#w6>jp3pLxYp{I3 zCv>-bxAXm$SMLlhkR_&hW`mMcQgXVWWDlzaU0yJF7@#?_;p=Og1lz2ymW9qXgA6A~ zMH@{kk4cdDS0C^my~^VXq~cT56y`=)S$*_VJczm0iVjC}vUVdr1kNFN7XF|(k=l(^ z9EN*2Yp5;nLWFnEAwa1KpvMGom1inqx}&95V2(n_f5x#z3}xOaP|kej3ARz>6IX$Z z!z|S~eGr>R6g0WbQJ06;fR~xpn+j8rN%G9@cw`G#J75&#T`+0`0Wo?!`fGB@QU46S z`^y6U5_{0K0b_+l{h1irDmVHOG>+YpW=@#WI^Z}VCWKQ>u;WN|;LqvmXPYAn^doul%ZDz69LWW>i_ihvn zsk@Jh8k1zbrGLLgeD{nGaItjg1=jyAKdZ@i7+}mS>AWBY$yOlIWiQ>p!|YOV~5lNoOjXW=bn3rBRg;rUv2I1l4fkCaZQrby+mirO`^Nr~(R0 zX$sZPR9jPrwi>qwo|HDDuCBWuc2fPz$k&}z0Zpg6CXMRflbpO;Q5^@Wx18mq`stpp z&U4fi&@`&?fbkE|N!b#We4i4%UP<((Xw`aKqKg3Nsyd!VsxAXZm(jG5>Od3y5UYlX zN)6=RzWZ9O25^i*K0WWFU=HNwC)7Yj?Oo9+y_*7SIQQvM8O4=rqg89{QEYYi0NDFE zkP(Kq`XCp2SbwQuiibOV4|9nYFg|0moQwJ!#VP6ILTX+^QPs23&FE z)X*S(imx=Q*FH=WAUzed&~8_3M1o%b(CFwCAIGviv-*HcRk2#g+1c2p7)@7-a(*Hk z*e|T^Z)K}a$%Y~BifvD1>ss1iE8CeV**KJAkwiAT9j80mffl%8bAe)vKx)bk=JE5; zc_-7>E!VOjh{AJ^%kaR8Xw!vUFbqkQlDljn`C!Y=ZB~YrD#H(rg)B!l)xd(r&lO3k zcS_RAXjQ#E-)+QJ({e1M>_Iy+utqR-apTY9!L8ctP66KF#`AnC}#fBux&+*;2))Fl&j-*ppTXm@aixRDe zk*+H1!&-bwuhJ~(5-{^t5X^{iE2Q9kLf1#9^m5J-Tzyck{6dRMQs!~TSf-t)I4#fb zSU&Q2Q}VcCw;+$PiT$xxVaN*Oe{f)_D4{9)R1@seYR`VFDbGEon(_qT(daE0Y0)V; zO?7keg{`(Yx$Z^+e$7-{GjKj}aTg4=5S@2kRd;iw;Ft8JDpyStKK`;jM@Tdv8^SSD6yzGq~g z=tHaC&w0}^k{+d-$_2xgYY;fN;h%FCGqtO}U{^^zj?>BWIu*_6U`hI9YiXoYkK z4>}HaG4q;q52=2Z^8t_ux1ce87{H z3v%VvJH{Hh+N^bF~{Efj4i0hZ-KjR9+BpR5;Gl?weEKHD?(M*zl!}9=HIjEj`pCm&?J) zzcJT&+85gKXiY0Jhu%zt>w(5^161bnR=xTFpcU?$O4@@vJh* zdf;V)-1tyDYmnz380;I*MVT{-6h-?CpB0=;PtC}wNtgrJqQGj;bxh>IIeKZS*}D-F7=6wn_=Dy0$K&$R<*{H z6U}}PLt$Q)hACnJPXvgCX**O(|BnUdMz$yYUi2!nv^+QDK`^8K#!j-O)xnmkv&j~5 zX8@fUxtGD)L>c*N;G}l0AUxE7 z;P+#9A|?m-ih^&-fss#ug%qPTf!s#tA;a}4Rx97 z(rBL%E9XUZ-dy+UvYxto<2X)7IZavo8^wREAFYI1ZysvEU8d!1I2P6Q!z2whsp}nR zoB94e^s0DQNlb{r2dw(?-i{+?33psCp$G6h)=;B^tvulnjR)TbgP|%m10&60s=)BP z2JBpXKni3A`!TT1TUoB-%}qjhca5U*JSt)2Gh2Zp+c;($E7|yLk7NMyt?wZDIlycm zB2j~rgBrM8)f(|)AePPwJKwJf8#=?`yF&fAYJ-ftt!kSOg>r@ zt>9mwp7bn5{4co4*`ZD*fhR^isW>I-gE#To(g_Sc7+l&VS`kB)NJ@BVdq-d2J?lV7 zfN(Tlh3o>;C$)=4{`qti0112&`qnIEO@Eev>of9ryUUXJEyNf|j4Kqzoc0sS+uFvU zb~o-#Z{|c)P_M{CJUJWh22y$j$+(r&j6WqugFPn4c-zQYaqL$2D`XI0c|{GY2Eh>! zH(FW30esl>-g^V2?lcair#CVEI^*N?^v9V#+4v+q{Q;(rHa<;HU(WRYMtget%}BQf zY>J*iz4N#%T%D+Q?(4n1cpQ7M;l-B}t#bxw#KJ%{dZvTCEcO=D^D@`Mui2{NV)E?= z=4X4+Z;X+JzAI+ZCFVPhqyi?5GMnwBpi)ZbGr6DnL|XD(Bqvp#y2D1rU1qJ9vEId; zIYa%j*1)0MNMmN?qZ2yTg2VJHyrsQ-_cxSY?(sc9BL?n`;HF9FllV;BH@N~gXruW( zN@sc&_9@Q9x-UAZAUF098jS@Ayspp16keQBR?>dQK+HlKRTba~AK7*C?_eDl<4x+i2NtGN^Ci zyIVa)$4etfv#1aQEi%_D>a$6mLpWkzhT$X}@M6g{40lA!yrmgfpA@mrr{cpF<)=@x zL<)uGV+m%=AjTXA#+R>Q@U&wZvwQ!A*O9PdKZf3o#0@%d8;QFIxXG7_e+g`3DG^sX z5Z4j$w?v#to3lvO&BRz0Cbp~e6{bR)y8IK-0H}95i^c= z)H|E>jdc2_60L7amEUFCb`f!}gWe~v0?~XirOMlgxu2K^9GE+a`Mkm`KDFF#-#tV= zL}X|CensS83UZ=-)xb1|v3(S3U)?a#RMtanvW--$91Vw~dAP-8NrVk)0zW7wTphY3 z5$h7*AygQq1HHMT;L0fY&f=du<@jdAk;8xOd>|PYiRpHnMdX)l+YP zAL10CY~Z(zv+=QE8o$lqw;B947axsTv+!xJNs|Zv*g4WX*aHN7&kP|>wD5<~!gVfw z3pLY{MUoQ45UbBlwW%cQaMmQ~o-(|INpzb7;>yl&gsoB=_$o+U;3FzE0jqz{jLyBa zHKU?A)Jf)Su*P0$A`PZGmpLgl4c+N7$E2oFg3ZFzG}>uRuOrQ>HZ|=RXtce;Q7=@P z7c}B6+BN8pXScCa91G?%TG`0xLnKsPz8+qJFmGo@mdtQR`p}-UyFB|nZwRG{FC#6cU zTk*^64}cPtNp))|H{oykik!5W*HKP(*X>+3csqxg-rHK2@9XFUZpmvjO17KdXN3;2 zUFkz$0oD%YKp|rG29_7PO`c$vEa+0-VOW+fYr&@;d&FEM2$8 z6`X56&y3wN^El^ZXu$|<(B=a~D+1{*Jl_vAa}mJ$taWQ_PH`b=X5l0J91H6k^q!Q` z<11F|Sql!>R}E#&IL9m@_0vgxTw3k#1a<3dm|B*zhG<39>(dUj0vGU4>`F4E@fgaD zGXYxWZ>-t7__5vJ9qGXYzW^|aiW)_pIuiJ^MWB`#>quZ)cLd(XYQS7(5y+(;27yT= zaH~b2f&}J}z?|*~JO~2On&xQ8h*oc=!uMNEEFdv7u|hSGpy5p7x*l`EsATdOCI^v> zsidF9koZot-->+;hk{P?Z6=^@+gRb3@nie^?y8eR@LvEXL!=7G6C{BLEdqBCVe(zBEYt=(C?GLY>U8H61bcMR(40Ao&-i&1f<0v@a0h?4zLJ(L5v&{SlbwD_2v+mv)gf#}?>gokr}AFp$h(l){?1AbXWpgEyCp5}kC1nR z^h{&s`DAnGH1q4{fW3{_MjH0_fgK-gHU~R9A3S;z&HOu1?Phve+#D3=u+2j$$+5)= zS>*CC8Np3_&vZon%cK71L{se3S`R;}wd0^Ab8`FxTbs!m9uZ{3j%oc+77N6zko68N zn;E!Ls^zFn0DnfOx~-pBVJf5N1_LW&l_8M3kw36@+jt{Jlw=dI`j$+)#fB0!@nge$ zJ2^p|aHb-3MoPR2v+8T`;^uFXD?rX>S%0Sg)U82WcE^uL`C}G;)V@kHI#|8^1o>^* zf*v^~k=xpDm`}iM06E1C>yi*-To2Leuboczz)))4h@nFmi2lZW=M;AwSVFS<~j;JXaZ+i3N0eAumi zyf6GJzFrI$GeXK7kY59m*oi5A%ak`tnYeLa!DpEU@|HfFX{zCzj9?phy3>o}2dz;L z9NN_}3{U-@w~N=-v94!4wTt*Jxxp*!M`L(+SVIKJs=ZwH?vziD zH}j(9V&8O-Va%j2igOx0-gC5e$7L|7o8PJ%9^nq7=1sf8*dVjHm1Ljp=%ri8NxG<-2zA|qZ zq%NGpskuIP5NEyau=Wqh-JDUoSbyt6G!H!W>v4*LmxpO4OTFQZ^}rYqjNXA4 zs1<_NkTin1-;Pf2EZGO!*uIfpOhhaKv5oD5F)e$l1ldEx7i%~1lPI_4$KNJB(qsvf}_RO)Rp|*u*O6=*<8guys z?U){F$I}v_HkhKn-&sGYZ)XMKngoYWjDJJ~#7Z%FJ`7<@Vq9KwESPy|{A0&!2&jy0 zmZU*V&Q?pyz03L=L3YM!M`zsH2c1!_^eZhcxZ!^#&5c9YAc!OdPdWu0z^k=r#jW6h z+OIlA=r9`Fy$G>*^hvq5Otf@L2dew?Fs#C+5BXxKl>7b+5%^XCgJ?W>FW3r(wvOy5 zgNk5?p834FP;Khdz4|f_UftGf+M~0^;|M>q$JCOBg~M>*xBOzhN8JN_b$0?>Kk1^* zi6vEL@T~H93`#{0m?eP&%Ln41HU;NWJ|~@d8E{0bd!v;M-_-;1tJkz?%evSPx{>8< z%JSvjOSQ`pAx7l6Z&IE`dU7er65;`tnJ)1OAiaAaIe1Z|xPMY=VJ;roLhJ6Xv^?(S zsnIJtOBx{04I^JlW&k%J&#m>>=~Sx&Ycy}0ZOo>eCmgI?X1 zS;07EIG%x!kXxur@zvgBF0j~U8B`N2M->0tz>pXZydh7~S^Ya@$~l0-Gq3bshNJvT zy?Q3Ppfqss_OaUEOGA5?SA!EZ2eq13oOClJ-G1#QoO;*nmv-wlt@WM(80C9|=TD6P zOM8tuiV-=I#qmx}n|=z4P+9g`Sz3_AV%A5PM;vP1ahNM1HJ0KO30Jo*szdbs43q{Bgu9exm3>vnUZ`Qd+7o6dNAW(=tKk=uiF15B zOvUqGbw1{KM^^pt#_x!jdE1*E+R(*WVpi72c-9`#W;h?q)xShQ8*VrkV!sqyF4P*x zA{kCd{~_|mZbo`yj3IF{6A|11MW-N-X8J`6ITw?R#CCZR3o%ZDMJyL#Ym_PYntLz; zch&7&Jj`gJ_TJC>0!xZP5g&uuvCkz7+EWH6d62~`_i&F#c#o-0)Ez|SsW9_)(|k84 zC~5xYrofg&^VKU1+|;4CMWBJ$QgEv&Q$}Q@eT}sEPo+Y5OI`?x&qaApAdC zV0}|y6I>G%U)6IB7U5yt5MD>Z{f$Fx_X!8Rr=U|KZQ z8rYly@BmcgLgJJoda)#Qzhw8;=!I6eEAR-b6=Le9R_$7+2 zopv$P5L-V5aU>J_8^a;%+b2=rts%U)2ODigcoBVy+bz(i+i)W-zrN}z-!qj3^_5TJ z(KWqlvtGFcotp60_`yHL$Yig%HfvQ|^qMV*89d74&+^@K3oPVnge^dUJT9cxtlGwD zWGxzl6W^yKNd?$`1$~PPF)`sCpp-`C8X(0cW1J_LqcTrq<|zewL0W5+ z$E58Kx8hAsCm8-5Kh1CB2W1n}h{fVJAlC_oD#9i<(l*x>i&vqjv|8;3QZ&#F*B`^C zSY$zQo!uX+$1pagQLt}u2=@9+iOs=5YUzS?s(16K4pFJx(ZVXr+fS)a470B|Lnf61 zuD^+)w-7sNHBKzMfO)hW``{CBZZm(0osxMMmc`~RIG;CrU4xHj#`08>xCRe^M5h>K z__iJY69<}3M=J&&6l*0a@#SwNSh*E0FqDWzm@+HRgp(^)i6w6Z`{-^QR`=yO^pzgX ztu&adJXL_ME)lsze_)(b(9m;Vhf||zp*QUCoEF9rV8~1lsvaIYs^=MpAi1f64NM-{ zixQb{g-;&95Skcc7$3WK9UG=$h_*ba1-5Ec+w{PCy=qf&VC&$jZ7O_G-K)!cBPJW7 zvGrK!dCHC0(^ZF_a$z$*z`YM0mbetLmfeh{=kn$B9uH-eyd%>&=I3H$2z0Ehy5Mmn;6cXRT`D!Dbi(hi3# z#jy@xD|QzTtI%52esFgro~^aky<=UZ<+*hCo)dfij4|Ls0WLWCMRDgDx0tZkuRIjl zB}y@ks8>!wM!uQ}n@80a?WN)YT8q2AB(P;+S=~F!Zbw`_l2SGUiAIfQN3>A0ej)br z#rP^~$!6a(`B+M~)aPeUEUn%jEbR>JkH3q6r66&xWlPd4_Dn=KA*zIgH^=HvtV7=4lF3W+?n8CILaIxf|yWT!TS zorBn_h>jiEGvBsaU^i>Dl77K~=QQ9 zc^e4T7oE_36SZFY)rH#3LfBavGZz*{^ZUYwbBI3ae~Pq8zbcx386@<}c<&~fUR+HT zh5RGrw2Go+bqW&6sBB|dzCw|T=d$9BS<*mNVOLJyT-6jhQzX9^3`~A6ye9d5#G>T) zQCpMW$NU4|ZN4)`TCkVuel8dCxIkCdTyR`Y#((hhM0C9INgsGYRCx! zEaN7oYB6t&yPC533Gby$N>dMrik6*XWU=FgTL$6AtPV69SG9-p56r2fV3x$yi$3su zz4ge+&PGW9e1Qe8M|S|84frdM;c9)B=OW4PRex40YPtLcYI_tlVt;_eQe)Oy1z&Gb z+l;?fX$MTgnSj!^S#T>qYx7AZ;YD7X*^7U8`=U^SV5j73(( zZb`yD@S1DPVglehQz;4?U_?QQC<1Ul0vhAb9t*7uKdoZc|Ah5p0vm250iSFjfC9)8S7>(um$UxUX@!z7Yj1>?uWz@orjtxFed;L zcZPknbU!wVppdqYa%iPI__s%Dwz)z-)iM2HHq)yNR0@k>E)UId$PMCp^$xw4291lW z0hI@&5ZK_h0wqz->sYLnl?Jw8%^0cKlHvOuTnBx%h#UuZ=JY~;`wa`-Dur(ATIdTP zl`OPH3dP-V*w~A>fO8Z&x7$J)n8GMaFZ4_l$|Y!*HqKyisxd4TYhX*mUue|>eRLk@ zvTHnA^CiX&Tr&hg3aK@xDXd7`Fw2qQDVZ>=6t1zceORr`47-p3g z*bL!#a%X>Ib~=16;3-;1)SJJHq%riS&ifQRe!v!`I&b9RT_1YfyQ4E<`)$F5hLZ+~ z6V9Uxve?1ao>p@(?;R90ORiuZbfSHLaZ}QS)-)l42@U|XjIK2s)1_u6P0#SH!wQUs zCfJHcB8Z8{{gQsW7ZdJoO~yjAKGmyT=GEaCH`S|OhEI=nyGOqW7gTbz@f2{_LKz^& z>Z`BVS9oa~7K2p40Rqx&;Rx*ee^V__O0_)NWgb>;sz<*JpI+^D@3&X$x^Jr%A4%z2 zEgZnv*Rt#>Njp~D2XT(6VG3wak@!y7%E-{f5lrHD^#6q-w_ynimxF?n;;Y?IT+y}$ zqbpfWOR;gsBb~Yl2T*z?o>*D0Lp_b>Iz6x!n>Ad$>tG{1wAXo{@$6ro;hj~R^y>9| zYUeaexA?2w53RusUSPeTxm$P}Ep!IleD#|3tRWUqXjGO|wJMpB z@>985H0m0NE;S=8E}N7R5W|6`=uV?T-Cfd-Kn^5>U2qLX$lBxx39WW&)sL}h<6$4r zFhYQ4kB~|hlTeB~fi|)cfn|Jk>%lfXuv!|F8CazSR!Z(xJ+v0ba+XRBt>k;%4g$-Q z<+SKEYqc6%57w-NpSBaT3YaC0%Z8%uU0dhHfR61ZS7qCe)y`&^MC>!X*9d)t(C)bV zTSTUe-P5&4aBPbn!F;h^4LWC!Fq$QLgxX(vq~6&hUg;6Y#dr6}FQ|m1M{-DptZo)o z+bTGy6uiH!MymuZu`QATpE;l>d{`> zSry`^>y`PDOWc@>ORn(veoZI-{>F`*N`m;XhfTl3Cus!{!vpF~bG2v#>txr*QNiUH9X!*I4EZ=Q1)VD;80#RBks}Oj$fu@jD^~;%j+Sk zVLVj>qi5wqCmg~S`W={)eHJ(q>VCE--rM<;*Amp-UcOdRXm10=s$tva#oka&%+t)e z-@@T!6TJphRGi=xhp7%9x1OlxrV3C=IK%D6rhgDQZ4-n%27Ap3 z@F95tQpaiz)F#sfumaa`69nO-ZRvV>n5~_MYatkH1NrrV&+%kOe;ywcVBb;%IgM5x zG1ovv#WOLJ`=05c4hwjJOPMnFqdj^i`A4s^k5Kh+&F3y(-6g5O5 z5YknKJ}LwE(kyd0Gkn8=l7jyUW(I}N7b6@6U|-W2dkJYc&~O&;Y$5}8Huh$n1?*;q z2a$$X9LRXo{^3OJS18;v{2}fGz>P1ES0bdPnCpo@3i!q*Fkt&;_9}T`LE5lC&?h?% z0f0T`_p0ilaGDu~S1{a5#;d*F4F%hq{&^+mZ?XdRKx z&YCO()H>l$e>&J=1!Sax zRUp}_NLuqek`>=n2tK<2W|7XLWTAljF$3!J_S)8Ttn`H={%;k$ngR$!VSUwm-zr3J zKMaz%8;$GyRjqZe`fB-zi(F5X8`HV^oUJD!C*7DXlG0?2g~0ES)w0|3F7$BoUm#|< z*_&Q`AO#HYm_vXUu6d77MOCQ99!A}i=h3$f@xHXlQ#z3}PLja8_mGm0tT?Ya$R)hZ z4rSA~grgYsEDg2tav=|w971Fj`v+78a*=c$TG7TmdP2zx({>~dT=BxER=rIp$EpkK zs~^XOYUtEH2xpBosM4v!(I`~!aa1T*7M*tIaD!-$=TzJzp<$dzWC6F3kmvpi<2c5W zg^>?3dDs@})oS<1do{$b-oZn`94^CN=E$43R>SI-eY8n0&z%Z0HLOwJCGTr2dFOh9 zZ$F7U8Wx#VtJ6e&Rd*u4l_xqj*HLh}^bu}0h$9XANv}c)2fhG$GIEAC?>rm7CNHnHUZrrG`Uwm*J376BT;HV&>gorao_N>@mzw z+Pttmk_@Z28TKi;JHV2UR1H#DZ?nv*{Z7(Lm>0leONo3t z*JfZ-pwA1(ml$~*rUe|PiOFFH4=Y}L2pHK+w50IQYcUn#DJzlt?-tk}bCur|A7T`d zc*@KZkTEhJ#8cyf(1V97GK@NJ`1m=#d;TTEZ8xqn?>vb6z;j7y0jp^Z>sLS`_6d-T zMFg#MfVL6z3PGz0+Ts8`NYFNdwh^?)0a`}Tg9PnO&-GsfEhFdyg4!LqrV{jD1a%PP ztj0M6O(m%3yJ?_P2s($LK?IG#huyBD4+3-wLF3aw2M9U}Jz!i;(2b5+|OpsfV$aex*Oq!Y9^9aKfo0)pNZkb@f+5mZIcXX&|y5p)qj zuJ=$@9zN_Qdk7jvPys;=g z#C!$W5Gw@FrhOVoc=RUS(BO*2eN`aWKR7teKN#U)1_n=wJqo_~3xhrVLxMNO7}w0& zV!@Xvf)e3wpwuaT&qBqm)e+r~ZUk7O$ynPOBsHlVYDt9Ory~d7s^hK)KQ{v$pP9P3 zLGl%8x!UmCiqv2!a%LXM%>9j}WR@s-i^aeEHL&el#n!!1c-N`LPVT}OP=T?RRgm4E)$lc|QMGHe-Qn@4hcflq z-f-!_Pzhv#N2b~r=3KPNT&RONSDoOb?0e=^dqVyfR$)L4E5z&Ac*H-=WNpfh0W|pp zAXo-<=%EwV3xcvL$IEAOG=w|LK#hD(=NR<>qVY0oC)1-qvkU8bLg)O3p#d9zZC3-N$0##)lk--R+SXEQeDPcRv+P^8{ zmS@S)Ri9z7^Z*7nPjb0nLl9?idcQ^ZOe|O6LJTgfLVtAS!k_O)cW%~DQ#=?;6EBvY z(hUQE9^1nHQd_pRPw{(g^7jG$UYY#87r*1nE#w#Y<92Q$Ty-zv3IQ&BaLDB&)F7A~ zpKZ0m9yF_nUSZcDZCUs^4*!{(@6V$dO%Sp;R(%q~A_lJ_TTP8XOS-i-(72ZL+?QBt zdY}Ndwn$C8D_E>dY*i+Nf>-rDvR}bD%cO@+u)IyZuzOOkM!xMZlv&$J7@n;A3Cett zkFz7O)$w)q#8V`R%jVBi|E<}wHLt3^6vyf~Qevl^N1;0c);F^Mbi+Eq>G5n4! z$Lai;;Y+eYr-5V{*a6YAc6=U=LVZduGaSvKtYrJWzFMx={oaK+{tVw;^i_%X^!E&w z#TZkEoFqfVTxfp$IQWa8bV4>yI)U$=PbpALmuS~dpx0ugXlGTP(p!*KFVIe=)`dIN zAF|T|tvs2ag(~6W;wXg22`Pn4Lm~PUrR1@vyF%5gse= ztwypjCcXb={{qcW&Q!)H-F5JVL_l1?$|LMK*#)Nh;QgB|Z$#um)z9sE)e-iEV1qGD z*gF_wS*&w%e;?P%!lh^MA%oH)<#^}~|2)GT%Fr(`o9b9=7?@#kQU)w%@wVAE1Cx?@ zF>055Ku_s82)T&C8%Gm-`03#!A66o{D<5W{LKYvk#=7Ifxj?YhmNkm3R$A_d?_zwI ze*soPSthC@(mo|wor7N{tMhLRv97~vS2R(b(@-7rDkt4YTQX9GXbT*$()_NqsKIR6 zx zWQ2>0sMV=Z*@xJ#$7E#7Aip02!Jfq*M{?H=zJpa!gZ#CRfKZw~9DhKBJ23J0z_NIN zwJi3<)sR?1h$!!3kig$eC|#082 za^U4+=7W+Hsa%SZ<5!v;VFiRY!6~F+gR2Q1D-`;huPG#fqoTbD>u)}1WmWl*{uPQZ zsW}iFJ|#8?OP-`cGHE__sNESDk7g0D({GR#rr%Oj%JNU5l4Q~^|ExRCoQqYLH9CHA z2nf^28Rssq4-ppTPXCUDZoK~6s*IV`8YmB7m>O4;_*@6upFmDEd>%1wA<#K4SAPdt z>4*x@G*3nS9802va+bN`&(H|goLTW{cg-JzGAzMZ^&t?t3?Uy8zAJX?>zkoHxsbv1 ziJp86qG&EhrmoY4)Tkg?qbJ(BtI@;vBx-c>gYIfn0|d0mKQ!3Ge_C)*e2noEa?ZJ{ zxE3e~o)=8#XgSmS8;hCll>W1ko|HM!ONmKPTJ;uN^(SB@T4m`mb%fSs^+{DW8u|;; zYfVvm;@vg&iMs{Inxgu!y-Qg+=L#tb9P=EMt>dt6k+-hXR~yA@&N}qKJzF{SkkuFX zZ(#geJ$_}kMPAGzmC}6p{qE{C1PDoHq^xgM7w^TGGS>pDxg(w_b?M{i1?4Xhh2v~a6HgGtbhyl zku=WCgXXYA>ZA#YxjTLMY^sGwISmR48L)O??EmnDEcns7e6@9GhB4_wNV(Hk_eY$F zZeZMA?$RO0t5K49Aqfv*OkV*ZU^luh5BXh~dqrkcdYNpKtnZ>`>Y!$9A(nYMINYKk zK}5}&XkAK`MQ_T*4-Afo*|Rhg2kcmeVK2vRz2|CFnCA^QOqZt>dNpRTId0o^KH(MN zHEv|nRuSErTkFs?+bBJo)FIs$nmQ}XYereBT2Vho0Mz3{HG zaOtTF&-XpwOD-_H_QBDHZE)lcopZFoRo2rL%Ko~cEYv%mAD++?^~qS+FWysqbuY{T zt%ciV-jbWtJe&6LY}yXb=WrlTZlSqj4qtMr@1CJB?qgwz0ea$)x@U%N`SCv?h`eU1 z9S>iU3DeZ|xJ;94-Da5%AR5REK;|$mmz0{hka>QEL~EWs3%{*9P|oEPClD~&Uh>ua zp8GG58$og{Sc#Z-L)D-!_?DI$t|`kg9gd+~hM<fg+qPHBtk6zY~ z-{FU}bQ}!#s-@HZg)^Ksc3_921ABo)%qM38;KcS^eAs>4j+IR82-JX)Pf(!)^g2Or z5j312C&BFmQGpwy2^#On^*e$#5>!Ue3G zCPx`B0~-->w=jLHBmHTnUuPIhch+eg(4m|NhYP{kXiCu9* zcZJ8ppKVv<=N&Fs2f{UZ_|s6-QrjFXFt&kvDU4fFG;JOu4FIyg=q*+&n_D zKMU&I%tVD#S1EoRscZkx<{d!bdsYkk;oZf995=48MNQtgay(slhCE%UPd=fS<-xVT zIM2SbuTMXrUz&SbLn6Q}D}nXD_(g2J6xZC5M@lNrNQMGvoHX8D6j|2c3JvZa?#V8K z-(a^{J=sfffDdWJ`LXTS0s|S!)EVO*4^V-P&e}qq`IE0Xrn1ryw%#2BL&

    x`qk1qp^FU-*V`v9@Td#)YV~u6>XlCRCr5fqpiEjSu zZ)vYsLsyfkwaF?XVXY~AgCcVNMXW<~=$^c`%7?fTy7- zyTIBiFh%vBQ`tEqBZ=jf5{^N0|0G<^leWUFouX7vYiRTgD2l^vwwv^&T}u#k+HG>i z+-{RI&uI#%tF5+oI4UF^a5m&b$)|Gtu_al>c;!(L)Xs~vHatR15mskoQI(9MZj&>M z>_8bI%g-DqJ4$Vf_;*(x$9gG+M8-{gNJ7$`mnJyE5Ko1x9)vT)K&-2QicQt`k+wNv zM}{?4*&18qHDwXKfaujKysVtz&-B&uad<3d>i7_aHg6C7MmZk;(`hoWQ@l2JsL>tb z5*jb}@OtkO>`a^Kg^F20hF}n4zzZO}`YUYx(J?kcaIE35_D(EZx~vB7Mk>8EF@4xm z9UNG}s`Ic(HhV85bZ?44>6OjhOwqb>ZOSRfEG?~cb|jqD8a?bvHa{IODbHPm++F5j zt7+X<4t{@d;MxPnfD|@#!L^t%3+VB){uf*}x)_M*o$Yt9Uuh}qHg`af5M_e`-1MMQ zaD~;NpKhoB<&-E_)+Nujo0e zPDn6EDT5nT7zA_{z?hfcQhfWas^XzxiArR z0J43=N6Br*nLAH*Dl0(xc7V6&#{hHt0tfn{J0Jp!n7YZ4dIM4&CW2OMKFvwDiHX3v zziVt^o@Pg$(aAiEl3v0!650stbRnQStv9dTtynKfY5}x=Bu+ zuxsXu*Su>PI-~;!5S-4j7%k0e1*Wg=b^L_Luy45qmr(J@!}l4@e=m^e8bw?SLYgLF zk`$*c>-RYR{NtkW=VrXJd@Ta)j+!zgQW)phVB57o(DO$5eRTv6X zDvU9V!dV$}Ukxg>o7lsFjb-WaoX~Grf^EP#z?NbNZ}2N2hdS-l&d-C~#(s>i>76HL znfV+Ypblb0(mP~JpJN-{W z^G%OdTP>tINOp;|@bjhYl0KnLq}fOD(en{og<}6+D&wM_EsQ~j#D0!8rABlJPsm4O zT^w}$;x_vO#bJXg#9XOD!RmRmK9zZ3ZxicL$>BSO!WiXy#xuxY6ztQoD$y@K6ZT&!0VYF2wo8XRruJv;JM*r>w_cX_pl|nX2t@- zjsgmkt%%J9%ZQe(b;LHnAOy0~tc%brY#%9WyfuC@hCVQw1Am8IPrn^ZsJ`b?%V;l&>SOvQalWj%s4ZW!Hb9jA? zXO3Bp9G`AK*;x@E119_GCR^<4Z_FWDtplwQXja=|!+?g45KacbNwTmfSg7i>l3BMp zvg*ug*Qq!(T%j36b5{MvWC`)XkUvOhD{-9iRt6kdHCRH|H=2Jxg>IGz-5o#bPT+E# z#TNzr2{9WRf0ptE(OMroGya&WRu^%48CS`y+Q+pDgef`w>jrnw!(Kq78*^CHgAj@P zzJbX29^Z-0GN$o&F#yLU2jFmP02anQ{`KgB6KvIRhy>Ipl!nK=4Mni@y;_I8d{A*9 ztV1ga6{5|P2tp}ga=JGI4U@&~LC81y1ojvEeg@PKb(Cf0fb*$X-lsyhH3r^u=~sJ- z2b633j_yN%qSIa~X$e)=y|X+|_gxA|$xFC(|5E9IMFB^VIOJ}1f{O=~RJDfA!jqS8 z+tGm<5ZYIJMca3xkF+Jx`Lg{;QFUla2gl|0&HwFeVR5t?hBbsJ~3&^6lebe+zXbaLMM&FzAB9Z2ehh#je#ady<1st6zuW*mpl_A)A4`bDi!)KJ+wEy=G^vMp<>?qnP5%eB(f1R zjQ{*lvI$tT_t7d_c&ED(7fxE(Ty(k2IFDhLK@&EiCTv1eWX}vMP9WAj;R!=H*93ov zhQP=LydHkHoYijn1j4!#AGWam!n~wC~FdYw_F+D$?#9xMVbEvG1q>uSt zPbgWSQ3%}aBODnjkwL$2CAuU!xhLL<6(O!XB4Ha7wHQIF&G<0JFu&iCzc*6V^M8e) z5uRWoq|qh8W$Mcv!3F9|Y4B$CkjesIZ5yaR(as~ZSt*CAmGIR!g)IPk#89KDc&4s|(+ z9X!j?!7pz+$@e}u0yc2*nH{>orX|OW7%ZsESQ3fdDMUsYb4X;qgGfDy7(u4iI#O>( zs(v?Rj}+OP(W@YXEh2+~{Sx(b1a&se#nycMZi2BQN^Q zvlzNEz12&fVtAbOF5i8R0`Ub_+9rj+Vo{I6@Q!9%>*{NNVv$-)QrjF1JP)K`*VZR( zKY?3%;T?IIJwYvaxxTVtEePpr8`k5G!3V#NzJKfA`8S%MV{?W(3v4Oe=vC?Z9VGAU z`d6RC+N)-Lu*a0xwOE8~bvu^KRK#<6E^8T&wj#J*SE*|Z7~q;^`GIn;+G!0JUoC9_ z#!D>HsZO4Up%kHtcxBO=uD2jXET)m?^Vqu3xnOY-zL;+VVy^ljGW=!}TYKMTeA?o| zmVGe~O0v>Me-!B99p6_h`kr|;Gp>GD__Xp}^2wR?8D{0f1DCL*1;|W=3XE$@&Ou|hVzB#>kTTc{ks8@E*O~>@2GX9$ zX?a9JvYA8!sie)9=W=Vk9|8L?v%>7oE8Y+wL~z=vwHM>bjy>3MxkrumyB7{YNUOSM6B=F9UK%{g5AcxUB?P&3M*zm*tizfJLKVU*=uU?IiSO}KX zte3=l!?-5Mjet$YGnL_dFTsHa3d0uhCGyfsQbc?>+C&&***=H<*R&9CWAHhxj;4f}H@1TQw~ ziMq*w`X>;u?2Z=62S{=Y@wPhfMuB7$4+m7^$@l$?UKI88VpMT1g6s>w7J-+}hO8yS zCQ6qt{ZBM&W1t>gztYmRIGtK$3x}l^b)?{EAZP3NC*mPfSjq-eCOIgSDaOAa{5e?L{aH}PAZf0Iz-6yDBqAg=dN2XG% zmdt~JbAhVpW3mbg*VJEv*w8igcLb~OSsJ_opVtM;@p%O{W;ONa2QR>9VQ>sqsP(ew z8iwCJg9Gt7GI%OJ|C6@gfJ;_dZH}vee!fsLfk=!ceZPeYLNETa8(=%r?U`ORwc4nQ|0z z-&26ew7X$EFCrBhT-(eZiQu6)uFdk@SFbqj?V$H)OKW#C*am+v{81wKfK@~DOqUDG+pE6C(!Quv)gkN7vD%kX zdU3Y9fu*OgHXn9DRXY5}*nbJXu~ByK(pbD6HBH&;TwV=@xreDoR3kWno983dVJu#S zxyu|d%SvmM{e^1-*ZrbiHu9U+uN|L_SzJ)NHgIF0VEm@_%f%<+UkZ%EtYG}6^&5fD zlz2o|&p1LQY4Z;1IhX1`uy*x0D=1EQir@f>0cGH&ns&O4bMCHZ+jE8wj(pe-0%_-1 zW;f?pl-Iyn9i5GnhIUeIc;IbqI*bZ#sI$wrrZ1OFoCE0>yp=VEhVjt4yP4zn963|ri9 zDiAkLBX*V_T;wu%1JfE^o~Ep+Rtmg0A`Rab;4 z?gnCNO~n(Y;crAf-LNsjnGanj@jZhj#x3mkprhaKdgLTt*JVzW-hm&+Qliv5P;&l& z7?&sYexw_nHURN1Gqc#SQ%mH}!qf5mRp+u2&V;}3%$Ec|&hNexZ?JCyR zDacPCHPN86*q|;b_Ys997K@Cq(cLC6#OPM+O9%pV8^Rc45AM;vMhf>?h#&+&*0n0j9?H`L7SY?7to-4s(Jz z@$sX6+gn&je(C{ z(TdKJ7KTkNXKYm`cW2zg)A@oPWGRMTdGCE{@i$9{~5RE`cRTudbnr6& zX!NHiI3vDLdiiG?m@VoFtHEuLiCKL+qm#;8HWC;4DMptC6Wxqu@(J&FZOv&;)9yrO{wgn^dViC0AK z^xZ?osKcZ~7(@b9xq`XoD0KPOp0PIR#{?5AP&tcqWm*Ew?((M?{;iVa! zy+hvU#0(J+A-$0byi+E<*ww7lx8%$Dj(o$A&pe0Slo6k$dOX$(Y3l3N9`Q@8Z`twl zt#96VvGvUrKh65)jt?+zg*suJRWE9hGRX$#|A9SlSSQY2cLBR z=~P$P70P(hRo`Ms2Q1HB82&fZuZzSN`D!!3ZXDa3>F7vKb?D!n>U+58I z=a-npn(<*z;kU!6_GAWj^`-IC%m$*gq@!FxluV!$7;h5R?#TW=?iEo&Varb*#$fO3 z^=Ab0{TT~;pr*s)xA`-J7x=xw%i?p54wCR5PS)UIkbql$9+FZPJ$EyGvQfzNF%JCy zX8LGjJkzH+(ywBAe`6NY=Q`3aMtWk(U>Gg40Hg0o_xM)&LhR<+BLGQJt*|sPX0ULL z*B#8mf*U>TGHFSA(uGq8>)q7H@Ec7#1;4SjbD8T1cY{YVUhU!#*qNa{v}T^owaeLD z+A+{!RF3(AgU!33?)({{EORlwSWX&01KIipve&xrgIF}OGOnMY{x*fVB;Y?uZVa!1 z#ZPS+8pE`}+ApjnJ-KA=!#VGRaLC2t7ucj6eIHI&nCg9xAJ^V+pY%PB?P)Gf zO)bn!&b?0NCalLL+vG*BYmz}Bq%Rsc zq03zc-!l_AWw;lfOF6now)COCGP7tE?b^&EjTN7J;yK~PpL>Fy#)+S2no}X5^%YpI zTD=ES>RLp2ai=$!k3QlO!Mq*=2YFpvUGW?( z`oK}Hsr>Fx5B$xDFSeurrzvJRdWe7Plt5eu5Cw)wXIUT`Gtt8p06~)qC>KfLnvdy# zd<*4ujYD4VgZ(VtKU{OvA%2@ML9zxcaz?QVCJPAj%95GS;(=+Z=8DGmL8JhFe|$nrlOH zJqv?PNy~CS!$r64I+&e_RcTdw)YAYn(-b{$D7tq1J*bVnw(B8}o!^9p)mL~*LMGp- zMu^yCPHjiSN)*6OPQ*Hv#VJ;_oicLFTns>Ku$>P=iIFQ!v2gg*l|M5?Wgr}3@6|WN zgW%gBV@G=1{sG5JsEVu1sT7^vPx2(_QcQf@J^fPn(t@VBTk6;D;xF@FP`7G;vnON) z{y;N`)F<6I!)8B-3R(}fpp;ZnVDrssz(a;p?fzT>tS4MCPTY-wjr-*Xe3QwSk%|#c8N+o2ZeTBh=N~~q`9tB0K0>vt`8`p7EO>Ri532B;3Bm?P@;X>~bp%=fx zysitej0CZM-4Q!SGGKjm95qeya+VORZ%zz;TPm8uaw5ixKZMQz|3~@VwRw@;wW8&=X+2p zXv{p!P=6Cxr!>?$0X~WTg>Ha$Y1I*ex%waudC=a4J>rd!j&Yvn}L?M&0u z*{G(@M&tKC>E@pBgs?&s!*G~6?SrX<47~9QCKH;MQvBVczjR@6W0>pU%R#*FJ4$;A z?_5oLmMuU$3Y=(ZEyXy$3c-oq)1$uD*NHAKFZp|LBwko$KD=GVT2*PcqUc)<8T@Z$0~W?i-k${lYQ zFFl7Y{CsZ~&yyVDouL+H#Uls%9a%3et=h|XjSp#0sb)Fsy?I*Y30a!;^xbm=ELFR) zHt4Ue%R&iD{x2YPT@Jnlxs-_I#y_a~oYtD>33^;|rGqvSw3?t-(?RtB#g`iU)6?m* z6u;4UBRzdK)2A7&>FH%mA16;*jW*sU^dLU$h3@Hu!XuICPHR;T(rrmy(dNhUNybNb zkr!;@(I+0N^)hI{5%4J=AKMG?VNs1%n&tp3D`Nj<%Zdmco(knt8_Jny6rqk9G4DHs z?qc4tgpNGZjpmD~P z1UYsIBshkkfyQit=HkP_fqno9({zI~8qAE95-fu6JY~D_kqP@MwcQ%d#?e(Pf!|cu z3Q3odz3u?MMWg(kxbbG1w*v|B9x$aFc86r%S&BubhnalO$VwNLVBLnG3kU%~^&Y_D zexSf7S@pA(#zK&0@5yHDOa|E*e9zp)MYBcfRp4U9bdC#2O?53+9rfrT)-JlAHLWsN zd{V$1D3Nw?sUEVMnL$DO5~a`R+|eM*-!962Y9g}b%U7$ z3iS=xd6Y>*8eJLYG{7Pq2uNU=a=1VX`!hy|`qL0JHsr$}_jw`J@sY!J|l)>8Yu7*{zkt|LZ|uhMAD1QWsVV)Ia&EMwqRxG>v%Q+`;@eff)Ia|e=0?{p%46p_B> zk1-3|ocRoUCL=!`b&rGCUSbR;hI2c+D<(DSYYue~+d$MaiRzS=-w3L&mYy}{8L9!; zSo!YZ`!Lon&bNA3WC9JIJgHFMa>OHAeZNt@*S-`QW}Hj%&W-rLKDGqx43w_-BM~(e zW_Zk}AwgI$(cMRu%pWpJR5>X)=Zmipa|05;(3q4Cc}F0@Q`DfnwOmfWv~o}Ua$|Bj z?&ImWW#v8>afcaGiR;{WoM+ehr(9zBP|JkaW+8lz-8okRni$p(y^gwHOG-`&Es;`v zwIjHKZj>GljWVCZ7YyAqjO&Q+(356QRm+~{Lqy5Ih`os@i|~O#BgZMLKe8D5Drq*M zs;c?gUDTUWpA`nbhVkF`iP|uR1 zRI9Hi8u&dl(9C4D+-Sl#A~m5i%rEc-Z5d>Q)7vruRYSiGGwRcuu!r7cC+1PfmUjq@wQSf9N8fZDvKn>) zYs%S-s_qes<(X|BOn431&Oi_GD)h23wL z(n5l75$qh$e*<^H_d&)7ggBM`qXGfRBZL%vofN7|Y?3u3IRcOrvAkW89BPaq#97#E zfnXz;h1zqhTeW{1U#0dX%rVPR)cy}G9-YFX<`C>y@0i)Dj^pfI6)a8MhJQJaWBOK?WIjrZ=NZ6+FyXN{Exy`w<033Oj{`JwmWk17u4^U)`Uv05G~R z?*TjW>j0bczmodbKExllK#nj&yM1*($70pICh_wxTzU?Kf;AqK!W>iVL+A_2-f_y_ zS&~C!uMl6Q_YCH6ico*M0<&1ZCW4*9e5nu&_65HIcbPwh?u@;LiNx4TRA<)=O`?Jk zE^`u5Hxspms7@g}j6%_iqzaYmG6xb>0?NNdR44nIlc*3cm-!hKR_q6)`hI!^)+JHt zQDp8W>RCkn7g3$fx;=?XKxn#=heYRk+R}C=W?*X244lR=r`_r{28}b_%rXs16ded=%-W6f2uD%%_g-1y+{Q9G)h^6 z4cekW!vw_BBjXYl=j`{F>P~i=_ozWyOTPsv5}U5eeFF*?jq0t=o^W$eM4Uu_qAHC)xY8 z1g~~9WP=T+xy@Khu+zujE*rd)U?Uy;Up9CH!TSkzo`_7c!FLgC5}ezSWa9TMaQr4C zAIaOtIbc0)*ky*Fu(=M{r~gzq%9JmGS zNl+VvkQz4SKJlEyccG>jOfM;yl)cx%RM z{sNWOd!NA4V*~NwzJQ&zeyW!5)n{TO>h&OUD*oUXB0u19<(UWq?9J0>;;ATazCN=6 ze+u-Oh4@pb&n&{9B7G(np5Eb!k~({nu&|K^Q5HpR{IeLcpT%G7&!((=ycErEVm2Wn zbCsnwVxkky3{6?Y!rBU?*wA4KQbqU{=_m?jiBqHy6^c?1_TC2KmrDK`Y~x8yF)w;q zPSkTsNi)1!nze?hC9O+8-AG(ba3mYJ6!rXV1dEs;EeQG8q@!oU!H&PEGj zSb9DYmx;sl)gY+)HJbm-t`9QtW`-w+q3kB*NRZP>If%D~n=m-cseic58 z>N-QyQCbm8%VdpqH@W!3HvU8x$i<9dlaopGVc&Qz%sZ_TJb+ZP}}u6QHoxbb(ubbgN|GSvr}i}n_L{eXY)Rh zD?ZqGjEcP3p~xfXcWIa~8Fud#Z9K9;PiS>P=0DU9my@p73nWh>9FZGqJQcSma#4}5 zZUW|eJTAIZ8re{eI|B`ZUyD#pZ-5oyZ*ZZm07!b2WvnRamWx-PMK0=36GiW#WlkU# zm|2m|Ocn9*`bj9Xx>kJjRb9eMJoMCG;-RPh5)VD~mw4!@zr;gN{UsiH>M!w#r+&G| z^3-4Ap{M>54?Xplc>V)VeY{~CY4TXDZ@_s5uSO2H9QF%U3lUixkK$?w*?u(A)mokGNV3Q-8z`Cb-r~4lwafuD8I-RP=1js zp!_0NK>0)$S3vpYKWVH)yh3~b$_(mq!WmXu2XA1SYOsc> z^c6JquiKE6xTK)Hi>4k7HcJq@{tRySj)$hg2?FUJS3cj-zbm0Ue^ zzPiB?rm$gXTw8{7u``3?{b$0bvu|*Wzc2j#vV$YyPx}jkr^g@nj}I35$0Kb_Fh9P* ze}!7D`LFZU_JdxF|H6tpg@_47!Jd(hIao_V@NC8L(r{56fz3szi**mAS?+-}%RP{0 zxd+lL_duHE9!Rs?18G+GK$`7)AkA_Qq*?BPH2((-kJfBqOcl9rJHTSJkLUe?Ezz2- z(a_!mbHDSREu;9sLtu+|2yBIifF9VUA%-fh&Q;{`et1Q`j;ml5cxiBthRLKgHX2M( zeHkek?yLI=^h8r&3mT8hY@2PZ|K$)2=9;Z8ETsvzl42 z{};TfC$CltuT}}KRtvAz2(Q)(uht8%HVLodS)$z>&h2WJm)Gc(0u{&fy03k;8dwrJ zo)PT%L{{W@ChiJ)p2)>xfGyO^?GC*h$C<8V!lPkfEEBeO5Qwn=D`9RFibN)fU7RB> zzYz9~Fp*r_`3btA@73*GRw#j&!rPZ4?V?b2<6ZnRx}+tTSsssVUx6Q5OLSgG!e z$VP%K94k%};c(3YBhseBbr)MhORsDXFBaXsSakPd(cOzhcP|#*z4-rd_deiJRoDLa z1QIepAfN$)qD&D51Q8UJm>>xdKqZ1e6ss5`1V}}o$qWGni4C-wJErBf+UnJ|q~I;R zr4_5y6m13J5>(ov(29zcR;m*x)mW)Sq~!g4_c>?g%rGD-KF|HV^JL|mv;VBU_TFp% zTYK%bP2auD>bnb^zI&PJyO){1d)cY<-F0`-FSp3(p=n@!>;}eiq(wIunUfFPm$f6- zg`KpO(QNuq60y9~a602~&nHO-xFtS{Vn;CB@;>o2VfAQwxDTy??f==5u^UO^;!i4e zfv)w{^Q1rVWBw0En^obR+c8!p@VyP+W zavxinOC!awD;O!J_`8^cA`Ael&!Uc`B1M~$f1lnSkMXNEJTFO*X-YLKnmvBZiE>gX zqtVbsJo>*6Jc0QHO{*H4`MaVPTY0yx!kVaUxG<1ukZr)y-(!T2VDl)<1r4^%@m4y{ zoWEEW%Ev_xI?>|7w3#sevT>2HNhddXI-Tuw0!3J~wbRHq6YuX?2>OqUypx!K72tpD| znSG73*{Nz;sdA?8qSLyK1ZiJQ3vg-}rqDB7q5pwySkra#x;fG7WqDmDuj)jvr{s0E zyw)drJuEL>h85~i(>le^3BKupYiyRVYu+ZTZ!bDFRkW|>$|(U(E;plR0ioNdI(;y6 z=S%iP?TKj9&v@?6c`qMN}jZ$YXd-)#^lPRI$ z{*ICE=X;p`MEaRW&CZlac0;oe4*MiV@C1{P^bHX=sPX9dFAeCSCv}Lle^kz)M6m9~ z{e!gOj3F20T~zfoOY>wo*zWn8Nole5ta%|NQs%t2i+t62Z6BH9yrxFRJFjVx9Otz| zWT^9+9y!l>`r69=`{A!Y2e(Us)WXS;P_6WtJ5$yObzsnT!B7M zUlpm&)>(HM>XJ0;AlF;Rd)^mqzi%b>ux4H8wA3qTsngXAB(d7^Z(8bzqZE$2rGB0L zlcqw2K@Mgp@Y*Z6cSxjRs=~Xuwm{)Eg>G0NFLyJ(Kwd}G2G%5cb(WVAcs`Nn)xth; z({{z$m+18;d71Y1iM+DNfYW$3%geO4KDfrUpC98zdmAZtH|5`w`z;Mq6T>f(`-Fz_ z#PB!BeQ3ifxx3rj7`gXssF%CDy$!(K%mvKaT2icNm)Y2!DUs8IXo;i!YMy4vQ@{3h z)=@py^WVwc7EDdh&I~rqMQzPGXP#;G!?OKBAI$nQb5&0&gcs&#n95$Y0gtA9KU*N?$T*EWQ$kM2k&qL5B;-V% zDIq8FObI!WXG+M~zrB%F8vY&U@bCEUjK0$y`dWK_raU)GP>8)jRkC}cK9(I!Q!Q8* z?*VQVMEGHFH+pvR8eE*}o@3kcnHX2lI$e`&M-X=Uojw(_Bmb#s&a>|Yk?mGvk#(nS zk#$#aHwIZ{Rm3uui{|0k#d~YEq}04D!>?Udzr2)zHMJ`B@stP(j?IsAYb?fCUlM<7 z6Od=>na60d7`XmU(_v2iOSZnrv+DKC)!KDA!Fl)0+AHuR0aoQ5GQW9|LiS}S9<;A| z`LMLnnX5JA6L-+Q;5OF<1CcbBnKzw{-o3RIQA7L8`%zMQIRyo5bCKu=S*j{9c!D!i z%@JxZV%v2Y5-=Av*KF+o=E3PGa)vDv=~z{~BizAs?ez*YxLf-kiV=KqaNi(S0MJ>@ z556dC+jlR*#=k*~D(dAXaH#0uV3hL*wV=eA`D9jly<*m8c`?>_FsCr=A5A(3BYRD$ zqk|hpk@do0V4od3`08NRW&0HyRnb`Nwxa#ltbTpv>sAs{Z8dmzq;``Tfp(iP7m^p# zHuE-QQwMSV^vrW>3D8x@NTK^!NuDy!1)ozb&RlWY{X#;8La96TMLRv8X)PiFbbZ zy`LNLz-|AN;SKvJ@tV=@$KKyl$ zCuf{@MF*s}ZP%xU8`z=?Hm=^X^jgy~x_ec7u2Pr!WL=;CrRov%+8qXY`zr&u_M?NZ zweO+rfjVO|yKP!GOX=jP`f7|`gnF!!>5G@{VJgwK^6>7CTm3y<9_!RO22B?pf9{}W zv^qLvTu)cV=?LgO?q!u9e)f!5b%cM*X1!^f_pI=$LqXVVRzt{o?>W+l!`+=WrQCDm zdES;&)y~F^cBxpxw{wK1V-tm@)+X152)PY*3ulqH=3{T{{GsP(=fc07XF{3VLcGG8 z<`7V`!rQ@lM_kNc6=>BR!)-tc&$9rS` zQ4g|F^B&4SN^Z}`HTG%Bzz*38UQg6ZAC!&;ZdC4sD>&5`_07+gyYsmtKP&o9Nh*mQ zX@(RFwddSlWLSxk`>fb|_C>MxJ|lQHxu7K3vfL;sui3KHTW;D0{UT0eug)<3KbM=a;F6X99x{x$|DTA!P?Kfv+GuZRj#nDti z$f&;}G^WX)CJQRjZS6qH$4Ah_9mpshn!D92e6ESF9Z1Eo$|Bhgq{0SG7!!?5+lCcu zMw=X1JCK2{>@w=xwFBv7cctT3Guq@-JCIgX_YUNKdfxDP1dZQ;6ybI3Kq_Xihlq*o zKt`{F*PmGs!2JSTmt$-5ZWO3J)8LQ=;c76tU@v+4D@zosg>YMu%ng^Kcvy z)2#!RIj{P=hEm|G?wZ72ml{loEn*-pDj9f^xLBpswa9tSuFYaUnQO=lNBal$Fp!DLgaCXK$3od;3wDb>v^F*K9d8r-(^lfI$!2M2BKy$4}VOXnSh zuXsA{3k+d8Qg>ZiY?3BLDNWMevoXH=rZB49UrDK6@ruWf*`jK2xs> z+h`_haL)0VF)PTBV zl^&DSn!Cx&d`h5a=2Pi&bJK>TboB;0h5y=-sm_Gd$gQfqRRmMA^qI@3K-{Ur2@P44 z@n)Z^pu3dFuFC$^Q3xB&aSsBfj>%%VBW@mDvJ~h-u=xDYx2ST|S=Cm`M*p@wuD&fh z)WgJR7n(GL7-lGtTv!V|4vw_FWcT*j^(I)i(6neU6^%3wH0OHR1Uq#K!arriaFHl^Ho2 zo)Bv^xQdRIgH<#}tYLQ%nXCRztm@IG-|^qsutl+Ux?){QtcKlk-Rp9F2*p40KvZ+s zdedt(1S8_CGr{NqZt8B-Egnm|5N!JnhL%WgQkJHLFWv$I@pCa zDg?zgDy*b+a3TB2DIn`*Bm0VIzC8|;WUln%={EH>cc(H&G6Snwn&Am_QTA=0$Ym;) zxy)blrUWj~dzs$baZ^USDh~KiArm@!BHj3(66vIfkyN=PN{6lOv4FEZ=Inx@|D?-7 zv;h{lx?!nU(aqzdQJj^I)URkG4fn`*jf+wHT57eFgeN?K_i$(CaZQ&}ui@+11`5~n z55*p{CZL1UM3c=oW||y;)=ZNY%1pE20pWGG^hQo>Ls5sSJ6!u;8_o*!+mIUQu;JFg zC6O5oKU5@loBJ-2B6$rzO+LBYcr@OGML8Z<$YX@J|WJEN(!FQHqD)#i-V)E7I_zGgKruXdVUh*~t&$HRvZmmc6;6r!i9 z5Skem*Z@h*yCv|vz8|9#i#+Qfh)>pJXht+y?4p|1o~2};A+z>(s=hbIz7LUmV?V&b znuM(T5$QtKGRQJy6pO5E{~3ANDEf5Ac-uDAeNyvA1)gr$q?+EsKZ@P-#!JzU6Y2jz z)q=t?RQ>?B@XeIHJaj0zVW*@sFB*S~RWxXsI{lqidM-tvtkx@_Z~<3d?X| zkyQ#~Pa8EsEO+xoNQna7Ly1dolAgMU7Lj$SE42t8(ans0HOsrv&7elRGBo}hsiBz} zmNy4HJ9;u#?*}!n2z$Qu3!1RZdFd?leuxe+0WtjjZ%V4^JNQOjI;bnxAr45rO~j3c zxKIaX!7zPqJe?9hANQsiu7FuMToattV%eif{gIu7OflrlYSDQ7t`oP36Efz4bSII0 zI1slvA?`90w>d8EFBDgKi)L0id=UpHhpl!FtsQciVldpPELu+ehVrwA@9X%S-8w(!o59+ zY-Za7o!Rz%Y_*5q<)3MXbf6=S?>(Kh=)~}(`>8TUePz_XoZ*KY4pCpQoX)7B4=Kk@ z$wmsj?2AD8(5=X}$I}vOwvVtTxuzM1(RXUAS2jAQDNBLA;d-`=f;$jQ-(u=f=%+J6 zvbkF{F7iS68;r*|dK1mJy%C0~JzWf|(Vv?+P)7?BJha2z31Ev%+V0=;T`Qv=|BQ5Lq^4+!;}`*K3WMW(F>`&i(pUTCd8svE>m-3@7XhA?|trzy$^gm_CDmp*!!^VkHHkn*~_en*-PPW7qi?&aQZK3%vgH$30EeI1^?_$Gopq1sJ2~?ssMB6zF`4?MJ=uq{hTSsFimhQwQw*v z76saHkOdS;j75RAB{(+QbTp>T=x#f+=@8aNDz}9fAGEJAC48t`?$p$(%Y%OoHga6M zuZ+l~{+CF<_Ix@A`XDgdiXTt*!#LEVB#J?ts#G1@{yikPwv|k3%OwWocFus5^|{14 zHFSd)sTJ12YK!)AU#K!+XBH~-#U^eLZMI!3I1pzAwQkxQoIsZL1t*ZD{lN)j=|FHo z_Kw0wxpb~?<|^Hg!%J1y>W|OJT=iXWG~J1ik;}+3SAU(C%qP>Cd`)EX)guobgdAFA zUiZvZ!+ADchkxFv%vCyVhZ=TA=4EFz<;jt=03&!db;74{LKbOwnvUU6cP&Ea)X??n z|JmW^8fhz2&I*l7R4FG(KCh;PsP3kn#1aiyul%hr53A~@^dHlE_o^c>1CdKThw>hx@;&xal-@^B(oj~VIjNI|x5I*%`^ zsM1|UWW-u^mayt+NV5){sP2$sULRL?)mNOCxq25x8Z28I ze1$e1w_B7bMQ3PmS3cRIj0v1pAD3{C=Yye?Z#t1=-c3x+CFVMQ6Qv zE&oW)u+K|ZAxLJ?Je#DeN1a2E4GOZw737x$VJ4CfsS?$}Z!F5aZIiMr>v#F~-mB^P z^0bj9b@jc{3o72dDOFd(zeMYeq;H~A;DtkTT-1^~HmmYI#wrwsLL=7H+?DO|-@rM# zd`Qk6mtB$BIL=HG*f=9Akr&O57iDbi?QA{^5_Ie?^U(?7Rf(I!kKh=5juP168HVCi zaItrjr|AX~Y#Yboy2B8JW>q!T0J@XhG2l##$2vy{=xWgrLD3K6W^rQ-$fQ|MwC?fI zF8Z`+dnh=fjf#)<5eqNvL!2l*&Hgd`OJS4p8Vkj+codI+3JOX~wV?8mGAOltwc*R` z#&M`sNNFT<)j|?zyQUk;0T)9fhZjv0sN&+Cz`nqf!e+Y^~x+}QZ%uVc>0COaBpdxgO7xsKTbJbqT zqUP?bl)#n9GZCLzG8AMcWsGg1LMI)KSKc^i9C(sRF z-z|4~R^``1G`PGqV%-UFUS@R@V|34|zdDK*UD9v$`1jDKaB8$aZJ~wQ$%uC0R$Z}H z#I8P7k9YMI9xP%^Rf;#eQtU;FhU%U+S>&g2LN^iER6(U~N_9<3YMLj-WW;nWrio&F z7y62`s>cS7)ke7Ido~bzY#qEGe-CBx}431ZoOgJEFmTIAWpNZA~+n9X#Id|5AsK z)xDGS_;o8!smIS;brxLdpp{jGnWUhLP^8Ej0UL_*3^19l*6=ZO?^G(<&@0fRn zzpCl`eg?TN@RrjU9LG*9Dnj_uXMes-~+)~Ptt3o;qT@FX^{uRAn0c-^7g z>snTJ4P6xu<#WXZ<9cms_t>%t6O}ENx`ga+_R75>b>;cNJ=%~y#?E<%P;nUbcd2fo zo*7qWUhY4bP4IIg3NEdW-k4{k>de5GD@wQ*tdy zbgh@`RdTKJh9+b)6^&n##jjm1Mgbt$$S7lzJDb={>IPD_qW&O4OV%~kMrOWO`;KD~ z@zDFT3&l0#n-65i#=5a1jiB$TVBx05!Y8z!XqFVCY(by!J*_Q>OcIcQT@E!k@F}e( zefs%qx>tofCOdO=4KF6g5RjF*T6GaCSncdKmExq;i5DMY!c%ow?ea zkC+I}?b(FQr!>Km!bCO<$(xV5=>GeajM32wD-~YdUC9QF#D0GsL9SSk6|V^u-Dd_o zu4JXO!rOY-0u1~%1`F2&i|>Q#z>Rf&~s{aD7IX{*+*1oM`V&*C-teP2k^_48)&ljsspqe;)*PD07kaT<2W2T#0wQ%Ts ze-JjNy-xHpZ0J^t>MPSTS4)wC$n1v@?E-sUZgF#XBPw^AM{6a1Jc?f$6x`?Vh>apY zJEX~fA9vcuqJBbL&2uLr12frTpv)VIY+@w5*T>(zX(q^=Ge?to2jN^d!Vt0>mVy`t zP9!OcR>yRzubi8?TG#tJvq9$12~$BZiG{w87`}Q8D}ujJ(h&6ukN-;p;Yns+r(qN< zgl*DMa6Y!Pe>*dXF;KA=WxW=&(5t>;O5h^KI<|w__0P;pt2);jEvwHm8d7I)WlUEt zeCf0)HPT^In)L8vXu4G&nc_d2e^u$#M+W&bB3ac(Zt-`jJ~B7ZiAuy`5dY!^&}>%c znNOy`5of>=9pH#gk>PeL8)Prr={jlt87$nj2SpPN6%Z%ih-7}!g=TJHG-ItK0L2-h ztG%IVsVJ3AO0{nbkf6cRs3f&td9G+5xJ1cz^moeZSkYZ(45~VlK<>BTf8GYC` zv6f4X6O61O(z|hjQI3gpb6(K>FfK7A*EPn5RZX)?` z6E#KJ_A&TNaZp#j7=roTNQl?A&gMN-b_m$LWj?lz8ZPNog5_6 zL{5Xl`@hD15ZK${!CW)d_+u2kcyD_r$S#5i>nv>eL^>-lvUnphIc@;SwhmBfP*XYR z_HjnOP$7k735}rurc@{Q6DB35K~S@?SVTH$tOX{PV_OWR_$_QkfDt=hddp3FhW{wV z?*vbxQha!ZL2jC#6|c)PY(NFazuFp{@#@hi`?qxwDtrFytv6vHcsg26jcNK4kr>j- zv)=4Xc6cXGSLHjota1EmMk~HYm2X8ouJQ*EG_LYRu1R&B zQcY6%3Sd>f)S>7Qtb(8MK&<6Cm9C&G(oJbn>H3ORr*2b@G1WP{@v|yjZ@Fo^_)n$3 zN($~uw>dC;8}9WAx%EJ5`?O|Cp>9$OXBVcnNZO1Ho`qBarwTHH1qk%*;jpcXVnkU& zvDAT$+b@>TmsO*SRbu?2?On0**TvBl#}bOrm?nPB~ z6EfwIge4SookG;>jm&e@eNB@QIBJZEP}?dgvd3i zu2ZTpmWYkzY#`_)i~?G$!Lc~b1jf})Pt^`pnZq{)zjemY4W!ah;WN(q@> z3DYR(I)$j$o0W4;mf~RZ%}}l*S*LFo-#8f^<@nW%77D{RR@CG8X8*nfz7ahp;dM$l zT;Pl&$MKBCq3IO58pVimjbe#w_Prvm(U(=})%IJIYZNPgT^wC;T%!n$Y4W!ah<1x> zq@>3D+p-I)$j$o9SwNeAz7X$)8~veY;pjpUPz#xio&9 zyi*K~K33G@SmtM-iR)@aj7fE!QawpmqkzYCHA+PT!Dr}dga^LS1HREC$`S6a#_S#6 zcoe>Ic8s|Ck3yYgUL|HM`cLRfB$_9KofKp|U;NfYI$Y`)zU@t8~XeByUD zXumH>V3lU-52{!&hA)isW#WD@2|gqyU+3 zM_~ce78&4jU@uhWH_AwAv!8#|p;?H2Z7{13cUuz+X%AgT0kgC%Ud*BzEge?yp1fZE zk$Jt4wDj~ZYI=yI&<~lK*E@5yGF5#SeA6jZe5n1I#vUlvS)UtRe5fgC{MvZ}XR^dR z)Q&y-EtcJxj?YCXfc6&_V(=#BG|S*gH+UjbZ6uM2H7gEz{9gX2V7~NhqD65G(eZ=m z*SXdkS$$Ypea4m5l^2p#sgkjd=V_|*xm1t2BYSC7j%_4PEF3qYClq8k7}#G|yc?a2 zZd5X=KF%6RD=>35f(>rnnyLl-tlgPU_NqS8%U{Mn^nZ@@%v`mK+&4*stolf{+$k&- zh?G2R0q%AeiTCt9fdE(XN~E44j1$uM{>A=sWTw3fC@O6CSBW0UHwq*%$L(?)e0<=I zayQ0SB?`7NEYi+(!b;KX6HK=5`NG131R_P~X-R(1MskpQ&&D|CGa`HX0n-R%%bh2N2A0 z@D8gEssAC*U5M^kZflSH7vOj{#Zb>a!cO$Vg2mhGZfU8TXsq!f;tLgRADj{@-l=Uc zt(l8H2?|&XDNgVvKRn~$l4w^HG-Pi`;%xrLX=nP$H{?Dpj z!Iwg_Hfc|$F|~%AdUF0C4deGX3gm3etbp4&&WOEaTS|sp!_>k~i5n>WA5i)#&vrTn zG`3m717Sj7fxaU_ksp9;x7@gZ%^>p$gTxsoka`|!C9D%*p|UM5?H!Z~ySqhq!L$Fy(H8%^!bp_1m{tW6976J30^AQ=Kl{2f!+Qc_RiGRirKg#g9 z8m`6rABW$A4Wng8R|01?as#3%yXwdsyOhV%uTjbPN0&^B<3JOO;BqtRZjXk zzehrcyT?fTCv zZ_!18V&%uD9JeS?gvK<5vJi+mUlf(z676zC=`f1|h0itdwI~p_&^Zc`WKp1?>lC71 zZ$>0#2)E=9Z@<9AU*E1pfs@M?$FF9z$)FYmR@CDb1@{ruHKF#_ix`vYI;9$06hJ*Q zE98+15HFH4$tDv?DJb)OJ(%z75v|UsNXm>hU(kwIT2d=s9aJrJFr)gy7j$RO|1jR< z#OJl*)#1ceygHnc6|cc8lB0VO#){VlMYUtK3$(DysdUJzRl4}dwj!RCwVx};K=2(3vk}=(a z&G`)C2Uc#4qzAe)RZze6sF`6%-kDl$J3Wk3V)ch9zHPyl!@Gk=4!_)Sw-VawebFy{AahFtqY%ZH zVP?B>izdd-L|f!1W*Md;3KkwsT0|PJ>k5yG=yzfTtr(gq7q$kAlgCqs$)Pw?a;|u9 z6nfv7)tWRVSBw?07#bWjAX-tNBL5FDBW})-p~7w`Gf%MQbk(q(ef8y0=4p{!`{R9m z4As1&mvY`;Zv}cgi#IJ#!qgKdR-G?ZhCNQ$atBjN=<<4_v;-b7+kT=ijQNGOx+1Pm zvicuQ1Hzp(+jcMWk=`R65Zi@I@Z(+O8=h{x8~2IUJI-7d#k--wVu)zE|K==ku(7`O zJk!F$H$ZCmNBZ|JM5xGR>>~VzJ~+#F_mxJ=tS;jXA#HCqlj;guElTYMTFL-zw(&ya z_nFFmi=;XAhw@ru!@Z;v7y43#USp?@6tgXiy1Y5jxshlNyBXdZ7+vDmj8>n4kc%Aw zn!adhs^ed%hv`+urcTOj7dWS0fij=+I0j@g!fUrN^eINu-}n=tgYT)&t@%lZSc)OZ)ljiHSgh06pb_2Xn00wcDvB5*cIhuhr`%#vp0Q0{@SCV z@oSE1Z_bnRlE15&6^`J{?ETdJHr=t(8VWdik)~Va4krI|$J#dUBaPo2P(t=PSta!t zBY(IUZ{!qaN%>t;5094vzUMMg3SX|sVMT69i0oJ7Y`nL=#TDl5do)x0p=pPlsqRFf z`gp5_YLCJ;^Rc;As64)SItI!6_X-=u!`8AzQk$rF%*GQ^!1co81;uYn`MdJ-S4P$F zYP{Q@W2l*a)WPx_VY%JLQYb992upWiNi3Czgk_8!wl`s;BaOQBVG=V^zYI1O<>N$u0qX$c9SAS?$Aebryf;klOM(uh5m*+ zbYDAkhH$r?1v#Rqklk>jHF7dZ%Y}?np$YJfHsh&l8S^Y(6eELip?#s z|IL|J?^aC}IwSHu%^OKWR2DvLBR1NwR?>k39ICA=+DQT0Nv{bZ;Bk^Je%SO^B<-`4 z4(!BGTg{5y*tPfxvL!?~Qgt`xgqkQSYj(33!a{`)2Mh1DG+9r3@Qs~_2pU0AB_!lo5 zc~uvCG4*E}Z{*Ut!rfBHv*#!+e=@C70KvT^JTwf7r(s$W z8WzN8cx`Vo8Z_&3Xh1gh8H(XN6~lkO6juy?{1?U0*|u!-6ZqZqHX7xp9*=nk=a`ZF z+eQ9Nuz1S}i`=Ajg_Rbk+{}`8Hfc3IDMqmrFmXpRn&x2VMlkzQF^{8z02ms zXZMI`pw4eFP1CHba(>v*_?=>Rxy>XIO(i8_qR)2t;`MK=GPy#wM?{gZU5@;5;v za$kXYZT;*2tzPkzC*YIo&z`rk{W!-7+R}!JKX4sPi;nzQZ(ma;@7J9A2a11n=Bh*B zbCS0EHJf0c2<{jqc$nCh5^^&uVPOW>Djq&={W7tVR*Pw4L+Wm`NfP#y(?Z_UD@o z1D&L7-`i%&_B^&uoT2C%`i02(?&3?MTq2tt7Y$_8Yzxd$vwaQ{K}(7jTS0K*JCK2< zc~#wn6jKAOQFT47ABanHYg_%%-PvX~Lf(DK``H-dv1Bg)2!5iaHkSX*;&y6_y*yfD z$z~{{aAyMB==PUC*#0eiSc?%oHTV zss9SI9c&9xA%F7fsLVCCaI*K1|H!OpGIpI^^jmrUy(p_X8k*9YG-KnxeY9<2t2-}j zTs@d1H|k!eO(H8WR4k#;8VnHNU!T znRWbxZ5P$f(#M$X7w&f!?XjKx-R6Rky%<~2*8WPfwZA*bZX(C83Y%?vw{`)tQ5Z%t z(H4H6l*4-}}!!;fnSBZUu|9Dd;AARple{N*M)f8dIZiIFCXFQ>4@-!Y#GX)1sMr+nVTzu|#I$>xo?y6gm);TSfXg&r2? zqWZB$%BR!oR=b-iO?u|HKBhdZ(Yco9#kk*Y%YpRNo_1Hi9AvE1Rk&X_uj9;dr!wA~ zbR~fkzLy<-ax8p-EBr`>f5Zy!1-}P{Co{D4!GnEz&@a`SwVbeTXdvPn?cZR4$feNV80XdNFjWq#0(B|Xu7Tov zsV)hcX=n>Lonuc=)lBOjwmEe@7@V3YCJE>LD%bmH*ZXkZ!`IPhl-r3=8Xm6?qmcA% z4;@uwp^T}pFx**}I?Y(1ll&&M_)ut4YiQ=tASy_+_M!o(_y>`;S;~Nz>U|jX4)V$b zD_gW3mO3n9eukwxDO2qhxD>%bbvEI10{zoCscBvVW48v5Y-pi;?ft9mQm=e(4DC{pP*y(s+1~r z4%*k4`VES~lk-Pg$7r{XAw`7_+gY7zK+1fQfr+dQL`gJM41QZzWXtioB1PL}b;p*_ zX6`#?T^&gz83h9sT1Dv3aB|Kz3ATgzVeYIg+BtYFRQ62MH0jAWr8-@sd$J;#$UM|O z+PM^QQD{kqin}LqZCQqU@Aj^4%UmVv zTE8=VQnXP=5pUk)EYW|X@bQ#c3-w>9dXHtU`VXQ_h}cKQ!~db+am!IVvAb32MY}_@ z_DVyINh#-7fVrl1p|Qm@!$I7nlfuz5>l@3-EJ?*~K|5xH?6kB} z&y9uaO?F_%;`J_x!@G>&NaxxytLd1R;-73Qz@~FHvqRoF{xh)PVrB12P&P?$%y)=O z%k0je3g?KwVS`%uc2^63%%i1)j(7@9_sIE*<`FCX3n@cntUir;l8xtL;Th7fD-lmQ zcpBc3tHq;P%H`SjNfUiH!LiOWR_HEU}3Bsh(>keEa;NC}#?s145O*E>cN=?H z4E=wqUvFpmCsdS^^mLMT-Y2@=b6xKj^ImV3J}_G$`K>q0H9ki15$*#;`QpP1`O@6g zGz)8@{v<0B2YvWWVj4jJVaL2d%nAD`3-WSzZ%gMw*==O!jdIe)8$>sUf0sgjWfpag zsZu+?4=BAA>dcAmA8S;SYL?d?RT<1z8B|+&HN0K*?|-*h@vXF%oQ~8f{3Et@!t-oF#5|Ue^_%SMPZr&}43skX zS~j*~ul;YffQ`xsb#*^>wWB6*t-W}%VG`Ffd=GRtJdv22Lbzl{+DzEOI=E(SXjP9k zE`f{c8|<`qznQcsUj(TYJtcCUtEdO3O$FuIJ!bIVsZQSF->9AZoBsm; z9^A#hpY5|5)>^koo85J`KiauyW5+D(v~?4=tTXqaB`)intIkY(G>aP5?$OsxwfcN+ zO25w13pBN++a+}4(r{g&Uf7beW95ax4}-4+Umf&8UB*>)8Q)13-8Sw0S`DH?+aUB8 zqSiSxPcIYKO*O)u_EC6 zYC8W3V+XfM0EL0O!0_;seDjjla7=7VucDY|_IJfBA!Y-i+L|6!QKtTS2)>%K2;D59 zYs7Jc%W;yy>F)?btc7FSb~6Tz4Sr%0tr>&;_O`6YC)DIU?g@Nk(PwW&oC$uX5Qy6g zl;L~Gp4knJjF?b!EG6^XcY!=EmM=b5o?>02SOj!0-sn8*WZ3O!2>m5>pVr`B@3Tv2 zfGJgK!T0a;If?7 zCFQ{*tTGR?;fFjSY$6vO3btYmYW4H}^uznOg7h%VlP%tP0J~W!^MZ}q?@kdlWeJY4*#X*70=-}n}+g^ExiUG!~{Pc)QV!lp1*O~ zHafcp_Jo5Ucf@jJ^PaK;a?vK=IrU%;|)FGmTMj55Y9wQ;LME!O6-_D47g-%MS0u?y7l zso6eCHEQBhgZpb*`m!F)T)obO->(BMMSD#p?z1b=-<@=zWpLs4-Y;-=N5Z5cm?U%6 zB2|YD#mK>s>JX8_eQ`}w<-KA%b>GFRdn$Z8MZuXD4qliX3okEC9)boxa%x@&W0XJ2 z68C8B{}N}aa+j%ooev4@9mGNrq1EnC;da9ayQyX_qbnieV6XUrJ-@ws%Jv;D+n&p!6UL~@wD^HLVZ{&r4ue;0KRbZpcv!o!cUn|vg$nvX zt-b%L_~OD{6pqqo50NawkA(-DFjf^~BAb7*Xq}dpq*ToV;tLuk40|Z>6&mJ^YM9V< zFe>QdunHPJ!B$nA&0lJRhpOJD1`khsHO= zgH}U?Zw~l2bLKaH1@|8Q zNR>`M=WanT2bIx$Tnn3Z-MH%{Ewua z)$Vp83@+YvHUcUd;0v5QBPFG2I0WXmn*ju>87wo+!0`X@kC<8a371i0_iXc>nc@k* zvEXo9U5!`e@;&{hqZ*{ErE_*vUK)Hw9YNhQI!NVFb1@^LYnIWL^(**xLh#6-RuiRy zF{_W6@B}|1Jvg{e|7~^;&NpeNK0RHne2%eoBn1ryy>28 zHD{!FriLdhKHPTWP0w!=1@S*EN>e;qvL^pk`sd*9@fi+AYIiz_Q;Up%+GqNLJa zILJTb zm;2oco}5d|XIy0axgQsjLFH!QoYIOpI;h_Uh&Bqwtcy6wN`0<$;_%Lom8bc=|7q@V zafO3uPMm5b<9zF>Z-IW!)B1}07Eb*fJSK?cWV=zFs#hlub4wRgmU;XY0ZMxP`CYvK z1KhS~(Sowlg`S=SYv5ZPu!-k@VFNq^h7a)U=6$cimHSPY19q5wJQoHQcq$jo_f-0q zdddWg{GPIfU-y*GzTINya$ppY16%>*0(rn_;7VW&kPj39 zV}WtNc%TrN089iX0apQ61J?kPfg<2qUGOb2EF#lZEz4Zuv`M&PT!O~B2- zEZ`QP1h^F_1#Sao19N~fU@kBZm=BZ#UjuFj765ku3xP$zV&LmQ1yBk2fdH@sr~;M( z%YZw9yMX1u3gGSmo;g(O?BSP;(!U)3T{=wvhU?!Y`gf`RjnKc5`gfWBU9NwMaj9aA zP>d0ZF+wp$D8>lI7@-&=6k~*9j8KdbiZN0#Mk>Zg#Tcm=BNbz$VvJObk%}==F-GQi z2CRkFdf+F(I$%BU2=L#)Pk{}<&w&2{ehzE|egXUvcof(KJO=y0W<m@1Q-U407e0MKt3=Ym;_7)rUKJ}8-SaD5@0qk z54asz1XKc5z+J#fpa%FB5CXmfd=K~m@DT80U>)#N;OD@jz~jJEz|+99z&4-}coFy` zum^YrcpZ2Xcnf$3hyd>c9|DJgPk=U{{eUjsbf7bk37iS^0?r2d0_On(fWg4Uz@@Zx_#?0fcm;SJcoTRFcn638Ex^BkBS0IFIfe`Q=;CsLi zfQNt|1M7gF0zU^H1s(^U0-gq*1-1c=z>B~ifjz)0!0W)9z+1pOKm>Rn_z*Y@d;+uq z?FUi6KxZHmI1}gvoDK8^&I1MjgMo{IOM%OQTwn|^4wwjB155#?12+IS0VTj}U>=| z3h+AcCh!*U4iEv}2R;N21D^nGK>G{HKQMbflfv2lvI@F|UVv{X{Q#32AASoL`O7?2 zr4^iz>_g zv2Ac3554MFo_u;Ndem-t0GkwqDeF6Dqa#AYBSUAr= zUr6P@3P1T*<4--!DY;|O9GDFjDzjco7cVYbXgd>rJz;+d{05j?zM!mR5#A-YmoJ=S z@!DS8Rb)GP8m~pnTm4jUWr@YP3rp`PvtN~z{pvYH_@h8a)-hQ?47U{FvDf)JPTgad4UOciCSP$$1nt=@Bh)2XrieC-*q2)f{ zATS=>H{1Bzk=6qH{UB>S;pZAvPqpplq?h<)`DguUWvIp6#ad7;STwJEcFFMJmyH;@ zB9FA@{tP?*Oyc8qC*H<=zU_W1?g0h1-K%Z)`L??vs4YBT zyDyHTL$%}ah`v@p>E{D8fyF>Auoe(*@x~_meG>hm-1Kh?Zl6~FCATe_vnz~W(6v7;b-*&L`XYy{7-Ja|KvAmyB z7$=sgWT(x>wNDhh79E%q<=8d^5)~+V=?hbSw z{&R4f3XB+GwNsqvi)}>y(%TR-7`_&73tz2`PqqAj8=oCkIG@0MEszJ!>-g5MqO5Y! zf`Gq#(ZUitq{q`4_x*&sm2lg6A~=eA%FlCo7w;C^Z&5|m%f#!0pKqiUZ>h^u@kZfS zZTm4Vibj;*4E$cgZ!zgvrA4E+L#Tc0r@ZbbOf_MZ=fynLmQ_D%cu$O{Ja54LKA@R+ zPCZA%-5Djp^dST{X&fT#LE5Ss3{z&QE%)6CNd|ajD$M064k1L(oODM}lC8n2DS+2#uKmHBS6Z5;%)Xy{cU4);H zr|oCDSH;_h+hzFG^3-@?(O~tVc%Sg6IuoC?02!n?5Eu{K3Wx@!C7c_9oxnjr$ml0L zhwOLBKjqd1@a6Che`%9l-=!7v0(X=x^jG>8&Gju}j=W$|>724Tz5y`i03S1zic;o^ zzS4>^A8e&S{`qCTN+v75=!8k-S^(&0p5T9x_b(IwUp@{0!c)(H=pPH{XP(giKJO=` z{|n-$S3NoYMHQ!1{GvS{&@W&Apq&i`gIk{`tluwy|AJG&zwi_jfJWt^K*aJhPx5fN zoyH02|AP3h{xtk_u%}c3&_mtm|73%bCTK=f_hg^1j=#??q z7mc6s$yYk&ThHG4H9McbV_3;v+x=tv*)-<;oFm7^4t;w}&*EP{{n+j8@{fIEaM{Ej zhsSjN`vpDjdhzu!yK+~~{n6Tw#{Awq-yZX|_n-LB)|-xw$@$^5pGax2kGEdTrP-;~UsHGtwjfq#SBp8>99(cBWE8~?rdZ%N`me3<2b z2>+c4{+9@WT_#!i%;^&RhYzy?DE$%m?{oWCe!aqP(>?>g1Brga4QYn9#rTI4{jH)i z{%i1War@6Ho2N-ZMd=*lzX|_Vw?7{8Cz$cyjlYNdX+0g~K4{jj8}7q^Nx&Rn6|f%I z4jcqhiQ69-58Mh=18adTzyUxwG?uj3@6P&4CT=|Jd0szh>Q&>fnpQY&hHrLR`2y2d zSyCDfPY}fAKX<{RMHT7`OkDfv@~>DFSUBe-{&VjrU3yadlI3m)(_cc*>UhLmkCX)zkef~whz~VWj{xaXh!Wkvg3a%YrQdBV0SH94vv=_5AY_tMQ z`3$w=>M6XB@YGywrZ3MoOi`v^H*LninS&DZs<2W}w8D-iEF9&#(U-^TP!n*` zk<3%^bn;B`+&`1&D30SP5+0u&!FeXqBelsh0C1^L$jjs@6O)vm&{%o`@3)B_Rfe-3 zlV7sm*n;VWP64xyu#&I}TZzbfh;QZ~Q?Jezpq}n@hLKKUzMZtD1k9p@zF}UOPg){( zl(AXBTV*Ay7`Uon`c>BwSmkiO9Z65oUx=ghJ5Kidbo}F{Ob0h?ee|-*1HEP0oFTr7GByEt^9>s^%ueSbJF=e2$G1tx>9ZZY&hwP$pJdT* z6kLg@r|{OF1n;TipHXma68!Fdmyz0(-wDPAW)c>CUF}5mbj4S{cCz@T>bO-uC%|v2 zK>kh{>gmR>j`w8#>Ub0VL1BK!_pb|CZ&x7QMhf7PYdYbD$Nkgy>_v;0Rg}-0?`H*G zKD*4!Df(ZjqJD-rjXApwi+>5Ru;GFio+%DWT7+4Gt2@?Xrmiz?3uzGnb_ zKsYtOsI}jn`9*u&@561JLz{1SPR>Z*RfUCxLwyAc7WfRom9TGRS;dmFIqIuL%OF5M z=Xuidu}2_#2f)M^4(F$L_jfWmqC2d4CxR8vi7m}B>*sz+4C6>X;i3{}H`DlKT*JH&ckR*G`c_e4 zm*jPhd~zV+6s8?CjN&~ptZ0~ldp8mX%kjSz|2aI}{IDChqd+$9 z@~Z_1Ze&ak*zfCY{z$`pJ#M1K{WE0?j$h!YFypVfeu%GV%J?BZMulmGMZVjX`R**M zkbMwOwjEK=WO$OfdBFW^!fUeO{%L@&SXjEiSEl`8jct-&%_(0}UWr`RSGr){BKGv= z-=TB|+7b0UQ5yH-;ZEb);-bQ7SB)!~K4bjQei!$gzsmFMB>3ziiax#w z{-Iwo{(>(Nf3i9_RX3IGgEnn(<;TV^^;5KHPGCWxGFCg{&Hi?YnsUhRNAMR5ZWKnc@Vk{z6k}Br)%ow8D*D=c~U0-uyNYX<`GxE z!q5D$bV=!g0G+_ea3j_*Kl22)C-wNYr2xm_{{r-D1K-`ZB*p(Z>F<>UcT)Ucfc|rn zq;XvNd`|i=PJ;V%(|=i#G)@=&6O-UR-Sl6ZB#qNWe@PPDr7xJ9B)CsE{ZA%I<8;yAm<0FfrvDE~(l}l8 zznKL0>8AhfBx#&3`VS|;eY)vCmL!eSMSl+#J&9xc@$`>A^$v*0ngits2|x2>o^nn? zI`Q-i|0#4p;1lkVLd?%R!96SixBQOBe~J?b;wGbiR6-iZ%& z{*naTUk3ei6Vf=H^j9U|{xaylJ0XqJN&j~eaDN%}e?K9O(@Fm?5^x_!|CL|7|M_)7 z8gcX+{GY%5?o7b_WzfGnA&t{X|C*K_=P)B{&Q;* z+^3uV`AO1P5<3V(l}l8ePlcaIF=>KUF+^3uVUnWW8 zbkYB865OYo{vAouI9>F=kp%Z~^j~~x9ng$v#YyGQe@~J|9Q_9W$vYqicVhq3ngsXh zre6!x#5L;aqCYbU?$b?w&m?J_F8T)~!F{^vADSeM(?$Q7B)CsE{S%U;ak}WgAqno& zP5&)P(l}l84`#<4^vC_&_-9OU4jElPJ&y>p9ufwp?_YIG!pO^UpxJ(iPsj6zrtr7lJ;Ts#@@xZ%H7dh zF;B{*CJ9cv*vumV{|T|HP6yZ#%@f>HJ0|Cu6X8b(0j0?q<0hSieaz-52$Wu;eDC@s z>AC55;h#KUa^bZTXH4>4JlZ$Ses^@$;`V6sY+}umJbf)8jT7KEi?C$ue=_0gzQ#tHC$F8co?0r!_d|Bn*VIGyybPr&_U(7z=i4LAMtpTmZqg!iv4C^me5 zu?XX5p77-B2{;GrNKm9oTar$kj{9WuXTgr)0qxpAJ*{q>P|CGk)=#IGTa#b%t z15{Kx2yJHi8X{=`pZt6>}x^`;u48GMDQ3d9wr~IZA&oG|yb98i_rxnure}eLjJ2oyH zsD_xIp87Tf+E0B8^mE?b{%g?}k)IUGAE~fxAn04a^Q?!luP_HcCmoq{keA}@!+i_j z;M~aj0YLt;wNVmSh?O*t$0vtMtF8{=Z~TO)vc$h^aar^nt?JB={}96Jd}|+`8GvZd zUR#$g|}fbji2-aAK-hv(o?#IeL0hho5Ixs zYXODTxqwafyX@@AjV(1#gY72z5`T$qN>6SAy*uk6;n7b|_ZWb<(ERjt;>p2z*Hb^| z+pSZdPo56or+FDRU1r48j?lu^X;+t_6~&hw5&iU3TxpIv=^KwE|B~V@MaR3`?^D$Z zug{LBr@r&`&-HZpUgcr^`sZ8E*tr77T~Vv8kLc4zXS-UDL^tJUD4m4z6ScX6_HOAM zU(}|K;>g~getIg-bUO}qW#U3BtXrR28B-sG(ZD$}P%~GDiTG{_pvMfznn{_(=BCf` zF0pk;c`BWCv2<(;7;(v&a#LTYpLxP4%FAsFN*CVlSy1Ai%fE_J{$YG@K}i`$c|5m* zdoFN0uowsciFB;NO?Z~`oZOV|J>$J}@6|2o-f#Rf-TRY6>4vsehc?S5VjN*Ahb%xp z^CYbL2&WvRm+hHTKCj$g>1ibmPZj9_HXSA}*?cQb22bG;PWMmcb2R}(r*k01U316L zV9OGc(J-fMcKIFHd-QNxYSBXUSW66r(XZiA56T33Rslg^4e%iFQ{Y#CoBn-#tBpOw zQ*-~AE*ZcbpUT^zOUhf;7E$ETy^*WH=HTJIjAF=bVgPm~| z0Ai&lTQvIVsc)61e&$KT%HTa|d0?CJ_%gYp6f2|AGKni8kD7Lg#dhX(xaD$*^{|ZD zn550WdzaED0}ldgf%U*IfTw}yftP_dfP+8;NaW99%jo-siKoh;7{1r}h3d>!-svm-t`xFy)({?e>!gRA8?KZw-RPk&lv3J z<@L({=RIPec!Kxwb3YyTmwJ1>d(QHD|9ZC9lxrs%m)e)c%unMlmF*xqyk(CoK8E=3 zOh7+9=T`a_GvILYr_y&vr4O@Moc)mgGH~(^4Z7Nq2fp9KMTrlv#skc zEt^yFwNlLNS})eQIf7Q(;IzN^ZyKo6IMq)(KhY|1ekc15SV?Ls2pz#Kqv zbRNoYzt6PoS*ahbw%ruQ`F(o(w3jNF!gkZ8_?k~=thCaU&1wf{Hf{&_o`r)m$8!7< zpT$?u_f*a=U0imBZ!D9!IRVDU#f#`wd;^OyVOQb1P3+9c*?|`gA7q`wH0xpz>8W(? z=c#n2S%?M}58@DsVoA~?*7OZDeT3{F>Zj)*Gl4F@WATDAnU^V>^A)Qf(K%E7^c;7q z*DLtwt6pziiP!s!n_|z0ZuXiy{+@6r%cDcnbZGjN{0$>}hEAPD(@#(3?<~sMoj>6^ z9r;^(kJr1U+UuQO<@G-D4X^jcrS@}~*Zc8uD}UdjL7pssbW~P%czpJ*)z}~dlRhTj zl{));g8UsO4Igq|rH)a#T@0F=aVFZlUdA+#X8C3_anZK_@6aT zgNf(P)90ms`2WY=yTHd?mHESGCTST+3PlPQx%ewBG=-*3(^5*Hv}rPFL(?SWQVIo! z$z*b&X%aG%URYeJBA^yUK}A7C1w|HI6hu^%s))FYii+qeC|=e@1wmz%RW9%M`b`i2vT7q*AW~@O#*gwRsTV=K#!`FBrdV-1ON^ z2i=2dxj3BHhkHd)Z578@{`g&}Z)9@#TkS;Ug@r>nL|Vh#T@+6r8QWPS%A^u>eQw71 zzfQuZUWh+_7Y67t;s5_Uek|LEF!$md1VjoIF(bJ6O9zWBVzCvHqv#KAj`i z3N!9Yuzc38*?zd@AIN?2-D})@@!p2;atG}P(+a#;kR2^Rw!;xj&zLFf#uEX%3&pV! z$kf&#*z+#OoydS4fJ*`XhbR1U)D57~|Gi-z6c6KjC-D3--}V`^%{S)tqb1zY4fF2> zy)6&{eTVGdKzvPsq#+t$D?B#YQ!1ko5(>PKc>NAo$hl30J?Dbu5Gi8Wy%N0|2BEp^MzJ-clK@1dx}0R*e3B#l4X>*}-{ zKV68ve~dT7K(m#0%Xv1sNzuzP^R0g{%Fm|L;w7AA^~+bByz-P)hzIE`bN=|H-MX>n zu-&g8s&oBnT-Vf`Zdn8OZ12{s-wd>i4~OZuLnQ>Y(Dv*&_<7$l``@SDs&(r0_j#E8 zJoAC8ejDl|@Hf51=t6O)b^tt##SLfa=$&l>*0BxXAch7Lni{WEfMc^+0 z+zr2MzRDdH=B7&e$M9|d&wb#z4BtXV6qgywe$=NP2e=P-hV>A544ovQJq{YzE*=4` z=yz-KQzk&%?F)W5# z1dVZExR=H7G0Yo)zY?$te%bnN!gT#(cn^SQ19)!7m+tsuzj_&PwyxzeL-}1M_vq$D z@Lmi0FYvW}6wCE=0Q38H0OQB_G9CQ@`u`{(b(QX?IDX7EX1;C2aOt;WaJ2h>=Z&6t zqI0&sL%+enz>(>Mx~bTfEfhENlr(T-6SyeCDU3riJTT1JMt=7gW{e|XaaT;v8-=IL zw^rjhzwjAT6bILliwANueS>q{@rC2g8zrxQErz@?Kk?JA*Joctw*>z9eH}vQw}J@# z?3d;e>1&)AY;bxUSe117E zE?r<@+Qf^-LSYhG!9fQv@bFrr@rkiqKHuNqfQNp~1MtT$>m_jnn%TFq4)90&vbr9Z zP8|7qa1kHB4uC%g5Vl)9zw=_~|*6p}S#oLu`n{He`2RENYKJeQcQ!d>xxXu3!9LvgI?^Kd){rOZ1@eGjzLmbL;k>L2|y zkVRiix1FF<*W%H!iZm!opyKy9=xkqMy5Enh!NdN_ps_Cx(2Qf!9|7Gl z^r0+cj{8?JQzGp-&=!D3oil0U!{d2P)%5CXXQht!(GjYU>2@(_Cm0&%YE(tSD*kQ& zZ6VB@i}`ifbk`3WtBYfIje*`wKrjxY3GN-q8q$^oyf42PoAsd;yax&Yc*&`Q4R{FfB;ZBB9E4lPH~|>W z9OT;;m|2hZ;EPp;;W4DR3ibFGuruHIjtp1em}KH#1fF@s^fEsW25!!EUf$TeC%y*w zwP0o5`}32uwV*W{+5%kK2BY}di4XIP`LoO9Gx>|)zW})N@b&YL0LMZa0_@J{JSP9m z;JXC4z4-deg|z#C+XEWo#dms0&yVW&BuM`O=$9F~4U2W+YT&K}>;>e;@&g0D_|1MF z$^`fq;C9zA*7o7gV&Luuj=H_wP-76c7Pxy24!84T*@Y{odfwFo8s}YeP^R*J5GeCN z8wdUZKqo6Lelt;Sm%)A?%=Z0L;;$snGMY5ctuZ{e12>8EhU?uyh}*+H{zp;H=u=t5 zu7A&iJ{x@gFkb|20O>shaXR|_x?b%94$pw9S-{l+R|y{&e?0xE9N1SFKBl7?X6q*_ zB~WSua0AFM`Z;cR#ZTbq=VicoerCw3iojiIcKk6({>-vF#9+F@{Q`vuVG_PGF$R;*UvpwmuW z+|kBtb#aW}VuORx{rTby2+oG&+JLt@3&uvh) zdKmOMF?7ElPlG3RJca+WKTu{o1${B-j`2S*o`Ti}+5*r@$yP(4my)fn1TA(vg}*n0 z7CWATwhy!#gjq_qdK~mcpi{Q8efsRg4D}-Li-C8?Q{d*@7&D#%UjzIK@J7Z{(AI($ z8Bc*f5BRlk6B$qOP*@SP4InY>e$&^_2L5W`+l-rVzeY5Fdr)>a0PX`k4p2zP(SXwd zTL8NN*8=VYJPddmPzitM0_x~LpdYXYa2`<4{U*-wexN4 zz#IV$YRd34!|>v*6Jg7ye#tlP155cH=( zKhj61&zv04-|CyNHg9Ome^dS z?*Q-CLEx?fj%|oIzpNoLAZV=Xq*ujWM zLZ+MjAy1y!W$PyJi-BjI)nVweq72v!e5b*?eJt%Ie*MV*%K$e4_5mITya<@fxB@x> z-H9azLz+W zcoJ@&1F$ZqK8!v>W~$!mrQdxKJR^W{pL+*x>Hu`V0bjq2c>(N~0nf1AyfL+kW7;mz zJCSzQDStTEg0>fMHFMnzfgMSLMDscM!7XepT6 z@O5Q9C@aQcuLk~3eDRTA5oYWS!`_RG6de^17XY`*@Ei#Lu7$apX}Vdv2TI)xoRR+u zT!(;uL5b`KJmoO*K7w-f$8iXF8%G5?Bk`Q^$Bv>0!SgvLoHpYJw$jZ6fm}dKK&__U@W9Wgt8??QkmF&AgzZLY@z8kcMK#T3WLHh-0v3)ma z>Z4`)ZqSbgJ<@k$d_Ns{2hQET8@L|e78qQh?*?rMv>HQm`)=Sb1AZ~^x?eSYH}E$A zzrx_%z8m7#*v3iu6f7#?1IZ2$Uhdf^~1*868c{n10OadJhb}bx=lWB z{q`wEXM;v=`tQJO<1-gHBtz8!SIYn0x~fSSBPNU`I z7Pz>+l5WDkhf%gKuzZo09>56TGQh2X9{^UtuNzEw>?`jz=Bwd`3F3V8N#N#lGkop3 z*7nA(b81^!+tRgoF5{rVT6tJ=Nw&XFslhze4Zq?9b~ri5U0XP+oR^ zKsQ2B(#NMIOXeTXTJ~ekJTbOgJR`0epgnHw(D%seygnFsNWs4Q(FSDEwdVx%Z`rnRYhWXvQEdEVIB>L@<^hjoVg|{uTgU`FpHg>qqStmJ0axJ z;j{nMFIE?F*^%sooaBNQfc~>h^Ndg?ND>;upM9 zSgsK>p#uK7q;6ZKF73V4g3?akI7f%kp!uEPtY5I8kromMU%{@6^oK{!lNp zC`{+0OK{J8U|qs_2L!z%@7PmKd~pshg6(9IEN)n0=RTgm-Q#G55}(=dqd_vaLHuL~ z(traLV_2cKc@KNAv4Dp(rqd119{LB4Kc1h=V6$X8v%KCjuUz4o8=ITEG;iF0b{m($>1J3q6U4=xl7-*tk9&LCBsc51Vf9Y3=bjYwT*;(AtC7)q1=9Zo4{~ z(%s#jvvqA9O&dLHYfEN*x;@?1*yD55($N)zZEf$y13FDUzNQXA_4vH&p;sMU9%gf6 zS8L-8tE=bX-TW?j9Fk*R_r8SCKxgzAMC4%XUxay4XG&TiGNn+I4)z#=L zV8P+}ybgbg1sTl2?%s8R?QUvpYxI?b#fQ8NpfjC4F)n)BrKGzWTX7#rriA-&%v^ut zlGfSP!K#|}m0h|my(v&~Y*$|9y5*SZ!INy=jZHnR9qn=CvwB<8vF=cN1NAW7)z#r| zt_hr0e66ZeEow97@~_7{`$Ot8>g(!9>KXNlIwWyS;-tjsiH(VK6WbGe67NiWIB|F4 z!Nd;|zfQcEI5;^!c}lV^nMv+UzCHQz*jP6%V zZfE9e>~3mTuTvMQ9cqtyi@HYLp#DkS zqrRfPt^Un2$9(Bu!p%lFlG{WFSv6k8l9BGD>SdbJ{9#fTygB8FN2F$k$-x>os4Bj}PuDyaU9JjcB za^F1XyA(1R;A+L4&Vv@YQA5<_htj@DQk60LNZM{E;#yRo|iZA z;k+1|?HnCRJq}ZLE#xtl$E4C0)*=R z;R3{yQS6k%b*!B6Z`W^XJ!=gXa`?JN*-oWw;o}I4%NA<;J*>xblT4*^3ra|=&S9A? z&pncOkY*&y`6lDc<<_uUe+H3HjvPYcNnuB45XbmlsQT4(?!^Ag2CJI-W_*p%8gY32)@ zbNSQ3dYqxSuTvnCN#>&i&<{>(aa(d2XX@OFP;?}1+*9nIr_e2bkuY>^^@XC-c3g;8 zA1Y?8({#=+7t$?@&dA=QW40!vU`-|VH$cW=sm~o%Al&5(cdQl2D;*h%{ZZ#wNbb*I z*K9GvW>8bF&x=xi4^fsc;uQ%Q?Ipvcem#bZlRU=dL%pQ|XaU{2z_=z>kblRw^_2cn=0_I@Y)`2)yudhnQL3=Cu zst|na%&JrZ@F3tZ-}jd=6TY)C3Uvm@K6o^bT8Imwwqd3?F)=xA-<9Ls&82f9Ngjh> zzH`oN>O8zCFj-PJsk?YrXI09=a~)MF3!j5|HfRKk3xCfCjX?Ky4y&~r85w;kp0FCf%*k_*?gv)^^ z?icu;mZ?e|16U4N3S8Xx0^mOb_%&eZ`5NwcT~+FPfCG$My3_GCl^9(p4(gi`8O6wp z3M|QQMta`XSC#sZfm(bCvkbK2OR#kR_dJ8&h3{ytD%AxT0(=4XxbI`Y&j9@x!$%&= zx5kHidax=L2h~GpJAk9j_i%hG46sbtU+_!a1y&NFopBmzy8fgOU4H##Ggs5hpMEF! zl~-N@N8ArGb5A!lldVW0>EhlBAoS~Y=uR+L3!eQ=2+wX- zXso9m4Y$?o$fG@nG4(zSH~x6-9kt&^!eQQ0HgvXXI(28~1BfS(mr6y5Ie4$ujXVN_ z1X*C(*f6z18AmLOye!D&a&pX=0+NrGTg*DS-8t$c3&YzdwHgn(G=|Fu`uXZ-Z7nUe z!l}dNxL1~!L7RBa!xtyo`_X@BO{T$9HviAdt5V+u`~vW0K+P3ZshI$NUk$+AUeHW~ce zVE!6l&h?nfeNe;qZuGu1U-1DAwJ_febDyDG{@)n8{SxmtTfV>Lm;PJ8ylEV(>}dPD zid0Lm-c$mtj)e9ZfVBXc35y;5WqXw)SQ$+2MvJSpS<73iDeta64KmM;)pSEWHEs@= zC>BnmoTrCr;7DUXdzvFMnDA0>>o|_kDrjCP!?M^ZOE?SlX#K65t5Ws1RHf`UY^MEh z4Rhh=lL+@kz!K=_MJ94iYSaTG1t07>=$nMpj~zi6B;}uut|Y=IX&Q+_rZE(&v3w^V zI1$lK{orF&sXqV?z7;wKKr(k8*)epehHp88Qhm( zehF~qT~(>J&uDm!?@RO7KdoWxo~qOzVZIq(%gb+_;kREu&d>L^G&3vdM<&{d9IqTPQoqC zr>phqER|K;)lT&$tc+jhOUB05_GY8Kgc8ng!-7O>H&zDxxOKhMYF@CfDzy!;1MmjG zUcgI$`Co#32q*yF17JO69}qqdO}z9ISbC(HeU`(kuwbuk9Ua&XH5>8lqb3Wuf}t>g zu~}9+2Pd$iMEweyWo{ejSRxF4_6Z6CwcG1;7m88!Xc(LprqL4$xyL0uBv zVj^)dZnGI1L#xYca+gz_DV%N72HF(DK_E5X6ig5pU+Nbz?&tE@WFfU1m5g}mKj5d%b2e-J(^*bCs(`P` zX8U(!(S>L^e7SZj-rB_lI2X5i$U^neC4~8bp8X&!&2MH<=*fiNPN+t47cf*+oKrZQ zRoFQb<4PT;&M#c^<^AX$3S$SEQY&>8g@V~kaX4rCU)Ifj2t?59x@os*7M+$a%{JbG z*WuCsTDxZ8rq8S)>>T3$8WRO}(8dGCca`7$Fy_#>yc!Xg^lCOoP~=?@C>B zCj2z_?L-T}WE+Y>27}DSwiH+CON=hlbuoU4YRUNJcfx=e{$lM$YpQjANZ4au0EXr( zQCn!pdHQj>_QPtfY`?cNTSPfpEY)DTLo_*sGSxqgMPtP6c{eKZ^?{wGSHdMScW-8mso3oE(WV! z^f>6)RD#8r$x)*sr620lr6ADZN~i6&ShL#`!)q=DKnc4VRTBG`V!}2I{s5&6xW?b&oy3uPIC_h$&S1Ye241ZGYPzdKXMJNQm4OmziR`bU zC!$6YKd2KF{Srf4Lf`tb(CElr{#+YmUJ%;3%c|grS?1U$X*}iU=7}9n%`#5q7dhmm zOqL!PaB+r?3Fjim;KjV23v`b5hx7k#-4WtKPDkd#AW3+X`-t?-jU^nG5%FfCEPglU zio88k+%ex69)!B$Fix8~urq!vL&j;DJK@#*%un+B@U5fV^|nLPIiKjDPE|14uLF%= zdVP()x}kAnqJ+n}$05JP{P*dq)Qy180v-k2{tWa(fQ6vF6W<+xXMsNm-{S#m0b2n- z0sIMo8G7v*j#B47i@7n}#KEtCC-`Z-;I~i(Gl6!euU_IOI+XmX{POx?{HN<5+8NXEPM~ z*4Cch(qqloRMWdDy%RkaBg3>Xo(?Y6&QExI5-}Uu4f)-T+q(J&C%p==yuJYng9a!I z8lWg>XqPKCIcP%)Wc@bdruCa`-_IjEOk|osX`8G45LURdZ^B}~=Q_MTjf!do9Ub%;FUIFP$>Cn%qLI#4~4K8h!@aS{N6o@v!!1%q39@pGje;|lqT5!LfTuey15skgbY?RWwQTweNp z%Nod94=?5FEqQ>(Jm9{9_C5$|1CA(bZT({#GVhA0I%J>u6JLcV(R?i-Xs2?%Huw|bf#mY zYwX_GiXEE<-;I66;A5V0Y~~!CW(y*-1lO4;2#63!9@gb!q@`kPmJHaDgYHN4o`UfvIANKfYx^^2o1Zw)pJsLURDF))04-i7d@oH|9ZExI^M(gXJ zgg~LY4lM;!KOx5#Ha9gpgBK5vFJwJIC^}7N&~G`j(YUz{QkV7H!__bH%*%b|6+ZLH zi?Tbgy2o4_)fWWOAId2mP1UJ)17K7)tkd7qvuMM+w~tL0&X9bioZ|rKhTzJ3V$e&D zW-EfwIWF|guTCWZ^?>gkSDiXyL3QdHnEAaA-9Y6)E({{gb=z7qUpHtmudI#&}ebp#L%QI zxo!+iuBg{>;+`YVE!sL}35+ZIV-HU))iBq#(R@8D6;R}*?#083bUmE&5T@tz5bS_4 z36@J2=>D*Pdv_0)=fFkjJtcI*dK$+7`3eJ4Jk2K)OL@FD;0L?AVwRDj|6H5*{72d` zVHlh6FuK}%_8r-YVTSBsWGzbk;<(`9*&aL_6?)V}c^FwB_N>DL?tF#ulK#gnPycMj zbHWKprmsGP$gc_`mWNr!SFQ;0K*$YYVfV*p}Q{Mvo8t^{ApMZN6z8e6wfPVzM7Ptlg{m8*S4)fapGnQ1R9KdOSivXls z*bMs%fW3ex0EdBg65wMne;Hu;?6(QDt$@ej??(Y&0xWi#SFh>Dv9S66j!g2C!^Qmi zW$3>QtihMiRt8>09;e39d;D~HQ}+Mea`Z_C5-ZRz0xtK#p)j8WI2J(jrQl8DOK1=k zpxyz&`oX#CX^zvd8v5x1!oolI9{UQ=h>+Uk#^dxe=#KNqMY0V|uPU(`IBV93FS_zL zYaH+lV+&BX$+|g>* zv=+mS{fXZ_UFo!J@%L;zm*m+vN%Pro^x^ksRi{4Ot;f_^Fw;M0s~JyxYfjEqJ%-r5 zM=UF6E60!X70XWaAzRImaK5uudOPEuo;q6*^;)Z;(Qep(I$MVaT(qO>BgdTq=za6X zJ?DoI|7ex4INmy2bx)0;WW9tZz!?vY)z};$X4W;?U7+_Gn2iT(ghpPtmChVrI}n^t zyvPz;Z4Z9FYE4(C2yblGFoACv?g8!$!?&!&mwu3T`FaiK!A#f*co*Ofz(atS0Y3+f z8@?^(dsd5fH)6i@XD#4WfIkEGGr*?+{{nbF;DXwdY8~ei=f|zpDZ;56(O%C)IQTN1 z{25g+m$OzgBUiHsS2OLaMWGp^Q)EXZ>t8X-Ovzi$Jy@45-~aSFSxCNa+%YshoJmhi zj7`jw_;GAv`Y8(y=kqv4+>h4=#|E(=5k*0rJ1+r zL|k@GT3RbJEa*1IcItKP1wLN$J{@{XJR`_eOwm5*xNu%z{e(O-EQ{%Qx(9p9Fly>^ zvW&OoVYyICY13ixc8@P%TdKt%;13C@Im*+>OY6+Bn zQ$8=_H>2dy^@$eu2(7;ytsic=xUsbBhx!>ohDrTV#g^*Sbl@oPm4d@Si-S`9e`|ad z!jA(aFZRc@$3ZM}43ciGF3Or|FZKKJ5M;JtJrDlfp#I7eNltfji=F{CjKk`9eJQERx~Xd~Ay`d|2z!XS^*l{bU`>5j@F2Jo_y6XRW+3A>ZE)8L+@jJ3Q7B z#*?3NGVvLx#`OHx%;Oq_y;}?SIxZad$lHUoY{Ib+x~Gl+D{x$5GY(}<*loj--G;%O zB+KcY4%*L?;hue!-?7m{@F)rt3p#xc8VBsgHZblOCNMpZ?K7wMQtlMF2 z4q0T^RrUI#^pW5rKLM*_cvMG6kbOOIoWC0h$02TspGg|Nl>TB#n->L#yEv?V>NNOa z(xGJsY+T^|2VQ7mmSq{%4Zh1^(=89VZ6<3oPm(da>y{xWqLI;Q;NA!<{`C*6hEJoG3nO^Uj>y`;>S)F|9aAE=O z&oxM6tMi3`T+Y;ImhofG`(}FEH@0`2-R?)NYi#zp@f&+OHfE6JT{r{|Q+RR%IT3XXxv~{)jZd#{}%|2u6W)hn_dc>PH@lEzI)1K~V@rUU*^Q=X0x6UDB zZfwJX5T+MG(7V(c+l;jZ%SCdA18z__rsm82DXecYvs=jeCG8zwnhB&r_Q^ZOF7ph` z7rB9OWK7Fn?2{VM*^-}Q1p60vNM<{-K^Q-%Q_7>09MAjMs0r6c0i<809MU-feO)04 z3D~dn;rIE>Vcz|<({H+Yp@g3&g0{l&`29WtxN5-qX@V2uhxP9a(EcaDh8O<+PlU}d zs|ao=x;;_fDKrkwF0F3avbws9&t10c;&VGj$CwF>6X)4bW2=YuRHtqO z{PzH8Xcz4Y1 zVqsf;XK@^Va@%-uG$-5)pLznUD~|MQ;aiXWc`G{T^iYOd@P_KtOu%;l&j8i|E&$vB z_zWQRM(FJDl`)Is8QVHC&UOn7i}DrhrZ3ihQ*LWcbCWsOt~X_Ntw_vVha9&A20OWr-{O&IFX3wCi#O7mtBcNa2smgZQq-aW;>3epI>BM_*jY)ZGa z5qK?${kjDu^@6&7d%ukRdK}bo7#RxNjkKhb36wU|>qy!#a&t)(0*C9K!+2+JTX%YW zTgSS_HrEP%*Nn{TcS3ak1PQzhV-cWn9j?&8g)*(}ORZ?Qtmvh7}mvaqC2LdUI3#8E}8Wi#9 zQy%NNX0q)H3a-J5927G|gwbM)l`@zI2p^*??sw_Y>7>k#Jq*pQEiH8Ak-4mlP3nzp zjt*7|TOvSFUYfg9cD4-3)6p@ETeyi#60sXw-%LVuI42++49RZfSvy<{Xv{yZ5xKR- zc2>Ue(ybdYos^YF{c<>??7BfF+qn$|{-WL z*r3!xcY{a6B^=5Fh6QJuvFU_b2FymFFmV|fAL=jo<%Gd~L(e)idJE+fj{g;z@9AWA?iFiixB>0-N%vh<+mi*>shs<1I;O4JR!m0c(x!cY25JywX% z7WDQOQIKms*1doJP<5*1rs~u=fFj@>fZG6H1)Ks}2jEh`djW%hlYk!{&d_^z#*C-@ zc#-V{uElC_c1}PF^~sU7cBOnL4hWhZtR|j~_?Gqyo0+ER*Bu|O#$C1=w&Ap8;N@AYa2l~fwmDO`PxRv!*GLm?JZa<`v}%5 zZ$@7V*bKM`uov(#!2N({0SAEZ`}lqjyz~=c$({L`V`>U0%dlSCoCidg#12p;?QN~LKPi)1} zPNg0~y(C}GAsClEfCWZpNSS;A-Qi0b<#ET+X3n1%7=NsZy^%ul(4!*z@ zS~ZTcvV&d11LjNz=MI~5{Y(6dEp*Gd(vA0Gp9^5*v!$WSMH4?dLRgw6*b? zwvKjTjZ#D+pnHUVRyBj*9?w(COnxVTJyLfR3y>`R9HQkVKt!I1F1|eX+)V2=SdKyc2+GT>GugmWx zZ?N?FNUIw^S~xlK9Anmixm;s6Cv*Yq+1L_@TRe3lwSPWuz#Ftd*VeenkJ{XVJ0B&s zm^p)RlIoTfIAVeHZ+sgXXO z-cA1eNkh?xd|j_A5N(0NPH$m3nWE;r*!75(U^0mbIBsd{Xv8GQdM?%=11>f-m!(Q- zki%^q9i7&kMk%yt3v!QT?poYvmyv7Gwy+-+J1zfqYf;re2x^ZV`Ab*Kyqoyd-yCBn>WEZXE zM6^%DwXdCSmY6$Wy`E2qp$yCMR6~|T7SFEk* zs>oK1RP2U-_}h zdn>ffN)Vf{H)VPv9Qvzu;Ar*@@RCY7?sxEs3p(aoj|G zRpQ3PCldE19!~rOcTxW-F*7+Qd0cX7@{HtJ=tCxw|CoGh@;%89qZj#H@+--QlaD8V zmHZ=ar#`6SsEU)guwj1EV%M?8H(BvPP;&dTnA{;>Y^F_HGqaOsv}h5lteIJ5%(kVA zl?`1>rnEM}69fqpZtPgcZQ9s^ znwuuV%DLLCgVU|eCZL%s*>pn|DOWw3iB+0xBV#6s^`uy#+K^ef1YuH25xr4TMtR$& zG9U$#T`uaeIU*KRX%bpDZPLwCEFutU6FN8(1jnmxY+ul+Y)iMelr{*<$RbGeost7> z8@jC{&b%aAqKUv_kMWGng#lOrPt1P#P7qqWqtWdNT#NMy6y%YhJwZ;am~OOg(I(t{ z({+x`eiWW3hEc-MJU*n&zpnI|CDCYF+4?te;wnve{;3BXI{g$wt_SNgCZ^lF#^CZ)k?p>{_WlLfHPe z+8&AcUI^``p7wS^7We81ZlAZFz-YoX?LUDP+hcJH#VXZ|{^vZkO`kw<5yb1rr#Hoqa#My}<^gtIUE>FBSadYC%#1|4@gBiLv>=X-ze%AuMgKOr@&a+@<5^&Z6giGb^ zH0bigKb-qbdlYooruMtcKyhNhR^#EQs|(mWI)fg$tQ}r#5hU_oLZt|7)?UTVf)ppF zSlkcg%cHRSa)nB(F5HhlB0GORqCO4z^6TnRyv6rBmp9HJBCKqL>DcI*p^@yuf+F)% zXxMnv+?Mw2?U;RVCcw8D(#;;;%E8_R{;n5#9MD~$Hv8Wu(HPzH_d<4u0HsmVJ2zvA zSzFmieMHn}tVe4S>%BIa8muic9yB7F(zs>R$83qw!pJO-kXSzRN{F^fX&IxW$~a;{ zbZa~-lr~A@mK^pb@^Ps z*^K(rHr&_7(;(RqZm;f?^5I^t>%WWhf{#rN<@o+(ntp`C@%#DaGJaG)8jatRK7PMH z;V|~c9_P>gg!4&XoEWa(Z8#o(1n=5^t4^H`SOus9tN<(qNIT-eW86iQ(d|j@fa3nT zKmQQtqNaeCr=XW}A9fqImvd`r`|G9@e;6OO+wi9Q{qMLh=a#f`^iuK5{HQuL_E*AC z$ld0UeLDW`Z}_FcX!$F`E*HO2;goY@Y31B9z5APH`pfj;Hrvh&rF1cDfapvS_Z;=n zKUAl#{7>BF@LxEe`081yHAl`0?%UGs*S#Q~eKPmAZF>smF9GKQRsn7VTw=ag;Tt;d z_cy;EzVo-$DL-udU3Dr97l7xb=QRE_n0Epmc$VkKdAX3{z5p5m8v{!33m~gr-De)0 z0yyM_>eSJIMS$gi)d14Cw(sAEz?FNt=K4J8T)RIT_CjD~UemZY7#khjb4yfRJ0tl4 zY@8Ff+$Zf!3=a+gLBC{gz))TzcpkC=2Ly{t7+hhAJS@YVrP^Ce&EkG=C8qAZ$S1inwuTuv=YK#{JD?z zpJ&WU-39mz;PZg{0bc>kKJ-l!55@OPpIPdXSMdrpcwllVo|LSu)9(avUt&p~ zWs6FY$f#sYXyDF79s^YX7eA%Bp`KOm(X~wtnzg~WYWqaDNHuh{uop^bOj7kmQ{k|CeU6T41_pzS4ZZiZACK zPraiu#j)<%`TDK#E8kF=ngRROZ>dbllHz5RDP|PcBsf=OzsbEv{80hutUNfyBs~Pr znLq67SYMpCSEguI__Duu0PLIDm%seVD`VqVRi^MZ&lvr94&VFsR+6;eztc}X*mZZr z)s?9e04o74fX#pbzz)FWfcF4C3b+UGAmA~;F9Cl9%zS5M>IlFIfR%t2z-GVzU6I85bzk_mw-P4X1)vV0Ve=f0$Ko@0Rw;?fXe~z0elp258y$-V}M@*{s@?P z4cr4x0IUSG05$^#06PGe1KtBDl|d_f`M`2!neb=L%x7z6-L^mC2>zetvu;>!{PBDA z?XyyQPVw?w2>f@5N+c^PXVj_L&e}vGG3!X~;x@lT^%3(D2eTPSJw^GyLh~MgKQ6>E z>^%TKUgB8oENSil!TiE;w)n_5ap``x<0Jk|fw1wh-znI`6I)@ zhZv+jG3%HU5%IXV|Kj*rseOPw_oME~%|`mNdAbbzj$hut^IqGQhsGar3}oz zlVwG}*w4~$x+4#1#D{+l5V83fW`zBrZC+m5tkkOo7^70Nk6BQ+x-)U`k%Q9iv6 zrag7=DHY~U<`L>hZTj5A!E@)=ov}%~iTlsAm1<}EgQws7>z6-1bn5{8X(G=5v-atJ zqqS41TeiLFicjKP(02g40B-}_2=IqP^VQhje!s#0=z8qqy%xHscUPzKz?}}-4KUXL zpTIegyRip;4e(ulf7UlOH8?fcx3b7tzGTIcl`!MnN!2ABp9u~6aLp`2`lBvPJLb7$#o~!uW)K`jCcZ9 z=i#cLMRMf^b^`S{>pR&M?csrz4tpL*4}|9{xq|6e=1lr?Oa0CdLlNH#wzVUy|}{I3*@^YTHdQ>d6SKTZEJv}u~YrK&1* z4;5PhdbMNevk$FGOLWAbf?%(wV zOTTvvZ*<$k`mX21HMN^P)?@zw4x ze3zwP3wm$F{hM#I^r!I#)p?QpJK%0h-|#%%!(v4=Kkfg2J!a{16z-h2M0_><>Srwd zKG5Y6#enNqM^%}>+&ikAL#H}=!$4njCIz2-7YZ`+LhqLK1j{#Hw0aW3v1 zi1?rVgr)Dg5cl|n#^90^j;6Z)R&EF6m?4Xqc!L&pMg3bTT(I^-i%SOA9*??li{u0xSKY=WmMImrk3U#AIF6b z;5x4y7q;_GcnEkjM5AJgD z@+FBDP%>YP9E3pUlw-pUXBk|HyB&NTQ}LMy{v%dk{K3llRuON}NjYK{j($Hmuda(@ zWLf)o9*E=dJi|UEJYartUOgShCw{psr=Y`(#7hS^+Rv{#3wMe{IK05PTSDCw$0NQ7 z`MEf9&Wl$A~)BeZ`D(O8U`v2E%%A-pcNjNUEtQi#YKtPSZ9 ztO5Je#Xt;cQ;5XW7BZ$o(;qxFfOns8g&i7PW@`3fTsb+M9Rc%>=`fov3GCNQ$quGl z$}yq)-IixGKU0oN-m3)DPs%ajnrpE9t}IJ-7g#DVD){p@kb%0Mg6r_ITMt0XLKOXsaK=1}x7rR?p3{ju?`l<- zMk%VuLeP{t_4+8O-yLn#y-_O1A_?xTwr>_saeZq(Q^1pqSfSXhZV1rKL(Cre69KZc zJ&(9AKr|0Gd*tr~$WoZ5$Z)+=c5(E$08N6Pkel=ZY$?$?~KZvgnLC>X<9VnHI z)4L87^|xRXr;;4XHCf&>uRE6CKxzySO&o{Rk&u_;D7j3gUac=hRIe{Z$z+x*%HVN+ zj-nUJsTWI7^XfF)PHYl%$>h{<2?7Iqe@R-sx-XuVSHF%WsJXT|+6WBeF(uU!#bV~?hl{4m0U1!Pp?VLXl9r~b1Xb(uQAwqzSEeN(OU5qOkOD#JZe z8MZD|Y9F@zjoP77o~+hg4vZQ79+HeuneExaHudIdFv=T0@0|vtc|1vdd>Xv^xh3`a zX|VFCrf*DxPo8m7KbaP%`dxW8?kLtdRAI;D_^cGh(J^)SG}!DtiE80AnEN2hom!r6 zC|k(r$7Yo)IfP;<8|!)WX(Yc(r^gi}%5bWq?N}FL;$75Id)n2fO0eK*N_pV#n`P+s z@?fdCpM^#wsi=jzc|@r#*nBO0hpwvV$6&C+jGcw3Yszwo7^dzk#}k~Hsc)9!<-ANi zS&kz(D^tHO&x>bWj=Cn;25aqsj9C$pKRPv#d1t`E~ajqic2DP+%e&( z^FHM4puE81O`z45Dfo0D{j5A!sFvo;XFP*KgDiW`M>dU+nnm9FwU zz5?4Z6{jw;E6cOFg?211pe~bK@<{~OMfhaqQ&9f^`61}RaKVlf^70*?X8uTohcEEr zJ!jmytosAwLOl@WPW@;`_1JM?x(Hgv8%|GD_55-y+w&86 zw1Gjjm*q3T;;DqOkxAansUD8-Yk7GzzcW+7lh?Vt`cs5OVuyN`!;=e{Y=3`79)zDz zx#Po;G;>4|;g2~XLWNTyT@@kuGk_tOxO}xNBa0tT?BRLaQCyy_4uE(N%yvv!CNYn^ zXc8A^cSoplUdtrq!3dRgzz|QZ34831uAC~#KuYFgYPm(_Soui1LHVSxSC^6WfjWQz{m#kz8y`-=h0`{J2{S&(0) zW-lw}Df^HNxLV6{d07C~HdS@iZxf8i^JTgHSpep>%VWI`Wx;Y(gLp=N zHOPbQ>t)$|nE>A8irBD?m!Vt$|E=Zu{WXD6DV|);`#?T`dtW?vFeC7ewW?ZK&ReMr zWNR+V=4AwVUtg9tm=WZkk0ZL%>^sQ*Y*}`HMv(ioRk5CjGGgTl^^SN(e~lOh+rwqq zd>H}W15b?&JGMs9@4L$L`)dT*--PE8OXpi4Bf$OLc1LLV-$B2K<{;*>_c=vwrbNu-B{_vxBnbk7==(9I!jqneQOcsWW z`YJPm_e0d{BRrhvXa$$%_(+69W+>A2@$CuKyFMH(Jea%9D#cI%wtaLUEg}w9llvHQ7tG7pZOh>B8w?xRJV#B&7E6>yT2NaeM4f3F-4+K%vV-mFz6g`Az_CQEzFC$byGuP;j=^kW_-_wAk;uhKO9;Vba2N`y}(>}<(Wukr(3&;E)l_6t{pI=ql zHK)dJE<@)Se*3|t-H&4oKHF}{iHY4f-2c)piN(-4hV!=sVI&o|{AQur`Y>+0k?b)8 zD3ffAwyU-a71$W@#5B0=wz@;{hU*kQ2iFGR|NN=lm@RfEPtEBL0(R@(`suil?RMLy z=43-cjIWuR(_1+J|7WJdFY5cHyY*Ga&-_)6O`?Ak&z`gR=81K1AW?PKAO<->+&S)%LorQX$lq0-uUL1!I?#9J)v*fj6IxwSiqEEGXBI+BI63!C%M}|8=e^t^^X&9oOybpVh+W6o z1y;A(8(}37E4^iQa9X_F%cR~pEmj-lZ%oB43NUq$U2ctuYY}=$)M(6G@)N3MYDRQU zxM}nCQ!`3`@r9}Rpnw=wUtSQcFj(BfMi{ds%!O~&zc9)LrSRm4Y@JYFsfm)!oc)AF zQ4%Lfe5XB|$?b+vT2QM>Fd6chG2}jU_S+!GyK(qY43kX*Dt|HGu9ln_jf-W`(^Mn+ z`S%>JovtI(V_?WTd-_hy%oUD`({u#Z%co{__aa|6HLu-~d|M1_`5`_uw@1|O`z!tM zGVhyzwGUoi{^qaq1Mz=pzg@aHeaK1C+EqULY{tJB<1$n)^@i|+?HazJ#!Ona%eHW5 zYDRZ+c>OeZ&5Rov)EvWIK9xG^oA=+Hq-1En-MI<7c>kSx=~VdrAi)_U4}o%d>?kWl zOZTYt0NkrQhMp)lWR8wl&B85qNDDHH&8KMPPUVYi4;*B*{syqyv*Y%R%8jdh$b3N9qQXcB+pCrfe=Yt`RFXFGo+|yot{v&=<~id*TjJvvQbpH zeq1DXRd1DIhJbBjsx^!oQCq{PNpHS5+^^mgB1`8%AKTT#A(BqgSLG77YrXGwVO$zC3^c7O}0aq(mz}0W#NRvYP6ne9;D|O_7 zQDi0qwQ4MWx%x;L&mIv+B=YKOVG5IyIa$3Ni(jcuJSZ;YQ&fK#Z$sdSxFbwtAQJq| zaTMIQp24869IIpwWEix=o8t(`WVJVrz>Pa!iz6U|RkAuJJ=8E?8b?4{8fL{fKy6bO z#Sx@te>_Yv!`2a~O5vi_)o6X^@|AUU8I1S4m=h4wYU6mNUV-{Iyl3JtG>Ksh2$BLBXVI7F-4%lqIBaB24PF}0 zf#-SJG^w`y7b5@r#igv)rTE$DiaiWgioq2w;Hy`mmJ5HqWvz{uq8 zul{I+i-U=>0)ZKP;24@)p1-};HVW5QbpKd*!i4&x5mI(yFsHsAhu)!n6hTY34R6&m z5t4{JQjuPX(6C;PVcy7b>QLL7-1up_JG)TxBOF$slHRhQPA}p zvuN3HTX`l~G*z#UFmV}Gj*S=8J0e80ee6RKf<20frnDnJqV9?^@Su?7@K@t$dZ77! z3=v8=WIvAQ|Gor~O;{Lst&X%6w{Rpi*scJ{QJoZ_%Gx8;iRO&cx(I_fw_K_xLZ?iP z!lF9CjsiYsxY+^65VprqI5*%MVK~!*y<)ssK+Uk-y3Yf$*%NFWQMak{W4JJ50Q-X2Qy;nkfHqCR!a9 zgU9gU9;%~wtU8V`IqY+6#vr}lMLih9A$L(c8$-|=d6~dFBmul7>Wvuc=GX+tC|^%e z1dAOVVXR%n_AUf5&Tdd{ds=-I973L?O+hhTOzNPo`Kg^ z{r)(mzHT!QPKuN{WdFFm4u&VXUgZnX@e2cCU=3>m7P(LoCtTjd*S>U9U>1 zkq{B9G8nU5P5c@2OmUlJNvVrj^@T`2g-j0wwxr^XUGGJiPufPwW4oe?$)F};ndXWZ zf}U}!_r;K?WkJ7)qQyx5l^BL>acn!<5jw>@Zl;(w$3)#1tjmGJ{4r#99qhpD^ zdP@v1g~~ABS7P|${QI}*@!=^l^=t`NlmXTN)eM}nmk!UDNXE>NYh%ca5W5Y{qnct^ z=!1`?-8NibAmOB6Ff|X8GZDjP;(A#O$rlOs5vXyfSG?)%E9d~9u+swJ5>bjw1*v?z z?(JF(%6n|ryTd%?mEmxx&75$l0o!%NGGI2i!M1FVLDXhDqj*k!)HkAdecIByK*96L zoWsQAa;t5KQQ~s-gDBCA!LzN7z;k9VEmFlO4YP0cxhR?m;%xm_QIZaa#Cf(?^n#Mv z9!Ot}l5l82mU#bMl0-kGGU%McmYqpXbQdF$)*{!8j6ZxOs7UDLz1z(lIRk=_xE2^0tHB?#0nsatH` z__>(E{OII%bI2ucLk;ujq4Ny^na>0yy|kw9v%BfS&d0OGA+2D4C?HrFFIZ77wtcMM zEhJhVb)ZhXfNN&j+2j<|{b-oHBJr1yA5XF}B!>M-x!lfG2^)+!I$a#`-oy<^#8$WJ z<@zu7l*sBo+(H(-FUMDid)}+qhN1XT*xdemWLu_~!!1`n9Orli*cIM&XJmQb;%c=0 zTGNZ@PJ}+l*z}m`H#{^(CTuh1Z&W2-k_5!NB434yvpNt^Q96kL`?#?4>c|IC=C8HoF7?GIRSVdtiX}B|13|qZjw?!NIq!lJe5X~iGYcqVp?TBD8^~0JjlU4N zlBSg!hX?SuNJpbr1<>1z+okB+RYw3%zd%zH0c^e>w2630XAcEJb5Z8KrMw}JiBR+L z;RwSqH3#Z@Cxj{JFV#C1hOxNaaa4Wo#4wtjD`YoyF8V3mhHZ}MH(1sEOTz>@(S6_3 z7^Q-aC>3bhhWap#?nEzmX@q238t=@iS{`;Nvea1Lg}mwF)Cg6g!#7UlPOp&&U8f_{ zw;K%o`CaPP2*>tZe@5?!dn}eFqd+AF$6#9NOfK=PkC5E-6m}Pi1M0jOhV8gWjLCg# zgtkL3M60V-`a`r{s+$66(*sr5L*=%f;YvsxamA)kb$FO0J?+9URuXw?7(0MP1EFjT zQ&^G^EOWyJPQ}j;leJi)#=>|WBYQ&_iF-^SyIm7T+q2A?d`poZ}Jyj!hl zUk}r`jNFH*p88Rk0#y~70;;ciCQKU36%FZ?FbUn5AsxEPUtlPSq5LjGnja?V%T^iI z$zc+bP5k;Wo_!Aq=Y$Ce0~$7xwuMPM&}POYNv{u+;7XograSlY09$=nx+Huk>**?@xV0n)mOI(&gNMIwR8WZE z?cy)5Q>yFLHdg2^v8IXZoC|8gmCK0SfqzlS;*OF$RBi&vNC6v^VWQgkzr=StB7lEoFJxvXUIzEUhc$>Py+JSIZlT;wkw8BB52D#z2E z!#EH9Q@7A1XM7~t7Bz?g=EGC>g5l0m3~qz|aw!hmpbtRv(G5CO zD|LfDvLsm=^hu@2Zi8N3k|Wrlwep$I0bJ3m)R(P#GrMDmvZ86y7awIJYtXDooNZHi zTvY391N2eHF$m){rDj;<1f7fDTE-olQ0;cmHO_@967Aa6L3f&gfy+9V$Sz0QisW}q z77T&vg{Ghf;5?{TM4Qx;QW45km|*r^ZGxx zm!evIU9z(jhh3gK=&T@zB#(n8mP0c-nFVz~cMOv!%73vZNS3u5lSTg#qDcy5;|dg6 zvr%270{b$a=^jVI@Y@2wJ}^8ZF$XHC=d8AdWoFe5%xq7u)?&4LVHS7NFXc_YFFA~U z^9hP;p<;T>PKS0v)ds(@v@JU!qodBDH73d>IPKW8raWI{1UjoczZr*e<+3!w7%s}v^@?3%O>EEZ~wWHLZ$}{@Ls(L#P#b>;4E__>?;!J?Vx1 z_sKF`wh#}r(_tH?=ToEr`HH#JhvAk58Qwn9? z;%Ft1l$n&DQi>iZkgcV;Y;kNa#o{ZBTg&m72syRE2y^b{J|W>#<83a>XN%;m<+vin zazi<8Q#79_#}g@@edW2Oh<;Iy$K=YN%kcz?>R9N;{jENbf8Luob>-N6MYe4!J`=&8 z$MS{S(2-U(XWE&LoaVAcwyrc!q`-Pg^P1usD9sTmtX<`JrKoNw&0+H4Q>8fq#q?M? zKHH|AD$V38qWN`kB`%ptE)%gkP7ZR}^GI5)1HC-F6OT%BdfRU1CP8 zx0GYE<@u>HOpyY8pbWDq(Z|ZLM2hsOvdmJZ)mVe{HyD3fP2L?>h9yv{EoB*Pv2H2D zPr+s)_XrjS{qc9Fvp)|J%!GE|K#)HqSw<(L-B>9Kp7rkR6NM+oB4 z-12PhB-Op7%#P(j$=Oa-PY-+NNm9`)XrGGNOa28@vwBH?{S?ed_B%?mxJmv{X&#&0 zyJA?Ri-;!ntL0g}q<()YMlYeymt{pVXAXrb0g6N7=O%J)DGr;&4IzfW$QMoKxl^-y zNgbIEvzOerOv#QUUtf;NP4*q-xNOqzk7X)RzTcjT*-Q4%r)KpMt%id|=o{Q6_mSjR zm1c1hyr49XP3~tyEdDM#TG0PGCAXL0C#J#crTEWNaU;pq7Y1|1A6GZc$ChETiM}Mn z6Y96MhVAWBFo~Y+rt(a#w(V0>@Oe772g00QXR71%SQ!S1(^I7x-1z*t438I=>TSUc zhssR%BswO?mLy9&>PnH_Sgb3_;l-gR#1rU>bUX&ivPfKZm1A+^^VYIlUYu@-<&!=_ z$LJGf7$iRXN;9~z`A!)gFD}0barqmCj?5p+aY$@ZBf)a^`{73CHRYJR_)z}_SsVH{ zKJoh71C{#E1C$yW%l2;`AKoN8*wksjauv?3b<@eG#0gE63I1P-rGTZy?c+;%`7jj4 zOR<<I*3v8m)C=?Ar!)w_{7$%Gu6p0BF+AYYP+X3&%KD-l0>bYSI|@xQVFF~QLzKD|{0EBn$r-43ER_lx z{vY<l>fhd!L+=!^ue?g(QR$YUsU&A|!-0xr zBZ}n;Vy|GuuGe~1#C|PTyqd_{nzN4h#&K!K&jeZ@Ll4RTA<;V?UFOBo$(6$ip?l5*kjc(I&1tm0@mO{_7L z^_2Av8Vh$hDw}}gv)+M-a>)ZgezG68T`^C<@kN^AoH;I~01$c-2{Wu!lno|9pdxip1H0xWlm;CVMkYX#-Qjb9t|b}7 zctSq}J}ncMdAGqzZMX1$4i75-%|1qIy#Vua zj*2{mcDDOWCaVeaOk&iZ{5ZUI7|A01LKh)nhIA(EoVx%{#Sa=J-t1Ch7&?qMyL6xA z7;lsibc&HWpCGxNVPN->c(eNuO(w>h-NzN7>SW-S$kixfyq!SHc(eOZti&6xIH)|( z2SvQYw<17(aIkDx#U7(~oQtrD+FirGG2rdShNYxWnd@$H zj*kys+dY1fvOswFbO`Bb8Y&DeYau1Vr%3HFzW@w6@{n*(w6LEQA>jBUli5>Gt4|C; z$8Sa8;SLFky3DIqKsfxQJwNK~ID>tdW0X_j+NB&mZgmc7fuiuv#`uo>;9kIp+p-b1 z&af581|300QMC=o+616*BYOPqM7}Qb@-<1TCkXg{4VSVm^J*UuP6z?~9h@K51>xU) zmePfkKo@1BL^oj9V8@T37wDpq(u9HV=cu!8XmUXnX^TQ%mqIYO-8+LA{7Gk}Ad7=_ zHxigp+nEiRUp^1`=19-*&Ee<(y)yKAIrNMvAo9&Q1LUFANSJ*J7P{eoCs32X2r&}= zzB$Cue1^Yo&b^XjtWZMGDMjjhjKt4Y0~3c^-yEXJ#PE-cP<0~cVqRF3al$oF?HY&|2fRPE13HHEWDmUy7k0F|D=Jr`!UA*H;73w)j&6eyZkq?5-iUbnn)RA zsKcA!w+TA_`ur%o{s0L79@0EwWW7$a?k1g%!OGo~^$yG4mGb&!~4`+99>CznGX^H2x>DRT)-s(=K6+siLbu^9K5^ZpB_o zlI;l%x)qBxyvaGS;Y-Lo3Hx*>(i}>n>m+oseCgAjNT)}uJg+yazXDSRa}qCia?5HU%SU zBIkiISh$I5%w$uS7_|n7NFK<8jjm%EK}=1K*)IK1J=3pHBlnuOo0sJIJ zq{Zv6*V7QYcHheU$uwdEsqNakSLW~r5`FOkWOa2jhi$w0Ok}JWLZ2gHT>^R;QCVon z9RQl^dyz&Ks}5~j`qW~DH(7PKEH}7>ybq#8kF#z>Xio%pCIM|fLG~Y@_;~=i7cwBW z5VUH?H=V8YR+;N+Z&}$?!mpOGrpM*-B|G|(wWuIWyPi#Z^#^3yhJ+8@*Cn9;hNQ*2 z$o>q!*Rj(B*e}vobJ9m&X!$r0Z{gQs44Ittz-p4!K=PA^L}Y zCb^kKY>Z6sg}aXR=vW0`TPn7ieQ6zs{ zjFh5+{&;LV-IB$1OBUD7h$|6sTD$UEcV_^eflj0AXm(=aDR5AdP&2f;Hg-xD+DU}Q zRO|C7W-_X-b94<36hjd!lf?8$wyj69m>#Z}Hg8hQ)vR4ZeG?93uNz2IueT9l9MoI5 z#+e#5)-s}0w?)7<(Htn+F2V_YvF7Na+VrE$we){yU5f*S?n)Be#}&+nsGL%vj^z)Z zjz;gxIMOkrrMs)81X_BC79A5kJ&m3`E{)slrm}0;P!;+X9H^*SFj0&C$;t*KD?2G! z+3+M~BV1*wbulZ^izEC*JqQObvMGFDl7g~iH(M1# zuIp)928!zTQz7YQ{7Nu*)EHz{%UM8Niyx|YGcCA=!{aiYiK`DL~x*7?yJj&pue9CTtN;|$TBY3DU{l{l_=pG4lS&PPS@?A_9V#2V| zDR418h=Bs-$jqpHb{}FkQ%*ydrav(cqBWgHE@luhIp{r3V;55aOynid*nN5O8d=W@ z4CMJ}L{9wVtS-V6FI~U|Zx_C{&(}@Xc|LnM<#mOnzV2t>c0O1U1166fSzX?R(|kQR z5(7PkYR-exd`q}W@A3%}-%^4o98W1ffXBCTBvN1|5mQQwgLHunj$+o1-W+WvQ+5Iy7n;(bEyrpP{F%C<@c z;wE`pWeW3#B15)S#xt;i0dwbN37?m9iyVT_3dwW?RPu<%~2S)bxnga;+M8ds2(z%-((*dUL z?GeL$3bVIYBROtvP(sk5sm|p9Q}_0WCX?CQb492+Pk``*y*-cC?Cnu(d~c7&1x38` zHNgLIZ|@fnggCHrZ;v(d_V&60m%6t{46QSJdpjh@Dp7<}jcn@P9x)(S4k_niR!i*d zu^B1J?CqJHx3_mt%DlZj(=^=M>kTRH-rgMmgAR?B&8qzX+-0q7BOgLO^a&Dg8@aBm ztFbe*5)%rlc~3TW(d;$h4a2atxRw|iqjAx~UPocrMf1&AFi+X*O)da!6dLJ{$L#Hk zTY~{xr$m^&?}0$LaT`tE`|d-@4`V(#g#-iwj#Y%gdp`37kY9{}`CR4+1e{2J7-u)z zLJUDr9L9lfE_Cad$-J(6Eil&akns?J&`U^|S%}_Z&I{@)=NBL|D8n9Zwr5AMcgCA= zq{%rddmJZ<0N8c?C{m93=i`U9&ucK+$&>O}?&3u=;+dQ)X0c=vIb(VHR?H5%@KL7q zNo^9ADwWSMAfGK+z)kphaH1}z{Hb-QBX|B{Y)KTe$f}*1E9a|Czd}xr%Xxz~HTzzQ z>gD3HmPH#DAZ$s%3d;OuaEU<-Z?nA}W&$s+`qyh(t`*Z8S?E?4pyMEPvr ze70vc=UTm#o*l9ZDNVc5m`8)00x>8i1~~+- zN|sQRETPDg@F^v1rw!wFA|?0h5orcSs?%D^t8*BrPMc#Sj^!LXie_jl%}~|g4{+pw zqXCn41elZ)U@{XwmCtz3XUJyfa=E*TE?%?_DRt##h`uKImU5bz##Py}^|zXByKEy; z(wt-H#IELISIpSe!q}y(v1sP8P+$`X_^cM-oW(qWfG=_*`%=U65)?(moQ-_Le<0C6 zQs3&|kXUqzqT;>LmJ1pm%b8(ePZ-wqhII-VrHjNq1%vZCBG8 zjTeygM!NUThnbo_!IrO23T5oPnH#ddy(*glaNy47Ll4O=WpFjC(P5;RQ{L4 zc$m~kgv0o3iuS{O`jHHz96ZR%^&9%vQswj{g*a^KLgbA5qV(D0;xl(E@CkD2Np#th z0!~!=}5TR=kd7JzPsM$gyOEZcMvp}_!ytX4N(oJ zk@OOuy%5XQV!pb|Y3yRoB<5|jmD9w+45|q5j=mRD z;6?S)15tQfR?AEAa*hA8TF&KaIro28%kba-16S4Msv3HF@>27Yduj3zpx2$-N$#!A)%IG_I(D(neqER9)(*EY8Pu&j4mGbn8JRd_0MG5R0(a zn?+~HiNZ=Cl1~)2FmFy2$K zzy!>B_(A5ACgf+CHxqJ3dyv_kK1y&jAm$z9i}cT|`VuO+Toe^F!?346rP0fYx!