diff --git a/projects/vga_ctrl/syn/ise/project/vga_ctrl_sys.prj b/projects/vga_ctrl/syn/ise/project/vga_ctrl_sys.prj
index 62cd3f6..6665906 100644
--- a/projects/vga_ctrl/syn/ise/project/vga_ctrl_sys.prj
+++ b/projects/vga_ctrl/syn/ise/project/vga_ctrl_sys.prj
@@ -1,4 +1,4 @@
-vhdl work "../../../../lib/rams/sim/src/dpram_1w1r2c_ro.vhd"
+vhdl work "../../../../lib/rams/xilinx/src/dpram_1w1r2c_ro.vhd"
 vhdl work "../../../../lib/misc/utils_pkg.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_c64.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/vga_types.vhd"
@@ -6,7 +6,7 @@ vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/vga_sync.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd"
-vhdl work "../../../../lib/rams/sim/src/dpram_1w1r2c_ra.vhd"
+vhdl work "../../../../lib/rams/xilinx/src/dpram_1w1r2c_ra.vhd"
 vhdl work "../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd"
 vhdl work "../../../../lib/FIFO/src/gray_counter.vhd"
 vhdl work "../../../../lib/FIFO/src/fifo_async_ctrl.vhd"