From 1a0e8f08f58efecfd62037ea1a9aee145920f782 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Tue, 17 Mar 2009 09:39:07 +0000 Subject: [PATCH] - removed cop_reg_rd if cop is read is now implemented into instruction decoder - generate 'stall_all' signal if ID/EX/MEM stall is active Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@402 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/src/core/mips_pipeline.vhd | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/lib/CPUs/MIPS/src/core/mips_pipeline.vhd b/lib/CPUs/MIPS/src/core/mips_pipeline.vhd index 8b42cfc..38a9635 100644 --- a/lib/CPUs/MIPS/src/core/mips_pipeline.vhd +++ b/lib/CPUs/MIPS/src/core/mips_pipeline.vhd @@ -50,7 +50,6 @@ entity pipeline is dmem_dout : out word_t; cop_ir : out word_t; cop_ir_en : out STD_LOGIC; - cop_reg_rd : in STD_LOGIC; cop_din : in word_t; cop_dout : out word_t; c0_ctrl_out : out cop0_ctrl_in_t; @@ -193,9 +192,10 @@ begin sdu.MEM_nop <= EX_stage.nop or EX_stage.exc; sdu.WB_nop <= sdu.dmem_dep or MEM_stage.nop; - sdu.ID_stall <= sdu.dmem_dep or sdu.imem_dep or sdu.mul_dep or ID_stage.exc; - sdu.EX_stall <= sdu.dmem_dep; - sdu.MEM_stall <= sdu.dmem_dep; + sdu.stall_all <= sdu.dmem_dep; + sdu.ID_stall <= sdu.stall_all or sdu.imem_dep or sdu.mul_dep or ID_stage.exc; + sdu.EX_stall <= sdu.stall_all; + sdu.MEM_stall <= sdu.stall_all; sdu.WB_stall <= '0'; sdu.mul_dep <= ID_stage.ctrl.mul_access and (EX_stage.ctrl.mul_start or mul_busy); @@ -338,7 +338,6 @@ proc_stage_branch: ID_stage.reg_b_rptr <= extract_rt(ID_stage.IR); ID_stage.ctrl <= opcode_ctrl_lines(ID_stage.IR) when sdu.ID_nop = '0' else ctrl_lines_default; ID_stage.reg_write <= ID_stage.ctrl.reg_write; - ID_stage.cop_read <= cop_reg_rd; ID_stage.epc <= pc.last; ID_stage.exc <= event_is_active(ID_stage.events); -- Todo: works ID_stage.nop <= sdu.ID_nop; @@ -478,8 +477,7 @@ proc_stage_ID_EX_1: EX_stage.events_in <= ID_stage.events; EX_stage.op <= ID_stage.op; EX_stage.ctrl <= ID_stage.ctrl; - EX_stage.reg_write <= ID_stage.reg_write or ID_stage.cop_read; - EX_stage.cop_read <= ID_stage.cop_read; + EX_stage.reg_write <= ID_stage.reg_write; EX_stage.nop <= sdu.EX_nop; EX_stage.IR <= ID_stage.IR; EX_stage.pcn <= ID_stage.pcn; @@ -738,7 +736,7 @@ proc_stage_MEM_n: MEM_stage.nop <= sdu.MEM_nop; MEM_stage.ex_result <= EX_stage.reg_b; if EX_stage.ctrl.cop_instr_en = '1' then - if EX_stage.cop_read = '1' then + if EX_stage.ctrl.cop_read = '1' then MEM_stage.ex_result <= cop_din; end if; elsif EX_stage.ctrl.dmem_en = '0' then