From 16b4f2b138b157a1a35bc0d12fa3f93c0e20ef72 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sat, 25 Oct 2008 11:21:47 +0000 Subject: [PATCH] - Bugfix: changed 'ptr_r' from 'bcnt_r' to 'bnxt_r' to prevent read delay when FIFO is read (re = 1) git-svn-id: http://moon:8086/svn/vhdl/trunk@108 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/FIFO/src/async_fifo_ctrl.vhd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/FIFO/src/async_fifo_ctrl.vhd b/lib/FIFO/src/async_fifo_ctrl.vhd index 90fe9be..a7db023 100644 --- a/lib/FIFO/src/async_fifo_ctrl.vhd +++ b/lib/FIFO/src/async_fifo_ctrl.vhd @@ -21,7 +21,7 @@ -- For questions and ideas, please contact the author at jens@jayfield.org ----------------------------------------------------------------------- --- $Header: /tmp/cvsroot/VHDL/lib/FIFO/src/async_fifo_ctrl.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ +-- $Header: /tmp/cvsroot/VHDL/lib/FIFO/src/async_fifo_ctrl.vhd,v 1.2 2008-10-25 11:21:47 Jens Exp $ ----------------------------------------------------------------------- library IEEE; @@ -80,7 +80,7 @@ architecture Behavioral of async_fifo_ctrl is begin ptr_w <= bcnt_w(addr_width-1 downto 0); - ptr_r <= bcnt_r(addr_width-1 downto 0); + ptr_r <= bnxt_r(addr_width-1 downto 0); winc <= we and (not write_inhibit); rinc <= re and (not read_inhibit); fifo_full <= write_inhibit;