update
Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@759 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
@@ -9,6 +9,10 @@ vcom -explicit -93 "../../../misc/dpram_1w2r1c_sim.vhd"
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vcom -explicit -93 "../../../misc/dpram_1w1r.vhd"
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vcom -explicit -93 "../../../misc/dpram_1w1r1c_sim.vhd"
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vcom -explicit -93 "../../../misc/dpram_1w1r2c_sim.vhd"
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vcom -explicit -93 "../../../misc/dpram_2w2r2c_sim.vhd"
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# FIFOS
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vcom -explicit -93 "../../../FIFO/src/fifo_ctrl_pkg.vhd"
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vcom -explicit -93 "../../../FIFO/src/gray_counter.vhd"
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@@ -58,4 +62,4 @@ do {tb_mips_top.wdo}
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view wave
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view structure
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view signals
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run 4000us
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run 1500us
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@@ -117,10 +117,10 @@ add wave -noupdate -format Literal /tb_mips_top/inst_sram_port/s
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add wave -noupdate -divider ALU
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/hdu
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add wave -noupdate -format Literal -expand /tb_mips_top/uut/inst_pipeline/sdu
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/sdu
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add wave -noupdate -divider PC
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/pc
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/pc
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add wave -noupdate -divider COP0
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/ir_en
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/ir
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@@ -130,12 +130,12 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/dcache_info
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/cop_pipe_id
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/cop_pipe_ex
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add wave -noupdate -format Literal -expand /tb_mips_top/uut/inst_cop/ctrl_in
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_cop/ctrl_in
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_en
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_dout
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_busy
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_cop/ctrl_out
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/ctrl_out
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/epc
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/cause
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/status
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@@ -147,7 +147,7 @@ add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/stat_reg_we
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_cop/exc_state
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add wave -noupdate -divider Pipestages
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/id_stage
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/id_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/ex_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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@@ -160,97 +160,94 @@ add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/cpu_run
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_reg_dual/reg_mem
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add wave -noupdate -divider I-Cache
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/ctrl
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/flush_count
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_en
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_req
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_busy
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_rdy
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_hit
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_match
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_dout
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_req_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/request_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/fill_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_dout
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_busy
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/s
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_busy
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_miss
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_match
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/was_miss
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/cache_entry_out
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/request_count
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/flush_count
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/fill_count
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_req
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_ack
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_ram_addr_rd
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_ram_data_rd
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_ram_addr_wr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_ram_data_wr
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/pv_reg
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/pv
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/cs
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/s
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cache_entry_out
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_ram_re
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/data_ram_re
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_b_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_b_dout
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_a_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_a_din
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/data_ram_we
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_b_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_b_dout
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_a_dout
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_a_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_a_din
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_b_din
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_ram_we
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/ram
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/addr_a
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/addr_b
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/din_a
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/din_b
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/dout_a
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/dout_b
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/we_a
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/we_b
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/en_b
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/en_a
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/clk_a
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/clk_b
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add wave -noupdate -divider D-Cache
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add wave -noupdate -format Logic /tb_mips_top/rst
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cyc_o_dmem_rd
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/dcached
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/dcache_en
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/uncached_access
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/dcache_dbg
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_biu/inst_dcache/ctrl
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/gpo0
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/gpo1
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/request_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/fill_addr
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/dcached
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/mrdy_o
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_en
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_we
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_be
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_din
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_dout
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_busy
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_hit
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_busy
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/was_miss
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_bsy
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_req
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_be
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_we
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_hit_we
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/instant_raw
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/s
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_biu/inst_dcache/cache_entry_out
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tag_match
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/fill_count
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/fill_count_en
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/fill_count_rdy
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/flush_count
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/flush_count_en
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/flush_count_rdy
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_din
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_dout
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_req_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_data_reg
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/request_addr
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||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/request_count
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/request_count_en
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/request_count_rdy
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||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/fill_addr
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||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/fill_count
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||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/flush_count
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_rdy
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_hit
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tag_match
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||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/pv_reg
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/pv
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||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/s
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cs
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/dat_i
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cache_entry_in
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cache_entry_out
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_data_reg
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_be_reg
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_we_reg
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||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/ctrl_data_ram_addr
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/ctrl_data_ram_we
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||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_data_ram_we
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||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_we2
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||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_ram_addr_rd
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_ram_addr_wr
|
||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_we
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_dout
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_din
|
||||
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_we
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_dout
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_din
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_b_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_b_dout
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_a_dout
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_a_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_ram_din
|
||||
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tag_ram_we
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_tag
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_cache_index
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_word_index
|
||||
TreeUpdate [SetDefaultTree]
|
||||
WaveRestoreCursors {{Cursor 1} {12375000 ps} 0} {{Cursor 2} {3884295000 ps} 0}
|
||||
WaveRestoreCursors {Cursor {1309445000 ps} 0}
|
||||
configure wave -namecolwidth 188
|
||||
configure wave -valuecolwidth 100
|
||||
configure wave -valuecolwidth 154
|
||||
configure wave -justifyvalue left
|
||||
configure wave -signalnamewidth 1
|
||||
configure wave -snapdistance 10
|
||||
@@ -262,4 +259,4 @@ configure wave -gridperiod 100
|
||||
configure wave -griddelta 40
|
||||
configure wave -timeline 1
|
||||
update
|
||||
WaveRestoreZoom {3856155513 ps} {4007570763 ps}
|
||||
WaveRestoreZoom {0 ps} {1575 us}
|
||||
|
||||
+1276
-1276
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user