From 07967f50091969e51766b479e9df90b3345b2966 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sat, 7 Feb 2015 06:38:44 +0000 Subject: [PATCH] - added dist git-svn-id: http://moon:8086/svn/vhdl/trunk@1074 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/emac/dist/dist.in/gpl-3.0.txt | 674 +++++++++++++++++++++++ lib/emac/dist/dist.in/notes.txt | 6 + lib/emac/dist/dist.in/tb_emac_top_jb.fdo | 26 + lib/emac/dist/dist.in/tb_emac_top_jb.vhd | 653 ++++++++++++++++++++++ lib/emac/dist/dist.in/tb_emac_top_jb.wdo | 207 +++++++ lib/emac/dist/makedist.R01 | 28 + 6 files changed, 1594 insertions(+) create mode 100644 lib/emac/dist/dist.in/gpl-3.0.txt create mode 100644 lib/emac/dist/dist.in/notes.txt create mode 100644 lib/emac/dist/dist.in/tb_emac_top_jb.fdo create mode 100644 lib/emac/dist/dist.in/tb_emac_top_jb.vhd create mode 100644 lib/emac/dist/dist.in/tb_emac_top_jb.wdo create mode 100644 lib/emac/dist/makedist.R01 diff --git a/lib/emac/dist/dist.in/gpl-3.0.txt b/lib/emac/dist/dist.in/gpl-3.0.txt new file mode 100644 index 0000000..818433e --- /dev/null +++ b/lib/emac/dist/dist.in/gpl-3.0.txt @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + Copyright (C) + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/lib/emac/dist/dist.in/notes.txt b/lib/emac/dist/dist.in/notes.txt new file mode 100644 index 0000000..2c09f84 --- /dev/null +++ b/lib/emac/dist/dist.in/notes.txt @@ -0,0 +1,6 @@ +----------------------------------------------------------------- +Changes in release 02 +----------------------------------------------------------------- +Changes in release 01 +----------------------------------------------------------------- + diff --git a/lib/emac/dist/dist.in/tb_emac_top_jb.fdo b/lib/emac/dist/dist.in/tb_emac_top_jb.fdo new file mode 100644 index 0000000..3ea0eb0 --- /dev/null +++ b/lib/emac/dist/dist.in/tb_emac_top_jb.fdo @@ -0,0 +1,26 @@ +vlib work +vcom -explicit -93 "../src/utils_pkg.vhd" +vcom -explicit -93 "../src/dpram_1w1r.vhd" +vcom -explicit -93 "../src/dpram_2w2r.vhd" +vcom -explicit -93 "../src/fifo_ctrl_pkg.vhd" +vcom -explicit -93 "../src/fifo_sync_ctrl.vhd" +vcom -explicit -93 "../src/fifo_sync.vhd" +vcom -explicit -93 "../src/gray_counter.vhd" +vcom -explicit -93 "../src/fifo_async_ctrl.vhd" +vcom -explicit -93 "../src/fifo_async.vhd" +vcom -explicit -93 "../src/piso.vhd" +vcom -explicit -93 "../src/sipo.vhd" +vcom -explicit -93 "../src/crc32.vhd" +vcom -explicit -93 "../src/emac_types.vhd" +vcom -explicit -93 "../src/emac_rx.vhd" +vcom -explicit -93 "../src/emac_tx.vhd" +vcom -explicit -93 "../src/emac_top_jb.vhd" +vcom -explicit -93 "../src/pkt_gen.vhd" +vcom -explicit -93 "../src/emac_top_jb.vhd" +vcom -explicit -93 "../src/tb_emac_top_jb.vhd" +vsim -t 1ps -lib work tb_emac_top_jb +do {tb_emac_top_jb.wdo} +view wave +view structure +view signals +run 1000us diff --git a/lib/emac/dist/dist.in/tb_emac_top_jb.vhd b/lib/emac/dist/dist.in/tb_emac_top_jb.vhd new file mode 100644 index 0000000..5520569 --- /dev/null +++ b/lib/emac/dist/dist.in/tb_emac_top_jb.vhd @@ -0,0 +1,653 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: testbench for system test using Xilinx ML-402 + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +ENTITY tb_emac_top_jb IS +END tb_emac_top_jb; + +ARCHITECTURE behavior OF tb_emac_top_jb IS + + constant CLK_PERIOD : time := 10 ns; + constant MII_CLK_PERIOD : time := 37.7 ns; + + signal CLK : std_logic := '1'; + signal RST : std_logic := '1'; + + -- Slave + signal CYC_I : std_logic := '0'; + signal STB_I : std_logic := '0'; + signal WE_I : std_logic := '0'; + signal SEL_I : unsigned(3 downto 0) := (others => '1'); + signal ACK_O : std_logic; + signal INT_O : std_logic; + signal MRDY_I : std_logic := '0'; + signal SRDY_O : std_logic; + signal ADDR_I : unsigned(31 downto 0) := (others => '-'); + signal DAT_I : unsigned(31 downto 0) := (others => '-'); + signal DAT_O : unsigned(31 downto 0) := (others => '-'); + signal DAT_O_reg : unsigned(31 downto 0) := (others => '-'); + signal status_reg : unsigned(31 downto 0) := (others => '0'); + signal size_reg : unsigned(31 downto 0) := (others => '0'); + + -- MII signals + signal mii_rx_clk_board : std_logic := '1'; + signal mii_tx_clk_board : std_logic := '1'; + signal mii_rx_clk : std_logic := '1'; + signal mii_tx_clk : std_logic := '1'; + signal mii_rx : unsigned(7 downto 0) := (others => '-'); + signal mii_tx : unsigned(7 downto 0); + signal mii_rx_dv : std_logic := '0'; + signal mii_rx_er : std_logic := '0'; + signal mii_tx_en : std_logic; + signal mii_tx_er : std_logic; + signal mii_crs : std_logic := '0'; + signal mii_col : std_logic := '0'; + signal mii_gtx_clk : std_logic; + + signal loop_back_en : std_logic := '0'; + + signal pktgen_tx : unsigned(7 downto 0); + signal pktgen_tx_en : std_logic; + signal pktgen_tx_er : std_logic; + signal pktgen_en : std_logic := '0'; + signal pktgen_gigabit : std_logic := '0'; + signal pktgen_fcs_en : std_logic := '0'; + signal dat_o_cnt_en : std_logic := '0'; + signal dat_o_cnt_rst : std_logic := '1'; + signal dat_o_cnt : natural; + signal pkt_count : natural; + + type emac_action_t is (emac_idle, emac_alloc, emac_write, emac_commit, emac_wait_data, emac_read, emac_free); + signal emac_action : emac_action_t; + + constant RX_STATUS_REG_ADDR : unsigned(31 downto 0) := X"0000_0000"; + constant RX_SIZE_REG_ADDR : unsigned(31 downto 0) := X"0000_0004"; + constant TX_STATUS_REG_ADDR : unsigned(31 downto 0) := X"0000_0008"; + constant TX_SIZE_REG_ADDR : unsigned(31 downto 0) := X"0000_000C"; + constant DATA_REG_ADDR : unsigned(31 downto 0) := X"0000_8000"; + +BEGIN + +inst_emac_top_jb : entity work.emac_top_jb + GENERIC MAP + ( + f_sysclk => 100.0, + RX_RAM_SIZE => 2048, + TX_RAM_SIZE => 2048 + ) + PORT MAP + ( + CLK_I => CLK, + RST_I => RST, + INT_O => INT_O, + CYC_I => CYC_I, + STB_I => STB_I, + SEL_I => SEL_I, + WE_I => WE_I, + ACK_O => ACK_O, + SRDY_O => SRDY_O, + MRDY_I => MRDY_I, + ADDR_I => ADDR_I, + DAT_I => DAT_I, + DAT_O => DAT_O, + mii_rx_clk => mii_rx_clk_board, + mii_rx_dv => mii_rx_dv, + mii_rx_er => mii_rx_er, + mii_rx => mii_rx, + mii_tx_clk => mii_tx_clk_board, + mii_tx_en => mii_tx_en, + mii_tx_er => mii_tx_er, + mii_tx => mii_tx, + mii_gtx_clk => mii_gtx_clk, + mii_crs => mii_crs, + mii_col => mii_col + + ); + +inst_pkt_gen : entity work.pkt_gen + GENERIC MAP + ( + f_sysclk => 100.0, + PKT_SIZE_MIN => 64, + PKT_SIZE_MAX => 1512 + + ) + PORT MAP + ( + clk => CLK, + rst => RST, + en => pktgen_en, + gigabit_en => pktgen_gigabit, + fcs_gen_en => pktgen_fcs_en, + mii_tx_clk => mii_tx_clk_board, + mii_tx_en => pktgen_tx_en, + mii_tx_er => pktgen_tx_er, + mii_tx => pktgen_tx + + ); + + +CLK_GEN: process + begin + wait for CLK_PERIOD/2; + CLK <= not CLK; + end process; + +MII_CLK_GEN: process + begin + wait for MII_CLK_PERIOD/2; + mii_rx_clk <= not mii_rx_clk; + mii_tx_clk <= not mii_tx_clk; + end process; + + mii_rx_clk_board <= mii_rx_clk; + mii_tx_clk_board <= mii_tx_clk; + +DAT_O_register: + process(CLK) + begin + if rising_edge(CLK) then + if ACK_O = '1' then + DAT_O_reg <= DAT_O; + end if; + end if; + end process; + +DAT_O_count_register: + process(CLK) + begin + if rising_edge(CLK) then + if dat_o_cnt_rst = '1' then + dat_o_cnt <= 0; + elsif ACK_O = '1' and dat_o_cnt_en = '1' then + dat_o_cnt <= dat_o_cnt + 1; + end if; + end if; + end process; + + mii_rx <= mii_tx when loop_back_en = '1' else pktgen_tx; + mii_rx_dv <= mii_tx_en when loop_back_en = '1' else pktgen_tx_en; + mii_rx_er <= mii_tx_er when loop_back_en = '1' else pktgen_tx_er; + mii_crs <= '0'; + mii_col <= '0'; + +-- Master +STIMULUS: process + + procedure emac_tx_reset_100mbps is + begin + + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"A000_0000"; + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + end procedure emac_tx_reset_100mbps; + + procedure emac_rx_reset_100mbps is + begin + + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"A000_0000"; + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + end procedure emac_rx_reset_100mbps; + + procedure emac_tx_reset_1000mbps is + begin + + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"E000_0000"; + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + end procedure emac_tx_reset_1000mbps; + + procedure emac_rx_reset_1000mbps is + begin + + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"E000_0000"; + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + end procedure emac_rx_reset_1000mbps; + + procedure emac_alloc (size : natural) is + begin + + -- TX-ALLOCATION + -- set TX-size + emac_action <= emac_alloc; + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= to_unsigned(size, 32); + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= TX_SIZE_REG_ADDR; + + check_alloc_ok: + while(true) loop + + -- set alloc request + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + status_reg <= DAT_O; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"0002_0000" or (not X"0001_0000" and status_reg); + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + + check_bsy: + while (true) loop + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + status_reg <= DAT_O; + wait until rising_edge(CLK); + if status_reg(17) = '0' then + exit check_bsy; + end if; + end loop; + if status_reg(16) = '1' then + exit check_alloc_ok; + end if; + end loop; + CYC_I <= '0'; + + emac_action <= emac_idle; + + end procedure emac_alloc; + + procedure emac_commit is + begin + + -- RX- DEALLOCATION + emac_action <= emac_commit; + + -- set free request + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + status_reg <= DAT_O; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"0001_0000" or (not X"0002_0000" and status_reg); + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= TX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + emac_action <= emac_idle; + + end procedure emac_commit; + + procedure emac_write (size : natural) is + variable data : unsigned (7 downto 0); + variable num_words : natural; + begin + + -- FILL TX data + emac_action <= emac_write; + if (size mod 4) = 0 then + num_words := size/4; + else + num_words := size/4 + 1; + end if; + + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + data := X"00"; + ADDR_I <= DATA_REG_ADDR; + WE_I <= '1'; + for i in 1 to num_words loop + STB_I <= '1'; + DAT_I(7 downto 0) <= data; + data := data + 1; + DAT_I(15 downto 8) <= data; + data := data + 1; + DAT_I(23 downto 16) <= data; + data := data + 1; + DAT_I(31 downto 24) <= data; + data := data + 1; + wait until rising_edge(CLK) and SRDY_O = '1'; + end loop; + + STB_I <= '0'; + wait until rising_edge(CLK) and SRDY_O = '1'; + + emac_commit; + + emac_action <= emac_idle; + + end procedure emac_write; + + procedure emac_read (size_in : natural) is + variable data : unsigned (7 downto 0); + variable size, num_words : natural; + begin + + emac_action <= emac_wait_data; + + -- check if data available + check_data_avail: + while (true) loop + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + status_reg <= DAT_O; + wait until rising_edge(CLK); + if status_reg(17) = '1' and status_reg(16) = '1' then + exit check_data_avail; + end if; + end loop; + + read_size: + dat_o_cnt_rst <= '1'; + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= RX_SIZE_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + size_reg <= DAT_O; + wait until rising_edge(CLK); + + -- set packet request + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + status_reg <= DAT_O; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"0002_0000" or (not X"0001_0000" and status_reg); + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + emac_action <= emac_read; + -- Read RX data + size := size_in; + if (size_in = 0) then + size := to_integer(size_reg(15 downto 0)); + end if; + + if (size mod 4) = 0 then + num_words := size/4; + else + num_words := size/4 + 1; + end if; + + dat_o_cnt_rst <= '0'; + dat_o_cnt_en <= '1'; + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + ADDR_I <= DATA_REG_ADDR; + WE_I <= '0'; + STB_I <= '1'; + for i in 1 to num_words loop + wait until rising_edge(CLK) and SRDY_O = '1'; + end loop; + STB_I <= '0'; + wait until rising_edge(CLK) and dat_o_cnt = num_words; + dat_o_cnt_en <= '0'; + emac_action <= emac_idle; + + end procedure emac_read; + + procedure emac_free is + begin + + -- RX- DEALLOCATION + emac_action <= emac_free; + + -- set free request + CYC_I <= '1'; + wait until rising_edge(CLK) and SRDY_O = '1'; + WE_I <= '0'; + STB_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + wait until rising_edge(CLK) and ACK_O = '1'; + status_reg <= DAT_O; + wait until rising_edge(CLK) and SRDY_O = '1'; + DAT_I <= X"0001_0000" or (not X"0002_0000" and status_reg); + STB_I <= '1'; + WE_I <= '1'; + ADDR_I <= RX_STATUS_REG_ADDR; + wait until rising_edge(CLK) and SRDY_O = '1'; + STB_I <= '0'; + WE_I <= '0'; + + emac_action <= emac_idle; + + end procedure emac_free; + + begin + + wait for 6*MII_CLK_PERIOD; + RST <= '0'; + wait for 60*CLK_PERIOD; + emac_rx_reset_100mbps; + emac_tx_reset_100mbps; + pktgen_gigabit <= '0'; + pktgen_fcs_en <= '1'; + wait for 60*CLK_PERIOD; + + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + emac_alloc (1004); + + for i in 1 to 2 loop + emac_alloc (72); + emac_write (72); + wait for 10us; + end loop; + + wait until rising_edge(mii_tx_clk) and mii_tx_en = '0'; + wait for 600*CLK_PERIOD; + + loop_back_en <= '1'; + + emac_alloc (74); + emac_write (74); + + emac_alloc (105); + emac_write (105); + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_alloc (103); + emac_write (103); + + emac_read (0); + emac_free; + + emac_alloc (71); + emac_write (71); + + emac_read (0); + emac_free; + + emac_alloc (82); + emac_write (82); + + emac_alloc (86); + emac_write (86); + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_alloc (77); + emac_write (77); + + emac_alloc (99); + emac_write (99); + + emac_alloc (65); + emac_write (65); + + emac_alloc (321); + emac_write (321); + + emac_read (0); + emac_free; + + emac_alloc (1111); + emac_write (1111); + + emac_read (0); + emac_free; + + emac_alloc (73); + emac_write (73); + + emac_alloc (107); + emac_write (107); + + emac_alloc (83); + emac_write (83); + + emac_read (0); + emac_free; + + emac_alloc (72); + emac_write (72); + + emac_alloc (1003); + emac_write (1003); + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + emac_read (0); + emac_free; + + wait for 6000*CLK_PERIOD; + + loop_back_en <= '0'; + pktgen_en <= '1'; + pkt_count <= 0; + for i in 1 to 500 loop + wait for 1 us; + emac_read (0); + emac_free; + pkt_count <= pkt_count + 1; + end loop; + pktgen_en <= '0'; + emac_read (0); + emac_free; + + + wait; + + end process; + +END; diff --git a/lib/emac/dist/dist.in/tb_emac_top_jb.wdo b/lib/emac/dist/dist.in/tb_emac_top_jb.wdo new file mode 100644 index 0000000..46ec249 --- /dev/null +++ b/lib/emac/dist/dist.in/tb_emac_top_jb.wdo @@ -0,0 +1,207 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider {Ethernet MAC} +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/clk_i +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/rst_i +add wave -noupdate -format Logic -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/int_o +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/cyc_i +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/stb_i +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/sel_i +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/we_i +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/ack_o +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/srdy_o +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mrdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/addr_i +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/dat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/dat_o +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_rx_clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_rx_dv +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_rx_er +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/mii_rx +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_tx_clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_tx_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_tx_er +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/mii_tx +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_gtx_clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_crs +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/mii_col +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/status_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/size_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/dat_o_reg +add wave -noupdate -format Literal /tb_emac_top_jb/emac_action +add wave -noupdate -format Logic /tb_emac_top_jb/dat_o_cnt_rst +add wave -noupdate -format Literal /tb_emac_top_jb/dat_o_cnt +add wave -noupdate -format Literal /tb_emac_top_jb/pkt_count +add wave -noupdate -divider {Packet generator} +add wave -noupdate -format Literal /tb_emac_top_jb/inst_pkt_gen/tx_packets +add wave -noupdate -format Literal /tb_emac_top_jb/inst_pkt_gen/tx_bytes +add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_pkt_gen/pkt_nbytes +add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_pkt_gen/pkt_nwords +add wave -noupdate -format Literal /tb_emac_top_jb/inst_pkt_gen/host_s +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_emac_top_jb/inst_pkt_gen/tx_ctrl_in +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_emac_top_jb/inst_pkt_gen/tx_ctrl_out +add wave -noupdate -format Literal /tb_emac_top_jb/inst_pkt_gen/tx_bytes +add wave -noupdate -format Literal /tb_emac_top_jb/inst_pkt_gen/tx_packets +add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_pkt_gen/fill_size +add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_pkt_gen/fill_cnt +add wave -noupdate -format Logic /tb_emac_top_jb/inst_pkt_gen/fill_rdy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_pkt_gen/fill_set +add wave -noupdate -format Logic /tb_emac_top_jb/inst_pkt_gen/fill_en +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_pkt_gen/tx_din +add wave -noupdate -format Logic /tb_emac_top_jb/inst_pkt_gen/tx_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/pktgen_tx +add wave -noupdate -format Logic /tb_emac_top_jb/pktgen_tx_en +add wave -noupdate -format Logic /tb_emac_top_jb/pktgen_tx_er +add wave -noupdate -format Logic /tb_emac_top_jb/pktgen_en +add wave -noupdate -divider RX +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/rst +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/dout_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/dout +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ctrl_in +add wave -noupdate -format Literal -radix unsigned -expand /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ctrl_out +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx_clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx_dv +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx_er +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_crs +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_col +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_din +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_dout +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_we +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_re +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_empty +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_full +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/host_ptr +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/host_ram_limit +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/host_ram_base +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/commit_en +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ram_limit +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ram_full +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_base +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ptr +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_en_a +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_we_a +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_addr_a +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_din_a +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_en_b +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_addr_b +add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/byte_count +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_din +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout_be +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout_vld +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_rst +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_dout +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_rst +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_dout_vld +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_dout_en +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/host_s +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_s +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/preamble_bsy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/preamble_ok +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/preamble_rdy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_rdy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_ok +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_num_ok +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_addr +add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_cnt +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/fcs_vld +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/fcs_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/fcs +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/fcs_chk_ok +add wave -noupdate -divider TX +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/rst +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/din +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ctrl_in +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ctrl_out +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/cmd_fifo_din +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/cmd_fifo_dout +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/cmd_fifo_we +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/cmd_fifo_re +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/cmd_fifo_empty +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/cmd_fifo_full +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_pre_rdy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_bsy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_set +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_cnt_en +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_base +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_size +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_cnt +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_ptr +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fill_remain +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/alloc_ok +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/alloc_req +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/alloc_ack +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/nwords_free +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/alloc_size +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mem_alloc_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mem_free_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/commit_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/uncommit_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_bsy +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_size +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_ptr +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_cnt +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_cnt_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_set +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_en_a +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_we_a +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_addr_a +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_din_a +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_en_b +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_addr_b +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_dout_b +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din_be +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din_rdy +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_dout +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_dout_vld +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_dout_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_we +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_re +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_full +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_empty +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_re_dly +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din_vld +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_dout_vld +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din_rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_dout +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fcs_rst +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fcs_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fcs_din_vld +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fcs_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/fcs +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_tx_clk +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_tx_en +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_tx_er +add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_tx +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/host_s +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_s +add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mem_free_req +add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mem_free_ack +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {448370000 ps} 0} {{Cursor 2} {49999967706 ps} 0} {{Cursor 3} {42833006856 ps} 0} {{Cursor 4} {16290550071 ps} 0} {{Cursor 5} {4181100 ps} 0} +configure wave -namecolwidth 150 +configure wave -valuecolwidth 100 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 100 +configure wave -griddelta 40 +configure wave -timeline 1 +update +WaveRestoreZoom {0 ps} {1050 us} diff --git a/lib/emac/dist/makedist.R01 b/lib/emac/dist/makedist.R01 new file mode 100644 index 0000000..68bd0f2 --- /dev/null +++ b/lib/emac/dist/makedist.R01 @@ -0,0 +1,28 @@ +#!/bin/sh + +USE_TAG=EMAC_R01 +PROJECT="emac_top_jb" +DIST_FILE="./files.dist" +DIST_DIR="./release/emac.R01" + +# --------------------------------------------------------------- +mkdir -p $DIST_DIR/src +mkdir -p $DIST_DIR/sim +mkdir -p $DIST_DIR/doc + + +cp ../doc/*.pdf $DIST_DIR/doc/ 2>/dev/null +cp ../doc/*.txt $DIST_DIR/doc/ 2>/dev/null + +cp ./dist.in/notes.txt $DIST_DIR/ +cp ./dist.in/gpl-3.0.txt $DIST_DIR/ +cp ./dist.in/tb_$PROJECT.wdo $DIST_DIR/sim/ +cp ./dist.in/tb_$PROJECT.fdo $DIST_DIR/sim/ + +cp ./dist.in/tb_$PROJECT.vhd $DIST_DIR/src + +# Export files tagged for this release +# To avoid problems with renamed files: Don't tag on per file basis. Tag upper directory then delete tag from unwanted files!!! +cvs export -d $DIST_DIR/src/ -r $USE_TAG VHDL/lib/EMAC/src 1>/dev/null +cvs export -d $DIST_DIR/src/ -r $USE_TAG VHDL/lib/FIFO/src 1>/dev/null +cvs export -d $DIST_DIR/src/ -r $USE_TAG VHDL/lib/misc 1>/dev/null