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- refactored

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1541 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 10:27:33 +00:00
parent d0433ac19d
commit 06feba8f63
47 changed files with 255 additions and 357 deletions
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lib/SDRAM/ddr_sdr_v1_5/ghdl/tb_ctrl_ddr_wb32.make
+7 -5
View File
@@ -1,8 +1,10 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/SDRAM/ddr_sdr_v1_5
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -29,5 +31,5 @@ RUN_TIME := 200us
GHDL_OPTS := -P$(ROOT_PATH)/Common/sim/build/unisim/unisim -fsynopsys -fexplicit
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/SDRAM/ddr_sdr_v1_5/ghdl/tb_ctrl_ddr_wb64.make
+7 -6
View File
@@ -1,10 +1,11 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/SDRAM/ddr_sdr_v1_5
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/models/memory/sdram/mt46v16m16/mt46v16m16.vhd
SRCS += $(FIFO_SYNC_SRCS)
@@ -29,5 +30,5 @@ RUN_TIME := 200us
GHDL_OPTS := -P$(ROOT_PATH)/Common/sim/build/unisim/unisim -fsynopsys -fexplicit
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk