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- refactored

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1541 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 10:27:33 +00:00
parent d0433ac19d
commit 06feba8f63
47 changed files with 255 additions and 357 deletions
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lib/JBUS/busmaster/ghdl/tb_busmaster_async.make
+3 -4
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@@ -1,7 +1,6 @@
include ../../../../lib/FIFO/ghdl/fifo_async.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS/busmaster
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -16,5 +15,5 @@ ENTITY := tb_busmaster_async
WITH_VCD := y
RUN_TIME := 80us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/busmaster/ghdl/tb_busmaster_sync.make
+3 -4
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@@ -1,7 +1,6 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS/busmaster
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -16,5 +15,5 @@ ENTITY := tb_busmaster_sync
WITH_VCD := y
RUN_TIME := 40us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/dmac/ghdl/tb_dmac_sync.make
+3 -4
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@@ -1,7 +1,6 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -17,5 +16,5 @@ ENTITY := tb_dmac
WITH_VCD := y
RUN_TIME := 6us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/memory/ghdl/tb_ram_wb.make
+3 -5
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@@ -1,5 +1,5 @@
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -13,6 +13,4 @@ ENTITY := tb_ram_wb
WITH_VCD := y
RUN_TIME := 1500ns
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/memory/ghdl/tb_rom_wb.make
+3 -4
View File
@@ -1,5 +1,5 @@
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(MOD_PATH)/src/rom_sim.vhd
@@ -12,6 +12,5 @@ ENTITY := tb_rom_wb
WITH_VCD := y
RUN_TIME := 1500ns
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk