diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys.prj b/projects/mips_sys/ise101/mips_sys/mips_sys.prj
index b8b35cd..3498a35 100644
--- a/projects/mips_sys/ise101/mips_sys/mips_sys.prj
+++ b/projects/mips_sys/ise101/mips_sys/mips_sys.prj
@@ -1,47 +1,55 @@
-vhdl work "../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd"
-vhdl work "../../src/sdram_config.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/vga_types.vhd"
-vhdl work "../../../../lib/FIFO/src/gray_counter.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/vga_sync.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd"
-vhdl work "../../../../lib/misc/utils_pkg.vhd"
-vhdl work "../../../../lib/misc/singleshot.vhd"
-vhdl work "../../../../lib/misc/dpram_1w1r.vhd"
-vhdl work "../../../../lib/FIFO/src/fifo_async_ctrl.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd"
-vhdl work "../../../../lib/uart/kcuart_tx.vhd"
-vhdl work "../../../../lib/uart/kcuart_rx.vhd"
-vhdl work "../../../../lib/uart/bbfifo_16x8.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd"
-vhdl work "../../../../lib/FIFO/src/fifo_sync_ctrl.vhd"
-vhdl work "../../../../lib/FIFO/src/fifo_async.vhd"
-vhdl work "../../../../lib/ac97_ctrl/src/core/ac_out.vhd"
-vhdl work "../../../../lib/ac97_ctrl/src/core/ac_in.vhd"
-vhdl work "../../src/bootloader.ROM_ld.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd"
-vhdl work "../../../../lib/uart/uart_tx.vhd"
-vhdl work "../../../../lib/uart/uart_rx.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
-vhdl work "../../../../lib/ps2_port/src/ps2_core.vhd"
-vhdl work "../../../../lib/ps2_port/src/debounce.vhd"
-vhdl work "../../../../lib/misc/async_types.vhd"
-vhdl work "../../../../lib/FIFO/src/fifo_sync.vhd"
-vhdl work "../../../../lib/ac97_ctrl/src/core/ac_io.vhd"
-vhdl work "../../src/clockgen_virtex4.vhd"
-vhdl work "../../src/async_defs.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend64.vhd"
-vhdl work "../../../../lib/uart/uart_wb.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd"
-vhdl work "../../../../lib/ps2_port/src/ps2_wb.vhd"
-vhdl work "../../../../lib/ps2_port/src/ps2_phy_virtex.vhd"
-vhdl work "../../../../lib/misc/rom_wb.vhd"
-vhdl work "../../../../lib/misc/lcd_port.vhd"
-vhdl work "../../../../lib/misc/gpio_wb.vhd"
-vhdl work "../../../../lib/misc/async_port_wb.vhd"
-vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_types.vhd"
-vhdl work "../../../../lib/ac97_ctrl/src/core/ac97_wb.vhd"
-vhdl work "../../src/mips_sys.vhd"
+vhdl work "../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd"
+vhdl work "../../src/sdram_config.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/vga_types.vhd"
+vhdl work "../../../../lib/FIFO/src/gray_counter.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/vga_sync.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd"
+vhdl work "../../../../lib/rams/dpram_1w1r2c_ra_xil.vhd"
+vhdl work "../../../../lib/misc/utils_pkg.vhd"
+vhdl work "../../../../lib/misc/singleshot.vhd"
+vhdl work "../../../../lib/FIFO/src/fifo_sync_ctrl.vhd"
+vhdl work "../../../../lib/FIFO/src/fifo_async_ctrl.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd"
+vhdl work "../../../../lib/uart/kcuart_tx.vhd"
+vhdl work "../../../../lib/uart/kcuart_rx.vhd"
+vhdl work "../../../../lib/uart/bbfifo_16x8.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd"
+vhdl work "../../../../lib/rams/dpram_1w1r2c_ro_xil.vhd"
+vhdl work "../../../../lib/FIFO/src/fifo_sync.vhd"
+vhdl work "../../../../lib/FIFO/src/fifo_async.vhd"
+vhdl work "../../../../lib/emac/src/sipo.vhd"
+vhdl work "../../../../lib/emac/src/piso.vhd"
+vhdl work "../../../../lib/emac/src/emac_types.vhd"
+vhdl work "../../../../lib/emac/src/crc32.vhd"
+vhdl work "../../../../lib/ac97_ctrl/src/core/ac_out.vhd"
+vhdl work "../../../../lib/ac97_ctrl/src/core/ac_in.vhd"
+vhdl work "../../src/bootloader.ROM_ld.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd"
+vhdl work "../../../../lib/uart/uart_tx.vhd"
+vhdl work "../../../../lib/uart/uart_rx.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
+vhdl work "../../../../lib/ps2_port/src/ps2_core.vhd"
+vhdl work "../../../../lib/ps2_port/src/debounce.vhd"
+vhdl work "../../../../lib/misc/async_types.vhd"
+vhdl work "../../../../lib/emac/src/emac_tx.vhd"
+vhdl work "../../../../lib/emac/src/emac_rx.vhd"
+vhdl work "../../../../lib/ac97_ctrl/src/core/ac_io.vhd"
+vhdl work "../../src/clockgen_virtex4.vhd"
+vhdl work "../../src/async_defs.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend64.vhd"
+vhdl work "../../../../lib/uart/uart_wb.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd"
+vhdl work "../../../../lib/ps2_port/src/ps2_wb.vhd"
+vhdl work "../../../../lib/ps2_port/src/ps2_phy_virtex.vhd"
+vhdl work "../../../../lib/misc/rom_wb.vhd"
+vhdl work "../../../../lib/misc/lcd_port.vhd"
+vhdl work "../../../../lib/misc/gpio_wb.vhd"
+vhdl work "../../../../lib/misc/async_port_wb.vhd"
+vhdl work "../../../../lib/emac/src/emac_top_jb.vhd"
+vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_types.vhd"
+vhdl work "../../../../lib/ac97_ctrl/src/core/ac97_wb.vhd"
+vhdl work "../../src/mips_sys.vhd"
diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys.xst b/projects/mips_sys/ise101/mips_sys/mips_sys.xst
index 8b21e6b..1deea6f 100644
--- a/projects/mips_sys/ise101/mips_sys/mips_sys.xst
+++ b/projects/mips_sys/ise101/mips_sys/mips_sys.xst
@@ -1,62 +1,62 @@
-set -tmpdir "W:/vhdl/projects/mips_sys/ise101/mips_sys/xst/projnav.tmp"
-set -xsthdpdir "W:/vhdl/projects/mips_sys/ise101/mips_sys/xst"
-run
--ifn mips_sys.prj
--ifmt mixed
--ofn mips_sys
--ofmt NGC
--p xc4vsx35-10-ff668
--top mips_sys
--opt_mode Speed
--opt_level 1
--power NO
--iuc NO
--lso mips_sys.lso
--keep_hierarchy NO
--netlist_hierarchy as_optimized
--rtlview Yes
--glob_opt AllClockNets
--read_cores YES
--write_timing_constraints NO
--cross_clock_analysis NO
--hierarchy_separator /
--bus_delimiter <>
--case maintain
--slice_utilization_ratio 100
--bram_utilization_ratio 100
--dsp_utilization_ratio 100
--verilog2001 YES
--fsm_extract YES -fsm_encoding Auto
--safe_implementation No
--fsm_style lut
--ram_extract Yes
--ram_style Auto
--rom_extract Yes
--mux_style Auto
--decoder_extract YES
--priority_extract YES
--shreg_extract YES
--shift_extract YES
--xor_collapse YES
--rom_style Auto
--auto_bram_packing NO
--mux_extract YES
--resource_sharing NO
--async_to_sync NO
--use_dsp48 auto
--iobuf YES
--max_fanout 500
--bufg 32
--bufr 24
--register_duplication YES
--register_balancing Yes
--move_first_stage YES
--move_last_stage YES
--slice_packing YES
--optimize_primitives NO
--use_clock_enable Auto
--use_sync_set Auto
--use_sync_reset Auto
--iob true
--equivalent_register_removal YES
--slice_utilization_ratio_maxmargin 5
+set -tmpdir "W:/SVN/vhdl/trunk/projects/mips_sys/ise101/mips_sys/xst/projnav.tmp"
+set -xsthdpdir "W:/SVN/vhdl/trunk/projects/mips_sys/ise101/mips_sys/xst"
+run
+-ifn mips_sys.prj
+-ifmt mixed
+-ofn mips_sys
+-ofmt NGC
+-p xc4vsx35-10-ff668
+-top mips_sys
+-opt_mode Speed
+-opt_level 1
+-power NO
+-iuc NO
+-lso mips_sys.lso
+-keep_hierarchy NO
+-netlist_hierarchy as_optimized
+-rtlview Yes
+-glob_opt AllClockNets
+-read_cores YES
+-write_timing_constraints NO
+-cross_clock_analysis NO
+-hierarchy_separator /
+-bus_delimiter <>
+-case maintain
+-slice_utilization_ratio 100
+-bram_utilization_ratio 100
+-dsp_utilization_ratio 100
+-verilog2001 YES
+-fsm_extract YES -fsm_encoding Auto
+-safe_implementation No
+-fsm_style lut
+-ram_extract Yes
+-ram_style Auto
+-rom_extract Yes
+-mux_style Auto
+-decoder_extract YES
+-priority_extract YES
+-shreg_extract YES
+-shift_extract YES
+-xor_collapse YES
+-rom_style Auto
+-auto_bram_packing NO
+-mux_extract YES
+-resource_sharing NO
+-async_to_sync NO
+-use_dsp48 auto
+-iobuf YES
+-max_fanout 500
+-bufg 32
+-bufr 24
+-register_duplication YES
+-register_balancing Yes
+-move_first_stage YES
+-move_last_stage YES
+-slice_packing YES
+-optimize_primitives NO
+-use_clock_enable Auto
+-use_sync_set Auto
+-use_sync_reset Auto
+-iob true
+-equivalent_register_removal YES
+-slice_utilization_ratio_maxmargin 5
diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj b/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
index db0d3e8..1cc4ae3 100644
--- a/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
+++ b/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
@@ -1,47 +1,55 @@
-vhdl work "W:\vhdl\lib\FIFO\src\fifo_ctrl_pkg.vhd"
-vhdl work "W:\vhdl\projects\mips_sys\src\sdram_config.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_types.vhd"
-vhdl work "W:\vhdl\lib\FIFO\src\gray_counter.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_sync.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_types.vhd"
-vhdl work "W:\vhdl\lib\misc\utils_pkg.vhd"
-vhdl work "W:\vhdl\lib\misc\singleshot.vhd"
-vhdl work "W:\vhdl\lib\misc\dpram_1w1r.vhd"
-vhdl work "W:\vhdl\lib\FIFO\src\fifo_async_ctrl.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_timing.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\fonts\char_rom_fixedsys_8x16.vhd"
-vhdl work "W:\vhdl\lib\uart\kcuart_tx.vhd"
-vhdl work "W:\vhdl\lib\uart\kcuart_rx.vhd"
-vhdl work "W:\vhdl\lib\uart\bbfifo_16x8.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_cmd.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\ddr_phy_virtex4.vhd"
-vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync_ctrl.vhd"
-vhdl work "W:\vhdl\lib\FIFO\src\fifo_async.vhd"
-vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_out.vhd"
-vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_in.vhd"
-vhdl work "W:\vhdl\projects\mips_sys\src\bootloader.ROM_ld.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_backend.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\char_gen.vhd"
-vhdl work "W:\vhdl\lib\uart\uart_tx.vhd"
-vhdl work "W:\vhdl\lib\uart\uart_rx.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_top.vhd"
-vhdl work "W:\vhdl\lib\ps2_port\src\ps2_core.vhd"
-vhdl work "W:\vhdl\lib\ps2_port\src\debounce.vhd"
-vhdl work "W:\vhdl\lib\misc\async_types.vhd"
-vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync.vhd"
-vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_io.vhd"
-vhdl work "W:\vhdl\projects\mips_sys\src\clockgen_virtex4.vhd"
-vhdl work "W:\vhdl\projects\mips_sys\src\async_defs.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_frontend64.vhd"
-vhdl work "W:\vhdl\lib\uart\uart_wb.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend64_wb.vhd"
-vhdl work "W:\vhdl\lib\ps2_port\src\ps2_wb.vhd"
-vhdl work "W:\vhdl\lib\ps2_port\src\ps2_phy_virtex.vhd"
-vhdl work "W:\vhdl\lib\misc\rom_wb.vhd"
-vhdl work "W:\vhdl\lib\misc\lcd_port.vhd"
-vhdl work "W:\vhdl\lib\misc\gpio_wb.vhd"
-vhdl work "W:\vhdl\lib\misc\async_port_wb.vhd"
-vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_types.vhd"
-vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac97_wb.vhd"
-vhdl work "W:\vhdl\projects\mips_sys\src\mips_sys.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\FIFO\src\fifo_ctrl_pkg.vhd"
+vhdl work "W:\SVN\vhdl\trunk\projects\mips_sys\src\sdram_config.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\vga_types.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\FIFO\src\gray_counter.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\vga_sync.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\SDRAM\ddr_sdr_v1_5\src\sdram_types.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\rams\dpram_1w1r2c_ra_xil.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\utils_pkg.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\singleshot.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\FIFO\src\fifo_sync_ctrl.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\FIFO\src\fifo_async_ctrl.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\vga_timing.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\fonts\char_rom_fixedsys_8x16.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\uart\kcuart_tx.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\uart\kcuart_rx.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\uart\bbfifo_16x8.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\SDRAM\ddr_sdr_v1_5\src\sdram_cmd.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\SDRAM\ddr_sdr_v1_5\src\ddr_phy_virtex4.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\rams\dpram_1w1r2c_ro_xil.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\FIFO\src\fifo_sync.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\FIFO\src\fifo_async.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\sipo.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\piso.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\emac_types.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\crc32.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ac97_ctrl\src\core\ac_out.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ac97_ctrl\src\core\ac_in.vhd"
+vhdl work "W:\SVN\vhdl\trunk\projects\mips_sys\src\bootloader.ROM_ld.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\vga_backend.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\char_gen.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\uart\uart_tx.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\uart\uart_rx.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_top.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ps2_port\src\ps2_core.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ps2_port\src\debounce.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\async_types.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\emac_tx.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\emac_rx.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ac97_ctrl\src\core\ac_io.vhd"
+vhdl work "W:\SVN\vhdl\trunk\projects\mips_sys\src\clockgen_virtex4.vhd"
+vhdl work "W:\SVN\vhdl\trunk\projects\mips_sys\src\async_defs.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\VGA_ctrl\src\vga_frontend64.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\uart\uart_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend64_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ps2_port\src\ps2_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ps2_port\src\ps2_phy_virtex.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\rom_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\lcd_port.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\gpio_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\misc\async_port_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\emac\src\emac_top_jb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\CPUs\MIPS\src\core\mips_types.vhd"
+vhdl work "W:\SVN\vhdl\trunk\lib\ac97_ctrl\src\core\ac97_wb.vhd"
+vhdl work "W:\SVN\vhdl\trunk\projects\mips_sys\src\mips_sys.vhd"