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- added byte_count reset

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- generate ram_limit in sysclk-domain. Synced to MII-Clk domain
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@865 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2010-04-07 15:26:45 +00:00
parent 668ab68b8b
commit 063019e23e
1 changed files with 51 additions and 61 deletions
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lib/emac/src/emac_rx.vhd
+51 -61
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@@ -46,7 +46,9 @@ ARCHITECTURE behavior OF emac_rx IS
signal reset_en : std_logic; signal reset_en : std_logic;
signal fill_ptr : word_ptr_t; signal host_ptr : word_ptr_t;
signal host_ram_limit : word_ptr_t;
signal host_ram_base : word_ptr_t;
signal commit_en : std_logic; signal commit_en : std_logic;
@@ -80,10 +82,11 @@ ARCHITECTURE behavior OF emac_rx IS
signal sipo8_rst : std_logic; signal sipo8_rst : std_logic;
signal sipo8_dout_vld : std_logic; signal sipo8_dout_vld : std_logic;
signal sipo8_dout_en : std_logic; signal sipo8_dout_en : std_logic;
signal sipo8_en : std_logic;
signal byte_count_rst : std_logic;
signal byte_count_en : std_logic; signal byte_count_en : std_logic;
signal byte_count : word_ptr_t; signal byte_count : word_ptr_t;
signal byte_count_reg : word_ptr_t;
signal reset_pipe : unsigned(31 downto 0); signal reset_pipe : unsigned(31 downto 0);
@@ -102,13 +105,12 @@ ARCHITECTURE behavior OF emac_rx IS
signal mac_addr : mac_addr_t; signal mac_addr : mac_addr_t;
signal mac_chk_addr : mac_addr_t; signal mac_chk_addr : mac_addr_t;
signal rx_en : std_logic;
signal Gbps_en : std_logic; signal Gbps_en : std_logic;
type host_state_t is (host_init, host_flush, host_idle); type host_state_t is (host_init, host_flush, host_idle);
signal host_s, host_sn : host_state_t; signal host_s, host_sn : host_state_t;
type xfer_state_t is (xfer_init, xfer_reset, xfer_idle, xfer_setup, xfer_active, xfer_stop, xfer_finish); type xfer_state_t is (xfer_init, xfer_reset, xfer_idle, xfer_setup, xfer_active, xfer_finish, xfer_commit);
signal xfer_s, xfer_sn : xfer_state_t; signal xfer_s, xfer_sn : xfer_state_t;
alias cmd_mac_ok_in is cmd_fifo_din(cmd_fifo_din'left); alias cmd_mac_ok_in is cmd_fifo_din(cmd_fifo_din'left);
@@ -130,27 +132,26 @@ begin
ctrl_out.pkt_valid <= cmd_pkt_valid_out; ctrl_out.pkt_valid <= cmd_pkt_valid_out;
ctrl_out.pkt_bcast <= cmd_bcast_out; ctrl_out.pkt_bcast <= cmd_bcast_out;
ctrl_out.pkt_mac_match <= cmd_mac_ok_out; ctrl_out.pkt_mac_match <= cmd_mac_ok_out;
ctrl_out.rx_er <= mii_rx_er;
ctrl_out.reset_busy <= reset_en; ctrl_out.reset_busy <= reset_en;
dout <= ram_dout_b; dout <= ram_dout_b;
ram_en_b <= '1'; ram_en_b <= '1';
ram_addr_b <= fill_ptr; ram_addr_b <= host_ptr;
ram_en_a <= '1'; ram_en_a <= '1';
ram_din_a <= sipo32_dout; ram_din_a <= sipo32_dout;
ram_addr_a <= xfer_ptr; ram_addr_a <= xfer_ptr;
ram_we_a <= xfer_en and sipo32_dout_vld; ram_we_a <= xfer_en and sipo32_dout_vld;
xfer_vld <= not xfer_ram_full and (mac_chk_OK or mac_chk_BC or xfer_promiscious); xfer_vld <= mac_chk_OK or mac_chk_BC or xfer_promiscious;
cmd_fifo_we <= commit_en; cmd_fifo_we <= commit_en and xfer_vld;
cmd_fifo_re <= ctrl_in.pkt_free_en; cmd_fifo_re <= ctrl_in.pkt_free_en;
cmd_pkt_valid_in <= '1'; cmd_pkt_valid_in <= '1';
cmd_mac_ok_in <= mac_chk_OK; cmd_mac_ok_in <= mac_chk_OK;
cmd_bcast_in <= mac_chk_BC; cmd_bcast_in <= mac_chk_BC;
cmd_nbytes_in <= byte_count_reg; cmd_nbytes_in <= byte_count;
cmd_base_in <= xfer_base; cmd_base_in <= xfer_base;
@@ -178,9 +179,9 @@ fill_pointer:
if rising_edge(clk) then if rising_edge(clk) then
dout_vld <= ctrl_in.pkt_read_en; dout_vld <= ctrl_in.pkt_read_en;
if ctrl_in.pkt_req_en = '1' then if ctrl_in.pkt_req_en = '1' then
fill_ptr <= cmd_base_out; host_ptr <= cmd_base_out;
elsif ctrl_in.pkt_read_en = '1' then elsif ctrl_in.pkt_read_en = '1' then
fill_ptr <= fill_ptr + 1; host_ptr <= host_ptr + 1;
end if; end if;
end if; end if;
end process; end process;
@@ -195,19 +196,19 @@ host2xfer_sync_register:
xfer_promiscious <= ctrl_in.promiscious; xfer_promiscious <= ctrl_in.promiscious;
Gbps_en <= ctrl_in.Gbps_en; Gbps_en <= ctrl_in.Gbps_en;
mac_addr <= ctrl_in.mac_addr; mac_addr <= ctrl_in.mac_addr;
xfer_ram_limit <= host_ram_limit;
end if; end if;
end process; end process;
xfer_limit_register: host_limit_register:
process(mii_rx_clk) process(clk)
begin begin
if rising_edge(mii_rx_clk) then if rising_edge(clk) then
if xfer_set = '1' then host_ram_base <= xfer_base;
if cmd_fifo_empty = '1' then if cmd_fifo_empty = '1' then
xfer_ram_limit <= xfer_base - 1; host_ram_limit <= host_ram_base - 1;
else else
xfer_ram_limit <= cmd_base_out - 1; host_ram_limit <= cmd_base_out - 1;
end if;
end if; end if;
end if; end if;
@@ -234,7 +235,7 @@ xfer_base_logic:
if rising_edge(mii_rx_clk) then if rising_edge(mii_rx_clk) then
if reset_en = '1' then if reset_en = '1' then
xfer_base <= (others => '0'); xfer_base <= (others => '0');
elsif commit_en = '1' then elsif commit_en = '1' and xfer_vld = '1' then
xfer_base <= xfer_ptr; xfer_base <= xfer_ptr;
end if; end if;
end if; end if;
@@ -258,7 +259,7 @@ byte_counter:
process(mii_rx_clk) process(mii_rx_clk)
begin begin
if rising_edge(mii_rx_clk) then if rising_edge(mii_rx_clk) then
if sipo8_rst = '1' then if byte_count_rst = '1' then
byte_count <= (others => '0'); byte_count <= (others => '0');
elsif byte_count_en = '1' and sipo32_din_vld = '1' then elsif byte_count_en = '1' and sipo32_din_vld = '1' then
byte_count <= byte_count + 1; byte_count <= byte_count + 1;
@@ -266,16 +267,6 @@ byte_counter:
end if; end if;
end process; end process;
byte_count_register:
process(mii_rx_clk)
begin
if rising_edge(mii_rx_clk) then
if sipo8_rst = '1' then
byte_count_reg <= byte_count;
end if;
end if;
end process;
preamble_sync_logic: preamble_sync_logic:
process(mii_rx_clk) process(mii_rx_clk)
begin begin
@@ -349,42 +340,39 @@ xfer_state_next:
end process; end process;
xfer_state: xfer_state:
process(xfer_s, reset_en, rx_en, sipo32_dout_en, sipo32_dout_vld, preamble_rdy, preamble_OK, xfer_ram_full, xfer_vld) process(xfer_s, sipo32_en, sipo32_dout_en, preamble_rdy, preamble_OK, xfer_ram_full)
begin begin
commit_en <= '0'; commit_en <= '0';
xfer_set <= '0'; xfer_set <= '0';
xfer_en <= '0'; xfer_en <= '0';
sipo32_en <= '0'; sipo32_rst <= '0';
sipo32_rst <= reset_en; byte_count_rst <= '0';
sipo8_rst <= reset_en; preamble_rst <= '0';
mac_chk_rst <= '0';
byte_count_en <= '0'; byte_count_en <= '0';
preamble_rst <= reset_en;
mac_chk_rst <= reset_en;
sipo32_en <= rx_en;
xfer_sn <= xfer_s; xfer_sn <= xfer_s;
case xfer_s is case xfer_s is
when xfer_init => when xfer_init =>
if rx_en = '0' then if sipo32_en = '0' then
xfer_sn <= xfer_reset; xfer_sn <= xfer_reset;
end if; end if;
when xfer_reset => when xfer_reset =>
sipo32_rst <= '1'; sipo32_rst <= '1';
sipo8_rst <= '1';
preamble_rst <= '1'; preamble_rst <= '1';
byte_count_rst <= '1';
xfer_sn <= xfer_idle; xfer_sn <= xfer_idle;
when xfer_idle => when xfer_idle =>
sipo32_en <= '0';
if preamble_rdy = '1' then if preamble_rdy = '1' then
xfer_sn <= xfer_init; xfer_sn <= xfer_init;
if preamble_OK = '1' then if preamble_OK = '1' then
byte_count_en <= '1'; byte_count_en <= sipo32_en;
mac_chk_rst <= '1'; mac_chk_rst <= '1';
sipo32_rst <= '1'; sipo32_rst <= '1';
xfer_sn <= xfer_setup; xfer_sn <= xfer_setup;
@@ -393,29 +381,28 @@ xfer_state:
when xfer_setup => when xfer_setup =>
xfer_set <= '1'; xfer_set <= '1';
byte_count_en <= sipo32_en;
xfer_en <= sipo32_dout_en; xfer_en <= sipo32_dout_en;
byte_count_en <= rx_en;
xfer_sn <= xfer_active; xfer_sn <= xfer_active;
when xfer_active => when xfer_active =>
byte_count_en <= sipo32_en;
xfer_en <= sipo32_dout_en; xfer_en <= sipo32_dout_en;
byte_count_en <= rx_en; byte_count_en <= sipo32_en;
if xfer_ram_full = '1' then if xfer_ram_full = '1' then
xfer_sn <= xfer_finish; xfer_sn <= xfer_init;
elsif rx_en = '0' then elsif sipo32_en = '0' then
xfer_sn <= xfer_stop;
sipo8_rst <= '1';
end if;
when xfer_stop =>
xfer_en <= sipo32_dout_en;
byte_count_en <= rx_en;
if sipo32_dout_en = '0' then
xfer_sn <= xfer_finish; xfer_sn <= xfer_finish;
end if; end if;
when xfer_finish => when xfer_finish =>
commit_en <= xfer_vld; xfer_en <= sipo32_dout_en;
if sipo32_dout_en = '0' then
xfer_sn <= xfer_commit;
end if;
when xfer_commit =>
commit_en <= '1';
xfer_sn <= xfer_init; xfer_sn <= xfer_init;
when others => when others =>
@@ -495,11 +482,11 @@ mii_input_register:
if Gbps_en = '1' then if Gbps_en = '1' then
sipo32_din <= mii_rx; sipo32_din <= mii_rx;
sipo32_din_vld <= mii_rx_dv; sipo32_din_vld <= mii_rx_dv;
rx_en <= mii_rx_dv; sipo32_en <= not mii_rx_er;
else else
sipo32_din <= sipo8_dout; sipo32_din <= sipo8_dout;
sipo32_din_vld <= sipo8_dout_vld; sipo32_din_vld <= sipo8_dout_vld;
rx_en <= sipo8_dout_en; sipo32_en <= sipo8_dout_en;
end if; end if;
end if; end if;
end process; end process;
@@ -525,4 +512,7 @@ inst_sipo_8bit : entity work.sipo
); );
sipo8_rst <= reset_en or not (mii_rx_dv or sipo8_dout_en);
sipo8_en <= not mii_rx_er;
end behavior; end behavior;