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- don't create any vars in packages

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1632 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2021-04-04 08:59:02 +00:00
parent c22bd92d64
commit 04c0284ca7
2 changed files with 8 additions and 12 deletions
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lib/uart/ghdl/uart_sim.inc
+2 -4
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@@ -4,10 +4,8 @@ include $(VHDL_HOME)/make/defs.mk
PKG_NAME := UART_SIM
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/uart/src
$(PKG_NAME)_SRCS += $(MOD_PATH)/uart_types.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/sim/uart.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd
# -----------------------------------------------------------