diff --git a/lib/CPUs/MIPS/ghdl/Makefile b/lib/CPUs/MIPS/ghdl/Makefile
new file mode 100644
index 0000000..6fe5f52
--- /dev/null
+++ b/lib/CPUs/MIPS/ghdl/Makefile
@@ -0,0 +1,49 @@
+NAME ?= tb_mips_top
+
+include ../src/core/mips.mk
+
+#SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
+
+# RAMS
+SRCS += ../../../rams/dpram_2w2r2c_ra_sim.vhd
+SRCS += ../../../rams/dpram_1w1r2c_ra_sim.vhd
+
+# FIFOS
+SRCS += ../../../FIFO/src/fifo_ctrl_pkg.vhd
+SRCS += ../../../FIFO/src/gray_counter.vhd
+SRCS += ../../../FIFO/src/fifo_sync_ctrl.vhd
+SRCS += ../../../FIFO/src/fifo_sync.vhd
+SRCS += ../../../FIFO/src/fifo_async_ctrl.vhd
+SRCS += ../../../FIFO/src/fifo_async.vhd
+
+# UART
+SRCS += ../../../uart/uart_types.vhd
+SRCS += ../../../uart/uart_sim.vhd
+SRCS += ../../../uart/uart_wb.vhd
+
+# GPIO
+SRCS += ../../../misc/gpio_wb.vhd
+
+# Async port
+SRCS += ../../../misc/async_types.vhd
+SRCS += ../../../misc/async_port_wb.vhd
+SRCS += ../src/async_defs.vhd
+
+# ROM
+#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
+#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
+SRCS += ../src/bootloader_flash.ROM.vhd
+SRCS += ../../../misc/rom_wb.vhd
+
+# MIPS
+SRCS += $(MIPS_CORE_SRCS)
+
+# TB
+SRCS += ../src/$(NAME).vhd
+
+# Compile
+ENTITY_RUN = $(NAME)
+BUILD_DIR := build
+
+include ../../../../Common/make/ghdl.mk
+
diff --git a/lib/CPUs/MIPS/ghdl/hello.elf.flash.bin b/lib/CPUs/MIPS/ghdl/hello.elf.flash.bin
new file mode 100644
index 0000000..de625dc
Binary files /dev/null and b/lib/CPUs/MIPS/ghdl/hello.elf.flash.bin differ