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- added DMA_START and DMA_END strobe signals

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git-svn-id: http://moon:8086/svn/vhdl/trunk@977 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2013-05-28 11:23:23 +00:00
parent 27021a571d
commit 0253fc426d
4 changed files with 28 additions and 9 deletions
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lib/JBUS/src/busmaster_sync.vhd
+2 -2
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@@ -1,5 +1,5 @@
-----------------------------------------------------------------------
-- $Header: /tmp/cvsroot/VHDL/lib/JBUS/src/busmaster_sync.vhd,v 1.2 2013-05-27 11:16:22 jens Exp $
-- $Header: /tmp/cvsroot/VHDL/lib/JBUS/src/busmaster_sync.vhd,v 1.3 2013-05-28 11:23:15 jens Exp $
-----------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
@@ -41,7 +41,7 @@ entity busmaster_sync is
MDAT_I : in unsigned(DATA_WIDTH-1 downto 0);
MDAT_O : out unsigned(DATA_WIDTH-1 downto 0);
ADDR_O : out unsigned(31 downto 0);
SEL_O : out unsigned(3 downto 0);
SEL_O : out unsigned(DATA_WIDTH/8-1 downto 0);
WE_O : out std_logic;
CYC_O : out std_logic;
STB_O : out std_logic;