SB (tested by SPIM)
VA(1..0)       DMEM_WE        ROL
0              0001            0
1              0010            1
2              0100            2
3              1000            3

SH (tested by SPIM)
VA(1..0)       DMEM_WE        ROL
0              0011            0
2              1100            2

SWL (tested by SPIM)
VA(1..0)       DMEM_WE        ROL
0              0001            1 
1              0011            2
2              0111            3
3              1111            0

SWR (tested by SPIM)
VA(1..0)       DMEM_WE        ROL
0              1111            0
1              1110            1
2              1100            2
3              1000            3

LB (tested by SPIM)
VA(1..0)       REG_WE         ROR
0              1111            0   
1              1111            1   
2              1111            2   
3              1111            3   

LH (tested by SPIM)
VA(1..0)       REG_WE         ROR
0              1111            0      
2              1111            2   

LWL (tested by SPIM)
VA(1..0)       REG_WE         ROR
0              1000            1
1              1100            2
2              1110            3
3              1111            0

LWR (tested by SPIM)
VA(1..0)       REG_WE         ROR
0              1111            0   
1              0111            1   
2              0011            2   
3              0001            3   



*SHIFTER*        SB      SH      SWL      SWR     SW
shift_byp        0       0        0        0      1               
shift_off        0       0        1        0      x

SHL = VA + shift_off

*Byte Enable*    SB      SH      SWL      SWR     SW
be_byp           0       0        0        0      1               
quarter_word_en  1       0        0        0      x
half_word_en     0       1        0        0      x
align_left       x       x        0        1      x  


*SHIFTER*        LB      LH      LWL      LWR     LW
shift_byp        0       0        0        0      1               
shift_off        0       0        1        0      x 

SHL = VA + shift_off

*Byte Enable*    LB      LH      LWL      LWR     LW
be_byp           1       1        0        0      1
align_left       x       x        1        0      x


* Sign ext*    
se_byp =  shift_byp and (shift_byp and not be_byp)


00 11
01 10
10 01
11 00
