2010-03-13	Jens
	* misc/flash_port_wb.vhd 1.2:
		- made time specs in nano seconds, thus  independent of clock
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/flash_port_wb.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-03-12	Jens
	* CPUs/MIPS/dist/files.dist 1.7:
	* CPUs/MIPS/dist/mdist 1.13:
	* CPUs/MIPS/dist/tmpl/mips_sys.vhd 1.6:
	* CPUs/MIPS/dist/tmpl/notes.txt 1.11:
	* CPUs/MIPS/doc/J-MIPS.txt 1.7:
		- Back to current work
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* PCK_FIO-1.16/PCK_FIO.vhd 1.2:
	* radio/ddc/sim/tb_results.m 1.6:
		Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/files.dist 1.6:
	* CPUs/MIPS/dist/mdist 1.12:
	* CPUs/MIPS/dist/tmpl/mips_sys.vhd 1.5:
	* CPUs/MIPS/dist/tmpl/notes.txt 1.10:
	* CPUs/MIPS/doc/J-MIPS.txt 1.6:
		- Roll back for Release 12
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* radio/ddc/src/syn_ddc.vhd 1.9:
	* radio/ddc/src/tb_ddc.vhd 1.8:
		- added Altera stuff
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/sim/tb_cpu_itest.wdo 1.2:
	* CPUs/MIPS/dist/mdist 1.14:
	* CPUs/MIPS/dist/mdist 1.15:
	* CPUs/MIPS/dist/mdist 1.16:
	* CPUs/MIPS/dist/tmpl/notes.txt 1.12:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-03-11	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.20:
		- improved instant_raw logic. Less false alarms
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.16:
		- added asynchronous BUS FIFOs
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/files.dist 1.5:
	* CPUs/MIPS/dist/mdist 1.11:
	* CPUs/MIPS/dist/tmpl/notes.txt 1.9:
	* CPUs/MIPS/doc/J-MIPS.txt 1.5:
	* CPUs/MIPS/syn/ise101/mips_top.prj 1.5:
	* CPUs/MIPS/syn/ise101/mips_top_vhdl.prj 1.5:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/mips_sys.vhd 1.4:
		Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/tb_mips_top.vhd 1.2:
	* CPUs/MIPS/dist/tmpl/tb_mips_top.wdo 1.3:
		deleted
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/tb_mips_sys.vhd 1.1:
	* CPUs/MIPS/dist/tmpl/tb_mips_sys.wdo 1.1:
	* CPUs/MIPS/doc/toolchain/howto_build.txt 1.1:
	* CPUs/MIPS/doc/toolchain/make.sh 1.1:
	* CPUs/MIPS/doc/toolchain/newlib-1.16.0-jens.patch 1.1:
	* CPUs/MIPS/doc/toolchain/newlib-1.17.0-jens.patch 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-03-07	Jens
	* CPUs/MIPS/src/tb_mips_top.vhd 1.23:
	* uart/uart_wb.vhd 1.10:
		- added generic 'simulate_tx' for output of TX-Data into simulation log
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.28:
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.19:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.14:
		- added MRDY_O for I/D-Cache
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.fdo 1.12:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.18:
	* CPUs/MIPS/src/bootloader.ROM.vhd 1.6:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-22	Jens
	* CPUs/MIPS/sim/tb_mips_top_syn.fdo 1.1:
	* CPUs/MIPS/sim/tb_mips_top_syn.wdo 1.3:
	* CPUs/MIPS/src/mips_top_syn.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-17	Jens
	* misc/gpio_wb.vhd 1.8:
		- added to_01() to timer counter, to avoid simulation warnings
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-14	Jens
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.17:
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.18:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.13:
		- cleaned up
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-13	Jens
	* FIFO/sim/tb_gray_counter.wdo 1.2:
	* FIFO/src/gray_counter.vhd 1.3:
	* FIFO/src/tb_gray_counter.vhd 1.2:
		- cleaned up
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-12	Jens
	* FIFO/src/tb_fifo_async.vhd 1.2:
	* VGA_ctrl/src/vga_frontend64.vhd 1.24:
		- added new FIFO generics
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-11	Jens
	* FIFO/src/fifo_async.vhd 1.4:
	* FIFO/src/fifo_async_ctrl.vhd 1.5:
	* FIFO/src/fifo_sync.vhd 1.6:
	* FIFO/src/fifo_sync_ctrl.vhd 1.5:
		- added new FIFO generics
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.27:
		- added new FIFO generics
		- no STB_O if Bus input FIFO full.
		  => Bus out FIFO is read if SRDY_I = '1'  and MRDY_O = '1'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-09	Jens
	* CPUs/MIPS/src/tb_mips_top.vhd 1.22:
	* SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd 1.4:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd 1.4:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd 1.6:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.12:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.9:
	* SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd 1.4:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd 1.6:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.9:
	* VGA_ctrl/src/clkgen_virtex4.vhd 1.4:
	* misc/async_port_wb.vhd 1.15:
	* misc/async_types.vhd 1.7:
	* misc/clockgen_virtex4.vhd 1.3:
	* misc/gpio_wb.vhd 1.6:
	* misc/utils_pkg.vhd 1.4:
	* ps2_port/src/ps2_core.vhd 1.3:
	* ps2_port/src/ps2_wb.vhd 1.4:
		- changed frequencies into MHz units (real data type)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd 1.5:
	* misc/async_types.vhd 1.8:
		- to_cycles() now correctly rounded
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/gpio_wb.vhd 1.7:
	* ps2_port/src/ps2_core.vhd 1.4:
		- fixed rounding issue in usec prescaler
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd 1.5:
	* misc/async_port_wb.vhd 1.16:
		Minor changes to max cycle count
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/utils_pkg.vhd 1.5:
		- improved UTILS_FREQ_M(), UTILS_FREQ_D().
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-08	Jens
	* misc/gpio_wb.vhd 1.5:
		- added f_syscll_hz generic
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-07	Jens
	* CPUs/MIPS/src/async_defs.vhd 1.8:
	* SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd 1.4:
	* SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd 1.3:
		- made time specs in nano seconds
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.fdo 1.11:
		- added asynchronous BUS FIFOs
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* FIFO/src/fifo_async.vhd 1.3:
	* FIFO/src/fifo_async_ctrl.vhd 1.4:
		- added read enable for DPRAM. Inhibits dout to be altered if FIFO is already empty on reads
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo 1.3:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/async_port_wb.vhd 1.14:
	* misc/async_types.vhd 1.5:
		- made time specs in nano seconds, thus  independent of clock
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd 1.5:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.11:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.8:
	* SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd 1.5:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.8:
		- made time specs in SDRAM_config independent of SDRAM clock
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/async_types.vhd 1.6:
		- bugfix in to_cycles()
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.26:
	* CPUs/MIPS/src/core/mips_top.vhd 1.17:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.21:
		- added asynchronous BUS FIFOs
		- added cpu_clk
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* FIFO/src/fifo_sync.vhd 1.5:
	* FIFO/src/fifo_sync_ctrl.vhd 1.4:
		- cleaned up
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-02-06	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.17:
		Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo 1.5:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.7:
	* SDRAM/ddr_sdr_v1_5/src/reset_virtex4.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.7:
		- removed module reset_virtex4
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.16:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo 1.5:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.25:
		- added 16-depth Bus input FIFO (2 cycles additional latency)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-01-31	Jens
	* CPUs/MIPS/tools/Makefile 1.5:
	* CPUs/MIPS/tools/src/flashgen.c 1.3:
	* CPUs/MIPS/tools/src/romgen.c 1.5:
		Renamed old to new
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2010-01-09	Jens
	* CPUs/MIPS/todo.txt 1.7:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-12-06	Jens
	* ps2_port/src/ps2_wb.vhd 1.3:
		- added states of pins clk and data to status register
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-29	Jens
	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.10:
	* VGA_ctrl/src/vga_frontend64.vhd 1.23:
		- register set extended for future extensions
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.10:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-28	Jens
	* VGA_ctrl/src/vga_frontend64.vhd 1.22:
		- bugfix: BLIT IRQ-ack had no effect
		- increased BLIT chunk-size to 512 QWORDs
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-27	Jens
	* CPUs/MIPS/dist/tmpl/tb_mips_top.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/mips_sys.vhd 1.3:
		- added 'page_mode_en' inputs for async_port
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.10:
		- overwrite src-DIR with tmpl/tb_mips_top.vhd
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/tb_mips_top.wdo 1.2:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-25	Jens
	* VGA_ctrl/todo.txt 1.7:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-24	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.24:
		- bugfix: instructions uncached LW => cached LW (with cache-miss) was buggy.
		  Symptoms:
		  ...
		1.: lw     $a0, 32($s0)  # Uncached load from memory mapped I/O
		2.: lw     $a2, 4($v0)   # Cached load and cache-miss.
		                                  # $a0 receives same value as $a2.
		                                  # CPU skips writing $a0 due to busy flag of D-Cache,
		                                  # which is already active in the previous cycle
		...
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.20:
		- Loads image for bugfix: instructions uncached LW => cached LW (with cache-miss) was buggy.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.16:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.12:
		- removed unused 'en' pin.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.8:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.15:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-22	Jens
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.9:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_types.vhd 1.5:
		- set 'f_pxl_clk' of 'ts_vga_testbench' tp 40MHz
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.17:
		- added BLITTER
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.19:
		- bugfix blitter reset
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.18:
		- corrected blit NX which has to be divided by 2
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.8:
		- added BLITTER tests
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.21:
		- blitter FIFO is reseted on every new request
		- blitter always avaliable regardless of MSTEN
		- blit writes finish on blit_fifo_empty. Chunk counter only used for reads
		- premature finish of blit reads if NX*NY satisfied. No more chunk granularity
		- set BLIT_CHUNK_SIZE to 128 double-pixels
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.9:
		- added blitter loop
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.20:
		- added blitter completion interrupt
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-21	Jens
	* VGA_ctrl/src/vga_frontend64.vhd 1.16:
		- added Blitter registers
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-19	Jens
	* VGA_ctrl/sim/tb_vga_frontend64.fdo 1.5:
		- added sync FIFO for busout-FIFO
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.14:
		- increased bous-FIFO depth to 2 bits, to avoid bus-stalls
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.15:
		- buf_chg_ack also on 'host_fb_back' write
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.13:
		- added busout-FIFO for future multi-sourced master capability (VGA-scan, blitter)
		  Bus-out FIFO improved timing so much and leads to 300 less Slice - FIFOs are great!
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-15	Jens
	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.7:
		- added RDY generator => SLAVE is not always ready => better test.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd 1.4:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.10:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.6:
		- removed 'sdr_data_req_r'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/todo.txt 1.4:
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.8:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.12:
		- removed (quick and dirty) copy of front-Pointer to back-Pointer on buffer change. back-Pointer keeps host written value.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-11	Jens
	* SDRAM/ddr_sdr_v1_5/todo.txt 1.2:
	* SDRAM/ddr_sdr_v1_5/todo.txt 1.3:
	* VGA_ctrl/todo.txt 1.6:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-09	Jens
	* VGA_ctrl/src/vga_frontend64.vhd 1.10:
		- renamed buffers to fb_front and fb_back
		- fb_front is writable by host only if msten = '0'. fb_back is writable by host every time.
		- fb_front and fb_back are changed after complete frame. Controller can issue buffer-change Interrupt
		- packed resx, resy and fps into one 32-bit register
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.11:
		- minor changes to make ISE meet timing
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.6:
		- changes due to packing of resx, resy and fps into one 32-bit register
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.7:
	* VGA_ctrl/todo.txt 1.5:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-08	Jens
	* uart/uart_wb.vhd 1.9:
		- minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.9:
		- bugfix: added 'bufchg_irq_en' to registers
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.5:
	* VGA_ctrl/src/vga_frontend64.vhd 1.8:
		- added double buffer
		- added INT_O on buffer change
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.5:
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.6:
	* VGA_ctrl/todo.txt 1.3:
	* VGA_ctrl/todo.txt 1.4:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-07	Jens
	* ps2_port/src/ps2_core.vhd 1.2:
	* ps2_port/src/tb_ps2_core.vhd 1.2:
		- added error flags
		- RX abort when rx_buffer already full (error flag set)
		- added parity error flag
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* ps2_port/src/ps2_wb.vhd 1.2:
		- added error flags
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/char_gen.vhd 1.5:
		- turned all sys_clk-related async. resets to sys_clk synchronous resets
		- scroll-disable when cursor y-pos was set
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* ps2_port/sim/tb_ps2_core.fdo 1.2:
	* ps2_port/sim/tb_ps2_core.wdo 1.2:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-06	Jens
	* ps2_port/sim/tb_ps2_core.fdo 1.1:
	* ps2_port/sim/tb_ps2_core.wdo 1.1:
	* ps2_port/src/debounce.vhd 1.1:
	* ps2_port/src/ps2_core.vhd 1.1:
	* ps2_port/src/ps2_phy_virtex.vhd 1.1:
	* ps2_port/src/ps2_wb.vhd 1.1:
	* ps2_port/src/tb_ps2_core.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-05	Jens
	* VGA_ctrl/sim/tb_vga_frontend.fdo 1.5:
	* VGA_ctrl/sim/tb_vga_frontend64.fdo 1.4:
	* VGA_ctrl/src/tb_vga_frontend.vhd 1.6:
	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.4:
		- removed clkgen. VGA-clock generated in TB
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/sim/tb_vga_frontend.wdo 1.4:
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.4:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-04	Jens
	* SDRAM/ddr_sdr_v1_5/doc/SDRAM_CTRL.vsd 1.2:
		- Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo 1.4:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.6:
		- minor bugfix (inclusion of distributed DPRAM, which doesn't exist)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo 1.4:
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.3:
	* VGA_ctrl/todo.txt 1.2:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/char_gen.vhd 1.4:
		- added cursor position status port
		- 'dout' is set to last written character
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/todo.txt 1.1:
	* VGA_ctrl/todo.txt 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend.vhd 1.6:
	* VGA_ctrl/src/vga_frontend64.vhd 1.7:
		- changed register rudimentary register layout (new offsets!)
		- added new regsiter features: status/ctrl register cursor position, screen resolution
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/clkgen_virtex4.vhd 1.3:
		- added BUFG for clk_out
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/tb_vga_frontend.vhd 1.5:
	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.3:
		- more documentation
		- more tests
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/async_port_wb.vhd 1.13:
		- minor bugfix (width mismatch)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-03	Jens
	* VGA_ctrl/src/vga_backend.vhd 1.4:
	* VGA_ctrl/src/vga_frontend.vhd 1.5:
	* VGA_ctrl/src/vga_frontend64.vhd 1.6:
		- pulled out clkgen. vga_clk is now provided from higher level
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd 1.4:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.7:
		- Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo 1.2:
	* VGA_ctrl/sim/tb_vga_frontend.wdo 1.3:
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.2:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/tb_vga_frontend.vhd 1.4:
	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.2:
		- added clkgen for vga
		- initialized master-mode
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/sim/tb_vga_frontend.fdo 1.4:
	* VGA_ctrl/sim/tb_vga_frontend64.fdo 1.3:
	* VGA_ctrl/src/char_gen.vhd 1.3:
		- include utils_pkg
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo 1.3:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.5:
		- include async. FIFO
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/utils_pkg.vhd 1.3:
		- added helper functions for DCM frequency synthesis
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.8:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.5:
		- SDRAM can now operate at different speed than BUS clock
		  - separated bus-clock (sys_clk) and SDRAM-clocks
		  - added async. FIFOs for clock domain separation
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_4/doc/SDRAM_CTRL.vsd 1.1:
	* SDRAM/ddr_sdr_v1_5/doc/SDRAM_CTRL.vsd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.6:
		- added separate SD-CLK generator
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd 1.3:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.9:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.5:
		- FIFO-depth of CMD-FIFO is not hardwired anymore. It's set to top-level FIFO-depth
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_types.vhd 1.4:
		- put general helper functions to utils_pkg
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.4:
		- changed CMD_FIFO_ADDR_WIDTH = 5
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/clkgen_virtex4.vhd 1.2:
	* misc/clockgen_virtex4.vhd 1.2:
		- cleaned up
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-11-02	Jens
	* misc/async_port_wb.vhd 1.12:
		- always specified leadout and release states, regardless of CPU-strobe (better timing)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend64.vhd 1.5:
		- bugfix: set Pos X/Y : data was not set.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-30	Jens
	* misc/async_port_wb.vhd 1.11:
		- some performance improvements
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.19:
		- Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.14:
	* CPUs/MIPS/src/async_defs.vhd 1.6:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/async_port_wb.vhd 1.9:
		- read-page cycle is minimum 2 cycles
		- change assertion check: Read page pulse length must be greater than one
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/async_port_wb.vhd 1.10:
		- writes have at least lead-in of one cycle if  lead-in is speifified to 0
		- no data drive during lead-out
		- no instant data drive in idle on 'en'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/async_defs.vhd 1.7:
		- zero lead-in / lead-out,
		  but added 4 cycles relelease necessary for writes. See tWR in datasheet)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-29	Jens
	* misc/async_port_wb.vhd 1.8:
		- Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/async_defs.vhd 1.5:
		- now 30 ns
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-28	Jens
	* CPUs/JCpu/src/cpu_embedded.vhd 1.2:
	* CPUs/JCpu/src/tb_cpu_embedded.vhd 1.2:
	* CPUs/JCpu/src/tb_cpu_itest.vhd 1.2:
		- removed XMEM-wait
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.13:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/src/itest_irom.vhdl 1.2:
		- removed ROM-depth generic
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.17:
		- flash has access time of 25 ns
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/sim/tb_cpu.fdo 1.2:
	* CPUs/JCpu/sim/tb_cpu_embedded.fdo 1.2:
		- changed ROM names to make TB run again
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.18:
		- added 'page_mode_en' for async_port
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/async_defs.vhd 1.4:
	* misc/async_types.vhd 1.4:
		-added new page_read parameters
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* misc/async_port_wb.vhd 1.7:
		-added new page_read. Page read can be en/disabled
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-27	Jens
	* CPUs/MIPS/doc/mips_sys_ml402.pdf 1.1:
		Initial revison
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.16:
		- added flash_we_n
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/async_port_timing.pdf 1.2:
	* CPUs/MIPS/doc/mips_biu.pdf 1.2:
	* CPUs/MIPS/doc/mips_drawings.vsd 1.15:
	* CPUs/MIPS/doc/mips_jbus_timing.pdf 1.4:
	* CPUs/MIPS/doc/mips_pipeline.pdf 1.3:
	* CPUs/MIPS/doc/mips_pipeline_stages.pdf 1.3:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.12:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.14:
		- async_port_timing: Changed names and timing diagram
		  to reflect V1.6 of async_port_wb.vhdl
		
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* misc/async_port_wb.vhd 1.6:
		- redesigned FSM. Zero leadin, zeroleadout and zero release is now possible
		- added assertion check for zero r/w-pulses
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* CPUs/MIPS/src/async_defs.vhd 1.3:
	* misc/async_types.vhd 1.3:
		- changed names
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* CPUs/MIPS/src/bootloader.ROM.vhd 1.5:
		- Booting from Flash is now from cached area (faster)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-24	Jens
	* CPUs/MIPS/doc/mips_drawings.vsd 1.13:
		- BIU: corrected drawing thickness of data lines
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* uart/uart_wb.vhd 1.8:
		- removed force-TX-IRQ and TX-IRQ acknowledge
		- TX-IRQ is always asserted if tx-FIFO is empty and tx-inten is active.
		  If TX-INT is not desired, it has to be switched off manually by TX-Inten.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
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2009-10-18	Jens
	* uart/uart_wb.vhd 1.7:
		- added force TX-interrupt register bit (0x200)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-17	Jens
	* CPUs/MIPS/doc/mips_sys.vsd 1.1:
		Initial revison
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.22:
		- changed NMI/RST behavior: reset exception entered after NMI/RST transition 1 => 0.
		- BEV = 1 after NMI/RST (like hard reset)
		- status not KUc,IEc not saved to KUp, IEp at NMI/RST (like hard reset)
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.6:
	* CPUs/MIPS/dist/tmpl/notes.txt 1.7:
	* CPUs/MIPS/doc/J-MIPS.txt 1.4:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.11:
	* CPUs/MIPS/src/bootloader.ROM.vhd 1.4:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.15:
	* CPUs/MIPS/todo.txt 1.5:
	* CPUs/MIPS/todo.txt 1.6:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.5:
		update
		
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.25:
		- Bugfix: register bypass with same target register, used for unaligned loads (LWL, LWR), was incorrect.
		  Newlib's memcpy() (MIPS-optimized) uses this for unaligned copy.
		  Consectutive load instructions without nops using same target register (which is legal) like
		   lw $1, 0(mem)
		   lwl $1, 1(mem)
		  or
		   lwl $1, 0(mem)
		   lwr $1, 1(mem)
		  or similar, lead to incorrect result. Now it's fixed.

	* CPUs/MIPS/doc/mips_drawings.vsd 1.12:
		- added LWL/LWR bypass
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* CPUs/MIPS/src/core/mips_cop.vhd 1.23:
		- added some comments
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-14	Jens
	* CPUs/MIPS/src/core/mips_shifter.vhd 1.3:
		Bugfix in gen_fill_mask_rom (wrong result on zero shift amounts due to width mismatch)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-13	Jens
	* uart/uart_wb.vhd 1.6:
		- fixed broken tx-interrupt
		- added tx_int and rx_int to status reg
		- tx-int is acked by writing to ctrl reg
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* uart/uart_tx.vhd 1.2:
		- added tx-complete and tx-empty to ports
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-09	Jens
	* uart/uart_wb.vhd 1.5:
		- extended baudrate register from 8 to 16 bits, allowing very low baudrates
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-10-03	Jens
	* CPUs/MIPS/sim/tb_mips_top.fdo 1.10:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.10:
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.24:
	* CPUs/MIPS/src/core/mips_top.vhd 1.16:
	* CPUs/MIPS/src/core/mips_types.vhd 1.16:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.14:
		- added pin non-maskable interrupt (NMI).
		   Exception vector is reset vector at (X"BFC00000")
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.4:
		update
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.9:
		update to R12
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/mips_sys.vhd 1.2:
		- added pin non-maskable interrupt (NMI).
		   Exception vector is reset vector at (X"BFC00000")
		- added pin 'eb' for endian little/big choice. 'eb' is sampled at reset
		- UART(): merged TX and RX interrupt to one interrupt line
		
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.21:
		- added pin non-maskable interrupt (NMI).
		   Exception vector is reset vector at (X"BFC00000")
		-  Interrupt pending flags (IP) are not masked in hardware by IM.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* CPUs/MIPS/dist/files.dist 1.4:
		- removed odd dist-versions of FIFOs and RAM
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
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2009-08-09	Jens
	* CPUs/MIPS/todo.txt 1.4:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-08-08	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.23:
		- minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.20:
		- Status.TS tied high to indicate absence of an MMU
		- Removed possibility of writng read-only status bits
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.3:
		update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.13:
		minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.9:
		- added COP data lines to pipeline
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.11:
		- detailed EX_stage according to implementation
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* CPUs/MIPS/doc/mips_drawings.vsd 1.10:
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.22:
		- COP dout generated from MEM_ex_result and DMEM_din with multiplexer, to reduce fanout of MEM.data.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
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2009-08-07	Jens
	* misc/dpram_2w2r_virtex4.vhd 1.2:
		del
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-10	Jens
	* CPUs/MIPS/src/core/mips_top.vhd 1.15:
		- doubled I-Cache size to 32kByte
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-09	Jens
	* CPUs/MIPS/src/core/mips_shifter.vhd 1.2:
		- replaced comparator-based fill-stage with rom-based fill-stage
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-08	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.21:
		- minor changes (better timing)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.19:
		- minor changes (bug)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.18:
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.20:
		- Reset vector is now injected during reset like an ordinary exception.
		  This minimizes pc.nxt MUX (Better timing)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-06	Jens
	* CPUs/MIPS/sim/tb_mips_top.fdo 1.9:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.9:
	* CPUs/MIPS/src/core/mips_biu.vhd 1.23:
	* CPUs/MIPS/syn/ise101/mips_top.prj 1.4:
	* CPUs/MIPS/syn/ise101/mips_top_vhdl.prj 1.4:
		- removed reference to fifo_sync_dist.
		  Use fifo_sync instead and specified ditributed ram_style
		  in XCF-file during synthesis
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.12:
		- removed register output latch (latch introduced global clock buffer, which is deprecated)
		- CPU is configured as BIG-endian
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-05	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.19:
	* CPUs/MIPS/src/core/mips_types.vhd 1.15:
		- renamed pc.is_branch:boolean to pc.branch_take:std_logic
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.17:
		- removed register output latch (latch introduced global clock buffer, which is deprecated)
		- added separate reg_pointer for read/write
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-03	Jens
	* uart/uart_wb.vhd 1.4:
		- removed INT_O_TX from UART. Use now common INT_O for RX/TX
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-05-01	Jens
	* VGA_ctrl/src/vga_frontend64.vhd 1.4:
		- added test color register base + 0x80
		- control signals derived from register file are noe registered for better timing
		- mem_offset updated from vga_mem_offset wehn new frame begins
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-27	Jens
	* CPUs/MIPS/src/core/mips_cop.vhd 1.16:
		- SR(7 .. 0) are not writable in user-mode
		- registered 'ctrl_out.int' for better timing
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-19	Jens
	* CPUs/MIPS/src/core/mips_cop.vhd 1.15:
		- status register is always writable
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* uart/uart_wb.vhd 1.3:
		- added interrupt enable
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-17	Jens
	* CPUs/MIPS/doc/memory_map.vsd 1.2:
	* CPUs/MIPS/src/core/mips_cop.vhd 1.14:
		- changed Exception vector from 0x80000180 to 0x80000080
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/async_port_timing.pdf 1.1:
	* CPUs/MIPS/doc/memory_map.pdf 1.1:
	* CPUs/MIPS/doc/memory_map.vsd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* misc/gpio_wb.vhd 1.4:
		- added 2. Interrupt timer
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-15	Jens
	* CPUs/MIPS/tools/src/romgen.c 1.4:
		- added switch EB/EL to switch endianess
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.13:
	* CPUs/MIPS/src/core/mips_top.vhd 1.14:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.11:
		- added port 'eb' for Endian-big selection
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.18:
		- bugfix: wrong 'pa_offset' when big-endian and half-word load/store
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* uart/uart_wb.vhd 1.2:
		- removed SEL for register writes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_types.vhd 1.14:
		- minor improvements for load/store shifter
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-11	Jens
	* CPUs/MIPS/src/core/mips_cop.vhd 1.12:
		Reworked exception FSM:
		  - Pipeline is now flushed and finished and all dependencies are solved before entering exception handler
		  - User mode writes on status register are now correctly finished before status is altered by exception
		  - Processor stalls for 2 cycles after RFE to ensure that status register is correct in user mode
		- Added int-port
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_types.vhd 1.13:
		- some new control signals in cop0_ctrl
		- added exc-Flag in WB_stage
		- simplified int signals
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.13:
		- Int-port is now at cop instead of pipeline
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.17:
		- reworked exception stuff
		- removed int-port (it's now in cop)
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-07	Jens
	* CPUs/MIPS/doc/mips_drawings.vsd 1.8:
		- Update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-04-06	Jens
	* CPUs/MIPS/doc/mips_drawings.vsd 1.7:
	* CPUs/MIPS/doc/mips_pipeline_stages.pdf 1.2:
		-Mips-Pipeline stages: added missing register for PC-Branch
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.6:
		-Mips-Pipeline: added missing register for PC-Branch
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-30	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.15:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.11:
		- redesigned
		- added invalidate_all and invalidate_at control
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.11:
		- removed weird feature, which prevents cop registers to be written in front of exception.
		  cop register behavior is now hopefully the same as general registers.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.12:
		- changed reset generator and added BIU-Reset signal
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.22:
		- 'dcache_en' now doesn't depend on CYC_O_dmem_rd or write_busy
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-29	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.14:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.10:
		- added control port
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-28	Jens
	* CPUs/MIPS/src/core/mips_types.vhd 1.12:
		- added cache_ctrl record. Used in c0_ctrl_out
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.10:
		- added Cop instructions COP0 32, COP0 33, COP 34, COP0 35:
		   ICACHE_invalidate_at, ICACHE_invalidate_all,
		   DCACHE_invalidate_at, DCACHE_invalidate_all.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.21:
		- added cache_ctrl input
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.11:
		- assigned c0_ctrl to BIU for cache_ctrl
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.16:
		- removed MUX for RESET_VECTOR in proc_stage_pc:
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-27	Jens
	* CPUs/MIPS/src/tb_mips_top.vhd 1.10:
	* misc/gpio_wb.vhd 1.3:
		- added timer inrterrupt
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-20	Jens
	* CPUs/MIPS/src/core/mips_cop.vhd 1.9:
		- cop ouput register is now latch (better timing)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/files.dist 1.3:
		- removed idecode_rom.vhd
		
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.8:
		- Update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-18	Jens
	* CPUs/MIPS/src/core/mips_cop.vhd 1.8:
		- added instructions 'lwc0' and 'swc0' for testing (which are usually invalid)
		- due to cop_reg_we in MEM_Stage, the output register is removed
		  (timing is slightly degraded). The reg pointer is delayed instead by one cycle
		- test-reg is now writable in user mode regardles of cop0 usability.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_instr.vhd 1.5:
		- added instructions 'lwcz' and 'swcz'.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/todo.txt 1.3:
		- Update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-17	Jens
	* CPUs/MIPS/src/core/mips_types.vhd 1.11:
		- new signal 'cop_read' in ctrl_lines
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_instr.vhd 1.4:
		- more decoding of cop_signals.
		  New cop_read is now implemented into instruction decoder
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.fdo 1.8:
		- removed idecode_rom.vhd
		
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.10:
		- - removed cop_reg_rd
		  if cop is read is now implemented into instruction decoder
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.15:
		- removed cop_reg_rd
		  if cop is read is now implemented into instruction decoder
		- generate 'stall_all' signal if ID/EX/MEM stall is active
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.7:
		- removed 'reg_rd' which is fed into pipeline.
		  if cop is read is now implemented into instruction decoder
		- simplified use of stall signals
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-16	Jens
	* CPUs/MIPS/src/core/mips_instr.vhd 1.3:
	* CPUs/MIPS/src/core/mips_types.vhd 1.10:
		- added COPz debugging identifier
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.14:
		- 'cop_dout' is now generated in pipeline in MEM_STAGE.
		  This gives possibility to load cop with memory contents (LWCz).
		- dmem_dout can be EX_STAGE.reg_b by default or cop_din if cop_instr_en is asserted.
		  This give possibility to store cop content to memory (SWCz)
		- removed idecode_rom. Uses opcode_ctrl_lines() directly.
		
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.6:
		- cop uses 'din' directly without delay. 'Din' is now generated in pipeline in MEM_STAGE.
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_instr.vhd 1.2:
		- simplified instruction decoder and removed genrom functions
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_idecode_rom.vhd 1.2:
		- deleted
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_types.vhd 1.9:
		- added opcode debugging identfier MFCz, MTCz, CFCz, CTCz, BCTz, BCFz for COP functions
		- removed COPz debugging identifier
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-15	Jens
	* CPUs/MIPS/src/core/mips_types.vhd 1.7:
		- common functions lg2() and po2() added
		- reworked cop0_ctrl_in/out types
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.9:
		- added cop0 here
		- added cache line sizes to generic
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.5:
		- Update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.13:
		- removed cop0
		- added interface for external cop0 and copz
		- reworked cop_read and cop_write signals.
		  Using only cop_read which is delay in pipeline
		
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.13:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.9:
		- cleaned up: removed lg2() and po2() to mips_types
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.4:
	* CPUs/MIPS/doc/mips_jbus_timing.pdf 1.3:
		- added detail to jbus-timing
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.20:
		- added cache line sizes to generic
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_types.vhd 1.8:
		- new release 12
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_cop.vhd 1.5:
		- added cache config to generic to create cache info in upper 16 bits PrID
		- unified control signals for later use with Copz
		- cleaned up
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-10	Jens
	* misc/gpio_wb.vhd 1.2:
		- removed timer reset dring RST_I
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-08	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.19:
		- Uncached DMEM is now spec. conform from A0000000..BFFFFFFF (instead A0000000..AFFFFFFF)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-03-01	Jens
	* CPUs/MIPS/dist/mdist 1.8:
	* CPUs/MIPS/src/core/mips_types.vhd 1.6:
		- new release 11
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/notes.txt 1.2:
		- Update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-28	Jens
	* CPUs/JCpu/src/core/chipreg.vhd 1.3:
	* CPUs/JCpu/src/core/int_ctrl.vhd 1.2:
		- removed edge trigger capabilty
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/src/core/cpu.vhd 1.3:
		- removed xmem_wait
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/src/core/cpu_pkg.vhd 1.3:
		- removed edge trigger capabilty
		- removed xmem_wait
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/src/core/chipreg.vhd 1.4:
	* CPUs/JCpu/src/core/cpu_pkg.vhd 1.4:
	* CPUs/JCpu/src/core/int_ctrl.vhd 1.3:
		- removed interrupt polarity capabilty
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-16	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.12:
		- bug-fix: pc_is_branch is now initialized at reset (fixes CPU unrecoverable state after reset)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.6:
		- new release candidate 11
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.9:
		- inreased flash and sram to 32kB
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/tmpl/mips_sys.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.7:
		- copies now mips_sys from templates
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-15	Jens
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.6:
		- minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.7:
		- Update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.3:
		- added async_port timing
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_icache.vhd 1.7:
		- reintroduced explicit 'rag_ram_re'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.11:
	* CPUs/MIPS/src/core/mips_types.vhd 1.5:
		- put dependency signals 'imem_dep', 'dmem_dep' and 'mul_dep' into structure for easier debugging
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.12:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.8:
		- Cleaned up
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-14	Jens
	* CPUs/MIPS/tools/Makefile 1.4:
		- added install target
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.5:
		- new revision 10b
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-13	Jens
	* VGA_ctrl/src/vga_frontend.vhd 1.4:
	* VGA_ctrl/src/vga_frontend64.vhd 1.3:
		- vga_frontend* used wrong raster coords (y was swapped) - fixed
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-11	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.10:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.5:
		- removed explicit tag_ram_read
		- remove state 'rd_cache'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.5:
		- minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.10:
	* CPUs/MIPS/src/core/mips_top.vhd 1.8:
		- put reset-logic outside pipeline
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.11:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.6:
		- re-added state 'rd_cache'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-09	Jens
	* CPUs/MIPS/tools/src/romgen.c 1.3:
		- TCL-gen for Chipscope 10.1
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.4:
		- new revision 10a
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-08	Jens
	* CPUs/MIPS/src/core/mips_reg.vhd 1.2:
		- removed RAM-init during synthesizing
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.9:
		- R0 clear during reset
		- dmem_be active also during read
		
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.wdo 1.4:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.8:
		- use async_be
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/async_defs.vhd 1.2:
	* misc/async_port_wb.vhd 1.5:
	* misc/async_types.vhd 1.2:
		- added async_be
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.18:
		- SEL_O asserts correctly for uncached reads
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-07	Jens
	* CPUs/MIPS/src/bootloader.ROM.vhd 1.3:
		- new build
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/mdist 1.3:
		- copies doc/*.txt to release
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/tb_mips_top.vhd 1.7:
		-added generic map for 'mips_top'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-06	Jens
	* CPUs/MIPS/dist/mdist 1.2:
	* CPUs/MIPS/doc/J-MIPS.txt 1.3:
	* CPUs/MIPS/src/core/mips_types.vhd 1.4:
		- new revision 10
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-02-04	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.9:
		- removed stall during instant_raw on same word_index (improves performance)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-31	Jens
	* CPUs/MIPS/doc/J-MIPS.txt 1.2:
		- added performance values for different cache sizes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/dist/files.dist 1.2:
		- renamed fifo
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-30	Jens
	* CPUs/MIPS/syn/ise101/mips_top.prj 1.3:
	* CPUs/MIPS/syn/ise101/mips_top_vhdl.prj 1.3:
		- update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.fdo 1.7:
	* CPUs/MIPS/todo.txt 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.wdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_r_rand_w.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_w_rand_r.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_addr.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdram_ctrl_frontend.fdo 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdram_ctrl_frontend.wdo 1.2:
	* SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo 1.2:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.4:
	* VGA_ctrl/sim/tb_vga_frontend.fdo 1.3:
	* VGA_ctrl/sim/tb_vga_frontend64.fdo 1.2:
	* ac97_ctrl/sim/tb_ac97_wb.fdo 1.2:
	* ac97_ctrl/src/core/ac97_wb.vhd 1.2:
	* filter/src/tb_fir_semi_parallel.vhd 1.11:
	* radio/ddc/sim/tb_ddc.fdo 1.6:
	* radio/ddc/src/syn_ddc.vhd 1.8:
		- renamed fifo_*sync_ctrl
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* FIFO/sim/tb_async_fifo_ctrl.fdo 1.2:
	* FIFO/sim/tb_async_fifo_ctrl.wdo 1.2:
	* FIFO/sim/tb_sync_fifo_ctrl.fdo 1.2:
	* FIFO/sim/tb_sync_fifo_ctrl.wdo 1.2:
	* FIFO/src/dpram.vhd 1.2:
	* FIFO/src/tb_async_fifo_ctrl.vhd 1.2:
	* FIFO/src/tb_sync_fifo_ctrl.vhd 1.2:
		- deleted
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* FIFO/src/fifo_async.vhd 1.2:
	* FIFO/src/fifo_ctrl_pkg.vhd 1.2:
	* FIFO/src/fifo_sync.vhd 1.4:
	* FIFO/src/gray_counter.vhd 1.2:
		- added header
		Committed on the Free edition of March Hare Software CVSNT Server.
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	* FIFO/src/dpram_1w1r.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* VGA_ctrl/src/vga_frontend.vhd 1.3:
	* VGA_ctrl/src/vga_frontend64.vhd 1.2:
		- renamed fifo ports
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* FIFO/src/fifo_async_ctrl.vhd 1.3:
	* FIFO/src/fifo_sync_ctrl.vhd 1.3:
	* FIFO/src/fifo_sync_dist.vhd 1.2:
	* FIFO/src/tb_fifo_async.vhd 1.1:
	* FIFO/src/tb_fifo_sync.vhd 1.1:
		- renamed
		Committed on the Free edition of March Hare Software CVSNT Server.
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		http://march-hare.com/cvsnt/

2009-01-24	Jens
	* CPUs/MIPS/src/bootloader.ROM.vhd 1.2:
		using gcc 4.3.2
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.7:
		- generic for cache sizes
		- JBus-ports are unsigned instead of word_t
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.17:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.6:
		- JBus-ports are unsigned instead of word_t
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/tools/Makefile 1.3:
	* CPUs/MIPS/tools/src/flashgen.c 1.2:
		- flashgen: new bigendian target
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-23	Jens
	* CPUs/MIPS/doc/J-MIPS.txt 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_drawings.vsd 1.2:
	* CPUs/MIPS/doc/mips_jbus_timing.pdf 1.2:
		- JBus-timing: removed ACK_I during write.
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-21	Jens
	* CPUs/MIPS/dist/files.dist 1.1:
	* CPUs/MIPS/dist/mdist 1.1:
	* CPUs/MIPS/dist/tmpl/gpl-3.0.txt 1.1:
	* CPUs/MIPS/dist/tmpl/hello.flash.bin 1.1:
	* CPUs/MIPS/dist/tmpl/tb_mips_top.wdo 1.1:
	* CPUs/MIPS/doc/mips_biu.pdf 1.1:
	* CPUs/MIPS/doc/mips_drawings.vsd 1.1:
	* CPUs/MIPS/doc/mips_jbus_timing.pdf 1.1:
	* CPUs/MIPS/doc/mips_pipeline.pdf 1.1:
	* CPUs/MIPS/doc/mips_pipeline_stages.pdf 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/doc/mips_pipeline.pdf 1.2:
		- update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-20	Jens
	* CPUs/MIPS/src/core/mips_types.vhd 1.3:
		- changed to rev.9
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.8:
		- removed commented lines
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-19	Jens
	* CPUs/MIPS/sim/tb_mips_top.fdo 1.6:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.5:
		- removed PCK_FIO (not needed)
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-18	Jens
	* CPUs/MIPS/sim/tb_mips_top.fdo 1.5:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.4:
	* CPUs/MIPS/tools/src/ramgen.c 1.2:
	* CPUs/MIPS/tools/src/romgen.c 1.2:
		- Minor changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/JCpu/src/core/chipreg.vhd 1.2:
	* CPUs/JCpu/src/core/cpu.vhd 1.2:
	* CPUs/JCpu/src/core/cpu_pkg.vhd 1.2:
		- rename 'page' to 'bank'
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* misc/async_port_wb.vhd 1.4:
		- added SEL_I and multiple write-enables on async port
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/tools/Makefile 1.2:
		- added flashgen build
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/async_defs.vhd 1.1:
	* CPUs/MIPS/src/bootloader.ROM.vhd 1.1:
	* CPUs/MIPS/tools/src/flashgen.c 1.1:
	* misc/async_types.vhd 1.1:
		Initial version
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top_syn.tdo 1.2:
	* CPUs/MIPS/sim/tb_mips_top_syn.wdo 1.2:
	* CPUs/MIPS/src/fibonacci.ROM_ld.vhd 1.2:
	* CPUs/MIPS/src/irom_hello.vhd 1.2:
	* CPUs/MIPS/src/irom_test1.vhd 1.2:
	* CPUs/MIPS/src/irom_test2.vhd 1.2:
	* CPUs/MIPS/src/irom_test3.vhd 1.2:
	* CPUs/MIPS/src/irom_test4.vhd 1.2:
	* CPUs/MIPS/src/irom_test5.vhd 1.2:
	* CPUs/MIPS/src/irom_test6.vhd 1.2:
	* CPUs/MIPS/src/irom_test_addsub.vhd 1.2:
	* CPUs/MIPS/src/irom_test_slt.vhd 1.2:
	* CPUs/MIPS/src/irom_test_slti.vhd 1.2:
	* CPUs/MIPS/src/irom_test_sub.vhd 1.2:
	* CPUs/MIPS/src/mips_embedded.vhd 1.2:
	* CPUs/MIPS/src/mips_embedded_syn.vhd 1.2:
	* CPUs/MIPS/src/ram.vhd 1.2:
	* CPUs/MIPS/src/ram_ld.vhd 1.2:
	* CPUs/MIPS/src/ram_sim.vhd 1.2:
	* CPUs/MIPS/src/rmd160_test.ROM_ld.vhd 1.2:
	* CPUs/MIPS/src/tb_mips_embedded.vhd 1.2:
	* CPUs/MIPS/src/tb_mips_embedded_syn.vhd 1.2:
	* CPUs/MIPS/src/testbench.ROM_ld.vhd 1.2:
	* CPUs/MIPS/tools/insrom.rb 1.2:
	* CPUs/MIPS/tools/irom.vhd.tpl 1.2:
	* CPUs/MIPS/tools/irom_ld.vhd.tpl 1.2:
	* CPUs/MIPS/tools/make.sh 1.2:
	* CPUs/MIPS/tools/rom.tcl.tpl 1.2:
		- deleted
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.fdo 1.4:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.3:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.3:
		- major changes
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

2009-01-16	Jens
	* CPUs/MIPS/syn/ise101/mips_top.prj 1.2:
	* CPUs/MIPS/syn/ise101/mips_top_vhdl.prj 1.2:
		- update
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_top.vhd 1.6:
		- renamed bui to biu
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/src/core/mips_biu.vhd 1.16:
		- renamed
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_top.fdo 1.3:
		- renamed bui, icache and dcache
		Committed on the Free edition of March Hare Software CVSNT Server.
		Upgrade to CVS Suite for more features and support:
		http://march-hare.com/cvsnt/

	* CPUs/MIPS/sim/tb_mips_embedded.fdo 1.2:
	* CPUs/MIPS/sim/tb_mips_embedded.wdo 1.2:
	* CPUs/MIPS/sim/tb_mips_embedded_syn.fdo 1.2:
	* CPUs/MIPS/sim/tb_mips_embedded_syn.tdo 1.2:
	* CPUs/MIPS/sim/tb_mips_embedded_syn.wdo 1.2:
	* CPUs/MIPS/sim/tb_mips_muldiv.ndo 1.2:
	* CPUs/MIPS/sim/tb_mips_muldiv.sdo 1.2:
	* CPUs/MIPS/sim/tb_mips_top.mdo 1.2:
	* CPUs/MIPS/sim/tb_mips_top.mwdo 1.2:
	* CPUs/MIPS/sim/tb_mips_top.sdo 1.2:
	* CPUs/MIPS/sim/tb_mips_top_syn.mdo 1.2:
		- deleted

2009-01-15	Jens
	* CPUs/MIPS/sim/tb_mips_top.fdo 1.2:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.2:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.2:
		- changed to J-Bus interface

2009-01-14	Jens
	* radio/mix/sim/tb_mix_cpx.fdo 1.2:
	* radio/mix/sim/tb_mix_real.fdo 1.2:
	* radio/mix/sim/tb_undc_real.fdo 1.2:
	* radio/mix/src/mix_cpx.vhd 1.2:
	* radio/mix/src/mix_real.vhd 1.2:
	* radio/mix/src/tb_mix_cpx.vhd 1.2:
	* radio/mix/src/tb_mix_real.vhd 1.2:
	* radio/mix/src/tb_undc_real.vhd 1.2:
	* radio/mix/src/undc_real.vhd 1.2:
		- uses common fixed_pkg

	* misc/dpram_2w2r.vhd 1.2:
		- changed read, write order (should have no effect)

	* radio/mix/sim/tb_undc_real.fdo 1.3:
		- removed reference to mix_pkg

	* radio/mix/src/mix_pkg.vhd 1.2:
		- deleted

2009-01-13	Jens
	* radio/ddc/sim/tb_results.m 1.5:
		- removed decimation in m-script (which is done in CFIR)

	* filter/src/fir_stage_sys.vhd 1.12:
		- bugfix 'x_out' register

	* filter/sim/tb_fir_semi_parallel.wdo 1.7:
	* filter/src/fir_semi_parallel.vhd 1.15:
	* filter/src/fir_stage_sys.vhd 1.11:
	* filter/src/tb_fir_semi_parallel.vhd 1.10:
	* radio/ddc/src/ddc.vhd 1.13:
		- fir_stage_sys only uses pipe_latency as parameter

2009-01-12	Jens
	* radio/ddc/src/ddc.vhd 1.12:
		- removed adding of one bit to cic_stages

	* misc/mult_signed.vhd 1.1:
		Initial version

2009-01-11	Jens
	* filter/sim/tb_fir_semi_parallel.wdo 1.6:
	* filter/src/fir_stage_sys.vhd 1.10:
	* filter/src/fir_stage_sys.vhd 1.9:
	* filter/src/tb_fir_semi_parallel.vhd 1.9:
	* radio/ddc/src/ddc.vhd 1.10:
	* radio/ddc/src/ddc.vhd 1.11:
	* radio/ddc/src/syn_ddc.vhd 1.7:
		- Minor changes

	* fixed/fixed_pkg_c.vhd 1.2:
		deleted

	* filter/src/delay_line.vhd 1.6:
		- removed 'ce'

	* radio/ddc/src/ddc.vhd 1.9:
	* radio/ddc/src/tb_ddc.vhd 1.7:
		- Uses decimating CFIR (decimate by 2)

	* filter/src/fir_semi_parallel.vhd 1.13:
	* filter/src/tb_fir_semi_parallel.vhd 1.8:
		- decimating is now working

	* filter/src/fir_semi_parallel.vhd 1.14:
		- Coeff RAMs have no 'ce' for read

	* fixed/fixed_util_pkg.vhd 1.1:
		Initial version

2009-01-10	Jens
	* filter/src/fir_semi_parallel.vhd 1.11:
	* filter/src/tb_fir_semi_parallel.vhd 1.7:
		- new signal 'start' to trigger FIR process
		  use din_vld for data load. This permits decimation FIR filtering

	* filter/sim/tb_fir_semi_parallel.fdo 1.6:
	* filter/sim/tb_fir_semi_parallel.wdo 1.5:
	* radio/ddc/sim/tb_results.m 1.3:
	* radio/ddc/sim/tb_results.m 1.4:
	* radio/ddc/src/tb_ddc.vhd 1.6:
		- Minor changes

	* radio/ddc/sim/tb_ddc.fdo 1.5:
	* radio/ddc/sim/tb_ddc.wdo 1.6:
	* radio/ddc/src/ddc.vhd 1.8:
		- Prepared with FIFO for decimating FIR

	* filter/src/fir_semi_parallel.vhd 1.12:
		- reverted to 1.10
		- kept signal 'start' to trigger FIR process

	* filter/src/filter_pkg.vhd 1.4:
		- Lowpass prototype: omega is fraction of fs/2

2009-01-09	Jens
	* radio/ddc/src/ddc.vhd 1.7:
	* radio/ddc/src/syn_ddc.vhd 1.6:
	* radio/ddc/src/tb_ddc.vhd 1.5:
		- added unfiltered output at ddc for eval

	* radio/ddc/sim/tb_ddc.wdo 1.5:
	* radio/ddc/sim/tb_results.m 1.2:
		- Cleaned up

2009-01-08	Jens
	* filter/src/fir_semi_parallel.vhd 1.10:
		- coef input registered

2009-01-06	Jens
	* radio/ddc/sim/tb_ddc.fdo 1.4:
	* radio/ddc/sim/tb_ddc.wdo 1.4:
	* radio/ddc/src/ddc.vhd 1.6:
		- changed iterative CFIR wirh semi-parallel version

	* radio/ddc/src/syn_ddc.vhd 1.5:
		- Cleaned up

	* filter/src/fir_stage_sys.vhd 1.8:
		- added assertion check for min coef_latency

2009-01-05	Jens
	* filter/sim/tb_fir_semi_parallel.fdo 1.5:
	* filter/sim/tb_fir_semi_parallel.wdo 1.4:
		- Minor changes

	* filter/src/fir_semi_parallel.vhd 1.8:
		- added dedicated DPRAM for COEFFS

	* filter/src/delay_line.vhd 1.5:
		- Cleaned up

	* filter/src/fir_stage_sys.vhd 1.7:
		- fixed missing CE at yout

	* filter/src/delay_line.vhd 1.4:
		- added RAM-based architecture

	* filter/src/fir_semi_parallel.vhd 1.9:
		- use RAM-based delayline

2009-01-04	Jens
	* filter/src/delay_line.vhd 1.2:
		- added shift_en input

	* filter/sim/tb_fir_semi_parallel.fdo 1.3:
	* filter/sim/tb_fir_semi_parallel.fdo 1.4:
	* filter/src/delay_line.vhd 1.3:
	* filter/src/tb_fir_semi_parallel.vhd 1.6:
		- Minor changes

	* filter/src/fir_semi_parallel.vhd 1.7:
	* filter/src/fir_stage_sys.vhd 1.6:
	* filter/src/tb_fir_stage_sys.vhd 1.4:
		- removed reset from fir_stage_sys

	* filter/src/fir_semi_parallel.vhd 1.6:
	* filter/src/tb_fir_semi_parallel.vhd 1.5:
		- fixed rdy-signal

	* filter/sim/tb_fir_semi_parallel.fdo 1.2:
	* filter/sim/tb_fir_semi_parallel.wdo 1.3:
	* filter/src/fir_semi_parallel.vhd 1.5:
	* filter/src/tb_fir_semi_parallel.vhd 1.4:
		- input data rate can be lower than filter

	* filter/src/fir_semi_parallel.vhd 1.3:
		- minor mods to accu_ld_pipe

	* filter/src/fir_semi_parallel.vhd 1.4:
	* filter/src/fir_stage_sys.vhd 1.5:
	* filter/src/tb_fir_semi_parallel.vhd 1.3:
		- added ce

2009-01-03	Jens
	* filter/src/fir_stage_sys.vhd 1.3:
		- bug fix coef-pipe

	* filter/sim/tb_fir_semi_parallel.fdo 1.1:
	* filter/sim/tb_fir_semi_parallel.wdo 1.1:
	* filter/src/delay_line.vhd 1.1:
	* filter/src/fir_pkg.vhd 1.1:
	* filter/src/fir_semi_parallel.vhd 1.1:
	* filter/src/tb_fir_semi_parallel.vhd 1.1:
		- Intital revision

	* filter/sim/tb_fir_iterative.fdo 1.3:
	* filter/sim/tb_fir_iterative.wdo 1.2:
	* filter/sim/tb_fir_parallel.fdo 1.3:
	* filter/sim/tb_fir_stage.fdo 1.3:
	* filter/sim/tb_fir_stage_sys.fdo 1.2:
	* filter/src/fir_iterative.vhd 1.5:
	* filter/src/fir_parallel.vhd 1.5:
	* filter/src/fir_stage.vhd 1.4:
	* filter/src/fir_stage_sys.vhd 1.4:
	* filter/src/tb_fir_iterative.vhd 1.4:
	* filter/src/tb_fir_parallel.vhd 1.7:
	* filter/src/tb_fir_stage.vhd 1.5:
	* filter/src/tb_fir_stage_sys.vhd 1.3:
		- uses only fir_pkg and filter_pkg for FIR

	* filter/sim/tb_fir_semi_parallel.wdo 1.2:
	* filter/src/fir_semi_parallel.vhd 1.2:
	* filter/src/tb_fir_semi_parallel.vhd 1.2:
		- minor mods to vld_pipe

2009-01-02	Jens
	* filter/src/fir_parallel_pkg.vhd 1.5:
		- moved fixed_array_t to fixed_util_pkg

	* filter/src/filter_pkg.vhd 1.3:
	* radio/cordic/src/cordic_pkg.vhd 1.5:
		- moved real_array_t to fixed_util_pkg

	* radio/ddc/sim/tb_ddc.fdo 1.3:
	* radio/ddc/sim/tb_ddc.wdo 1.3:
	* radio/ddc/src/ddc.vhd 1.4:
	* radio/ddc/src/tb_ddc.vhd 1.4:
		- added CFIR

	* radio/ddc/src/syn_ddc.vhd 1.4:
		- Minor changes

	* filter/src/tb_fir_stage_sys.vhd 1.2:
		- added coef_latency

	* filter/src/fir_stage_sys.vhd 1.2:
		- added coef_latency
		- y_dout registered

	* filter/src/fir_iterative_pkg.vhd 1.3:
		- fix ntaps_bits

	* filter/src/fir_iterative.vhd 1.4:
		- using fir_stage_sys instead of fir_stage

	* radio/ddc/src/ddc.vhd 1.5:
		- simplification for coef-array

	* misc/utils_pkg.vhd 1.2:
		- added real veriants of NextPower...

2008-12-31	Jens
	* filter/src/fir_iterative.vhd 1.3:
	* filter/src/fir_parallel.vhd 1.4:
	* filter/src/fir_parallel_pkg.vhd 1.4:
	* filter/src/fir_stage.vhd 1.3:
	* filter/src/tb_fir_iterative.vhd 1.3:
	* filter/src/tb_fir_parallel.vhd 1.6:
	* filter/src/tb_fir_stage.vhd 1.4:
		- removed sproto-calls due to crashes in synth tools

	* filter/sim/tb_fir_stage_sys.fdo 1.1:
	* filter/sim/tb_fir_stage_sys.wdo 1.1:
	* filter/src/fir_stage_sys.vhd 1.1:
	* filter/src/tb_fir_stage_sys.vhd 1.1:
		- Intital revision

2008-12-30	Jens
	* radio/decimator/CIC/src/cic_decim_pipe.vhd 1.3:
		- added register after scaler

	* radio/decimator/CIC/sim/tb_cic_decim_pipe.wdo 1.2:
		- Minor changes

	* filter/sim/tb_fir_iterative.fdo 1.2:
	* filter/sim/tb_fir_parallel.fdo 1.2:
	* filter/sim/tb_fir_stage.fdo 1.2:
	* filter/src/filter_pkg.vhd 1.2:
	* filter/src/fir_iterative.vhd 1.2:
	* filter/src/fir_iterative_pkg.vhd 1.2:
	* filter/src/fir_parallel.vhd 1.3:
	* filter/src/fir_parallel_pkg.vhd 1.3:
	* filter/src/fir_stage.vhd 1.2:
	* filter/src/fir_stage_pkg.vhd 1.2:
	* filter/src/tb_fir_iterative.vhd 1.2:
	* filter/src/tb_fir_parallel.vhd 1.5:
	* filter/src/tb_fir_stage.vhd 1.3:
	* radio/cordic/sim/tb_cordic_pipe_top.fdo 1.2:
	* radio/cordic/sim/tb_cordic_top.fdo 1.2:
	* radio/cordic/src/cordic_pipe_post.vhd 1.3:
	* radio/cordic/src/cordic_pipe_pre.vhd 1.3:
	* radio/cordic/src/cordic_pipe_stage.vhd 1.3:
	* radio/cordic/src/cordic_pipe_top.vhd 1.5:
	* radio/cordic/src/cordic_pkg.vhd 1.4:
	* radio/cordic/src/cordic_rom.vhd 1.2:
	* radio/cordic/src/cordic_stage.vhd 1.2:
	* radio/cordic/src/cordic_stage_post.vhd 1.2:
	* radio/cordic/src/cordic_stage_pre.vhd 1.2:
	* radio/cordic/src/cordic_top.vhd 1.2:
	* radio/cordic/src/tb_cordic_pipe_top.vhd 1.2:
	* radio/cordic/src/tb_cordic_top.vhd 1.2:
	* radio/ddc/sim/tb_ddc.fdo 1.2:
	* radio/ddc/sim/tb_ddc.wdo 1.2:
	* radio/decimator/CIC/sim/tb_cic_c_pipe.fdo 1.2:
	* radio/decimator/CIC/sim/tb_cic_decim_pipe.fdo 1.2:
	* radio/decimator/CIC/sim/tb_cic_i_pipe.fdo 1.2:
	* radio/nco/sim/tb_mix_cordic.fdo 1.5:
	* radio/nco/sim/tb_nco_cordic.fdo 1.5:
	* radio/nco/sim/tb_nco_lut.fdo 1.3:
	* radio/nco/src/mix_cordic.vhd 1.5:
	* radio/nco/src/nco_lut.vhd 1.3:
	* radio/nco/src/nco_lut_dbg.vhd 1.3:
	* radio/nco/src/nco_pkg.vhd 1.5:
	* radio/nco/src/tb_mix_cordic.vhd 1.7:
	* radio/nco/src/tb_nco_cordic.vhd 1.7:
	* radio/nco/src/tb_nco_lut.vhd 1.5:
	* radio/nco/src/wavelut.vhd 1.3:
	* radio/nco/src/waverom_dual.vhd 1.3:
		- uses ieee_proposed.fixed_pkg

	* radio/decimator/CIC/src/cic_c_pipe.vhd 1.2:
	* radio/decimator/CIC/src/cic_i_pipe.vhd 1.2:
	* radio/decimator/CIC/src/syn_cic_c_pipe.vhd 1.2:
	* radio/decimator/CIC/src/syn_cic_i_pipe.vhd 1.2:
	* radio/decimator/CIC/src/tb_cic_c_pipe.vhd 1.2:
	* radio/decimator/CIC/src/tb_cic_i_pipe.vhd 1.2:
		- combine in/out_width to max_width
		- uses ieee_proposed.fixed_pkg

	* radio/ddc/src/ddc.vhd 1.2:
	* radio/ddc/src/syn_ddc.vhd 1.2:
	* radio/ddc/src/tb_ddc.vhd 1.2:
	* radio/decimator/CIC/src/cic_decim_pipe.vhd 1.2:
	* radio/decimator/CIC/src/tb_cic_decim_pipe.vhd 1.2:
		- uses ieee_proposed.fixed_pkg
		- din scaled to more fraction precision at integrator input.
		  Number of integer bits are the same as din
		- min_gain intrduced (reduces complexity of barrel shifter).
		 Din always constant scaled by min_gain.

	* radio/ddc/src/ddc.vhd 1.3:
	* radio/ddc/src/syn_ddc.vhd 1.3:
	* radio/ddc/src/tb_ddc.vhd 1.3:
	* radio/decimator/CIC/src/cic_decim_pipe.vhd 1.4:
	* radio/decimator/CIC/src/tb_cic_decim_pipe.vhd 1.3:
		- Ratio and gain are set at synthesis time (simpler)

2008-12-29	Jens
	* radio/ddc/sim/tb_ddc.fdo 1.1:
	* radio/ddc/sim/tb_ddc.wdo 1.1:
	* radio/ddc/sim/tb_results.m 1.1:
	* radio/ddc/src/ddc.vhd 1.1:
	* radio/ddc/src/syn_ddc.vhd 1.1:
	* radio/ddc/src/tb_ddc.vhd 1.1:
	* radio/decimator/CIC/sim/tb_cic_c_pipe.fdo 1.1:
	* radio/decimator/CIC/sim/tb_cic_c_pipe.wdo 1.1:
	* radio/decimator/CIC/sim/tb_cic_decim_pipe.fdo 1.1:
	* radio/decimator/CIC/sim/tb_cic_decim_pipe.wdo 1.1:
	* radio/decimator/CIC/sim/tb_cic_i_pipe.fdo 1.1:
	* radio/decimator/CIC/sim/tb_cic_i_pipe.wdo 1.1:
	* radio/decimator/CIC/src/cic_c_pipe.vhd 1.1:
	* radio/decimator/CIC/src/cic_decim_pipe.vhd 1.1:
	* radio/decimator/CIC/src/cic_i_pipe.vhd 1.1:
	* radio/decimator/CIC/src/syn_cic_c_pipe.vhd 1.1:
	* radio/decimator/CIC/src/syn_cic_i_pipe.vhd 1.1:
	* radio/decimator/CIC/src/tb_cic_c_pipe.vhd 1.1:
	* radio/decimator/CIC/src/tb_cic_decim_pipe.vhd 1.1:
	* radio/decimator/CIC/src/tb_cic_i_pipe.vhd 1.1:
		- Intital revision

2008-12-28	Jens
	* radio/nco/src/mix_cordic.vhd 1.4:
	* radio/nco/src/tb_nco_cordic.vhd 1.4:
	* radio/nco/src/tb_nco_lut.vhd 1.3:
		- Minor changes

	* radio/nco/sim/tb_mix_cordic.fdo 1.4:
	* radio/nco/sim/tb_mix_cordic.wdo 1.4:
	* radio/nco/sim/tb_mix_cordic.wdo 1.5:
	* radio/nco/sim/tb_nco_cordic.fdo 1.4:
	* radio/nco/sim/tb_nco_cordic.wdo 1.2:
	* radio/nco/sim/tb_nco_cordic.wdo 1.3:
	* radio/nco/src/mix_cordic.vhd 1.3:
	* radio/nco/src/mix_cordic_dbg.vhd 1.3:
	* radio/nco/src/nco_cordic.vhd 1.5:
	* radio/nco/src/nco_cordic_dbg.vhd 1.3:
	* radio/nco/src/nco_pkg.vhd 1.4:
	* radio/nco/src/tb_mix_cordic.vhd 1.6:
	* radio/nco/src/tb_nco_cordic.vhd 1.6:
		- Cleaned up

	* radio/nco/src/nco_cordic.vhd 1.3:
		- added generic for fractional number of bits

	* radio/nco/src/nco_pkg.vhd 1.3:
		- moved common functions to fixed_util_pkg

	* radio/nco/sim/tb_mix_results.m 1.2:
		- added CIC-decimator

	* radio/nco/src/mix_cordic.vhd 1.1:
		- Intital revision

	* radio/cordic/src/cordic_pipe_post.vhd 1.2:
	* radio/cordic/src/cordic_pipe_pre.vhd 1.2:
	* radio/cordic/src/cordic_pipe_stage.vhd 1.2:
	* radio/cordic/src/cordic_pipe_top.vhd 1.4:
	* radio/cordic/src/cordic_pkg.vhd 1.3:
	* radio/nco/sim/tb_mix_cordic.fdo 1.3:
	* radio/nco/sim/tb_nco_cordic.fdo 1.3:
	* radio/nco/sim/tb_nco_lut.fdo 1.2:
	* radio/nco/src/mix_cordic.vhd 1.2:
	* radio/nco/src/nco_cordic.vhd 1.4:
	* radio/nco/src/nco_lut.vhd 1.2:
	* radio/nco/src/nco_lut_dbg.vhd 1.2:
	* radio/nco/src/tb_mix_cordic.vhd 1.5:
	* radio/nco/src/tb_nco_cordic.vhd 1.5:
	* radio/nco/src/tb_nco_lut.vhd 1.4:
	* radio/nco/src/wavelut.vhd 1.2:
	* radio/nco/src/waverom_dual.vhd 1.2:
		- uses now fixed_util_pkg for common functions

	* radio/nco/sim/tb_mix_cordic.fdo 1.2:
	* radio/nco/src/tb_mix_cordic.vhd 1.4:
		- use now non-debug-versions (NCO, MIX)  for TB

	* radio/nco/sim/tb_nco_cordic.fdo 1.2:
	* radio/nco/src/tb_nco_cordic.vhd 1.3:
		- use now non-debug-versions (NCO)  for TB

2008-12-22	Jens
	* radio/nco/sim/tb_mix_cordic.wdo 1.2:
	* radio/nco/sim/tb_mix_cordic.wdo 1.3:
	* radio/nco/src/tb_mix_cordic.vhd 1.3:
		- Minor changes

	* radio/nco/src/mix_cordic_dbg.vhd 1.2:
	* radio/nco/src/nco_cordic_dbg.vhd 1.2:
	* radio/nco/src/tb_mix_cordic.vhd 1.2:
	* radio/nco/src/tb_nco_cordic.vhd 1.2:
		- added generic for fractional number of bits

2008-12-21	Jens
	* radio/cordic/src/cordic_pkg.vhd 1.2:
	* radio/nco/src/tb_nco_lut.vhd 1.2:
		- Minor changes

	* radio/nco/src/nco_pkg.vhd 1.2:
		- added debug_mix_t

	* radio/nco/sim/tb_nco.fdo 1.2:
	* radio/nco/sim/tb_nco.wdo 1.2:
	* radio/nco/src/nco.vhd 1.2:
	* radio/nco/src/nco_cordic.vhd 1.2:
	* radio/nco/src/nco_dbg.vhd 1.2:
	* radio/nco/src/tb_nco.vhd 1.2:
		- Cleaned up

	* radio/cordic/src/cordic_pipe_top.vhd 1.2:
		- fixed valid_out signal for gain_corr=disabled

	* radio/cordic/eval_cordic.m 1.1:
	* radio/cordic/sim/eval_cordic.m 1.1:
	* radio/cordic/sim/tb_cordic_pipe_top.fdo 1.1:
	* radio/cordic/sim/tb_cordic_pipe_top.wdo 1.1:
	* radio/cordic/sim/tb_cordic_top.fdo 1.1:
	* radio/cordic/sim/tb_cordic_top.wdo 1.1:
	* radio/cordic/sim/tb_results.m 1.1:
	* radio/cordic/src/cordic_pipe_post.vhd 1.1:
	* radio/cordic/src/cordic_pipe_pre.vhd 1.1:
	* radio/cordic/src/cordic_pipe_stage.vhd 1.1:
	* radio/cordic/src/cordic_pipe_top.vhd 1.1:
	* radio/cordic/src/cordic_pkg.vhd 1.1:
	* radio/cordic/src/cordic_rom.vhd 1.1:
	* radio/cordic/src/cordic_stage.vhd 1.1:
	* radio/cordic/src/cordic_stage_post.vhd 1.1:
	* radio/cordic/src/cordic_stage_pre.vhd 1.1:
	* radio/cordic/src/cordic_top.vhd 1.1:
	* radio/cordic/src/tb_cordic_pipe_top.vhd 1.1:
	* radio/cordic/src/tb_cordic_top.vhd 1.1:
	* radio/nco/sim/tb_mix_cordic.fdo 1.1:
	* radio/nco/sim/tb_mix_cordic.wdo 1.1:
	* radio/nco/sim/tb_mix_results.m 1.1:
	* radio/nco/sim/tb_nco_cordic.fdo 1.1:
	* radio/nco/sim/tb_nco_cordic.wdo 1.1:
	* radio/nco/src/mix_cordic_dbg.vhd 1.1:
	* radio/nco/src/nco_cordic.vhd 1.1:
	* radio/nco/src/nco_cordic_dbg.vhd 1.1:
	* radio/nco/src/tb_mix_cordic.vhd 1.1:
	* radio/nco/src/tb_nco_cordic.vhd 1.1:
		- Intital revision

	* radio/cordic/src/cordic_pipe_top.vhd 1.3:
		- changed z-range default to 1.0

	* radio/nco/sim/tb_nco_lut.fdo 1.1:
	* radio/nco/sim/tb_nco_lut.wdo 1.1:
	* radio/nco/src/nco_lut.vhd 1.1:
	* radio/nco/src/nco_lut_dbg.vhd 1.1:
	* radio/nco/src/tb_nco_lut.vhd 1.1:
		- renamed

	* radio/nco/sim/tb_nco_results.m 1.2:
		- reduced lower spur boundary

2008-11-05	Jens
	* CPUs/MIPS/src/core/mips_cop.vhd 1.4:
		- added Tpd to 'dout' for sim

2008-11-01	Jens
	* ac97_ctrl/sim/tb_ac97_wb.fdo 1.1:
	* ac97_ctrl/sim/tb_ac97_wb.wdo 1.1:
	* ac97_ctrl/sim/tb_ac_in.fdo 1.1:
	* ac97_ctrl/sim/tb_ac_in.wdo 1.1:
	* ac97_ctrl/sim/tb_ac_io.fdo 1.1:
	* ac97_ctrl/sim/tb_ac_io.wdo 1.1:
	* ac97_ctrl/sim/tb_ac_out.fdo 1.1:
	* ac97_ctrl/sim/tb_ac_out.wdo 1.1:
	* ac97_ctrl/src/core/ac97_wb.vhd 1.1:
	* ac97_ctrl/src/core/ac_in.vhd 1.1:
	* ac97_ctrl/src/core/ac_io.vhd 1.1:
	* ac97_ctrl/src/core/ac_out.vhd 1.1:
	* ac97_ctrl/src/tb_ac97_wb.vhd 1.1:
	* ac97_ctrl/src/tb_ac_in.vhd 1.1:
	* ac97_ctrl/src/tb_ac_io.vhd 1.1:
	* ac97_ctrl/src/tb_ac_out.vhd 1.1:
		- Intital revision

2008-10-26	Jens
	* CPUs/MIPS/todo.txt 1.1:
		- Intital revision

	* CPUs/MIPS/sim/compile_simprim.do 1.2:
	* CPUs/MIPS/sim/compile_unisim.do 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/compile_simprim.do 1.2:
	* SDRAM/ddr_sdr_v1_4/sim/compile_unisim.do 1.2:
	* SDRAM/ddr_sdr_v1_5/sim/compile_simprim.do 1.2:
	* SDRAM/ddr_sdr_v1_5/sim/compile_unisim.do 1.2:
		- Cleaned up

	* CPUs/MIPS/sim/tb_mips_muldiv.fdo 1.2:
	* CPUs/MIPS/sim/tb_mips_muldiv.wdo 1.3:
	* CPUs/MIPS/src/tb_mips_muldiv.vhd 1.2:
	* filter/src/fir_parallel.vhd 1.2:
	* filter/src/fir_parallel_pkg.vhd 1.2:
	* filter/src/tb_fir_parallel.vhd 1.2:
	* filter/src/tb_fir_parallel.vhd 1.3:
	* filter/src/tb_fir_parallel.vhd 1.4:
	* filter/src/tb_fir_stage.vhd 1.2:
		- fixed some bugs

2008-10-25	Jens
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.8:
		- Removed dirty-bit which is not needed by Direct-Mapped Cache

	* VGA_ctrl/sim/tb_vga_frontend.wdo 1.2:
	* VGA_ctrl/src/tb_vga_frontend.vhd 1.3:
		- Minor changes

	* VGA_ctrl/src/dpram.vhd 1.2:
	* VGA_ctrl/src/linefifo.vhd 1.2:
		- Cleaned up

	* CPUs/MIPS/src/core/mips_cop.vhd 1.3:
		- Removed DEADBEEF-garbage

	* CPUs/MIPS/src/core/mips_biu.vhd 1.15:
		- added generics for cache sizes

	* VGA_ctrl/src/char_gen.vhd 1.2:
		- using now dpram_1w1r

	* VGA_ctrl/src/vga_backend.vhd 1.3:
		- removed delay at color output. Fixes image problems.

	* CPUs/MIPS/src/core/mips_top.vhd 1.5:
		- using bui-generics for cache sizes

	* CPUs/MIPS/syn/ise101/mips_top.prj 1.1:
	* CPUs/MIPS/syn/ise101/mips_top_vhdl.prj 1.1:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.fdo 1.1:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend64_wb.wdo 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend64_wb.vhd 1.1:
	* VGA_ctrl/sim/tb_vga_frontend64.fdo 1.1:
	* VGA_ctrl/sim/tb_vga_frontend64.wdo 1.1:
	* VGA_ctrl/src/tb_vga_frontend64.vhd 1.1:
	* VGA_ctrl/src/vga_frontend64.vhd 1.1:
		- Intital revision

	* VGA_ctrl/src/vga_types.vhd 1.3:
		- added conversion functions unsigned <=> color_t

	* VGA_ctrl/sim/tb_vga_frontend.fdo 1.2:
		-Removed linefifo.vhd and dpram.vhd
		- Uses now lib/FIFO/fifo_async.vhd

	* VGA_ctrl/src/vga_frontend.vhd 1.2:
		- Removed linefifo
		- Uses now lib/FIFO/fifo_async.vhd

	* FIFO/src/fifo_async_ctrl.vhd 1.2:
		- Bugfix: changed 'ptr_r' from 'bcnt_r' to 'bnxt_r' to prevent 
		read delay when FIFO is read (re = 1)

2008-10-24	Jens
	* FIFO/src/fifo_async.vhd 1.1:
		- Intital revision

	* FIFO/src/fifo_sync.vhd 1.3:
	* VGA_ctrl/src/tb_vga_frontend.vhd 1.2:
		- Cleaned up

2008-10-23	Jens
	* CPUs/MIPS/sim/tb_mips_muldiv.wdo 1.2:
		- Minor changes

	* CPUs/JCpu/sim/ModelSim SE .lnk 1.1:
	* CPUs/MIPS/sim/ModelSim SE .lnk 1.1:
		- Intital revision

	* CPUs/MIPS/sim/tb_eval_muldiv.fdo 1.2:
	* CPUs/MIPS/sim/tb_eval_muldiv.wdo 1.2:
	* CPUs/MIPS/src/mips_muldiv.vhd 1.2:
	* CPUs/MIPS/src/tb_eval_muldiv.vhd 1.2:
		- Cleaned up

	* SDRAM/ddr_sdr_v1_5/sim/ModelSim SE .lnk 1.2:
	* SSRAM/sim/ModelSim SE .lnk 1.2:
	* VGA_ctrl/sim/ModelSim SE .lnk 1.2:
	* misc/sim/ModelSim SE .lnk 1.2:
		- Using MODELSIM_HOME environment variable

2008-10-20	Jens
	* SSRAM/sim/ModelSim SE .lnk 1.1:
	* SSRAM/sim/tb_ssram_frontend_wb.fdo 1.1:
	* SSRAM/sim/tb_ssram_frontend_wb.wdo 1.1:
	* SSRAM/src/CY7C1354B.vhd 1.1:
	* SSRAM/src/package_utility.vhd 1.1:
	* SSRAM/src/ssram_frontend_wb.vhd 1.1:
	* SSRAM/src/tb_ssram_frontend_wb.vhd 1.1:
	* VGA_ctrl/sim/ModelSim SE .lnk 1.1:
	* misc/bbfifo.vhd 1.1:
	* misc/gpio_wb.vhd 1.1:
	* misc/ram_sim.vhd 1.1:
	* misc/ram_wb.vhd 1.1:
	* misc/rom_sim.vhd 1.1:
	* misc/rom_wb.vhd 1.1:
	* misc/sim/ModelSim SE .lnk 1.1:
	* misc/sim/tb_bbfifo.fdo 1.1:
	* misc/sim/tb_bbfifo.wdo 1.1:
	* misc/sim/tb_ram_wb.fdo 1.1:
	* misc/sim/tb_ram_wb.wdo 1.1:
	* misc/sim/tb_rom_wb.fdo 1.1:
	* misc/sim/tb_rom_wb.wdo 1.1:
	* misc/tb_bbfifo.vhd 1.1:
	* misc/tb_ram_wb.vhd 1.1:
	* misc/tb_rom_wb.vhd 1.1:
		- Intital revision

2008-10-19	Jens
	* VGA_ctrl/src/vga_types.vhd 1.2:
		Minor changes

	* VGA_ctrl/sim/tb_vga_frontend.fdo 1.1:
	* VGA_ctrl/sim/tb_vga_frontend.wdo 1.1:
	* VGA_ctrl/src/tb_vga_frontend.vhd 1.1:
	* VGA_ctrl/src/vga_frontend.vhd 1.1:
		- Intital revision

	* VGA_ctrl/src/vga_backend.vhd 1.2:
		- Removed linefifo and clockgen (=> frontend and top)

2008-10-18	Jens
	* SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.7:
		Minor changes

	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.4:
		- Cleaned up

	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.3:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo 1.3:
	* SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.3:
		- using now 64-bit SDR interface (2 SDRAMS)

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd 1.2:
		- introduced per-bank activation (avoids multiple activations on same bank)
		- some other improvements

2008-10-17	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.14:
		- Removed registered CYC_O (didn't work)

	* FIFO/src/fifo_sync_dist.vhd 1.1:
		- Intital revision

	* CPUs/MIPS/src/core/mips_biu.vhd 1.12:
		- Registered CYC_O

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.7:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.4:
		- Shortened BUS-cycle by one clock

	* FIFO/src/fifo_sync.vhd 1.2:
		- Removed distributed DPRAM reference

	* CPUs/MIPS/src/core/mips_biu.vhd 1.13:
		- Shortened read cycles
		- Minor improvements

2008-10-15	Jens
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.6:
		Simplified

2008-10-14	Jens
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.5:
		- Uses now full capacity of SDRAM (64-Bit interface on ML-402)
		- Removed read data mask

	* CPUs/MIPS/src/core/mips_biu.vhd 1.11:
		Minor changes

	* SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd 1.2:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.2:
		- Removed read data mask

	* SDRAM/ddr_sdr_v1_5/src/fifo_sync.vhd 1.3:
		- Moved to lib/FIFO

	* FIFO/src/fifo_sync.vhd 1.1:
		- Intital revision
		- Moved from SDRAM v1.5 to here

2008-10-12	Jens
	* misc/async_port_wb.vhd 1.3:
		Registered rdy (better timing)

	* FIFO/src/fifo_sync_ctrl.vhd 1.2:
		- Output pre_empty and pre_full for safer DPRAM control

	* CPUs/MIPS/src/core/mips_biu.vhd 1.10:
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.7:
	* CPUs/MIPS/src/core/mips_top.vhd 1.4:
		- Changed we to be
		- Changed r_wn to we

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.6:
		- Simplfied (better timing)

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.5:
		Cleaned up

2008-10-11	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.9:
		Bug fix: Uncached read and buffer write in different state

	* misc/async_port_wb.vhd 1.2:
		Bug fix: Address and data latch only if ready

2008-10-10	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.8:
		Added bus fifo and write fifo

	* misc/async_port.vhd 1.3:
	* misc/hpi_port.vhd 1.2:
		deleted

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.4:
		Added instant RAW avoidance

	* SDRAM/ddr_sdr_v1_5/src/fifo_sync.vhd 1.2:
		- Inhibit RAM write if FIFO is full
		- Inhibit update of output if last word is read

	* misc/async_port_wb.vhd 1.1:
	* misc/clockgen_virtex4.vhd 1.1:
	* uart/uart_wb.vhd 1.1:
		Intital revision

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.4:
	* misc/async_port.vhd 1.2:
		Removed ACK for J-Bus writes

2008-10-09	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.6:
		- Added bus error signals for IBE/DBE generation

	* CPUs/MIPS/src/core/mips_biu.vhd 1.6:
		- Added Bus timeout detection
		- STB_O, ADDR_O registered to output when SRDY

	* CPUs/MIPS/src/core/mips_dcache.vhd 1.3:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.3:
		- STB_O now deasserts only if SRDY active (fixes bus freezes 
		during heavy traffic)

	* CPUs/MIPS/src/core/mips_top.vhd 1.3:
		- Added bus error signals

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.3:
		Cleaned up

	* CPUs/MIPS/src/core/mips_biu.vhd 1.7:
		Minor changes

2008-10-08	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.5:
		Added data mask support

	* CPUs/MIPS/src/core/mips_cop.vhd 1.2:
		Masked IPs are not shown in CR

2008-10-07	Jens
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.2:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo 1.2:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.2:
		Minor changes

	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.2:
		- Registered ACK
		- 32bit Host I/F

	* CPUs/MIPS/src/core/mips_biu.vhd 1.4:
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.2:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.2:
	* CPUs/MIPS/src/core/mips_top.vhd 1.2:
		Introduced J-Bus

2008-10-02	Jens
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_r_rand_w.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_w_rand_r.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_addr.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd 1.2:
		Added data mask support

	* SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd 1.2:
	* SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd 1.2:
		Added data mask (read) support

	* SDRAM/ddr_sdr_v1_5/sim/ModelSim SE .lnk 1.1:
	* SDRAM/ddr_sdr_v1_5/sim/compile_simprim.do 1.1:
	* SDRAM/ddr_sdr_v1_5/sim/compile_unisim.do 1.1:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.fdo 1.1:
	* SDRAM/ddr_sdr_v1_5/sim/tb_sdram_ctrl_frontend_wb.wdo 1.1:
	* SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/fifo_sync.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/reset_virtex4.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_config.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd 1.1:
	* SDRAM/ddr_sdr_v1_5/src/tb_sdram_ctrl_frontend_wb.vhd 1.1:
		Intital revision

2008-09-21	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.5:
		Minor changes

	* CPUs/MIPS/src/core/mips_biu.vhd 1.3:
		Cleaned up

	* misc/async_port.vhd 1.1:
		Intital revision

2008-09-20	Jens
	* CPUs/MIPS/src/core/mips_biu.vhd 1.2:
		Memory write now waits for completion (bus_rdy)

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.3:
		Branch: check op_a for equaliity against R0 instead testing of 
		explicitly against zero

	* CPUs/MIPS/src/core/mips_bcu.vhd 1.2:
		Removed zero check

	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.4:
		Minor changes to satisfy timing

	* CPUs/MIPS/src/core/mips_types.vhd 1.2:
		Removed z-flag from bcu_t

2008-09-12	Jens
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.2:
		BCU_op update if not ex.stall

2008-09-04	Jens
	* misc/hpi_port.vhd 1.1:
		Initial import

2008-08-25	Jens
	* CPUs/MIPS/tools/make 1.4:
		Removed

	* CPUs/MIPS/tools/Makefile 1.1:
	* CPUs/MIPS/tools/make.sh 1.1:
		Initial import

2008-08-23	Jens
	* CPUs/MIPS/tools/make 1.3:
		Minor changes

	* CPUs/JCpu/asm/dctest.jsm 1.1.1.1:
	* CPUs/JCpu/asm/dctest.tcl 1.1.1.1:
	* CPUs/JCpu/asm/itest.jsm 1.1.1.1:
	* CPUs/JCpu/asm/itest.tcl 1.1.1.1:
	* CPUs/JCpu/asm/make 1.1.1.1:
	* CPUs/JCpu/asm/mul8x8.jsm 1.1.1.1:
	* CPUs/JCpu/asm/mul8x8.tcl 1.1.1.1:
	* CPUs/JCpu/asm/reti_issue.jsm 1.1.1.1:
	* CPUs/JCpu/asm/reti_issue.tcl 1.1.1.1:
	* CPUs/JCpu/doc/block_diagram.png 1.1.1.1:
	* CPUs/JCpu/doc/memory_map.png 1.1.1.1:
	* CPUs/JCpu/gpl-3.0.txt 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu.fdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu.wdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu_embedded.fdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu_embedded.wdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu_itest.fdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu_itest.wdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu_reti_issue.fdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_cpu_reti_issue.wdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_mul8x8.fdo 1.1.1.1:
	* CPUs/JCpu/sim/tb_mul8x8.wdo 1.1.1.1:
	* CPUs/JCpu/src/core/alu.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/chipram.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/chipreg.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/cpu.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/cpu_pkg.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/dpath_ctrl.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/int_ctrl.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/pc.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/reg_dual.vhd 1.1.1.1:
	* CPUs/JCpu/src/core/stack_ctrl.vhd 1.1.1.1:
	* CPUs/JCpu/src/cpu_embedded.vhd 1.1.1.1:
	* CPUs/JCpu/src/dctest_irom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/dctest_irom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/dctest_xrom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/dctest_xrom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/itest_irom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/itest_irom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/itest_xrom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/itest_xrom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/mul8x8_irom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/mul8x8_irom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/mul8x8_xrom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/mul8x8_xrom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/reti_issue_irom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/reti_issue_irom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/reti_issue_xrom.vhdl 1.1.1.1:
	* CPUs/JCpu/src/reti_issue_xrom_ld.vhdl 1.1.1.1:
	* CPUs/JCpu/src/tb_cpu_embedded.vhd 1.1.1.1:
	* CPUs/JCpu/src/tb_cpu_itest.vhd 1.1.1.1:
	* CPUs/JCpu/syn/ise91/cpu_vhdl.prj 1.1.1.1:
	* CPUs/JCpu/tools/eval_scan.rb 1.1.1.1:
	* CPUs/JCpu/tools/insrom.rb 1.1.1.1:
	* CPUs/JCpu/tools/irom.vhd.tpl 1.1.1.1:
	* CPUs/JCpu/tools/irom_ld.vhd.tpl 1.1.1.1:
	* CPUs/JCpu/tools/jasm.bak.rb 1.1.1.1:
	* CPUs/JCpu/tools/jasm.rb 1.1.1.1:
	* CPUs/JCpu/tools/lib/cg.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/lib/cregs.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/lib/delays.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/lib/lcd.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/lib/mul8x8.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/lib/uart.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/lib/utils.inc.jsm 1.1.1.1:
	* CPUs/JCpu/tools/opc.list 1.1.1.1:
	* CPUs/JCpu/tools/regx.rb 1.1.1.1:
	* CPUs/JCpu/tools/rom.tcl.tpl 1.1.1.1:
	* CPUs/JCpu/tools/templates.rb 1.1.1.1:
	* CPUs/JCpu/tools/xrom.vhd.tpl 1.1.1.1:
	* CPUs/JCpu/tools/xrom_ld.vhd.tpl 1.1.1.1:
	* CPUs/MIPS/sim/compile_simprim.do 1.1.1.1:
	* CPUs/MIPS/sim/compile_unisim.do 1.1.1.1:
	* CPUs/MIPS/sim/tb_eval_muldiv.fdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_eval_muldiv.wdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_embedded.fdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_embedded.wdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_embedded_syn.fdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_embedded_syn.tdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_embedded_syn.wdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_muldiv.fdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_muldiv.ndo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_muldiv.sdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_muldiv.wdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top.fdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top.mdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top.mwdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top.sdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top.wdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top_syn.mdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top_syn.tdo 1.1.1.1:
	* CPUs/MIPS/sim/tb_mips_top_syn.wdo 1.1.1.1:
	* CPUs/MIPS/src/core/mips_alu.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_bcu.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_biu.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_cop.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_dcache.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_icache.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_idecode_rom.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_instr.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_muldiv.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_pipeline.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_reg.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_shifter.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_top.vhd 1.1.1.1:
	* CPUs/MIPS/src/core/mips_types.vhd 1.1.1.1:
	* CPUs/MIPS/src/fibonacci.ROM_ld.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_hello.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test1.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test2.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test3.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test4.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test5.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test6.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test_addsub.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test_slt.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test_slti.vhd 1.1.1.1:
	* CPUs/MIPS/src/irom_test_sub.vhd 1.1.1.1:
	* CPUs/MIPS/src/mips_embedded.vhd 1.1.1.1:
	* CPUs/MIPS/src/mips_embedded_syn.vhd 1.1.1.1:
	* CPUs/MIPS/src/mips_muldiv.vhd 1.1.1.1:
	* CPUs/MIPS/src/ram.vhd 1.1.1.1:
	* CPUs/MIPS/src/ram_ld.vhd 1.1.1.1:
	* CPUs/MIPS/src/ram_sim.vhd 1.1.1.1:
	* CPUs/MIPS/src/rmd160_test.ROM_ld.vhd 1.1.1.1:
	* CPUs/MIPS/src/tb_eval_muldiv.vhd 1.1.1.1:
	* CPUs/MIPS/src/tb_mips_embedded.vhd 1.1.1.1:
	* CPUs/MIPS/src/tb_mips_embedded_syn.vhd 1.1.1.1:
	* CPUs/MIPS/src/tb_mips_muldiv.vhd 1.1.1.1:
	* CPUs/MIPS/src/tb_mips_top.vhd 1.1.1.1:
	* CPUs/MIPS/src/testbench.ROM_ld.vhd 1.1.1.1:
	* CPUs/MIPS/tools/insrom.rb 1.1.1.1:
	* CPUs/MIPS/tools/irom.vhd.tpl 1.1.1.1:
	* CPUs/MIPS/tools/irom_ld.vhd.tpl 1.1.1.1:
	* CPUs/MIPS/tools/make 1.1.1.1:
	* CPUs/MIPS/tools/rom.tcl.tpl 1.1.1.1:
	* CPUs/MIPS/tools/src/ramgen.c 1.1.1.1:
	* CPUs/MIPS/tools/src/romgen.c 1.1.1.1:
	* FIFO/sim/tb_async_fifo_ctrl.fdo 1.1:
	* FIFO/sim/tb_async_fifo_ctrl.wdo 1.1:
	* FIFO/sim/tb_gray_counter.fdo 1.1:
	* FIFO/sim/tb_gray_counter.wdo 1.1:
	* FIFO/sim/tb_sync_fifo_ctrl.fdo 1.1:
	* FIFO/sim/tb_sync_fifo_ctrl.wdo 1.1:
	* FIFO/src/dpram.vhd 1.1:
	* FIFO/src/fifo_async_ctrl.vhd 1.1:
	* FIFO/src/fifo_ctrl_pkg.vhd 1.1:
	* FIFO/src/fifo_sync_ctrl.vhd 1.1:
	* FIFO/src/gray_counter.vhd 1.1:
	* FIFO/src/tb_async_fifo_ctrl.vhd 1.1:
	* FIFO/src/tb_gray_counter.vhd 1.1:
	* FIFO/src/tb_sync_fifo_ctrl.vhd 1.1:
	* PCK_FIO-1.16/PCK_FIO.html 1.1:
	* PCK_FIO-1.16/PCK_FIO.out.gold 1.1:
	* PCK_FIO-1.16/PCK_FIO.vhd 1.1:
	* PCK_FIO-1.16/README 1.1:
	* PCK_FIO-1.16/TB_PCK_FIO.vhd 1.1:
	* PCK_FIO-2002.7/CHANGES 1.1:
	* PCK_FIO-2002.7/PCK_FIO.html 1.1:
	* PCK_FIO-2002.7/PCK_FIO.out.gold 1.1:
	* PCK_FIO-2002.7/PCK_FIO_1987.vhd 1.1:
	* PCK_FIO-2002.7/PCK_FIO_1987_BODY.vhd 1.1:
	* PCK_FIO-2002.7/PCK_FIO_1993.vhd 1.1:
	* PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd 1.1:
	* PCK_FIO-2002.7/README 1.1:
	* PCK_FIO-2002.7/TB_PCK_FIO_1987.vhd 1.1:
	* PCK_FIO-2002.7/TB_PCK_FIO_1993.vhd 1.1:
	* PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1987 1.1:
	* PCK_FIO-2002.7/msMakefile.TBE_PCK_FIO_TB.1993 1.1:
	* SDRAM/ddr_sdr_v1_4/ise9/sdram_ctrl_top_vhdl.prj 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/compile_simprim.do 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/compile_unisim.do 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_fifo.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_r_rand_w.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_r_rand_w.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_w_rand_r.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_lin_w_rand_r.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_addr.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_addr.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdr_ctrl_rand_rw.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdram_ctrl_frontend.fdo 1.1:
	* SDRAM/ddr_sdr_v1_4/sim/tb_sdram_ctrl_frontend.wdo 1.1:
	* SDRAM/ddr_sdr_v1_4/src/clockgen_virtex4.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/sdram_config.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_fifo.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_r_rand_w.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_lin_w_rand_r.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_addr.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdr_ctrl_rand_rw.vhd 1.1:
	* SDRAM/ddr_sdr_v1_4/src/tb_sdram_ctrl_frontend.vhd 1.1:
	* VGA_ctrl/src/char_gen.vhd 1.1:
	* VGA_ctrl/src/clkgen_virtex4.vhd 1.1:
	* VGA_ctrl/src/dpram.vhd 1.1:
	* VGA_ctrl/src/fonts/Fixedsys_8x15.bff 1.1:
	* VGA_ctrl/src/fonts/Fixedsys_8x16.bff 1.1:
	* VGA_ctrl/src/fonts/Fixedsys_9x16.bff 1.1:
	* VGA_ctrl/src/fonts/System_16x16.bff 1.1:
	* VGA_ctrl/src/fonts/char_rom_c64.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_data.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_datasoft.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_demo_maker_m.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_fixedsys_8x15.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_fixedsys_9x16.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_system_16x16.vhd 1.1:
	* VGA_ctrl/src/fonts/char_rom_the_goonies.vhd 1.1:
	* VGA_ctrl/src/fonts/make_rom.bat 1.1:
	* VGA_ctrl/src/linefifo.vhd 1.1:
	* VGA_ctrl/src/vga_backend.vhd 1.1:
	* VGA_ctrl/src/vga_sync.vhd 1.1:
	* VGA_ctrl/src/vga_timing.vhd 1.1:
	* VGA_ctrl/src/vga_types.vhd 1.1:
	* filter/sim/eval_lowpass.m 1.1:
	* filter/sim/lowpass.m 1.1:
	* filter/sim/tb_fir_iterative.fdo 1.1:
	* filter/sim/tb_fir_iterative.wdo 1.1:
	* filter/sim/tb_fir_parallel 1.1:
	* filter/sim/tb_fir_parallel.fdo 1.1:
	* filter/sim/tb_fir_parallel.wdo 1.1:
	* filter/sim/tb_fir_results.m 1.1:
	* filter/sim/tb_fir_stage.fdo 1.1:
	* filter/sim/tb_fir_stage.wdo 1.1:
	* filter/src/filter_pkg.vhd 1.1:
	* filter/src/fir_iterative.vhd 1.1:
	* filter/src/fir_iterative_pkg.vhd 1.1:
	* filter/src/fir_parallel.vhd 1.1:
	* filter/src/fir_parallel_pkg.vhd 1.1:
	* filter/src/fir_stage.vhd 1.1:
	* filter/src/fir_stage_pkg.vhd 1.1:
	* filter/src/tb_fir_iterative.vhd 1.1:
	* filter/src/tb_fir_parallel.vhd 1.1:
	* filter/src/tb_fir_stage.vhd 1.1:
	* fix_std/fix_std.vhd 1.1:
	* fix_std/fix_stdb.vhd 1.1:
	* fixed/fixed_pkg_c.vhd 1.1:
	* fixed_ja/fixed_ja.vhd 1.1:
	* fixed_ja/fixed_ja_body.vhd 1.1:
	* jasm/cg.inc.jsm 1.1:
	* jasm/cregs.inc.jsm 1.1:
	* jasm/delays.inc.jsm 1.1:
	* jasm/lcd.inc.jsm 1.1:
	* jasm/mul8x8.inc.jsm 1.1:
	* jasm/uart.inc.jsm 1.1:
	* jasm/utils.inc.jsm 1.1:
	* misc/debounce.vhd 1.1:
	* misc/debounce2.vhd 1.1:
	* misc/dpram_1w1r.vhd 1.1:
	* misc/dpram_1w1r_dist.vhd 1.1:
	* misc/dpram_2w2r.vhd 1.1:
	* misc/dpram_2w2r_virtex4.vhd 1.1:
	* misc/lcd_port.vhd 1.1:
	* misc/oneshot.vhd 1.1:
	* misc/pkg_template.vhd 1.1:
	* misc/singleshot.vhd 1.1:
	* misc/tb_template.vhd 1.1:
	* misc/utils_pkg.vhd 1.1:
	* radio/mix/sim/tb_mix_cpx.fdo 1.1:
	* radio/mix/sim/tb_mix_cpx.wdo 1.1:
	* radio/mix/sim/tb_mix_real.fdo 1.1:
	* radio/mix/sim/tb_mix_real.wdo 1.1:
	* radio/mix/sim/tb_undc_real.fdo 1.1:
	* radio/mix/sim/tb_undc_real.wdo 1.1:
	* radio/mix/src/mix_cpx.vhd 1.1:
	* radio/mix/src/mix_pkg.vhd 1.1:
	* radio/mix/src/mix_real.vhd 1.1:
	* radio/mix/src/tb_mix_cpx.vhd 1.1:
	* radio/mix/src/tb_mix_real.vhd 1.1:
	* radio/mix/src/tb_undc_real.vhd 1.1:
	* radio/mix/src/undc_real.vhd 1.1:
	* radio/nco/sim/tb_nco.fdo 1.1:
	* radio/nco/sim/tb_nco.wdo 1.1:
	* radio/nco/sim/tb_nco_results.m 1.1:
	* radio/nco/src/nco.vhd 1.1:
	* radio/nco/src/nco.vhd.bak 1.1:
	* radio/nco/src/nco_dbg.vhd 1.1:
	* radio/nco/src/nco_pkg.vhd 1.1:
	* radio/nco/src/tb_nco.vhd 1.1:
	* radio/nco/src/wavelut.vhd 1.1:
	* radio/nco/src/waverom_dual.vhd 1.1:
	* uart/bbfifo_16x8.vhd 1.1:
	* uart/kcuart_rx.vhd 1.1:
	* uart/kcuart_tx.vhd 1.1:
	* uart/uart_rx.vhd 1.1:
	* uart/uart_tx.vhd 1.1:
		Initial import

	* CPUs/MIPS/tools/make 1.2:
		Added CVS header

