--- ============================================================================
--
-- Design unit      :   aes_definitions
--
-- File Name        :   aes_definitions.vhd
--
-- Purpose          :   This package defines supplemental types, subtypes,
--                      constants, and functions 
--
--
-- Depends on       :
--
-- - Package(s)     :   -
--
-- - Module(s)      :   -
--
--
-- Dev. Platform    :   Xilinx ISE 8.1i SP3 / Win32 (W2k SP4)
--
-- - Simulator(s)   :   Modelsim XE III 6.0d
--
-- - Synthesis      :   Xilinx XST
--
-- - Place & Route  :   Xilinx PAR
--
--
-- Errors           :   None known
--
--
-- Limitations      :   None known
--
--
-- Notes            :   -
--
--
-- Author(s)        :   A. Freund (af) <a.freund@dsi-it.de>, 
--                      M.v.d.Wall (mvdw) <vdwall@dsi-it.de>
--                      Digitale Signalverabeitung & Informationstechnik GmbH,
--                      Bremen, Germany
--
-- ============================================================================
--
-- Revision List:
--
-- see SVN logs
--
-- ============================================================================
--
-- Naming conventions:
--
-- - coding style: record-signals for related purposes (Gaisler-style)
-- - active-low signals are indicated by appending "_n"
-- - constants are in UPPERCASE
-- - name parts are separated by "_"
--
-- ============================================================================

library ieee;
use ieee.std_logic_1164.all;



package aes_definitions is


	constant AES_128_ROUNDS : natural := 10;

	constant AES_256_ROUNDS : natural := 14;


	subtype aes_state_t is std_logic_vector(127 downto 0);

	-- 4 bit are sufficient to keep maximal round number
	subtype aes_round_no_t is std_logic_vector(3 downto 0);


  subtype aes_sbox_8_t is std_logic_vector(7 downto 0);


  type aes_sbox_matrix_t is array(0 to 3, 0 to 3) of aes_sbox_8_t;


end aes_definitions;
