--------------------------------------------------------------------------
-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL
-- This file: On-Chip work registers
--
-- Copyright (C) 2007 J. Ahrensfeld
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
--
-- For questions and ideas, please contact the author at jens@jayfield.org
--
--------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std.ALL;

use work.cpu_pkg.all;

entity reg_dual is
	Generic (
		addr_width : integer := 3;
		data_width : integer := 8
	);
	Port (
		clk			: in  STD_LOGIC;
		we_a		: in  STD_LOGIC;
		ptr_a		: in  reg_ptr_t;
		ptr_b		: in  reg_ptr_t;
		din_a		: in  unsigned (data_width-1 downto 0);
		dout_a		: out unsigned (data_width-1 downto 0);
		dout_b		: out unsigned (data_width-1 downto 0)
	);
end reg_dual;

architecture Behavioral of reg_dual is

	constant depth : integer := 2**addr_width;
	type mem_t is array (0 to depth-1) of unsigned (data_width-1 downto 0);
	signal addr_a, addr_b : unsigned (addr_width-1 downto 0) := (others => '0');

	signal mem : mem_t;
begin

	addr_a <= TO_01(ptr_a(addr_width-1 downto 0));
	addr_b <= TO_01(ptr_b(addr_width-1 downto 0));

reg_in_ab:
	process(clk)
	begin
		if rising_edge(clk) then
			if we_a = '1' then
				mem(to_integer(addr_a)) <= din_a;
			end if;
		end if;	
	end process;

reg_out_a:
	process(mem, addr_a)
	begin
		dout_a <= TO_01(mem(to_integer(addr_a)));
	end process;

reg_out_b:
	process(mem, addr_b)
	begin
		dout_b <= TO_01(mem(to_integer(addr_b)));
	end process;

end Behavioral;

