jens
273b7a6a79
- changed address of debugger entry - mips_dbg: no use om memset and memcpy git-svn-id: http://moon:8086/svn/mips@120 a8ebac50-d88d-4704-bea3-6648445a41b3
643 lines
14 KiB
C
643 lines
14 KiB
C
/****************************************************************************
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THIS SOFTWARE IS NOT COPYRIGHTED
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HP offers the following for use in the public domain. HP makes no
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warranty with regard to the software or it's performance and the
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user accepts the software "AS IS" with all faults.
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HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
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TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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****************************************************************************/
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/****************************************************************************
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* Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $
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*
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* Module name: remcom.c $
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* Revision: 1.34 $
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* Date: 91/03/09 12:29:49 $
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* Contributor: Lake Stevens Instrument Division$
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*
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* Description: low level support for gdb debugger. $
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*
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* Considerations: only works on target hardware $
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*
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* Written by: Glenn Engel $
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* ModuleState: Experimental $
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*
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* NOTES: See Below $
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*
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* Modified for SPARC by Stu Grossman, Cygnus Support.
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*
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* This code has been extensively tested on the Fujitsu SPARClite demo board.
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*
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* To enable debugger support, two things need to happen. One, a
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* call to set_debug_traps() is necessary in order to allow any breakpoints
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* or error conditions to be properly intercepted and reported to gdb.
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* Two, a breakpoint needs to be generated to begin communication. This
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* is most easily accomplished by a call to breakpoint(). Breakpoint()
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* simulates a breakpoint by executing a trap #1.
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*
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*************
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*
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* The following gdb commands are supported:
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*
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* command function Return value
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*
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* g return the value of the CPU registers hex data or ENN
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* G set the value of the CPU registers OK or ENN
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*
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* mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
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* MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
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*
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* c Resume at current address SNN ( signal NN)
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* cAA..AA Continue at address AA..AA SNN
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*
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* s Step one instruction SNN
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* sAA..AA Step one instruction from AA..AA SNN
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*
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* k kill
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*
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* ? What was the last sigval ? SNN (signal NN)
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*
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* All commands and responses are sent with a packet which includes a
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* checksum. A packet consists of
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*
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* $<packet info>#<checksum>.
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*
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* where
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* <packet info> :: <characters representing the command or response>
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* <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
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*
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* When a packet is received, it is first acknowledged with either '+' or '-'.
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* '+' indicates a successful transfer. '-' indicates a failed transfer.
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*
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* Example:
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*
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* Host: Reply:
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* $m0,10#2a +$00010203040506070809101112131415#42
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*
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****************************************************************************/
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#include <string.h>
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#include <signal.h>
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/************************************************************************
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*
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* external low-level support routines
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*/
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extern void dbg_putchar(char c); /* write a single character */
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extern char dbg_getchar(); /* read and return a single char */
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extern void ICACHE_invalidate_all();
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extern int sputs(char const *pStr);
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extern void print_byte(char byte);
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extern void print_word(int word);
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void putDebugChar(char c)
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{
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dbg_putchar(c);
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}
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int getDebugChar()
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{
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return (int)dbg_getchar();
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}
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void flush_i_cache()
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{
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ICACHE_invalidate_all();
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}
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void dbg_strcpy(char *pDst, const char *pSrc)
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{
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while(*pSrc)
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{
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*(pDst++) = *(pSrc++);
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}
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*pDst = *pSrc;
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}
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void* dbg_memset(void *pDst, int value, size_t size)
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{
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char *dst = (char*)pDst;
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while(size)
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{
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*(dst++) = (char)value;
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size--;
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}
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return (void*)dst;
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}
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void* dbg_memcpy(void *pDst, const void *pSrc, size_t size )
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{
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char *dst = (char*)pDst;
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char *src = (char*)pSrc;
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while(size)
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{
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*(dst++) = *(src++);
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size--;
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}
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return (void*)dst;
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}
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/************************************************************************/
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/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
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/* at least NUMREGBYTES*2 are needed for register packets */
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#define BUFMAX 2048
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const char hexchars[]="0123456789abcdef";
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#define NUMREGS 72
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/* Number of bytes of registers. */
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#define NUMREGBYTES (NUMREGS * 4)
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enum regnames
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{
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START_CPU_REGS = 0,
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SR = START_CPU_REGS,
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CR,
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PC,
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BV,
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R00,
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R01,
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R02,
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R03,
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R04,
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R05,
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R06,
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R07,
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R08,
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R09,
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R10,
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R11,
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R12,
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R13,
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R14,
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R15,
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R16,
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R17,
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R18,
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R19,
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R20,
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R21,
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R22,
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R23,
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R24,
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R25,
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R26,
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R27,
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R28,
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R29,
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R30,
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R31,
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LO,
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HI,
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NUM_REGS
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};
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/* Convert ch from a hex digit to an int */
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static int
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hex (unsigned char ch)
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{
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if (ch >= 'a' && ch <= 'f')
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return ch-'a'+10;
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if (ch >= '0' && ch <= '9')
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return ch-'0';
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if (ch >= 'A' && ch <= 'F')
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return ch-'A'+10;
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return -1;
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}
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/* scan for the sequence $<data>#<checksum> */
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unsigned char *
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getpacket (unsigned char *buffer)
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{
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unsigned char checksum;
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unsigned char xmitcsum;
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int count;
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char ch;
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while (1)
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{
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/* wait around for the start character, ignore all other characters */
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while ((ch = getDebugChar ()) != '$')
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;
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retry:
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checksum = 0;
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xmitcsum = -1;
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count = 0;
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/* now, read until a # or end of buffer is found */
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while (count < BUFMAX - 1)
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{
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ch = getDebugChar ();
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if (ch == '$')
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goto retry;
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if (ch == '#')
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break;
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checksum = checksum + ch;
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buffer[count] = ch;
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count = count + 1;
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}
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buffer[count] = 0;
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if (ch == '#')
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{
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ch = getDebugChar ();
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xmitcsum = hex (ch) << 4;
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ch = getDebugChar ();
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xmitcsum += hex (ch);
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#ifdef WITH_CHECKSUM_CHECK
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if (checksum != xmitcsum)
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{
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putDebugChar ('-'); /* failed checksum */
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}
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else
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#endif
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{
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putDebugChar ('+'); /* successful transfer */
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/* if a sequence char is present, reply the sequence ID */
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if (buffer[2] == ':')
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{
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putDebugChar (buffer[0]);
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putDebugChar (buffer[1]);
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return &buffer[3];
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}
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return &buffer[0];
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}
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}
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}
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}
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/* send the packet in buffer. */
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static void
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putpacket (unsigned char *buffer)
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{
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unsigned char checksum;
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int count;
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unsigned char ch;
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/* $<packet info>#<checksum>. */
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do
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{
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putDebugChar('$');
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checksum = 0;
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count = 0;
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while (ch = buffer[count])
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{
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putDebugChar(ch);
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checksum += ch;
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count += 1;
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}
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putDebugChar('#');
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putDebugChar(hexchars[checksum >> 4]);
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putDebugChar(hexchars[checksum & 0xf]);
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} while (getDebugChar() != '+');
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}
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/* Indicate to caller of mem2hex or hex2mem that there has been an
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error. */
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const int mem_err = 0;
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/* Convert the memory pointed to by mem into hex, placing result in buf.
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* Return a pointer to the last char put in buf (null), in case of mem fault,
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* return 0.
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* If MAY_FAULT is non-zero, then we will handle memory faults by returning
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* a 0, else treat a fault like any other fault in the stub.
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*/
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static unsigned char *
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mem2hex (unsigned char *mem, unsigned char *buf, int count, int may_fault)
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{
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unsigned char ch;
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while (count-- > 0)
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{
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ch = *mem++;
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if (mem_err)
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return 0;
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*buf++ = hexchars[ch >> 4];
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*buf++ = hexchars[ch & 0xf];
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}
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*buf = 0;
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return buf;
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}
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/* convert the hex array pointed to by buf into binary to be placed in mem
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* return a pointer to the character AFTER the last byte written */
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static char *
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hex2mem (unsigned char *buf, unsigned char *mem, int count, int may_fault)
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{
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int i;
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unsigned char ch;
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for (i=0; i<count; i++)
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{
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ch = hex(*buf++) << 4;
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ch |= hex(*buf++);
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*mem++ = ch;
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if (mem_err)
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return 0;
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}
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return mem;
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}
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/* This table contains the mapping between SPARC hardware trap types, and
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signals, which are primarily what GDB understands. It also indicates
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which hardware traps we need to commandeer when initializing the stub. */
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struct hard_trap_info_t
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{
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unsigned long tt; /* Trap type code for SPARClite */
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unsigned long signo; /* Signal that we map this trap into */
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};
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const struct hard_trap_info_t hard_trap_info[] =
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{
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{0, SIGINT}, /* Interrupt (Int) */
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{1, SIGSEGV}, /* TLB modification (Mod) */
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{2, SIGSEGV}, /* TLB load (TLBL) */
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{3, SIGSEGV}, /* TLB store (TLBS) */
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{4, SIGSEGV}, /* Address error load (ADEL) */
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{5, SIGSEGV}, /* Address error store (ADES) */
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{6, SIGBUS}, /* Bus error on instruction (IBE) */
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{7, SIGBUS}, /* Bus error on data (DBE) */
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{8, SIGUSR1}, /* Syscall instruction called (Syscall) */
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{9, SIGTRAP}, /* Breakpoint instruction called (Breakpoint) */
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{10, SIGILL}, /* Reserved instruction (RI) */
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{11, SIGXCPU}, /* Coprocessor unusable (CpU) */
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{12, SIGFPE}, /* Arithmetic overflow (Ov) */
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{0, 0} /* Must be last */
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};
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/* Convert the SPARC hardware trap type code to a unix signal number. */
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static unsigned long
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computeSignal (unsigned long tt)
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{
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// Determine linux signal from CPU specific exception code
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struct hard_trap_info_t *ht;
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for (ht = (struct hard_trap_info_t *)hard_trap_info; ht->signo != 0; ht++)
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{
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if (ht->tt == tt)
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{
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return ht->signo;
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}
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}
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return SIGHUP; /* default for things we don't know about */
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}
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/*
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* While we find nice hex chars, build an int.
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* Return number of chars processed.
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*/
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static int
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hexToInt(char **ptr, unsigned long *intValue)
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{
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unsigned long numChars = 0;
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int hexValue;
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*intValue = 0;
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while (**ptr)
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{
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hexValue = hex(**ptr);
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if (hexValue < 0)
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break;
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*intValue = (*intValue << 4) | hexValue;
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numChars ++;
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(*ptr)++;
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}
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return (numChars);
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}
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int isBreak(unsigned long instr)
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{
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return ((instr & 0xFC00003F) == 0x0000000D);
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}
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/*
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* This function does all command procesing for interfacing to gdb. It
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* returns 1 if you should skip the instruction at the trap address, 0
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* otherwise.
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*/
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void
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handle_exception (unsigned long *registers)
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{
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char remcomInBuffer[BUFMAX];
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char remcomOutBuffer[BUFMAX];
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sputs("Entry\n");
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unsigned long tt; /* Trap type */
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unsigned long sigval;
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unsigned long addr;
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unsigned long length;
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char *ptr;
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unsigned long *sp;
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addr = *((unsigned long *)registers[PC]);
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// is break
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if (isBreak(addr))
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{
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registers[PC] += 4;
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}
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sp = (unsigned long *)®isters[R29];
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tt = (registers[CR] >> 2) & 0x1f;
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/* reply to host that an exception has occurred */
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sigval = computeSignal(tt);
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ptr = remcomOutBuffer;
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*ptr++ = 'T';
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*ptr++ = hexchars[sigval >> 4];
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*ptr++ = hexchars[sigval & 0xf];
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*ptr++ = hexchars[37 >> 4];
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*ptr++ = hexchars[37 & 0xf];
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*ptr++ = ':';
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ptr = mem2hex((char *)®isters[PC], ptr, 4, 0);
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*ptr++ = ';';
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*ptr++ = hexchars[29 >> 4];
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*ptr++ = hexchars[29 & 0xf];
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*ptr++ = ':';
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ptr = mem2hex((char *)sp, ptr, 4, 0);
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*ptr++ = ';';
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*ptr++ = 0;
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putpacket(remcomOutBuffer);
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while (1)
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{
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remcomOutBuffer[0] = 0;
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ptr = getpacket(remcomInBuffer);
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switch (*ptr++)
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{
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case '?':
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sputs("?\n");
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remcomOutBuffer[0] = 'S';
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remcomOutBuffer[1] = hexchars[sigval >> 4];
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remcomOutBuffer[2] = hexchars[sigval & 0xf];
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remcomOutBuffer[3] = 0;
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break;
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case 'd': /* toggle debug flag */
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sputs("d\n");
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break;
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case 'g': /* return the value of the CPU registers */
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{
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sputs("g\n");
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ptr = remcomOutBuffer;
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/* R00 .. R31 */
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ptr = mem2hex((char *)®isters[R00], ptr, 4*32, 0);
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/* SR, HI, LO, BADVADDR, CR, PC */
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ptr = mem2hex((char *)®isters[SR], ptr, 4, 0);
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ptr = mem2hex((char *)®isters[HI], ptr, 4, 0);
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ptr = mem2hex((char *)®isters[LO], ptr, 4, 0);
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ptr = mem2hex((char *)®isters[BV], ptr, 4, 0);
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ptr = mem2hex((char *)®isters[CR], ptr, 4, 0);
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ptr = mem2hex((char *)®isters[PC], ptr, 4, 0);
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/* Floating point F00 .. F31*/
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dbg_memset(ptr, '0', 8 * 32);
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ptr += 8*32;
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/* FCSR, FIR, RESTART*/
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dbg_memset(ptr, '0', 8 * 3);
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ptr += 8*3;
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*ptr = 0;
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}
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break;
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case 'G': /* set the value of the CPU registers - return OK */
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{
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sputs("G\n");
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unsigned long *newsp, sr;
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sr = registers[SR];
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hex2mem(ptr, (char *)®isters[R00], 4*32, 0); /* R00 .. R31 */
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ptr += 4*32 * 2;
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/* SR, HI, LO, BADVADDR, CR, PC */
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hex2mem(ptr, (char *)®isters[SR], 4, 0);
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ptr += 4 * 2;
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hex2mem(ptr, (char *)®isters[HI], 4, 0);
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ptr += 4 * 2;
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hex2mem(ptr, (char *)®isters[LO], 4, 0);
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ptr += 4 * 2;
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hex2mem(ptr, (char *)®isters[BV], 4, 0);
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ptr += 4 * 2;
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hex2mem(ptr, (char *)®isters[CR], 4, 0);
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ptr += 4 * 2;
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hex2mem(ptr, (char *)®isters[PC], 4, 0);
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ptr += 4 * 2;
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*ptr = 0;
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dbg_strcpy(remcomOutBuffer,"OK");
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}
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break;
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case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */
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sputs("m\n");
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/* Try to read %x,%x. */
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if (hexToInt(&ptr, &addr) && *ptr++ == ',' && hexToInt(&ptr, &length))
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{
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if (mem2hex((char *)addr, remcomOutBuffer, length, 1))
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{
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break;
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}
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dbg_strcpy (remcomOutBuffer, "E03");
|
|
}
|
|
else
|
|
{
|
|
dbg_strcpy(remcomOutBuffer,"E01");
|
|
}
|
|
sputs("m:"); print_word(addr); sputs(",");print_word(length); sputs("\n");
|
|
break;
|
|
|
|
case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
|
|
/* Try to read '%x,%x:'. */
|
|
|
|
if (hexToInt(&ptr, &addr) && *ptr++ == ',' && hexToInt(&ptr, &length) && *ptr++ == ':')
|
|
{
|
|
if (hex2mem(ptr, (char *)addr, length, 1))
|
|
{
|
|
dbg_strcpy(remcomOutBuffer, "OK");
|
|
}
|
|
else
|
|
{
|
|
dbg_strcpy(remcomOutBuffer, "E03");
|
|
}
|
|
}
|
|
else
|
|
{
|
|
dbg_strcpy(remcomOutBuffer, "E02");
|
|
}
|
|
sputs("M:"); print_word(addr); sputs(",");print_word(length); sputs("\n");
|
|
break;
|
|
|
|
case 'c': /* cAA..AA Continue at address AA..AA(optional) */
|
|
/* try to read optional parameter, pc unchanged if no parm */
|
|
|
|
sputs("c: PC="); print_word(registers[PC]);sputs("\n");
|
|
if (hexToInt(&ptr, &addr))
|
|
{
|
|
registers[PC] = addr;
|
|
sputs("c: addr="); print_word(addr);sputs("\n");
|
|
}
|
|
|
|
/* Need to flush the instruction cache here, as we may have deposited a
|
|
breakpoint, and the icache probably has no way of knowing that a data ref to
|
|
some location may have changed something that is in the instruction cache.
|
|
*/
|
|
|
|
flush_i_cache();
|
|
return;
|
|
|
|
/* kill the program */
|
|
case 'k' : /* do nothing */
|
|
sputs("Kill\n");
|
|
break;
|
|
#if 0
|
|
case 't': /* Test feature */
|
|
break;
|
|
#endif
|
|
case 'r': /* Reset */
|
|
// Perform reset
|
|
sputs("Reset\n");
|
|
break;
|
|
} /* switch */
|
|
/* reply to the request */
|
|
putpacket(remcomOutBuffer);
|
|
}
|
|
sputs("Exit\n");
|
|
|
|
}
|