/* * To change this license header, choose License Headers in Project Properties. * To change this template file, choose Tools | Templates * and open the template in the editor. */ /* * File: board.h * Author: jens * * Created on 8. Januar 2017, 11:33 */ #ifndef BOARD_H #define BOARD_H #define CPU_FREQ_HZ 50000000 #define UART_STDIO 0 #define UART_DEBUGGER 1 // --------------------------------------------------------- // IRQs // --------------------------------------------------------- #define SYS_INT_SOFT_0 0 #define SYS_INT_SOFT_1 1 #define SYS_INT_TIMER 2 #define SYS_INT_UART0 3 #define SYS_INT_UART1 4 #define SYS_INT_FLASH 5 // --------------------------------------------------------- // Memory-mapped registers // --------------------------------------------------------- #ifndef SYS_IO_BASE #define SYS_IO_BASE 0xA0000000 #endif #ifndef SDRAM_BASE #define SDRAM_BASE 0x40000000 #endif #ifndef FLASH_BASE_IO #define FLASH_BASE_IO 0xA4000000 #endif #ifndef FLASH_BASE_MEM #define FLASH_BASE_MEM 0x00000000 #endif // Backwards compatibility #define SYS_FLASH_IO FLASH_BASE_IO #define SYS_FLASH_MEM FLASH_BASE_MEM // GPIO #define SYS_GPIO_0_BASE (SYS_IO_BASE + 0) #define SYS_GPIO_0_DATA (SYS_GPIO_0_BASE + 0) #define SYS_GPIO_0_DIR (SYS_GPIO_0_BASE + 4) #define GPIO_0_DFLT_DIR 0x00000000 // Inputs #define GPIO_0_DFLT_DATA 0x00000000 #define GPIO_0_MASK_LED 0x000000FF #define GPIO_0_ALIGN_LED 0 #define GPIO_0_MASK_DIP 0x0000000F #define GPIO_0_ALIGN_DIP 8 #define GPIO_0_MASK_BTN 0x0000001F #define GPIO_0_ALIGN_BTN 24 // RTC #define SYS_TIMER_USEC (SYS_IO_BASE + 0x8) #define SYS_TIMER_SEC (SYS_IO_BASE + 0xC) // TIMERs #define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18) #define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C) #define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20) #define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24) #define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28) #define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C) #define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30) #define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34) #define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38) #define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C) // UARTs #define SYS_UART_BIT_TX_HALFFULL 0x00000001 #define SYS_UART_BIT_TX_FULL 0x00000002 #define SYS_UART_BIT_RX_HALFFULL 0x00000004 #define SYS_UART_BIT_RX_FULL 0x00000008 #define SYS_UART_BIT_RX_AVAIL 0x00000010 #define SYS_UART_BIT_TX_INTEN 0x00000020 #define SYS_UART_BIT_RX_INTEN 0x00000040 #define SYS_UART_BIT_TX_IRQ 0x00000100 #define SYS_UART_BIT_RX_IRQ 0x00000200 #define SYS_UART_DATA SYS_UART0_DATA #define SYS_UART_STAT SYS_UART0_STAT #define SYS_UART_BAUD SYS_UART0_BAUD #define SYS_UART0_DATA (SYS_IO_BASE + 0x10000) #define SYS_UART0_STAT (SYS_IO_BASE + 0x10004) #define SYS_UART0_BAUD (SYS_IO_BASE + 0x10008) #define SYS_UART1_DATA (SYS_IO_BASE + 0x30000) #define SYS_UART1_STAT (SYS_IO_BASE + 0x30004) #define SYS_UART1_BAUD (SYS_IO_BASE + 0x30008) // SPI #define SYS_SPI_STAT (SYS_IO_BASE + 0x20000) // Read #define SPI_STAT_CMDRDY (0x01) #define SPI_STAT_DINRDY (0x02) #define SPI_STAT_DOUTRDY (0x04) #define SPI_STAT_CMD_FIFO_FULL (0x0100) #define SPI_STAT_CMD_FIFO_EMPTY (0x0200) #define SPI_STAT_WRITE_FIFO_FULL (0x0400) #define SPI_STAT_WRITE_FIFO_EMPTY (0x0800) #define SPI_STAT_READ_FIFO_FULL (0x1000) #define SPI_STAT_READ_FIFO_EMPTY (0x2000) #define SPI_STAT_RX_VALID (0x4000) #define SPI_STAT_SPI_HOLD (0x8000) // Write #define SPI_STAT_COMMIT (1) #define SYS_SPI_XFER_SIZE (SYS_IO_BASE + 0x20004) #define SYS_SPI_DATA_SIZE (SYS_IO_BASE + 0x20008) #define SYS_SPI_DATA (SYS_IO_BASE + 0x2000C) #define SYS_SPI_CTRL (SYS_IO_BASE + 0x20010) #ifdef __cplusplus extern "C" { #endif #ifdef __cplusplus } #endif #endif /* BOARD_H */