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- refactored libsys

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- added critical section
- added interrupt global enable/disable
- added console::getInstanveByName



git-svn-id: http://moon:8086/svn/mips@76 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
jens
2017-01-12 16:25:20 +00:00
parent 0f4b7e015f
commit 5c9c50ebeb
21 changed files with 129 additions and 307 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/libsys/Makefile
+2 -2
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@@ -31,8 +31,8 @@ OBJDUMP=mipsel-elf-objdump
OBJCOPY=mipsel-elf-objcopy
FLASHGEN=flashgen
OBJS-ml402=$(addprefix $(BUILD_DIR)/, libsys.o xcpt.o syscalls.o irq.o mips_dbg.o mips_dis.o mips_ps2.o mips_gfx.o console.o screen.o uart.o board.o gpio.o)
OBJS-denano=$(addprefix $(BUILD_DIR)/, libsys.o xcpt.o syscalls.o irq.o mips_dbg.o mips_dis.o console.o uart.o board.o)
OBJS-ml402=$(addprefix $(BUILD_DIR)/, libsys.o xcpt.o syscalls.o cop0.o irq.o mips_dbg.o mips_dis.o mips_ps2.o mips_gfx.o console.o screen.o uart.o board.o gpio.o)
OBJS-denano=$(addprefix $(BUILD_DIR)/, libsys.o xcpt.o syscalls.o cop0.o irq.o mips_dbg.o mips_dis.o console.o uart.o board.o)
all: $(BUILD_DIR) $(BUILD_DIR)/libsys.a
src/libsys/boards/denano/board.c
+4 -7
View File
@@ -8,10 +8,6 @@
#include "board.h"
#include "../../irq.h"
#include "../../uart.h"
#include "../../console.h"
extern uart_if_t uart_if[];
#define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0]))
@@ -21,7 +17,8 @@ const con_if_entry_t con_if_entry[] =
{0, "stdin", &uart_if[0], NULL, NULL, UART_readchar, NULL},
{1, "stdout", &uart_if[0], NULL, NULL, NULL, UART_writechar},
{2, "stderr", &uart_if[0], NULL, NULL, NULL, UART_writechar},
{3, "UART1", &uart_if[1], NULL, NULL, UART_readchar, UART_writechar}
{3, "UART-0", &uart_if[0], NULL, NULL, UART_readchar, UART_writechar},
{4, "UART-1", &uart_if[1], NULL, NULL, UART_readchar, UART_writechar}
};
con_if_t con_if =
@@ -50,10 +47,10 @@ void board_init(void)
void dbg_putchar(char c)
{
writechar(3, c);
writechar(4, c);
}
char dbg_getchar()
{
return (char)readchar(3);
return (char)readchar(4);
}
src/libsys/boards/denano/board.h
+4
View File
@@ -14,6 +14,10 @@
#ifndef BOARD_H
#define BOARD_H
#include "../../irq.h"
#include "../../uart.h"
#include "../../console.h"
#define CPU_FREQ_HZ 50000000
// ---------------------------------------------------------
src/libsys/boards/ml402/board.c
+5 -9
View File
@@ -7,11 +7,6 @@
#include <stddef.h>
#include "board.h"
#include "../../irq.h"
#include "../../mips_ps2.h"
#include "../../screen.h"
#include "../../uart.h"
#include "../../console.h"
extern void dbg_init();
extern void dbg_handler(struct xcptcontext * xcp);
@@ -27,10 +22,11 @@ static const con_if_entry_t con_if_entry[] =
{0, "stdin", &uart_if[0], NULL, NULL, UART_readchar, NULL},
{1, "stdout", &uart_if[0], NULL, NULL, NULL, UART_writechar},
{2, "stderr", &uart_if[0], NULL, NULL, NULL, UART_writechar},
{3, "UART-1", &uart_if[1], NULL, NULL, UART_readchar, UART_writechar},
{4, "PS2-0", &ps2_if[0], PS2_open, PS2_close, PS2_readchar, NULL},
{5, "PS2-1", &ps2_if[1], PS2_open, PS2_close, PS2_readchar, NULL},
{6, "VGA-0", &vga_if, cg_open, cg_close, NULL, cg_writechar}
{10, "UART-0", &uart_if[0], NULL, NULL, UART_readchar, UART_writechar},
{11, "UART-1", &uart_if[1], NULL, NULL, UART_readchar, UART_writechar},
{20, "PS2-0", &ps2_if[0], PS2_open, PS2_close, PS2_readchar, NULL},
{21, "PS2-1", &ps2_if[1], PS2_open, PS2_close, PS2_readchar, NULL},
{30, "VGA-0", &vga_if, cg_open, cg_close, NULL, cg_writechar}
};
con_if_t con_if =
src/libsys/boards/ml402/board.h
+7
View File
@@ -14,6 +14,13 @@
#ifndef BOARD_H
#define BOARD_H
#include "../../irq.h"
#include "../../mips_ps2.h"
#include "../../mips_gfx.h"
#include "../../screen.h"
#include "../../uart.h"
#include "../../console.h"
#define CPU_FREQ_HZ 100000000
// ---------------------------------------------------------
src/libsys/console.c
+20 -5
View File
@@ -11,7 +11,7 @@
extern con_if_t con_if;
// Funcs
con_if_entry_t const* con_getPort(int file)
con_if_entry_t const* con_getInterface(int file)
{
con_if_entry_t const *result = NULL;
int i;
@@ -26,6 +26,21 @@ con_if_entry_t const* con_getPort(int file)
return result;
}
void const* con_getInstanceByName(char const *pName)
{
void const *result = NULL;
int i;
for (i=0; i < con_if.length; i++)
{
if (!strcmp(pName, con_if.con_if_entry[i].pName))
{
result = con_if.con_if_entry[i].pInst;
break;
}
}
return result;
}
int con_open(char const *pName)
{
int i;
@@ -53,7 +68,7 @@ int con_close(int fd)
void con_flush(int fd)
{
int c;
con_if_entry_t const *pIF = con_getPort(fd);
con_if_entry_t const *pIF = con_getInterface(fd);
do
{
@@ -66,7 +81,7 @@ void con_flush(int fd)
int readchar(int fd)
{
int c;
con_if_entry_t const *pIF = con_getPort(fd);
con_if_entry_t const *pIF = con_getInterface(fd);
assert(pIF);
@@ -82,7 +97,7 @@ int readchar(int fd)
void writechar(int fd, char c)
{
con_if_entry_t const *pIF = con_getPort(fd);
con_if_entry_t const *pIF = con_getInterface(fd);
assert(pIF);
@@ -92,7 +107,7 @@ void writechar(int fd, char c)
void _putchar(int fd, char c)
{
con_if_entry_t const *pIF = con_getPort(fd);
con_if_entry_t const *pIF = con_getInterface(fd);
assert(pIF);
if (c == 0x0A)
src/libsys/console.h
+3 -1
View File
@@ -14,6 +14,7 @@
#ifndef CONSOLE_H
#define CONSOLE_H
#include <stddef.h>
#include <stdint.h>
typedef int (*read_func_t)(void const *pInst);
@@ -48,7 +49,8 @@ extern "C" {
int con_open(char const *pName);
int con_close(int fd);
void con_flush(int file);
con_if_entry_t const* con_getPort(int file);
con_if_entry_t const* con_getInterface(int file);
void const* con_getInstanceByName(char const *pName);
int readchar(int file);
void writechar(int file, char c);
src/libsys/irq.c
+14 -6
View File
@@ -1,9 +1,5 @@
#include <sys/times.h>
#include <sys/time.h>
#include <sys/stat.h>
#include <errno.h>
#include <stdlib.h>
#include "libsys.h"
#include <stddef.h>
#include <stdint.h>
#include "regdef.h"
#include "xcpt.h"
#include "irq.h"
@@ -63,6 +59,18 @@ void interrupt_disable(int irq_num)
}
}
void interrupt_enable_all()
{
uint32_t reg = CP0_SR_read() | SR_MASK_IEC;
CP0_SR_write(reg);
}
void interrupt_disable_all()
{
uint32_t reg = CP0_SR_read() & ~SR_MASK_IEC;
CP0_SR_write(reg);
}
void interrupt_set(int irq_num)
{
reg_t reg, ip;
src/libsys/irq.h
+2
View File
@@ -12,5 +12,7 @@ int _irq_dispatch(struct xcptcontext * xcp);
void interrupt_register(int irq_num, fp_irq_t fp);
void interrupt_enable(int irq_num);
void interrupt_disable(int irq_num);
void interrupt_enable_all();
void interrupt_disable_all();
#endif // IRQ_H
src/libsys/libsys.c
+17 -151
View File
@@ -5,164 +5,30 @@
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
#include "console.h"
#include "libsys.h"
#include "regdef.h"
static uint32_t critical_nesting_counter = 0;
#define CALC_BAUD(b) \
((uint32_t)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1);
void UART0_setbaud(uint32_t baudrate)
void enter_critical()
{
*((uint32_t*)SYS_UART0_BAUD) = CALC_BAUD(baudrate);
if (critical_nesting_counter == 0)
{
interrupt_disable_all();
}
critical_nesting_counter++;
}
void UART1_setbaud(uint32_t baudrate)
void exit_critical()
{
*((uint32_t*)SYS_UART1_BAUD) = CALC_BAUD(baudrate);
}
// ---------------------------------------------------------------------------------
// MIPS specific
// ---------------------------------------------------------------------------------
uint32_t CP0_SR_read(void)
{
uint32_t result;
__asm__
(
"mfc0 %[val], $12\n"
: [val] "=r" (result)
);
return result;
}
void CP0_SR_write(uint32_t val)
{
__asm__
(
"mtc0 %[val], $12\n"
: /* no output */
: [val] "r" (val)
);
}
uint32_t CP0_CR_read(void)
{
uint32_t result;
__asm__
(
"mfc0 %[val], $13\n"
: [val] "=r" (result)
);
return result;
}
void CP0_CR_write(uint32_t val)
{
__asm__
(
"mtc0 %[val], $13\n"
:
: [val] "r" (val)
);
}
uint32_t CP0_TR_read(void)
{
uint32_t result;
__asm__
(
"mfc0 %[val], $31\n"
: [val] "=r" (result)
);
return result;
}
void CP0_TR_write(uint32_t val)
{
__asm__
(
"mtc0 %[val], $31\n"
:
: [val] "r" (val)
);
}
uint32_t CP0_PRID_read(void)
{
uint32_t result;
__asm__
(
"mfc0 %[val], $15\n"
: [val] "=r" (result)
);
return result;
}
void CP0_TR_write_ptr(uint32_t* pPtr)
{
__asm__
(
"swc0 $31, 0(%[pPtr])\n"
:
: [pPtr] "r" (pPtr)
);
}
void CP0_TR_read_ptr(uint32_t* pPtr)
{
__asm__
(
"lwc0 $31, 0(%[pPtr])\n"
:
: [pPtr] "r" (pPtr)
);
}
void ICACHE_invalidate_all(void)
{
__asm__
(
"cop0 32\n"
);
}
void ICACHE_invalidate_at(uint32_t* pPtr)
{
__asm__
(
"mtc0 %[pPtr], $31\n"
"cop0 33\n"
:
: [pPtr] "r" (pPtr)
);
}
void DCACHE_invalidate_all(void)
{
__asm__
(
"cop0 34\n"
);
}
void DCACHE_invalidate_at(uint32_t* pPtr)
{
__asm__
(
"mtc0 %[pPtr], $31\n"
"cop0 35\n"
:
: [pPtr] "r" (pPtr)
);
if (critical_nesting_counter > 0)
{
critical_nesting_counter--;
if (critical_nesting_counter == 0)
{
interrupt_enable_all();
}
}
}
void _exit (int exitcode)
src/libsys/libsys.h
+2 -70
View File
@@ -15,76 +15,8 @@
#define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE)
// ---------------------------------------------------------
// Chip registers
// ---------------------------------------------------------
// COP0 registers
#define COP0_REG_INVAT_POINTER 31
// COP0 instructions
#define COP0_INSTR_INVALL_ICACHE 32
#define COP0_INSTR_INVAT_ICACHE 33
#define COP0_INSTR_INVALL_DCACHE 34
#define COP0_INSTR_INVAT_DCACHE 35
#define CP0_read(idx) \
({ \
uint32_t result; \
__asm__ __volatile__ \
( \
"mfc0\t%0,$"#idx"\n" \
: "=r" (result) \
); \
result; \
})
#define CP0_write(idx, val) \
({ \
__asm__ __volatile__ \
( \
"mtc0\t%0,$"#idx"\n" \
"nop\n" \
: /* no output */ \
: "r" (val) \
); \
})
#define CP0_TLBR \
({ \
__asm__ __volatile__ \
( \
"tlbr\n" \
: /* no output */ \
: /* no input */ \
); \
})
#define CP0_TLBWI \
({ \
__asm__ __volatile__ \
( \
"tlbwi\n" \
: /* no output */ \
: /* no input */ \
); \
})
uint32_t CP0_SR_read(void);
void CP0_SR_write(uint32_t val);
uint32_t CP0_CR_read(void);
void CP0_CR_write(uint32_t val);
uint32_t CP0_PRID_read(void);
uint32_t CP0_TR_read(void);
void CP0_TR_write(uint32_t val);
void CP0_TR_write_ptr(uint32_t* pPtr);
void CP0_TR_read_ptr(uint32_t* pPtr);
void ICACHE_invalidate_all(void);
void ICACHE_invalidate_at(uint32_t* pPtr);
void DCACHE_invalidate_all(void);
void DCACHE_invalidate_at(uint32_t* pPtr);
void UART0_setbaud(uint32_t baudrate);
void UART1_setbaud(uint32_t baudrate);
void enter_critical();
void exit_critical();
int write(int file, char *ptr, int len);
int sputs(char const *pStr);
src/libsys/mips_ps2.c
+2 -12
View File
@@ -396,17 +396,6 @@ static char __findkey(char scancode, int mode)
#define ARROW_LEFT (SPECIALKEY|EXTENDED|0x6b)
#define ARROW_RIGHT (SPECIALKEY|EXTENDED|0x74)
static uint32_t readchar(ps2_if_t *pIF)
{
if (!pIF)
return -1;
while (!(SYS_PS2_BIT_RX_AVAIL & *pIF->pCTRL));
return (*pIF->pDATA & 0xFF);
}
uint32_t con_readchar(ps2_if_t *pIF)
{
uint8_t c;
@@ -417,7 +406,8 @@ uint32_t con_readchar(ps2_if_t *pIF)
int char_valid = 0;
uint8_t key;
key = readchar(pIF);
while (!(SYS_PS2_BIT_RX_AVAIL & *pIF->pCTRL));
key = *pIF->pDATA & 0xFF;
switch (key)
{
src/libsys/uart.c
+12
View File
@@ -20,6 +20,18 @@ uart_if_t uart_if[2] =
// ------------------------------------
// Low-level I/O
// ------------------------------------
#define CALC_BAUD(b) \
((uint32_t)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1);
void UART_setbaud(void const *pInst, uint32_t baudrate)
{
assert(pInst);
uart_if_t *pReg = (uart_if_t*)pInst;
*pReg->pBAUD = CALC_BAUD(baudrate);
}
int UART_readchar(void const *pInst)
{
assert(pInst);