diff --git a/src/asm/Makefile b/src/asm/Makefile index b574de2..f20064d 100644 --- a/src/asm/Makefile +++ b/src/asm/Makefile @@ -1,14 +1,20 @@ TARGET=r3000 ROM_WORDADDR_WIDTH=12 RAM_WORDADDR_WIDTH=11 +BUILD_DIR:=./build AR=mips-elf-ar CC=mips-elf-gcc LD=mips-elf-ld OBJCOPY=mips-elf-objcopy +OBJDUMP=mips-elf-objdump ROMGEN=romgen -CFLAGS=-march=$(TARGET) +CFLAGS := -march=$(TARGET) -L. -T link/link.ld -Wl,--gc-sections -G 0 +CFLAGS += -fno-exceptions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -nostartfiles +LIBS := -lsys -lc + +all: testbench.elf libsys.a: $(CC) $(CFLAGS) -c libsys/startup.s -o startup.o @@ -19,13 +25,17 @@ libsys.a: testbench.elf: libsys.a - $(CC) $(CFLAGS) -c testbench.c -o testbench.o - $(LD) $(CFLAGS) -lsys -o $@ - $(OBJCOPY) -j .stext -j .ktext -j .text $@ -O binary $@.ROM.bin - $(OBJCOPY) -j .data $@.elf -O binary $@.RAM.bin - $(ROMGEN) $@.ROM.bin $ROM_WORDADDR_WIDTH - $(ROMGEN) $@.RAM.bin $RAM_WORDADDR_WIDTH + $(CC) $(CFLAGS) -o $@ testbench.c $(LIBS) + $(OBJDUMP) -d $@ > $@.dis + $(OBJCOPY) $@ -O binary $@.ROM.bin + $(OBJCOPY) -j .data $@ -O binary $@.RAM.bin + $(ROMGEN) $@.ROM.bin $(ROM_WORDADDR_WIDTH) + $(ROMGEN) $@.RAM.bin $(RAM_WORDADDR_WIDTH) #xtclsh.exe $TARGET.RAM.tcl #xtclsh.exe $TARGET.ROM.tcl +clean: + rm -rf libsys.a + rm -rf testbench.elf + diff --git a/src/asm/libsys/init.s b/src/asm/libsys/init.s index 41a35da..0d4e38f 100644 --- a/src/asm/libsys/init.s +++ b/src/asm/libsys/init.s @@ -1,9 +1,10 @@ .file "init.s" - .text - .align 2 + .section .init,"ax" + .align 4 .globl _init .extern end + .extern main _init: .set noreorder diff --git a/src/asm/libsys/startup.s b/src/asm/libsys/startup.s index a53059e..610a3fc 100644 --- a/src/asm/libsys/startup.s +++ b/src/asm/libsys/startup.s @@ -1,8 +1,8 @@ .file "startup.s" - .section .stext,"ax" + .section .init,"ax" .extern _init - .align 2 + .align 4 _start: .set noreorder diff --git a/src/asm/link/link.ld b/src/asm/link/link.ld index e175fa8..e22c0c9 100644 --- a/src/asm/link/link.ld +++ b/src/asm/link/link.ld @@ -1,7 +1,10 @@ +/* Specify the memory areas */ MEMORY { - imem : ORIGIN = 0x00400000, LENGTH = 0x00004000 /* 8K */ - dmem : ORIGIN = 0x00000000, LENGTH = 0x00002000 /* 8K */ + rom : ORIGIN = 0xBFC00000, LENGTH = 0x00002000 /* 8K */ + ram : ORIGIN = 0x40000000, LENGTH = 0x04000000 /* 64M */ + flash : ORIGIN = 0x00000000, LENGTH = 0x00800000 /* 8M */ + io : ORIGIN = 0xA0000000, LENGTH = 0x00800000 /* 8M */ } end = 0x7FFFEFFC; @@ -13,35 +16,86 @@ sys_uart_data = 0x80000004; sys_timer_sec = 0x80000014; sys_timer_usec = 0x80000010; +STARTUP(startup.o) +INPUT(kernel.o) + +DEBUGGER_VAR_SIZE = 0x10000; SECTIONS { - .stext 0x00400000 : - { - *(.stext) - } > imem - - .ktext 0x00400180 : - { - *(.ktext) - } > imem + .start : + { + . = ALIGN(4); + start = .; + entry = .; + _entry = .; + __entry = .; + KEEP (*(.start)) + } >ram - .text . : - { - *(.text) - } > imem - - .data 0x00000000 : ALIGN(2) - { - *(.rodata*) *(.data) *(.sdata) *(.sbss) *(.kdata) - } > dmem - - .bss . : - { - *(.bss) - } > dmem - - .eh_frame . : - { - *(.eh_frame) - } > dmem + .exc_vector ORIGIN(ram) + 0x80 : + { + KEEP (*(.exc_vect)) + } >ram + .init : + { + KEEP (*(.init)) + } >ram + .text : + { + *(.text) + *(.text.*) + } >ram + .fini : + { + KEEP (*(.fini)) + } >ram + .rodata : { *(.rodata .rodata.*) } >ram + .rodata1 : { *(.rodata1) } >ram + .sdata2 : + { + *(.sdata2 .sdata2.*) + } >ram + .sbss2 : { *(.sbss2 .sbss2.*) } >ram + .data : + { + *(.data .data.*) + } >ram + .data1 : { *(.data1) } >ram + .got.plt : { *(.got.plt) } >ram + . = ALIGN(4); + _gp = ALIGN(16) + 0x7ff0; + .got : { *(.got) } + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata : + { + *(.sdata .sdata.*) + } >ram + __bss_start = ALIGN(4); + .sbss : + { + *(.sbss .sbss.*) + *(.scommon) + } >ram + .bss : + { + *(.bss .bss.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. + FIXME: Why do we need it? When there is no .bss section, we don't + pad the .data section. */ + . = ALIGN(. != 0 ? 32 / 8 : 1); + } >ram + . = ALIGN(32 / 8); + _end = .; PROVIDE (end = .); + . = (ORIGIN(ram) + LENGTH(ram) - DEBUGGER_VAR_SIZE - 0x10); + stack_ptr = . | ~(LENGTH(ram)-1) & 0x7fffffff; + . = . + 0x10; + .dbg_vars . (NOLOAD) : + { + *(.dbg_vars) + } }