diff --git a/src/bootloader/libsys_boot.h b/src/bootloader/libsys_boot.h
index b977d7a..8804b44 100644
--- a/src/bootloader/libsys_boot.h
+++ b/src/bootloader/libsys_boot.h
@@ -58,23 +58,22 @@
 #define	SYS_UART_STAT		(SYS_IO_BASE + 0x10004)
 #define	SYS_UART_BAUD		(SYS_IO_BASE + 0x10008)
 
-#define	SYS_SPI_CTRL_STAT				(SYS_IO_BASE + 0x20000)
+#define	SYS_SPI_STAT					(SYS_IO_BASE + 0x20000)
 // Read
-#define SPI_CMD_STAT_CMDRDY				(0x01)
-#define SPI_CMD_STAT_DINRDY				(0x02)
-#define SPI_CMD_STAT_DOUTRDY			(0x04)
-
-#define SPI_CMD_STAT_CMD_FIFO_FULL		(0x0100)
-#define SPI_CMD_STAT_CMD_FIFO_EMPTY		(0x0200)
-#define SPI_CMD_STAT_WRITE_FIFO_FULL	(0x0400)
-#define SPI_CMD_STAT_WRITE_FIFO_EMPTY	(0x0800)
-#define SPI_CMD_STAT_READ_FIFO_FULL		(0x1000)
-#define SPI_CMD_STAT_READ_FIFO_EMPTY	(0x2000)
-#define SPI_CMD_STAT_RX_VALID			(0x4000)
-#define SPI_CMD_STAT_SPI_HOLD			(0x8000)
+#define SPI_STAT_CMDRDY					(0x01)
+#define SPI_STAT_DINRDY					(0x02)
+#define SPI_STAT_DOUTRDY				(0x04)
+#define SPI_STAT_CMD_FIFO_FULL			(0x0100)
+#define SPI_STAT_CMD_FIFO_EMPTY			(0x0200)
+#define SPI_STAT_WRITE_FIFO_FULL		(0x0400)
+#define SPI_STAT_WRITE_FIFO_EMPTY		(0x0800)
+#define SPI_STAT_READ_FIFO_FULL			(0x1000)
+#define SPI_STAT_READ_FIFO_EMPTY		(0x2000)
+#define SPI_STAT_RX_VALID				(0x4000)
+#define SPI_STAT_SPI_HOLD				(0x8000)
 
 // Write
-#define SPI_CMD_CTRL_COMMIT				(1)
+#define SPI_STAT_COMMIT					(1)
 
 #define	SYS_SPI_XFER_SIZE				(SYS_IO_BASE + 0x20004)
 #define	SYS_SPI_DATA_SIZE				(SYS_IO_BASE + 0x20008)
diff --git a/src/bootloader/test.c b/src/bootloader/test.c
index f9d33ca..2055744 100644
--- a/src/bootloader/test.c
+++ b/src/bootloader/test.c
@@ -46,10 +46,10 @@ void main()
 	volatile uint32_t *pTim_stat = (uint32_t*)SYS_ITIM_STAT;
 	volatile uint32_t *pTim0_cnt = (uint32_t*)SYS_ITIM0_CNT;
 	volatile uint32_t *pTim0_cmp = (uint32_t*)SYS_ITIM0_CMP;
-	volatile uint32_t *pSpiCtrlStat = (uint32_t*)SYS_SPI_CTRL_STAT;
-	volatile uint32_t *pSpiData = (uint32_t*)SYS_SPI_DATA;
 	volatile uint32_t *pSpiXferSize = (uint32_t*)SYS_SPI_XFER_SIZE;
 	volatile uint32_t *pSpiDataSize = (uint32_t*)SYS_SPI_DATA_SIZE;
+	volatile uint32_t *pSpiData = (uint32_t*)SYS_SPI_DATA;
+	volatile uint32_t *pSpiStat = (uint32_t*)SYS_SPI_STAT;
 	volatile uint32_t *pSpiCtrl = (uint32_t*)SYS_SPI_CTRL;
 	*pTim0_cnt = 0;
 	*pTim0_cmp = 2500000;	// 50 ms @ 50 Mhz
@@ -92,21 +92,21 @@ void main()
 		*pSpiData		= 0x9F000000;
 		*pSpiDataSize	= 8;
 		*pSpiXferSize	= 8+648;
-		*pSpiCtrlStat	= SPI_CMD_CTRL_COMMIT;
+		*pSpiStat		= SPI_STAT_COMMIT;
 
-		sputs("SYS_SPI_CTRL_STAT : ");print_word(*pSpiCtrlStat);sputs("\n");
 		sputs("SYS_SPI_XFER_SIZE : ");print_word(*pSpiXferSize);sputs("\n");
 		sputs("SYS_SPI_DATA_SIZE : ");print_word(*pSpiDataSize);sputs("\n");
 		sputs("SYS_SPI_CTRL      : ");print_word(*pSpiCtrl);sputs("\n");
+		sputs("SYS_SPI_STAT      : ");print_word(*pSpiStat);sputs("\n");
 
-		while(!(*pSpiCtrlStat & SPI_CMD_STAT_DOUTRDY))
+		while(!(*pSpiStat & SPI_STAT_DOUTRDY))
 		{
 		}
 		
 		do
 		{
 			print_word(*pSpiData);sputs("\n");
-		} while (*pSpiCtrlStat & SPI_CMD_STAT_DOUTRDY);
+		} while (*pSpiStat & SPI_STAT_DOUTRDY);
 		
 		sputs("Testing SDRAM (pattern)\n");
 		for (j=0; j < ARRAY_SIZE(test_pattern); j++)