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[bootloader]

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- dedicated test app
[romgen and ramgen]
- minor fix in VHDL generation

git-svn-id: http://moon:8086/svn/mips@15 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
jens
2015-05-17 10:20:17 +00:00
parent 178f02ec7a
commit 49695d4bcf
5 changed files with 37 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/bootloader/Makefile
+14 -6
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@@ -37,22 +37,30 @@ libsys: startup_boot.S init_boot.S kernel_boot.S libsys_boot.c
$(CC) $(CFLAGS) -c kernel_boot.S -o kernel.o $(CC) $(CFLAGS) -c kernel_boot.S -o kernel.o
$(CC) $(CFLAGS) -c libsys_boot.c -o libsys.o $(CC) $(CFLAGS) -c libsys_boot.c -o libsys.o
bootloader: libsys bootloader.c test.c bootloader: libsys bootloader.c
$(CC) $(CFLAGS) -g -c bootloader.c test.c $(CC) $(CFLAGS) -g -c bootloader.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o bootloader.o test.o -o $@.elf $(LIBS) >$@.map $(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o bootloader.o -o $@.elf $(LIBS) >$@.map
$(OBJDUMP) -D $@.elf > $@.dis $(OBJDUMP) -D $@.elf > $@.dis
$(OBJCOPY) $@.elf -O binary $@.ROM.bin $(OBJCOPY) $@.elf -O binary $@.ROM.bin
$(OBJCOPY) -O srec $@.elf $@.srec $(OBJCOPY) -O srec $@.elf $@.srec
$(ROMGEN) $@.ROM.bin 10 $(ENDIAN_FLAGS) $(ROMGEN) $@.ROM.bin 10 $(ENDIAN_FLAGS)
bootloader_flash: libsys bootloader_with_flash.c test.c bootloader_flash: libsys bootloader_with_flash.c
$(CC) $(CFLAGS) -g -c bootloader_with_flash.c test.c $(CC) $(CFLAGS) -g -c bootloader_with_flash.c
$(CC) $(CFLAGS) -g -c ../cfiflash.c $(CC) $(CFLAGS) -g -c ../cfiflash.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o cfiflash.o bootloader_with_flash.o test.o -o $@.elf $(LIBS) >$@.map $(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o cfiflash.o bootloader_with_flash.o -o $@.elf $(LIBS) >$@.map
$(OBJDUMP) -D $@.elf > $@.dis $(OBJDUMP) -D $@.elf > $@.dis
$(OBJCOPY) $@.elf -O binary $@.ROM.bin $(OBJCOPY) $@.elf -O binary $@.ROM.bin
$(OBJCOPY) -O srec $@.elf $@.srec $(OBJCOPY) -O srec $@.elf $@.srec
$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS) $(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
test: libsys test.c
$(CC) $(CFLAGS) -g -c test.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o test.o -o $@.elf $(LIBS) >$@.map
$(OBJDUMP) -D $@.elf > $@.dis
$(OBJCOPY) $@.elf -O binary $@.ROM.bin
$(OBJCOPY) -O srec $@.elf $@.srec
$(ROMGEN) $@.ROM.bin 10 $(ENDIAN_FLAGS)
clean: clean:
rm -rf *.o *.bin *.map *.dis *.srec *.elf *.vhd* *.tcl bootloader > /dev/null rm -rf *.o *.bin *.map *.dis *.srec *.elf *.vhd* *.tcl bootloader > /dev/null
src/bootloader/init_boot.S
-5
View File
@@ -4,7 +4,6 @@
.globl _init .globl _init
.align 2 .align 2
.extern end .extern end
.weak test
_init: _init:
.set noreorder .set noreorder
@@ -14,10 +13,6 @@ _init:
addiu $27, $0, baudrate addiu $27, $0, baudrate
sw $27, 0($26) sw $27, 0($26)
la $26, test
jr $26
nop
jr $ra jr $ra
.set reorder .set reorder
src/bootloader/test.c
+16 -2
View File
@@ -1,11 +1,25 @@
#include "libsys_boot.h" #include "libsys_boot.h"
void test() void main()
{ {
uint32_t i;
volatile uint32_t *pGPIO = (uint32_t*)SYS_GPIO_0_DATA; volatile uint32_t *pGPIO = (uint32_t*)SYS_GPIO_0_DATA;
volatile uint32_t *pGPIODIR = (uint32_t*)SYS_GPIO_0_DIR; volatile uint32_t *pGPIODIR = (uint32_t*)SYS_GPIO_0_DIR;
volatile uint32_t *pSDRAM32 = (uint32_t*)SDRAM_BASE; volatile uint8_t *pRAM = (uint8_t*)SDRAM_BASE;
volatile uint32_t *pRAM32 = (uint32_t*)SDRAM_BASE;
*pGPIODIR = GPIO_0_DFLT_DIR; *pGPIODIR = GPIO_0_DFLT_DIR;
*pGPIO = 0;
for (i=0; i < 1024; i++)
{
pRAM[i] = i;
}
for (i=0; i < 1024; i++)
{
*pGPIO = pRAM32[i];
}
*pGPIO = 1; *pGPIO = 1;
} }
tools/src/ramgen.c
+3 -1
View File
@@ -249,8 +249,10 @@ int SaveRAM_V4LD(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *p
fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME); fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME);
fprintf(pFileOut, "\tprocess(clk)\n"); fprintf(pFileOut, "\tprocess(clk)\n");
fprintf(pFileOut, "\tbegin\n"); fprintf(pFileOut, "\tbegin\n");
fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n"); fprintf(pFileOut, "\t\tif rising_edge(clk) then\n");
fprintf(pFileOut, "\t\t\tif ce = '1' then\n");
fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1); fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1);
fprintf(pFileOut, "\t\t\tend if;\n");
fprintf(pFileOut, "\t\tend if;\n"); fprintf(pFileOut, "\t\tend if;\n");
fprintf(pFileOut, "\tend process;\n"); fprintf(pFileOut, "\tend process;\n");
fprintf(pFileOut, "\n"); fprintf(pFileOut, "\n");
tools/src/romgen.c
+4 -2
View File
@@ -163,8 +163,10 @@ int SaveROM(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntNa
fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME); fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME);
fprintf(pFileOut, "\tprocess(clk)\n"); fprintf(pFileOut, "\tprocess(clk)\n");
fprintf(pFileOut, "\tbegin\n"); fprintf(pFileOut, "\tbegin\n");
fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n"); fprintf(pFileOut, "\t\tif rising_edge(clk) then\n");
fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1); fprintf(pFileOut, "\t\t\tif ce = '1' then\n");
fprintf(pFileOut, "\t\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1);
fprintf(pFileOut, "\t\t\tend if;\n");
fprintf(pFileOut, "\t\tend if;\n"); fprintf(pFileOut, "\t\tend if;\n");
fprintf(pFileOut, "\tend process;\n"); fprintf(pFileOut, "\tend process;\n");
fprintf(pFileOut, "\n"); fprintf(pFileOut, "\n");