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[bootloader]

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- dedicated test app
[romgen and ramgen]
- minor fix in VHDL generation

git-svn-id: http://moon:8086/svn/mips@15 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
jens
2015-05-17 10:20:17 +00:00
parent 178f02ec7a
commit 49695d4bcf
5 changed files with 37 additions and 16 deletions
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tools/src/ramgen.c
+3 -1
View File
@@ -249,8 +249,10 @@ int SaveRAM_V4LD(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *p
fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME);
fprintf(pFileOut, "\tprocess(clk)\n");
fprintf(pFileOut, "\tbegin\n");
fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n");
fprintf(pFileOut, "\t\tif rising_edge(clk) then\n");
fprintf(pFileOut, "\t\t\tif ce = '1' then\n");
fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1);
fprintf(pFileOut, "\t\t\tend if;\n");
fprintf(pFileOut, "\t\tend if;\n");
fprintf(pFileOut, "\tend process;\n");
fprintf(pFileOut, "\n");
tools/src/romgen.c
+4 -2
View File
@@ -163,8 +163,10 @@ int SaveROM(char *pFilenameIn, char *pFilenameOut, char *pArchName, char *pEntNa
fprintf(pFileOut, "PROM_READ:\n", ARCH_NAME);
fprintf(pFileOut, "\tprocess(clk)\n");
fprintf(pFileOut, "\tbegin\n");
fprintf(pFileOut, "\t\tif rising_edge(clk) and ce = '1' then\n");
fprintf(pFileOut, "\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1);
fprintf(pFileOut, "\t\tif rising_edge(clk) then\n");
fprintf(pFileOut, "\t\t\tif ce = '1' then\n");
fprintf(pFileOut, "\t\t\t\tdout <= word_array(to_integer(addr(%d downto 2)));\n", nbits_addr+1);
fprintf(pFileOut, "\t\t\tend if;\n");
fprintf(pFileOut, "\t\tend if;\n");
fprintf(pFileOut, "\tend process;\n");
fprintf(pFileOut, "\n");