diff --git a/src/bootloader/libsys_boot.h b/src/bootloader/libsys_boot.h
index 9f9be42..b977d7a 100644
--- a/src/bootloader/libsys_boot.h
+++ b/src/bootloader/libsys_boot.h
@@ -57,12 +57,35 @@
 #define	SYS_UART_DATA		(SYS_IO_BASE + 0x10000)
 #define	SYS_UART_STAT		(SYS_IO_BASE + 0x10004)
 #define	SYS_UART_BAUD		(SYS_IO_BASE + 0x10008)
-#define	SYS_USB_DATA		(SYS_IO_BASE + 0x20000)
-#define	SYS_USB_MBX			(SYS_IO_BASE + 0x20004)
-#define	SYS_USB_ADDR		(SYS_IO_BASE + 0x20008)
-#define	SYS_USB_STATUS		(SYS_IO_BASE + 0x2000C)
-#define	SYS_FLASH_IO		0xA4000000
-#define	SYS_FLASH_MEM		0x00000000
+
+#define	SYS_SPI_CTRL_STAT				(SYS_IO_BASE + 0x20000)
+// Read
+#define SPI_CMD_STAT_CMDRDY				(0x01)
+#define SPI_CMD_STAT_DINRDY				(0x02)
+#define SPI_CMD_STAT_DOUTRDY			(0x04)
+
+#define SPI_CMD_STAT_CMD_FIFO_FULL		(0x0100)
+#define SPI_CMD_STAT_CMD_FIFO_EMPTY		(0x0200)
+#define SPI_CMD_STAT_WRITE_FIFO_FULL	(0x0400)
+#define SPI_CMD_STAT_WRITE_FIFO_EMPTY	(0x0800)
+#define SPI_CMD_STAT_READ_FIFO_FULL		(0x1000)
+#define SPI_CMD_STAT_READ_FIFO_EMPTY	(0x2000)
+#define SPI_CMD_STAT_RX_VALID			(0x4000)
+#define SPI_CMD_STAT_SPI_HOLD			(0x8000)
+
+// Write
+#define SPI_CMD_CTRL_COMMIT				(1)
+
+#define	SYS_SPI_XFER_SIZE				(SYS_IO_BASE + 0x20004)
+#define	SYS_SPI_DATA_SIZE				(SYS_IO_BASE + 0x20008)
+#define	SYS_SPI_DATA					(SYS_IO_BASE + 0x2000C)
+#define	SYS_SPI_CTRL					(SYS_IO_BASE + 0x20010)
+
+#define	SYS_UART_STAT					(SYS_IO_BASE + 0x10004)
+#define	SYS_UART_BAUD					(SYS_IO_BASE + 0x10008)
+
+#define	SYS_FLASH_IO					0xA4000000
+#define	SYS_FLASH_MEM					0x00000000
 
 // RTC
 #define	SYS_TIMER_USEC					(SYS_IO_BASE + 0x8)
diff --git a/src/bootloader/test.c b/src/bootloader/test.c
index 5a21430..30d5b6a 100644
--- a/src/bootloader/test.c
+++ b/src/bootloader/test.c
@@ -46,7 +46,11 @@ void main()
 	volatile uint32_t *pTim_stat = (uint32_t*)SYS_ITIM_STAT;
 	volatile uint32_t *pTim0_cnt = (uint32_t*)SYS_ITIM0_CNT;
 	volatile uint32_t *pTim0_cmp = (uint32_t*)SYS_ITIM0_CMP;
-
+	volatile uint32_t *pSpiCtrlStat = (uint32_t*)SYS_SPI_CTRL_STAT;
+	volatile uint32_t *pSpiData = (uint32_t*)SYS_SPI_DATA;
+	volatile uint32_t *pSpiXferSize = (uint32_t*)SYS_SPI_XFER_SIZE;
+	volatile uint32_t *pSpiDataSize = (uint32_t*)SYS_SPI_DATA_SIZE;
+	volatile uint32_t *pSpiCtrl = (uint32_t*)SYS_SPI_CTRL;
 	*pTim0_cnt = 0;
 	*pTim0_cmp = 2500000;	// 50 ms @ 50 Mhz
 	*pTim_stat = (1 << 0);
@@ -77,10 +81,29 @@ void main()
 	*pUART0_stat |= (1 << 6);
 
 	sputs("Hello, world!\n");
+
 	k = 0;
 	while(1)
 	{
 		sputs("Iteration # ");print_word(k);sputs("\n");
+
+		sputs("Test SPI\n");
+		*pSpiCtrl       = (*pSpiCtrl & 0xFFFFFF00) | 50;
+		*pSpiData		= 0x9F000000;
+		*pSpiDataSize	= 8;
+		*pSpiXferSize	= 8+24;
+		*pSpiCtrlStat	= SPI_CMD_CTRL_COMMIT;
+
+		sputs("SYS_SPI_CTRL_STAT : ");print_word(*pSpiCtrlStat);sputs("\n");
+		sputs("SYS_SPI_XFER_SIZE : ");print_word(*pSpiXferSize);sputs("\n");
+		sputs("SYS_SPI_DATA_SIZE : ");print_word(*pSpiDataSize);sputs("\n");
+		sputs("SYS_SPI_CTRL      : ");print_word(*pSpiCtrl);sputs("\n");
+
+		while(!(*pSpiCtrlStat & SPI_CMD_STAT_DOUTRDY))
+		{
+		}
+		print_word(*pSpiData);sputs("\n");
+		
 		sputs("Testing SDRAM (pattern)\n");
 		for (j=0; j < ARRAY_SIZE(test_pattern); j++)
 		{