From 617428954670a86260adb22fbbc6262efecff7fe Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Tue, 5 Mar 2019 17:20:04 +0000 Subject: [PATCH] - added LTSpice sims git-svn-id: http://moon:8086/svn/projects/HendiControl@70 fda53097-d464-4ada-af97-ba876c37ca34 --- Control/LTSpice/Hendi_boot_reset.asc | 108 +++++++++++++++++++++++++++ Control/LTSpice/Hendi_pwr_switch.asc | 50 +++++++++++++ Control/LTSpice/stimVa.pwl.txt | 10 +++ Control/LTSpice/stimVb.pwl.txt | 10 +++ 4 files changed, 178 insertions(+) create mode 100644 Control/LTSpice/Hendi_boot_reset.asc create mode 100644 Control/LTSpice/Hendi_pwr_switch.asc create mode 100644 Control/LTSpice/stimVa.pwl.txt create mode 100644 Control/LTSpice/stimVb.pwl.txt diff --git a/Control/LTSpice/Hendi_boot_reset.asc b/Control/LTSpice/Hendi_boot_reset.asc new file mode 100644 index 0000000..1a597ab --- /dev/null +++ b/Control/LTSpice/Hendi_boot_reset.asc @@ -0,0 +1,108 @@ +Version 4 +SHEET 1 1316 772 +WIRE 336 -80 208 -80 +WIRE 208 -48 208 -80 +WIRE 208 64 208 32 +WIRE 400 64 208 64 +WIRE 448 64 400 64 +WIRE 208 80 208 64 +WIRE -208 128 -256 128 +WIRE -112 128 -208 128 +WIRE -64 128 -112 128 +WIRE 112 128 16 128 +WIRE 144 128 112 128 +WIRE 112 144 112 128 +WIRE -256 176 -256 128 +WIRE 208 240 208 176 +WIRE 208 240 -160 240 +WIRE 112 272 112 224 +WIRE 272 272 112 272 +WIRE 336 272 336 -80 +WIRE 416 272 336 272 +WIRE 512 272 416 272 +WIRE -256 304 -256 256 +WIRE -112 304 -112 128 +WIRE 208 304 -112 304 +WIRE 512 304 512 272 +WIRE 112 320 112 272 +WIRE 272 320 272 272 +WIRE 208 368 208 304 +WIRE -208 416 -256 416 +WIRE -160 416 -160 240 +WIRE -160 416 -208 416 +WIRE -64 416 -160 416 +WIRE 112 416 112 400 +WIRE 112 416 16 416 +WIRE 144 416 112 416 +WIRE 512 416 512 384 +WIRE -256 464 -256 416 +WIRE 208 480 208 464 +WIRE 400 480 208 480 +WIRE 448 480 400 480 +WIRE 208 512 208 480 +WIRE -256 592 -256 544 +WIRE 208 624 208 592 +WIRE 336 624 336 272 +WIRE 336 624 208 624 +FLAG 416 272 VCC +FLAG -256 304 0 +FLAG 512 416 0 +FLAG -256 592 0 +FLAG 400 64 OUT_A +FLAG 400 480 OUT_B +FLAG -208 128 IN_A +FLAG -208 416 IN_B +FLAG 272 320 0 +SYMBOL npn 144 80 R0 +SYMATTR InstName Q1 +SYMATTR Value BC847B +SYMBOL res 192 -64 R0 +SYMATTR InstName R1 +SYMATTR Value 10k +SYMBOL res 32 112 R90 +WINDOW 0 0 56 VBottom 2 +WINDOW 3 32 56 VTop 2 +SYMATTR InstName R2 +SYMATTR Value 10k +SYMBOL res 128 240 R180 +WINDOW 0 36 76 Left 2 +WINDOW 3 36 40 Left 2 +SYMATTR InstName R3 +SYMATTR Value 10k +SYMBOL voltage 512 288 R0 +WINDOW 123 0 0 Left 0 +WINDOW 39 24 124 Left 2 +SYMATTR SpiceLine Rser=0 +SYMATTR InstName V1 +SYMATTR Value 5 +SYMBOL voltage -256 160 R0 +WINDOW 3 -663 67 Left 2 +WINDOW 123 0 0 Left 0 +WINDOW 39 -138 37 Left 2 +SYMATTR Value PWL file=C:\Users\ahrensfeld\Documents\stimVa.pwl.txt +SYMATTR SpiceLine Rser=10 +SYMATTR InstName V2 +SYMBOL voltage -256 448 R0 +WINDOW 3 -658 67 Left 2 +WINDOW 123 0 0 Left 0 +WINDOW 39 -131 35 Left 2 +SYMATTR Value PWL file=C:\Users\ahrensfeld\Documents\stimVb.pwl.txt +SYMATTR SpiceLine Rser=10 +SYMATTR InstName V3 +SYMBOL npn 144 464 M180 +SYMATTR InstName Q2 +SYMATTR Value BC847B +SYMBOL res 32 400 R90 +WINDOW 0 0 56 VBottom 2 +WINDOW 3 32 56 VTop 2 +SYMATTR InstName R5 +SYMATTR Value 10k +SYMBOL res 128 416 R180 +WINDOW 0 36 76 Left 2 +WINDOW 3 36 40 Left 2 +SYMATTR InstName R6 +SYMATTR Value 10k +SYMBOL res 192 496 R0 +SYMATTR InstName R7 +SYMATTR Value 10k +TEXT -592 40 Left 2 !.tran 200m diff --git a/Control/LTSpice/Hendi_pwr_switch.asc b/Control/LTSpice/Hendi_pwr_switch.asc new file mode 100644 index 0000000..4575617 --- /dev/null +++ b/Control/LTSpice/Hendi_pwr_switch.asc @@ -0,0 +1,50 @@ +Version 4 +SHEET 1 1508 772 +WIRE 32 -48 -80 -48 +WIRE 336 -48 32 -48 +WIRE 432 -48 336 -48 +WIRE -80 -32 -80 -48 +WIRE 32 48 32 -48 +WIRE -192 64 -256 64 +WIRE -80 64 -80 48 +WIRE -80 64 -192 64 +WIRE -16 64 -80 64 +WIRE 432 64 432 -48 +WIRE 32 160 32 144 +WIRE 224 160 32 160 +WIRE 272 160 224 160 +WIRE -256 176 -256 64 +WIRE 32 176 32 160 +WIRE 432 176 432 144 +WIRE -256 304 -256 256 +WIRE 32 304 32 256 +FLAG 336 -48 VCC +FLAG -256 304 0 +FLAG 432 176 0 +FLAG 224 160 OUT_A +FLAG -192 64 IN_A +FLAG 32 304 0 +SYMBOL voltage 432 48 R0 +WINDOW 123 0 0 Left 0 +WINDOW 39 24 124 Left 2 +SYMATTR SpiceLine Rser=0 +SYMATTR InstName V1 +SYMATTR Value 5 +SYMBOL voltage -256 160 R0 +WINDOW 3 -663 67 Left 2 +WINDOW 123 0 0 Left 0 +WINDOW 39 -138 37 Left 2 +SYMATTR Value PWL file=C:\Users\ahrensfeld\Documents\stimVa.pwl.txt +SYMATTR SpiceLine Rser=10 +SYMATTR InstName V2 +SYMBOL res 16 160 R0 +SYMATTR InstName R1 +SYMATTR Value 10 +SYMBOL pmos -16 144 M180 +SYMATTR InstName M1 +SYMATTR Value IRF7416 +SYMBOL res -96 -48 R0 +SYMATTR InstName R2 +SYMATTR Value 10k +TEXT -592 40 Left 2 !.tran 200m +TEXT -888 384 Left 2 !.model IRF7416 VDMOS(pchan Rg=3 Rd=18m Rs=13.5m Vto=-1 Kp=20 Cgdmax=1.4n Cgdmin=.18n Cgs=2.4n Cjo=.72n Is=72p Rb=22.5m ksubthres=.1 mfg=International_Rectifier Vds=-30 Ron=45m Qg=36n) diff --git a/Control/LTSpice/stimVa.pwl.txt b/Control/LTSpice/stimVa.pwl.txt new file mode 100644 index 0000000..6a082f9 --- /dev/null +++ b/Control/LTSpice/stimVa.pwl.txt @@ -0,0 +1,10 @@ +0 0 +10m 0 +10.001m 5 +20m 5 +20.001m 0 +30m 0 +30.001m 5 +40m 5 +40.001m 0 + diff --git a/Control/LTSpice/stimVb.pwl.txt b/Control/LTSpice/stimVb.pwl.txt new file mode 100644 index 0000000..00ca82f --- /dev/null +++ b/Control/LTSpice/stimVb.pwl.txt @@ -0,0 +1,10 @@ +0 0 +10m 0 +10.001m 0 +20m 0 +20.001m 5 +30m 5 +30.001m 5 +40m 5 +40.001m 0 +